; -------------------------------------------------------------------------------- ; @Title: THA6206 On-Chip Peripherals ; @Props: Released ; @Author: CMO ; @Changelog: 2024.08.20 CMO ; @Manufacturer: TONGXIN_MICRO ; @Core: Cortex-R52+, SecurCore SC300 ; @Chip: THA6206 ; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: pertha6206.per 19006 2025-02-10 12:45:08Z pegold $ AUTOINDENT.ON CENTER TREE ENUMDELIMITER "," base ad:0x0 sif (CORENAME()=="CORTEXR52+") tree "Core Registers (Cortex-R52+)" AUTOINDENT.PUSH AUTOINDENT.OFF AUTOINDENT.ON center tree tree "ID Registers" rgroup.long c15:0x0010++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. "STATE3,Thumb execution environment (thumb-EE) support" "Not supported,?..." bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,No cleaning,?..." bitfld.long 0x00 4.--7. "STATE1,Thumb encoding supported by the processor type" "Reserved,Reserved,Reserved,After thumb-2,?..." newline bitfld.long 0x00 0.--3. "STATE0,ARM instruction set support" "Reserved,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. "VF,Virtualization fractional support" "Not supported,?..." bitfld.long 0x00 20.--23. "SF,Security fractional support" "Reserved,VBAR,?..." newline bitfld.long 0x00 16.--19. "GT,Generic timer support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "VE,Virtualization extensions support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "MPM,Microcontroller programmer's model support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "SE,Security extensions architecture v1 support" "Not supported,?..." bitfld.long 0x00 0.--3. "PM,Standard ARMv4 programmer's model support" "Reserved,Supported,?..." rgroup.long c15:0x0310++0x00 line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Non-cacheable,?..." bitfld.long 0x00 24.--27. "FCSE,Fast context switch memory mappings support" "Not supported,?..." bitfld.long 0x00 20.--23. "AR,Auxiliary register support" "Reserved,Reserved,Control/fault status,?..." newline bitfld.long 0x00 16.--19. "TCM,TCM and associated DMA support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. "OSS,Outer shareable support" "Non-cacheable,?..." newline bitfld.long 0x00 4.--7. "PMSA,Physical memory system architecture (PMSA) support" "Reserved,Reserved,Reserved,Reserved,ARMv8-R base+limit PMSA,?..." bitfld.long 0x00 0.--3. "VMSA,Virtual memory system architecture (VMSA) support" "Not supported,?..." rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. "BTB,Branch predictor" "Reserved,Reserved,Reserved,Reserved,No flushing,?..." bitfld.long 0x00 24.--27. "L1TCO,Test and clean operations on data cache/Harvard/unified architecture support" "Not supported,?..." bitfld.long 0x00 20.--23. "L1UCMO,L1 cache/all maintenance operations/unified architecture support" "Not supported,?..." newline bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/all maintenance operations/Harvard architecture support" "Not supported,?..." bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 cache line maintenance operations by set and way/unified architecture support" "Not supported,?..." bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 cache line maintenance operations by set and way/Harvard architecture support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 cache line maintenance operations by MVA/unified architecture support" "Not supported,?..." bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 cache line maintenance operations by MVA/Harvard architecture" "Not supported,?..." rgroup.long c15:0x0610++0x00 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. "HAF,Hardware access flag support" "Not supported,?..." bitfld.long 0x00 24.--27. "WFI,Wait for interrupt stalling support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "MBF,Memory barrier operations support" "Reserved,Reserved,DSB/ISB/DMB,?..." newline bitfld.long 0x00 16.--19. "UTLBMO,TLB maintenance operations/unified architecture support" "Not supported,?..." bitfld.long 0x00 12.--15. "HTLBMO,TLB maintenance operations/Harvard architecture support" "Not supported,?..." bitfld.long 0x00 8.--11. "HL1CMRO,Cache maintenance range operations/Harvard architecture support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "HL1BPCRO,Background prefetch cache range operations/Harvard architecture support" "Not supported,?..." bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground prefetch cache range operations/Harvard architecture support" "Not supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. "SS,Supersections support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not supported" bitfld.long 0x00 24.--27. "CMEMSZ,Cached memory size" "4GByte,?..." bitfld.long 0x00 20.--23. "CW,Coherent walk. Indicates whether translation table updates require a clean to the point of unification" "Reserved,Not required,?..." newline bitfld.long 0x00 12.--15. "MB,Maintenance broadcast support" "Reserved,Reserved,Shareability/defined behavior,?..." bitfld.long 0x00 8.--11. "BPM,Invalidate branch predictor support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. "HCMOSW,Invalidate cache by set and way/clean by set and way/invalidate and clean by set and way support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate cache MVA support" "Reserved,Supported,?..." rgroup.long c15:0x0620++0x00 line.long 0x00 "ID_MMFR4,Memory Model Feature Register 4" bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Reserved,Supported,?..." rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. "DIVI,Divide instructions support" "Reserved,Reserved,T32/A32,?..." bitfld.long 0x00 20.--23. "DEBI,Debug instructions support" "Reserved,Supported,?..." bitfld.long 0x00 16.--19. "CI,Coprocessor instructions support" "Not supported,?..." newline bitfld.long 0x00 12.--15. "CBI,Combined compare and branch instructions support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. "BI,Bitfield instructions support" "Reserved,Supported,?..." bitfld.long 0x00 4.--7. "BCI,Bit counting instructions support" "Reserved,Supported,?..." newline bitfld.long 0x00 0.--3. "SI,Swap instructions support" "Not supported,?..." rgroup.long c15:0x0120++0x00 line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x00 28.--31. "JI,Jazelle instructions support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. "INTI,Interwork instructions support" "Reserved,Reserved,Reserved,A32-BX like,?..." bitfld.long 0x00 20.--23. "IMMI,Immediate instructions support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "ITEI,If then instructions support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "EXTI,Extend instructions support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "EARI,Exception A and R instructions support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "EXIN,Exception in ARM instructions support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. "ENDI,Endian instructions support" "Reserved,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x00 28.--31. "RI,Reversal instructions support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. "PSRI,PSR instructions support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "UMI,Advanced unsigned multiply instructions support" "Reserved,Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "SMI,Advanced signed multiply instructions support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. "MI,Multiply instructions support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "II,Multi-access interruptible instructions support" "Reserved,Restartable,?..." newline bitfld.long 0x00 4.--7. "MHI,Memory hint instructions support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLDW,?..." bitfld.long 0x00 0.--3. "LSI,Load and store instructions support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE extensions support" "Not supported,?..." bitfld.long 0x00 24.--27. "NOPI,True NOP instructions support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. "TCI,Thumb copy instructions support" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "TBI,Table branch instructions support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SPI,Synchronization primitive instructions support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. "SVCI,SVC instructions support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "SIMDI,Single instruction multiple data (SIMD) instructions support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "SI,Saturate instructions support" "Reserved,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x00 28.--31. "SWP_FRAC,Memory system locking support" "Not supported,?..." bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M instructions support" "Not supported,?..." bitfld.long 0x00 20.--23. "SPRI,Synchronization primitive instructions" "Supported,?..." newline bitfld.long 0x00 16.--19. "BI,Barrier instructions support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SMCI,SMC instructions support" "Not supported,?..." bitfld.long 0x00 8.--11. "WBI,Write-back instructions support" "Reserved,Supported,?..." newline bitfld.long 0x00 4.--7. "WSI,With-shift instructions support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. "UI,Unprivileged instructions support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0520++0x00 line.long 0x00 "ID_ISAR5,Instruction Set Attribute Register 5" bitfld.long 0x00 16.--19. "CRC32,CRC32 instructions support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. "SHA2,SHA2 instructions support" "Not supported,?..." bitfld.long 0x00 8.--11. "SHA1,SHA1 instructions support" "Not supported,?..." newline bitfld.long 0x00 4.--7. "AES,AES instructions support" "Not supported,?..." bitfld.long 0x00 0.--3. "SEVL,SEVL instructions support" "Reserved,Supported,?..." rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. "PMM,Performance monitor model support" "Reserved,Reserved,Reserved,PMUv3,?..." bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped debug model for M profile processors support" "Not supported,?..." bitfld.long 0x00 16.--19. "TM_MM,Trace model (memory-mapped) support" "Reserved,Supported,?..." newline bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-based trace debug model support" "Not supported,?..." bitfld.long 0x00 0.--3. "CDM_CB,Secure debug model (Coprocessor) support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." rgroup.long c15:0x0000++0x00 line.long 0x00 "MIDR,Main ID Register" hexmask.long.byte 0x00 24.--31. 1. "IMPLEMENTER,Implementer code" bitfld.long 0x00 20.--23. "VARIANT,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 16.--19. "ARCHITECTURE,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme" hexmask.long.word 0x00 4.--15. 1. "PARTNUM,Primary part number" newline bitfld.long 0x00 0.--3. "REVISION,Revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c15:0x0700++0x00 line.long 0x00 "MIDR,Main ID Register (Alias)" hexmask.long.byte 0x00 24.--31. 1. "IMPLEMENTER,Implementer code" bitfld.long 0x00 20.--23. "VARIANT,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 16.--19. "ARCHITECTURE,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme" hexmask.long.word 0x00 4.--15. 1. "PARTNUM,Primary part number" newline bitfld.long 0x00 0.--3. "REVISION,Revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c15:0x0200++0x00 line.long 0x00 "TCMTR,TCM Type Register" bitfld.long 0x00 29.--31. "TCMS,TCM implemented" "No TCMs,Reserved,Reserved,Reserved,1 TCMs,?..." bitfld.long 0x00 2. "CTCM,CTCM implemented with non zero size" "Not implemented,Implemented" bitfld.long 0x00 1. "BTCM,BTCM implemented with non zero size" "Not implemented,Implemented" newline bitfld.long 0x00 0. "ATCM,ATCM implemented with non zero size" "Not implemented,Implemented" rgroup.long c15:0x0300++0x00 line.long 0x00 "TLBTR,TLB Type Register" rgroup.long c15:0x0500++0x00 line.long 0x00 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 30. "U,Single core system as distinct from core 0 in a cluster" "Part of a cluster,?..." bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..." newline hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. The least significant affinity field for this PE in the system" hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. The intermediate affinity level field for this PE in the system" hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. The most significant affinity level field for this PE in the system" rgroup.long c15:0x0600++0x00 line.long 0x00 "REVIDR,Revision ID Register" hexmask.long.word 0x00 0.--11. 1. "IDNUMBER,Implementation-specific revision information" rgroup.long c15:0x1700++0x00 line.long 0x00 "AIDR,Auxiliary ID Register" tree.end tree "System Control and Configuration" group.long c15:0x0001++0x00 line.long 0x00 "SCTLR,System Control Register" bitfld.long 0x00 30. "TE,Thumb exception enable" "A32,T32" bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big" rbitfld.long 0x00 21. "FI,Fast interrupts configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 20. "UWXN,Unprivileged write permission implies EL1 Execute Never (XN)" "Not forced,Forced" bitfld.long 0x00 19. "WXN,Write permission implies Execute Never (XN)" "Not forced,Forced" bitfld.long 0x00 18. "NTWE,Do not trap WFE (Wait for Event) instruction" "Trapped,Not trapped" newline bitfld.long 0x00 17. "BR,Background region enable" "Disabled,Enabled" bitfld.long 0x00 16. "NTWI,Do not trap WFI (Wait For Interrupt) instruction" "Trapped,Not trapped" bitfld.long 0x00 12. "I,Instruction cache enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "SED,SETEND instruction disable" "No,Yes" bitfld.long 0x00 7. "ITD,IT instruction disable" "No,Yes" bitfld.long 0x00 5. "CP15BEN,CP15* barrier operations enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "C,Data/Unified cache enable" "Disabled,Enabled" bitfld.long 0x00 1. "A,Alignment fault checking enable" "Disabled,Enabled" bitfld.long 0x00 0. "M,EL1-controlled MPU enable" "Disabled,Enabled" newline group.long c15:0x4001++0x00 line.long 0x00 "HSCTLR,Hypervisor System Control Register" bitfld.long 0x00 30. "TE,Thumb exception enable" "A32,T32" bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.long 0x00 21. "FI,Fast interrupts configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "WXN,Write permission implies Execute Never (XN)" "Not forced,Forced" bitfld.long 0x00 17. "BR,Background region enable" "Disabled,Enabled" bitfld.long 0x00 12. "I,Instruction cache enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "SED,SETEND instruction disable" "No,Yes" bitfld.long 0x00 7. "ITD,IT instruction disable" "No,Yes" bitfld.long 0x00 5. "CP15BEN,CP15* barrier operations enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "C,Data cache enable" "Disabled,Enabled" bitfld.long 0x00 1. "A,Alignment fault checking enable" "Disabled,Enabled" bitfld.long 0x00 0. "M,EL2-controlled MPU enable" "Disabled,Enabled" newline group.long c15:0x0201++0x00 line.long 0x00 "CPACR,Architectural Feature Access Control Register" bitfld.long 0x00 31. "ASEDIS,Disable advanced SIMD extension functionality" "No,Yes" bitfld.long 0x00 22.--23. "CP11,Coprocessor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x00 20.--21. "CP10,Coprocessor access control" "Denied,Privileged,Reserved,Full" rgroup.long c15:0x0101++0x00 line.long 0x00 "ACTLR,Auxiliary Control Register" rgroup.long c15:0x0301++0x00 line.long 0x00 "ACTLR2,Auxiliary Control Register 2" rgroup.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" group.long c15:0x000B++0x00 line.long 0x00 "IMP_SLAVEPCTLR,Slave Port Control Register" bitfld.long 0x00 0.--1. "TCMACCLVL,Indicates the privilege level required for the AXIS to access the TCM" "Denied,Privileged,Reserved,Full" group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "VBA,Vector base address" rgroup.long c15:0x010C++0x00 line.long 0x00 "RVBAR,Reset Vector Base Address Register" hexmask.long 0x00 1.--31. 0x02 "ADDR,Reset address" rgroup.long c15:0x001C++0x00 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending" bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending" group.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" bitfld.long 0x00 2.--4. "PORT,Memory or port that caused the fault" "AXIM,Flash interface,LLPP,Internal interface,ATCM,BTCM,CTCM,Overlap" bitfld.long 0x00 0.--1. "TYPE,Fault type" "Other error,External bus control,TCM/cache/bus data,Bus timeout" group.long c15:0x0115++0x00 line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register" bitfld.long 0x00 2.--4. "PORT,Memory or port that caused the fault" "AXIM,Flash interface,LLPP,Reserved,ATCM,BTCM,CTCM,Overlap" bitfld.long 0x00 0.--1. "TYPE,Fault type" "Other error,External bus control,TCM/cache/bus data,Bus timeout" group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. "CM,Cache maintenance fault" "No fault,Fault" bitfld.long 0x00 12. "EXT,External abort qualifier" "DECERR,SLVERR" newline bitfld.long 0x00 11. "WNR,Access caused an abort type" "Read,Write" bitfld.long 0x00 0.--5. "STATUS,Fault status bits" "Reserved,Reserved,Reserved,Reserved,Translation fault/0th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault/0th level,Reserved,Reserved,Reserved,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,LDREX or STREX,?..." group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. "EXT,External abort qualifier" "DECERR,SLVERR" bitfld.long 0x00 0.--5. "STATUS,Fault status bits" "Reserved,Reserved,Reserved,Reserved,Translation fault/0th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault/0th level,Reserved,Reserved,Reserved,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" rgroup.long c15:0x000D++0x00 line.long 0x00 "FCSEIDR,FCSE PID Register" rgroup.long c15:0x103F++0x00 line.long 0x00 "IMP_CBAR,Configuration Base Address Register" hexmask.long.word 0x00 21.--31. 0x20 "PERIPHBASE,Upper bits of base physical address of memory-mapped peripherals" group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,Thread Pointer ID Register Unprivileged Read-Write" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,Thread Pointer ID Register Unprivileged Read-Only" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,Thread Pointer ID Register Privileged Read-Write" tree "System Instructions" wgroup.long c15:0x0017++0x00 line.long 0x00 "ICIALLUIS,ICIALLUIS" wgroup.long c15:0x0617++0x00 line.long 0x00 "BPIALLIS,BPIALLIS" wgroup.long c15:0x0057++0x00 line.long 0x00 "ICIALLU,ICIALLU" wgroup.long c15:0x0157++0x00 line.long 0x00 "ICIMVAU,ICIMVAU" wgroup.long c15:0x0457++0x00 line.long 0x00 "CP15ISB,CP15ISB" wgroup.long c15:0x0657++0x00 line.long 0x00 "BPIALL,BPIALL" wgroup.long c15:0x0757++0x00 line.long 0x00 "BPIMVA,BPIMVA" wgroup.long c15:0x0167++0x00 line.long 0x00 "DCIMVAC,DCIMVAC" wgroup.long c15:0x0267++0x00 line.long 0x00 "DCISW,DCISW" wgroup.long c15:0x0087++0x00 line.long 0x00 "ATS1CPR,ATS1CPR" wgroup.long c15:0x0187++0x00 line.long 0x00 "ATS1CPW,ATS1CPW" wgroup.long c15:0x0287++0x00 line.long 0x00 "ATS1CUR,ATS1CUR" wgroup.long c15:0x0387++0x00 line.long 0x00 "ATS1CUW,ATS1CUW" wgroup.long c15:0x0487++0x00 line.long 0x00 "ATS12NSOPR,ATS12NSOPR" wgroup.long c15:0x0587++0x00 line.long 0x00 "ATS12NSOPW,ATS12NSOPW" wgroup.long c15:0x0687++0x00 line.long 0x00 "ATS12NSOUR,ATS12NSOUR" wgroup.long c15:0x0787++0x00 line.long 0x00 "ATS12NSOUW,ATS12NSOUW" wgroup.long c15:0x01A7++0x00 line.long 0x00 "DCCMVAC,DCCMVAC" wgroup.long c15:0x02A7++0x00 line.long 0x00 "DCCSW,DCCSW" wgroup.long c15:0x04A7++0x00 line.long 0x00 "CP15DSB,CP15DSB" wgroup.long c15:0x05A7++0x00 line.long 0x00 "CP15DMB,CP15DMB" wgroup.long c15:0x01B7++0x00 line.long 0x00 "DCCMVAU,DCCMVAU" wgroup.long c15:0x01E7++0x00 line.long 0x00 "DCCIMVAC,DCCIMVAC" wgroup.long c15:0x02E7++0x00 line.long 0x00 "DCCISW,DCCISW" wgroup.long c15:0x4087++0x00 line.long 0x00 "ATS1HR,ATS1HR" wgroup.long c15:0x4187++0x00 line.long 0x00 "ATS1HW,ATS1HW" tree.end tree.end tree "MPU Control and Configuration" group.long c15:0x0001++0x00 line.long 0x00 "SCTLR,System Control Register" bitfld.long 0x00 30. "TE,Thumb exception enable" "A32,T32" bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big" rbitfld.long 0x00 21. "FI,Fast interrupts configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 20. "UWXN,Unprivileged write permission implies EL1 Execute Never (XN)" "Not forced,Forced" bitfld.long 0x00 19. "WXN,Write permission implies Execute Never (XN)" "Not forced,Forced" bitfld.long 0x00 18. "NTWE,Do not trap WFE (Wait for Event) instruction" "Trapped,Not trapped" newline bitfld.long 0x00 17. "BR,Background region enable" "Disabled,Enabled" bitfld.long 0x00 16. "NTWI,Do not trap WFI (Wait For Interrupt) instruction" "Trapped,Not trapped" bitfld.long 0x00 12. "I,Instruction cache enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "SED,SETEND instruction disable" "No,Yes" bitfld.long 0x00 7. "ITD,IT instruction disable" "No,Yes" bitfld.long 0x00 5. "CP15BEN,CP15* barrier operations enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "C,Data/Unified cache enable" "Disabled,Enabled" bitfld.long 0x00 1. "A,Alignment fault checking enable" "Disabled,Enabled" bitfld.long 0x00 0. "M,EL1-controlled MPU enable" "Disabled,Enabled" newline group.long c15:0x4001++0x00 line.long 0x00 "HSCTLR,Hypervisor System Control Register" bitfld.long 0x00 30. "TE,Thumb exception enable" "A32,T32" bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.long 0x00 21. "FI,Fast interrupts configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "WXN,Write permission implies Execute Never (XN)" "Not forced,Forced" bitfld.long 0x00 17. "BR,Background region enable" "Disabled,Enabled" bitfld.long 0x00 12. "I,Instruction cache enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "SED,SETEND instruction disable" "No,Yes" bitfld.long 0x00 7. "ITD,IT instruction disable" "No,Yes" bitfld.long 0x00 5. "CP15BEN,CP15* barrier operations enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "C,Data cache enable" "Disabled,Enabled" bitfld.long 0x00 1. "A,Alignment fault checking enable" "Disabled,Enabled" bitfld.long 0x00 0. "M,EL2-controlled MPU enable" "Disabled,Enabled" newline if (((per.l(c15:0x10070))&0x1)==0x0) group.quad c15:0x10070++0x01 line.quad 0x00 "PAR,Physical Address Register" hexmask.quad.byte 0x00 56.--63. 1. "ATTR,Memory attributes for the returned PA" hexmask.quad.long 0x00 12.--31. 0x1000 "PA,Physical address" newline bitfld.quad 0x00 9. "NS,Non-secure" "Reserved,Yes" bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer shareable,Inner shareable" newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" else group.quad c15:0x10070++0x01 line.quad 0x00 "PAR,Physical Address Register" bitfld.quad 0x00 9. "FSTAGE,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2" bitfld.quad 0x00 8. "S2WLK,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,?..." newline bitfld.quad 0x00 1.--6. "FST,Fault Status Field" "Reserved,Reserved,Reserved,Reserved,Translation fault/0th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault/0th level,Reserved,Reserved,Reserved,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Unsupported Exclusive access,?..." newline bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted" endif tree.open "Memory Attribute Indirection Registers" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" group.long c15:0x002A++0x00 line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" group.long c15:0x012A++0x00 line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" rgroup.long c15:0x003A++0x00 line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" rgroup.long c15:0x013A++0x00 line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" rgroup.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0" rgroup.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1" tree.end newline group.long c15:0x010D++0x00 line.long 0x00 "CONTEXTIDR,Context ID Register" group.long c15:(0x0019+0x0)++0x00 line.long 0x00 "IMP_ATCMREGIONR,TCM Region Register A" hexmask.long 0x00 13.--31. 0x2000 "BASEADDRESS,TCM base address" bitfld.long 0x00 8. "WAITSTATES,Wait states for TCM accesses" "0,1" newline bitfld.long 0x00 2.--6. "SIZE,TCM size" "No TCM,Reserved,Reserved,Reserved,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,?..." bitfld.long 0x00 1. "ENABLEEL2,Enable TCM at EL2" "Disabled,Enabled" newline bitfld.long 0x00 0. "ENABLEEL10,Enable TCM at EL1 and EL0" "Disabled,Enabled" group.long c15:(0x0019+0x100)++0x00 line.long 0x00 "IMP_BTCMREGIONR,TCM Region Register B" hexmask.long 0x00 13.--31. 0x2000 "BASEADDRESS,TCM base address" bitfld.long 0x00 8. "WAITSTATES,Wait states for TCM accesses" "0,1" newline bitfld.long 0x00 2.--6. "SIZE,TCM size" "No TCM,Reserved,Reserved,Reserved,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,?..." bitfld.long 0x00 1. "ENABLEEL2,Enable TCM at EL2" "Disabled,Enabled" newline bitfld.long 0x00 0. "ENABLEEL10,Enable TCM at EL1 and EL0" "Disabled,Enabled" group.long c15:(0x0019+0x200)++0x00 line.long 0x00 "IMP_CTCMREGIONR,TCM Region Register C" hexmask.long 0x00 13.--31. 0x2000 "BASEADDRESS,TCM base address" bitfld.long 0x00 8. "WAITSTATES,Wait states for TCM accesses" "0,1" newline bitfld.long 0x00 2.--6. "SIZE,TCM size" "No TCM,Reserved,Reserved,Reserved,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,?..." bitfld.long 0x00 1. "ENABLEEL2,Enable TCM at EL2" "Disabled,Enabled" newline bitfld.long 0x00 0. "ENABLEEL10,Enable TCM at EL1 and EL0" "Disabled,Enabled" group.long c15:0x1219++0x00 line.long 0x00 "IMP_MEMPROTCTLR,Memory Protection Control Register" rbitfld.long 0x00 5. "FLASHPROTIMP,Flash protection implemented" "Not implemented,Implemented" rbitfld.long 0x00 4. "RAMPROTIMP,RAM protection implemented" "Not implemented,Implemented" newline bitfld.long 0x00 1. "FLASHPROTEN,Flash interface protection enable" "Disabled,Enabled" bitfld.long 0x00 0. "RAMPROTEN,TCM and L1 cache RAM protection enable" "Disabled,Enabled" group.long c15:0x000F++0x00 line.long 0x00 "IMP_PERIPHPREGIONR,Peripheral Port Region Register" hexmask.long.tbyte 0x00 12.--31. 0x10 "BASEADDRESS,Peripheral port region base address" bitfld.long 0x00 2.--6. "SIZE,Peripheral port region size" "No peripheral port,Reserved,Reserved,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,16 MB,128 MB,?..." newline bitfld.long 0x00 1. "ENABLEEL2,Enable peripheral port at EL2" "Disabled,Enabled" bitfld.long 0x00 0. "ENABLEEL10,Enable peripheral port at EL1 and EL0" "Disabled,Enabled" group.long c15:0x010F++0x00 line.long 0x00 "IMP_FLASHIFREGIONR,Flash Interface Region Register" hexmask.long.byte 0x00 27.--31. 0x08 "BASEADDRESS,Peripheral port region base address" bitfld.long 0x00 2.--6. "SIZE,Flash interface region size" "No flash,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,128 MB,?..." newline bitfld.long 0x00 0. "ENABLE,Enable the flash interface" "Disabled,Enabled" rgroup.long c15:0x002F++0x00 line.long 0x00 "IMP_BUILDOPTR,Build Options Register" bitfld.long 0x00 30.--31. "LOCK_STEP,DCLS functionality implemented" "Not implemented,DCLS configuration,Split/lock configuration,?..." bitfld.long 0x00 28.--29. "BUS_PROTECTION,Bus protection scheme implemented (signal integrity/interconnect protection)" "Not implemented,Implemented/Not implemented,Implemented,Not implemented/Implemented" newline bitfld.long 0x00 26.--27. "FLASH_DATA_ECC_SCHEME,Flash memory interface data ECC chunk size" "Reserved,64 bit,128 bit,?..." bitfld.long 0x00 20.--23. "AXIS_ID_WIDTH,Width of AXIS interface ID signals" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. "PMC,Support for on-line MBIST" "Not integrated,Integrated" bitfld.long 0x00 8. "NUM_GIC_EXT_DEV,Number of external device interfaces to the GIC" "0,1" newline bitfld.long 0x00 0.--3. "NUM_CORES,Number of cores in the processor" "0,1,2,3,?..." rgroup.long c15:0x072F++0x00 line.long 0x00 "IMP_PINOPTR,Pin Options Register" hexmask.long.byte 0x00 24.--31. 1. "CFGAXISTCMBASEADDR,Value of the CFGAXISTCMBASEADDR signal" bitfld.long 0x00 23. "CFGSLSPLIT,Value of the CFGSLSPLIT signal" "0,1" newline bitfld.long 0x00 21.--22. "CFGCLUSTERUTID,Value of the CFGCLUSTERUTID signal" "0,1,2,3" bitfld.long 0x00 18. "CFGFLASHPROTEN,Value of the CFGFLASHPROTEN signal" "0,1" newline bitfld.long 0x00 17. "CFGRAMPROTEN,Value of the CFGRAMPROTEN signal" "0,1" bitfld.long 0x00 16. "CFGINITREG,Value of the CFGINITREG signal" "0,1" newline bitfld.long 0x00 15. "CFGMRPEN,Value of the CFGMRPEN signal" "0,1" bitfld.long 0x00 7. "CFGSAFETYBOOTX,Value of the CFGSAFETYBOOTx signal" "0,1" newline bitfld.long 0x00 6. "CFGL1CACHEINVDISX,Value of the CFGL1CACHEINVDISx signal" "0,1" bitfld.long 0x00 5. "CFGENDIANESSX,Value of the CFGENDIANESSx signal" "0,1" newline bitfld.long 0x00 4. "CFGTHUMBEXCEPTIONSX,Value of the CFGTHUMBEXCEPTIONSx signal" "0,1" bitfld.long 0x00 2. "CFGFLASHENX,Value of the CFGFLASHENx signal" "0,1" newline bitfld.long 0x00 0. "CFGTCMBOOTX,Value of the CFGTCMBOOTx signal" "0,1" group.long c15:0x113F++0x00 line.long 0x00 "IMP_QOSR,Quality Of Service Register" bitfld.long 0x00 8.--11. "AWQOS[3:0],QoS identifier sent on the write address channel for each write transaction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "ARQOS[3:0],QoS identifier sent on the read address channel for each read transaction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long c15:0x123F++0x00 line.long 0x00 "IMP_BUSTIMEOUTR,Bus Timeout Register" hexmask.long.byte 0x00 24.--31. 1. "MAXCYCLESBY16FLASH,Flash interface timeout value in cycles divided by 16" hexmask.long.byte 0x00 16.--23. 1. "MAXCYCLESBY16LLPP,LLPP timeout value in cycles divided by 16" newline hexmask.long.byte 0x00 8.--15. 1. "MAXCYCLESBY16AXIM,AXIM interface timeout value in cycles divided by 16" bitfld.long 0x00 6. "ABORTFLASH,Abort flash access" "Not aborted,Aborted" newline bitfld.long 0x00 5. "ABORTLLPP,Abort LLPP access" "Not aborted,Aborted" bitfld.long 0x00 4. "ABORTAXIM,Abort AXIM access" "Not aborted,Aborted" newline bitfld.long 0x00 2. "ENABLEFLASH,Timeout counter enable for flash interface" "Disabled,Enabled" bitfld.long 0x00 1. "ENABLELLPP,Timeout counter enable for LLPP" "Disabled,Enabled" newline bitfld.long 0x00 0. "ENABLEAXIM,Timeout counter enable for AXIM interface" "Disabled,Enabled" group.long c15:0x143F++0x00 line.long 0x00 "IMP_INTMONR,Interrupt Monitoring Register" hexmask.long.byte 0x00 8.--15. 1. "MAXCYCLESBY16,Maximum count divided by 16" bitfld.long 0x00 4. "MODE,Operation mode of the counter" "Watchdog,Maximum value monitor" newline bitfld.long 0x00 2. "ENABLESER,Enable counting of cycles in which physical system errors are masked" "Disabled,Enabled" bitfld.long 0x00 1. "ENABLEIRQ,Enable counting of physical interrupts that cannot be taken" "Disabled,Enabled" newline bitfld.long 0x00 0. "ENABLEFIQ,Enable counting of fast interrupts that cannot be taken" "Disabled,Enabled" group.long c15:(0x200F+0x0)++0x00 line.long 0x00 "IMP_ICERR0,Instruction Cache Error Record Register 0" hexmask.long.byte 0x00 24.--31. 1. "RAMID,RAM bank" hexmask.long.byte 0x00 4.--10. 1. "INDEX,Instruction cache index" newline bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid" group.long c15:(0x200F+0x100)++0x00 line.long 0x00 "IMP_ICERR1,Instruction Cache Error Record Register 1" hexmask.long.byte 0x00 24.--31. 1. "RAMID,RAM bank" hexmask.long.byte 0x00 4.--10. 1. "INDEX,Instruction cache index" newline bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid" group.long c15:(0x201F+0x0)++0x00 line.long 0x00 "IMP_DCERR0,Data Cache Error Record Register 0" hexmask.long.word 0x00 20.--31. 1. "RAMID,RAM bank" hexmask.long.byte 0x00 4.--10. 1. "INDEX,Data cache index" newline bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid" group.long c15:(0x201F+0x100)++0x00 line.long 0x00 "IMP_DCERR1,Data Cache Error Record Register 1" hexmask.long.word 0x00 20.--31. 1. "RAMID,RAM bank" hexmask.long.byte 0x00 4.--10. 1. "INDEX,Data cache index" newline bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid" group.long c15:(0x202F+0x0)++0x00 line.long 0x00 "IMP_TCMERR0,TCM Error Record Register 0" hexmask.long.byte 0x00 24.--31. 1. "RAMID,RAM bank" hexmask.long.tbyte 0x00 4.--20. 1. "INDEX,Bits [19:3] of the access address" newline bitfld.long 0x00 1. "FATAL,Fatal error" "Correctable,Fatal" bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid" group.long c15:(0x202F+0x100)++0x00 line.long 0x00 "IMP_TCMERR1,TCM Error Record Register 1" hexmask.long.byte 0x00 24.--31. 1. "RAMID,RAM bank" hexmask.long.tbyte 0x00 4.--20. 1. "INDEX,Bits [19:3] of the access address" newline bitfld.long 0x00 1. "FATAL,Fatal error" "Correctable,Fatal" bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid" rgroup.long c15:(0x222F+0x0)++0x00 line.long 0x00 "IMP_TCMSYNDR0,TCM Syndrome Register 0" hexmask.long.byte 0x00 8.--14. 1. "BANK1,Syndrome for a bank 1 error" hexmask.long.byte 0x00 0.--7. 1. "BANK0,Syndrome for a bank 0 error" rgroup.long c15:(0x222F+0x100)++0x00 line.long 0x00 "IMP_TCMSYNDR1,TCM Syndrome Register 1" hexmask.long.byte 0x00 8.--14. 1. "BANK1,Syndrome for a bank 1 error" hexmask.long.byte 0x00 0.--7. 1. "BANK0,Syndrome for a bank 0 error" group.long c15:(0x203F+0x0)++0x00 line.long 0x00 "IMP_FLASHERR0,Flash Error Record Register 0" hexmask.long 0x00 4.--28. 1. "INDEX,Bits [25:1] of the access address" bitfld.long 0x00 2. "LATE,Late error" "Not late,Late" newline bitfld.long 0x00 1. "FATAL,Fatal error" "Correctable,Fatal" bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid" group.long c15:(0x203F+0x100)++0x00 line.long 0x00 "IMP_FLASHERR1,Flash Error Record Register 1" hexmask.long 0x00 4.--28. 1. "INDEX,Bits [25:1] of the access address" bitfld.long 0x00 2. "LATE,Late error" "Not late,Late" newline bitfld.long 0x00 1. "FATAL,Fatal error" "Correctable,Fatal" bitfld.long 0x00 0. "VALID,Register contents are valid" "Not valid,Valid" rgroup.long c15:0x400F++0x00 line.long 0x00 "IMP_TESTR0,Test Register 0" bitfld.long 0x00 5. "VSEI,Virtual system error interrupt signal value" "0,1" bitfld.long 0x00 4. "SEI,System error interrupt signal value" "0,1" newline bitfld.long 0x00 3. "VIRQ,Virtual IRQ interrupt signal value" "0,1" bitfld.long 0x00 2. "IRQ,IRQ interrupt signal value" "0,1" newline bitfld.long 0x00 1. "VFIQ,Virtual FIQ interrupt signal value" "0,1" bitfld.long 0x00 0. "FIQ,FIQ interrupt signal value" "0,1" wgroup.long c15:0x410F++0x00 line.long 0x00 "IMP_TESTR1,Test Register 1" tree.end tree "Memory Protection Unit EL1" group.long c15:0x0001++0x00 line.long 0x00 "SCTLR,System Control Register" bitfld.long 0x00 30. "TE,Thumb exception enable" "A32,T32" bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big" rbitfld.long 0x00 21. "FI,Fast interrupts configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 20. "UWXN,Unprivileged write permission implies EL1 Execute Never (XN)" "Not forced,Forced" bitfld.long 0x00 19. "WXN,Write permission implies Execute Never (XN)" "Not forced,Forced" bitfld.long 0x00 18. "NTWE,Do not trap WFE (Wait for Event) instruction" "Trapped,Not trapped" newline bitfld.long 0x00 17. "BR,Background region enable" "Disabled,Enabled" bitfld.long 0x00 16. "NTWI,Do not trap WFI (Wait For Interrupt) instruction" "Trapped,Not trapped" bitfld.long 0x00 12. "I,Instruction cache enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "SED,SETEND instruction disable" "No,Yes" bitfld.long 0x00 7. "ITD,IT instruction disable" "No,Yes" bitfld.long 0x00 5. "CP15BEN,CP15* barrier operations enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "C,Data/Unified cache enable" "Disabled,Enabled" bitfld.long 0x00 1. "A,Alignment fault checking enable" "Disabled,Enabled" bitfld.long 0x00 0. "M,EL1-controlled MPU enable" "Disabled,Enabled" newline rgroup.long c15:0x400++0x00 line.long 0x00 "MPUIR,MPU Type Register" bitfld.long 0x00 8.--15. 1. "DREGION,Number of programmable memory regions" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16,Reserved,Reserved,Reserved,20,Reserved,Reserved,Reserved,24,?..." bitfld.long 0x00 0. "NU,Not unified MPU" "Unified,?..." if (((per.l(c15:0x400))&0xFF00)>=0x1800) group.long c15:0x0126++0x00 line.long 0x00 "PRSELR,Protection Region Selection Register" bitfld.long 0x00 0.--4. "REGION,Indicates the memory region accessed by PRBAR and PRBAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." elif (((per.l(c15:0x400))&0xFF00)>=0x1400) group.long c15:0x0126++0x00 line.long 0x00 "PRSELR,Protection Region Selection Register" bitfld.long 0x00 0.--4. "REGION,Indicates the memory region accessed by PRBAR and PRBAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,?..." elif (((per.l(c15:0x400))&0xFF00)>=0x1000) group.long c15:0x0126++0x00 line.long 0x00 "PRSELR,Protection Region Selection Register" bitfld.long 0x00 0.--3. "REGION,Indicates the memory region accessed by PRBAR and PRBAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hgroup.long c15:0x0126++0x00 hide.long 0x00 "PRSELR,Protection Region Selection Register" endif group.long c15:0x0036++0x00 line.long 0x00 "PRBAR,Protection Region Base Address Register" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:0x0136++0x00 line.long 0x00 "PRLAR,Protection Region Limit Address Register" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" tree "MPU regions" if (((per.l(c15:0x400))&0xFF00)>=0x1000) group.long c15:(0x0086+0x0)++0x00 "Region 0" line.long 0x00 "PRBAR0,Protection Region Base Address Register 0" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0186+0x0)++0x00 line.long 0x00 "PRLAR0,Protection Region Limit Address Register 0" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0486+0x0)++0x00 "Region 1" line.long 0x00 "PRBAR1,Protection Region Base Address Register 1" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0586+0x0)++0x00 line.long 0x00 "PRLAR1,Protection Region Limit Address Register 1" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0086+0x10)++0x00 "Region 2" line.long 0x00 "PRBAR2,Protection Region Base Address Register 2" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0186+0x10)++0x00 line.long 0x00 "PRLAR2,Protection Region Limit Address Register 2" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0486+0x10)++0x00 "Region 3" line.long 0x00 "PRBAR3,Protection Region Base Address Register 3" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0586+0x10)++0x00 line.long 0x00 "PRLAR3,Protection Region Limit Address Register 3" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0086+0x20)++0x00 "Region 4" line.long 0x00 "PRBAR4,Protection Region Base Address Register 4" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0186+0x20)++0x00 line.long 0x00 "PRLAR4,Protection Region Limit Address Register 4" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0486+0x20)++0x00 "Region 5" line.long 0x00 "PRBAR5,Protection Region Base Address Register 5" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0586+0x20)++0x00 line.long 0x00 "PRLAR5,Protection Region Limit Address Register 5" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0086+0x30)++0x00 "Region 6" line.long 0x00 "PRBAR6,Protection Region Base Address Register 6" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0186+0x30)++0x00 line.long 0x00 "PRLAR6,Protection Region Limit Address Register 6" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0486+0x30)++0x00 "Region 7" line.long 0x00 "PRBAR7,Protection Region Base Address Register 7" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0586+0x30)++0x00 line.long 0x00 "PRLAR7,Protection Region Limit Address Register 7" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0086+0x40)++0x00 "Region 8" line.long 0x00 "PRBAR8,Protection Region Base Address Register 8" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0186+0x40)++0x00 line.long 0x00 "PRLAR8,Protection Region Limit Address Register 8" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0486+0x40)++0x00 "Region 9" line.long 0x00 "PRBAR9,Protection Region Base Address Register 9" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0586+0x40)++0x00 line.long 0x00 "PRLAR9,Protection Region Limit Address Register 9" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0086+0x50)++0x00 "Region 10" line.long 0x00 "PRBAR10,Protection Region Base Address Register 10" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0186+0x50)++0x00 line.long 0x00 "PRLAR10,Protection Region Limit Address Register 10" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0486+0x50)++0x00 "Region 11" line.long 0x00 "PRBAR11,Protection Region Base Address Register 11" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0586+0x50)++0x00 line.long 0x00 "PRLAR11,Protection Region Limit Address Register 11" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0086+0x60)++0x00 "Region 12" line.long 0x00 "PRBAR12,Protection Region Base Address Register 12" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0186+0x60)++0x00 line.long 0x00 "PRLAR12,Protection Region Limit Address Register 12" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0486+0x60)++0x00 "Region 13" line.long 0x00 "PRBAR13,Protection Region Base Address Register 13" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0586+0x60)++0x00 line.long 0x00 "PRLAR13,Protection Region Limit Address Register 13" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0086+0x70)++0x00 "Region 14" line.long 0x00 "PRBAR14,Protection Region Base Address Register 14" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0186+0x70)++0x00 line.long 0x00 "PRLAR14,Protection Region Limit Address Register 14" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x0486+0x70)++0x00 "Region 15" line.long 0x00 "PRBAR15,Protection Region Base Address Register 15" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x0586+0x70)++0x00 line.long 0x00 "PRLAR15,Protection Region Limit Address Register 15" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" else hgroup.long c15:(0x0086+0x0)++0x00 "Region 0 (not implemented)" hide.long 0x00 "PRBAR0,Protection Region Base Address Register 0" newline hgroup.long c15:(0x0186+0x0)++0x00 hide.long 0x00 "PRLAR0,Protection Region Limit Address Register 0" hgroup.long c15:(0x0486+0x0)++0x00 "Region 1 (not implemented)" hide.long 0x00 "PRBAR1,Protection Region Base Address Register 1" newline hgroup.long c15:(0x0586+0x0)++0x00 hide.long 0x00 "PRLAR1,Protection Region Limit Address Register 1" hgroup.long c15:(0x0086+0x10)++0x00 "Region 2 (not implemented)" hide.long 0x00 "PRBAR2,Protection Region Base Address Register 2" newline hgroup.long c15:(0x0186+0x10)++0x00 hide.long 0x00 "PRLAR2,Protection Region Limit Address Register 2" hgroup.long c15:(0x0486+0x10)++0x00 "Region 3 (not implemented)" hide.long 0x00 "PRBAR3,Protection Region Base Address Register 3" newline hgroup.long c15:(0x0586+0x10)++0x00 hide.long 0x00 "PRLAR3,Protection Region Limit Address Register 3" hgroup.long c15:(0x0086+0x20)++0x00 "Region 4 (not implemented)" hide.long 0x00 "PRBAR4,Protection Region Base Address Register 4" newline hgroup.long c15:(0x0186+0x20)++0x00 hide.long 0x00 "PRLAR4,Protection Region Limit Address Register 4" hgroup.long c15:(0x0486+0x20)++0x00 "Region 5 (not implemented)" hide.long 0x00 "PRBAR5,Protection Region Base Address Register 5" newline hgroup.long c15:(0x0586+0x20)++0x00 hide.long 0x00 "PRLAR5,Protection Region Limit Address Register 5" hgroup.long c15:(0x0086+0x30)++0x00 "Region 6 (not implemented)" hide.long 0x00 "PRBAR6,Protection Region Base Address Register 6" newline hgroup.long c15:(0x0186+0x30)++0x00 hide.long 0x00 "PRLAR6,Protection Region Limit Address Register 6" hgroup.long c15:(0x0486+0x30)++0x00 "Region 7 (not implemented)" hide.long 0x00 "PRBAR7,Protection Region Base Address Register 7" newline hgroup.long c15:(0x0586+0x30)++0x00 hide.long 0x00 "PRLAR7,Protection Region Limit Address Register 7" hgroup.long c15:(0x0086+0x40)++0x00 "Region 8 (not implemented)" hide.long 0x00 "PRBAR8,Protection Region Base Address Register 8" newline hgroup.long c15:(0x0186+0x40)++0x00 hide.long 0x00 "PRLAR8,Protection Region Limit Address Register 8" hgroup.long c15:(0x0486+0x40)++0x00 "Region 9 (not implemented)" hide.long 0x00 "PRBAR9,Protection Region Base Address Register 9" newline hgroup.long c15:(0x0586+0x40)++0x00 hide.long 0x00 "PRLAR9,Protection Region Limit Address Register 9" hgroup.long c15:(0x0086+0x50)++0x00 "Region 10 (not implemented)" hide.long 0x00 "PRBAR10,Protection Region Base Address Register 10" newline hgroup.long c15:(0x0186+0x50)++0x00 hide.long 0x00 "PRLAR10,Protection Region Limit Address Register 10" hgroup.long c15:(0x0486+0x50)++0x00 "Region 11 (not implemented)" hide.long 0x00 "PRBAR11,Protection Region Base Address Register 11" newline hgroup.long c15:(0x0586+0x50)++0x00 hide.long 0x00 "PRLAR11,Protection Region Limit Address Register 11" hgroup.long c15:(0x0086+0x60)++0x00 "Region 12 (not implemented)" hide.long 0x00 "PRBAR12,Protection Region Base Address Register 12" newline hgroup.long c15:(0x0186+0x60)++0x00 hide.long 0x00 "PRLAR12,Protection Region Limit Address Register 12" hgroup.long c15:(0x0486+0x60)++0x00 "Region 13 (not implemented)" hide.long 0x00 "PRBAR13,Protection Region Base Address Register 13" newline hgroup.long c15:(0x0586+0x60)++0x00 hide.long 0x00 "PRLAR13,Protection Region Limit Address Register 13" hgroup.long c15:(0x0086+0x70)++0x00 "Region 14 (not implemented)" hide.long 0x00 "PRBAR14,Protection Region Base Address Register 14" newline hgroup.long c15:(0x0186+0x70)++0x00 hide.long 0x00 "PRLAR14,Protection Region Limit Address Register 14" hgroup.long c15:(0x0486+0x70)++0x00 "Region 15 (not implemented)" hide.long 0x00 "PRBAR15,Protection Region Base Address Register 15" newline hgroup.long c15:(0x0586+0x70)++0x00 hide.long 0x00 "PRLAR15,Protection Region Limit Address Register 15" endif if (((per.l(c15:0x400))&0xFF00)>=0x1400) group.long c15:(0x1086+0x0)++0x00 "Region 16" line.long 0x00 "PRBAR16,Protection Region Base Address Register 16" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x1186+0x0)++0x00 line.long 0x00 "PRLAR16,Protection Region Limit Address Register 16" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x1486+0x0)++0x00 "Region 17" line.long 0x00 "PRBAR17,Protection Region Base Address Register 17" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x1586+0x0)++0x00 line.long 0x00 "PRLAR17,Protection Region Limit Address Register 17" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x1086+0x10)++0x00 "Region 18" line.long 0x00 "PRBAR18,Protection Region Base Address Register 18" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x1186+0x10)++0x00 line.long 0x00 "PRLAR18,Protection Region Limit Address Register 18" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x1486+0x10)++0x00 "Region 19" line.long 0x00 "PRBAR19,Protection Region Base Address Register 19" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x1586+0x10)++0x00 line.long 0x00 "PRLAR19,Protection Region Limit Address Register 19" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" else hgroup.long c15:(0x1086+0x0)++0x00 "Region 16 (not implemented)" hide.long 0x00 "PRBAR16,Protection Region Base Address Register 16" newline hgroup.long c15:(0x1186+0x0)++0x00 hide.long 0x00 "PRLAR16,Protection Region Limit Address Register 16" hgroup.long c15:(0x1486+0x0)++0x00 "Region 17 (not implemented)" hide.long 0x00 "PRBAR17,Protection Region Base Address Register 17" newline hgroup.long c15:(0x1586+0x0)++0x00 hide.long 0x00 "PRLAR17,Protection Region Limit Address Register 17" hgroup.long c15:(0x1086+0x10)++0x00 "Region 18 (not implemented)" hide.long 0x00 "PRBAR18,Protection Region Base Address Register 18" newline hgroup.long c15:(0x1186+0x10)++0x00 hide.long 0x00 "PRLAR18,Protection Region Limit Address Register 18" hgroup.long c15:(0x1486+0x10)++0x00 "Region 19 (not implemented)" hide.long 0x00 "PRBAR19,Protection Region Base Address Register 19" newline hgroup.long c15:(0x1586+0x10)++0x00 hide.long 0x00 "PRLAR19,Protection Region Limit Address Register 19" endif if (((per.l(c15:0x400))&0xFF00)>=0x1800) group.long c15:(0x1086+0x20)++0x00 "Region 20" line.long 0x00 "PRBAR20,Protection Region Base Address Register 20" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x1186+0x20)++0x00 line.long 0x00 "PRLAR20,Protection Region Limit Address Register 20" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x1486+0x20)++0x00 "Region 21" line.long 0x00 "PRBAR21,Protection Region Base Address Register 21" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x1586+0x20)++0x00 line.long 0x00 "PRLAR21,Protection Region Limit Address Register 21" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x1086+0x30)++0x00 "Region 22" line.long 0x00 "PRBAR22,Protection Region Base Address Register 22" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x1186+0x30)++0x00 line.long 0x00 "PRLAR22,Protection Region Limit Address Register 22" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x1486+0x30)++0x00 "Region 23" line.long 0x00 "PRBAR23,Protection Region Base Address Register 23" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access Permission bits" "None/RW,R/W,None/RO,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x1586+0x30)++0x00 line.long 0x00 "PRLAR23,Protection Region Limit Address Register 23" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL1 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" else hgroup.long c15:(0x1086+0x20)++0x00 "Region 20 (not implemented)" hide.long 0x00 "PRBAR20,Protection Region Base Address Register 20" newline hgroup.long c15:(0x1186+0x20)++0x00 hide.long 0x00 "PRLAR20,Protection Region Limit Address Register 20" hgroup.long c15:(0x1486+0x20)++0x00 "Region 21 (not implemented)" hide.long 0x00 "PRBAR21,Protection Region Base Address Register 21" newline hgroup.long c15:(0x1586+0x20)++0x00 hide.long 0x00 "PRLAR21,Protection Region Limit Address Register 21" hgroup.long c15:(0x1086+0x30)++0x00 "Region 22 (not implemented)" hide.long 0x00 "PRBAR22,Protection Region Base Address Register 22" newline hgroup.long c15:(0x1186+0x30)++0x00 hide.long 0x00 "PRLAR22,Protection Region Limit Address Register 22" hgroup.long c15:(0x1486+0x30)++0x00 "Region 23 (not implemented)" hide.long 0x00 "PRBAR23,Protection Region Base Address Register 23" newline hgroup.long c15:(0x1586+0x30)++0x00 hide.long 0x00 "PRLAR23,Protection Region Limit Address Register 23" endif tree.end tree.end tree "Memory Protection Unit EL2" group.long c15:0x4001++0x00 line.long 0x00 "HSCTLR,Hypervisor System Control Register" bitfld.long 0x00 30. "TE,Thumb exception enable" "A32,T32" bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.long 0x00 21. "FI,Fast interrupts configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "WXN,Write permission implies Execute Never (XN)" "Not forced,Forced" bitfld.long 0x00 17. "BR,Background region enable" "Disabled,Enabled" bitfld.long 0x00 12. "I,Instruction cache enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "SED,SETEND instruction disable" "No,Yes" bitfld.long 0x00 7. "ITD,IT instruction disable" "No,Yes" bitfld.long 0x00 5. "CP15BEN,CP15* barrier operations enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "C,Data cache enable" "Disabled,Enabled" bitfld.long 0x00 1. "A,Alignment fault checking enable" "Disabled,Enabled" bitfld.long 0x00 0. "M,EL2-controlled MPU enable" "Disabled,Enabled" newline rgroup.long c15:0x4400++0x00 line.long 0x00 "HMPUIR,Hypervisor MPU Type Register" bitfld.long 0x00 0.--7. 1. "REGION,Identifies the number of implemented regions" "0,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,16,Reserved,Reserved,Reserved,20,Reserved,Reserved,Reserved,24,?..." if (((per.l(c15:0x4400))&0xFF)>=0x18) group.long c15:0x4116++0x00 line.long 0x00 "HPRENR,Hypervisor MPU Region Enable Register" bitfld.long 0x00 23. "EN23,Region enable 23" "Disabled,Enabled" bitfld.long 0x00 22. "EN22,Region enable 22" "Disabled,Enabled" bitfld.long 0x00 21. "EN21,Region enable 21" "Disabled,Enabled" newline bitfld.long 0x00 20. "EN20,Region enable 20" "Disabled,Enabled" bitfld.long 0x00 19. "EN19,Region enable 19" "Disabled,Enabled" bitfld.long 0x00 18. "EN18,Region enable 18" "Disabled,Enabled" newline bitfld.long 0x00 17. "EN17,Region enable 17" "Disabled,Enabled" bitfld.long 0x00 16. "EN16,Region enable 16" "Disabled,Enabled" bitfld.long 0x00 15. "EN15,Region enable 15" "Disabled,Enabled" newline bitfld.long 0x00 14. "EN14,Region enable 14" "Disabled,Enabled" bitfld.long 0x00 13. "EN13,Region enable 13" "Disabled,Enabled" bitfld.long 0x00 12. "EN12,Region enable 12" "Disabled,Enabled" newline bitfld.long 0x00 11. "EN11,Region enable 11" "Disabled,Enabled" bitfld.long 0x00 10. "EN10,Region enable 10" "Disabled,Enabled" bitfld.long 0x00 9. "EN9,Region enable 9" "Disabled,Enabled" newline bitfld.long 0x00 8. "EN8,Region enable 8" "Disabled,Enabled" bitfld.long 0x00 7. "EN7,Region enable 7" "Disabled,Enabled" bitfld.long 0x00 6. "EN6,Region enable 6" "Disabled,Enabled" newline bitfld.long 0x00 5. "EN5,Region enable 5" "Disabled,Enabled" bitfld.long 0x00 4. "EN4,Region enable 4" "Disabled,Enabled" bitfld.long 0x00 3. "EN3,Region enable 3" "Disabled,Enabled" newline bitfld.long 0x00 2. "EN2,Region enable 2" "Disabled,Enabled" bitfld.long 0x00 1. "EN1,Region enable 1" "Disabled,Enabled" bitfld.long 0x00 0. "EN0,Region enable 0" "Disabled,Enabled" elif (((per.l(c15:0x4400))&0xFF)>=0x14) group.long c15:0x4116++0x00 line.long 0x00 "HPRENR,Hypervisor MPU Region Enable Register" bitfld.long 0x00 19. "EN19,Region enable 19" "Disabled,Enabled" bitfld.long 0x00 18. "EN18,Region enable 18" "Disabled,Enabled" bitfld.long 0x00 17. "EN17,Region enable 17" "Disabled,Enabled" newline bitfld.long 0x00 16. "EN16,Region enable 16" "Disabled,Enabled" bitfld.long 0x00 15. "EN15,Region enable 15" "Disabled,Enabled" bitfld.long 0x00 14. "EN14,Region enable 14" "Disabled,Enabled" newline bitfld.long 0x00 13. "EN13,Region enable 13" "Disabled,Enabled" bitfld.long 0x00 12. "EN12,Region enable 12" "Disabled,Enabled" bitfld.long 0x00 11. "EN11,Region enable 11" "Disabled,Enabled" newline bitfld.long 0x00 10. "EN10,Region enable 10" "Disabled,Enabled" bitfld.long 0x00 9. "EN9,Region enable 9" "Disabled,Enabled" bitfld.long 0x00 8. "EN8,Region enable 8" "Disabled,Enabled" newline bitfld.long 0x00 7. "EN7,Region enable 7" "Disabled,Enabled" bitfld.long 0x00 6. "EN6,Region enable 6" "Disabled,Enabled" bitfld.long 0x00 5. "EN5,Region enable 5" "Disabled,Enabled" newline bitfld.long 0x00 4. "EN4,Region enable 4" "Disabled,Enabled" bitfld.long 0x00 3. "EN3,Region enable 3" "Disabled,Enabled" bitfld.long 0x00 2. "EN2,Region enable 2" "Disabled,Enabled" newline bitfld.long 0x00 1. "EN1,Region enable 1" "Disabled,Enabled" bitfld.long 0x00 0. "EN0,Region enable 0" "Disabled,Enabled" elif (((per.l(c15:0x4400))&0xFF)>=0x10) group.long c15:0x4116++0x00 line.long 0x00 "HPRENR,Hypervisor MPU Region Enable Register" bitfld.long 0x00 15. "EN15,Region enable 15" "Disabled,Enabled" bitfld.long 0x00 14. "EN14,Region enable 14" "Disabled,Enabled" bitfld.long 0x00 13. "EN13,Region enable 13" "Disabled,Enabled" newline bitfld.long 0x00 12. "EN12,Region enable 12" "Disabled,Enabled" bitfld.long 0x00 11. "EN11,Region enable 11" "Disabled,Enabled" bitfld.long 0x00 10. "EN10,Region enable 10" "Disabled,Enabled" newline bitfld.long 0x00 9. "EN9,Region enable 9" "Disabled,Enabled" bitfld.long 0x00 8. "EN8,Region enable 8" "Disabled,Enabled" bitfld.long 0x00 7. "EN7,Region enable 7" "Disabled,Enabled" newline bitfld.long 0x00 6. "EN6,Region enable 6" "Disabled,Enabled" bitfld.long 0x00 5. "EN5,Region enable 5" "Disabled,Enabled" bitfld.long 0x00 4. "EN4,Region enable 4" "Disabled,Enabled" newline bitfld.long 0x00 3. "EN3,Region enable 3" "Disabled,Enabled" bitfld.long 0x00 2. "EN2,Region enable 2" "Disabled,Enabled" bitfld.long 0x00 1. "EN1,Region enable 1" "Disabled,Enabled" newline bitfld.long 0x00 0. "EN0,Region enable 0" "Disabled,Enabled" else rgroup.long c15:0x4116++0x00 line.long 0x00 "HPRENR,Hypervisor MPU Region Enable Register" endif if (((per.l(c15:0x4400))&0xFF)>=0x18) group.long c15:0x4126++0x00 line.long 0x00 "HPRSELR,Hypervisor Protection Region Selection Register" bitfld.long 0x00 0.--4. "REGION,The number of the current region visible in HPRBAR and HPRLAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,?..." elif (((per.l(c15:0x4400))&0xFF)>=0x14) group.long c15:0x4126++0x00 line.long 0x00 "HPRSELR,Hypervisor Protection Region Selection Register" bitfld.long 0x00 0.--4. "REGION,The number of the current region visible in HPRBAR and HPRLAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,?..." elif (((per.l(c15:0x4400))&0xFF)>=0x10) group.long c15:0x4126++0x00 line.long 0x00 "HPRSELR,Hypervisor Protection Region Selection Register" bitfld.long 0x00 0.--3. "REGION,The number of the current region visible in HPRBAR and HPRLAR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else hgroup.long c15:0x4126++0x00 hide.long 0x00 "HPRSELR,Hypervisor Protection Region Selection Register" endif group.long c15:0x4036++0x00 line.long 0x00 "HPRBAR,Hypervisor Protection Region Base Address Register" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:0x4136++0x00 line.long 0x00 "HPRLAR,Hypervisor Protection Region Limit Address Register" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" tree "MPU regions" if (((per.l(c15:0x4400))&0xFF)>=0x10) group.long c15:(0x4086+0x0)++0x00 "Region 0" line.long 0x00 "HPRBAR0,Hypervisor Protection Region Base Address Register 0" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4186+0x0)++0x00 line.long 0x00 "HPRLAR0,Hypervisor Protection Region Limit Address Register 0" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4486+0x0)++0x00 "Region 1" line.long 0x00 "HPRBAR1,Hypervisor Protection Region Base Address Register 1" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4586+0x0)++0x00 line.long 0x00 "HPRLAR1,Hypervisor Protection Region Limit Address Register 1" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4086+0x10)++0x00 "Region 2" line.long 0x00 "HPRBAR2,Hypervisor Protection Region Base Address Register 2" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4186+0x10)++0x00 line.long 0x00 "HPRLAR2,Hypervisor Protection Region Limit Address Register 2" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4486+0x10)++0x00 "Region 3" line.long 0x00 "HPRBAR3,Hypervisor Protection Region Base Address Register 3" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4586+0x10)++0x00 line.long 0x00 "HPRLAR3,Hypervisor Protection Region Limit Address Register 3" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4086+0x20)++0x00 "Region 4" line.long 0x00 "HPRBAR4,Hypervisor Protection Region Base Address Register 4" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4186+0x20)++0x00 line.long 0x00 "HPRLAR4,Hypervisor Protection Region Limit Address Register 4" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4486+0x20)++0x00 "Region 5" line.long 0x00 "HPRBAR5,Hypervisor Protection Region Base Address Register 5" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4586+0x20)++0x00 line.long 0x00 "HPRLAR5,Hypervisor Protection Region Limit Address Register 5" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4086+0x30)++0x00 "Region 6" line.long 0x00 "HPRBAR6,Hypervisor Protection Region Base Address Register 6" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4186+0x30)++0x00 line.long 0x00 "HPRLAR6,Hypervisor Protection Region Limit Address Register 6" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4486+0x30)++0x00 "Region 7" line.long 0x00 "HPRBAR7,Hypervisor Protection Region Base Address Register 7" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4586+0x30)++0x00 line.long 0x00 "HPRLAR7,Hypervisor Protection Region Limit Address Register 7" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4086+0x40)++0x00 "Region 8" line.long 0x00 "HPRBAR8,Hypervisor Protection Region Base Address Register 8" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4186+0x40)++0x00 line.long 0x00 "HPRLAR8,Hypervisor Protection Region Limit Address Register 8" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4486+0x40)++0x00 "Region 9" line.long 0x00 "HPRBAR9,Hypervisor Protection Region Base Address Register 9" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4586+0x40)++0x00 line.long 0x00 "HPRLAR9,Hypervisor Protection Region Limit Address Register 9" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4086+0x50)++0x00 "Region 10" line.long 0x00 "HPRBAR10,Hypervisor Protection Region Base Address Register 10" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4186+0x50)++0x00 line.long 0x00 "HPRLAR10,Hypervisor Protection Region Limit Address Register 10" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4486+0x50)++0x00 "Region 11" line.long 0x00 "HPRBAR11,Hypervisor Protection Region Base Address Register 11" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4586+0x50)++0x00 line.long 0x00 "HPRLAR11,Hypervisor Protection Region Limit Address Register 11" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4086+0x60)++0x00 "Region 12" line.long 0x00 "HPRBAR12,Hypervisor Protection Region Base Address Register 12" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4186+0x60)++0x00 line.long 0x00 "HPRLAR12,Hypervisor Protection Region Limit Address Register 12" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4486+0x60)++0x00 "Region 13" line.long 0x00 "HPRBAR13,Hypervisor Protection Region Base Address Register 13" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4586+0x60)++0x00 line.long 0x00 "HPRLAR13,Hypervisor Protection Region Limit Address Register 13" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4086+0x70)++0x00 "Region 14" line.long 0x00 "HPRBAR14,Hypervisor Protection Region Base Address Register 14" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4186+0x70)++0x00 line.long 0x00 "HPRLAR14,Hypervisor Protection Region Limit Address Register 14" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x4486+0x70)++0x00 "Region 15" line.long 0x00 "HPRBAR15,Hypervisor Protection Region Base Address Register 15" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x4586+0x70)++0x00 line.long 0x00 "HPRLAR15,Hypervisor Protection Region Limit Address Register 15" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" else hgroup.long c15:(0x4086+0x0)++0x00 "Region 0 (not implemented)" hide.long 0x00 "HPRBAR0,Hypervisor Protection Region Base Address Register 0" newline hgroup.long c15:(0x4186+0x0)++0x00 hide.long 0x00 "HPRLAR0,Hypervisor Protection Region Limit Address Register 0" hgroup.long c15:(0x4486+0x0)++0x00 "Region 1 (not implemented)" hide.long 0x00 "HPRBAR1,Hypervisor Protection Region Base Address Register 1" newline hgroup.long c15:(0x4586+0x0)++0x00 hide.long 0x00 "HPRLAR1,Hypervisor Protection Region Limit Address Register 1" hgroup.long c15:(0x4086+0x10)++0x00 "Region 2 (not implemented)" hide.long 0x00 "HPRBAR2,Hypervisor Protection Region Base Address Register 2" newline hgroup.long c15:(0x4186+0x10)++0x00 hide.long 0x00 "HPRLAR2,Hypervisor Protection Region Limit Address Register 2" hgroup.long c15:(0x4486+0x10)++0x00 "Region 3 (not implemented)" hide.long 0x00 "HPRBAR3,Hypervisor Protection Region Base Address Register 3" newline hgroup.long c15:(0x4586+0x10)++0x00 hide.long 0x00 "HPRLAR3,Hypervisor Protection Region Limit Address Register 3" hgroup.long c15:(0x4086+0x20)++0x00 "Region 4 (not implemented)" hide.long 0x00 "HPRBAR4,Hypervisor Protection Region Base Address Register 4" newline hgroup.long c15:(0x4186+0x20)++0x00 hide.long 0x00 "HPRLAR4,Hypervisor Protection Region Limit Address Register 4" hgroup.long c15:(0x4486+0x20)++0x00 "Region 5 (not implemented)" hide.long 0x00 "HPRBAR5,Hypervisor Protection Region Base Address Register 5" newline hgroup.long c15:(0x4586+0x20)++0x00 hide.long 0x00 "HPRLAR5,Hypervisor Protection Region Limit Address Register 5" hgroup.long c15:(0x4086+0x30)++0x00 "Region 6 (not implemented)" hide.long 0x00 "HPRBAR6,Hypervisor Protection Region Base Address Register 6" newline hgroup.long c15:(0x4186+0x30)++0x00 hide.long 0x00 "HPRLAR6,Hypervisor Protection Region Limit Address Register 6" hgroup.long c15:(0x4486+0x30)++0x00 "Region 7 (not implemented)" hide.long 0x00 "HPRBAR7,Hypervisor Protection Region Base Address Register 7" newline hgroup.long c15:(0x4586+0x30)++0x00 hide.long 0x00 "HPRLAR7,Hypervisor Protection Region Limit Address Register 7" hgroup.long c15:(0x4086+0x40)++0x00 "Region 8 (not implemented)" hide.long 0x00 "HPRBAR8,Hypervisor Protection Region Base Address Register 8" newline hgroup.long c15:(0x4186+0x40)++0x00 hide.long 0x00 "HPRLAR8,Hypervisor Protection Region Limit Address Register 8" hgroup.long c15:(0x4486+0x40)++0x00 "Region 9 (not implemented)" hide.long 0x00 "HPRBAR9,Hypervisor Protection Region Base Address Register 9" newline hgroup.long c15:(0x4586+0x40)++0x00 hide.long 0x00 "HPRLAR9,Hypervisor Protection Region Limit Address Register 9" hgroup.long c15:(0x4086+0x50)++0x00 "Region 10 (not implemented)" hide.long 0x00 "HPRBAR10,Hypervisor Protection Region Base Address Register 10" newline hgroup.long c15:(0x4186+0x50)++0x00 hide.long 0x00 "HPRLAR10,Hypervisor Protection Region Limit Address Register 10" hgroup.long c15:(0x4486+0x50)++0x00 "Region 11 (not implemented)" hide.long 0x00 "HPRBAR11,Hypervisor Protection Region Base Address Register 11" newline hgroup.long c15:(0x4586+0x50)++0x00 hide.long 0x00 "HPRLAR11,Hypervisor Protection Region Limit Address Register 11" hgroup.long c15:(0x4086+0x60)++0x00 "Region 12 (not implemented)" hide.long 0x00 "HPRBAR12,Hypervisor Protection Region Base Address Register 12" newline hgroup.long c15:(0x4186+0x60)++0x00 hide.long 0x00 "HPRLAR12,Hypervisor Protection Region Limit Address Register 12" hgroup.long c15:(0x4486+0x60)++0x00 "Region 13 (not implemented)" hide.long 0x00 "HPRBAR13,Hypervisor Protection Region Base Address Register 13" newline hgroup.long c15:(0x4586+0x60)++0x00 hide.long 0x00 "HPRLAR13,Hypervisor Protection Region Limit Address Register 13" hgroup.long c15:(0x4086+0x70)++0x00 "Region 14 (not implemented)" hide.long 0x00 "HPRBAR14,Hypervisor Protection Region Base Address Register 14" newline hgroup.long c15:(0x4186+0x70)++0x00 hide.long 0x00 "HPRLAR14,Hypervisor Protection Region Limit Address Register 14" hgroup.long c15:(0x4486+0x70)++0x00 "Region 15 (not implemented)" hide.long 0x00 "HPRBAR15,Hypervisor Protection Region Base Address Register 15" newline hgroup.long c15:(0x4586+0x70)++0x00 hide.long 0x00 "HPRLAR15,Hypervisor Protection Region Limit Address Register 15" endif if (((per.l(c15:0x4400))&0xFF)>=0x14) group.long c15:(0x5086+0x0)++0x00 "Region 16" line.long 0x00 "HPRBAR16,Hypervisor Protection Region Base Address Register 16" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x5186+0x0)++0x00 line.long 0x00 "HPRLAR16,Hypervisor Protection Region Limit Address Register 16" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x5486+0x0)++0x00 "Region 17" line.long 0x00 "HPRBAR17,Hypervisor Protection Region Base Address Register 17" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x5586+0x0)++0x00 line.long 0x00 "HPRLAR17,Hypervisor Protection Region Limit Address Register 17" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x5086+0x10)++0x00 "Region 18" line.long 0x00 "HPRBAR18,Hypervisor Protection Region Base Address Register 18" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x5186+0x10)++0x00 line.long 0x00 "HPRLAR18,Hypervisor Protection Region Limit Address Register 18" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x5486+0x10)++0x00 "Region 19" line.long 0x00 "HPRBAR19,Hypervisor Protection Region Base Address Register 19" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x5586+0x10)++0x00 line.long 0x00 "HPRLAR19,Hypervisor Protection Region Limit Address Register 19" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" else hgroup.long c15:(0x5086+0x0)++0x00 "Region 16 (not implemented)" hide.long 0x00 "HPRBAR16,Hypervisor Protection Region Base Address Register 16" newline hgroup.long c15:(0x5186+0x0)++0x00 hide.long 0x00 "HPRLAR16,Hypervisor Protection Region Limit Address Register 16" hgroup.long c15:(0x5486+0x0)++0x00 "Region 17 (not implemented)" hide.long 0x00 "HPRBAR17,Hypervisor Protection Region Base Address Register 17" newline hgroup.long c15:(0x5586+0x0)++0x00 hide.long 0x00 "HPRLAR17,Hypervisor Protection Region Limit Address Register 17" hgroup.long c15:(0x5086+0x10)++0x00 "Region 18 (not implemented)" hide.long 0x00 "HPRBAR18,Hypervisor Protection Region Base Address Register 18" newline hgroup.long c15:(0x5186+0x10)++0x00 hide.long 0x00 "HPRLAR18,Hypervisor Protection Region Limit Address Register 18" hgroup.long c15:(0x5486+0x10)++0x00 "Region 19 (not implemented)" hide.long 0x00 "HPRBAR19,Hypervisor Protection Region Base Address Register 19" newline hgroup.long c15:(0x5586+0x10)++0x00 hide.long 0x00 "HPRLAR19,Hypervisor Protection Region Limit Address Register 19" endif if (((per.l(c15:0x4400))&0xFF)>=0x18) group.long c15:(0x5086+0x20)++0x00 "Region 20" line.long 0x00 "HPRBAR20,Hypervisor Protection Region Base Address Register 20" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x5186+0x20)++0x00 line.long 0x00 "HPRLAR20,Hypervisor Protection Region Limit Address Register 20" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x5486+0x20)++0x00 "Region 21" line.long 0x00 "HPRBAR21,Hypervisor Protection Region Base Address Register 21" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x5586+0x20)++0x00 line.long 0x00 "HPRLAR21,Hypervisor Protection Region Limit Address Register 21" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x5086+0x30)++0x00 "Region 22" line.long 0x00 "HPRBAR22,Hypervisor Protection Region Base Address Register 22" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x5186+0x30)++0x00 line.long 0x00 "HPRLAR22,Hypervisor Protection Region Limit Address Register 22" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" group.long c15:(0x5486+0x30)++0x00 "Region 23" line.long 0x00 "HPRBAR23,Hypervisor Protection Region Base Address Register 23" hexmask.long 0x00 6.--31. 0x40 "BASE,Contains bits[31:6] of the lower inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 3.--4. "SH,Shareability field" "Non-shareable,Reserved,Outer shareable,Inner shareable" bitfld.long 0x00 1.--2. "AP,Access permission bits" "R/W EL2 only,R/W,RO EL2 only,RO" newline bitfld.long 0x00 0. "XN,Execute-never" "0,1" group.long c15:(0x5586+0x30)++0x00 line.long 0x00 "HPRLAR23,Hypervisor Protection Region Limit Address Register 23" hexmask.long 0x00 6.--31. 0x40 "LIMIT,Contains bits[31:6] of the upper inclusive limit of the selected EL2 MPU memory region" bitfld.long 0x00 1.--3. "ATTRINDX[2:0],Associates a set of attributes in the HMAIR0/1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "EN,Region enable" "Disabled,Enabled" else hgroup.long c15:(0x5086+0x20)++0x00 "Region 20 (not implemented)" hide.long 0x00 "HPRBAR20,Hypervisor Protection Region Base Address Register 20" newline hgroup.long c15:(0x5186+0x20)++0x00 hide.long 0x00 "HPRLAR20,Hypervisor Protection Region Limit Address Register 20" hgroup.long c15:(0x5486+0x20)++0x00 "Region 21 (not implemented)" hide.long 0x00 "HPRBAR21,Hypervisor Protection Region Base Address Register 21" newline hgroup.long c15:(0x5586+0x20)++0x00 hide.long 0x00 "HPRLAR21,Hypervisor Protection Region Limit Address Register 21" hgroup.long c15:(0x5086+0x30)++0x00 "Region 22 (not implemented)" hide.long 0x00 "HPRBAR22,Hypervisor Protection Region Base Address Register 22" newline hgroup.long c15:(0x5186+0x30)++0x00 hide.long 0x00 "HPRLAR22,Hypervisor Protection Region Limit Address Register 22" hgroup.long c15:(0x5486+0x30)++0x00 "Region 23 (not implemented)" hide.long 0x00 "HPRBAR23,Hypervisor Protection Region Base Address Register 23" newline hgroup.long c15:(0x5586+0x30)++0x00 hide.long 0x00 "HPRLAR23,Hypervisor Protection Region Limit Address Register 23" endif tree.end tree.end tree "Virtualization Extensions" group.long c15:0x4000++0x00 line.long 0x00 "VPIDR,Virtualization Processor ID Register" hexmask.long.byte 0x00 24.--31. 1. "IMPLEMENTER,Implementer code" bitfld.long 0x00 20.--23. "VARIANT,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 16.--19. "ARCHITECTURE,Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme" hexmask.long.word 0x00 4.--15. 1. "PARTNUM,Primary part number" newline bitfld.long 0x00 0.--3. "REVISION,Revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long c15:0x4500++0x00 line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID Register" bitfld.long 0x00 30. "U,Single core system as distinct from core 0 in a cluster" "Part of a cluster,?..." bitfld.long 0x00 24. "MT,Multi-threading type approach for logical cores in lowest level of affinity" "Largely independent,?..." newline hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register" group.long c15:0x4001++0x00 line.long 0x00 "HSCTLR,Hypervisor System Control Register" bitfld.long 0x00 30. "TE,Thumb exception enable" "A32,T32" bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big" bitfld.long 0x00 21. "FI,Fast interrupts configuration enable" "Disabled,Enabled" newline bitfld.long 0x00 19. "WXN,Write permission implies Execute Never (XN)" "Not forced,Forced" bitfld.long 0x00 17. "BR,Background region enable" "Disabled,Enabled" bitfld.long 0x00 12. "I,Instruction cache enable" "Disabled,Enabled" newline bitfld.long 0x00 8. "SED,SETEND instruction disable" "No,Yes" bitfld.long 0x00 7. "ITD,IT instruction disable" "No,Yes" bitfld.long 0x00 5. "CP15BEN,CP15* barrier operations enable" "Disabled,Enabled" newline bitfld.long 0x00 2. "C,Data cache enable" "Disabled,Enabled" bitfld.long 0x00 1. "A,Alignment fault checking enable" "Disabled,Enabled" bitfld.long 0x00 0. "M,EL2-controlled MPU enable" "Disabled,Enabled" group.long c15:0x4002++0x00 line.long 0x00 "VSCTLR,Virtualization System Control Register" hexmask.long.byte 0x00 16.--23. 1. "VMID,Virtual machine ID" bitfld.long 0x00 2. "S2NIE,Stage-2 normal interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. "S2DMAD,Stage-2 device multiple access disable" "Disabled,Enabled" group.long c15:0x4101++0x00 line.long 0x00 "HACTLR,Hypervisor Auxiliary Control Register" bitfld.long 0x00 15. "TESTR1,Controls access to TESTR1 at EL0 and EL1" "Trapped,Enabled" bitfld.long 0x00 13. "ERR,Controls access to IMP_DCERR0, IMP_DCERR1, IMP_ICERR0, IMP_ICERR1, IMP_TCMERR0, IMP_TCMERR1, IMP_FLASHERR0 and IMP_FLASHERR1 registers" "Trapped,Enabled" bitfld.long 0x00 12. "INTMONR,Controls access to IMP_INTMONR at EL1" "Trapped,Enabled" newline bitfld.long 0x00 10. "BUSTIMEOUTR,Controls access to IMP_BUSTIMEOUTR at EL1" "Trapped,Enabled" bitfld.long 0x00 9. "QOSR,Controls access to QOSR at EL1" "Trapped,Enabled" bitfld.long 0x00 8. "PERIPHPREGIONR,Controls access to IMP_PERIPHPREGIONR at EL1" "Trapped,Enabled" newline bitfld.long 0x00 7. "FLASHIFREGIONR,Controls access to IMP_FLASHIFREGIONR at EL1" "Trapped,Enabled" bitfld.long 0x00 1. "CDBGDCI,Controls access to CDBGDCI at EL1" "Trapped,Enabled" bitfld.long 0x00 0. "CPUACTLR,IMP_CPUACTLR write access control" "Trapped,Enabled" rgroup.long c15:0x4711++0x00 line.long 0x00 "HACR,Hypervisor Auxiliary Configuration Register" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hypervisor Configuration Register" bitfld.long 0x00 30. "TRVM,Trap read of virtual memory controls" "Disabled,Enabled" bitfld.long 0x00 29. "HCD,HVC instruction disable" "No,Yes" bitfld.long 0x00 27. "TGE,Trap general exceptions" "Disabled,Enabled" newline bitfld.long 0x00 26. "TVM,Trap virtual memory controls" "Disabled,Enabled" bitfld.long 0x00 24. "TPU,Trap cache maintenance instructions that operate to the point of unification" "Disabled,Enabled" bitfld.long 0x00 23. "TPC,Trap Data Cache maintenance operations that operate to the point of coherency" "Disabled,Enabled" newline bitfld.long 0x00 22. "TSW,Trap data/unified cache maintenance instructions by set/way" "Disabled,Enabled" bitfld.long 0x00 21. "TAC,Trap ACTLR accesses" "Disabled,Enabled" bitfld.long 0x00 20. "TIDCP,Trap lockdown" "Disabled,Enabled" newline bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled" bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled" bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled" newline bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled" bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled" bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled" newline bitfld.long 0x00 12. "DC,Default cacheable" "Disabled,Enabled" bitfld.long 0x00 10.--11. "BSU,Barrier shareability upgrade" "No effect,Inner shareable,Outer shareable,Full system" bitfld.long 0x00 9. "FB,Force broadcast" "Not forced,Forced" newline bitfld.long 0x00 8. "VA,Virtual asynchronous abort exception" "Not pending,Pending" bitfld.long 0x00 7. "VI,Virtual IRQ exception" "Not pending,Pending" bitfld.long 0x00 6. "VF,Virtual FIQ exception" "Not pending,Pending" newline bitfld.long 0x00 5. "AMO,A-bit mask override" "Disabled,Enabled" bitfld.long 0x00 4. "IMO,I-bit mask override" "Disabled,Enabled" bitfld.long 0x00 3. "FMO,F-bit mask override" "Disabled,Enabled" newline bitfld.long 0x00 0. "VM,Second stage of translation enable" "Disabled,Enabled" rgroup.long c15:0x4411++0x00 line.long 0x00 "HCR2,Hypervisor Configuration Register 2" group.long c15:0x3054++0x00 line.long 0x00 "DSPSR,Debug Saved Program Status Register" bitfld.long 0x00 31. "N,Negative condition flag" "Not negative,Negative" bitfld.long 0x00 30. "Z,Zero condition flag" "Not zero,Zero" bitfld.long 0x00 29. "C,Carry condition flag" "Not carry,Carry" newline bitfld.long 0x00 28. "V,Overflow condition flag" "No overflow,Overflow" bitfld.long 0x00 27. "Q,Cumulative condition flag" "Not occurred,Occurred" bitfld.long 0x00 21. "SS,Software step" "0,1" newline bitfld.long 0x00 20. "IL,Illegal execution state" "0,1" bitfld.long 0x00 14.--15. 25.--26. "IT[4:7],IT block state bits for the T32 IT (if-then) instruction - base condition for the IT block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--13. "IT[0:3],IT block state bits for the T32 IT (if-then) instruction - size of the IT block" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 16.--19. "GE,Greater than or equal flags" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 9. "E,Endianness state bit" "Little,Big" bitfld.long 0x00 8. "A,Asynchronous data abort mask bit" "Not masked,Masked" newline bitfld.long 0x00 7. "I,IRQ mask bit" "Not masked,Masked" bitfld.long 0x00 6. "F,FIQ mask bit" "Not masked,Masked" bitfld.long 0x00 5. "T,T32 Instruction set state" "A32,T32" newline bitfld.long 0x00 4. "M[4],Execution state that the exception was taken from" "Reserved,AArch32" bitfld.long 0x00 0.--3. "M[3:0],Current PE mode" "User,FIQ,IRQ,Supervisor,Reserved,Reserved,Monitor,Abort,Reserved,Reserved,Hyp,Undefined,Reserved,Reserved,Reserved,System" group.long c15:0x4111++0x00 line.long 0x00 "HDCR,Hypervisor Debug Control Register" bitfld.long 0x00 21. "EPMAD,External debugger access to hypervisor performance monitors registers disabled" "No,Yes" bitfld.long 0x00 17. "HPMD,Hypervisor performance monitors disable" "No,Yes" bitfld.long 0x00 11. "TDRA,Trap debug ROM access" "No effect,Valid" newline bitfld.long 0x00 10. "TDOSA,Trap debug OS-related register access" "No effect,Valid" bitfld.long 0x00 9. "TDA,Trap debug access" "No effect,Valid" bitfld.long 0x00 8. "TDE,Trap debug exceptions" "No effect,Valid" newline bitfld.long 0x00 7. "HPME,Hypervisor performance monitors enable" "Disabled,Enabled" bitfld.long 0x00 6. "TPM,Trap performance monitors accesses" "No effect,Valid" bitfld.long 0x00 5. "TPMCR,Trap performance monitor control register accesses" "No effect,Valid" newline bitfld.long 0x00 0.--4. "HPMN,Defines the number of performance monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x4211++0x00 line.long 0x00 "HCPTR,Hypervisor Architectural Feature Trap Register" bitfld.long 0x00 31. "TCPAC,Trap coprocessor access control" "Not trapped,Trapped" bitfld.long 0x00 15. "TASE,Trap advanced SIMD extensions" "Not trapped,Trapped" newline bitfld.long 0x00 11. "TCP11,Trap coprocessor 11" "Not trapped,Trapped" bitfld.long 0x00 10. "TCP10,Trap coprocessor 10" "Not trapped,Trapped" group.long c15:0x4311++0x00 line.long 0x00 "HSTR,Hypervisor System Trap Register" bitfld.long 0x00 15. "T15,Trap to Hypervisor mode Non-secure priv 15" "No effect,Trap" bitfld.long 0x00 13. "T13,Trap to Hypervisor mode Non-secure priv 13" "No effect,Trap" bitfld.long 0x00 12. "T12,Trap to Hypervisor mode Non-secure priv 12" "No effect,Trap" newline bitfld.long 0x00 11. "T11,Trap to Hypervisor mode Non-secure priv 11" "No effect,Trap" bitfld.long 0x00 10. "T10,Trap to Hypervisor mode Non-secure priv 10" "No effect,Trap" bitfld.long 0x00 9. "T9,Trap to Hypervisor mode Non-secure priv 9" "No effect,Trap" newline bitfld.long 0x00 8. "T8,Trap to Hypervisor mode Non-secure priv 8" "No effect,Trap" bitfld.long 0x00 7. "T7,Trap to Hypervisor mode Non-secure priv 7" "No effect,Trap" bitfld.long 0x00 6. "T6,Trap to Hypervisor mode Non-secure priv 6" "No effect,Trap" newline bitfld.long 0x00 5. "T5,Trap to Hypervisor mode Non-secure priv 5" "No effect,Trap" bitfld.long 0x00 3. "T3,Trap to Hypervisor mode Non-secure priv 3" "No effect,Trap" bitfld.long 0x00 2. "T2,Trap to Hypervisor mode Non-secure priv 2" "No effect,Trap" newline bitfld.long 0x00 1. "T1,Trap to Hypervisor mode Non-secure priv 1" "No effect,Trap" bitfld.long 0x00 0. "T0,Trap to Hypervisor mode Non-secure priv 0" "No effect,Trap" rgroup.long c15:0x4301++0x00 line.long 0x00 "HACTLR2,Hypervisor Auxiliary Control Register 2" group.long c15:0x3154++0x00 line.long 0x00 "DLR,Debug Link Register" group.long c15:0x4015++0x00 line.long 0x00 "HADFSR,Hypervisor Auxiliary Data Fault Status Syndrome Register" bitfld.long 0x00 2.--4. "PORT,Memory or port that caused the fault" "AXIM,Flash interface,LLPP,Internal interface,ATCM,BTCM,CTCM,Unknown" bitfld.long 0x00 0.--1. "TYPE,Fault type" "Undefined,Response,ECC on data,Bus timeout" group.long c15:0x4006++0x00 line.long 0x00 "HDFAR,Hypervisor Data Fault Address Register" if (((per.l(c15:0x4025))&0xFC000000)==(0x00000000||0x38000000||0x88000000)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." elif (((per.l(c15:0x4025))&0xFC000000)==0x04000000) if (((per.l(c15:0x4025))&0x01000000)==0x01000000) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE" endif elif (((per.l(c15:0x4025))&0xFC000000)==(0x0C000000||0x14000000||0x20000000)) if (((per.l(c15:0x4025))&0x01000000)==0x01000000) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--8. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.long 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--8. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif elif (((per.l(c15:0x4025))&0xFC000000)==(0x10000000||0x30000000)) if (((per.l(c15:0x4025))&0x01000000)==0x01000000) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--13. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--8. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.long 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--13. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 5.--8. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif elif (((per.l(c15:0x4025))&0xFC000000)==0x18000000) if (((per.l(c15:0x4025))&0x01000000)==0x01000000) if (((per.l(c15:0x4025))&0x08)==0x00) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--8. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,?..." newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif else if (((per.l(c15:0x4025))&0x08)==0x00) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" bitfld.long 0x00 5.--8. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction" newline bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added" bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved" newline bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read" endif endif elif (((per.l(c15:0x4025))&0xFC000000)==0x1C000000) if (((per.l(c15:0x4025))&0x01000000)==0x01000000) if (((per.l(c15:0x4025))&0x20)==0x20) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 5. "TA,Indicates trapped use of advanced SIMD functionality" "Not trapped,Trapped" bitfld.long 0x00 0.--3. "COPROC,COPROC" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,0b1010,?..." else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" newline bitfld.long 0x00 5. "TA,Indicates trapped use of advanced SIMD functionality" "Not trapped,Trapped" endif else if (((per.l(c15:0x4025))&0x20)==0x20) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.long 0x00 5. "TA,Indicates trapped use of advanced SIMD functionality" "Not trapped,Trapped" bitfld.long 0x00 0.--3. "COPROC,COPROC" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,0b1010,?..." else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid" newline bitfld.long 0x00 5. "TA,Indicates trapped use of advanced SIMD functionality" "Not trapped,Trapped" endif endif elif (((per.l(c15:0x4025))&0xFC000000)==(0x44000000||0x48000000)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline hexmask.long.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction" elif (((per.l(c15:0x4025))&0xFC000000)==(0x80000000||0x84000000)) if (((per.l(c15:0x4025))&0x3F)==0x10) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline bitfld.long 0x00 10. "FNV,FAR not valid" "No,Yes" newline bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 0.--5. "IFSC,Instruction fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug,?..." else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" newline newline bitfld.long 0x00 9. "EA,External abort type" "Not external,External" newline bitfld.long 0x00 0.--5. "IFSC,Instruction fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug,?..." endif elif (((per.l(c15:0x4025))&0xFD00003F)==(0x95000010||0x91000010)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline bitfld.long 0x00 22.--23. "SAS,Syndrome access size" "Byte,Halfword,Word,Doubleword" bitfld.long 0x00 21. "SSE,Syndrome sign extend" "Not required,Required" bitfld.long 0x00 16.--19. "SRT,Syndrome register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline bitfld.long 0x00 10. "FNV,FAR not valid" "No,Yes" newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 8. "CM,Fault came from a cache maintenance instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not read" "Read,Write" newline bitfld.long 0x00 0.--5. "DFSC,Data fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,SError/parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Cache lockdown fault,Unsupported Exclusive access,?..." elif (((per.l(c15:0x4025))&0xFD000000)==(0x95000000||0x91000000)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline bitfld.long 0x00 22.--23. "SAS,Syndrome access size" "Byte,Halfword,Word,Doubleword" bitfld.long 0x00 21. "SSE,Syndrome sign extend" "Not required,Required" bitfld.long 0x00 16.--19. "SRT,Syndrome register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes" newline newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 8. "CM,Fault came from a cache maintenance instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not read" "Read,Write" newline bitfld.long 0x00 0.--5. "DFSC,Data fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,SError/parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Cache lockdown fault,Unsupported Exclusive access,?..." elif (((per.l(c15:0x4025))&0xFD00003F)==(0x90000010||0x94000010)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline newline newline bitfld.long 0x00 10. "FNV,FAR not valid" "No,Yes" newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 8. "CM,Fault came from a cache maintenance instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not read" "Read,Write" newline bitfld.long 0x00 0.--5. "DFSC,Data fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,SError/parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Cache lockdown fault,Unsupported Exclusive access,?..." elif (((per.l(c15:0x4025))&0xFD000000)==(0x90000000||0x94000000)) group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid" newline newline newline newline bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR" bitfld.long 0x00 8. "CM,Fault came from a cache maintenance instruction other than DC ZVA" "No,Yes" bitfld.long 0x00 6. "WNR,Write not read" "Read,Write" newline bitfld.long 0x00 0.--5. "DFSC,Data fault status code" "Reserved,Reserved,Reserved,Reserved,Translation fault,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Permission fault,Reserved,Reserved,Reserved,Synch. external abort,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synch. parity/ECC,SError/parity/ECC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Cache lockdown fault,Unsupported Exclusive access,?..." else group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hypervisor Syndrome Register" bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/MRC,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC executed,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Prefetch abort routed to hyp,Prefetch abort taken from hyp,PC alignment fault,Reserved,Data abort routed to hyp,Data abort taken from hyp,?..." bitfld.long 0x00 25. "IL,Instruction length for synchronous exceptions" "16-bit,32-bit" endif group.long c15:0x4115++0x00 line.long 0x00 "HAIFSR,Hypervisor Auxiliary Instruction Fault Status Register" bitfld.long 0x00 2.--4. "PORT,Memory or port that caused the fault" "AXIM,Flash interface,LLPP,Reserved,ATCM,BTCM,CTCM,Unknown" bitfld.long 0x00 0.--1. "TYPE,Fault type" "Undefined,Response,ECC on data,Bus timeout" group.long c15:0x4206++0x00 line.long 0x00 "HIFAR,Hypervisor Instruction Fault Address Register" group.long c15:0x4406++0x00 line.long 0x00 "HPFAR,Hypervisor IPA Fault Address Register" hexmask.long 0x00 4.--31. 1. "FIPA,Faulting IPA bits" tree.open "Hypervisor Memory Attribute Indirection Registers" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1" bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" newline bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory. Outer Write-through transient. Allocate R=0 W=1,Normal Memory. Outer Write-through transient. Allocate R=1 W=0,Normal Memory. Outer Write-through transient. Allocate R=1 W=1,Normal Memory. Outer Non-Cacheable,Normal Memory. Outer Write-back transient. Allocate R=0 W=1,Normal Memory. Outer Write-back transient. Allocate R=1 W=0,Normal Memory. Outer Write-back transient. Allocate R=1 W=1,Normal Memory. Outer Write-through non-transient,Normal Memory. Outer Write-through non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-through non-transient. Allocate R=1 W=1,Normal Memory. Outer Write-back non-transient,Normal Memory. Outer Write-back non-transient. Allocate R=0 W=1,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=0,Normal Memory. Outer Write-back non-transient. Allocate R=1 W=1" bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem|Normal mem)" "Device-nGnRnE memory| -UNPREDICTABLE-, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient, -UNPREDICTABLE- |Normal memory. Inner Write-through transient,Device-nGnRE memory|Normal memory. Inner Non-Cacheable, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient, -UNPREDICTABLE- |Normal memory. Inner Write-back transient,Device-nGRE memory |Normal memory. Inner Write-through, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-through non-transient,Device-GRE memory |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient, -UNPREDICTABLE- |Normal memory. Inner Write-back non-transient" rgroup.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0" rgroup.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1" tree.end newline group.long c15:0x400C++0x00 line.long 0x00 "HVBAR,Hypervisor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 "VBA,Vector base address" group.long c15:0x420C++0x00 line.long 0x00 "HRMR,Hypervisor Reset Management Register" bitfld.long 0x00 1. "RR,Reset request" "Not requested,Requested" group.long c15:0x1119++0x00 line.long 0x00 "IMP_BPCTLR,Branch Predictor Control Register" bitfld.long 0x00 2. "DBPEL2DIS,Disable dynamic branch predictor when running at EL2" "No,Yes" bitfld.long 0x00 1. "DBPEL1DIS,Disable dynamic branch predictor when running at EL1" "No,Yes" bitfld.long 0x00 0. "DBPEL0DIS,Disable dynamic branch predictor when running at EL0" "No,Yes" tree.end tree "Cache Control and Configuration" rgroup.long c15:0x0100++0x00 line.long 0x00 "CTR,Cache Type Register" bitfld.long 0x00 24.--27. "CWG,Cache write-back granule" "Reserved,2 words,?..." bitfld.long 0x00 20.--23. "ERG,Exclusives reservation granule" "Reserved,Reserved,Reserved,Reserved,16 words,?..." newline bitfld.long 0x00 16.--19. "DMINLINE,D-cache minimum line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x00 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT" bitfld.long 0x00 0.--3. "IMINLINE,I-cache minimum line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." group.long c15:0x2000++0x00 line.long 0x00 "CSSELR,Cache Size Selection Register" rbitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,?..." bitfld.long 0x00 0. "IND,Instruction/not data" "Data/unified,Instruction" rgroup.long c15:0x1000++0x00 line.long 0x00 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. "WT,Write-through" "Not supported,Supported" bitfld.long 0x00 30. "WB,Write-back" "Not supported,?..." newline bitfld.long 0x00 29. "RA,Read-allocate" "Reserved,Supported" bitfld.long 0x00 28. "WA,Write-allocate" "Not supported,Supported" newline hexmask.long.word 0x00 13.--27. 1. 1. "NUMSETS,Number of sets" hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity" newline bitfld.long 0x00 0.--2. "LSIZE,Number of words in each cache line" "Reserved,Reserved,16,?..." rgroup.long c15:0x1100++0x00 line.long 0x00 "CLIDR,Cache Level ID Register" bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..." bitfld.long 0x00 27.--29. "LOUU,Level of unification" "Level 0,Level 1,?..." bitfld.long 0x00 24.--26. "LOC,Level of coherency" "Level 0,Level 1,?..." newline bitfld.long 0x00 21.--23. "LOUIS,Level of unification inner shareable" "Level 0,Level 1,?..." bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..." newline bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..." newline bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..." newline bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,?..." bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "No cache,Instruction cache,Data cache,Both separated,?..." group.long c15:0x1019++0x00 line.long 0x00 "IMP_CSCTLR,Cache Segregation Control Register" bitfld.long 0x00 8.--10. "IFLW,Instruction cache flash ways" "Reserved,0,0-1,0-2,0-3,?..." bitfld.long 0x00 0.--2. "DFLW,Data cache flash ways" "Reserved,0,0-1,0-2,0-3,?..." group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register" bitfld.quad 0x00 47. "FIXEDDIV,Enable fixed latency for integer divide instructions" "Disabled,Enabled" bitfld.quad 0x00 46. "ETACDIS,Disable PFU exception target address cache" "No,Yes" bitfld.quad 0x00 45. "OOODIVDIS,Disable out-of-order completion of divide instructions" "No,Yes" newline bitfld.quad 0x00 41. "TLACDIS,Disable the store unit (STU) tag lookup avoidance cache" "No,Yes" bitfld.quad 0x00 40. "FLASHNDDIS,Disable flash accesses use of non-flash-dedicated resources" "No,Yes" bitfld.quad 0x00 39. "FLASHARBCTL,Flash interface arbitration control" "D-side,I-side" newline bitfld.quad 0x00 38. "AXIMARBCTL,AXIM interface arbitration control" "D-side,I-side" bitfld.quad 0x00 33. "ISPECDIS,Disable I-side speculative access" "No,Yes" bitfld.quad 0x00 32. "DSPECDIS,Disable D-side speculative access" "No,Yes" newline bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes" bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes" bitfld.quad 0x00 25.--26. "WSTRNOL1ACTL,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled streaming" newline bitfld.quad 0x00 19.--20. "DPFSTRCTL,Number of independent data prefetch streams" "1,2,3,4" bitfld.quad 0x00 17. "STRIDECTL,Enable stride detection" "2,3" bitfld.quad 0x00 13.--15. "L1DPFCTL,L1 Data prefetch control" "Disabled,1 outstanding prefetch,2 outstanding prefetch,3 outstanding prefetch,4 outstanding prefetch,5 outstanding prefetch,6 outstanding prefetch,8 outstanding prefetch" newline bitfld.quad 0x00 12. "NCALLOCDIS,MPU regions allocation into the micro MPU" "Normal non-cacheable,Equal priority" bitfld.quad 0x00 11. "L1IPFCTL,L1 Instruction prefetch control" "Disabled,Enabled" bitfld.quad 0x00 10. "DMB2DSBEN,Enable data memory barrier behaving as data synchronization barrier" "Disabled,Enabled" wgroup.long c15:0x00FF++0x00 line.long 0x00 "IMP_CDBGDCI,Invalidate All Register" tree "Level 1 memory system" rgroup.long c15:0x300F++0x00 line.long 0x00 "IMP_CDBGDR0,Cache Debug Data Register 0" bitfld.long 0x00 22. "V,Valid" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. "TB,Tag bits" rgroup.long c15:0x310F++0x00 line.long 0x00 "IMP_CDBGDR1,Cache Debug Data Register 1" wgroup.long c15:0x302F++0x00 line.long 0x00 "IMP_CDBGDCT,Data Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. "CW,Cache way" "0,1,2,3" hexmask.long.word 0x00 6.--12. 1. "SETIND,Set index" wgroup.long c15:0x312F++0x00 line.long 0x00 "IMP_CDBGICT,Instruction Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. "CW,Cache way" "0,1,2,3" hexmask.long.word 0x00 6.--12. 1. "SETIND,Set index" wgroup.long c15:0x304F++0x00 line.long 0x00 "IMP_CDBGDCD,Data Cache Data Read Operation Register" bitfld.long 0x00 30.--31. "CW,Cache way" "0,1,2,3" hexmask.long.word 0x00 6.--12. 1. "SETIND,Set index" bitfld.long 0x00 3.--5. "DO,Data offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x314F++0x00 line.long 0x00 "IMP_CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. "CW,Cache way" "0,1,2,3" hexmask.long.word 0x00 6.--12. 1. "SETIND,Set index" bitfld.long 0x00 3.--5. "DO,Data offset" "0,1,2,3,4,5,6,7" tree.end tree.end width 12. tree "System Performance Monitor" group.long c15:0x00C9++0x00 line.long 0x00 "PMCR,Performance Monitors Control Register" rhexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code" rhexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code" rbitfld.long 0x00 11.--15. "N,Number of counters implemented" "Reserved,Reserved,Reserved,Reserved,4,?..." bitfld.long 0x00 6. "LC,Long cycle counter enable" "Disabled,Enabled" newline bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. "X,Export enable" "Disabled,Enabled" bitfld.long 0x00 3. "D,Clock divider" "Every cycle,64th cycle" bitfld.long 0x00 2. "C,Clock counter reset" "No reset,Reset" newline bitfld.long 0x00 1. "P,Performance counter reset" "No reset,Reset" bitfld.long 0x00 0. "E,All counters enable" "Disabled,Enabled" group.long c15:0x01C9++0x00 line.long 0x00 "PMCNTENSET,Count Enable Set Register" bitfld.long 0x00 31. "C,CCNT overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "P3,Event counter PMN 3 enable bit" "Disabled,Enabled" bitfld.long 0x00 2. "P2,Event counter PMN 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. "P1,Event counter PMN 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. "P0,Event counter PMN 0 enable bit" "Disabled,Enabled" group.long c15:0x02C9++0x00 line.long 0x00 "PMCNTENCLR,Count Enable Clear Register" bitfld.long 0x00 31. "C,CCNT overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "P3,Event counter PMN 3 enable bit" "Disabled,Enabled" bitfld.long 0x00 2. "P2,Event counter PMN 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. "P1,Event counter PMN 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. "P0,Event counter PMN 0 enable bit" "Disabled,Enabled" group.long c15:0x03C9++0x00 line.long 0x00 "PMOVSR,Overflow Status Flags Register" eventfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow" newline eventfld.long 0x00 3. "P3,PMN3 overflow" "No overflow,Overflow" eventfld.long 0x00 2. "P2,PMN2 overflow" "No overflow,Overflow" eventfld.long 0x00 1. "P1,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. "P0,PMN0 overflow" "No overflow,Overflow" wgroup.long c15:0x04C9++0x00 line.long 0x00 "PMSWINC,Software Increment Register" bitfld.long 0x00 3. "P3,PMN3 software increment" "No effect,Increment" bitfld.long 0x00 2. "P2,PMN2 software increment" "No effect,Increment" bitfld.long 0x00 1. "P1,PMN1 software increment" "No effect,Increment" bitfld.long 0x00 0. "P0,PMN0 software increment" "No effect,Increment" group.long c15:0x05C9++0x00 line.long 0x00 "PMSELR,Event Counter Selection Register" bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.open "Common Event Identification Registers" rgroup.long c15:0x06C9++0x00 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 30. "CHAIN,Chain" "Not implemented,Implemented" bitfld.long 0x00 29. "BUS_CYCLES,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 27. "INST_SPEC,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. "MEMORY_ERROR,Local memory error" "Not implemented,Implemented" newline bitfld.long 0x00 25. "BUS_ACCESS,Bus access" "Not implemented,Implemented" bitfld.long 0x00 20. "L1I_CACHE,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. "MEM_ACCESS,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 18. "BR_PRED,Predictable branch speculatively executed" "Not implemented,Implemented" newline bitfld.long 0x00 17. "CPU_CYCLES,CPU cycle" "Not implemented,Implemented" bitfld.long 0x00 16. "BR_MIS_PRED,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 15. "UNALIGNED_LDST_RETIRED,Instruction architecturally executed condition code check pass unaligned load or store" "Not implemented,Implemented" bitfld.long 0x00 14. "BR_RETURN_RETIRED,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented" newline bitfld.long 0x00 13. "BR_IMMED_RETIRED,Instruction architecturally executed immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. "PC_WRITE_RETIRED,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. "CID_WRITE_RETIRED,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. "EXC_RETURN,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented" newline bitfld.long 0x00 9. "EXC_TAKEN,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. "INST_RETIRED,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. "ST_RETIRED,Instruction architecturally executed condition check pass store" "Not implemented,Implemented" bitfld.long 0x00 6. "LD_RETIRED,Instruction architecturally executed condition check pass load" "Not implemented,Implemented" newline bitfld.long 0x00 4. "L1D_CACHE,Level 1 data cache access" "Not implemented,Implemented" bitfld.long 0x00 3. "L1D_CACHE_REFILL,Level 1 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 1. "L1I_CACHE_REFILL,Level 1 instruction cache refill" "Not implemented,Implemented" bitfld.long 0x00 0. "SW_INCR,Software increment" "Not implemented,Implemented" rgroup.long c15:0x07C9++0x00 line.long 0x00 "PMCEID1,Common Event Identification Register 1" bitfld.long 0x00 19. "STALL_BACKEND,No operation issued due to backend" "Not implemented,Implemented" bitfld.long 0x00 18. "STALL_FRONTEND,No operation issued due to the frontend" "Not implemented,Implemented" bitfld.long 0x00 17. "BR_MIS_PRED_RETIRED,Instruction architecturally executed mispredicted branch" "Not implemented,Implemented" bitfld.long 0x00 16. "BR_RETIRED,Instruction architecturally executed branch" "Not implemented,Implemented" tree.end newline group.long c15:0x00D9++0x00 line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register [31:0]" group.quad c15:0x10090++0x01 line.quad 0x00 "PMCCNTR,Performance Monitor Cycle Count Register [63:0]" if (((per.l(c15:0x05C9))&0x1F)==0x1F) group.long c15:0x01D9++0x00 line.long 0x00 "PMXEVTYPER,Selected Event Type and Filter Register - PMCCFILTR" bitfld.long 0x00 31. "P,Privileged modes filtering" "Disabled,Enabled" bitfld.long 0x00 30. "U,User modes filtering" "Disabled,Enabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering" "Disabled,Enabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering" "Disabled,Enabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering" "Disabled,Enabled" elif (((per.l(c15:0x05C9))&0x1F)<=0x03) group.long c15:0x01D9++0x00 line.long 0x00 "PMXEVTYPER,Selected Event Type and Filter Register - PMEVTYPER" bitfld.long 0x00 31. "P,Privileged modes filtering" "Disabled,Enabled" bitfld.long 0x00 30. "U,User modes filtering" "Disabled,Enabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering" "Disabled,Enabled" bitfld.long 0x00 28. "NSU,Non-secure user modes filtering" "Disabled,Enabled" newline bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering" "Disabled,Enabled" bitfld.long 0x00 25. "MT,Multithreading" "Disabled,Enabled" hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event number" else rgroup.long c15:0x01D9++0x00 line.long 0x00 "PMXEVTYPER,Selected Event Type and Filter Register" endif group.long c15:0x02D9++0x00 line.long 0x00 "PMXEVCNTR,Selected Event Counter Register" group.long c15:0x00E9++0x00 line.long 0x00 "PMUSERENR,User Enable Register" bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled" bitfld.long 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,User enable" "Disabled,Enabled" group.long c15:0x01E9++0x00 line.long 0x00 "PMINTENSET,Interrupt Enable Set Register" bitfld.long 0x00 31. "C,CCNT overflow interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "P3,PMCNT3 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. "P2,PMCNT2 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. "P1,PMCNT1 overflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "P0,PMCNT0 overflow interrupt enable" "Disabled,Enabled" group.long c15:0x02E9++0x00 line.long 0x00 "PMINTENCLR,Interrupt Enable Clear Register" eventfld.long 0x00 31. "C,CCNT overflow interrupt enable" "Disabled,Enabled" newline eventfld.long 0x00 3. "P3,PMCNT3 overflow interrupt enable" "Disabled,Enabled" eventfld.long 0x00 2. "P2,PMCNT2 overflow interrupt enable" "Disabled,Enabled" eventfld.long 0x00 1. "P1,PMCNT1 overflow interrupt enable" "Disabled,Enabled" eventfld.long 0x00 0. "P0,PMCNT0 overflow interrupt enable" "Disabled,Enabled" group.long c15:0x3E9++0x00 line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register" group.long c15:(0x008E+0x0)++0x00 line.long 0x00 "PMEVCNTR0,Performance Monitors Event Count Register 0" group.long c15:(0x00CE+0x0)++0x00 line.long 0x00 "PMEVTYPER0,Performance Monitors Event Type Register 0" group.long c15:(0x008E+0x100)++0x00 line.long 0x00 "PMEVCNTR1,Performance Monitors Event Count Register 1" group.long c15:(0x00CE+0x100)++0x00 line.long 0x00 "PMEVTYPER1,Performance Monitors Event Type Register 1" group.long c15:(0x008E+0x200)++0x00 line.long 0x00 "PMEVCNTR2,Performance Monitors Event Count Register 2" group.long c15:(0x00CE+0x200)++0x00 line.long 0x00 "PMEVTYPER2,Performance Monitors Event Type Register 2" group.long c15:(0x008E+0x300)++0x00 line.long 0x00 "PMEVCNTR3,Performance Monitors Event Count Register 3" group.long c15:(0x00CE+0x300)++0x00 line.long 0x00 "PMEVTYPER3,Performance Monitors Event Type Register 3" group.long c15:0x07FE++0x00 line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register" bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled" bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled" newline bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled" bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled" tree.end tree "System Timer Registers" rgroup.long c15:0x000E++0x00 line.long 0x00 "CNTFRQ,Counter Frequency Register" rgroup.quad c15:0x100E0++0x01 line.quad 0x00 "CNTPCT,Counter Physical Count Register" rgroup.quad c15:0x110E0++0x01 line.quad 0x00 "CNTVCT,Counter Virtual Count Register" group.quad c15:0x140E0++0x01 line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register" group.long c15:0x001E++0x00 line.long 0x00 "CNTKCTL,Timer EL1 Control Register" bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 mode" "Disabled,Enabled" bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 mode" "Disabled,Enabled" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter, when that stream is enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" newline bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 mode" "Disabled,Enabled" bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 mode" "Disabled,Enabled" group.long c15:0x401E++0x00 line.long 0x00 "CNTHCTL,Counter Non-secure EL2 Control Register" bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTPCT is the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTPCT trigger bit, defined by EVNTI" "0 to 1,1 to 0" bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the physical counter" "Disabled,Enabled" bitfld.long 0x00 1. "EL1PCEN,Controls whether the Non-secure copies of the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" newline bitfld.long 0x00 0. "EL1PCTEN,Controls whether the physical counter, CNTPCT, is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible" group.long c15:0x002E++0x00 line.long 0x00 "CNTP_TVAL,Counter EL1 Physical Timer Value Register" group.long c15:0x012E++0x00 line.long 0x00 "CNTP_CTL,Counter EL1 Physical Timer Control Register" bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad c15:0x120E0++0x01 line.quad 0x00 "CNTP_CVAL,Counter EL1 Physical Compare Value Register" group.long c15:0x003E++0x00 line.long 0x00 "CNTV_TVAL,Counter EL1 Virtual Timer Value Register" group.long c15:0x013E++0x00 line.long 0x00 "CNTV_CTL,Counter EL1 Virtual Timer Control Register" bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad c15:0x130E0++0x01 line.quad 0x00 "CNTV_CVAL,Counter EL1 Virtual Compare Value Register" group.long c15:0x402E++0x00 line.long 0x00 "CNTHP_TVAL,Counter Non-secure EL2 Physical Timer Value Register" group.long c15:0x412E++0x00 line.long 0x00 "CNTHP_CTL,Counter Non-secure EL2 Physical Timer Control Register" bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. "IMASK,Timer interrupt mask" "Not masked,Masked" bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled" group.quad c15:0x160E0++0x01 line.quad 0x00 "CNTHP_CVAL,Counter Non-secure EL2 Physical Compare Value Register" tree.end tree "Generic Interrupt Controller CPU Interface" tree "AArch32 GIC Physical CPU Interface System Registers" tree.open "Interrupt Controller Active Priorities Registers" group.long c15:(0x048C+0x0)++0x00 line.long 0x00 "ICC_AP0R0,Interrupt Controller Active Priorities Group 0x0 Register" bitfld.long 0x00 31. "P[31],Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P[30],Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P[29],Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.long 0x00 28. "P[28],Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" newline bitfld.long 0x00 27. "P[27],Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P[26],Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.long 0x00 25. "P[25],Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P[24],Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" newline bitfld.long 0x00 23. "P[23],Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.long 0x00 22. "P[22],Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P[21],Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P[20],Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P[19],Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P[18],Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P[17],Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" bitfld.long 0x00 16. "P[16],Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" newline bitfld.long 0x00 15. "P[15],Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P[14],Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "P[13],Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P[12],Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.long 0x00 11. "P[11],Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "P[10],Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P[9],Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P[8],Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P[7],Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P[6],Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P[5],Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "P[4],Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" newline bitfld.long 0x00 3. "P[3],Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P[2],Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "P[1],Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P[0],Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.long c15:(0x048C+0xFFFFFFFFFFFFFC10)++0x00 line.long 0x00 "ICC_AP1R0,Interrupt Controller Active Priorities Group 0xFFFFFFFFFFFFFC10 Register" bitfld.long 0x00 31. "P[31],Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P[30],Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P[29],Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.long 0x00 28. "P[28],Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" newline bitfld.long 0x00 27. "P[27],Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P[26],Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.long 0x00 25. "P[25],Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P[24],Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" newline bitfld.long 0x00 23. "P[23],Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.long 0x00 22. "P[22],Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P[21],Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P[20],Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P[19],Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P[18],Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P[17],Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" bitfld.long 0x00 16. "P[16],Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" newline bitfld.long 0x00 15. "P[15],Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P[14],Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "P[13],Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P[12],Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.long 0x00 11. "P[11],Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "P[10],Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P[9],Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P[8],Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P[7],Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P[6],Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P[5],Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "P[4],Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" newline bitfld.long 0x00 3. "P[3],Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P[2],Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "P[1],Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P[0],Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline group.long c15:(0x038C+0x0)++0x00 line.long 0x00 "ICC_BPR0,Interrupt Controller Binary Point Register 0" bitfld.long 0x00 0.--2. "BINARYPOINT,5-bit interrupt priority field control" "Reserved,Reserved,2,3,4,5,6,7" group.long c15:(0x038C+0x40)++0x00 line.long 0x00 "ICC_BPR1,Interrupt Controller Binary Point Register 1" bitfld.long 0x00 0.--2. "BINARYPOINT,5-bit interrupt priority field control" "Reserved,Reserved,2,3,4,5,6,7" group.long c15:0x04CC++0x00 line.long 0x00 "ICC_CTLR,Interrupt Control Register for EL1" rbitfld.long 0x00 15. "A3V,Affinity 3 valid" "Not supported,?..." rbitfld.long 0x00 14. "SEIS,SEI support" "Not supported,?..." rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,?..." newline rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "Reserved,Reserved,Reserved,Reserved,5,?..." bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1" bitfld.long 0x00 0. "CBPR,Common binary point register" "0,1" wgroup.long c15:0x01BC++0x00 line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register" hexmask.long.word 0x00 0.--9. 1. "INTID,Interrupt ID" wgroup.long c15:(0x018C+0x0)++0x00 line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0" hexmask.long.word 0x00 0.--9. 1. "INTID,INTID from the corresponding ICC_IAR0 access" rgroup.long c15:(0x028C+0x0)++0x00 line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0" hexmask.long.word 0x00 0.--9. 1. "INTID,INTID of the highest priority pending Group 0 interrupt" rgroup.long c15:(0x008C+0x0)++0x00 line.long 0x00 "ICC_IAR0,Interrupt Controller Interrupt Acknowledge Register 0" hexmask.long.word 0x00 0.--9. 1. "INTID,INTID of the signaled interrupt" group.long c15:(0x06CC+0x0)++0x00 line.long 0x00 "ICC_IGRPEN0,Interrupt Controller Group Enable Register 0" bitfld.long 0x00 0. "ENABLE,Enable group 0 interrupts" "Disabled,Enabled" wgroup.long c15:(0x018C+0x40)++0x00 line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1" hexmask.long.word 0x00 0.--9. 1. "INTID,INTID from the corresponding ICC_IAR0 access" rgroup.long c15:(0x028C+0x40)++0x00 line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1" hexmask.long.word 0x00 0.--9. 1. "INTID,INTID of the highest priority pending Group 1 interrupt" rgroup.long c15:(0x008C+0x40)++0x00 line.long 0x00 "ICC_IAR1,Interrupt Controller Interrupt Acknowledge Register 1" hexmask.long.word 0x00 0.--9. 1. "INTID,INTID of the signaled interrupt" group.long c15:(0x06CC+0x100)++0x00 line.long 0x00 "ICC_IGRPEN1,Interrupt Controller Group Enable Register 1" bitfld.long 0x00 0. "ENABLE,Enable group 1 interrupts" "Disabled,Enabled" group.long c15:0x0064++0x00 line.long 0x00 "ICC_PMR,Interrupt Controller Interrupt Priority Mask Register" bitfld.long 0x00 3.--7. "PRIORITY,The priority mask level for the CPU interface" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" rgroup.long c15:0x03BC++0x00 line.long 0x00 "ICC_RPR,Interrupt Controller Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface" wgroup.quad c15:(0x120C0-0x0)++0x01 line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" bitfld.quad 0x00 0.--4. "TARGETLIST,Target list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" wgroup.quad c15:(0x120C0-0x2000)++0x01 line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" bitfld.quad 0x00 0.--4. "TARGETLIST,Target list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" wgroup.quad c15:0x110C0++0x01 line.quad 0x00 "ICC_ASGI1R,Alias SGI Generation Register $2" hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3" bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Disabled,Enabled" hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2" newline bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1" bitfld.quad 0x00 0.--4. "TARGETLIST,Target list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long c15:0x05CC++0x00 line.long 0x00 "ICC_SRE,System Register Enable Register for EL1" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "Reserved,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "Reserved,Yes" bitfld.long 0x00 0. "SRE,System register enable" "Reserved,Enabled" rgroup.long c15:0x459C++0x00 line.long 0x00 "ICC_HSRE,System Register Enable Register for EL2" bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1" "Reserved,Enabled" bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "Reserved,Yes" bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "Reserved,Yes" newline bitfld.long 0x00 0. "SRE,System register enable" "Reserved,Enabled" tree.end tree "AArch32 GIC Virtual CPU Interface System Registers" tree.open "Interrupt Controller Active Priorities Registers" group.long c15:(0x048C+0x0)++0x00 line.long 0x00 "ICV_AP0R0,Interrupt Controller Virtual Active Priorities Group 0x0 Register 0" bitfld.long 0x00 31. "P[31],Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P[30],Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P[29],Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.long 0x00 28. "P[28],Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" newline bitfld.long 0x00 27. "P[27],Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P[26],Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.long 0x00 25. "P[25],Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P[24],Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" newline bitfld.long 0x00 23. "P[23],Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.long 0x00 22. "P[22],Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P[21],Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P[20],Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P[19],Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P[18],Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P[17],Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" bitfld.long 0x00 16. "P[16],Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" newline bitfld.long 0x00 15. "P[15],Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P[14],Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "P[13],Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P[12],Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.long 0x00 11. "P[11],Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "P[10],Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P[9],Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P[8],Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P[7],Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P[6],Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P[5],Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "P[4],Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" newline bitfld.long 0x00 3. "P[3],Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P[2],Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "P[1],Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P[0],Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.long c15:(0x048C+0xFFFFFFFFFFFFFC10)++0x00 line.long 0x00 "ICV_AP1R0,Interrupt Controller Virtual Active Priorities Group 0xFFFFFFFFFFFFFC10 Register 0" bitfld.long 0x00 31. "P[31],Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P[30],Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P[29],Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.long 0x00 28. "P[28],Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" newline bitfld.long 0x00 27. "P[27],Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P[26],Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.long 0x00 25. "P[25],Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P[24],Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" newline bitfld.long 0x00 23. "P[23],Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.long 0x00 22. "P[22],Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P[21],Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P[20],Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P[19],Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P[18],Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P[17],Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" bitfld.long 0x00 16. "P[16],Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" newline bitfld.long 0x00 15. "P[15],Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P[14],Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "P[13],Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P[12],Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.long 0x00 11. "P[11],Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "P[10],Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P[9],Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P[8],Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P[7],Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P[6],Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P[5],Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "P[4],Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" newline bitfld.long 0x00 3. "P[3],Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P[2],Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "P[1],Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P[0],Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline group.long c15:0x04CC++0x00 line.long 0x00 "ICV_CTLR,Interrupt Controller Virtual Control Register" rbitfld.long 0x00 15. "A3V,Affinity 3 valid" "Not supported,?..." rbitfld.long 0x00 14. "SEIS,SEI support" "Not supported,?..." rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,?..." newline rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "Reserved,Reserved,Reserved,Reserved,5,?..." bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1" bitfld.long 0x00 0. "CBPR,Common binary point register" "0,1" wgroup.long c15:0x01BC++0x00 line.long 0x00 "ICV_DIR,Interrupt Controller Virtual Deactivate Interrupt Register" hexmask.long.word 0x00 0.--15. 1. "INTID,Interrupt ID" rgroup.long c15:(0x008C+0x0)++0x00 line.long 0x00 "ICV_IAR0,Interrupt Controller Virtual Interrupt Acknowledge Register 0" hexmask.long.word 0x00 0.--15. 1. "INTID,INTID of the signaled interrupt" wgroup.long c15:(0x018C+0x0)++0x00 line.long 0x00 "ICV_EOIR0,Interrupt Controller Virtual End Of Interrupt Register 0" hexmask.long.word 0x00 0.--15. 1. "INTID,INTID from the corresponding ICC_IAR0 access" rgroup.long c15:(0x028C+0x0)++0x00 line.long 0x00 "ICV_HPPIR0,Interrupt Controller Virtual Highest Priority Pending Interrupt Register 0" hexmask.long.word 0x00 0.--15. 1. "INTID,INTID of the highest priority pending Group 0 interrupt" group.long c15:(0x038C+0x0)++0x00 line.long 0x00 "ICV_BPR0,Interrupt Controller Virtual Binary Point Register 0" bitfld.long 0x00 0.--2. "BINARYPOINT,5-bit interrupt priority field control" "Reserved,Reserved,2,3,4,5,6,7" rgroup.long c15:(0x008C+0x40)++0x00 line.long 0x00 "ICV_IAR1,Interrupt Controller Virtual Interrupt Acknowledge Register 1" hexmask.long.word 0x00 0.--15. 1. "INTID,INTID of the signaled interrupt" wgroup.long c15:(0x018C+0x40)++0x00 line.long 0x00 "ICV_EOIR1,Interrupt Controller Virtual End Of Interrupt Register 1" hexmask.long.word 0x00 0.--15. 1. "INTID,INTID from the corresponding ICC_IAR1 access" rgroup.long c15:(0x028C+0x40)++0x00 line.long 0x00 "ICV_HPPIR1,Interrupt Controller Virtual Highest Priority Pending Interrupt Register 1" hexmask.long.word 0x00 0.--15. 1. "INTID,INTID of the highest priority pending Group 1 interrupt" group.long c15:(0x038C+0x40)++0x00 line.long 0x00 "ICV_BPR1,Interrupt Controller Virtual Binary Point Register 1" bitfld.long 0x00 0.--2. "BINARYPOINT,5-bit interrupt priority field control" "Reserved,Reserved,2,3,4,5,6,7" group.long c15:0x07CC++0x00 line.long 0x00 "ICV_IGRPEN1,Interrupt Controller Virtual Group Enable Register 1" bitfld.long 0x00 0. "ENABLE,Enable group 1 interrupts" "Disabled,Enabled" group.long c15:0x06CC++0x00 line.long 0x00 "ICV_IGRPEN0,Interrupt Controller Virtual Interrupt Group 0 Enable Register" bitfld.long 0x00 0. "ENABLE,Enable group 0 interrupts" "Disabled,Enabled" group.long c15:0x0064++0x00 line.long 0x00 "ICV_PMR,Interrupt Controller Virtual Interrupt Priority Mask Register" bitfld.long 0x00 3.--7. "PRIORITY,The priority mask level for the CPU interface" "Highest,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,Lowest" rgroup.long c15:0x03BC++0x00 line.long 0x00 "ICV_RPR,Interrupt Controller Virtual Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface" tree.end tree "AArch32 Virtual Interface Control System Registers" tree.open "Interrupt Controller Hypervisor Active Priorities Register" group.long c15:0x408C++0x00 line.long 0x00 "ICH_AP0R0,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0" bitfld.long 0x00 31. "P[31],Group 0 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P[30],Group 0 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P[29],Group 0 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.long 0x00 28. "P[28],Group 0 interrupt active with priority level 28" "No interrupt,Interrupt" newline bitfld.long 0x00 27. "P[27],Group 0 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P[26],Group 0 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.long 0x00 25. "P[25],Group 0 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P[24],Group 0 interrupt active with priority level 24" "No interrupt,Interrupt" newline bitfld.long 0x00 23. "P[23],Group 0 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.long 0x00 22. "P[22],Group 0 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P[21],Group 0 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P[20],Group 0 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P[19],Group 0 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P[18],Group 0 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 17. "P[17],Group 0 interrupt active with priority level 17" "No interrupt,Interrupt" bitfld.long 0x00 16. "P[16],Group 0 interrupt active with priority level 16" "No interrupt,Interrupt" newline bitfld.long 0x00 15. "P[15],Group 0 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P[14],Group 0 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "P[13],Group 0 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P[12],Group 0 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.long 0x00 11. "P[11],Group 0 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "P[10],Group 0 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P[9],Group 0 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P[8],Group 0 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P[7],Group 0 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P[6],Group 0 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P[5],Group 0 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "P[4],Group 0 interrupt active with priority level 4" "No interrupt,Interrupt" newline bitfld.long 0x00 3. "P[3],Group 0 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P[2],Group 0 interrupt active with priority level 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "P[1],Group 0 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P[0],Group 0 interrupt active with priority level 0" "No interrupt,Interrupt" group.long c15:0x409C++0x00 line.long 0x00 "ICH_AP1R0,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0" bitfld.long 0x00 31. "P[31],Group 1 interrupt active with priority level 31" "No interrupt,Interrupt" bitfld.long 0x00 30. "P[30],Group 1 interrupt active with priority level 30" "No interrupt,Interrupt" bitfld.long 0x00 29. "P[29],Group 1 interrupt active with priority level 29" "No interrupt,Interrupt" bitfld.long 0x00 28. "P[28],Group 1 interrupt active with priority level 28" "No interrupt,Interrupt" newline bitfld.long 0x00 27. "P[27],Group 1 interrupt active with priority level 27" "No interrupt,Interrupt" bitfld.long 0x00 26. "P[26],Group 1 interrupt active with priority level 26" "No interrupt,Interrupt" bitfld.long 0x00 25. "P[25],Group 1 interrupt active with priority level 25" "No interrupt,Interrupt" bitfld.long 0x00 24. "P[24],Group 1 interrupt active with priority level 24" "No interrupt,Interrupt" newline bitfld.long 0x00 23. "P[23],Group 1 interrupt active with priority level 23" "No interrupt,Interrupt" bitfld.long 0x00 22. "P[22],Group 1 interrupt active with priority level 22" "No interrupt,Interrupt" bitfld.long 0x00 21. "P[21],Group 1 interrupt active with priority level 21" "No interrupt,Interrupt" bitfld.long 0x00 20. "P[20],Group 1 interrupt active with priority level 20" "No interrupt,Interrupt" newline bitfld.long 0x00 19. "P[19],Group 1 interrupt active with priority level 19" "No interrupt,Interrupt" bitfld.long 0x00 18. "P[18],Group 1 interrupt active with priority level 18" "No interrupt,Interrupt" bitfld.long 0x00 18. "P[17],Group 1 interrupt active with priority level 17" "No interrupt,Interrupt" bitfld.long 0x00 16. "P[16],Group 1 interrupt active with priority level 16" "No interrupt,Interrupt" newline bitfld.long 0x00 15. "P[15],Group 1 interrupt active with priority level 15" "No interrupt,Interrupt" bitfld.long 0x00 14. "P[14],Group 1 interrupt active with priority level 14" "No interrupt,Interrupt" bitfld.long 0x00 13. "P[13],Group 1 interrupt active with priority level 13" "No interrupt,Interrupt" bitfld.long 0x00 12. "P[12],Group 1 interrupt active with priority level 12" "No interrupt,Interrupt" newline bitfld.long 0x00 11. "P[11],Group 1 interrupt active with priority level 11" "No interrupt,Interrupt" bitfld.long 0x00 10. "P[10],Group 1 interrupt active with priority level 10" "No interrupt,Interrupt" bitfld.long 0x00 9. "P[9],Group 1 interrupt active with priority level 9" "No interrupt,Interrupt" bitfld.long 0x00 8. "P[8],Group 1 interrupt active with priority level 8" "No interrupt,Interrupt" newline bitfld.long 0x00 7. "P[7],Group 1 interrupt active with priority level 7" "No interrupt,Interrupt" bitfld.long 0x00 6. "P[6],Group 1 interrupt active with priority level 6" "No interrupt,Interrupt" bitfld.long 0x00 5. "P[5],Group 1 interrupt active with priority level 5" "No interrupt,Interrupt" bitfld.long 0x00 4. "P[4],Group 1 interrupt active with priority level 4" "No interrupt,Interrupt" newline bitfld.long 0x00 3. "P[3],Group 1 interrupt active with priority level 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "P[2],Group 1 interrupt active with priority level 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "P[1],Group 1 interrupt active with priority level 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "P[0],Group 1 interrupt active with priority level 0" "No interrupt,Interrupt" tree.end newline group.long c15:0x40BC++0x00 line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register" bitfld.long 0x00 27.--31. "EOICOUNT,Number of successful write to a virtual EOIR or DIR resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 14. "TDIR,Trap virtual EL1 writes to ICC_DIR" "Not trapped,Trapped" bitfld.long 0x00 12. "TALL1,Trap all virtual EL1 accesses to ICC_* system registers for Group 1 interrupts to EL2" "Not trapped,Trapped" newline bitfld.long 0x00 11. "TALL0,Trap all virtual EL1 accesses to ICC_* system registers for Group 0 interrupts to EL2" "Not trapped,Trapped" bitfld.long 0x00 10. "TC,Trap all virtual EL1 accesses to system registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped" bitfld.long 0x00 7. "VGRP1DIE,VM group 1 disabled interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. "VGRP1EIE,VM group 1 enabled interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 5. "VGRP0DIE,VM group 0 disabled interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. "VGRP0EIE,VM group 0 enabled interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. "NPIE,No pending interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. "LRENPIE,List register entry not present interrupt enable" "Disabled,Enabled" newline bitfld.long 0x00 1. "UIE,Underflow interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled" rgroup.long c15:0x41BC++0x00 line.long 0x00 "ICH_VTR,Interrupt Controller Hypervisor Control VGIC Type Register" bitfld.long 0x00 29.--31. "PRIBITS,Priority bits" "Reserved,Reserved,Reserved,Reserved,5,?..." bitfld.long 0x00 26.--28. "PREBITS,Preemption bits" "Reserved,Reserved,Reserved,Reserved,5,?..." bitfld.long 0x00 23.--25. "IDBITS,The number of virtual interrupt identifier bits supported" "16 bits,?..." bitfld.long 0x00 22. "SEIS,SEI Support" "Not supported,?..." newline bitfld.long 0x00 21. "A3V,Affinity 3 support" "Not supported,?..." bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Reserved,Not supported" bitfld.long 0x00 19. "TDS,Separate trapping EL1 writes to ICV_DIR supported" "Reserved,Supported" bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers" "Reserved,Reserved,Reserved,4,?..." rgroup.long c15:0x42BC++0x00 line.long 0x00 "ICH_MISR,Interrupt Controller Maintenance Interrupt Status Register" bitfld.long 0x00 7. "VGRP1D,vPE group 1 disabled" "No,Yes" bitfld.long 0x00 6. "VGRP1E,vPE group 1 enabled" "Disabled,Enabled" bitfld.long 0x00 5. "VGRP0D,vPE group 0 disabled" "No,Yes" bitfld.long 0x00 4. "VGRP0E,vPE group 0 enabled" "Disabled,Enabled" newline bitfld.long 0x00 3. "NP,No pending maintenance interrupt assertion" "Not asserted,Asserted" bitfld.long 0x00 2. "LRENP,List register entry not present" "Not present,Present" bitfld.long 0x00 1. "U,Underflow assertion" "Not asserted,Asserted" bitfld.long 0x00 0. "EOI,End of interrupt assertion" "Not asserted,Asserted" rgroup.long c15:0x43BC++0x00 line.long 0x00 "ICH_EISR,Interrupt Controller End of Interrupt Status Register" bitfld.long 0x00 3. "STATUS[3],EOI maintenance interrupt status bit for List (ICH_LR3) register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. "STATUS[2],EOI maintenance interrupt status bit for List (ICH_LR2) register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. "STATUS[1],EOI maintenance interrupt status bit for List (ICH_LR1) register 1" "No interrupt,Interrupt" bitfld.long 0x00 0. "STATUS[0],EOI maintenance interrupt status bit for List (ICH_LR0) register 0" "No interrupt,Interrupt" group.long c15:0x47BC++0x00 line.long 0x00 "ICH_VMCR,Interrupt Controller Virtual Machine Control Register" bitfld.long 0x00 27.--31. "VPMR,Virtual priority mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. "VBPR0,Virtual binary point register for group 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. "VBPR1,Virtual binary point register for group 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 9. "VEOIM,Virtual EOI mode" "Drop & interrupt,Drop" newline bitfld.long 0x00 4. "VCBPR,Virtual common binary point register" "Separate,Both" bitfld.long 0x00 1. "VENG1,Virtual group 1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. "VENG0,Virtual group 0 interrupt enable" "Disabled,Enabled" rgroup.long c15:0x45BC++0x00 line.long 0x00 "ICH_ELRSR,Interrupt Controller Empty List Register Status Register" bitfld.long 0x00 3. "STATUS[3],Status bit for list (ICH_LR3) register 3" "Interrupt,No interrupt" bitfld.long 0x00 2. "STATUS[2],Status bit for list (ICH_LR2) register 2" "Interrupt,No interrupt" bitfld.long 0x00 1. "STATUS[1],Status bit for list (ICH_LR1) register 1" "Interrupt,No interrupt" bitfld.long 0x00 0. "STATUS[0],Status bit for list (ICH_LR0) register 0" "Interrupt,No interrupt" group.long c15:(0x40CC+0x0)++0x00 line.long 0x00 "ICH_LR0,Interrupt Controller List Register 0" hexmask.long.word 0x00 0.--15. 1. "VINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x100)++0x00 line.long 0x00 "ICH_LR1,Interrupt Controller List Register 1" hexmask.long.word 0x00 0.--15. 1. "VINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x200)++0x00 line.long 0x00 "ICH_LR2,Interrupt Controller List Register 2" hexmask.long.word 0x00 0.--15. 1. "VINTID,Virtual INTID of the interrupt" group.long c15:(0x40CC+0x300)++0x00 line.long 0x00 "ICH_LR3,Interrupt Controller List Register 3" hexmask.long.word 0x00 0.--15. 1. "VINTID,Virtual INTID of the interrupt" if (((per.l(c15:0x40EC+0x0))&0x20000000)==0x00) group.long c15:(0x40EC+0x0)++0x00 line.long 0x00 "ICH_LRC0,Interrupt Controller List Register 0" bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware" bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1" newline bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 9. "EOI,End of interrupt" "Not EOI,EOI" else group.long c15:(0x40EC+0x0)++0x00 line.long 0x00 "ICH_LRC0,Interrupt Controller List Register 0" bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware" bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1" newline bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" endif if (((per.l(c15:0x40EC+0x100))&0x20000000)==0x00) group.long c15:(0x40EC+0x100)++0x00 line.long 0x00 "ICH_LRC1,Interrupt Controller List Register 1" bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware" bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1" newline bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 9. "EOI,End of interrupt" "Not EOI,EOI" else group.long c15:(0x40EC+0x100)++0x00 line.long 0x00 "ICH_LRC1,Interrupt Controller List Register 1" bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware" bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1" newline bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" endif if (((per.l(c15:0x40EC+0x200))&0x20000000)==0x00) group.long c15:(0x40EC+0x200)++0x00 line.long 0x00 "ICH_LRC2,Interrupt Controller List Register 2" bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware" bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1" newline bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 9. "EOI,End of interrupt" "Not EOI,EOI" else group.long c15:(0x40EC+0x200)++0x00 line.long 0x00 "ICH_LRC2,Interrupt Controller List Register 2" bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware" bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1" newline bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" endif if (((per.l(c15:0x40EC+0x300))&0x20000000)==0x00) group.long c15:(0x40EC+0x300)++0x00 line.long 0x00 "ICH_LRC3,Interrupt Controller List Register 3" bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware" bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1" newline bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 9. "EOI,End of interrupt" "Not EOI,EOI" else group.long c15:(0x40EC+0x300)++0x00 line.long 0x00 "ICH_LRC3,Interrupt Controller List Register 3" bitfld.long 0x00 30.--31. "STATE,Interrupt state" "Inactive,Pending,Active,Pending and active" bitfld.long 0x00 29. "HW,Virtual interrupt maps directly to a hardware interrupt" "Software,Hardware" bitfld.long 0x00 28. "GROUP,Group for this virtual interrupt" "Group 0,Group 1" newline bitfld.long 0x00 19.--23. "PRIORITY,Priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts" endif tree.end tree.end AUTOINDENT.OFF AUTOINDENT.ON center tree tree "Debug Registers" tree "Coresight Management Registers" rgroup.long c14:0x0000++0x00 line.long 0x00 "DBGDIDR,Debug ID Register" bitfld.long 0x00 28.--31. "WRP,Number of watchpoint register pairs" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,?..." bitfld.long 0x00 24.--27. "BRP,Number of breakpoint register pairs" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,8,?..." bitfld.long 0x00 20.--23. "CTX_CMP,Number of BRPs with context ID comparison capability" "Reserved,2,?..." newline bitfld.long 0x00 16.--19. "VERSION,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8,?..." bitfld.long 0x00 14. "NSUHD_IMP,Secure user halting debug-mode" "Not supported,?..." bitfld.long 0x00 12. "SE_IMP,Security extensions implemented" "Not implemented,?..." rgroup.long c14:0x0060++0x00 line.long 0x00 "DBGWFAR,Debug Watchpoint Fault Address Register" group.long c14:0x0070++0x00 line.long 0x00 "DBGVCR,Debug Vector Catch Register" bitfld.long 0x00 7. "FIQVCE,FIQ vector catch enable" "Disabled,Enabled" bitfld.long 0x00 6. "IRQVCE,IRQ vector catch enable" "Disabled,Enabled" bitfld.long 0x00 4. "DAVCE,Data abort vector catch enable" "Disabled,Enabled" newline bitfld.long 0x00 3. "PAVCE,Prefetch abort vector catch enable" "Disabled,Enabled" bitfld.long 0x00 2. "SVCVCE,Supervisor call (SVC) vector catch enable" "Disabled,Enabled" bitfld.long 0x00 1. "UIVCE,Undefined instruction vector catch enable" "Disabled,Enabled" group.long c14:0x0200++0x00 line.long 0x00 "DBGDTRRXEXT,Debug Receive Register (External View)" rgroup.long c14:0x0050++0x00 line.long 0x00 "DBGDTRRXINT,Debug Receive Register (Internal View)" group.long c14:0x0020++0x00 line.long 0x00 "DBGDCCINT,Debug Comms Channel Interrupt Enable Register" bitfld.long 0x00 30. "RX,DCC interrupt enable controls" "Disabled,Enabled" bitfld.long 0x00 29. "TX,DCC interrupt enable controls" "Disabled,Enabled" rgroup.long c14:0x0010++0x00 line.long 0x00 "DBGDSCRINT,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. "RXFULL,DBGDTRRX register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX register full" "Empty,Full" bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure" newline bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" bitfld.long 0x00 12. "UDCCDIS,User mode access to communications channel disable" "No,Yes" bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,Software breakpoint (BKPT),Reserved,Vector catch,Reserved,Reserved,Reserved,Reserved,Watchpoint,?..." if (((per.l(c14:0x0411))&0x02)==0x02) group.long c14:0x0220++0x00 line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)" bitfld.long 0x00 30. "RXFULL,DBGDTRRX register full" "Empty,Full" bitfld.long 0x00 29. "TXFULL,DBGDTRTX register full" "Empty,Full" bitfld.long 0x00 27. "RXO,DBGDTRRX overflow" "No overflow,Overflow" newline bitfld.long 0x00 26. "TXU,DBGDTRTX underflow" "No underflow,Underflow" bitfld.long 0x00 22.--23. "INTDIS,Interrupt disable" "Don't disable interrupts,Disable interrupts targeting non-sec EL1,Disable interrupts targeting EL1 & EL2,Disable all interrupts" bitfld.long 0x00 21. "TDA,Trap debug register access" "Not trapped,Trapped" newline rbitfld.long 0x00 18. "NS,Non-secure status bit" "Reserved,Non-secure" bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" bitfld.long 0x00 14. "HDE,Halting debug-mode" "Disabled,Enabled" newline bitfld.long 0x00 12. "UDCCDIS,User mode access to communications channel disable" "No,Yes" bitfld.long 0x00 6. "ERR,Cummulative error flag" "Not error,Error" bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,Software breakpoint (BKPT),Reserved,Vector catch,Reserved,Reserved,Reserved,Reserved,Watchpoint,?..." else group.long c14:0x0220++0x00 line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)" rbitfld.long 0x00 30. "RXFULL,DBGDTRRX register full" "Empty,Full" rbitfld.long 0x00 29. "TXFULL,DBGDTRTX register full" "Empty,Full" rbitfld.long 0x00 27. "RXO,DBGDTRRX overflow" "No overflow,Overflow" newline rbitfld.long 0x00 26. "TXU,DBGDTRTX underflow" "No underflow,Underflow" rbitfld.long 0x00 22.--23. "INTDIS,Interrupt disable" "Don't disable interrupts,Disable interrupts targeting non-sec EL1,Disable interrupts targeting EL1 & EL2,Disable all interrupts" rbitfld.long 0x00 21. "TDA,Trap debug register access" "Not trapped,Trapped" newline rbitfld.long 0x00 18. "NS,Non-secure status bit" "Reserved,Non-secure" bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled" rbitfld.long 0x00 14. "HDE,Halting debug-mode" "Disabled,Enabled" newline bitfld.long 0x00 12. "UDCCDIS,User mode access to communications channel disable" "No,Yes" rbitfld.long 0x00 6. "ERR,Cummulative error flag" "Not error,Error" bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,Software breakpoint (BKPT),Reserved,Vector catch,Reserved,Reserved,Reserved,Reserved,Watchpoint,?..." endif group.long c14:0x0230++0x00 line.long 0x00 "DBGDTRTXEXT,Debug Transmit Register (External View)" if (((per.l(c14:0x0411))&0x02)==0x02) group.long c14:0x0260++0x00 line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register" else rgroup.long c14:0x0260++0x00 line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register" endif wgroup.long c14:0x0050++0x00 line.long 0x00 "DBGDTRTXINT,Debug Transmit Register (Internal View)" rgroup.long c14:0x0707++0x00 line.long 0x00 "DBGDEVID2,Debug Device ID Register 2" rgroup.long c14:0x0717++0x00 line.long 0x00 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. "PCSROFFSET,PC samples returned offset" "Reserved,Reserved,No offset,?..." rgroup.long c14:0x0727++0x00 line.long 0x00 "DBGDEVID0,Debug Device ID Register 0" bitfld.long 0x00 28.--31. "CIDMASK,Level of support for the context ID matching breakpoint masking capability." "Not implemented,?..." bitfld.long 0x00 24.--27. "AR,Debug external auxiliary control register support status" "Not supported,?..." bitfld.long 0x00 20.--23. "DL,Support for debug OS double lock register" "Reserved,Supported,?..." newline bitfld.long 0x00 16.--19. "VE,Specifies implementation of virtualization extension" "Reserved,Implemented,?..." bitfld.long 0x00 12.--15. "VC,Form of the vector catch event implemented" "Implemented,?..." bitfld.long 0x00 8.--11. "BPAM,Level of support for immediate virtual address matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" newline bitfld.long 0x00 4.--7. "WPAM,Level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..." bitfld.long 0x00 0.--3. "PCS,Level of support for program counter sampling using debug registers 40 and 43" "Reserved,Reserved,Reserved,Implemented,?..." tree.end newline rgroup.long c14:0x0001++0x00 line.long 0x00 "DBGDRAR,Debug ROM Address Register" hexmask.long 0x00 12.--31. 0x1000 "ROMADDR,ROM physical address" bitfld.long 0x00 0. "VALID,ROM table address valid" "Not valid,Valid" rgroup.long c14:0x0002++0x00 line.long 0x00 "DBGDSAR,Debug Self Address Register" wgroup.long c14:0x0401++0x00 line.long 0x00 "DBGOSLAR,Operating System Lock Access Register" rgroup.long c14:0x0411++0x00 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 2. "NTT,32-bit access" "Not required,Required" bitfld.long 0x00 1. "OSLK,Status of the OS Lock" "Not locked,Locked" bitfld.long 0x00 0. 3. "OSLM,OS Lock Model implemented Bit" "Reserved,Reserved,Implemented,?..." group.long c14:0x0431++0x00 line.long 0x00 "DBGOSDLR,OS Double-lock Register" bitfld.long 0x00 0. "DLK,OS double-lock control" "Not locked,Locked" group.long c14:0x0441++0x00 line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 0. "CORENPDRQ,Core No Power down Request" "Powered down,Emulated" group.long c14:0x0687++0x00 line.long 0x00 "DBGCLAIMSET,Debug Claim Tag Set Register" bitfld.long 0x00 7. "CT7,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x00 6. "CT6,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x00 5. "CT5,Claim Tag 5 Set" "Not set,Set" newline bitfld.long 0x00 4. "CT4,Claim Tag 4 Set" "Not set,Set" bitfld.long 0x00 3. "CT3,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x00 2. "CT2,Claim Tag 2 Set" "Not set,Set" newline bitfld.long 0x00 1. "CT1,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x00 0. "CT0,Claim Tag 0 Set" "Not set,Set" group.long c14:0x0697++0x00 line.long 0x00 "DBGCLAIMCLR,Debug Claim Tag Clear Register" bitfld.long 0x00 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x00 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x00 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared" newline bitfld.long 0x00 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared" bitfld.long 0x00 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x00 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared" newline bitfld.long 0x00 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x00 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared" rgroup.long c14:0x06E7++0x00 line.long 0x00 "DBGAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 10.--11. "HNID,Hyp non-invasive debug" "Reserved,Reserved,Disabled,Enabled" bitfld.long 0x00 8.--9. "HID,Hyp invasive debug" "Reserved,Reserved,Disabled,Enabled" bitfld.long 0x00 6.--7. "SNID,Secure non-invasive debug" "Not implemented,?..." newline bitfld.long 0x00 4.--5. "SID,Secure invasive debug" "Not implemented,?..." bitfld.long 0x00 2.--3. "NSNID,Non-secure non-invasive debug" "Reserved,Reserved,Disabled,Enabled" bitfld.long 0x00 0.--1. "NSID,Non-secure invasive debug" "Reserved,Reserved,Disabled,Enabled" rgroup.long c14:0x7000++0x00 "Jazelle Registers" line.long 0x00 "JIDR,Jazelle ID Register" rgroup.long c14:0x7001++0x00 line.long 0x00 "JOSCR,Jazelle OS Control Register" rgroup.long c14:0x7002++0x00 line.long 0x00 "JMCR,Jazelle Main Configuration Register" tree.end tree "Breakpoint Registers" tree "Breakpoint 0" if (((per.l(c14:0x0500+0x0))&0xA00000)==0x0) group.long c14:(0x0400+0x0)++0x00 line.long 0x00 "DBGBVR0,Debug Breakpoint Value Register" hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)" elif (((per.l(c14:0x0500+0x0))&0xA00000)==(0xA00000||0x200000)) group.long c14:(0x0400+0x0)++0x00 line.long 0x00 "DBGBVR0,Debug Breakpoint Value Register" else rgroup.long c14:(0x0400+0x0)++0x00 line.long 0x00 "DBGBVR0,Debug Breakpoint Value Register" endif if ((per.l(c14:0x0500+0x0)&0x2000)==0x2000) if ((per.l(c14:0x0500+0x0)&0xC000)==(0x0000||0x4000)) group.long c14:(0x0500+0x0)++0x00 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif ((per.l(c14:0x0500+0x0)&0xC000)==0x8000) group.long c14:(0x0500+0x0)++0x00 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x0)++0x00 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x0)++0x00 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif tree.end tree "Breakpoint 1" if (((per.l(c14:0x0500+0x10))&0xA00000)==0x0) group.long c14:(0x0400+0x10)++0x00 line.long 0x00 "DBGBVR1,Debug Breakpoint Value Register" hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)" elif (((per.l(c14:0x0500+0x10))&0xA00000)==(0xA00000||0x200000)) group.long c14:(0x0400+0x10)++0x00 line.long 0x00 "DBGBVR1,Debug Breakpoint Value Register" else rgroup.long c14:(0x0400+0x10)++0x00 line.long 0x00 "DBGBVR1,Debug Breakpoint Value Register" endif if ((per.l(c14:0x0500+0x10)&0x2000)==0x2000) if ((per.l(c14:0x0500+0x10)&0xC000)==(0x0000||0x4000)) group.long c14:(0x0500+0x10)++0x00 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif ((per.l(c14:0x0500+0x10)&0xC000)==0x8000) group.long c14:(0x0500+0x10)++0x00 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x10)++0x00 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x10)++0x00 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif tree.end tree "Breakpoint 2" if (((per.l(c14:0x0500+0x20))&0xA00000)==0x0) group.long c14:(0x0400+0x20)++0x00 line.long 0x00 "DBGBVR2,Debug Breakpoint Value Register" hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)" elif (((per.l(c14:0x0500+0x20))&0xA00000)==(0xA00000||0x200000)) group.long c14:(0x0400+0x20)++0x00 line.long 0x00 "DBGBVR2,Debug Breakpoint Value Register" else rgroup.long c14:(0x0400+0x20)++0x00 line.long 0x00 "DBGBVR2,Debug Breakpoint Value Register" endif if ((per.l(c14:0x0500+0x20)&0x2000)==0x2000) if ((per.l(c14:0x0500+0x20)&0xC000)==(0x0000||0x4000)) group.long c14:(0x0500+0x20)++0x00 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif ((per.l(c14:0x0500+0x20)&0xC000)==0x8000) group.long c14:(0x0500+0x20)++0x00 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x20)++0x00 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x20)++0x00 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif tree.end tree "Breakpoint 3" if (((per.l(c14:0x0500+0x30))&0xA00000)==0x0) group.long c14:(0x0400+0x30)++0x00 line.long 0x00 "DBGBVR3,Debug Breakpoint Value Register" hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)" elif (((per.l(c14:0x0500+0x30))&0xA00000)==(0xA00000||0x200000)) group.long c14:(0x0400+0x30)++0x00 line.long 0x00 "DBGBVR3,Debug Breakpoint Value Register" else rgroup.long c14:(0x0400+0x30)++0x00 line.long 0x00 "DBGBVR3,Debug Breakpoint Value Register" endif if ((per.l(c14:0x0500+0x30)&0x2000)==0x2000) if ((per.l(c14:0x0500+0x30)&0xC000)==(0x0000||0x4000)) group.long c14:(0x0500+0x30)++0x00 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif ((per.l(c14:0x0500+0x30)&0xC000)==0x8000) group.long c14:(0x0500+0x30)++0x00 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x30)++0x00 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x30)++0x00 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif tree.end tree "Breakpoint 4" if (((per.l(c14:0x0500+0x40))&0xA00000)==0x0) group.long c14:(0x0400+0x40)++0x00 line.long 0x00 "DBGBVR4,Debug Breakpoint Value Register" hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)" elif (((per.l(c14:0x0500+0x40))&0xA00000)==(0xA00000||0x200000)) group.long c14:(0x0400+0x40)++0x00 line.long 0x00 "DBGBVR4,Debug Breakpoint Value Register" else rgroup.long c14:(0x0400+0x40)++0x00 line.long 0x00 "DBGBVR4,Debug Breakpoint Value Register" endif if ((per.l(c14:0x0500+0x40)&0x2000)==0x2000) if ((per.l(c14:0x0500+0x40)&0xC000)==(0x0000||0x4000)) group.long c14:(0x0500+0x40)++0x00 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif ((per.l(c14:0x0500+0x40)&0xC000)==0x8000) group.long c14:(0x0500+0x40)++0x00 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x40)++0x00 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x40)++0x00 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif tree.end tree "Breakpoint 5" if (((per.l(c14:0x0500+0x50))&0xA00000)==0x0) group.long c14:(0x0400+0x50)++0x00 line.long 0x00 "DBGBVR5,Debug Breakpoint Value Register" hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)" elif (((per.l(c14:0x0500+0x50))&0xA00000)==(0xA00000||0x200000)) group.long c14:(0x0400+0x50)++0x00 line.long 0x00 "DBGBVR5,Debug Breakpoint Value Register" else rgroup.long c14:(0x0400+0x50)++0x00 line.long 0x00 "DBGBVR5,Debug Breakpoint Value Register" endif if ((per.l(c14:0x0500+0x50)&0x2000)==0x2000) if ((per.l(c14:0x0500+0x50)&0xC000)==(0x0000||0x4000)) group.long c14:(0x0500+0x50)++0x00 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif ((per.l(c14:0x0500+0x50)&0xC000)==0x8000) group.long c14:(0x0500+0x50)++0x00 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x50)++0x00 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x50)++0x00 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif tree.end tree "Breakpoint 6" if (((per.l(c14:0x0500+0x60))&0xA00000)==0x0) group.long c14:(0x0400+0x60)++0x00 line.long 0x00 "DBGBVR6,Debug Breakpoint Value Register" hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)" elif (((per.l(c14:0x0500+0x60))&0xA00000)==(0xA00000||0x200000)) group.long c14:(0x0400+0x60)++0x00 line.long 0x00 "DBGBVR6,Debug Breakpoint Value Register" else rgroup.long c14:(0x0400+0x60)++0x00 line.long 0x00 "DBGBVR6,Debug Breakpoint Value Register" endif group.long c14:(0x0101+0x60)++0x00 line.long 0x00 "DBGBXVR6,Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. "VMID,VMID value for comparison" if ((per.l(c14:0x0500+0x60)&0x2000)==0x2000) if ((per.l(c14:0x0500+0x60)&0xC000)==(0x0000||0x4000)) group.long c14:(0x0500+0x60)++0x00 line.long 0x00 "DBGBCR6,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif ((per.l(c14:0x0500+0x60)&0xC000)==0x8000) group.long c14:(0x0500+0x60)++0x00 line.long 0x00 "DBGBCR6,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x60)++0x00 line.long 0x00 "DBGBCR6,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x60)++0x00 line.long 0x00 "DBGBCR6,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif tree.end tree "Breakpoint 7" if (((per.l(c14:0x0500+0x70))&0xA00000)==0x0) group.long c14:(0x0400+0x70)++0x00 line.long 0x00 "DBGBVR7,Debug Breakpoint Value Register" hexmask.long 0x0 2.--31. 0x4 "VA,Address Value for comparison bits (31:2)" elif (((per.l(c14:0x0500+0x70))&0xA00000)==(0xA00000||0x200000)) group.long c14:(0x0400+0x70)++0x00 line.long 0x00 "DBGBVR7,Debug Breakpoint Value Register" else rgroup.long c14:(0x0400+0x70)++0x00 line.long 0x00 "DBGBVR7,Debug Breakpoint Value Register" endif group.long c14:(0x0101+0x70)++0x00 line.long 0x00 "DBGBXVR7,Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. "VMID,VMID value for comparison" if ((per.l(c14:0x0500+0x70)&0x2000)==0x2000) if ((per.l(c14:0x0500+0x70)&0xC000)==(0x0000||0x4000)) group.long c14:(0x0500+0x70)++0x00 line.long 0x00 "DBGBCR7,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" elif ((per.l(c14:0x0500+0x70)&0xC000)==0x8000) group.long c14:(0x0500+0x70)++0x00 line.long 0x00 "DBGBCR7,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" else group.long c14:(0x0500+0x70)++0x00 line.long 0x00 "DBGBCR7,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif else group.long c14:(0x0500+0x70)++0x00 line.long 0x00 "DBGBCR7,Breakpoint Control Register" bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch" bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID" bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled" newline bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" newline bitfld.long 0x00 5.--8. "BAS,Byte 3 address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111" bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System,System,User,User/System" bitfld.long 0x00 0. "E,Breakpoint enable" "Disabled,Enabled" endif tree.end tree.end tree "Watchpoint Registers" tree "Watchpoint 0" group.long c14:(0x0600+0x0)++0x00 line.long 0x00 "DBGWVR0,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "VA,Address value" if ((per.l(c14:0x0700+0x0)&0x2000)==0x2000) if ((per.l(c14:(0x0700+0x0))&0xC000)==(0x0000||0x4000)) group.long c14:(0x0700+0x0)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" elif ((per.l(c14:0x0700+0x0)&0xC000)==0x8000) group.long c14:(0x0700+0x0)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" else group.long c14:(0x0700+0x0)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x0)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif tree.end tree "Watchpoint 1" group.long c14:(0x0600+0x10)++0x00 line.long 0x00 "DBGWVR1,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "VA,Address value" if ((per.l(c14:0x0700+0x10)&0x2000)==0x2000) if ((per.l(c14:(0x0700+0x10))&0xC000)==(0x0000||0x4000)) group.long c14:(0x0700+0x10)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" elif ((per.l(c14:0x0700+0x10)&0xC000)==0x8000) group.long c14:(0x0700+0x10)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" else group.long c14:(0x0700+0x10)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x10)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif tree.end tree "Watchpoint 2" group.long c14:(0x0600+0x20)++0x00 line.long 0x00 "DBGWVR2,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "VA,Address value" if ((per.l(c14:0x0700+0x20)&0x2000)==0x2000) if ((per.l(c14:(0x0700+0x20))&0xC000)==(0x0000||0x4000)) group.long c14:(0x0700+0x20)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" elif ((per.l(c14:0x0700+0x20)&0xC000)==0x8000) group.long c14:(0x0700+0x20)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" else group.long c14:(0x0700+0x20)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x20)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif tree.end tree "Watchpoint 3" group.long c14:(0x0600+0x30)++0x00 line.long 0x00 "DBGWVR3,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "VA,Address value" if ((per.l(c14:0x0700+0x30)&0x2000)==0x2000) if ((per.l(c14:(0x0700+0x30))&0xC000)==(0x0000||0x4000)) group.long c14:(0x0700+0x30)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" elif ((per.l(c14:0x0700+0x30)&0xC000)==0x8000) group.long c14:(0x0700+0x30)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" else group.long c14:(0x0700+0x30)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x30)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif tree.end tree "Watchpoint 4" group.long c14:(0x0600+0x40)++0x00 line.long 0x00 "DBGWVR4,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "VA,Address value" if ((per.l(c14:0x0700+0x40)&0x2000)==0x2000) if ((per.l(c14:(0x0700+0x40))&0xC000)==(0x0000||0x4000)) group.long c14:(0x0700+0x40)++0x00 line.long 0x00 "DBGWCR4,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" elif ((per.l(c14:0x0700+0x40)&0xC000)==0x8000) group.long c14:(0x0700+0x40)++0x00 line.long 0x00 "DBGWCR4,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" else group.long c14:(0x0700+0x40)++0x00 line.long 0x00 "DBGWCR4,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x40)++0x00 line.long 0x00 "DBGWCR4,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif tree.end tree "Watchpoint 5" group.long c14:(0x0600+0x50)++0x00 line.long 0x00 "DBGWVR5,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "VA,Address value" if ((per.l(c14:0x0700+0x50)&0x2000)==0x2000) if ((per.l(c14:(0x0700+0x50))&0xC000)==(0x0000||0x4000)) group.long c14:(0x0700+0x50)++0x00 line.long 0x00 "DBGWCR5,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" elif ((per.l(c14:0x0700+0x50)&0xC000)==0x8000) group.long c14:(0x0700+0x50)++0x00 line.long 0x00 "DBGWCR5,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" else group.long c14:(0x0700+0x50)++0x00 line.long 0x00 "DBGWCR5,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x50)++0x00 line.long 0x00 "DBGWCR5,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif tree.end tree "Watchpoint 6" group.long c14:(0x0600+0x60)++0x00 line.long 0x00 "DBGWVR6,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "VA,Address value" if ((per.l(c14:0x0700+0x60)&0x2000)==0x2000) if ((per.l(c14:(0x0700+0x60))&0xC000)==(0x0000||0x4000)) group.long c14:(0x0700+0x60)++0x00 line.long 0x00 "DBGWCR6,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" elif ((per.l(c14:0x0700+0x60)&0xC000)==0x8000) group.long c14:(0x0700+0x60)++0x00 line.long 0x00 "DBGWCR6,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" else group.long c14:(0x0700+0x60)++0x00 line.long 0x00 "DBGWCR6,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x60)++0x00 line.long 0x00 "DBGWCR6,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif tree.end tree "Watchpoint 7" group.long c14:(0x0600+0x70)++0x00 line.long 0x00 "DBGWVR7,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 "VA,Address value" if ((per.l(c14:0x0700+0x70)&0x2000)==0x2000) if ((per.l(c14:(0x0700+0x70))&0xC000)==(0x0000||0x4000)) group.long c14:(0x0700+0x70)++0x00 line.long 0x00 "DBGWCR7,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System/Supervisor,Reserved,User/System/Supervisor" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" elif ((per.l(c14:0x0700+0x70)&0xC000)==0x8000) group.long c14:(0x0700+0x70)++0x00 line.long 0x00 "DBGWCR7,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,Reserved,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" else group.long c14:(0x0700+0x70)++0x00 line.long 0x00 "DBGWCR7,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Supervisor,?..." bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif else group.long c14:(0x0700+0x70)++0x00 line.long 0x00 "DBGWCR7,Watchpoint Control Register" bitfld.long 0x00 24.--28. "MASK,Address mask" "No mask,Reserved,Reserved,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20. "WT,Watchpoint type" "Unlinked,Linked" bitfld.long 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..." bitfld.long 0x00 13. "HMC,Hyp mode control" "Disabled,Enabled" hexmask.long.byte 0x00 5.--12. 0x02 "BAS,Byte address select" newline bitfld.long 0x00 3.--4. "LSC,Load/Store control" "Reserved,Load,Store,Both" bitfld.long 0x00 1.--2. "PAC,Privileged mode control" "Reserved,System,User,User/System" bitfld.long 0x00 0. "E,Enable" "Disabled,Enabled" endif tree.end tree.end AUTOINDENT.OFF AUTOINDENT.POP AUTOINDENT.PUSH AUTOINDENT.OFF tree.open "Interrupt Controller (GIC-500)" sif COMP.AVAILABLE("GICD") AUTOINDENT.ON center tree base COMP.BASE("GICD",-1.) tree "Distributor Interface" group.long 0x0000++0x03 "Interrupt Controller Distributor" line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 31. "RWP,Register Write Pending" "Not pending,Pending" rbitfld.long 0x00 7. "E1NWF,Enable 1 of N Wakeup Functionality" "Disabled,Enabled" rbitfld.long 0x00 6. "DS,Disable Security" "Reserved,Yes" newline rbitfld.long 0x00 4. "ARE_S,Affinity Routing Enable" "Reserved,Enabled" bitfld.long 0x00 1. "ENABLEGRP1,Group 1 interrupts Enable" "Disabled,Enabled" bitfld.long 0x00 0. "ENABLEGRP0,Group 1 interrupts Enable" "Disabled,Enabled" rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 25. "NO1N,GIC Distributor supports 1 of N SPIs" "Reserved,Not supported" bitfld.long 0x00 24. "A3V,GIC Distributor supports non zero values of Affinity level 3" "Supported,?..." bitfld.long 0x00 19.--23. "IDBITS,Number of INTID bits that the GIC Distributor supports" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,10 bits,?..." newline bitfld.long 0x00 18. "DVIS,GIC Distributor supports Direct Virtual LPI injection" "Not supported,?..." bitfld.long 0x00 17. "LPIS,GIC Distributor supports Locality-specific Peripheral Interrupts" "Not supported,?..." bitfld.long 0x00 16. "MBIS,GIC Distributor supports Message-Based Interrupts Supported" "Not supported,?..." newline bitfld.long 0x00 10. "SECURITYEXTN,Indicates whether interrupt controller implements the security extensions" "Not implemented,?..." bitfld.long 0x00 5.--7. "CPUNUMBER,Number of cores that can be used as interrupt targets when GICD_CTLR.ARE is 0" "Not supported,?..." bitfld.long 0x00 0.--4. "ITLINESNUMBER,Number of SPI INTIDs that the GIC Distributor supports" "Reserved,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Reserved" rgroup.long 0x0008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register" hexmask.long.byte 0x00 24.--31. 1. "PRODUCTID,Product ID" bitfld.long 0x00 16.--19. "VARIANT,Major revision number" "r0p0,?..." newline bitfld.long 0x00 12.--15. "REVISION,Minor revision number" "r0p0,?..." hexmask.long.word 0x00 0.--11. 1. "IMPLEMENTER,Implementer" tree "Group Registers" if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x84))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1)) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 (Secure Access)" bitfld.long 0x00 31. "GSB63,Group Status Bit 63" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB62,Group Status Bit 62" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB61,Group Status Bit 61" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB60,Group Status Bit 60" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB59,Group Status Bit 59" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB58,Group Status Bit 58" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB57,Group Status Bit 57" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB56,Group Status Bit 56" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB55,Group Status Bit 55" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB54,Group Status Bit 54" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB53,Group Status Bit 53" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB52,Group Status Bit 52" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB51,Group Status Bit 51" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB50,Group Status Bit 50" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB49,Group Status Bit 49" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB48,Group Status Bit 48" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB47,Group Status Bit 47" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB46,Group Status Bit 46" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB45,Group Status Bit 45" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB44,Group Status Bit 44" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB43,Group Status Bit 43" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB42,Group Status Bit 42" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB41,Group Status Bit 41" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB40,Group Status Bit 40" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB39,Group Status Bit 39" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB38,Group Status Bit 38" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB37,Group Status Bit 37" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB36,Group Status Bit 36" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB35,Group Status Bit 35" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB34,Group Status Bit 34" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB33,Group Status Bit 33" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB32,Group Status Bit 32" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1)) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 " bitfld.long 0x00 31. "GSB63,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. "GSB62,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. "GSB61,Group Status Bit 61" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB60,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. "GSB59,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. "GSB58,Group Status Bit 58" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB57,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. "GSB56,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. "GSB55,Group Status Bit 55" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB54,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. "GSB53,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. "GSB52,Group Status Bit 52" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB51,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. "GSB50,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. "GSB49,Group Status Bit 49" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB48,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. "GSB47,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. "GSB46,Group Status Bit 46" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB45,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. "GSB44,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. "GSB43,Group Status Bit 43" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB42,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. "GSB41,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. "GSB40,Group Status Bit 40" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB39,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. "GSB38,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. "GSB37,Group Status Bit 37" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB36,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. "GSB35,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. "GSB34,Group Status Bit 34" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB33,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. "GSB32,Group Status Bit 32" "Group 0,Group 1" else rgroup.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 " endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x88))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2)) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 (Secure Access)" bitfld.long 0x00 31. "GSB95,Group Status Bit 95" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB94,Group Status Bit 94" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB93,Group Status Bit 93" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB92,Group Status Bit 92" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB91,Group Status Bit 91" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB90,Group Status Bit 90" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB89,Group Status Bit 89" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB88,Group Status Bit 88" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB87,Group Status Bit 87" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB86,Group Status Bit 86" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB85,Group Status Bit 85" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB84,Group Status Bit 84" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB83,Group Status Bit 83" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB82,Group Status Bit 82" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB81,Group Status Bit 81" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB80,Group Status Bit 80" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB79,Group Status Bit 79" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB78,Group Status Bit 78" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB77,Group Status Bit 77" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB76,Group Status Bit 76" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB75,Group Status Bit 75" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB74,Group Status Bit 74" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB73,Group Status Bit 73" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB72,Group Status Bit 72" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB71,Group Status Bit 71" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB70,Group Status Bit 70" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB69,Group Status Bit 69" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB68,Group Status Bit 68" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB67,Group Status Bit 67" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB66,Group Status Bit 66" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB65,Group Status Bit 65" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB64,Group Status Bit 64" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2)) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 " bitfld.long 0x00 31. "GSB95,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. "GSB94,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. "GSB93,Group Status Bit 93" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB92,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. "GSB91,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. "GSB90,Group Status Bit 90" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB89,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. "GSB88,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. "GSB87,Group Status Bit 87" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB86,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. "GSB85,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. "GSB84,Group Status Bit 84" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB83,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. "GSB82,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. "GSB81,Group Status Bit 81" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB80,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. "GSB79,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. "GSB78,Group Status Bit 78" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB77,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. "GSB76,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. "GSB75,Group Status Bit 75" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB74,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. "GSB73,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. "GSB72,Group Status Bit 72" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB71,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. "GSB70,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. "GSB69,Group Status Bit 69" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB68,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. "GSB67,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. "GSB66,Group Status Bit 66" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB65,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. "GSB64,Group Status Bit 64" "Group 0,Group 1" else rgroup.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 " endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x8C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3)) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 (Secure Access)" bitfld.long 0x00 31. "GSB127,Group Status Bit 127" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB126,Group Status Bit 126" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB125,Group Status Bit 125" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB124,Group Status Bit 124" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB123,Group Status Bit 123" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB122,Group Status Bit 122" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB121,Group Status Bit 121" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB120,Group Status Bit 120" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB119,Group Status Bit 119" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB118,Group Status Bit 118" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB117,Group Status Bit 117" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB116,Group Status Bit 116" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB115,Group Status Bit 115" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB114,Group Status Bit 114" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB113,Group Status Bit 113" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB112,Group Status Bit 112" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB111,Group Status Bit 111" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB110,Group Status Bit 110" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB109,Group Status Bit 109" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB108,Group Status Bit 108" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB107,Group Status Bit 107" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB106,Group Status Bit 106" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB105,Group Status Bit 105" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB104,Group Status Bit 104" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB103,Group Status Bit 103" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB102,Group Status Bit 102" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB101,Group Status Bit 101" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB100,Group Status Bit 100" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB99,Group Status Bit 99" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB98,Group Status Bit 98" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB97,Group Status Bit 97" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB96,Group Status Bit 96" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3)) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 " bitfld.long 0x00 31. "GSB127,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. "GSB126,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. "GSB125,Group Status Bit 125" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB124,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. "GSB123,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. "GSB122,Group Status Bit 122" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB121,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. "GSB120,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. "GSB119,Group Status Bit 119" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB118,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. "GSB117,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. "GSB116,Group Status Bit 116" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB115,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. "GSB114,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. "GSB113,Group Status Bit 113" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB112,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. "GSB111,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. "GSB110,Group Status Bit 110" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB109,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. "GSB108,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. "GSB107,Group Status Bit 107" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB106,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. "GSB105,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. "GSB104,Group Status Bit 104" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB103,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. "GSB102,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. "GSB101,Group Status Bit 101" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB100,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. "GSB99,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. "GSB98,Group Status Bit 98" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB97,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. "GSB96,Group Status Bit 96" "Group 0,Group 1" else rgroup.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 " endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x90))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4)) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 (Secure Access)" bitfld.long 0x00 31. "GSB159,Group Status Bit 159" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB158,Group Status Bit 158" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB157,Group Status Bit 157" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB156,Group Status Bit 156" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB155,Group Status Bit 155" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB154,Group Status Bit 154" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB153,Group Status Bit 153" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB152,Group Status Bit 152" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB151,Group Status Bit 151" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB150,Group Status Bit 150" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB149,Group Status Bit 149" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB148,Group Status Bit 148" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB147,Group Status Bit 147" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB146,Group Status Bit 146" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB145,Group Status Bit 145" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB144,Group Status Bit 144" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB143,Group Status Bit 143" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB142,Group Status Bit 142" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB141,Group Status Bit 141" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB140,Group Status Bit 140" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB139,Group Status Bit 139" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB138,Group Status Bit 138" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB137,Group Status Bit 137" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB136,Group Status Bit 136" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB135,Group Status Bit 135" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB134,Group Status Bit 134" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB133,Group Status Bit 133" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB132,Group Status Bit 132" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB131,Group Status Bit 131" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB130,Group Status Bit 130" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB129,Group Status Bit 129" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB128,Group Status Bit 128" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4)) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 " bitfld.long 0x00 31. "GSB159,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. "GSB158,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. "GSB157,Group Status Bit 157" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB156,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. "GSB155,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. "GSB154,Group Status Bit 154" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB153,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. "GSB152,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. "GSB151,Group Status Bit 151" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB150,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. "GSB149,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. "GSB148,Group Status Bit 148" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB147,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. "GSB146,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. "GSB145,Group Status Bit 145" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB144,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. "GSB143,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. "GSB142,Group Status Bit 142" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB141,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. "GSB140,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. "GSB139,Group Status Bit 139" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB138,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. "GSB137,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. "GSB136,Group Status Bit 136" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB135,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. "GSB134,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. "GSB133,Group Status Bit 133" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB132,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. "GSB131,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. "GSB130,Group Status Bit 130" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB129,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. "GSB128,Group Status Bit 128" "Group 0,Group 1" else rgroup.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 " endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x94))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5)) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 (Secure Access)" bitfld.long 0x00 31. "GSB191,Group Status Bit 191" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB190,Group Status Bit 190" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB189,Group Status Bit 189" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB188,Group Status Bit 188" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB187,Group Status Bit 187" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB186,Group Status Bit 186" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB185,Group Status Bit 185" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB184,Group Status Bit 184" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB183,Group Status Bit 183" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB182,Group Status Bit 182" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB181,Group Status Bit 181" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB180,Group Status Bit 180" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB179,Group Status Bit 179" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB178,Group Status Bit 178" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB177,Group Status Bit 177" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB176,Group Status Bit 176" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB175,Group Status Bit 175" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB174,Group Status Bit 174" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB173,Group Status Bit 173" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB172,Group Status Bit 172" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB171,Group Status Bit 171" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB170,Group Status Bit 170" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB169,Group Status Bit 169" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB168,Group Status Bit 168" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB167,Group Status Bit 167" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB166,Group Status Bit 166" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB165,Group Status Bit 165" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB164,Group Status Bit 164" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB163,Group Status Bit 163" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB162,Group Status Bit 162" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB161,Group Status Bit 161" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB160,Group Status Bit 160" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5)) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 " bitfld.long 0x00 31. "GSB191,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. "GSB190,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. "GSB189,Group Status Bit 189" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB188,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. "GSB187,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. "GSB186,Group Status Bit 186" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB185,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. "GSB184,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. "GSB183,Group Status Bit 183" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB182,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. "GSB181,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. "GSB180,Group Status Bit 180" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB179,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. "GSB178,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. "GSB177,Group Status Bit 177" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB176,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. "GSB175,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. "GSB174,Group Status Bit 174" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB173,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. "GSB172,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. "GSB171,Group Status Bit 171" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB170,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. "GSB169,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. "GSB168,Group Status Bit 168" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB167,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. "GSB166,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. "GSB165,Group Status Bit 165" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB164,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. "GSB163,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. "GSB162,Group Status Bit 162" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB161,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. "GSB160,Group Status Bit 160" "Group 0,Group 1" else rgroup.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 " endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x98))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6)) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 (Secure Access)" bitfld.long 0x00 31. "GSB223,Group Status Bit 223" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB222,Group Status Bit 222" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB221,Group Status Bit 221" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB220,Group Status Bit 220" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB219,Group Status Bit 219" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB218,Group Status Bit 218" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB217,Group Status Bit 217" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB216,Group Status Bit 216" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB215,Group Status Bit 215" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB214,Group Status Bit 214" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB213,Group Status Bit 213" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB212,Group Status Bit 212" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB211,Group Status Bit 211" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB210,Group Status Bit 210" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB209,Group Status Bit 209" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB208,Group Status Bit 208" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB207,Group Status Bit 207" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB206,Group Status Bit 206" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB205,Group Status Bit 205" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB204,Group Status Bit 204" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB203,Group Status Bit 203" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB202,Group Status Bit 202" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB201,Group Status Bit 201" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB200,Group Status Bit 200" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB199,Group Status Bit 199" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB198,Group Status Bit 198" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB197,Group Status Bit 197" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB196,Group Status Bit 196" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB195,Group Status Bit 195" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB194,Group Status Bit 194" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB193,Group Status Bit 193" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB192,Group Status Bit 192" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6)) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 " bitfld.long 0x00 31. "GSB223,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. "GSB222,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. "GSB221,Group Status Bit 221" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB220,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. "GSB219,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. "GSB218,Group Status Bit 218" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB217,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. "GSB216,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. "GSB215,Group Status Bit 215" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB214,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. "GSB213,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. "GSB212,Group Status Bit 212" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB211,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. "GSB210,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. "GSB209,Group Status Bit 209" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB208,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. "GSB207,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. "GSB206,Group Status Bit 206" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB205,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. "GSB204,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. "GSB203,Group Status Bit 203" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB202,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. "GSB201,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. "GSB200,Group Status Bit 200" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB199,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. "GSB198,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. "GSB197,Group Status Bit 197" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB196,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. "GSB195,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. "GSB194,Group Status Bit 194" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB193,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. "GSB192,Group Status Bit 192" "Group 0,Group 1" else rgroup.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 " endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x9C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7)) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 (Secure Access)" bitfld.long 0x00 31. "GSB255,Group Status Bit 255" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB254,Group Status Bit 254" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB253,Group Status Bit 253" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB252,Group Status Bit 252" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB251,Group Status Bit 251" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB250,Group Status Bit 250" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB249,Group Status Bit 249" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB248,Group Status Bit 248" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB247,Group Status Bit 247" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB246,Group Status Bit 246" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB245,Group Status Bit 245" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB244,Group Status Bit 244" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB243,Group Status Bit 243" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB242,Group Status Bit 242" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB241,Group Status Bit 241" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB240,Group Status Bit 240" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB239,Group Status Bit 239" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB238,Group Status Bit 238" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB237,Group Status Bit 237" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB236,Group Status Bit 236" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB235,Group Status Bit 235" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB234,Group Status Bit 234" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB233,Group Status Bit 233" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB232,Group Status Bit 232" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB231,Group Status Bit 231" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB230,Group Status Bit 230" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB229,Group Status Bit 229" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB228,Group Status Bit 228" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB227,Group Status Bit 227" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB226,Group Status Bit 226" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB225,Group Status Bit 225" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB224,Group Status Bit 224" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7)) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 " bitfld.long 0x00 31. "GSB255,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. "GSB254,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. "GSB253,Group Status Bit 253" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB252,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. "GSB251,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. "GSB250,Group Status Bit 250" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB249,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. "GSB248,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. "GSB247,Group Status Bit 247" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB246,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. "GSB245,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. "GSB244,Group Status Bit 244" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB243,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. "GSB242,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. "GSB241,Group Status Bit 241" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB240,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. "GSB239,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. "GSB238,Group Status Bit 238" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB237,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. "GSB236,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. "GSB235,Group Status Bit 235" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB234,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. "GSB233,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. "GSB232,Group Status Bit 232" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB231,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. "GSB230,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. "GSB229,Group Status Bit 229" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB228,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. "GSB227,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. "GSB226,Group Status Bit 226" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB225,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. "GSB224,Group Status Bit 224" "Group 0,Group 1" else rgroup.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 " endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8)) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 (Secure Access)" bitfld.long 0x00 31. "GSB287,Group Status Bit 287" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB286,Group Status Bit 286" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB285,Group Status Bit 285" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB284,Group Status Bit 284" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB283,Group Status Bit 283" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB282,Group Status Bit 282" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB281,Group Status Bit 281" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB280,Group Status Bit 280" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB279,Group Status Bit 279" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB278,Group Status Bit 278" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB277,Group Status Bit 277" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB276,Group Status Bit 276" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB275,Group Status Bit 275" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB274,Group Status Bit 274" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB273,Group Status Bit 273" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB272,Group Status Bit 272" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB271,Group Status Bit 271" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB270,Group Status Bit 270" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB269,Group Status Bit 269" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB268,Group Status Bit 268" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB267,Group Status Bit 267" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB266,Group Status Bit 266" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB265,Group Status Bit 265" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB264,Group Status Bit 264" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB263,Group Status Bit 263" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB262,Group Status Bit 262" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB261,Group Status Bit 261" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB260,Group Status Bit 260" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB259,Group Status Bit 259" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB258,Group Status Bit 258" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB257,Group Status Bit 257" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB256,Group Status Bit 256" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8)) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 " bitfld.long 0x00 31. "GSB287,Group Status Bit 287" "Group 0,Group 1" bitfld.long 0x00 30. "GSB286,Group Status Bit 286" "Group 0,Group 1" bitfld.long 0x00 29. "GSB285,Group Status Bit 285" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB284,Group Status Bit 284" "Group 0,Group 1" bitfld.long 0x00 27. "GSB283,Group Status Bit 283" "Group 0,Group 1" bitfld.long 0x00 26. "GSB282,Group Status Bit 282" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB281,Group Status Bit 281" "Group 0,Group 1" bitfld.long 0x00 24. "GSB280,Group Status Bit 280" "Group 0,Group 1" bitfld.long 0x00 23. "GSB279,Group Status Bit 279" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB278,Group Status Bit 278" "Group 0,Group 1" bitfld.long 0x00 21. "GSB277,Group Status Bit 277" "Group 0,Group 1" bitfld.long 0x00 20. "GSB276,Group Status Bit 276" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB275,Group Status Bit 275" "Group 0,Group 1" bitfld.long 0x00 18. "GSB274,Group Status Bit 274" "Group 0,Group 1" bitfld.long 0x00 17. "GSB273,Group Status Bit 273" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB272,Group Status Bit 272" "Group 0,Group 1" bitfld.long 0x00 15. "GSB271,Group Status Bit 271" "Group 0,Group 1" bitfld.long 0x00 14. "GSB270,Group Status Bit 270" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB269,Group Status Bit 269" "Group 0,Group 1" bitfld.long 0x00 12. "GSB268,Group Status Bit 268" "Group 0,Group 1" bitfld.long 0x00 11. "GSB267,Group Status Bit 267" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB266,Group Status Bit 266" "Group 0,Group 1" bitfld.long 0x00 9. "GSB265,Group Status Bit 265" "Group 0,Group 1" bitfld.long 0x00 8. "GSB264,Group Status Bit 264" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB263,Group Status Bit 263" "Group 0,Group 1" bitfld.long 0x00 6. "GSB262,Group Status Bit 262" "Group 0,Group 1" bitfld.long 0x00 5. "GSB261,Group Status Bit 261" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB260,Group Status Bit 260" "Group 0,Group 1" bitfld.long 0x00 3. "GSB259,Group Status Bit 259" "Group 0,Group 1" bitfld.long 0x00 2. "GSB258,Group Status Bit 258" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB257,Group Status Bit 257" "Group 0,Group 1" bitfld.long 0x00 0. "GSB256,Group Status Bit 256" "Group 0,Group 1" else rgroup.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 " endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9)) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 (Secure Access)" bitfld.long 0x00 31. "GSB319,Group Status Bit 319" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB318,Group Status Bit 318" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB317,Group Status Bit 317" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB316,Group Status Bit 316" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB315,Group Status Bit 315" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB314,Group Status Bit 314" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB313,Group Status Bit 313" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB312,Group Status Bit 312" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB311,Group Status Bit 311" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB310,Group Status Bit 310" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB309,Group Status Bit 309" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB308,Group Status Bit 308" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB307,Group Status Bit 307" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB306,Group Status Bit 306" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB305,Group Status Bit 305" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB304,Group Status Bit 304" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB303,Group Status Bit 303" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB302,Group Status Bit 302" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB301,Group Status Bit 301" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB300,Group Status Bit 300" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB299,Group Status Bit 299" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB298,Group Status Bit 298" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB297,Group Status Bit 297" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB296,Group Status Bit 296" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB295,Group Status Bit 295" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB294,Group Status Bit 294" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB293,Group Status Bit 293" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB292,Group Status Bit 292" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB291,Group Status Bit 291" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB290,Group Status Bit 290" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB289,Group Status Bit 289" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB288,Group Status Bit 288" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9)) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 " bitfld.long 0x00 31. "GSB319,Group Status Bit 319" "Group 0,Group 1" bitfld.long 0x00 30. "GSB318,Group Status Bit 318" "Group 0,Group 1" bitfld.long 0x00 29. "GSB317,Group Status Bit 317" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB316,Group Status Bit 316" "Group 0,Group 1" bitfld.long 0x00 27. "GSB315,Group Status Bit 315" "Group 0,Group 1" bitfld.long 0x00 26. "GSB314,Group Status Bit 314" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB313,Group Status Bit 313" "Group 0,Group 1" bitfld.long 0x00 24. "GSB312,Group Status Bit 312" "Group 0,Group 1" bitfld.long 0x00 23. "GSB311,Group Status Bit 311" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB310,Group Status Bit 310" "Group 0,Group 1" bitfld.long 0x00 21. "GSB309,Group Status Bit 309" "Group 0,Group 1" bitfld.long 0x00 20. "GSB308,Group Status Bit 308" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB307,Group Status Bit 307" "Group 0,Group 1" bitfld.long 0x00 18. "GSB306,Group Status Bit 306" "Group 0,Group 1" bitfld.long 0x00 17. "GSB305,Group Status Bit 305" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB304,Group Status Bit 304" "Group 0,Group 1" bitfld.long 0x00 15. "GSB303,Group Status Bit 303" "Group 0,Group 1" bitfld.long 0x00 14. "GSB302,Group Status Bit 302" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB301,Group Status Bit 301" "Group 0,Group 1" bitfld.long 0x00 12. "GSB300,Group Status Bit 300" "Group 0,Group 1" bitfld.long 0x00 11. "GSB299,Group Status Bit 299" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB298,Group Status Bit 298" "Group 0,Group 1" bitfld.long 0x00 9. "GSB297,Group Status Bit 297" "Group 0,Group 1" bitfld.long 0x00 8. "GSB296,Group Status Bit 296" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB295,Group Status Bit 295" "Group 0,Group 1" bitfld.long 0x00 6. "GSB294,Group Status Bit 294" "Group 0,Group 1" bitfld.long 0x00 5. "GSB293,Group Status Bit 293" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB292,Group Status Bit 292" "Group 0,Group 1" bitfld.long 0x00 3. "GSB291,Group Status Bit 291" "Group 0,Group 1" bitfld.long 0x00 2. "GSB290,Group Status Bit 290" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB289,Group Status Bit 289" "Group 0,Group 1" bitfld.long 0x00 0. "GSB288,Group Status Bit 288" "Group 0,Group 1" else rgroup.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 " endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA)) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure Access)" bitfld.long 0x00 31. "GSB351,Group Status Bit 351" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB350,Group Status Bit 350" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB349,Group Status Bit 349" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB348,Group Status Bit 348" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB347,Group Status Bit 347" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB346,Group Status Bit 346" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB345,Group Status Bit 345" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB344,Group Status Bit 344" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB343,Group Status Bit 343" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB342,Group Status Bit 342" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB341,Group Status Bit 341" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB340,Group Status Bit 340" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB339,Group Status Bit 339" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB338,Group Status Bit 338" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB337,Group Status Bit 337" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB336,Group Status Bit 336" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB335,Group Status Bit 335" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB334,Group Status Bit 334" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB333,Group Status Bit 333" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB332,Group Status Bit 332" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB331,Group Status Bit 331" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB330,Group Status Bit 330" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB329,Group Status Bit 329" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB328,Group Status Bit 328" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB327,Group Status Bit 327" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB326,Group Status Bit 326" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB325,Group Status Bit 325" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB324,Group Status Bit 324" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB323,Group Status Bit 323" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB322,Group Status Bit 322" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB321,Group Status Bit 321" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB320,Group Status Bit 320" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA)) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" bitfld.long 0x00 31. "GSB351,Group Status Bit 351" "Group 0,Group 1" bitfld.long 0x00 30. "GSB350,Group Status Bit 350" "Group 0,Group 1" bitfld.long 0x00 29. "GSB349,Group Status Bit 349" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB348,Group Status Bit 348" "Group 0,Group 1" bitfld.long 0x00 27. "GSB347,Group Status Bit 347" "Group 0,Group 1" bitfld.long 0x00 26. "GSB346,Group Status Bit 346" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB345,Group Status Bit 345" "Group 0,Group 1" bitfld.long 0x00 24. "GSB344,Group Status Bit 344" "Group 0,Group 1" bitfld.long 0x00 23. "GSB343,Group Status Bit 343" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB342,Group Status Bit 342" "Group 0,Group 1" bitfld.long 0x00 21. "GSB341,Group Status Bit 341" "Group 0,Group 1" bitfld.long 0x00 20. "GSB340,Group Status Bit 340" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB339,Group Status Bit 339" "Group 0,Group 1" bitfld.long 0x00 18. "GSB338,Group Status Bit 338" "Group 0,Group 1" bitfld.long 0x00 17. "GSB337,Group Status Bit 337" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB336,Group Status Bit 336" "Group 0,Group 1" bitfld.long 0x00 15. "GSB335,Group Status Bit 335" "Group 0,Group 1" bitfld.long 0x00 14. "GSB334,Group Status Bit 334" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB333,Group Status Bit 333" "Group 0,Group 1" bitfld.long 0x00 12. "GSB332,Group Status Bit 332" "Group 0,Group 1" bitfld.long 0x00 11. "GSB331,Group Status Bit 331" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB330,Group Status Bit 330" "Group 0,Group 1" bitfld.long 0x00 9. "GSB329,Group Status Bit 329" "Group 0,Group 1" bitfld.long 0x00 8. "GSB328,Group Status Bit 328" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB327,Group Status Bit 327" "Group 0,Group 1" bitfld.long 0x00 6. "GSB326,Group Status Bit 326" "Group 0,Group 1" bitfld.long 0x00 5. "GSB325,Group Status Bit 325" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB324,Group Status Bit 324" "Group 0,Group 1" bitfld.long 0x00 3. "GSB323,Group Status Bit 323" "Group 0,Group 1" bitfld.long 0x00 2. "GSB322,Group Status Bit 322" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB321,Group Status Bit 321" "Group 0,Group 1" bitfld.long 0x00 0. "GSB320,Group Status Bit 320" "Group 0,Group 1" else rgroup.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xAC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB)) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure Access)" bitfld.long 0x00 31. "GSB383,Group Status Bit 383" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB382,Group Status Bit 382" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB381,Group Status Bit 381" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB380,Group Status Bit 380" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB379,Group Status Bit 379" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB378,Group Status Bit 378" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB377,Group Status Bit 377" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB376,Group Status Bit 376" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB375,Group Status Bit 375" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB374,Group Status Bit 374" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB373,Group Status Bit 373" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB372,Group Status Bit 372" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB371,Group Status Bit 371" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB370,Group Status Bit 370" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB369,Group Status Bit 369" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB368,Group Status Bit 368" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB367,Group Status Bit 367" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB366,Group Status Bit 366" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB365,Group Status Bit 365" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB364,Group Status Bit 364" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB363,Group Status Bit 363" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB362,Group Status Bit 362" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB361,Group Status Bit 361" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB360,Group Status Bit 360" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB359,Group Status Bit 359" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB358,Group Status Bit 358" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB357,Group Status Bit 357" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB356,Group Status Bit 356" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB355,Group Status Bit 355" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB354,Group Status Bit 354" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB353,Group Status Bit 353" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB352,Group Status Bit 352" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB)) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" bitfld.long 0x00 31. "GSB383,Group Status Bit 383" "Group 0,Group 1" bitfld.long 0x00 30. "GSB382,Group Status Bit 382" "Group 0,Group 1" bitfld.long 0x00 29. "GSB381,Group Status Bit 381" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB380,Group Status Bit 380" "Group 0,Group 1" bitfld.long 0x00 27. "GSB379,Group Status Bit 379" "Group 0,Group 1" bitfld.long 0x00 26. "GSB378,Group Status Bit 378" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB377,Group Status Bit 377" "Group 0,Group 1" bitfld.long 0x00 24. "GSB376,Group Status Bit 376" "Group 0,Group 1" bitfld.long 0x00 23. "GSB375,Group Status Bit 375" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB374,Group Status Bit 374" "Group 0,Group 1" bitfld.long 0x00 21. "GSB373,Group Status Bit 373" "Group 0,Group 1" bitfld.long 0x00 20. "GSB372,Group Status Bit 372" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB371,Group Status Bit 371" "Group 0,Group 1" bitfld.long 0x00 18. "GSB370,Group Status Bit 370" "Group 0,Group 1" bitfld.long 0x00 17. "GSB369,Group Status Bit 369" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB368,Group Status Bit 368" "Group 0,Group 1" bitfld.long 0x00 15. "GSB367,Group Status Bit 367" "Group 0,Group 1" bitfld.long 0x00 14. "GSB366,Group Status Bit 366" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB365,Group Status Bit 365" "Group 0,Group 1" bitfld.long 0x00 12. "GSB364,Group Status Bit 364" "Group 0,Group 1" bitfld.long 0x00 11. "GSB363,Group Status Bit 363" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB362,Group Status Bit 362" "Group 0,Group 1" bitfld.long 0x00 9. "GSB361,Group Status Bit 361" "Group 0,Group 1" bitfld.long 0x00 8. "GSB360,Group Status Bit 360" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB359,Group Status Bit 359" "Group 0,Group 1" bitfld.long 0x00 6. "GSB358,Group Status Bit 358" "Group 0,Group 1" bitfld.long 0x00 5. "GSB357,Group Status Bit 357" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB356,Group Status Bit 356" "Group 0,Group 1" bitfld.long 0x00 3. "GSB355,Group Status Bit 355" "Group 0,Group 1" bitfld.long 0x00 2. "GSB354,Group Status Bit 354" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB353,Group Status Bit 353" "Group 0,Group 1" bitfld.long 0x00 0. "GSB352,Group Status Bit 352" "Group 0,Group 1" else rgroup.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC)) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure Access)" bitfld.long 0x00 31. "GSB415,Group Status Bit 415" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB414,Group Status Bit 414" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB413,Group Status Bit 413" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB412,Group Status Bit 412" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB411,Group Status Bit 411" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB410,Group Status Bit 410" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB409,Group Status Bit 409" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB408,Group Status Bit 408" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB407,Group Status Bit 407" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB406,Group Status Bit 406" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB405,Group Status Bit 405" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB404,Group Status Bit 404" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB403,Group Status Bit 403" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB402,Group Status Bit 402" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB401,Group Status Bit 401" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB400,Group Status Bit 400" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB399,Group Status Bit 399" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB398,Group Status Bit 398" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB397,Group Status Bit 397" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB396,Group Status Bit 396" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB395,Group Status Bit 395" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB394,Group Status Bit 394" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB393,Group Status Bit 393" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB392,Group Status Bit 392" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB391,Group Status Bit 391" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB390,Group Status Bit 390" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB389,Group Status Bit 389" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB388,Group Status Bit 388" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB387,Group Status Bit 387" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB386,Group Status Bit 386" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB385,Group Status Bit 385" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB384,Group Status Bit 384" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC)) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" bitfld.long 0x00 31. "GSB415,Group Status Bit 415" "Group 0,Group 1" bitfld.long 0x00 30. "GSB414,Group Status Bit 414" "Group 0,Group 1" bitfld.long 0x00 29. "GSB413,Group Status Bit 413" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB412,Group Status Bit 412" "Group 0,Group 1" bitfld.long 0x00 27. "GSB411,Group Status Bit 411" "Group 0,Group 1" bitfld.long 0x00 26. "GSB410,Group Status Bit 410" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB409,Group Status Bit 409" "Group 0,Group 1" bitfld.long 0x00 24. "GSB408,Group Status Bit 408" "Group 0,Group 1" bitfld.long 0x00 23. "GSB407,Group Status Bit 407" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB406,Group Status Bit 406" "Group 0,Group 1" bitfld.long 0x00 21. "GSB405,Group Status Bit 405" "Group 0,Group 1" bitfld.long 0x00 20. "GSB404,Group Status Bit 404" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB403,Group Status Bit 403" "Group 0,Group 1" bitfld.long 0x00 18. "GSB402,Group Status Bit 402" "Group 0,Group 1" bitfld.long 0x00 17. "GSB401,Group Status Bit 401" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB400,Group Status Bit 400" "Group 0,Group 1" bitfld.long 0x00 15. "GSB399,Group Status Bit 399" "Group 0,Group 1" bitfld.long 0x00 14. "GSB398,Group Status Bit 398" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB397,Group Status Bit 397" "Group 0,Group 1" bitfld.long 0x00 12. "GSB396,Group Status Bit 396" "Group 0,Group 1" bitfld.long 0x00 11. "GSB395,Group Status Bit 395" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB394,Group Status Bit 394" "Group 0,Group 1" bitfld.long 0x00 9. "GSB393,Group Status Bit 393" "Group 0,Group 1" bitfld.long 0x00 8. "GSB392,Group Status Bit 392" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB391,Group Status Bit 391" "Group 0,Group 1" bitfld.long 0x00 6. "GSB390,Group Status Bit 390" "Group 0,Group 1" bitfld.long 0x00 5. "GSB389,Group Status Bit 389" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB388,Group Status Bit 388" "Group 0,Group 1" bitfld.long 0x00 3. "GSB387,Group Status Bit 387" "Group 0,Group 1" bitfld.long 0x00 2. "GSB386,Group Status Bit 386" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB385,Group Status Bit 385" "Group 0,Group 1" bitfld.long 0x00 0. "GSB384,Group Status Bit 384" "Group 0,Group 1" else rgroup.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD)) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure Access)" bitfld.long 0x00 31. "GSB447,Group Status Bit 447" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB446,Group Status Bit 446" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB445,Group Status Bit 445" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB444,Group Status Bit 444" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB443,Group Status Bit 443" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB442,Group Status Bit 442" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB441,Group Status Bit 441" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB440,Group Status Bit 440" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB439,Group Status Bit 439" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB438,Group Status Bit 438" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB437,Group Status Bit 437" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB436,Group Status Bit 436" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB435,Group Status Bit 435" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB434,Group Status Bit 434" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB433,Group Status Bit 433" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB432,Group Status Bit 432" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB431,Group Status Bit 431" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB430,Group Status Bit 430" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB429,Group Status Bit 429" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB428,Group Status Bit 428" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB427,Group Status Bit 427" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB426,Group Status Bit 426" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB425,Group Status Bit 425" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB424,Group Status Bit 424" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB423,Group Status Bit 423" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB422,Group Status Bit 422" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB421,Group Status Bit 421" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB420,Group Status Bit 420" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB419,Group Status Bit 419" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB418,Group Status Bit 418" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB417,Group Status Bit 417" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB416,Group Status Bit 416" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD)) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" bitfld.long 0x00 31. "GSB447,Group Status Bit 447" "Group 0,Group 1" bitfld.long 0x00 30. "GSB446,Group Status Bit 446" "Group 0,Group 1" bitfld.long 0x00 29. "GSB445,Group Status Bit 445" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB444,Group Status Bit 444" "Group 0,Group 1" bitfld.long 0x00 27. "GSB443,Group Status Bit 443" "Group 0,Group 1" bitfld.long 0x00 26. "GSB442,Group Status Bit 442" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB441,Group Status Bit 441" "Group 0,Group 1" bitfld.long 0x00 24. "GSB440,Group Status Bit 440" "Group 0,Group 1" bitfld.long 0x00 23. "GSB439,Group Status Bit 439" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB438,Group Status Bit 438" "Group 0,Group 1" bitfld.long 0x00 21. "GSB437,Group Status Bit 437" "Group 0,Group 1" bitfld.long 0x00 20. "GSB436,Group Status Bit 436" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB435,Group Status Bit 435" "Group 0,Group 1" bitfld.long 0x00 18. "GSB434,Group Status Bit 434" "Group 0,Group 1" bitfld.long 0x00 17. "GSB433,Group Status Bit 433" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB432,Group Status Bit 432" "Group 0,Group 1" bitfld.long 0x00 15. "GSB431,Group Status Bit 431" "Group 0,Group 1" bitfld.long 0x00 14. "GSB430,Group Status Bit 430" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB429,Group Status Bit 429" "Group 0,Group 1" bitfld.long 0x00 12. "GSB428,Group Status Bit 428" "Group 0,Group 1" bitfld.long 0x00 11. "GSB427,Group Status Bit 427" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB426,Group Status Bit 426" "Group 0,Group 1" bitfld.long 0x00 9. "GSB425,Group Status Bit 425" "Group 0,Group 1" bitfld.long 0x00 8. "GSB424,Group Status Bit 424" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB423,Group Status Bit 423" "Group 0,Group 1" bitfld.long 0x00 6. "GSB422,Group Status Bit 422" "Group 0,Group 1" bitfld.long 0x00 5. "GSB421,Group Status Bit 421" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB420,Group Status Bit 420" "Group 0,Group 1" bitfld.long 0x00 3. "GSB419,Group Status Bit 419" "Group 0,Group 1" bitfld.long 0x00 2. "GSB418,Group Status Bit 418" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB417,Group Status Bit 417" "Group 0,Group 1" bitfld.long 0x00 0. "GSB416,Group Status Bit 416" "Group 0,Group 1" else rgroup.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE)) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure Access)" bitfld.long 0x00 31. "GSB479,Group Status Bit 479" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB478,Group Status Bit 478" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB477,Group Status Bit 477" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB476,Group Status Bit 476" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB475,Group Status Bit 475" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB474,Group Status Bit 474" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB473,Group Status Bit 473" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB472,Group Status Bit 472" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB471,Group Status Bit 471" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB470,Group Status Bit 470" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB469,Group Status Bit 469" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB468,Group Status Bit 468" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB467,Group Status Bit 467" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB466,Group Status Bit 466" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB465,Group Status Bit 465" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB464,Group Status Bit 464" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB463,Group Status Bit 463" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB462,Group Status Bit 462" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB461,Group Status Bit 461" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB460,Group Status Bit 460" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB459,Group Status Bit 459" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB458,Group Status Bit 458" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB457,Group Status Bit 457" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB456,Group Status Bit 456" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB455,Group Status Bit 455" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB454,Group Status Bit 454" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB453,Group Status Bit 453" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB452,Group Status Bit 452" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB451,Group Status Bit 451" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB450,Group Status Bit 450" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB449,Group Status Bit 449" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB448,Group Status Bit 448" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE)) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14" bitfld.long 0x00 31. "GSB479,Group Status Bit 479" "Group 0,Group 1" bitfld.long 0x00 30. "GSB478,Group Status Bit 478" "Group 0,Group 1" bitfld.long 0x00 29. "GSB477,Group Status Bit 477" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB476,Group Status Bit 476" "Group 0,Group 1" bitfld.long 0x00 27. "GSB475,Group Status Bit 475" "Group 0,Group 1" bitfld.long 0x00 26. "GSB474,Group Status Bit 474" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB473,Group Status Bit 473" "Group 0,Group 1" bitfld.long 0x00 24. "GSB472,Group Status Bit 472" "Group 0,Group 1" bitfld.long 0x00 23. "GSB471,Group Status Bit 471" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB470,Group Status Bit 470" "Group 0,Group 1" bitfld.long 0x00 21. "GSB469,Group Status Bit 469" "Group 0,Group 1" bitfld.long 0x00 20. "GSB468,Group Status Bit 468" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB467,Group Status Bit 467" "Group 0,Group 1" bitfld.long 0x00 18. "GSB466,Group Status Bit 466" "Group 0,Group 1" bitfld.long 0x00 17. "GSB465,Group Status Bit 465" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB464,Group Status Bit 464" "Group 0,Group 1" bitfld.long 0x00 15. "GSB463,Group Status Bit 463" "Group 0,Group 1" bitfld.long 0x00 14. "GSB462,Group Status Bit 462" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB461,Group Status Bit 461" "Group 0,Group 1" bitfld.long 0x00 12. "GSB460,Group Status Bit 460" "Group 0,Group 1" bitfld.long 0x00 11. "GSB459,Group Status Bit 459" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB458,Group Status Bit 458" "Group 0,Group 1" bitfld.long 0x00 9. "GSB457,Group Status Bit 457" "Group 0,Group 1" bitfld.long 0x00 8. "GSB456,Group Status Bit 456" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB455,Group Status Bit 455" "Group 0,Group 1" bitfld.long 0x00 6. "GSB454,Group Status Bit 454" "Group 0,Group 1" bitfld.long 0x00 5. "GSB453,Group Status Bit 453" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB452,Group Status Bit 452" "Group 0,Group 1" bitfld.long 0x00 3. "GSB451,Group Status Bit 451" "Group 0,Group 1" bitfld.long 0x00 2. "GSB450,Group Status Bit 450" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB449,Group Status Bit 449" "Group 0,Group 1" bitfld.long 0x00 0. "GSB448,Group Status Bit 448" "Group 0,Group 1" else rgroup.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xBC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF)) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure Access)" bitfld.long 0x00 31. "GSB511,Group Status Bit 511" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB510,Group Status Bit 510" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB509,Group Status Bit 509" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB508,Group Status Bit 508" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB507,Group Status Bit 507" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB506,Group Status Bit 506" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB505,Group Status Bit 505" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB504,Group Status Bit 504" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB503,Group Status Bit 503" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB502,Group Status Bit 502" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB501,Group Status Bit 501" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB500,Group Status Bit 500" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB499,Group Status Bit 499" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB498,Group Status Bit 498" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB497,Group Status Bit 497" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB496,Group Status Bit 496" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB495,Group Status Bit 495" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB494,Group Status Bit 494" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB493,Group Status Bit 493" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB492,Group Status Bit 492" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB491,Group Status Bit 491" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB490,Group Status Bit 490" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB489,Group Status Bit 489" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB488,Group Status Bit 488" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB487,Group Status Bit 487" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB486,Group Status Bit 486" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB485,Group Status Bit 485" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB484,Group Status Bit 484" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB483,Group Status Bit 483" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB482,Group Status Bit 482" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB481,Group Status Bit 481" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB480,Group Status Bit 480" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF)) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" bitfld.long 0x00 31. "GSB511,Group Status Bit 511" "Group 0,Group 1" bitfld.long 0x00 30. "GSB510,Group Status Bit 510" "Group 0,Group 1" bitfld.long 0x00 29. "GSB509,Group Status Bit 509" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB508,Group Status Bit 508" "Group 0,Group 1" bitfld.long 0x00 27. "GSB507,Group Status Bit 507" "Group 0,Group 1" bitfld.long 0x00 26. "GSB506,Group Status Bit 506" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB505,Group Status Bit 505" "Group 0,Group 1" bitfld.long 0x00 24. "GSB504,Group Status Bit 504" "Group 0,Group 1" bitfld.long 0x00 23. "GSB503,Group Status Bit 503" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB502,Group Status Bit 502" "Group 0,Group 1" bitfld.long 0x00 21. "GSB501,Group Status Bit 501" "Group 0,Group 1" bitfld.long 0x00 20. "GSB500,Group Status Bit 500" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB499,Group Status Bit 499" "Group 0,Group 1" bitfld.long 0x00 18. "GSB498,Group Status Bit 498" "Group 0,Group 1" bitfld.long 0x00 17. "GSB497,Group Status Bit 497" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB496,Group Status Bit 496" "Group 0,Group 1" bitfld.long 0x00 15. "GSB495,Group Status Bit 495" "Group 0,Group 1" bitfld.long 0x00 14. "GSB494,Group Status Bit 494" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB493,Group Status Bit 493" "Group 0,Group 1" bitfld.long 0x00 12. "GSB492,Group Status Bit 492" "Group 0,Group 1" bitfld.long 0x00 11. "GSB491,Group Status Bit 491" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB490,Group Status Bit 490" "Group 0,Group 1" bitfld.long 0x00 9. "GSB489,Group Status Bit 489" "Group 0,Group 1" bitfld.long 0x00 8. "GSB488,Group Status Bit 488" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB487,Group Status Bit 487" "Group 0,Group 1" bitfld.long 0x00 6. "GSB486,Group Status Bit 486" "Group 0,Group 1" bitfld.long 0x00 5. "GSB485,Group Status Bit 485" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB484,Group Status Bit 484" "Group 0,Group 1" bitfld.long 0x00 3. "GSB483,Group Status Bit 483" "Group 0,Group 1" bitfld.long 0x00 2. "GSB482,Group Status Bit 482" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB481,Group Status Bit 481" "Group 0,Group 1" bitfld.long 0x00 0. "GSB480,Group Status Bit 480" "Group 0,Group 1" else rgroup.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure Access)" bitfld.long 0x00 31. "GSB543,Group Status Bit 543" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB542,Group Status Bit 542" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB541,Group Status Bit 541" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB540,Group Status Bit 540" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB539,Group Status Bit 539" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB538,Group Status Bit 538" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB537,Group Status Bit 537" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB536,Group Status Bit 536" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB535,Group Status Bit 535" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB534,Group Status Bit 534" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB533,Group Status Bit 533" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB532,Group Status Bit 532" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB531,Group Status Bit 531" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB530,Group Status Bit 530" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB529,Group Status Bit 529" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB528,Group Status Bit 528" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB527,Group Status Bit 527" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB526,Group Status Bit 526" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB525,Group Status Bit 525" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB524,Group Status Bit 524" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB523,Group Status Bit 523" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB522,Group Status Bit 522" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB521,Group Status Bit 521" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB520,Group Status Bit 520" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB519,Group Status Bit 519" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB518,Group Status Bit 518" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB517,Group Status Bit 517" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB516,Group Status Bit 516" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB515,Group Status Bit 515" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB514,Group Status Bit 514" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB513,Group Status Bit 513" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB512,Group Status Bit 512" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16" bitfld.long 0x00 31. "GSB543,Group Status Bit 543" "Group 0,Group 1" bitfld.long 0x00 30. "GSB542,Group Status Bit 542" "Group 0,Group 1" bitfld.long 0x00 29. "GSB541,Group Status Bit 541" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB540,Group Status Bit 540" "Group 0,Group 1" bitfld.long 0x00 27. "GSB539,Group Status Bit 539" "Group 0,Group 1" bitfld.long 0x00 26. "GSB538,Group Status Bit 538" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB537,Group Status Bit 537" "Group 0,Group 1" bitfld.long 0x00 24. "GSB536,Group Status Bit 536" "Group 0,Group 1" bitfld.long 0x00 23. "GSB535,Group Status Bit 535" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB534,Group Status Bit 534" "Group 0,Group 1" bitfld.long 0x00 21. "GSB533,Group Status Bit 533" "Group 0,Group 1" bitfld.long 0x00 20. "GSB532,Group Status Bit 532" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB531,Group Status Bit 531" "Group 0,Group 1" bitfld.long 0x00 18. "GSB530,Group Status Bit 530" "Group 0,Group 1" bitfld.long 0x00 17. "GSB529,Group Status Bit 529" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB528,Group Status Bit 528" "Group 0,Group 1" bitfld.long 0x00 15. "GSB527,Group Status Bit 527" "Group 0,Group 1" bitfld.long 0x00 14. "GSB526,Group Status Bit 526" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB525,Group Status Bit 525" "Group 0,Group 1" bitfld.long 0x00 12. "GSB524,Group Status Bit 524" "Group 0,Group 1" bitfld.long 0x00 11. "GSB523,Group Status Bit 523" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB522,Group Status Bit 522" "Group 0,Group 1" bitfld.long 0x00 9. "GSB521,Group Status Bit 521" "Group 0,Group 1" bitfld.long 0x00 8. "GSB520,Group Status Bit 520" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB519,Group Status Bit 519" "Group 0,Group 1" bitfld.long 0x00 6. "GSB518,Group Status Bit 518" "Group 0,Group 1" bitfld.long 0x00 5. "GSB517,Group Status Bit 517" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB516,Group Status Bit 516" "Group 0,Group 1" bitfld.long 0x00 3. "GSB515,Group Status Bit 515" "Group 0,Group 1" bitfld.long 0x00 2. "GSB514,Group Status Bit 514" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB513,Group Status Bit 513" "Group 0,Group 1" bitfld.long 0x00 0. "GSB512,Group Status Bit 512" "Group 0,Group 1" else rgroup.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure Access)" bitfld.long 0x00 31. "GSB575,Group Status Bit 575" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB574,Group Status Bit 574" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB573,Group Status Bit 573" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB572,Group Status Bit 572" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB571,Group Status Bit 571" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB570,Group Status Bit 570" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB569,Group Status Bit 569" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB568,Group Status Bit 568" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB567,Group Status Bit 567" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB566,Group Status Bit 566" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB565,Group Status Bit 565" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB564,Group Status Bit 564" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB563,Group Status Bit 563" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB562,Group Status Bit 562" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB561,Group Status Bit 561" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB560,Group Status Bit 560" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB559,Group Status Bit 559" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB558,Group Status Bit 558" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB557,Group Status Bit 557" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB556,Group Status Bit 556" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB555,Group Status Bit 555" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB554,Group Status Bit 554" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB553,Group Status Bit 553" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB552,Group Status Bit 552" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB551,Group Status Bit 551" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB550,Group Status Bit 550" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB549,Group Status Bit 549" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB548,Group Status Bit 548" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB547,Group Status Bit 547" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB546,Group Status Bit 546" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB545,Group Status Bit 545" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB544,Group Status Bit 544" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17" bitfld.long 0x00 31. "GSB575,Group Status Bit 575" "Group 0,Group 1" bitfld.long 0x00 30. "GSB574,Group Status Bit 574" "Group 0,Group 1" bitfld.long 0x00 29. "GSB573,Group Status Bit 573" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB572,Group Status Bit 572" "Group 0,Group 1" bitfld.long 0x00 27. "GSB571,Group Status Bit 571" "Group 0,Group 1" bitfld.long 0x00 26. "GSB570,Group Status Bit 570" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB569,Group Status Bit 569" "Group 0,Group 1" bitfld.long 0x00 24. "GSB568,Group Status Bit 568" "Group 0,Group 1" bitfld.long 0x00 23. "GSB567,Group Status Bit 567" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB566,Group Status Bit 566" "Group 0,Group 1" bitfld.long 0x00 21. "GSB565,Group Status Bit 565" "Group 0,Group 1" bitfld.long 0x00 20. "GSB564,Group Status Bit 564" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB563,Group Status Bit 563" "Group 0,Group 1" bitfld.long 0x00 18. "GSB562,Group Status Bit 562" "Group 0,Group 1" bitfld.long 0x00 17. "GSB561,Group Status Bit 561" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB560,Group Status Bit 560" "Group 0,Group 1" bitfld.long 0x00 15. "GSB559,Group Status Bit 559" "Group 0,Group 1" bitfld.long 0x00 14. "GSB558,Group Status Bit 558" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB557,Group Status Bit 557" "Group 0,Group 1" bitfld.long 0x00 12. "GSB556,Group Status Bit 556" "Group 0,Group 1" bitfld.long 0x00 11. "GSB555,Group Status Bit 555" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB554,Group Status Bit 554" "Group 0,Group 1" bitfld.long 0x00 9. "GSB553,Group Status Bit 553" "Group 0,Group 1" bitfld.long 0x00 8. "GSB552,Group Status Bit 552" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB551,Group Status Bit 551" "Group 0,Group 1" bitfld.long 0x00 6. "GSB550,Group Status Bit 550" "Group 0,Group 1" bitfld.long 0x00 5. "GSB549,Group Status Bit 549" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB548,Group Status Bit 548" "Group 0,Group 1" bitfld.long 0x00 3. "GSB547,Group Status Bit 547" "Group 0,Group 1" bitfld.long 0x00 2. "GSB546,Group Status Bit 546" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB545,Group Status Bit 545" "Group 0,Group 1" bitfld.long 0x00 0. "GSB544,Group Status Bit 544" "Group 0,Group 1" else rgroup.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure Access)" bitfld.long 0x00 31. "GSB607,Group Status Bit 607" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB606,Group Status Bit 606" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB605,Group Status Bit 605" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB604,Group Status Bit 604" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB603,Group Status Bit 603" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB602,Group Status Bit 602" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB601,Group Status Bit 601" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB600,Group Status Bit 600" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB599,Group Status Bit 599" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB598,Group Status Bit 598" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB597,Group Status Bit 597" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB596,Group Status Bit 596" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB595,Group Status Bit 595" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB594,Group Status Bit 594" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB593,Group Status Bit 593" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB592,Group Status Bit 592" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB591,Group Status Bit 591" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB590,Group Status Bit 590" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB589,Group Status Bit 589" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB588,Group Status Bit 588" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB587,Group Status Bit 587" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB586,Group Status Bit 586" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB585,Group Status Bit 585" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB584,Group Status Bit 584" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB583,Group Status Bit 583" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB582,Group Status Bit 582" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB581,Group Status Bit 581" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB580,Group Status Bit 580" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB579,Group Status Bit 579" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB578,Group Status Bit 578" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB577,Group Status Bit 577" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB576,Group Status Bit 576" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18" bitfld.long 0x00 31. "GSB607,Group Status Bit 607" "Group 0,Group 1" bitfld.long 0x00 30. "GSB606,Group Status Bit 606" "Group 0,Group 1" bitfld.long 0x00 29. "GSB605,Group Status Bit 605" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB604,Group Status Bit 604" "Group 0,Group 1" bitfld.long 0x00 27. "GSB603,Group Status Bit 603" "Group 0,Group 1" bitfld.long 0x00 26. "GSB602,Group Status Bit 602" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB601,Group Status Bit 601" "Group 0,Group 1" bitfld.long 0x00 24. "GSB600,Group Status Bit 600" "Group 0,Group 1" bitfld.long 0x00 23. "GSB599,Group Status Bit 599" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB598,Group Status Bit 598" "Group 0,Group 1" bitfld.long 0x00 21. "GSB597,Group Status Bit 597" "Group 0,Group 1" bitfld.long 0x00 20. "GSB596,Group Status Bit 596" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB595,Group Status Bit 595" "Group 0,Group 1" bitfld.long 0x00 18. "GSB594,Group Status Bit 594" "Group 0,Group 1" bitfld.long 0x00 17. "GSB593,Group Status Bit 593" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB592,Group Status Bit 592" "Group 0,Group 1" bitfld.long 0x00 15. "GSB591,Group Status Bit 591" "Group 0,Group 1" bitfld.long 0x00 14. "GSB590,Group Status Bit 590" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB589,Group Status Bit 589" "Group 0,Group 1" bitfld.long 0x00 12. "GSB588,Group Status Bit 588" "Group 0,Group 1" bitfld.long 0x00 11. "GSB587,Group Status Bit 587" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB586,Group Status Bit 586" "Group 0,Group 1" bitfld.long 0x00 9. "GSB585,Group Status Bit 585" "Group 0,Group 1" bitfld.long 0x00 8. "GSB584,Group Status Bit 584" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB583,Group Status Bit 583" "Group 0,Group 1" bitfld.long 0x00 6. "GSB582,Group Status Bit 582" "Group 0,Group 1" bitfld.long 0x00 5. "GSB581,Group Status Bit 581" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB580,Group Status Bit 580" "Group 0,Group 1" bitfld.long 0x00 3. "GSB579,Group Status Bit 579" "Group 0,Group 1" bitfld.long 0x00 2. "GSB578,Group Status Bit 578" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB577,Group Status Bit 577" "Group 0,Group 1" bitfld.long 0x00 0. "GSB576,Group Status Bit 576" "Group 0,Group 1" else rgroup.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xCC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure Access)" bitfld.long 0x00 31. "GSB639,Group Status Bit 639" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB638,Group Status Bit 638" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB637,Group Status Bit 637" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB636,Group Status Bit 636" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB635,Group Status Bit 635" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB634,Group Status Bit 634" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB633,Group Status Bit 633" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB632,Group Status Bit 632" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB631,Group Status Bit 631" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB630,Group Status Bit 630" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB629,Group Status Bit 629" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB628,Group Status Bit 628" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB627,Group Status Bit 627" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB626,Group Status Bit 626" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB625,Group Status Bit 625" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB624,Group Status Bit 624" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB623,Group Status Bit 623" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB622,Group Status Bit 622" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB621,Group Status Bit 621" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB620,Group Status Bit 620" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB619,Group Status Bit 619" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB618,Group Status Bit 618" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB617,Group Status Bit 617" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB616,Group Status Bit 616" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB615,Group Status Bit 615" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB614,Group Status Bit 614" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB613,Group Status Bit 613" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB612,Group Status Bit 612" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB611,Group Status Bit 611" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB610,Group Status Bit 610" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB609,Group Status Bit 609" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB608,Group Status Bit 608" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19" bitfld.long 0x00 31. "GSB639,Group Status Bit 639" "Group 0,Group 1" bitfld.long 0x00 30. "GSB638,Group Status Bit 638" "Group 0,Group 1" bitfld.long 0x00 29. "GSB637,Group Status Bit 637" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB636,Group Status Bit 636" "Group 0,Group 1" bitfld.long 0x00 27. "GSB635,Group Status Bit 635" "Group 0,Group 1" bitfld.long 0x00 26. "GSB634,Group Status Bit 634" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB633,Group Status Bit 633" "Group 0,Group 1" bitfld.long 0x00 24. "GSB632,Group Status Bit 632" "Group 0,Group 1" bitfld.long 0x00 23. "GSB631,Group Status Bit 631" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB630,Group Status Bit 630" "Group 0,Group 1" bitfld.long 0x00 21. "GSB629,Group Status Bit 629" "Group 0,Group 1" bitfld.long 0x00 20. "GSB628,Group Status Bit 628" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB627,Group Status Bit 627" "Group 0,Group 1" bitfld.long 0x00 18. "GSB626,Group Status Bit 626" "Group 0,Group 1" bitfld.long 0x00 17. "GSB625,Group Status Bit 625" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB624,Group Status Bit 624" "Group 0,Group 1" bitfld.long 0x00 15. "GSB623,Group Status Bit 623" "Group 0,Group 1" bitfld.long 0x00 14. "GSB622,Group Status Bit 622" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB621,Group Status Bit 621" "Group 0,Group 1" bitfld.long 0x00 12. "GSB620,Group Status Bit 620" "Group 0,Group 1" bitfld.long 0x00 11. "GSB619,Group Status Bit 619" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB618,Group Status Bit 618" "Group 0,Group 1" bitfld.long 0x00 9. "GSB617,Group Status Bit 617" "Group 0,Group 1" bitfld.long 0x00 8. "GSB616,Group Status Bit 616" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB615,Group Status Bit 615" "Group 0,Group 1" bitfld.long 0x00 6. "GSB614,Group Status Bit 614" "Group 0,Group 1" bitfld.long 0x00 5. "GSB613,Group Status Bit 613" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB612,Group Status Bit 612" "Group 0,Group 1" bitfld.long 0x00 3. "GSB611,Group Status Bit 611" "Group 0,Group 1" bitfld.long 0x00 2. "GSB610,Group Status Bit 610" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB609,Group Status Bit 609" "Group 0,Group 1" bitfld.long 0x00 0. "GSB608,Group Status Bit 608" "Group 0,Group 1" else rgroup.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure Access)" bitfld.long 0x00 31. "GSB671,Group Status Bit 671" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB670,Group Status Bit 670" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB669,Group Status Bit 669" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB668,Group Status Bit 668" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB667,Group Status Bit 667" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB666,Group Status Bit 666" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB665,Group Status Bit 665" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB664,Group Status Bit 664" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB663,Group Status Bit 663" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB662,Group Status Bit 662" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB661,Group Status Bit 661" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB660,Group Status Bit 660" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB659,Group Status Bit 659" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB658,Group Status Bit 658" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB657,Group Status Bit 657" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB656,Group Status Bit 656" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB655,Group Status Bit 655" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB654,Group Status Bit 654" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB653,Group Status Bit 653" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB652,Group Status Bit 652" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB651,Group Status Bit 651" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB650,Group Status Bit 650" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB649,Group Status Bit 649" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB648,Group Status Bit 648" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB647,Group Status Bit 647" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB646,Group Status Bit 646" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB645,Group Status Bit 645" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB644,Group Status Bit 644" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB643,Group Status Bit 643" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB642,Group Status Bit 642" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB641,Group Status Bit 641" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB640,Group Status Bit 640" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20" bitfld.long 0x00 31. "GSB671,Group Status Bit 671" "Group 0,Group 1" bitfld.long 0x00 30. "GSB670,Group Status Bit 670" "Group 0,Group 1" bitfld.long 0x00 29. "GSB669,Group Status Bit 669" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB668,Group Status Bit 668" "Group 0,Group 1" bitfld.long 0x00 27. "GSB667,Group Status Bit 667" "Group 0,Group 1" bitfld.long 0x00 26. "GSB666,Group Status Bit 666" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB665,Group Status Bit 665" "Group 0,Group 1" bitfld.long 0x00 24. "GSB664,Group Status Bit 664" "Group 0,Group 1" bitfld.long 0x00 23. "GSB663,Group Status Bit 663" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB662,Group Status Bit 662" "Group 0,Group 1" bitfld.long 0x00 21. "GSB661,Group Status Bit 661" "Group 0,Group 1" bitfld.long 0x00 20. "GSB660,Group Status Bit 660" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB659,Group Status Bit 659" "Group 0,Group 1" bitfld.long 0x00 18. "GSB658,Group Status Bit 658" "Group 0,Group 1" bitfld.long 0x00 17. "GSB657,Group Status Bit 657" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB656,Group Status Bit 656" "Group 0,Group 1" bitfld.long 0x00 15. "GSB655,Group Status Bit 655" "Group 0,Group 1" bitfld.long 0x00 14. "GSB654,Group Status Bit 654" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB653,Group Status Bit 653" "Group 0,Group 1" bitfld.long 0x00 12. "GSB652,Group Status Bit 652" "Group 0,Group 1" bitfld.long 0x00 11. "GSB651,Group Status Bit 651" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB650,Group Status Bit 650" "Group 0,Group 1" bitfld.long 0x00 9. "GSB649,Group Status Bit 649" "Group 0,Group 1" bitfld.long 0x00 8. "GSB648,Group Status Bit 648" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB647,Group Status Bit 647" "Group 0,Group 1" bitfld.long 0x00 6. "GSB646,Group Status Bit 646" "Group 0,Group 1" bitfld.long 0x00 5. "GSB645,Group Status Bit 645" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB644,Group Status Bit 644" "Group 0,Group 1" bitfld.long 0x00 3. "GSB643,Group Status Bit 643" "Group 0,Group 1" bitfld.long 0x00 2. "GSB642,Group Status Bit 642" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB641,Group Status Bit 641" "Group 0,Group 1" bitfld.long 0x00 0. "GSB640,Group Status Bit 640" "Group 0,Group 1" else rgroup.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure Access)" bitfld.long 0x00 31. "GSB703,Group Status Bit 703" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB702,Group Status Bit 702" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB701,Group Status Bit 701" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB700,Group Status Bit 700" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB699,Group Status Bit 699" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB698,Group Status Bit 698" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB697,Group Status Bit 697" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB696,Group Status Bit 696" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB695,Group Status Bit 695" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB694,Group Status Bit 694" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB693,Group Status Bit 693" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB692,Group Status Bit 692" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB691,Group Status Bit 691" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB690,Group Status Bit 690" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB689,Group Status Bit 689" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB688,Group Status Bit 688" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB687,Group Status Bit 687" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB686,Group Status Bit 686" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB685,Group Status Bit 685" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB684,Group Status Bit 684" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB683,Group Status Bit 683" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB682,Group Status Bit 682" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB681,Group Status Bit 681" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB680,Group Status Bit 680" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB679,Group Status Bit 679" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB678,Group Status Bit 678" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB677,Group Status Bit 677" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB676,Group Status Bit 676" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB675,Group Status Bit 675" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB674,Group Status Bit 674" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB673,Group Status Bit 673" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB672,Group Status Bit 672" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21" bitfld.long 0x00 31. "GSB703,Group Status Bit 703" "Group 0,Group 1" bitfld.long 0x00 30. "GSB702,Group Status Bit 702" "Group 0,Group 1" bitfld.long 0x00 29. "GSB701,Group Status Bit 701" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB700,Group Status Bit 700" "Group 0,Group 1" bitfld.long 0x00 27. "GSB699,Group Status Bit 699" "Group 0,Group 1" bitfld.long 0x00 26. "GSB698,Group Status Bit 698" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB697,Group Status Bit 697" "Group 0,Group 1" bitfld.long 0x00 24. "GSB696,Group Status Bit 696" "Group 0,Group 1" bitfld.long 0x00 23. "GSB695,Group Status Bit 695" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB694,Group Status Bit 694" "Group 0,Group 1" bitfld.long 0x00 21. "GSB693,Group Status Bit 693" "Group 0,Group 1" bitfld.long 0x00 20. "GSB692,Group Status Bit 692" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB691,Group Status Bit 691" "Group 0,Group 1" bitfld.long 0x00 18. "GSB690,Group Status Bit 690" "Group 0,Group 1" bitfld.long 0x00 17. "GSB689,Group Status Bit 689" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB688,Group Status Bit 688" "Group 0,Group 1" bitfld.long 0x00 15. "GSB687,Group Status Bit 687" "Group 0,Group 1" bitfld.long 0x00 14. "GSB686,Group Status Bit 686" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB685,Group Status Bit 685" "Group 0,Group 1" bitfld.long 0x00 12. "GSB684,Group Status Bit 684" "Group 0,Group 1" bitfld.long 0x00 11. "GSB683,Group Status Bit 683" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB682,Group Status Bit 682" "Group 0,Group 1" bitfld.long 0x00 9. "GSB681,Group Status Bit 681" "Group 0,Group 1" bitfld.long 0x00 8. "GSB680,Group Status Bit 680" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB679,Group Status Bit 679" "Group 0,Group 1" bitfld.long 0x00 6. "GSB678,Group Status Bit 678" "Group 0,Group 1" bitfld.long 0x00 5. "GSB677,Group Status Bit 677" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB676,Group Status Bit 676" "Group 0,Group 1" bitfld.long 0x00 3. "GSB675,Group Status Bit 675" "Group 0,Group 1" bitfld.long 0x00 2. "GSB674,Group Status Bit 674" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB673,Group Status Bit 673" "Group 0,Group 1" bitfld.long 0x00 0. "GSB672,Group Status Bit 672" "Group 0,Group 1" else rgroup.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure Access)" bitfld.long 0x00 31. "GSB735,Group Status Bit 735" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB734,Group Status Bit 734" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB733,Group Status Bit 733" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB732,Group Status Bit 732" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB731,Group Status Bit 731" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB730,Group Status Bit 730" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB729,Group Status Bit 729" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB728,Group Status Bit 728" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB727,Group Status Bit 727" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB726,Group Status Bit 726" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB725,Group Status Bit 725" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB724,Group Status Bit 724" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB723,Group Status Bit 723" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB722,Group Status Bit 722" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB721,Group Status Bit 721" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB720,Group Status Bit 720" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB719,Group Status Bit 719" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB718,Group Status Bit 718" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB717,Group Status Bit 717" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB716,Group Status Bit 716" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB715,Group Status Bit 715" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB714,Group Status Bit 714" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB713,Group Status Bit 713" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB712,Group Status Bit 712" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB711,Group Status Bit 711" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB710,Group Status Bit 710" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB709,Group Status Bit 709" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB708,Group Status Bit 708" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB707,Group Status Bit 707" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB706,Group Status Bit 706" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB705,Group Status Bit 705" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB704,Group Status Bit 704" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22" bitfld.long 0x00 31. "GSB735,Group Status Bit 735" "Group 0,Group 1" bitfld.long 0x00 30. "GSB734,Group Status Bit 734" "Group 0,Group 1" bitfld.long 0x00 29. "GSB733,Group Status Bit 733" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB732,Group Status Bit 732" "Group 0,Group 1" bitfld.long 0x00 27. "GSB731,Group Status Bit 731" "Group 0,Group 1" bitfld.long 0x00 26. "GSB730,Group Status Bit 730" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB729,Group Status Bit 729" "Group 0,Group 1" bitfld.long 0x00 24. "GSB728,Group Status Bit 728" "Group 0,Group 1" bitfld.long 0x00 23. "GSB727,Group Status Bit 727" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB726,Group Status Bit 726" "Group 0,Group 1" bitfld.long 0x00 21. "GSB725,Group Status Bit 725" "Group 0,Group 1" bitfld.long 0x00 20. "GSB724,Group Status Bit 724" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB723,Group Status Bit 723" "Group 0,Group 1" bitfld.long 0x00 18. "GSB722,Group Status Bit 722" "Group 0,Group 1" bitfld.long 0x00 17. "GSB721,Group Status Bit 721" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB720,Group Status Bit 720" "Group 0,Group 1" bitfld.long 0x00 15. "GSB719,Group Status Bit 719" "Group 0,Group 1" bitfld.long 0x00 14. "GSB718,Group Status Bit 718" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB717,Group Status Bit 717" "Group 0,Group 1" bitfld.long 0x00 12. "GSB716,Group Status Bit 716" "Group 0,Group 1" bitfld.long 0x00 11. "GSB715,Group Status Bit 715" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB714,Group Status Bit 714" "Group 0,Group 1" bitfld.long 0x00 9. "GSB713,Group Status Bit 713" "Group 0,Group 1" bitfld.long 0x00 8. "GSB712,Group Status Bit 712" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB711,Group Status Bit 711" "Group 0,Group 1" bitfld.long 0x00 6. "GSB710,Group Status Bit 710" "Group 0,Group 1" bitfld.long 0x00 5. "GSB709,Group Status Bit 709" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB708,Group Status Bit 708" "Group 0,Group 1" bitfld.long 0x00 3. "GSB707,Group Status Bit 707" "Group 0,Group 1" bitfld.long 0x00 2. "GSB706,Group Status Bit 706" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB705,Group Status Bit 705" "Group 0,Group 1" bitfld.long 0x00 0. "GSB704,Group Status Bit 704" "Group 0,Group 1" else rgroup.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xDC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure Access)" bitfld.long 0x00 31. "GSB767,Group Status Bit 767" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB766,Group Status Bit 766" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB765,Group Status Bit 765" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB764,Group Status Bit 764" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB763,Group Status Bit 763" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB762,Group Status Bit 762" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB761,Group Status Bit 761" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB760,Group Status Bit 760" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB759,Group Status Bit 759" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB758,Group Status Bit 758" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB757,Group Status Bit 757" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB756,Group Status Bit 756" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB755,Group Status Bit 755" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB754,Group Status Bit 754" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB753,Group Status Bit 753" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB752,Group Status Bit 752" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB751,Group Status Bit 751" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB750,Group Status Bit 750" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB749,Group Status Bit 749" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB748,Group Status Bit 748" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB747,Group Status Bit 747" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB746,Group Status Bit 746" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB745,Group Status Bit 745" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB744,Group Status Bit 744" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB743,Group Status Bit 743" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB742,Group Status Bit 742" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB741,Group Status Bit 741" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB740,Group Status Bit 740" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB739,Group Status Bit 739" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB738,Group Status Bit 738" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB737,Group Status Bit 737" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB736,Group Status Bit 736" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23" bitfld.long 0x00 31. "GSB767,Group Status Bit 767" "Group 0,Group 1" bitfld.long 0x00 30. "GSB766,Group Status Bit 766" "Group 0,Group 1" bitfld.long 0x00 29. "GSB765,Group Status Bit 765" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB764,Group Status Bit 764" "Group 0,Group 1" bitfld.long 0x00 27. "GSB763,Group Status Bit 763" "Group 0,Group 1" bitfld.long 0x00 26. "GSB762,Group Status Bit 762" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB761,Group Status Bit 761" "Group 0,Group 1" bitfld.long 0x00 24. "GSB760,Group Status Bit 760" "Group 0,Group 1" bitfld.long 0x00 23. "GSB759,Group Status Bit 759" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB758,Group Status Bit 758" "Group 0,Group 1" bitfld.long 0x00 21. "GSB757,Group Status Bit 757" "Group 0,Group 1" bitfld.long 0x00 20. "GSB756,Group Status Bit 756" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB755,Group Status Bit 755" "Group 0,Group 1" bitfld.long 0x00 18. "GSB754,Group Status Bit 754" "Group 0,Group 1" bitfld.long 0x00 17. "GSB753,Group Status Bit 753" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB752,Group Status Bit 752" "Group 0,Group 1" bitfld.long 0x00 15. "GSB751,Group Status Bit 751" "Group 0,Group 1" bitfld.long 0x00 14. "GSB750,Group Status Bit 750" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB749,Group Status Bit 749" "Group 0,Group 1" bitfld.long 0x00 12. "GSB748,Group Status Bit 748" "Group 0,Group 1" bitfld.long 0x00 11. "GSB747,Group Status Bit 747" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB746,Group Status Bit 746" "Group 0,Group 1" bitfld.long 0x00 9. "GSB745,Group Status Bit 745" "Group 0,Group 1" bitfld.long 0x00 8. "GSB744,Group Status Bit 744" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB743,Group Status Bit 743" "Group 0,Group 1" bitfld.long 0x00 6. "GSB742,Group Status Bit 742" "Group 0,Group 1" bitfld.long 0x00 5. "GSB741,Group Status Bit 741" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB740,Group Status Bit 740" "Group 0,Group 1" bitfld.long 0x00 3. "GSB739,Group Status Bit 739" "Group 0,Group 1" bitfld.long 0x00 2. "GSB738,Group Status Bit 738" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB737,Group Status Bit 737" "Group 0,Group 1" bitfld.long 0x00 0. "GSB736,Group Status Bit 736" "Group 0,Group 1" else rgroup.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure Access)" bitfld.long 0x00 31. "GSB799,Group Status Bit 799" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB798,Group Status Bit 798" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB797,Group Status Bit 797" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB796,Group Status Bit 796" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB795,Group Status Bit 795" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB794,Group Status Bit 794" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB793,Group Status Bit 793" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB792,Group Status Bit 792" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB791,Group Status Bit 791" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB790,Group Status Bit 790" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB789,Group Status Bit 789" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB788,Group Status Bit 788" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB787,Group Status Bit 787" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB786,Group Status Bit 786" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB785,Group Status Bit 785" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB784,Group Status Bit 784" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB783,Group Status Bit 783" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB782,Group Status Bit 782" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB781,Group Status Bit 781" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB780,Group Status Bit 780" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB779,Group Status Bit 779" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB778,Group Status Bit 778" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB777,Group Status Bit 777" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB776,Group Status Bit 776" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB775,Group Status Bit 775" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB774,Group Status Bit 774" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB773,Group Status Bit 773" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB772,Group Status Bit 772" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB771,Group Status Bit 771" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB770,Group Status Bit 770" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB769,Group Status Bit 769" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB768,Group Status Bit 768" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24" bitfld.long 0x00 31. "GSB799,Group Status Bit 799" "Group 0,Group 1" bitfld.long 0x00 30. "GSB798,Group Status Bit 798" "Group 0,Group 1" bitfld.long 0x00 29. "GSB797,Group Status Bit 797" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB796,Group Status Bit 796" "Group 0,Group 1" bitfld.long 0x00 27. "GSB795,Group Status Bit 795" "Group 0,Group 1" bitfld.long 0x00 26. "GSB794,Group Status Bit 794" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB793,Group Status Bit 793" "Group 0,Group 1" bitfld.long 0x00 24. "GSB792,Group Status Bit 792" "Group 0,Group 1" bitfld.long 0x00 23. "GSB791,Group Status Bit 791" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB790,Group Status Bit 790" "Group 0,Group 1" bitfld.long 0x00 21. "GSB789,Group Status Bit 789" "Group 0,Group 1" bitfld.long 0x00 20. "GSB788,Group Status Bit 788" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB787,Group Status Bit 787" "Group 0,Group 1" bitfld.long 0x00 18. "GSB786,Group Status Bit 786" "Group 0,Group 1" bitfld.long 0x00 17. "GSB785,Group Status Bit 785" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB784,Group Status Bit 784" "Group 0,Group 1" bitfld.long 0x00 15. "GSB783,Group Status Bit 783" "Group 0,Group 1" bitfld.long 0x00 14. "GSB782,Group Status Bit 782" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB781,Group Status Bit 781" "Group 0,Group 1" bitfld.long 0x00 12. "GSB780,Group Status Bit 780" "Group 0,Group 1" bitfld.long 0x00 11. "GSB779,Group Status Bit 779" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB778,Group Status Bit 778" "Group 0,Group 1" bitfld.long 0x00 9. "GSB777,Group Status Bit 777" "Group 0,Group 1" bitfld.long 0x00 8. "GSB776,Group Status Bit 776" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB775,Group Status Bit 775" "Group 0,Group 1" bitfld.long 0x00 6. "GSB774,Group Status Bit 774" "Group 0,Group 1" bitfld.long 0x00 5. "GSB773,Group Status Bit 773" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB772,Group Status Bit 772" "Group 0,Group 1" bitfld.long 0x00 3. "GSB771,Group Status Bit 771" "Group 0,Group 1" bitfld.long 0x00 2. "GSB770,Group Status Bit 770" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB769,Group Status Bit 769" "Group 0,Group 1" bitfld.long 0x00 0. "GSB768,Group Status Bit 768" "Group 0,Group 1" else rgroup.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure Access)" bitfld.long 0x00 31. "GSB831,Group Status Bit 831" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB830,Group Status Bit 830" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB829,Group Status Bit 829" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB828,Group Status Bit 828" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB827,Group Status Bit 827" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB826,Group Status Bit 826" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB825,Group Status Bit 825" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB824,Group Status Bit 824" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB823,Group Status Bit 823" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB822,Group Status Bit 822" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB821,Group Status Bit 821" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB820,Group Status Bit 820" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB819,Group Status Bit 819" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB818,Group Status Bit 818" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB817,Group Status Bit 817" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB816,Group Status Bit 816" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB815,Group Status Bit 815" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB814,Group Status Bit 814" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB813,Group Status Bit 813" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB812,Group Status Bit 812" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB811,Group Status Bit 811" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB810,Group Status Bit 810" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB809,Group Status Bit 809" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB808,Group Status Bit 808" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB807,Group Status Bit 807" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB806,Group Status Bit 806" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB805,Group Status Bit 805" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB804,Group Status Bit 804" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB803,Group Status Bit 803" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB802,Group Status Bit 802" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB801,Group Status Bit 801" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB800,Group Status Bit 800" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25" bitfld.long 0x00 31. "GSB831,Group Status Bit 831" "Group 0,Group 1" bitfld.long 0x00 30. "GSB830,Group Status Bit 830" "Group 0,Group 1" bitfld.long 0x00 29. "GSB829,Group Status Bit 829" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB828,Group Status Bit 828" "Group 0,Group 1" bitfld.long 0x00 27. "GSB827,Group Status Bit 827" "Group 0,Group 1" bitfld.long 0x00 26. "GSB826,Group Status Bit 826" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB825,Group Status Bit 825" "Group 0,Group 1" bitfld.long 0x00 24. "GSB824,Group Status Bit 824" "Group 0,Group 1" bitfld.long 0x00 23. "GSB823,Group Status Bit 823" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB822,Group Status Bit 822" "Group 0,Group 1" bitfld.long 0x00 21. "GSB821,Group Status Bit 821" "Group 0,Group 1" bitfld.long 0x00 20. "GSB820,Group Status Bit 820" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB819,Group Status Bit 819" "Group 0,Group 1" bitfld.long 0x00 18. "GSB818,Group Status Bit 818" "Group 0,Group 1" bitfld.long 0x00 17. "GSB817,Group Status Bit 817" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB816,Group Status Bit 816" "Group 0,Group 1" bitfld.long 0x00 15. "GSB815,Group Status Bit 815" "Group 0,Group 1" bitfld.long 0x00 14. "GSB814,Group Status Bit 814" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB813,Group Status Bit 813" "Group 0,Group 1" bitfld.long 0x00 12. "GSB812,Group Status Bit 812" "Group 0,Group 1" bitfld.long 0x00 11. "GSB811,Group Status Bit 811" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB810,Group Status Bit 810" "Group 0,Group 1" bitfld.long 0x00 9. "GSB809,Group Status Bit 809" "Group 0,Group 1" bitfld.long 0x00 8. "GSB808,Group Status Bit 808" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB807,Group Status Bit 807" "Group 0,Group 1" bitfld.long 0x00 6. "GSB806,Group Status Bit 806" "Group 0,Group 1" bitfld.long 0x00 5. "GSB805,Group Status Bit 805" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB804,Group Status Bit 804" "Group 0,Group 1" bitfld.long 0x00 3. "GSB803,Group Status Bit 803" "Group 0,Group 1" bitfld.long 0x00 2. "GSB802,Group Status Bit 802" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB801,Group Status Bit 801" "Group 0,Group 1" bitfld.long 0x00 0. "GSB800,Group Status Bit 800" "Group 0,Group 1" else rgroup.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure Access)" bitfld.long 0x00 31. "GSB863,Group Status Bit 863" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB862,Group Status Bit 862" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB861,Group Status Bit 861" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB860,Group Status Bit 860" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB859,Group Status Bit 859" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB858,Group Status Bit 858" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB857,Group Status Bit 857" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB856,Group Status Bit 856" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB855,Group Status Bit 855" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB854,Group Status Bit 854" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB853,Group Status Bit 853" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB852,Group Status Bit 852" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB851,Group Status Bit 851" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB850,Group Status Bit 850" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB849,Group Status Bit 849" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB848,Group Status Bit 848" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB847,Group Status Bit 847" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB846,Group Status Bit 846" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB845,Group Status Bit 845" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB844,Group Status Bit 844" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB843,Group Status Bit 843" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB842,Group Status Bit 842" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB841,Group Status Bit 841" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB840,Group Status Bit 840" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB839,Group Status Bit 839" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB838,Group Status Bit 838" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB837,Group Status Bit 837" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB836,Group Status Bit 836" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB835,Group Status Bit 835" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB834,Group Status Bit 834" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB833,Group Status Bit 833" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB832,Group Status Bit 832" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26" bitfld.long 0x00 31. "GSB863,Group Status Bit 863" "Group 0,Group 1" bitfld.long 0x00 30. "GSB862,Group Status Bit 862" "Group 0,Group 1" bitfld.long 0x00 29. "GSB861,Group Status Bit 861" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB860,Group Status Bit 860" "Group 0,Group 1" bitfld.long 0x00 27. "GSB859,Group Status Bit 859" "Group 0,Group 1" bitfld.long 0x00 26. "GSB858,Group Status Bit 858" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB857,Group Status Bit 857" "Group 0,Group 1" bitfld.long 0x00 24. "GSB856,Group Status Bit 856" "Group 0,Group 1" bitfld.long 0x00 23. "GSB855,Group Status Bit 855" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB854,Group Status Bit 854" "Group 0,Group 1" bitfld.long 0x00 21. "GSB853,Group Status Bit 853" "Group 0,Group 1" bitfld.long 0x00 20. "GSB852,Group Status Bit 852" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB851,Group Status Bit 851" "Group 0,Group 1" bitfld.long 0x00 18. "GSB850,Group Status Bit 850" "Group 0,Group 1" bitfld.long 0x00 17. "GSB849,Group Status Bit 849" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB848,Group Status Bit 848" "Group 0,Group 1" bitfld.long 0x00 15. "GSB847,Group Status Bit 847" "Group 0,Group 1" bitfld.long 0x00 14. "GSB846,Group Status Bit 846" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB845,Group Status Bit 845" "Group 0,Group 1" bitfld.long 0x00 12. "GSB844,Group Status Bit 844" "Group 0,Group 1" bitfld.long 0x00 11. "GSB843,Group Status Bit 843" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB842,Group Status Bit 842" "Group 0,Group 1" bitfld.long 0x00 9. "GSB841,Group Status Bit 841" "Group 0,Group 1" bitfld.long 0x00 8. "GSB840,Group Status Bit 840" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB839,Group Status Bit 839" "Group 0,Group 1" bitfld.long 0x00 6. "GSB838,Group Status Bit 838" "Group 0,Group 1" bitfld.long 0x00 5. "GSB837,Group Status Bit 837" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB836,Group Status Bit 836" "Group 0,Group 1" bitfld.long 0x00 3. "GSB835,Group Status Bit 835" "Group 0,Group 1" bitfld.long 0x00 2. "GSB834,Group Status Bit 834" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB833,Group Status Bit 833" "Group 0,Group 1" bitfld.long 0x00 0. "GSB832,Group Status Bit 832" "Group 0,Group 1" else rgroup.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure Access)" bitfld.long 0x00 31. "GSB895,Group Status Bit 895" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB894,Group Status Bit 894" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB893,Group Status Bit 893" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB892,Group Status Bit 892" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB891,Group Status Bit 891" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB890,Group Status Bit 890" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB889,Group Status Bit 889" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB888,Group Status Bit 888" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB887,Group Status Bit 887" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB886,Group Status Bit 886" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB885,Group Status Bit 885" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB884,Group Status Bit 884" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB883,Group Status Bit 883" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB882,Group Status Bit 882" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB881,Group Status Bit 881" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB880,Group Status Bit 880" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB879,Group Status Bit 879" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB878,Group Status Bit 878" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB877,Group Status Bit 877" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB876,Group Status Bit 876" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB875,Group Status Bit 875" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB874,Group Status Bit 874" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB873,Group Status Bit 873" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB872,Group Status Bit 872" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB871,Group Status Bit 871" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB870,Group Status Bit 870" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB869,Group Status Bit 869" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB868,Group Status Bit 868" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB867,Group Status Bit 867" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB866,Group Status Bit 866" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB865,Group Status Bit 865" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB864,Group Status Bit 864" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27" bitfld.long 0x00 31. "GSB895,Group Status Bit 895" "Group 0,Group 1" bitfld.long 0x00 30. "GSB894,Group Status Bit 894" "Group 0,Group 1" bitfld.long 0x00 29. "GSB893,Group Status Bit 893" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB892,Group Status Bit 892" "Group 0,Group 1" bitfld.long 0x00 27. "GSB891,Group Status Bit 891" "Group 0,Group 1" bitfld.long 0x00 26. "GSB890,Group Status Bit 890" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB889,Group Status Bit 889" "Group 0,Group 1" bitfld.long 0x00 24. "GSB888,Group Status Bit 888" "Group 0,Group 1" bitfld.long 0x00 23. "GSB887,Group Status Bit 887" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB886,Group Status Bit 886" "Group 0,Group 1" bitfld.long 0x00 21. "GSB885,Group Status Bit 885" "Group 0,Group 1" bitfld.long 0x00 20. "GSB884,Group Status Bit 884" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB883,Group Status Bit 883" "Group 0,Group 1" bitfld.long 0x00 18. "GSB882,Group Status Bit 882" "Group 0,Group 1" bitfld.long 0x00 17. "GSB881,Group Status Bit 881" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB880,Group Status Bit 880" "Group 0,Group 1" bitfld.long 0x00 15. "GSB879,Group Status Bit 879" "Group 0,Group 1" bitfld.long 0x00 14. "GSB878,Group Status Bit 878" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB877,Group Status Bit 877" "Group 0,Group 1" bitfld.long 0x00 12. "GSB876,Group Status Bit 876" "Group 0,Group 1" bitfld.long 0x00 11. "GSB875,Group Status Bit 875" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB874,Group Status Bit 874" "Group 0,Group 1" bitfld.long 0x00 9. "GSB873,Group Status Bit 873" "Group 0,Group 1" bitfld.long 0x00 8. "GSB872,Group Status Bit 872" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB871,Group Status Bit 871" "Group 0,Group 1" bitfld.long 0x00 6. "GSB870,Group Status Bit 870" "Group 0,Group 1" bitfld.long 0x00 5. "GSB869,Group Status Bit 869" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB868,Group Status Bit 868" "Group 0,Group 1" bitfld.long 0x00 3. "GSB867,Group Status Bit 867" "Group 0,Group 1" bitfld.long 0x00 2. "GSB866,Group Status Bit 866" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB865,Group Status Bit 865" "Group 0,Group 1" bitfld.long 0x00 0. "GSB864,Group Status Bit 864" "Group 0,Group 1" else rgroup.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure Access)" bitfld.long 0x00 31. "GSB927,Group Status Bit 927" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB926,Group Status Bit 926" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB925,Group Status Bit 925" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB924,Group Status Bit 924" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB923,Group Status Bit 923" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB922,Group Status Bit 922" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB921,Group Status Bit 921" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB920,Group Status Bit 920" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB919,Group Status Bit 919" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB918,Group Status Bit 918" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB917,Group Status Bit 917" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB916,Group Status Bit 916" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB915,Group Status Bit 915" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB914,Group Status Bit 914" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB913,Group Status Bit 913" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB912,Group Status Bit 912" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB911,Group Status Bit 911" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB910,Group Status Bit 910" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB909,Group Status Bit 909" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB908,Group Status Bit 908" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB907,Group Status Bit 907" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB906,Group Status Bit 906" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB905,Group Status Bit 905" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB904,Group Status Bit 904" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB903,Group Status Bit 903" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB902,Group Status Bit 902" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB901,Group Status Bit 901" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB900,Group Status Bit 900" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB899,Group Status Bit 899" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB898,Group Status Bit 898" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB897,Group Status Bit 897" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB896,Group Status Bit 896" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28" bitfld.long 0x00 31. "GSB927,Group Status Bit 927" "Group 0,Group 1" bitfld.long 0x00 30. "GSB926,Group Status Bit 926" "Group 0,Group 1" bitfld.long 0x00 29. "GSB925,Group Status Bit 925" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB924,Group Status Bit 924" "Group 0,Group 1" bitfld.long 0x00 27. "GSB923,Group Status Bit 923" "Group 0,Group 1" bitfld.long 0x00 26. "GSB922,Group Status Bit 922" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB921,Group Status Bit 921" "Group 0,Group 1" bitfld.long 0x00 24. "GSB920,Group Status Bit 920" "Group 0,Group 1" bitfld.long 0x00 23. "GSB919,Group Status Bit 919" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB918,Group Status Bit 918" "Group 0,Group 1" bitfld.long 0x00 21. "GSB917,Group Status Bit 917" "Group 0,Group 1" bitfld.long 0x00 20. "GSB916,Group Status Bit 916" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB915,Group Status Bit 915" "Group 0,Group 1" bitfld.long 0x00 18. "GSB914,Group Status Bit 914" "Group 0,Group 1" bitfld.long 0x00 17. "GSB913,Group Status Bit 913" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB912,Group Status Bit 912" "Group 0,Group 1" bitfld.long 0x00 15. "GSB911,Group Status Bit 911" "Group 0,Group 1" bitfld.long 0x00 14. "GSB910,Group Status Bit 910" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB909,Group Status Bit 909" "Group 0,Group 1" bitfld.long 0x00 12. "GSB908,Group Status Bit 908" "Group 0,Group 1" bitfld.long 0x00 11. "GSB907,Group Status Bit 907" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB906,Group Status Bit 906" "Group 0,Group 1" bitfld.long 0x00 9. "GSB905,Group Status Bit 905" "Group 0,Group 1" bitfld.long 0x00 8. "GSB904,Group Status Bit 904" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB903,Group Status Bit 903" "Group 0,Group 1" bitfld.long 0x00 6. "GSB902,Group Status Bit 902" "Group 0,Group 1" bitfld.long 0x00 5. "GSB901,Group Status Bit 901" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB900,Group Status Bit 900" "Group 0,Group 1" bitfld.long 0x00 3. "GSB899,Group Status Bit 899" "Group 0,Group 1" bitfld.long 0x00 2. "GSB898,Group Status Bit 898" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB897,Group Status Bit 897" "Group 0,Group 1" bitfld.long 0x00 0. "GSB896,Group Status Bit 896" "Group 0,Group 1" else rgroup.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure Access)" bitfld.long 0x00 31. "GSB959,Group Status Bit 959" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB958,Group Status Bit 958" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB957,Group Status Bit 957" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB956,Group Status Bit 956" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB955,Group Status Bit 955" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB954,Group Status Bit 954" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB953,Group Status Bit 953" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB952,Group Status Bit 952" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB951,Group Status Bit 951" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB950,Group Status Bit 950" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB949,Group Status Bit 949" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB948,Group Status Bit 948" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB947,Group Status Bit 947" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB946,Group Status Bit 946" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB945,Group Status Bit 945" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB944,Group Status Bit 944" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB943,Group Status Bit 943" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB942,Group Status Bit 942" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB941,Group Status Bit 941" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB940,Group Status Bit 940" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB939,Group Status Bit 939" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB938,Group Status Bit 938" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB937,Group Status Bit 937" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB936,Group Status Bit 936" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB935,Group Status Bit 935" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB934,Group Status Bit 934" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB933,Group Status Bit 933" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB932,Group Status Bit 932" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB931,Group Status Bit 931" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB930,Group Status Bit 930" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB929,Group Status Bit 929" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB928,Group Status Bit 928" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29" bitfld.long 0x00 31. "GSB959,Group Status Bit 959" "Group 0,Group 1" bitfld.long 0x00 30. "GSB958,Group Status Bit 958" "Group 0,Group 1" bitfld.long 0x00 29. "GSB957,Group Status Bit 957" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB956,Group Status Bit 956" "Group 0,Group 1" bitfld.long 0x00 27. "GSB955,Group Status Bit 955" "Group 0,Group 1" bitfld.long 0x00 26. "GSB954,Group Status Bit 954" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB953,Group Status Bit 953" "Group 0,Group 1" bitfld.long 0x00 24. "GSB952,Group Status Bit 952" "Group 0,Group 1" bitfld.long 0x00 23. "GSB951,Group Status Bit 951" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB950,Group Status Bit 950" "Group 0,Group 1" bitfld.long 0x00 21. "GSB949,Group Status Bit 949" "Group 0,Group 1" bitfld.long 0x00 20. "GSB948,Group Status Bit 948" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB947,Group Status Bit 947" "Group 0,Group 1" bitfld.long 0x00 18. "GSB946,Group Status Bit 946" "Group 0,Group 1" bitfld.long 0x00 17. "GSB945,Group Status Bit 945" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB944,Group Status Bit 944" "Group 0,Group 1" bitfld.long 0x00 15. "GSB943,Group Status Bit 943" "Group 0,Group 1" bitfld.long 0x00 14. "GSB942,Group Status Bit 942" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB941,Group Status Bit 941" "Group 0,Group 1" bitfld.long 0x00 12. "GSB940,Group Status Bit 940" "Group 0,Group 1" bitfld.long 0x00 11. "GSB939,Group Status Bit 939" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB938,Group Status Bit 938" "Group 0,Group 1" bitfld.long 0x00 9. "GSB937,Group Status Bit 937" "Group 0,Group 1" bitfld.long 0x00 8. "GSB936,Group Status Bit 936" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB935,Group Status Bit 935" "Group 0,Group 1" bitfld.long 0x00 6. "GSB934,Group Status Bit 934" "Group 0,Group 1" bitfld.long 0x00 5. "GSB933,Group Status Bit 933" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB932,Group Status Bit 932" "Group 0,Group 1" bitfld.long 0x00 3. "GSB931,Group Status Bit 931" "Group 0,Group 1" bitfld.long 0x00 2. "GSB930,Group Status Bit 930" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB929,Group Status Bit 929" "Group 0,Group 1" bitfld.long 0x00 0. "GSB928,Group Status Bit 928" "Group 0,Group 1" else rgroup.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29" endif if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure Access)" bitfld.long 0x00 31. "GSB991,Group Status Bit 991" "Secure,Non-secure Group 1" bitfld.long 0x00 30. "GSB990,Group Status Bit 990" "Secure,Non-secure Group 1" bitfld.long 0x00 29. "GSB989,Group Status Bit 989" "Secure,Non-secure Group 1" newline bitfld.long 0x00 28. "GSB988,Group Status Bit 988" "Secure,Non-secure Group 1" bitfld.long 0x00 27. "GSB987,Group Status Bit 987" "Secure,Non-secure Group 1" bitfld.long 0x00 26. "GSB986,Group Status Bit 986" "Secure,Non-secure Group 1" newline bitfld.long 0x00 25. "GSB985,Group Status Bit 985" "Secure,Non-secure Group 1" bitfld.long 0x00 24. "GSB984,Group Status Bit 984" "Secure,Non-secure Group 1" bitfld.long 0x00 23. "GSB983,Group Status Bit 983" "Secure,Non-secure Group 1" newline bitfld.long 0x00 22. "GSB982,Group Status Bit 982" "Secure,Non-secure Group 1" bitfld.long 0x00 21. "GSB981,Group Status Bit 981" "Secure,Non-secure Group 1" bitfld.long 0x00 20. "GSB980,Group Status Bit 980" "Secure,Non-secure Group 1" newline bitfld.long 0x00 19. "GSB979,Group Status Bit 979" "Secure,Non-secure Group 1" bitfld.long 0x00 18. "GSB978,Group Status Bit 978" "Secure,Non-secure Group 1" bitfld.long 0x00 17. "GSB977,Group Status Bit 977" "Secure,Non-secure Group 1" newline bitfld.long 0x00 16. "GSB976,Group Status Bit 976" "Secure,Non-secure Group 1" bitfld.long 0x00 15. "GSB975,Group Status Bit 975" "Secure,Non-secure Group 1" bitfld.long 0x00 14. "GSB974,Group Status Bit 974" "Secure,Non-secure Group 1" newline bitfld.long 0x00 13. "GSB973,Group Status Bit 973" "Secure,Non-secure Group 1" bitfld.long 0x00 12. "GSB972,Group Status Bit 972" "Secure,Non-secure Group 1" bitfld.long 0x00 11. "GSB971,Group Status Bit 971" "Secure,Non-secure Group 1" newline bitfld.long 0x00 10. "GSB970,Group Status Bit 970" "Secure,Non-secure Group 1" bitfld.long 0x00 9. "GSB969,Group Status Bit 969" "Secure,Non-secure Group 1" bitfld.long 0x00 8. "GSB968,Group Status Bit 968" "Secure,Non-secure Group 1" newline bitfld.long 0x00 7. "GSB967,Group Status Bit 967" "Secure,Non-secure Group 1" bitfld.long 0x00 6. "GSB966,Group Status Bit 966" "Secure,Non-secure Group 1" bitfld.long 0x00 5. "GSB965,Group Status Bit 965" "Secure,Non-secure Group 1" newline bitfld.long 0x00 4. "GSB964,Group Status Bit 964" "Secure,Non-secure Group 1" bitfld.long 0x00 3. "GSB963,Group Status Bit 963" "Secure,Non-secure Group 1" bitfld.long 0x00 2. "GSB962,Group Status Bit 962" "Secure,Non-secure Group 1" newline bitfld.long 0x00 1. "GSB961,Group Status Bit 961" "Secure,Non-secure Group 1" bitfld.long 0x00 0. "GSB960,Group Status Bit 960" "Secure,Non-secure Group 1" elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30" bitfld.long 0x00 31. "GSB991,Group Status Bit 991" "Group 0,Group 1" bitfld.long 0x00 30. "GSB990,Group Status Bit 990" "Group 0,Group 1" bitfld.long 0x00 29. "GSB989,Group Status Bit 989" "Group 0,Group 1" newline bitfld.long 0x00 28. "GSB988,Group Status Bit 988" "Group 0,Group 1" bitfld.long 0x00 27. "GSB987,Group Status Bit 987" "Group 0,Group 1" bitfld.long 0x00 26. "GSB986,Group Status Bit 986" "Group 0,Group 1" newline bitfld.long 0x00 25. "GSB985,Group Status Bit 985" "Group 0,Group 1" bitfld.long 0x00 24. "GSB984,Group Status Bit 984" "Group 0,Group 1" bitfld.long 0x00 23. "GSB983,Group Status Bit 983" "Group 0,Group 1" newline bitfld.long 0x00 22. "GSB982,Group Status Bit 982" "Group 0,Group 1" bitfld.long 0x00 21. "GSB981,Group Status Bit 981" "Group 0,Group 1" bitfld.long 0x00 20. "GSB980,Group Status Bit 980" "Group 0,Group 1" newline bitfld.long 0x00 19. "GSB979,Group Status Bit 979" "Group 0,Group 1" bitfld.long 0x00 18. "GSB978,Group Status Bit 978" "Group 0,Group 1" bitfld.long 0x00 17. "GSB977,Group Status Bit 977" "Group 0,Group 1" newline bitfld.long 0x00 16. "GSB976,Group Status Bit 976" "Group 0,Group 1" bitfld.long 0x00 15. "GSB975,Group Status Bit 975" "Group 0,Group 1" bitfld.long 0x00 14. "GSB974,Group Status Bit 974" "Group 0,Group 1" newline bitfld.long 0x00 13. "GSB973,Group Status Bit 973" "Group 0,Group 1" bitfld.long 0x00 12. "GSB972,Group Status Bit 972" "Group 0,Group 1" bitfld.long 0x00 11. "GSB971,Group Status Bit 971" "Group 0,Group 1" newline bitfld.long 0x00 10. "GSB970,Group Status Bit 970" "Group 0,Group 1" bitfld.long 0x00 9. "GSB969,Group Status Bit 969" "Group 0,Group 1" bitfld.long 0x00 8. "GSB968,Group Status Bit 968" "Group 0,Group 1" newline bitfld.long 0x00 7. "GSB967,Group Status Bit 967" "Group 0,Group 1" bitfld.long 0x00 6. "GSB966,Group Status Bit 966" "Group 0,Group 1" bitfld.long 0x00 5. "GSB965,Group Status Bit 965" "Group 0,Group 1" newline bitfld.long 0x00 4. "GSB964,Group Status Bit 964" "Group 0,Group 1" bitfld.long 0x00 3. "GSB963,Group Status Bit 963" "Group 0,Group 1" bitfld.long 0x00 2. "GSB962,Group Status Bit 962" "Group 0,Group 1" newline bitfld.long 0x00 1. "GSB961,Group Status Bit 961" "Group 0,Group 1" bitfld.long 0x00 0. "GSB960,Group Status Bit 960" "Group 0,Group 1" else rgroup.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30" endif tree.end tree "Set/Clear Enable Registers" if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01) group.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB63,Set/Clear Enable Bit 63" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB62,Set/Clear Enable Bit 62" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB61,Set/Clear Enable Bit 61" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB60,Set/Clear Enable Bit 60" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB59,Set/Clear Enable Bit 59" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB58,Set/Clear Enable Bit 58" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB57,Set/Clear Enable Bit 57" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB56,Set/Clear Enable Bit 56" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB55,Set/Clear Enable Bit 55" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB54,Set/Clear Enable Bit 54" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB53,Set/Clear Enable Bit 53" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB52,Set/Clear Enable Bit 52" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB51,Set/Clear Enable Bit 51" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB50,Set/Clear Enable Bit 50" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB49,Set/Clear Enable Bit 49" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB48,Set/Clear Enable Bit 48" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB47,Set/Clear Enable Bit 47" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB46,Set/Clear Enable Bit 46" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB45,Set/Clear Enable Bit 45" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB44,Set/Clear Enable Bit 44" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB43,Set/Clear Enable Bit 43" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB42,Set/Clear Enable Bit 42" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB41,Set/Clear Enable Bit 41" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB40,Set/Clear Enable Bit 40" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB39,Set/Clear Enable Bit 39" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB38,Set/Clear Enable Bit 38" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB37,Set/Clear Enable Bit 37" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB36,Set/Clear Enable Bit 36" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB35,Set/Clear Enable Bit 35" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB34,Set/Clear Enable Bit 34" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB33,Set/Clear Enable Bit 33" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB32,Set/Clear Enable Bit 32" "Disabled,Enabled" else rgroup.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02) group.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB95,Set/Clear Enable Bit 95" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB94,Set/Clear Enable Bit 94" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB93,Set/Clear Enable Bit 93" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB92,Set/Clear Enable Bit 92" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB91,Set/Clear Enable Bit 91" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB90,Set/Clear Enable Bit 90" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB89,Set/Clear Enable Bit 89" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB88,Set/Clear Enable Bit 88" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB87,Set/Clear Enable Bit 87" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB86,Set/Clear Enable Bit 86" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB85,Set/Clear Enable Bit 85" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB84,Set/Clear Enable Bit 84" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB83,Set/Clear Enable Bit 83" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB82,Set/Clear Enable Bit 82" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB81,Set/Clear Enable Bit 81" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB80,Set/Clear Enable Bit 80" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB79,Set/Clear Enable Bit 79" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB78,Set/Clear Enable Bit 78" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB77,Set/Clear Enable Bit 77" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB76,Set/Clear Enable Bit 76" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB75,Set/Clear Enable Bit 75" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB74,Set/Clear Enable Bit 74" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB73,Set/Clear Enable Bit 73" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB72,Set/Clear Enable Bit 72" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB71,Set/Clear Enable Bit 71" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB70,Set/Clear Enable Bit 70" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB69,Set/Clear Enable Bit 69" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB68,Set/Clear Enable Bit 68" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB67,Set/Clear Enable Bit 67" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB66,Set/Clear Enable Bit 66" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB65,Set/Clear Enable Bit 65" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB64,Set/Clear Enable Bit 64" "Disabled,Enabled" else rgroup.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03) group.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB127,Set/Clear Enable Bit 127" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB126,Set/Clear Enable Bit 126" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB125,Set/Clear Enable Bit 125" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB124,Set/Clear Enable Bit 124" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB123,Set/Clear Enable Bit 123" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB122,Set/Clear Enable Bit 122" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB121,Set/Clear Enable Bit 121" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB120,Set/Clear Enable Bit 120" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB119,Set/Clear Enable Bit 119" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB118,Set/Clear Enable Bit 118" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB117,Set/Clear Enable Bit 117" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB116,Set/Clear Enable Bit 116" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB115,Set/Clear Enable Bit 115" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB114,Set/Clear Enable Bit 114" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB113,Set/Clear Enable Bit 113" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB112,Set/Clear Enable Bit 112" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB111,Set/Clear Enable Bit 111" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB110,Set/Clear Enable Bit 110" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB109,Set/Clear Enable Bit 109" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB108,Set/Clear Enable Bit 108" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB107,Set/Clear Enable Bit 107" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB106,Set/Clear Enable Bit 106" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB105,Set/Clear Enable Bit 105" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB104,Set/Clear Enable Bit 104" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB103,Set/Clear Enable Bit 103" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB102,Set/Clear Enable Bit 102" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB101,Set/Clear Enable Bit 101" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB100,Set/Clear Enable Bit 100" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB99,Set/Clear Enable Bit 99" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB98,Set/Clear Enable Bit 98" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB97,Set/Clear Enable Bit 97" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB96,Set/Clear Enable Bit 96" "Disabled,Enabled" else rgroup.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04) group.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB159,Set/Clear Enable Bit 159" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB158,Set/Clear Enable Bit 158" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB157,Set/Clear Enable Bit 157" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB156,Set/Clear Enable Bit 156" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB155,Set/Clear Enable Bit 155" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB154,Set/Clear Enable Bit 154" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB153,Set/Clear Enable Bit 153" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB152,Set/Clear Enable Bit 152" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB151,Set/Clear Enable Bit 151" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB150,Set/Clear Enable Bit 150" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB149,Set/Clear Enable Bit 149" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB148,Set/Clear Enable Bit 148" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB147,Set/Clear Enable Bit 147" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB146,Set/Clear Enable Bit 146" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB145,Set/Clear Enable Bit 145" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB144,Set/Clear Enable Bit 144" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB143,Set/Clear Enable Bit 143" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB142,Set/Clear Enable Bit 142" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB141,Set/Clear Enable Bit 141" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB140,Set/Clear Enable Bit 140" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB139,Set/Clear Enable Bit 139" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB138,Set/Clear Enable Bit 138" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB137,Set/Clear Enable Bit 137" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB136,Set/Clear Enable Bit 136" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB135,Set/Clear Enable Bit 135" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB134,Set/Clear Enable Bit 134" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB133,Set/Clear Enable Bit 133" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB132,Set/Clear Enable Bit 132" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB131,Set/Clear Enable Bit 131" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB130,Set/Clear Enable Bit 130" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB129,Set/Clear Enable Bit 129" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB128,Set/Clear Enable Bit 128" "Disabled,Enabled" else rgroup.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05) group.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB191,Set/Clear Enable Bit 191" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB190,Set/Clear Enable Bit 190" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB189,Set/Clear Enable Bit 189" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB188,Set/Clear Enable Bit 188" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB187,Set/Clear Enable Bit 187" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB186,Set/Clear Enable Bit 186" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB185,Set/Clear Enable Bit 185" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB184,Set/Clear Enable Bit 184" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB183,Set/Clear Enable Bit 183" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB182,Set/Clear Enable Bit 182" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB181,Set/Clear Enable Bit 181" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB180,Set/Clear Enable Bit 180" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB179,Set/Clear Enable Bit 179" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB178,Set/Clear Enable Bit 178" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB177,Set/Clear Enable Bit 177" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB176,Set/Clear Enable Bit 176" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB175,Set/Clear Enable Bit 175" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB174,Set/Clear Enable Bit 174" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB173,Set/Clear Enable Bit 173" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB172,Set/Clear Enable Bit 172" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB171,Set/Clear Enable Bit 171" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB170,Set/Clear Enable Bit 170" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB169,Set/Clear Enable Bit 169" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB168,Set/Clear Enable Bit 168" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB167,Set/Clear Enable Bit 167" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB166,Set/Clear Enable Bit 166" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB165,Set/Clear Enable Bit 165" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB164,Set/Clear Enable Bit 164" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB163,Set/Clear Enable Bit 163" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB162,Set/Clear Enable Bit 162" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB161,Set/Clear Enable Bit 161" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB160,Set/Clear Enable Bit 160" "Disabled,Enabled" else rgroup.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06) group.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB223,Set/Clear Enable Bit 223" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB222,Set/Clear Enable Bit 222" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB221,Set/Clear Enable Bit 221" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB220,Set/Clear Enable Bit 220" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB219,Set/Clear Enable Bit 219" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB218,Set/Clear Enable Bit 218" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB217,Set/Clear Enable Bit 217" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB216,Set/Clear Enable Bit 216" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB215,Set/Clear Enable Bit 215" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB214,Set/Clear Enable Bit 214" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB213,Set/Clear Enable Bit 213" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB212,Set/Clear Enable Bit 212" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB211,Set/Clear Enable Bit 211" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB210,Set/Clear Enable Bit 210" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB209,Set/Clear Enable Bit 209" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB208,Set/Clear Enable Bit 208" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB207,Set/Clear Enable Bit 207" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB206,Set/Clear Enable Bit 206" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB205,Set/Clear Enable Bit 205" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB204,Set/Clear Enable Bit 204" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB203,Set/Clear Enable Bit 203" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB202,Set/Clear Enable Bit 202" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB201,Set/Clear Enable Bit 201" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB200,Set/Clear Enable Bit 200" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB199,Set/Clear Enable Bit 199" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB198,Set/Clear Enable Bit 198" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB197,Set/Clear Enable Bit 197" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB196,Set/Clear Enable Bit 196" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB195,Set/Clear Enable Bit 195" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB194,Set/Clear Enable Bit 194" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB193,Set/Clear Enable Bit 193" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB192,Set/Clear Enable Bit 192" "Disabled,Enabled" else rgroup.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07) group.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB255,Set/Clear Enable Bit 255" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB254,Set/Clear Enable Bit 254" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB253,Set/Clear Enable Bit 253" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB252,Set/Clear Enable Bit 252" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB251,Set/Clear Enable Bit 251" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB250,Set/Clear Enable Bit 250" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB249,Set/Clear Enable Bit 249" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB248,Set/Clear Enable Bit 248" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB247,Set/Clear Enable Bit 247" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB246,Set/Clear Enable Bit 246" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB245,Set/Clear Enable Bit 245" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB244,Set/Clear Enable Bit 244" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB243,Set/Clear Enable Bit 243" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB242,Set/Clear Enable Bit 242" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB241,Set/Clear Enable Bit 241" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB240,Set/Clear Enable Bit 240" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB239,Set/Clear Enable Bit 239" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB238,Set/Clear Enable Bit 238" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB237,Set/Clear Enable Bit 237" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB236,Set/Clear Enable Bit 236" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB235,Set/Clear Enable Bit 235" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB234,Set/Clear Enable Bit 234" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB233,Set/Clear Enable Bit 233" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB232,Set/Clear Enable Bit 232" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB231,Set/Clear Enable Bit 231" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB230,Set/Clear Enable Bit 230" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB229,Set/Clear Enable Bit 229" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB228,Set/Clear Enable Bit 228" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB227,Set/Clear Enable Bit 227" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB226,Set/Clear Enable Bit 226" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB225,Set/Clear Enable Bit 225" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB224,Set/Clear Enable Bit 224" "Disabled,Enabled" else rgroup.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08) group.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB287,Set/Clear Enable Bit 287" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB286,Set/Clear Enable Bit 286" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB285,Set/Clear Enable Bit 285" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB284,Set/Clear Enable Bit 284" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB283,Set/Clear Enable Bit 283" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB282,Set/Clear Enable Bit 282" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB281,Set/Clear Enable Bit 281" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB280,Set/Clear Enable Bit 280" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB279,Set/Clear Enable Bit 279" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB278,Set/Clear Enable Bit 278" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB277,Set/Clear Enable Bit 277" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB276,Set/Clear Enable Bit 276" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB275,Set/Clear Enable Bit 275" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB274,Set/Clear Enable Bit 274" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB273,Set/Clear Enable Bit 273" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB272,Set/Clear Enable Bit 272" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB271,Set/Clear Enable Bit 271" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB270,Set/Clear Enable Bit 270" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB269,Set/Clear Enable Bit 269" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB268,Set/Clear Enable Bit 268" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB267,Set/Clear Enable Bit 267" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB266,Set/Clear Enable Bit 266" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB265,Set/Clear Enable Bit 265" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB264,Set/Clear Enable Bit 264" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB263,Set/Clear Enable Bit 263" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB262,Set/Clear Enable Bit 262" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB261,Set/Clear Enable Bit 261" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB260,Set/Clear Enable Bit 260" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB259,Set/Clear Enable Bit 259" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB258,Set/Clear Enable Bit 258" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB257,Set/Clear Enable Bit 257" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB256,Set/Clear Enable Bit 256" "Disabled,Enabled" else rgroup.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09) group.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB319,Set/Clear Enable Bit 319" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB318,Set/Clear Enable Bit 318" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB317,Set/Clear Enable Bit 317" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB316,Set/Clear Enable Bit 316" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB315,Set/Clear Enable Bit 315" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB314,Set/Clear Enable Bit 314" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB313,Set/Clear Enable Bit 313" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB312,Set/Clear Enable Bit 312" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB311,Set/Clear Enable Bit 311" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB310,Set/Clear Enable Bit 310" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB309,Set/Clear Enable Bit 309" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB308,Set/Clear Enable Bit 308" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB307,Set/Clear Enable Bit 307" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB306,Set/Clear Enable Bit 306" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB305,Set/Clear Enable Bit 305" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB304,Set/Clear Enable Bit 304" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB303,Set/Clear Enable Bit 303" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB302,Set/Clear Enable Bit 302" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB301,Set/Clear Enable Bit 301" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB300,Set/Clear Enable Bit 300" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB299,Set/Clear Enable Bit 299" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB298,Set/Clear Enable Bit 298" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB297,Set/Clear Enable Bit 297" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB296,Set/Clear Enable Bit 296" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB295,Set/Clear Enable Bit 295" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB294,Set/Clear Enable Bit 294" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB293,Set/Clear Enable Bit 293" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB292,Set/Clear Enable Bit 292" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB291,Set/Clear Enable Bit 291" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB290,Set/Clear Enable Bit 290" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB289,Set/Clear Enable Bit 289" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB288,Set/Clear Enable Bit 288" "Disabled,Enabled" else rgroup.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A) group.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB351,Set/Clear Enable Bit 351" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB350,Set/Clear Enable Bit 350" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB349,Set/Clear Enable Bit 349" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB348,Set/Clear Enable Bit 348" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB347,Set/Clear Enable Bit 347" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB346,Set/Clear Enable Bit 346" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB345,Set/Clear Enable Bit 345" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB344,Set/Clear Enable Bit 344" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB343,Set/Clear Enable Bit 343" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB342,Set/Clear Enable Bit 342" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB341,Set/Clear Enable Bit 341" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB340,Set/Clear Enable Bit 340" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB339,Set/Clear Enable Bit 339" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB338,Set/Clear Enable Bit 338" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB337,Set/Clear Enable Bit 337" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB336,Set/Clear Enable Bit 336" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB335,Set/Clear Enable Bit 335" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB334,Set/Clear Enable Bit 334" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB333,Set/Clear Enable Bit 333" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB332,Set/Clear Enable Bit 332" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB331,Set/Clear Enable Bit 331" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB330,Set/Clear Enable Bit 330" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB329,Set/Clear Enable Bit 329" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB328,Set/Clear Enable Bit 328" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB327,Set/Clear Enable Bit 327" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB326,Set/Clear Enable Bit 326" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB325,Set/Clear Enable Bit 325" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB324,Set/Clear Enable Bit 324" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB323,Set/Clear Enable Bit 323" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB322,Set/Clear Enable Bit 322" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB321,Set/Clear Enable Bit 321" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB320,Set/Clear Enable Bit 320" "Disabled,Enabled" else rgroup.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B) group.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB383,Set/Clear Enable Bit 383" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB382,Set/Clear Enable Bit 382" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB381,Set/Clear Enable Bit 381" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB380,Set/Clear Enable Bit 380" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB379,Set/Clear Enable Bit 379" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB378,Set/Clear Enable Bit 378" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB377,Set/Clear Enable Bit 377" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB376,Set/Clear Enable Bit 376" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB375,Set/Clear Enable Bit 375" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB374,Set/Clear Enable Bit 374" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB373,Set/Clear Enable Bit 373" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB372,Set/Clear Enable Bit 372" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB371,Set/Clear Enable Bit 371" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB370,Set/Clear Enable Bit 370" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB369,Set/Clear Enable Bit 369" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB368,Set/Clear Enable Bit 368" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB367,Set/Clear Enable Bit 367" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB366,Set/Clear Enable Bit 366" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB365,Set/Clear Enable Bit 365" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB364,Set/Clear Enable Bit 364" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB363,Set/Clear Enable Bit 363" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB362,Set/Clear Enable Bit 362" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB361,Set/Clear Enable Bit 361" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB360,Set/Clear Enable Bit 360" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB359,Set/Clear Enable Bit 359" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB358,Set/Clear Enable Bit 358" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB357,Set/Clear Enable Bit 357" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB356,Set/Clear Enable Bit 356" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB355,Set/Clear Enable Bit 355" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB354,Set/Clear Enable Bit 354" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB353,Set/Clear Enable Bit 353" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB352,Set/Clear Enable Bit 352" "Disabled,Enabled" else rgroup.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C) group.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB415,Set/Clear Enable Bit 415" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB414,Set/Clear Enable Bit 414" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB413,Set/Clear Enable Bit 413" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB412,Set/Clear Enable Bit 412" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB411,Set/Clear Enable Bit 411" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB410,Set/Clear Enable Bit 410" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB409,Set/Clear Enable Bit 409" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB408,Set/Clear Enable Bit 408" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB407,Set/Clear Enable Bit 407" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB406,Set/Clear Enable Bit 406" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB405,Set/Clear Enable Bit 405" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB404,Set/Clear Enable Bit 404" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB403,Set/Clear Enable Bit 403" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB402,Set/Clear Enable Bit 402" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB401,Set/Clear Enable Bit 401" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB400,Set/Clear Enable Bit 400" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB399,Set/Clear Enable Bit 399" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB398,Set/Clear Enable Bit 398" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB397,Set/Clear Enable Bit 397" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB396,Set/Clear Enable Bit 396" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB395,Set/Clear Enable Bit 395" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB394,Set/Clear Enable Bit 394" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB393,Set/Clear Enable Bit 393" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB392,Set/Clear Enable Bit 392" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB391,Set/Clear Enable Bit 391" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB390,Set/Clear Enable Bit 390" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB389,Set/Clear Enable Bit 389" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB388,Set/Clear Enable Bit 388" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB387,Set/Clear Enable Bit 387" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB386,Set/Clear Enable Bit 386" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB385,Set/Clear Enable Bit 385" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB384,Set/Clear Enable Bit 384" "Disabled,Enabled" else rgroup.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D) group.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB447,Set/Clear Enable Bit 447" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB446,Set/Clear Enable Bit 446" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB445,Set/Clear Enable Bit 445" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB444,Set/Clear Enable Bit 444" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB443,Set/Clear Enable Bit 443" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB442,Set/Clear Enable Bit 442" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB441,Set/Clear Enable Bit 441" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB440,Set/Clear Enable Bit 440" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB439,Set/Clear Enable Bit 439" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB438,Set/Clear Enable Bit 438" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB437,Set/Clear Enable Bit 437" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB436,Set/Clear Enable Bit 436" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB435,Set/Clear Enable Bit 435" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB434,Set/Clear Enable Bit 434" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB433,Set/Clear Enable Bit 433" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB432,Set/Clear Enable Bit 432" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB431,Set/Clear Enable Bit 431" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB430,Set/Clear Enable Bit 430" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB429,Set/Clear Enable Bit 429" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB428,Set/Clear Enable Bit 428" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB427,Set/Clear Enable Bit 427" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB426,Set/Clear Enable Bit 426" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB425,Set/Clear Enable Bit 425" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB424,Set/Clear Enable Bit 424" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB423,Set/Clear Enable Bit 423" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB422,Set/Clear Enable Bit 422" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB421,Set/Clear Enable Bit 421" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB420,Set/Clear Enable Bit 420" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB419,Set/Clear Enable Bit 419" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB418,Set/Clear Enable Bit 418" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB417,Set/Clear Enable Bit 417" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB416,Set/Clear Enable Bit 416" "Disabled,Enabled" else rgroup.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E) group.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB479,Set/Clear Enable Bit 479" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB478,Set/Clear Enable Bit 478" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB477,Set/Clear Enable Bit 477" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB476,Set/Clear Enable Bit 476" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB475,Set/Clear Enable Bit 475" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB474,Set/Clear Enable Bit 474" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB473,Set/Clear Enable Bit 473" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB472,Set/Clear Enable Bit 472" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB471,Set/Clear Enable Bit 471" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB470,Set/Clear Enable Bit 470" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB469,Set/Clear Enable Bit 469" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB468,Set/Clear Enable Bit 468" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB467,Set/Clear Enable Bit 467" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB466,Set/Clear Enable Bit 466" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB465,Set/Clear Enable Bit 465" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB464,Set/Clear Enable Bit 464" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB463,Set/Clear Enable Bit 463" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB462,Set/Clear Enable Bit 462" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB461,Set/Clear Enable Bit 461" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB460,Set/Clear Enable Bit 460" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB459,Set/Clear Enable Bit 459" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB458,Set/Clear Enable Bit 458" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB457,Set/Clear Enable Bit 457" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB456,Set/Clear Enable Bit 456" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB455,Set/Clear Enable Bit 455" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB454,Set/Clear Enable Bit 454" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB453,Set/Clear Enable Bit 453" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB452,Set/Clear Enable Bit 452" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB451,Set/Clear Enable Bit 451" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB450,Set/Clear Enable Bit 450" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB449,Set/Clear Enable Bit 449" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB448,Set/Clear Enable Bit 448" "Disabled,Enabled" else rgroup.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F) group.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB511,Set/Clear Enable Bit 511" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB510,Set/Clear Enable Bit 510" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB509,Set/Clear Enable Bit 509" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB508,Set/Clear Enable Bit 508" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB507,Set/Clear Enable Bit 507" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB506,Set/Clear Enable Bit 506" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB505,Set/Clear Enable Bit 505" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB504,Set/Clear Enable Bit 504" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB503,Set/Clear Enable Bit 503" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB502,Set/Clear Enable Bit 502" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB501,Set/Clear Enable Bit 501" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB500,Set/Clear Enable Bit 500" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB499,Set/Clear Enable Bit 499" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB498,Set/Clear Enable Bit 498" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB497,Set/Clear Enable Bit 497" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB496,Set/Clear Enable Bit 496" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB495,Set/Clear Enable Bit 495" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB494,Set/Clear Enable Bit 494" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB493,Set/Clear Enable Bit 493" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB492,Set/Clear Enable Bit 492" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB491,Set/Clear Enable Bit 491" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB490,Set/Clear Enable Bit 490" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB489,Set/Clear Enable Bit 489" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB488,Set/Clear Enable Bit 488" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB487,Set/Clear Enable Bit 487" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB486,Set/Clear Enable Bit 486" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB485,Set/Clear Enable Bit 485" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB484,Set/Clear Enable Bit 484" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB483,Set/Clear Enable Bit 483" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB482,Set/Clear Enable Bit 482" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB481,Set/Clear Enable Bit 481" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB480,Set/Clear Enable Bit 480" "Disabled,Enabled" else rgroup.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10) group.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB543,Set/Clear Enable Bit 543" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB542,Set/Clear Enable Bit 542" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB541,Set/Clear Enable Bit 541" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB540,Set/Clear Enable Bit 540" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB539,Set/Clear Enable Bit 539" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB538,Set/Clear Enable Bit 538" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB537,Set/Clear Enable Bit 537" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB536,Set/Clear Enable Bit 536" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB535,Set/Clear Enable Bit 535" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB534,Set/Clear Enable Bit 534" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB533,Set/Clear Enable Bit 533" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB532,Set/Clear Enable Bit 532" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB531,Set/Clear Enable Bit 531" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB530,Set/Clear Enable Bit 530" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB529,Set/Clear Enable Bit 529" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB528,Set/Clear Enable Bit 528" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB527,Set/Clear Enable Bit 527" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB526,Set/Clear Enable Bit 526" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB525,Set/Clear Enable Bit 525" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB524,Set/Clear Enable Bit 524" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB523,Set/Clear Enable Bit 523" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB522,Set/Clear Enable Bit 522" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB521,Set/Clear Enable Bit 521" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB520,Set/Clear Enable Bit 520" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB519,Set/Clear Enable Bit 519" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB518,Set/Clear Enable Bit 518" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB517,Set/Clear Enable Bit 517" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB516,Set/Clear Enable Bit 516" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB515,Set/Clear Enable Bit 515" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB514,Set/Clear Enable Bit 514" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB513,Set/Clear Enable Bit 513" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB512,Set/Clear Enable Bit 512" "Disabled,Enabled" else rgroup.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11) group.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB575,Set/Clear Enable Bit 575" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB574,Set/Clear Enable Bit 574" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB573,Set/Clear Enable Bit 573" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB572,Set/Clear Enable Bit 572" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB571,Set/Clear Enable Bit 571" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB570,Set/Clear Enable Bit 570" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB569,Set/Clear Enable Bit 569" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB568,Set/Clear Enable Bit 568" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB567,Set/Clear Enable Bit 567" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB566,Set/Clear Enable Bit 566" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB565,Set/Clear Enable Bit 565" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB564,Set/Clear Enable Bit 564" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB563,Set/Clear Enable Bit 563" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB562,Set/Clear Enable Bit 562" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB561,Set/Clear Enable Bit 561" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB560,Set/Clear Enable Bit 560" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB559,Set/Clear Enable Bit 559" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB558,Set/Clear Enable Bit 558" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB557,Set/Clear Enable Bit 557" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB556,Set/Clear Enable Bit 556" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB555,Set/Clear Enable Bit 555" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB554,Set/Clear Enable Bit 554" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB553,Set/Clear Enable Bit 553" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB552,Set/Clear Enable Bit 552" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB551,Set/Clear Enable Bit 551" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB550,Set/Clear Enable Bit 550" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB549,Set/Clear Enable Bit 549" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB548,Set/Clear Enable Bit 548" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB547,Set/Clear Enable Bit 547" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB546,Set/Clear Enable Bit 546" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB545,Set/Clear Enable Bit 545" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB544,Set/Clear Enable Bit 544" "Disabled,Enabled" else rgroup.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12) group.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB607,Set/Clear Enable Bit 607" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB606,Set/Clear Enable Bit 606" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB605,Set/Clear Enable Bit 605" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB604,Set/Clear Enable Bit 604" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB603,Set/Clear Enable Bit 603" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB602,Set/Clear Enable Bit 602" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB601,Set/Clear Enable Bit 601" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB600,Set/Clear Enable Bit 600" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB599,Set/Clear Enable Bit 599" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB598,Set/Clear Enable Bit 598" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB597,Set/Clear Enable Bit 597" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB596,Set/Clear Enable Bit 596" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB595,Set/Clear Enable Bit 595" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB594,Set/Clear Enable Bit 594" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB593,Set/Clear Enable Bit 593" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB592,Set/Clear Enable Bit 592" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB591,Set/Clear Enable Bit 591" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB590,Set/Clear Enable Bit 590" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB589,Set/Clear Enable Bit 589" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB588,Set/Clear Enable Bit 588" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB587,Set/Clear Enable Bit 587" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB586,Set/Clear Enable Bit 586" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB585,Set/Clear Enable Bit 585" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB584,Set/Clear Enable Bit 584" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB583,Set/Clear Enable Bit 583" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB582,Set/Clear Enable Bit 582" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB581,Set/Clear Enable Bit 581" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB580,Set/Clear Enable Bit 580" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB579,Set/Clear Enable Bit 579" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB578,Set/Clear Enable Bit 578" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB577,Set/Clear Enable Bit 577" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB576,Set/Clear Enable Bit 576" "Disabled,Enabled" else rgroup.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13) group.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB639,Set/Clear Enable Bit 639" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB638,Set/Clear Enable Bit 638" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB637,Set/Clear Enable Bit 637" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB636,Set/Clear Enable Bit 636" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB635,Set/Clear Enable Bit 635" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB634,Set/Clear Enable Bit 634" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB633,Set/Clear Enable Bit 633" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB632,Set/Clear Enable Bit 632" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB631,Set/Clear Enable Bit 631" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB630,Set/Clear Enable Bit 630" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB629,Set/Clear Enable Bit 629" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB628,Set/Clear Enable Bit 628" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB627,Set/Clear Enable Bit 627" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB626,Set/Clear Enable Bit 626" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB625,Set/Clear Enable Bit 625" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB624,Set/Clear Enable Bit 624" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB623,Set/Clear Enable Bit 623" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB622,Set/Clear Enable Bit 622" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB621,Set/Clear Enable Bit 621" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB620,Set/Clear Enable Bit 620" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB619,Set/Clear Enable Bit 619" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB618,Set/Clear Enable Bit 618" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB617,Set/Clear Enable Bit 617" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB616,Set/Clear Enable Bit 616" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB615,Set/Clear Enable Bit 615" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB614,Set/Clear Enable Bit 614" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB613,Set/Clear Enable Bit 613" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB612,Set/Clear Enable Bit 612" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB611,Set/Clear Enable Bit 611" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB610,Set/Clear Enable Bit 610" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB609,Set/Clear Enable Bit 609" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB608,Set/Clear Enable Bit 608" "Disabled,Enabled" else rgroup.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14) group.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB671,Set/Clear Enable Bit 671" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB670,Set/Clear Enable Bit 670" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB669,Set/Clear Enable Bit 669" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB668,Set/Clear Enable Bit 668" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB667,Set/Clear Enable Bit 667" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB666,Set/Clear Enable Bit 666" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB665,Set/Clear Enable Bit 665" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB664,Set/Clear Enable Bit 664" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB663,Set/Clear Enable Bit 663" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB662,Set/Clear Enable Bit 662" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB661,Set/Clear Enable Bit 661" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB660,Set/Clear Enable Bit 660" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB659,Set/Clear Enable Bit 659" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB658,Set/Clear Enable Bit 658" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB657,Set/Clear Enable Bit 657" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB656,Set/Clear Enable Bit 656" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB655,Set/Clear Enable Bit 655" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB654,Set/Clear Enable Bit 654" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB653,Set/Clear Enable Bit 653" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB652,Set/Clear Enable Bit 652" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB651,Set/Clear Enable Bit 651" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB650,Set/Clear Enable Bit 650" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB649,Set/Clear Enable Bit 649" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB648,Set/Clear Enable Bit 648" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB647,Set/Clear Enable Bit 647" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB646,Set/Clear Enable Bit 646" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB645,Set/Clear Enable Bit 645" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB644,Set/Clear Enable Bit 644" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB643,Set/Clear Enable Bit 643" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB642,Set/Clear Enable Bit 642" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB641,Set/Clear Enable Bit 641" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB640,Set/Clear Enable Bit 640" "Disabled,Enabled" else rgroup.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15) group.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB703,Set/Clear Enable Bit 703" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB702,Set/Clear Enable Bit 702" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB701,Set/Clear Enable Bit 701" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB700,Set/Clear Enable Bit 700" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB699,Set/Clear Enable Bit 699" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB698,Set/Clear Enable Bit 698" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB697,Set/Clear Enable Bit 697" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB696,Set/Clear Enable Bit 696" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB695,Set/Clear Enable Bit 695" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB694,Set/Clear Enable Bit 694" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB693,Set/Clear Enable Bit 693" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB692,Set/Clear Enable Bit 692" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB691,Set/Clear Enable Bit 691" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB690,Set/Clear Enable Bit 690" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB689,Set/Clear Enable Bit 689" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB688,Set/Clear Enable Bit 688" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB687,Set/Clear Enable Bit 687" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB686,Set/Clear Enable Bit 686" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB685,Set/Clear Enable Bit 685" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB684,Set/Clear Enable Bit 684" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB683,Set/Clear Enable Bit 683" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB682,Set/Clear Enable Bit 682" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB681,Set/Clear Enable Bit 681" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB680,Set/Clear Enable Bit 680" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB679,Set/Clear Enable Bit 679" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB678,Set/Clear Enable Bit 678" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB677,Set/Clear Enable Bit 677" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB676,Set/Clear Enable Bit 676" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB675,Set/Clear Enable Bit 675" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB674,Set/Clear Enable Bit 674" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB673,Set/Clear Enable Bit 673" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB672,Set/Clear Enable Bit 672" "Disabled,Enabled" else rgroup.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16) group.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB735,Set/Clear Enable Bit 735" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB734,Set/Clear Enable Bit 734" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB733,Set/Clear Enable Bit 733" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB732,Set/Clear Enable Bit 732" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB731,Set/Clear Enable Bit 731" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB730,Set/Clear Enable Bit 730" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB729,Set/Clear Enable Bit 729" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB728,Set/Clear Enable Bit 728" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB727,Set/Clear Enable Bit 727" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB726,Set/Clear Enable Bit 726" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB725,Set/Clear Enable Bit 725" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB724,Set/Clear Enable Bit 724" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB723,Set/Clear Enable Bit 723" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB722,Set/Clear Enable Bit 722" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB721,Set/Clear Enable Bit 721" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB720,Set/Clear Enable Bit 720" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB719,Set/Clear Enable Bit 719" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB718,Set/Clear Enable Bit 718" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB717,Set/Clear Enable Bit 717" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB716,Set/Clear Enable Bit 716" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB715,Set/Clear Enable Bit 715" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB714,Set/Clear Enable Bit 714" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB713,Set/Clear Enable Bit 713" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB712,Set/Clear Enable Bit 712" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB711,Set/Clear Enable Bit 711" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB710,Set/Clear Enable Bit 710" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB709,Set/Clear Enable Bit 709" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB708,Set/Clear Enable Bit 708" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB707,Set/Clear Enable Bit 707" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB706,Set/Clear Enable Bit 706" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB705,Set/Clear Enable Bit 705" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB704,Set/Clear Enable Bit 704" "Disabled,Enabled" else rgroup.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17) group.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB767,Set/Clear Enable Bit 767" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB766,Set/Clear Enable Bit 766" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB765,Set/Clear Enable Bit 765" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB764,Set/Clear Enable Bit 764" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB763,Set/Clear Enable Bit 763" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB762,Set/Clear Enable Bit 762" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB761,Set/Clear Enable Bit 761" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB760,Set/Clear Enable Bit 760" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB759,Set/Clear Enable Bit 759" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB758,Set/Clear Enable Bit 758" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB757,Set/Clear Enable Bit 757" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB756,Set/Clear Enable Bit 756" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB755,Set/Clear Enable Bit 755" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB754,Set/Clear Enable Bit 754" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB753,Set/Clear Enable Bit 753" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB752,Set/Clear Enable Bit 752" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB751,Set/Clear Enable Bit 751" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB750,Set/Clear Enable Bit 750" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB749,Set/Clear Enable Bit 749" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB748,Set/Clear Enable Bit 748" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB747,Set/Clear Enable Bit 747" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB746,Set/Clear Enable Bit 746" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB745,Set/Clear Enable Bit 745" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB744,Set/Clear Enable Bit 744" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB743,Set/Clear Enable Bit 743" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB742,Set/Clear Enable Bit 742" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB741,Set/Clear Enable Bit 741" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB740,Set/Clear Enable Bit 740" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB739,Set/Clear Enable Bit 739" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB738,Set/Clear Enable Bit 738" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB737,Set/Clear Enable Bit 737" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB736,Set/Clear Enable Bit 736" "Disabled,Enabled" else rgroup.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18) group.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB799,Set/Clear Enable Bit 799" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB798,Set/Clear Enable Bit 798" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB797,Set/Clear Enable Bit 797" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB796,Set/Clear Enable Bit 796" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB795,Set/Clear Enable Bit 795" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB794,Set/Clear Enable Bit 794" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB793,Set/Clear Enable Bit 793" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB792,Set/Clear Enable Bit 792" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB791,Set/Clear Enable Bit 791" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB790,Set/Clear Enable Bit 790" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB789,Set/Clear Enable Bit 789" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB788,Set/Clear Enable Bit 788" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB787,Set/Clear Enable Bit 787" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB786,Set/Clear Enable Bit 786" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB785,Set/Clear Enable Bit 785" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB784,Set/Clear Enable Bit 784" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB783,Set/Clear Enable Bit 783" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB782,Set/Clear Enable Bit 782" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB781,Set/Clear Enable Bit 781" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB780,Set/Clear Enable Bit 780" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB779,Set/Clear Enable Bit 779" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB778,Set/Clear Enable Bit 778" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB777,Set/Clear Enable Bit 777" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB776,Set/Clear Enable Bit 776" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB775,Set/Clear Enable Bit 775" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB774,Set/Clear Enable Bit 774" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB773,Set/Clear Enable Bit 773" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB772,Set/Clear Enable Bit 772" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB771,Set/Clear Enable Bit 771" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB770,Set/Clear Enable Bit 770" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB769,Set/Clear Enable Bit 769" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB768,Set/Clear Enable Bit 768" "Disabled,Enabled" else rgroup.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19) group.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB831,Set/Clear Enable Bit 831" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB830,Set/Clear Enable Bit 830" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB829,Set/Clear Enable Bit 829" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB828,Set/Clear Enable Bit 828" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB827,Set/Clear Enable Bit 827" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB826,Set/Clear Enable Bit 826" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB825,Set/Clear Enable Bit 825" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB824,Set/Clear Enable Bit 824" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB823,Set/Clear Enable Bit 823" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB822,Set/Clear Enable Bit 822" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB821,Set/Clear Enable Bit 821" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB820,Set/Clear Enable Bit 820" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB819,Set/Clear Enable Bit 819" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB818,Set/Clear Enable Bit 818" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB817,Set/Clear Enable Bit 817" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB816,Set/Clear Enable Bit 816" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB815,Set/Clear Enable Bit 815" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB814,Set/Clear Enable Bit 814" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB813,Set/Clear Enable Bit 813" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB812,Set/Clear Enable Bit 812" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB811,Set/Clear Enable Bit 811" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB810,Set/Clear Enable Bit 810" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB809,Set/Clear Enable Bit 809" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB808,Set/Clear Enable Bit 808" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB807,Set/Clear Enable Bit 807" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB806,Set/Clear Enable Bit 806" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB805,Set/Clear Enable Bit 805" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB804,Set/Clear Enable Bit 804" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB803,Set/Clear Enable Bit 803" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB802,Set/Clear Enable Bit 802" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB801,Set/Clear Enable Bit 801" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB800,Set/Clear Enable Bit 800" "Disabled,Enabled" else rgroup.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A) group.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB863,Set/Clear Enable Bit 863" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB862,Set/Clear Enable Bit 862" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB861,Set/Clear Enable Bit 861" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB860,Set/Clear Enable Bit 860" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB859,Set/Clear Enable Bit 859" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB858,Set/Clear Enable Bit 858" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB857,Set/Clear Enable Bit 857" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB856,Set/Clear Enable Bit 856" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB855,Set/Clear Enable Bit 855" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB854,Set/Clear Enable Bit 854" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB853,Set/Clear Enable Bit 853" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB852,Set/Clear Enable Bit 852" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB851,Set/Clear Enable Bit 851" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB850,Set/Clear Enable Bit 850" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB849,Set/Clear Enable Bit 849" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB848,Set/Clear Enable Bit 848" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB847,Set/Clear Enable Bit 847" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB846,Set/Clear Enable Bit 846" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB845,Set/Clear Enable Bit 845" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB844,Set/Clear Enable Bit 844" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB843,Set/Clear Enable Bit 843" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB842,Set/Clear Enable Bit 842" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB841,Set/Clear Enable Bit 841" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB840,Set/Clear Enable Bit 840" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB839,Set/Clear Enable Bit 839" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB838,Set/Clear Enable Bit 838" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB837,Set/Clear Enable Bit 837" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB836,Set/Clear Enable Bit 836" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB835,Set/Clear Enable Bit 835" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB834,Set/Clear Enable Bit 834" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB833,Set/Clear Enable Bit 833" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB832,Set/Clear Enable Bit 832" "Disabled,Enabled" else rgroup.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B) group.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB895,Set/Clear Enable Bit 895" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB894,Set/Clear Enable Bit 894" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB893,Set/Clear Enable Bit 893" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB892,Set/Clear Enable Bit 892" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB891,Set/Clear Enable Bit 891" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB890,Set/Clear Enable Bit 890" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB889,Set/Clear Enable Bit 889" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB888,Set/Clear Enable Bit 888" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB887,Set/Clear Enable Bit 887" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB886,Set/Clear Enable Bit 886" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB885,Set/Clear Enable Bit 885" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB884,Set/Clear Enable Bit 884" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB883,Set/Clear Enable Bit 883" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB882,Set/Clear Enable Bit 882" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB881,Set/Clear Enable Bit 881" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB880,Set/Clear Enable Bit 880" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB879,Set/Clear Enable Bit 879" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB878,Set/Clear Enable Bit 878" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB877,Set/Clear Enable Bit 877" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB876,Set/Clear Enable Bit 876" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB875,Set/Clear Enable Bit 875" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB874,Set/Clear Enable Bit 874" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB873,Set/Clear Enable Bit 873" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB872,Set/Clear Enable Bit 872" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB871,Set/Clear Enable Bit 871" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB870,Set/Clear Enable Bit 870" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB869,Set/Clear Enable Bit 869" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB868,Set/Clear Enable Bit 868" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB867,Set/Clear Enable Bit 867" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB866,Set/Clear Enable Bit 866" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB865,Set/Clear Enable Bit 865" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB864,Set/Clear Enable Bit 864" "Disabled,Enabled" else rgroup.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C) group.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB927,Set/Clear Enable Bit 927" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB926,Set/Clear Enable Bit 926" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB925,Set/Clear Enable Bit 925" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB924,Set/Clear Enable Bit 924" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB923,Set/Clear Enable Bit 923" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB922,Set/Clear Enable Bit 922" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB921,Set/Clear Enable Bit 921" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB920,Set/Clear Enable Bit 920" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB919,Set/Clear Enable Bit 919" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB918,Set/Clear Enable Bit 918" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB917,Set/Clear Enable Bit 917" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB916,Set/Clear Enable Bit 916" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB915,Set/Clear Enable Bit 915" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB914,Set/Clear Enable Bit 914" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB913,Set/Clear Enable Bit 913" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB912,Set/Clear Enable Bit 912" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB911,Set/Clear Enable Bit 911" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB910,Set/Clear Enable Bit 910" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB909,Set/Clear Enable Bit 909" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB908,Set/Clear Enable Bit 908" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB907,Set/Clear Enable Bit 907" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB906,Set/Clear Enable Bit 906" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB905,Set/Clear Enable Bit 905" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB904,Set/Clear Enable Bit 904" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB903,Set/Clear Enable Bit 903" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB902,Set/Clear Enable Bit 902" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB901,Set/Clear Enable Bit 901" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB900,Set/Clear Enable Bit 900" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB899,Set/Clear Enable Bit 899" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB898,Set/Clear Enable Bit 898" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB897,Set/Clear Enable Bit 897" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB896,Set/Clear Enable Bit 896" "Disabled,Enabled" else rgroup.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D) group.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB959,Set/Clear Enable Bit 959" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB958,Set/Clear Enable Bit 958" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB957,Set/Clear Enable Bit 957" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB956,Set/Clear Enable Bit 956" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB955,Set/Clear Enable Bit 955" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB954,Set/Clear Enable Bit 954" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB953,Set/Clear Enable Bit 953" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB952,Set/Clear Enable Bit 952" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB951,Set/Clear Enable Bit 951" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB950,Set/Clear Enable Bit 950" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB949,Set/Clear Enable Bit 949" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB948,Set/Clear Enable Bit 948" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB947,Set/Clear Enable Bit 947" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB946,Set/Clear Enable Bit 946" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB945,Set/Clear Enable Bit 945" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB944,Set/Clear Enable Bit 944" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB943,Set/Clear Enable Bit 943" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB942,Set/Clear Enable Bit 942" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB941,Set/Clear Enable Bit 941" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB940,Set/Clear Enable Bit 940" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB939,Set/Clear Enable Bit 939" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB938,Set/Clear Enable Bit 938" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB937,Set/Clear Enable Bit 937" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB936,Set/Clear Enable Bit 936" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB935,Set/Clear Enable Bit 935" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB934,Set/Clear Enable Bit 934" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB933,Set/Clear Enable Bit 933" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB932,Set/Clear Enable Bit 932" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB931,Set/Clear Enable Bit 931" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB930,Set/Clear Enable Bit 930" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB929,Set/Clear Enable Bit 929" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB928,Set/Clear Enable Bit 928" "Disabled,Enabled" else rgroup.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E) group.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRENB991,Set/Clear Enable Bit 991" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRENB990,Set/Clear Enable Bit 990" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRENB989,Set/Clear Enable Bit 989" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRENB988,Set/Clear Enable Bit 988" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRENB987,Set/Clear Enable Bit 987" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRENB986,Set/Clear Enable Bit 986" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRENB985,Set/Clear Enable Bit 985" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRENB984,Set/Clear Enable Bit 984" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRENB983,Set/Clear Enable Bit 983" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRENB982,Set/Clear Enable Bit 982" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRENB981,Set/Clear Enable Bit 981" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRENB980,Set/Clear Enable Bit 980" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRENB979,Set/Clear Enable Bit 979" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRENB978,Set/Clear Enable Bit 978" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRENB977,Set/Clear Enable Bit 977" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRENB976,Set/Clear Enable Bit 976" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRENB975,Set/Clear Enable Bit 975" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRENB974,Set/Clear Enable Bit 974" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRENB973,Set/Clear Enable Bit 973" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRENB972,Set/Clear Enable Bit 972" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRENB971,Set/Clear Enable Bit 971" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRENB970,Set/Clear Enable Bit 970" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRENB969,Set/Clear Enable Bit 969" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRENB968,Set/Clear Enable Bit 968" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRENB967,Set/Clear Enable Bit 967" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRENB966,Set/Clear Enable Bit 966" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRENB965,Set/Clear Enable Bit 965" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRENB964,Set/Clear Enable Bit 964" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRENB963,Set/Clear Enable Bit 963" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRENB962,Set/Clear Enable Bit 962" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRENB961,Set/Clear Enable Bit 961" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRENB960,Set/Clear Enable Bit 960" "Disabled,Enabled" else rgroup.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" endif tree.end tree "Set/Clear Pending Registers" rgroup.long 0x0200++0x03 line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0" newline newline newline newline newline newline newline newline newline newline if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01) group.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND63,Set/Clear Pending Bit 63" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND62,Set/Clear Pending Bit 62" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND61,Set/Clear Pending Bit 61" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND60,Set/Clear Pending Bit 60" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND59,Set/Clear Pending Bit 59" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND58,Set/Clear Pending Bit 58" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND57,Set/Clear Pending Bit 57" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND56,Set/Clear Pending Bit 56" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND55,Set/Clear Pending Bit 55" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND54,Set/Clear Pending Bit 54" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND53,Set/Clear Pending Bit 53" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND52,Set/Clear Pending Bit 52" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND51,Set/Clear Pending Bit 51" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND50,Set/Clear Pending Bit 50" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND49,Set/Clear Pending Bit 49" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND48,Set/Clear Pending Bit 48" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND47,Set/Clear Pending Bit 47" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND46,Set/Clear Pending Bit 46" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND45,Set/Clear Pending Bit 45" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND44,Set/Clear Pending Bit 44" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND43,Set/Clear Pending Bit 43" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND42,Set/Clear Pending Bit 42" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND41,Set/Clear Pending Bit 41" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND40,Set/Clear Pending Bit 40" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND39,Set/Clear Pending Bit 39" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND38,Set/Clear Pending Bit 38" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND37,Set/Clear Pending Bit 37" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND36,Set/Clear Pending Bit 36" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND35,Set/Clear Pending Bit 35" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND34,Set/Clear Pending Bit 34" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND33,Set/Clear Pending Bit 33" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND32,Set/Clear Pending Bit 32" "Not pending,Pending" else rgroup.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02) group.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND95,Set/Clear Pending Bit 95" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND94,Set/Clear Pending Bit 94" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND93,Set/Clear Pending Bit 93" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND92,Set/Clear Pending Bit 92" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND91,Set/Clear Pending Bit 91" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND90,Set/Clear Pending Bit 90" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND89,Set/Clear Pending Bit 89" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND88,Set/Clear Pending Bit 88" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND87,Set/Clear Pending Bit 87" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND86,Set/Clear Pending Bit 86" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND85,Set/Clear Pending Bit 85" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND84,Set/Clear Pending Bit 84" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND83,Set/Clear Pending Bit 83" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND82,Set/Clear Pending Bit 82" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND81,Set/Clear Pending Bit 81" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND80,Set/Clear Pending Bit 80" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND79,Set/Clear Pending Bit 79" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND78,Set/Clear Pending Bit 78" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND77,Set/Clear Pending Bit 77" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND76,Set/Clear Pending Bit 76" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND75,Set/Clear Pending Bit 75" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND74,Set/Clear Pending Bit 74" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND73,Set/Clear Pending Bit 73" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND72,Set/Clear Pending Bit 72" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND71,Set/Clear Pending Bit 71" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND70,Set/Clear Pending Bit 70" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND69,Set/Clear Pending Bit 69" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND68,Set/Clear Pending Bit 68" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND67,Set/Clear Pending Bit 67" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND66,Set/Clear Pending Bit 66" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND65,Set/Clear Pending Bit 65" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND64,Set/Clear Pending Bit 64" "Not pending,Pending" else rgroup.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03) group.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND127,Set/Clear Pending Bit 127" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND126,Set/Clear Pending Bit 126" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND125,Set/Clear Pending Bit 125" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND124,Set/Clear Pending Bit 124" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND123,Set/Clear Pending Bit 123" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND122,Set/Clear Pending Bit 122" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND121,Set/Clear Pending Bit 121" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND120,Set/Clear Pending Bit 120" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND119,Set/Clear Pending Bit 119" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND118,Set/Clear Pending Bit 118" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND117,Set/Clear Pending Bit 117" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND116,Set/Clear Pending Bit 116" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND115,Set/Clear Pending Bit 115" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND114,Set/Clear Pending Bit 114" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND113,Set/Clear Pending Bit 113" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND112,Set/Clear Pending Bit 112" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND111,Set/Clear Pending Bit 111" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND110,Set/Clear Pending Bit 110" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND109,Set/Clear Pending Bit 109" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND108,Set/Clear Pending Bit 108" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND107,Set/Clear Pending Bit 107" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND106,Set/Clear Pending Bit 106" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND105,Set/Clear Pending Bit 105" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND104,Set/Clear Pending Bit 104" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND103,Set/Clear Pending Bit 103" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND102,Set/Clear Pending Bit 102" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND101,Set/Clear Pending Bit 101" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND100,Set/Clear Pending Bit 100" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND99,Set/Clear Pending Bit 99" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND98,Set/Clear Pending Bit 98" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND97,Set/Clear Pending Bit 97" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND96,Set/Clear Pending Bit 96" "Not pending,Pending" else rgroup.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04) group.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND159,Set/Clear Pending Bit 159" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND158,Set/Clear Pending Bit 158" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND157,Set/Clear Pending Bit 157" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND156,Set/Clear Pending Bit 156" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND155,Set/Clear Pending Bit 155" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND154,Set/Clear Pending Bit 154" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND153,Set/Clear Pending Bit 153" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND152,Set/Clear Pending Bit 152" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND151,Set/Clear Pending Bit 151" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND150,Set/Clear Pending Bit 150" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND149,Set/Clear Pending Bit 149" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND148,Set/Clear Pending Bit 148" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND147,Set/Clear Pending Bit 147" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND146,Set/Clear Pending Bit 146" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND145,Set/Clear Pending Bit 145" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND144,Set/Clear Pending Bit 144" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND143,Set/Clear Pending Bit 143" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND142,Set/Clear Pending Bit 142" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND141,Set/Clear Pending Bit 141" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND140,Set/Clear Pending Bit 140" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND139,Set/Clear Pending Bit 139" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND138,Set/Clear Pending Bit 138" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND137,Set/Clear Pending Bit 137" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND136,Set/Clear Pending Bit 136" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND135,Set/Clear Pending Bit 135" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND134,Set/Clear Pending Bit 134" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND133,Set/Clear Pending Bit 133" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND132,Set/Clear Pending Bit 132" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND131,Set/Clear Pending Bit 131" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND130,Set/Clear Pending Bit 130" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND129,Set/Clear Pending Bit 129" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND128,Set/Clear Pending Bit 128" "Not pending,Pending" else rgroup.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05) group.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND191,Set/Clear Pending Bit 191" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND190,Set/Clear Pending Bit 190" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND189,Set/Clear Pending Bit 189" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND188,Set/Clear Pending Bit 188" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND187,Set/Clear Pending Bit 187" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND186,Set/Clear Pending Bit 186" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND185,Set/Clear Pending Bit 185" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND184,Set/Clear Pending Bit 184" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND183,Set/Clear Pending Bit 183" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND182,Set/Clear Pending Bit 182" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND181,Set/Clear Pending Bit 181" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND180,Set/Clear Pending Bit 180" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND179,Set/Clear Pending Bit 179" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND178,Set/Clear Pending Bit 178" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND177,Set/Clear Pending Bit 177" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND176,Set/Clear Pending Bit 176" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND175,Set/Clear Pending Bit 175" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND174,Set/Clear Pending Bit 174" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND173,Set/Clear Pending Bit 173" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND172,Set/Clear Pending Bit 172" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND171,Set/Clear Pending Bit 171" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND170,Set/Clear Pending Bit 170" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND169,Set/Clear Pending Bit 169" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND168,Set/Clear Pending Bit 168" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND167,Set/Clear Pending Bit 167" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND166,Set/Clear Pending Bit 166" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND165,Set/Clear Pending Bit 165" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND164,Set/Clear Pending Bit 164" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND163,Set/Clear Pending Bit 163" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND162,Set/Clear Pending Bit 162" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND161,Set/Clear Pending Bit 161" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND160,Set/Clear Pending Bit 160" "Not pending,Pending" else rgroup.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06) group.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND223,Set/Clear Pending Bit 223" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND222,Set/Clear Pending Bit 222" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND221,Set/Clear Pending Bit 221" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND220,Set/Clear Pending Bit 220" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND219,Set/Clear Pending Bit 219" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND218,Set/Clear Pending Bit 218" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND217,Set/Clear Pending Bit 217" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND216,Set/Clear Pending Bit 216" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND215,Set/Clear Pending Bit 215" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND214,Set/Clear Pending Bit 214" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND213,Set/Clear Pending Bit 213" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND212,Set/Clear Pending Bit 212" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND211,Set/Clear Pending Bit 211" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND210,Set/Clear Pending Bit 210" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND209,Set/Clear Pending Bit 209" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND208,Set/Clear Pending Bit 208" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND207,Set/Clear Pending Bit 207" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND206,Set/Clear Pending Bit 206" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND205,Set/Clear Pending Bit 205" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND204,Set/Clear Pending Bit 204" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND203,Set/Clear Pending Bit 203" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND202,Set/Clear Pending Bit 202" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND201,Set/Clear Pending Bit 201" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND200,Set/Clear Pending Bit 200" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND199,Set/Clear Pending Bit 199" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND198,Set/Clear Pending Bit 198" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND197,Set/Clear Pending Bit 197" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND196,Set/Clear Pending Bit 196" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND195,Set/Clear Pending Bit 195" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND194,Set/Clear Pending Bit 194" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND193,Set/Clear Pending Bit 193" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND192,Set/Clear Pending Bit 192" "Not pending,Pending" else rgroup.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07) group.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND255,Set/Clear Pending Bit 255" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND254,Set/Clear Pending Bit 254" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND253,Set/Clear Pending Bit 253" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND252,Set/Clear Pending Bit 252" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND251,Set/Clear Pending Bit 251" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND250,Set/Clear Pending Bit 250" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND249,Set/Clear Pending Bit 249" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND248,Set/Clear Pending Bit 248" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND247,Set/Clear Pending Bit 247" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND246,Set/Clear Pending Bit 246" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND245,Set/Clear Pending Bit 245" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND244,Set/Clear Pending Bit 244" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND243,Set/Clear Pending Bit 243" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND242,Set/Clear Pending Bit 242" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND241,Set/Clear Pending Bit 241" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND240,Set/Clear Pending Bit 240" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND239,Set/Clear Pending Bit 239" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND238,Set/Clear Pending Bit 238" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND237,Set/Clear Pending Bit 237" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND236,Set/Clear Pending Bit 236" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND235,Set/Clear Pending Bit 235" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND234,Set/Clear Pending Bit 234" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND233,Set/Clear Pending Bit 233" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND232,Set/Clear Pending Bit 232" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND231,Set/Clear Pending Bit 231" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND230,Set/Clear Pending Bit 230" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND229,Set/Clear Pending Bit 229" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND228,Set/Clear Pending Bit 228" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND227,Set/Clear Pending Bit 227" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND226,Set/Clear Pending Bit 226" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND225,Set/Clear Pending Bit 225" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND224,Set/Clear Pending Bit 224" "Not pending,Pending" else rgroup.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08) group.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND287,Set/Clear Pending Bit 287" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND286,Set/Clear Pending Bit 286" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND285,Set/Clear Pending Bit 285" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND284,Set/Clear Pending Bit 284" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND283,Set/Clear Pending Bit 283" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND282,Set/Clear Pending Bit 282" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND281,Set/Clear Pending Bit 281" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND280,Set/Clear Pending Bit 280" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND279,Set/Clear Pending Bit 279" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND278,Set/Clear Pending Bit 278" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND277,Set/Clear Pending Bit 277" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND276,Set/Clear Pending Bit 276" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND275,Set/Clear Pending Bit 275" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND274,Set/Clear Pending Bit 274" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND273,Set/Clear Pending Bit 273" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND272,Set/Clear Pending Bit 272" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND271,Set/Clear Pending Bit 271" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND270,Set/Clear Pending Bit 270" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND269,Set/Clear Pending Bit 269" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND268,Set/Clear Pending Bit 268" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND267,Set/Clear Pending Bit 267" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND266,Set/Clear Pending Bit 266" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND265,Set/Clear Pending Bit 265" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND264,Set/Clear Pending Bit 264" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND263,Set/Clear Pending Bit 263" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND262,Set/Clear Pending Bit 262" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND261,Set/Clear Pending Bit 261" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND260,Set/Clear Pending Bit 260" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND259,Set/Clear Pending Bit 259" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND258,Set/Clear Pending Bit 258" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND257,Set/Clear Pending Bit 257" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND256,Set/Clear Pending Bit 256" "Not pending,Pending" else rgroup.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09) group.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND319,Set/Clear Pending Bit 319" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND318,Set/Clear Pending Bit 318" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND317,Set/Clear Pending Bit 317" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND316,Set/Clear Pending Bit 316" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND315,Set/Clear Pending Bit 315" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND314,Set/Clear Pending Bit 314" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND313,Set/Clear Pending Bit 313" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND312,Set/Clear Pending Bit 312" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND311,Set/Clear Pending Bit 311" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND310,Set/Clear Pending Bit 310" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND309,Set/Clear Pending Bit 309" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND308,Set/Clear Pending Bit 308" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND307,Set/Clear Pending Bit 307" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND306,Set/Clear Pending Bit 306" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND305,Set/Clear Pending Bit 305" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND304,Set/Clear Pending Bit 304" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND303,Set/Clear Pending Bit 303" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND302,Set/Clear Pending Bit 302" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND301,Set/Clear Pending Bit 301" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND300,Set/Clear Pending Bit 300" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND299,Set/Clear Pending Bit 299" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND298,Set/Clear Pending Bit 298" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND297,Set/Clear Pending Bit 297" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND296,Set/Clear Pending Bit 296" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND295,Set/Clear Pending Bit 295" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND294,Set/Clear Pending Bit 294" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND293,Set/Clear Pending Bit 293" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND292,Set/Clear Pending Bit 292" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND291,Set/Clear Pending Bit 291" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND290,Set/Clear Pending Bit 290" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND289,Set/Clear Pending Bit 289" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND288,Set/Clear Pending Bit 288" "Not pending,Pending" else rgroup.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A) group.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND351,Set/Clear Pending Bit 351" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND350,Set/Clear Pending Bit 350" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND349,Set/Clear Pending Bit 349" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND348,Set/Clear Pending Bit 348" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND347,Set/Clear Pending Bit 347" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND346,Set/Clear Pending Bit 346" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND345,Set/Clear Pending Bit 345" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND344,Set/Clear Pending Bit 344" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND343,Set/Clear Pending Bit 343" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND342,Set/Clear Pending Bit 342" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND341,Set/Clear Pending Bit 341" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND340,Set/Clear Pending Bit 340" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND339,Set/Clear Pending Bit 339" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND338,Set/Clear Pending Bit 338" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND337,Set/Clear Pending Bit 337" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND336,Set/Clear Pending Bit 336" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND335,Set/Clear Pending Bit 335" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND334,Set/Clear Pending Bit 334" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND333,Set/Clear Pending Bit 333" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND332,Set/Clear Pending Bit 332" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND331,Set/Clear Pending Bit 331" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND330,Set/Clear Pending Bit 330" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND329,Set/Clear Pending Bit 329" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND328,Set/Clear Pending Bit 328" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND327,Set/Clear Pending Bit 327" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND326,Set/Clear Pending Bit 326" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND325,Set/Clear Pending Bit 325" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND324,Set/Clear Pending Bit 324" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND323,Set/Clear Pending Bit 323" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND322,Set/Clear Pending Bit 322" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND321,Set/Clear Pending Bit 321" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND320,Set/Clear Pending Bit 320" "Not pending,Pending" else rgroup.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B) group.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND383,Set/Clear Pending Bit 383" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND382,Set/Clear Pending Bit 382" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND381,Set/Clear Pending Bit 381" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND380,Set/Clear Pending Bit 380" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND379,Set/Clear Pending Bit 379" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND378,Set/Clear Pending Bit 378" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND377,Set/Clear Pending Bit 377" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND376,Set/Clear Pending Bit 376" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND375,Set/Clear Pending Bit 375" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND374,Set/Clear Pending Bit 374" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND373,Set/Clear Pending Bit 373" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND372,Set/Clear Pending Bit 372" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND371,Set/Clear Pending Bit 371" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND370,Set/Clear Pending Bit 370" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND369,Set/Clear Pending Bit 369" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND368,Set/Clear Pending Bit 368" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND367,Set/Clear Pending Bit 367" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND366,Set/Clear Pending Bit 366" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND365,Set/Clear Pending Bit 365" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND364,Set/Clear Pending Bit 364" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND363,Set/Clear Pending Bit 363" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND362,Set/Clear Pending Bit 362" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND361,Set/Clear Pending Bit 361" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND360,Set/Clear Pending Bit 360" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND359,Set/Clear Pending Bit 359" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND358,Set/Clear Pending Bit 358" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND357,Set/Clear Pending Bit 357" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND356,Set/Clear Pending Bit 356" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND355,Set/Clear Pending Bit 355" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND354,Set/Clear Pending Bit 354" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND353,Set/Clear Pending Bit 353" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND352,Set/Clear Pending Bit 352" "Not pending,Pending" else rgroup.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C) group.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND415,Set/Clear Pending Bit 415" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND414,Set/Clear Pending Bit 414" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND413,Set/Clear Pending Bit 413" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND412,Set/Clear Pending Bit 412" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND411,Set/Clear Pending Bit 411" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND410,Set/Clear Pending Bit 410" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND409,Set/Clear Pending Bit 409" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND408,Set/Clear Pending Bit 408" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND407,Set/Clear Pending Bit 407" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND406,Set/Clear Pending Bit 406" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND405,Set/Clear Pending Bit 405" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND404,Set/Clear Pending Bit 404" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND403,Set/Clear Pending Bit 403" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND402,Set/Clear Pending Bit 402" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND401,Set/Clear Pending Bit 401" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND400,Set/Clear Pending Bit 400" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND399,Set/Clear Pending Bit 399" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND398,Set/Clear Pending Bit 398" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND397,Set/Clear Pending Bit 397" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND396,Set/Clear Pending Bit 396" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND395,Set/Clear Pending Bit 395" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND394,Set/Clear Pending Bit 394" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND393,Set/Clear Pending Bit 393" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND392,Set/Clear Pending Bit 392" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND391,Set/Clear Pending Bit 391" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND390,Set/Clear Pending Bit 390" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND389,Set/Clear Pending Bit 389" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND388,Set/Clear Pending Bit 388" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND387,Set/Clear Pending Bit 387" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND386,Set/Clear Pending Bit 386" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND385,Set/Clear Pending Bit 385" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND384,Set/Clear Pending Bit 384" "Not pending,Pending" else rgroup.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D) group.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND447,Set/Clear Pending Bit 447" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND446,Set/Clear Pending Bit 446" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND445,Set/Clear Pending Bit 445" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND444,Set/Clear Pending Bit 444" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND443,Set/Clear Pending Bit 443" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND442,Set/Clear Pending Bit 442" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND441,Set/Clear Pending Bit 441" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND440,Set/Clear Pending Bit 440" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND439,Set/Clear Pending Bit 439" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND438,Set/Clear Pending Bit 438" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND437,Set/Clear Pending Bit 437" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND436,Set/Clear Pending Bit 436" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND435,Set/Clear Pending Bit 435" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND434,Set/Clear Pending Bit 434" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND433,Set/Clear Pending Bit 433" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND432,Set/Clear Pending Bit 432" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND431,Set/Clear Pending Bit 431" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND430,Set/Clear Pending Bit 430" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND429,Set/Clear Pending Bit 429" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND428,Set/Clear Pending Bit 428" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND427,Set/Clear Pending Bit 427" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND426,Set/Clear Pending Bit 426" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND425,Set/Clear Pending Bit 425" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND424,Set/Clear Pending Bit 424" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND423,Set/Clear Pending Bit 423" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND422,Set/Clear Pending Bit 422" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND421,Set/Clear Pending Bit 421" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND420,Set/Clear Pending Bit 420" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND419,Set/Clear Pending Bit 419" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND418,Set/Clear Pending Bit 418" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND417,Set/Clear Pending Bit 417" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND416,Set/Clear Pending Bit 416" "Not pending,Pending" else rgroup.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E) group.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND479,Set/Clear Pending Bit 479" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND478,Set/Clear Pending Bit 478" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND477,Set/Clear Pending Bit 477" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND476,Set/Clear Pending Bit 476" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND475,Set/Clear Pending Bit 475" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND474,Set/Clear Pending Bit 474" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND473,Set/Clear Pending Bit 473" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND472,Set/Clear Pending Bit 472" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND471,Set/Clear Pending Bit 471" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND470,Set/Clear Pending Bit 470" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND469,Set/Clear Pending Bit 469" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND468,Set/Clear Pending Bit 468" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND467,Set/Clear Pending Bit 467" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND466,Set/Clear Pending Bit 466" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND465,Set/Clear Pending Bit 465" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND464,Set/Clear Pending Bit 464" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND463,Set/Clear Pending Bit 463" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND462,Set/Clear Pending Bit 462" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND461,Set/Clear Pending Bit 461" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND460,Set/Clear Pending Bit 460" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND459,Set/Clear Pending Bit 459" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND458,Set/Clear Pending Bit 458" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND457,Set/Clear Pending Bit 457" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND456,Set/Clear Pending Bit 456" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND455,Set/Clear Pending Bit 455" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND454,Set/Clear Pending Bit 454" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND453,Set/Clear Pending Bit 453" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND452,Set/Clear Pending Bit 452" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND451,Set/Clear Pending Bit 451" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND450,Set/Clear Pending Bit 450" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND449,Set/Clear Pending Bit 449" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND448,Set/Clear Pending Bit 448" "Not pending,Pending" else rgroup.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F) group.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND511,Set/Clear Pending Bit 511" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND510,Set/Clear Pending Bit 510" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND509,Set/Clear Pending Bit 509" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND508,Set/Clear Pending Bit 508" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND507,Set/Clear Pending Bit 507" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND506,Set/Clear Pending Bit 506" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND505,Set/Clear Pending Bit 505" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND504,Set/Clear Pending Bit 504" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND503,Set/Clear Pending Bit 503" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND502,Set/Clear Pending Bit 502" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND501,Set/Clear Pending Bit 501" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND500,Set/Clear Pending Bit 500" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND499,Set/Clear Pending Bit 499" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND498,Set/Clear Pending Bit 498" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND497,Set/Clear Pending Bit 497" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND496,Set/Clear Pending Bit 496" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND495,Set/Clear Pending Bit 495" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND494,Set/Clear Pending Bit 494" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND493,Set/Clear Pending Bit 493" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND492,Set/Clear Pending Bit 492" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND491,Set/Clear Pending Bit 491" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND490,Set/Clear Pending Bit 490" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND489,Set/Clear Pending Bit 489" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND488,Set/Clear Pending Bit 488" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND487,Set/Clear Pending Bit 487" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND486,Set/Clear Pending Bit 486" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND485,Set/Clear Pending Bit 485" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND484,Set/Clear Pending Bit 484" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND483,Set/Clear Pending Bit 483" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND482,Set/Clear Pending Bit 482" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND481,Set/Clear Pending Bit 481" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND480,Set/Clear Pending Bit 480" "Not pending,Pending" else rgroup.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10) group.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND543,Set/Clear Pending Bit 543" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND542,Set/Clear Pending Bit 542" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND541,Set/Clear Pending Bit 541" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND540,Set/Clear Pending Bit 540" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND539,Set/Clear Pending Bit 539" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND538,Set/Clear Pending Bit 538" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND537,Set/Clear Pending Bit 537" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND536,Set/Clear Pending Bit 536" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND535,Set/Clear Pending Bit 535" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND534,Set/Clear Pending Bit 534" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND533,Set/Clear Pending Bit 533" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND532,Set/Clear Pending Bit 532" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND531,Set/Clear Pending Bit 531" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND530,Set/Clear Pending Bit 530" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND529,Set/Clear Pending Bit 529" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND528,Set/Clear Pending Bit 528" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND527,Set/Clear Pending Bit 527" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND526,Set/Clear Pending Bit 526" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND525,Set/Clear Pending Bit 525" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND524,Set/Clear Pending Bit 524" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND523,Set/Clear Pending Bit 523" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND522,Set/Clear Pending Bit 522" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND521,Set/Clear Pending Bit 521" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND520,Set/Clear Pending Bit 520" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND519,Set/Clear Pending Bit 519" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND518,Set/Clear Pending Bit 518" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND517,Set/Clear Pending Bit 517" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND516,Set/Clear Pending Bit 516" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND515,Set/Clear Pending Bit 515" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND514,Set/Clear Pending Bit 514" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND513,Set/Clear Pending Bit 513" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND512,Set/Clear Pending Bit 512" "Not pending,Pending" else rgroup.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11) group.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND575,Set/Clear Pending Bit 575" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND574,Set/Clear Pending Bit 574" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND573,Set/Clear Pending Bit 573" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND572,Set/Clear Pending Bit 572" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND571,Set/Clear Pending Bit 571" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND570,Set/Clear Pending Bit 570" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND569,Set/Clear Pending Bit 569" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND568,Set/Clear Pending Bit 568" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND567,Set/Clear Pending Bit 567" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND566,Set/Clear Pending Bit 566" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND565,Set/Clear Pending Bit 565" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND564,Set/Clear Pending Bit 564" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND563,Set/Clear Pending Bit 563" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND562,Set/Clear Pending Bit 562" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND561,Set/Clear Pending Bit 561" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND560,Set/Clear Pending Bit 560" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND559,Set/Clear Pending Bit 559" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND558,Set/Clear Pending Bit 558" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND557,Set/Clear Pending Bit 557" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND556,Set/Clear Pending Bit 556" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND555,Set/Clear Pending Bit 555" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND554,Set/Clear Pending Bit 554" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND553,Set/Clear Pending Bit 553" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND552,Set/Clear Pending Bit 552" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND551,Set/Clear Pending Bit 551" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND550,Set/Clear Pending Bit 550" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND549,Set/Clear Pending Bit 549" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND548,Set/Clear Pending Bit 548" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND547,Set/Clear Pending Bit 547" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND546,Set/Clear Pending Bit 546" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND545,Set/Clear Pending Bit 545" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND544,Set/Clear Pending Bit 544" "Not pending,Pending" else rgroup.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12) group.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND607,Set/Clear Pending Bit 607" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND606,Set/Clear Pending Bit 606" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND605,Set/Clear Pending Bit 605" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND604,Set/Clear Pending Bit 604" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND603,Set/Clear Pending Bit 603" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND602,Set/Clear Pending Bit 602" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND601,Set/Clear Pending Bit 601" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND600,Set/Clear Pending Bit 600" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND599,Set/Clear Pending Bit 599" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND598,Set/Clear Pending Bit 598" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND597,Set/Clear Pending Bit 597" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND596,Set/Clear Pending Bit 596" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND595,Set/Clear Pending Bit 595" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND594,Set/Clear Pending Bit 594" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND593,Set/Clear Pending Bit 593" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND592,Set/Clear Pending Bit 592" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND591,Set/Clear Pending Bit 591" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND590,Set/Clear Pending Bit 590" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND589,Set/Clear Pending Bit 589" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND588,Set/Clear Pending Bit 588" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND587,Set/Clear Pending Bit 587" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND586,Set/Clear Pending Bit 586" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND585,Set/Clear Pending Bit 585" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND584,Set/Clear Pending Bit 584" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND583,Set/Clear Pending Bit 583" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND582,Set/Clear Pending Bit 582" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND581,Set/Clear Pending Bit 581" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND580,Set/Clear Pending Bit 580" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND579,Set/Clear Pending Bit 579" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND578,Set/Clear Pending Bit 578" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND577,Set/Clear Pending Bit 577" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND576,Set/Clear Pending Bit 576" "Not pending,Pending" else rgroup.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13) group.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND639,Set/Clear Pending Bit 639" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND638,Set/Clear Pending Bit 638" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND637,Set/Clear Pending Bit 637" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND636,Set/Clear Pending Bit 636" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND635,Set/Clear Pending Bit 635" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND634,Set/Clear Pending Bit 634" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND633,Set/Clear Pending Bit 633" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND632,Set/Clear Pending Bit 632" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND631,Set/Clear Pending Bit 631" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND630,Set/Clear Pending Bit 630" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND629,Set/Clear Pending Bit 629" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND628,Set/Clear Pending Bit 628" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND627,Set/Clear Pending Bit 627" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND626,Set/Clear Pending Bit 626" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND625,Set/Clear Pending Bit 625" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND624,Set/Clear Pending Bit 624" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND623,Set/Clear Pending Bit 623" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND622,Set/Clear Pending Bit 622" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND621,Set/Clear Pending Bit 621" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND620,Set/Clear Pending Bit 620" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND619,Set/Clear Pending Bit 619" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND618,Set/Clear Pending Bit 618" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND617,Set/Clear Pending Bit 617" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND616,Set/Clear Pending Bit 616" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND615,Set/Clear Pending Bit 615" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND614,Set/Clear Pending Bit 614" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND613,Set/Clear Pending Bit 613" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND612,Set/Clear Pending Bit 612" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND611,Set/Clear Pending Bit 611" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND610,Set/Clear Pending Bit 610" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND609,Set/Clear Pending Bit 609" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND608,Set/Clear Pending Bit 608" "Not pending,Pending" else rgroup.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14) group.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND671,Set/Clear Pending Bit 671" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND670,Set/Clear Pending Bit 670" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND669,Set/Clear Pending Bit 669" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND668,Set/Clear Pending Bit 668" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND667,Set/Clear Pending Bit 667" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND666,Set/Clear Pending Bit 666" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND665,Set/Clear Pending Bit 665" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND664,Set/Clear Pending Bit 664" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND663,Set/Clear Pending Bit 663" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND662,Set/Clear Pending Bit 662" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND661,Set/Clear Pending Bit 661" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND660,Set/Clear Pending Bit 660" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND659,Set/Clear Pending Bit 659" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND658,Set/Clear Pending Bit 658" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND657,Set/Clear Pending Bit 657" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND656,Set/Clear Pending Bit 656" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND655,Set/Clear Pending Bit 655" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND654,Set/Clear Pending Bit 654" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND653,Set/Clear Pending Bit 653" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND652,Set/Clear Pending Bit 652" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND651,Set/Clear Pending Bit 651" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND650,Set/Clear Pending Bit 650" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND649,Set/Clear Pending Bit 649" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND648,Set/Clear Pending Bit 648" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND647,Set/Clear Pending Bit 647" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND646,Set/Clear Pending Bit 646" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND645,Set/Clear Pending Bit 645" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND644,Set/Clear Pending Bit 644" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND643,Set/Clear Pending Bit 643" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND642,Set/Clear Pending Bit 642" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND641,Set/Clear Pending Bit 641" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND640,Set/Clear Pending Bit 640" "Not pending,Pending" else rgroup.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15) group.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND703,Set/Clear Pending Bit 703" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND702,Set/Clear Pending Bit 702" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND701,Set/Clear Pending Bit 701" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND700,Set/Clear Pending Bit 700" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND699,Set/Clear Pending Bit 699" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND698,Set/Clear Pending Bit 698" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND697,Set/Clear Pending Bit 697" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND696,Set/Clear Pending Bit 696" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND695,Set/Clear Pending Bit 695" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND694,Set/Clear Pending Bit 694" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND693,Set/Clear Pending Bit 693" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND692,Set/Clear Pending Bit 692" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND691,Set/Clear Pending Bit 691" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND690,Set/Clear Pending Bit 690" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND689,Set/Clear Pending Bit 689" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND688,Set/Clear Pending Bit 688" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND687,Set/Clear Pending Bit 687" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND686,Set/Clear Pending Bit 686" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND685,Set/Clear Pending Bit 685" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND684,Set/Clear Pending Bit 684" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND683,Set/Clear Pending Bit 683" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND682,Set/Clear Pending Bit 682" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND681,Set/Clear Pending Bit 681" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND680,Set/Clear Pending Bit 680" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND679,Set/Clear Pending Bit 679" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND678,Set/Clear Pending Bit 678" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND677,Set/Clear Pending Bit 677" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND676,Set/Clear Pending Bit 676" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND675,Set/Clear Pending Bit 675" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND674,Set/Clear Pending Bit 674" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND673,Set/Clear Pending Bit 673" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND672,Set/Clear Pending Bit 672" "Not pending,Pending" else rgroup.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16) group.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND735,Set/Clear Pending Bit 735" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND734,Set/Clear Pending Bit 734" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND733,Set/Clear Pending Bit 733" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND732,Set/Clear Pending Bit 732" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND731,Set/Clear Pending Bit 731" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND730,Set/Clear Pending Bit 730" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND729,Set/Clear Pending Bit 729" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND728,Set/Clear Pending Bit 728" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND727,Set/Clear Pending Bit 727" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND726,Set/Clear Pending Bit 726" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND725,Set/Clear Pending Bit 725" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND724,Set/Clear Pending Bit 724" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND723,Set/Clear Pending Bit 723" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND722,Set/Clear Pending Bit 722" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND721,Set/Clear Pending Bit 721" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND720,Set/Clear Pending Bit 720" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND719,Set/Clear Pending Bit 719" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND718,Set/Clear Pending Bit 718" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND717,Set/Clear Pending Bit 717" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND716,Set/Clear Pending Bit 716" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND715,Set/Clear Pending Bit 715" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND714,Set/Clear Pending Bit 714" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND713,Set/Clear Pending Bit 713" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND712,Set/Clear Pending Bit 712" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND711,Set/Clear Pending Bit 711" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND710,Set/Clear Pending Bit 710" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND709,Set/Clear Pending Bit 709" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND708,Set/Clear Pending Bit 708" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND707,Set/Clear Pending Bit 707" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND706,Set/Clear Pending Bit 706" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND705,Set/Clear Pending Bit 705" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND704,Set/Clear Pending Bit 704" "Not pending,Pending" else rgroup.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17) group.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND767,Set/Clear Pending Bit 767" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND766,Set/Clear Pending Bit 766" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND765,Set/Clear Pending Bit 765" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND764,Set/Clear Pending Bit 764" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND763,Set/Clear Pending Bit 763" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND762,Set/Clear Pending Bit 762" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND761,Set/Clear Pending Bit 761" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND760,Set/Clear Pending Bit 760" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND759,Set/Clear Pending Bit 759" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND758,Set/Clear Pending Bit 758" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND757,Set/Clear Pending Bit 757" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND756,Set/Clear Pending Bit 756" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND755,Set/Clear Pending Bit 755" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND754,Set/Clear Pending Bit 754" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND753,Set/Clear Pending Bit 753" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND752,Set/Clear Pending Bit 752" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND751,Set/Clear Pending Bit 751" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND750,Set/Clear Pending Bit 750" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND749,Set/Clear Pending Bit 749" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND748,Set/Clear Pending Bit 748" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND747,Set/Clear Pending Bit 747" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND746,Set/Clear Pending Bit 746" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND745,Set/Clear Pending Bit 745" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND744,Set/Clear Pending Bit 744" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND743,Set/Clear Pending Bit 743" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND742,Set/Clear Pending Bit 742" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND741,Set/Clear Pending Bit 741" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND740,Set/Clear Pending Bit 740" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND739,Set/Clear Pending Bit 739" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND738,Set/Clear Pending Bit 738" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND737,Set/Clear Pending Bit 737" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND736,Set/Clear Pending Bit 736" "Not pending,Pending" else rgroup.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18) group.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND799,Set/Clear Pending Bit 799" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND798,Set/Clear Pending Bit 798" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND797,Set/Clear Pending Bit 797" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND796,Set/Clear Pending Bit 796" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND795,Set/Clear Pending Bit 795" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND794,Set/Clear Pending Bit 794" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND793,Set/Clear Pending Bit 793" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND792,Set/Clear Pending Bit 792" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND791,Set/Clear Pending Bit 791" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND790,Set/Clear Pending Bit 790" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND789,Set/Clear Pending Bit 789" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND788,Set/Clear Pending Bit 788" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND787,Set/Clear Pending Bit 787" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND786,Set/Clear Pending Bit 786" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND785,Set/Clear Pending Bit 785" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND784,Set/Clear Pending Bit 784" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND783,Set/Clear Pending Bit 783" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND782,Set/Clear Pending Bit 782" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND781,Set/Clear Pending Bit 781" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND780,Set/Clear Pending Bit 780" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND779,Set/Clear Pending Bit 779" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND778,Set/Clear Pending Bit 778" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND777,Set/Clear Pending Bit 777" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND776,Set/Clear Pending Bit 776" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND775,Set/Clear Pending Bit 775" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND774,Set/Clear Pending Bit 774" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND773,Set/Clear Pending Bit 773" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND772,Set/Clear Pending Bit 772" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND771,Set/Clear Pending Bit 771" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND770,Set/Clear Pending Bit 770" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND769,Set/Clear Pending Bit 769" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND768,Set/Clear Pending Bit 768" "Not pending,Pending" else rgroup.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19) group.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND831,Set/Clear Pending Bit 831" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND830,Set/Clear Pending Bit 830" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND829,Set/Clear Pending Bit 829" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND828,Set/Clear Pending Bit 828" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND827,Set/Clear Pending Bit 827" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND826,Set/Clear Pending Bit 826" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND825,Set/Clear Pending Bit 825" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND824,Set/Clear Pending Bit 824" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND823,Set/Clear Pending Bit 823" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND822,Set/Clear Pending Bit 822" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND821,Set/Clear Pending Bit 821" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND820,Set/Clear Pending Bit 820" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND819,Set/Clear Pending Bit 819" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND818,Set/Clear Pending Bit 818" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND817,Set/Clear Pending Bit 817" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND816,Set/Clear Pending Bit 816" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND815,Set/Clear Pending Bit 815" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND814,Set/Clear Pending Bit 814" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND813,Set/Clear Pending Bit 813" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND812,Set/Clear Pending Bit 812" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND811,Set/Clear Pending Bit 811" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND810,Set/Clear Pending Bit 810" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND809,Set/Clear Pending Bit 809" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND808,Set/Clear Pending Bit 808" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND807,Set/Clear Pending Bit 807" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND806,Set/Clear Pending Bit 806" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND805,Set/Clear Pending Bit 805" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND804,Set/Clear Pending Bit 804" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND803,Set/Clear Pending Bit 803" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND802,Set/Clear Pending Bit 802" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND801,Set/Clear Pending Bit 801" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND800,Set/Clear Pending Bit 800" "Not pending,Pending" else rgroup.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A) group.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND863,Set/Clear Pending Bit 863" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND862,Set/Clear Pending Bit 862" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND861,Set/Clear Pending Bit 861" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND860,Set/Clear Pending Bit 860" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND859,Set/Clear Pending Bit 859" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND858,Set/Clear Pending Bit 858" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND857,Set/Clear Pending Bit 857" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND856,Set/Clear Pending Bit 856" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND855,Set/Clear Pending Bit 855" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND854,Set/Clear Pending Bit 854" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND853,Set/Clear Pending Bit 853" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND852,Set/Clear Pending Bit 852" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND851,Set/Clear Pending Bit 851" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND850,Set/Clear Pending Bit 850" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND849,Set/Clear Pending Bit 849" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND848,Set/Clear Pending Bit 848" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND847,Set/Clear Pending Bit 847" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND846,Set/Clear Pending Bit 846" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND845,Set/Clear Pending Bit 845" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND844,Set/Clear Pending Bit 844" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND843,Set/Clear Pending Bit 843" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND842,Set/Clear Pending Bit 842" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND841,Set/Clear Pending Bit 841" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND840,Set/Clear Pending Bit 840" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND839,Set/Clear Pending Bit 839" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND838,Set/Clear Pending Bit 838" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND837,Set/Clear Pending Bit 837" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND836,Set/Clear Pending Bit 836" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND835,Set/Clear Pending Bit 835" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND834,Set/Clear Pending Bit 834" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND833,Set/Clear Pending Bit 833" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND832,Set/Clear Pending Bit 832" "Not pending,Pending" else rgroup.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B) group.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND895,Set/Clear Pending Bit 895" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND894,Set/Clear Pending Bit 894" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND893,Set/Clear Pending Bit 893" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND892,Set/Clear Pending Bit 892" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND891,Set/Clear Pending Bit 891" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND890,Set/Clear Pending Bit 890" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND889,Set/Clear Pending Bit 889" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND888,Set/Clear Pending Bit 888" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND887,Set/Clear Pending Bit 887" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND886,Set/Clear Pending Bit 886" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND885,Set/Clear Pending Bit 885" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND884,Set/Clear Pending Bit 884" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND883,Set/Clear Pending Bit 883" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND882,Set/Clear Pending Bit 882" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND881,Set/Clear Pending Bit 881" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND880,Set/Clear Pending Bit 880" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND879,Set/Clear Pending Bit 879" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND878,Set/Clear Pending Bit 878" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND877,Set/Clear Pending Bit 877" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND876,Set/Clear Pending Bit 876" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND875,Set/Clear Pending Bit 875" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND874,Set/Clear Pending Bit 874" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND873,Set/Clear Pending Bit 873" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND872,Set/Clear Pending Bit 872" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND871,Set/Clear Pending Bit 871" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND870,Set/Clear Pending Bit 870" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND869,Set/Clear Pending Bit 869" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND868,Set/Clear Pending Bit 868" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND867,Set/Clear Pending Bit 867" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND866,Set/Clear Pending Bit 866" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND865,Set/Clear Pending Bit 865" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND864,Set/Clear Pending Bit 864" "Not pending,Pending" else rgroup.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C) group.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND927,Set/Clear Pending Bit 927" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND926,Set/Clear Pending Bit 926" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND925,Set/Clear Pending Bit 925" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND924,Set/Clear Pending Bit 924" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND923,Set/Clear Pending Bit 923" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND922,Set/Clear Pending Bit 922" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND921,Set/Clear Pending Bit 921" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND920,Set/Clear Pending Bit 920" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND919,Set/Clear Pending Bit 919" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND918,Set/Clear Pending Bit 918" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND917,Set/Clear Pending Bit 917" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND916,Set/Clear Pending Bit 916" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND915,Set/Clear Pending Bit 915" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND914,Set/Clear Pending Bit 914" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND913,Set/Clear Pending Bit 913" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND912,Set/Clear Pending Bit 912" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND911,Set/Clear Pending Bit 911" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND910,Set/Clear Pending Bit 910" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND909,Set/Clear Pending Bit 909" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND908,Set/Clear Pending Bit 908" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND907,Set/Clear Pending Bit 907" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND906,Set/Clear Pending Bit 906" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND905,Set/Clear Pending Bit 905" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND904,Set/Clear Pending Bit 904" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND903,Set/Clear Pending Bit 903" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND902,Set/Clear Pending Bit 902" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND901,Set/Clear Pending Bit 901" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND900,Set/Clear Pending Bit 900" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND899,Set/Clear Pending Bit 899" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND898,Set/Clear Pending Bit 898" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND897,Set/Clear Pending Bit 897" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND896,Set/Clear Pending Bit 896" "Not pending,Pending" else rgroup.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D) group.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND959,Set/Clear Pending Bit 959" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND958,Set/Clear Pending Bit 958" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND957,Set/Clear Pending Bit 957" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND956,Set/Clear Pending Bit 956" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND955,Set/Clear Pending Bit 955" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND954,Set/Clear Pending Bit 954" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND953,Set/Clear Pending Bit 953" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND952,Set/Clear Pending Bit 952" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND951,Set/Clear Pending Bit 951" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND950,Set/Clear Pending Bit 950" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND949,Set/Clear Pending Bit 949" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND948,Set/Clear Pending Bit 948" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND947,Set/Clear Pending Bit 947" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND946,Set/Clear Pending Bit 946" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND945,Set/Clear Pending Bit 945" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND944,Set/Clear Pending Bit 944" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND943,Set/Clear Pending Bit 943" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND942,Set/Clear Pending Bit 942" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND941,Set/Clear Pending Bit 941" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND940,Set/Clear Pending Bit 940" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND939,Set/Clear Pending Bit 939" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND938,Set/Clear Pending Bit 938" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND937,Set/Clear Pending Bit 937" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND936,Set/Clear Pending Bit 936" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND935,Set/Clear Pending Bit 935" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND934,Set/Clear Pending Bit 934" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND933,Set/Clear Pending Bit 933" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND932,Set/Clear Pending Bit 932" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND931,Set/Clear Pending Bit 931" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND930,Set/Clear Pending Bit 930" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND929,Set/Clear Pending Bit 929" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND928,Set/Clear Pending Bit 928" "Not pending,Pending" else rgroup.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E) group.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRPEND991,Set/Clear Pending Bit 991" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRPEND990,Set/Clear Pending Bit 990" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRPEND989,Set/Clear Pending Bit 989" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRPEND988,Set/Clear Pending Bit 988" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRPEND987,Set/Clear Pending Bit 987" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRPEND986,Set/Clear Pending Bit 986" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRPEND985,Set/Clear Pending Bit 985" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRPEND984,Set/Clear Pending Bit 984" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRPEND983,Set/Clear Pending Bit 983" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRPEND982,Set/Clear Pending Bit 982" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRPEND981,Set/Clear Pending Bit 981" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRPEND980,Set/Clear Pending Bit 980" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRPEND979,Set/Clear Pending Bit 979" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRPEND978,Set/Clear Pending Bit 978" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRPEND977,Set/Clear Pending Bit 977" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRPEND976,Set/Clear Pending Bit 976" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRPEND975,Set/Clear Pending Bit 975" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRPEND974,Set/Clear Pending Bit 974" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRPEND973,Set/Clear Pending Bit 973" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRPEND972,Set/Clear Pending Bit 972" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRPEND971,Set/Clear Pending Bit 971" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRPEND970,Set/Clear Pending Bit 970" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRPEND969,Set/Clear Pending Bit 969" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRPEND968,Set/Clear Pending Bit 968" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRPEND967,Set/Clear Pending Bit 967" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRPEND966,Set/Clear Pending Bit 966" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRPEND965,Set/Clear Pending Bit 965" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRPEND964,Set/Clear Pending Bit 964" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRPEND963,Set/Clear Pending Bit 963" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRPEND962,Set/Clear Pending Bit 962" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRPEND961,Set/Clear Pending Bit 961" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRPEND960,Set/Clear Pending Bit 960" "Not pending,Pending" else rgroup.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" endif tree.end tree "Set/Clear Active Registers" rgroup.long 0x0300++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0" newline newline newline newline newline newline newline newline newline newline if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01) group.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE63,Set/Clear Active Bit 63" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE62,Set/Clear Active Bit 62" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE61,Set/Clear Active Bit 61" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE60,Set/Clear Active Bit 60" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE59,Set/Clear Active Bit 59" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE58,Set/Clear Active Bit 58" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE57,Set/Clear Active Bit 57" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE56,Set/Clear Active Bit 56" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE55,Set/Clear Active Bit 55" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE54,Set/Clear Active Bit 54" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE53,Set/Clear Active Bit 53" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE52,Set/Clear Active Bit 52" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE51,Set/Clear Active Bit 51" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE50,Set/Clear Active Bit 50" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE49,Set/Clear Active Bit 49" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE48,Set/Clear Active Bit 48" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE47,Set/Clear Active Bit 47" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE46,Set/Clear Active Bit 46" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE45,Set/Clear Active Bit 45" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE44,Set/Clear Active Bit 44" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE43,Set/Clear Active Bit 43" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE42,Set/Clear Active Bit 42" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE41,Set/Clear Active Bit 41" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE40,Set/Clear Active Bit 40" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE39,Set/Clear Active Bit 39" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE38,Set/Clear Active Bit 38" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE37,Set/Clear Active Bit 37" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE36,Set/Clear Active Bit 36" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE35,Set/Clear Active Bit 35" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE34,Set/Clear Active Bit 34" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE33,Set/Clear Active Bit 33" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE32,Set/Clear Active Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02) group.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE95,Set/Clear Active Bit 95" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE94,Set/Clear Active Bit 94" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE93,Set/Clear Active Bit 93" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE92,Set/Clear Active Bit 92" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE91,Set/Clear Active Bit 91" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE90,Set/Clear Active Bit 90" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE89,Set/Clear Active Bit 89" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE88,Set/Clear Active Bit 88" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE87,Set/Clear Active Bit 87" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE86,Set/Clear Active Bit 86" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE85,Set/Clear Active Bit 85" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE84,Set/Clear Active Bit 84" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE83,Set/Clear Active Bit 83" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE82,Set/Clear Active Bit 82" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE81,Set/Clear Active Bit 81" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE80,Set/Clear Active Bit 80" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE79,Set/Clear Active Bit 79" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE78,Set/Clear Active Bit 78" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE77,Set/Clear Active Bit 77" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE76,Set/Clear Active Bit 76" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE75,Set/Clear Active Bit 75" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE74,Set/Clear Active Bit 74" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE73,Set/Clear Active Bit 73" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE72,Set/Clear Active Bit 72" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE71,Set/Clear Active Bit 71" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE70,Set/Clear Active Bit 70" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE69,Set/Clear Active Bit 69" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE68,Set/Clear Active Bit 68" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE67,Set/Clear Active Bit 67" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE66,Set/Clear Active Bit 66" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE65,Set/Clear Active Bit 65" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE64,Set/Clear Active Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03) group.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE127,Set/Clear Active Bit 127" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE126,Set/Clear Active Bit 126" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE125,Set/Clear Active Bit 125" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE124,Set/Clear Active Bit 124" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE123,Set/Clear Active Bit 123" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE122,Set/Clear Active Bit 122" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE121,Set/Clear Active Bit 121" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE120,Set/Clear Active Bit 120" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE119,Set/Clear Active Bit 119" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE118,Set/Clear Active Bit 118" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE117,Set/Clear Active Bit 117" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE116,Set/Clear Active Bit 116" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE115,Set/Clear Active Bit 115" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE114,Set/Clear Active Bit 114" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE113,Set/Clear Active Bit 113" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE112,Set/Clear Active Bit 112" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE111,Set/Clear Active Bit 111" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE110,Set/Clear Active Bit 110" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE109,Set/Clear Active Bit 109" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE108,Set/Clear Active Bit 108" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE107,Set/Clear Active Bit 107" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE106,Set/Clear Active Bit 106" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE105,Set/Clear Active Bit 105" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE104,Set/Clear Active Bit 104" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE103,Set/Clear Active Bit 103" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE102,Set/Clear Active Bit 102" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE101,Set/Clear Active Bit 101" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE100,Set/Clear Active Bit 100" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE99,Set/Clear Active Bit 99" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE98,Set/Clear Active Bit 98" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE97,Set/Clear Active Bit 97" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE96,Set/Clear Active Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04) group.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE159,Set/Clear Active Bit 159" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE158,Set/Clear Active Bit 158" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE157,Set/Clear Active Bit 157" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE156,Set/Clear Active Bit 156" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE155,Set/Clear Active Bit 155" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE154,Set/Clear Active Bit 154" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE153,Set/Clear Active Bit 153" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE152,Set/Clear Active Bit 152" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE151,Set/Clear Active Bit 151" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE150,Set/Clear Active Bit 150" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE149,Set/Clear Active Bit 149" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE148,Set/Clear Active Bit 148" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE147,Set/Clear Active Bit 147" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE146,Set/Clear Active Bit 146" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE145,Set/Clear Active Bit 145" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE144,Set/Clear Active Bit 144" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE143,Set/Clear Active Bit 143" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE142,Set/Clear Active Bit 142" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE141,Set/Clear Active Bit 141" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE140,Set/Clear Active Bit 140" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE139,Set/Clear Active Bit 139" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE138,Set/Clear Active Bit 138" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE137,Set/Clear Active Bit 137" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE136,Set/Clear Active Bit 136" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE135,Set/Clear Active Bit 135" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE134,Set/Clear Active Bit 134" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE133,Set/Clear Active Bit 133" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE132,Set/Clear Active Bit 132" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE131,Set/Clear Active Bit 131" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE130,Set/Clear Active Bit 130" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE129,Set/Clear Active Bit 129" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE128,Set/Clear Active Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05) group.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE191,Set/Clear Active Bit 191" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE190,Set/Clear Active Bit 190" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE189,Set/Clear Active Bit 189" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE188,Set/Clear Active Bit 188" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE187,Set/Clear Active Bit 187" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE186,Set/Clear Active Bit 186" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE185,Set/Clear Active Bit 185" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE184,Set/Clear Active Bit 184" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE183,Set/Clear Active Bit 183" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE182,Set/Clear Active Bit 182" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE181,Set/Clear Active Bit 181" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE180,Set/Clear Active Bit 180" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE179,Set/Clear Active Bit 179" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE178,Set/Clear Active Bit 178" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE177,Set/Clear Active Bit 177" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE176,Set/Clear Active Bit 176" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE175,Set/Clear Active Bit 175" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE174,Set/Clear Active Bit 174" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE173,Set/Clear Active Bit 173" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE172,Set/Clear Active Bit 172" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE171,Set/Clear Active Bit 171" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE170,Set/Clear Active Bit 170" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE169,Set/Clear Active Bit 169" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE168,Set/Clear Active Bit 168" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE167,Set/Clear Active Bit 167" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE166,Set/Clear Active Bit 166" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE165,Set/Clear Active Bit 165" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE164,Set/Clear Active Bit 164" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE163,Set/Clear Active Bit 163" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE162,Set/Clear Active Bit 162" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE161,Set/Clear Active Bit 161" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE160,Set/Clear Active Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06) group.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE223,Set/Clear Active Bit 223" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE222,Set/Clear Active Bit 222" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE221,Set/Clear Active Bit 221" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE220,Set/Clear Active Bit 220" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE219,Set/Clear Active Bit 219" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE218,Set/Clear Active Bit 218" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE217,Set/Clear Active Bit 217" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE216,Set/Clear Active Bit 216" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE215,Set/Clear Active Bit 215" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE214,Set/Clear Active Bit 214" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE213,Set/Clear Active Bit 213" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE212,Set/Clear Active Bit 212" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE211,Set/Clear Active Bit 211" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE210,Set/Clear Active Bit 210" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE209,Set/Clear Active Bit 209" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE208,Set/Clear Active Bit 208" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE207,Set/Clear Active Bit 207" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE206,Set/Clear Active Bit 206" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE205,Set/Clear Active Bit 205" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE204,Set/Clear Active Bit 204" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE203,Set/Clear Active Bit 203" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE202,Set/Clear Active Bit 202" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE201,Set/Clear Active Bit 201" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE200,Set/Clear Active Bit 200" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE199,Set/Clear Active Bit 199" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE198,Set/Clear Active Bit 198" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE197,Set/Clear Active Bit 197" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE196,Set/Clear Active Bit 196" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE195,Set/Clear Active Bit 195" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE194,Set/Clear Active Bit 194" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE193,Set/Clear Active Bit 193" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE192,Set/Clear Active Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07) group.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE255,Set/Clear Active Bit 255" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE254,Set/Clear Active Bit 254" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE253,Set/Clear Active Bit 253" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE252,Set/Clear Active Bit 252" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE251,Set/Clear Active Bit 251" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE250,Set/Clear Active Bit 250" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE249,Set/Clear Active Bit 249" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE248,Set/Clear Active Bit 248" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE247,Set/Clear Active Bit 247" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE246,Set/Clear Active Bit 246" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE245,Set/Clear Active Bit 245" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE244,Set/Clear Active Bit 244" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE243,Set/Clear Active Bit 243" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE242,Set/Clear Active Bit 242" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE241,Set/Clear Active Bit 241" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE240,Set/Clear Active Bit 240" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE239,Set/Clear Active Bit 239" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE238,Set/Clear Active Bit 238" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE237,Set/Clear Active Bit 237" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE236,Set/Clear Active Bit 236" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE235,Set/Clear Active Bit 235" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE234,Set/Clear Active Bit 234" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE233,Set/Clear Active Bit 233" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE232,Set/Clear Active Bit 232" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE231,Set/Clear Active Bit 231" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE230,Set/Clear Active Bit 230" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE229,Set/Clear Active Bit 229" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE228,Set/Clear Active Bit 228" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE227,Set/Clear Active Bit 227" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE226,Set/Clear Active Bit 226" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE225,Set/Clear Active Bit 225" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE224,Set/Clear Active Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08) group.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE287,Set/Clear Active Bit 287" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE286,Set/Clear Active Bit 286" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE285,Set/Clear Active Bit 285" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE284,Set/Clear Active Bit 284" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE283,Set/Clear Active Bit 283" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE282,Set/Clear Active Bit 282" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE281,Set/Clear Active Bit 281" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE280,Set/Clear Active Bit 280" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE279,Set/Clear Active Bit 279" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE278,Set/Clear Active Bit 278" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE277,Set/Clear Active Bit 277" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE276,Set/Clear Active Bit 276" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE275,Set/Clear Active Bit 275" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE274,Set/Clear Active Bit 274" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE273,Set/Clear Active Bit 273" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE272,Set/Clear Active Bit 272" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE271,Set/Clear Active Bit 271" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE270,Set/Clear Active Bit 270" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE269,Set/Clear Active Bit 269" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE268,Set/Clear Active Bit 268" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE267,Set/Clear Active Bit 267" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE266,Set/Clear Active Bit 266" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE265,Set/Clear Active Bit 265" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE264,Set/Clear Active Bit 264" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE263,Set/Clear Active Bit 263" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE262,Set/Clear Active Bit 262" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE261,Set/Clear Active Bit 261" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE260,Set/Clear Active Bit 260" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE259,Set/Clear Active Bit 259" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE258,Set/Clear Active Bit 258" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE257,Set/Clear Active Bit 257" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE256,Set/Clear Active Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09) group.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE319,Set/Clear Active Bit 319" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE318,Set/Clear Active Bit 318" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE317,Set/Clear Active Bit 317" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE316,Set/Clear Active Bit 316" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE315,Set/Clear Active Bit 315" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE314,Set/Clear Active Bit 314" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE313,Set/Clear Active Bit 313" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE312,Set/Clear Active Bit 312" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE311,Set/Clear Active Bit 311" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE310,Set/Clear Active Bit 310" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE309,Set/Clear Active Bit 309" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE308,Set/Clear Active Bit 308" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE307,Set/Clear Active Bit 307" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE306,Set/Clear Active Bit 306" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE305,Set/Clear Active Bit 305" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE304,Set/Clear Active Bit 304" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE303,Set/Clear Active Bit 303" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE302,Set/Clear Active Bit 302" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE301,Set/Clear Active Bit 301" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE300,Set/Clear Active Bit 300" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE299,Set/Clear Active Bit 299" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE298,Set/Clear Active Bit 298" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE297,Set/Clear Active Bit 297" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE296,Set/Clear Active Bit 296" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE295,Set/Clear Active Bit 295" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE294,Set/Clear Active Bit 294" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE293,Set/Clear Active Bit 293" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE292,Set/Clear Active Bit 292" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE291,Set/Clear Active Bit 291" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE290,Set/Clear Active Bit 290" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE289,Set/Clear Active Bit 289" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE288,Set/Clear Active Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A) group.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE351,Set/Clear Active Bit 351" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE350,Set/Clear Active Bit 350" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE349,Set/Clear Active Bit 349" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE348,Set/Clear Active Bit 348" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE347,Set/Clear Active Bit 347" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE346,Set/Clear Active Bit 346" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE345,Set/Clear Active Bit 345" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE344,Set/Clear Active Bit 344" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE343,Set/Clear Active Bit 343" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE342,Set/Clear Active Bit 342" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE341,Set/Clear Active Bit 341" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE340,Set/Clear Active Bit 340" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE339,Set/Clear Active Bit 339" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE338,Set/Clear Active Bit 338" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE337,Set/Clear Active Bit 337" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE336,Set/Clear Active Bit 336" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE335,Set/Clear Active Bit 335" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE334,Set/Clear Active Bit 334" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE333,Set/Clear Active Bit 333" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE332,Set/Clear Active Bit 332" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE331,Set/Clear Active Bit 331" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE330,Set/Clear Active Bit 330" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE329,Set/Clear Active Bit 329" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE328,Set/Clear Active Bit 328" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE327,Set/Clear Active Bit 327" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE326,Set/Clear Active Bit 326" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE325,Set/Clear Active Bit 325" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE324,Set/Clear Active Bit 324" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE323,Set/Clear Active Bit 323" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE322,Set/Clear Active Bit 322" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE321,Set/Clear Active Bit 321" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE320,Set/Clear Active Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B) group.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE383,Set/Clear Active Bit 383" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE382,Set/Clear Active Bit 382" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE381,Set/Clear Active Bit 381" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE380,Set/Clear Active Bit 380" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE379,Set/Clear Active Bit 379" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE378,Set/Clear Active Bit 378" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE377,Set/Clear Active Bit 377" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE376,Set/Clear Active Bit 376" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE375,Set/Clear Active Bit 375" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE374,Set/Clear Active Bit 374" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE373,Set/Clear Active Bit 373" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE372,Set/Clear Active Bit 372" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE371,Set/Clear Active Bit 371" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE370,Set/Clear Active Bit 370" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE369,Set/Clear Active Bit 369" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE368,Set/Clear Active Bit 368" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE367,Set/Clear Active Bit 367" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE366,Set/Clear Active Bit 366" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE365,Set/Clear Active Bit 365" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE364,Set/Clear Active Bit 364" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE363,Set/Clear Active Bit 363" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE362,Set/Clear Active Bit 362" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE361,Set/Clear Active Bit 361" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE360,Set/Clear Active Bit 360" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE359,Set/Clear Active Bit 359" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE358,Set/Clear Active Bit 358" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE357,Set/Clear Active Bit 357" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE356,Set/Clear Active Bit 356" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE355,Set/Clear Active Bit 355" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE354,Set/Clear Active Bit 354" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE353,Set/Clear Active Bit 353" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE352,Set/Clear Active Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C) group.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE415,Set/Clear Active Bit 415" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE414,Set/Clear Active Bit 414" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE413,Set/Clear Active Bit 413" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE412,Set/Clear Active Bit 412" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE411,Set/Clear Active Bit 411" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE410,Set/Clear Active Bit 410" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE409,Set/Clear Active Bit 409" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE408,Set/Clear Active Bit 408" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE407,Set/Clear Active Bit 407" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE406,Set/Clear Active Bit 406" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE405,Set/Clear Active Bit 405" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE404,Set/Clear Active Bit 404" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE403,Set/Clear Active Bit 403" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE402,Set/Clear Active Bit 402" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE401,Set/Clear Active Bit 401" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE400,Set/Clear Active Bit 400" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE399,Set/Clear Active Bit 399" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE398,Set/Clear Active Bit 398" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE397,Set/Clear Active Bit 397" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE396,Set/Clear Active Bit 396" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE395,Set/Clear Active Bit 395" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE394,Set/Clear Active Bit 394" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE393,Set/Clear Active Bit 393" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE392,Set/Clear Active Bit 392" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE391,Set/Clear Active Bit 391" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE390,Set/Clear Active Bit 390" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE389,Set/Clear Active Bit 389" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE388,Set/Clear Active Bit 388" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE387,Set/Clear Active Bit 387" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE386,Set/Clear Active Bit 386" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE385,Set/Clear Active Bit 385" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE384,Set/Clear Active Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D) group.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE447,Set/Clear Active Bit 447" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE446,Set/Clear Active Bit 446" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE445,Set/Clear Active Bit 445" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE444,Set/Clear Active Bit 444" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE443,Set/Clear Active Bit 443" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE442,Set/Clear Active Bit 442" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE441,Set/Clear Active Bit 441" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE440,Set/Clear Active Bit 440" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE439,Set/Clear Active Bit 439" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE438,Set/Clear Active Bit 438" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE437,Set/Clear Active Bit 437" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE436,Set/Clear Active Bit 436" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE435,Set/Clear Active Bit 435" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE434,Set/Clear Active Bit 434" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE433,Set/Clear Active Bit 433" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE432,Set/Clear Active Bit 432" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE431,Set/Clear Active Bit 431" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE430,Set/Clear Active Bit 430" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE429,Set/Clear Active Bit 429" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE428,Set/Clear Active Bit 428" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE427,Set/Clear Active Bit 427" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE426,Set/Clear Active Bit 426" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE425,Set/Clear Active Bit 425" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE424,Set/Clear Active Bit 424" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE423,Set/Clear Active Bit 423" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE422,Set/Clear Active Bit 422" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE421,Set/Clear Active Bit 421" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE420,Set/Clear Active Bit 420" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE419,Set/Clear Active Bit 419" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE418,Set/Clear Active Bit 418" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE417,Set/Clear Active Bit 417" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE416,Set/Clear Active Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E) group.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE479,Set/Clear Active Bit 479" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE478,Set/Clear Active Bit 478" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE477,Set/Clear Active Bit 477" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE476,Set/Clear Active Bit 476" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE475,Set/Clear Active Bit 475" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE474,Set/Clear Active Bit 474" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE473,Set/Clear Active Bit 473" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE472,Set/Clear Active Bit 472" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE471,Set/Clear Active Bit 471" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE470,Set/Clear Active Bit 470" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE469,Set/Clear Active Bit 469" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE468,Set/Clear Active Bit 468" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE467,Set/Clear Active Bit 467" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE466,Set/Clear Active Bit 466" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE465,Set/Clear Active Bit 465" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE464,Set/Clear Active Bit 464" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE463,Set/Clear Active Bit 463" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE462,Set/Clear Active Bit 462" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE461,Set/Clear Active Bit 461" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE460,Set/Clear Active Bit 460" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE459,Set/Clear Active Bit 459" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE458,Set/Clear Active Bit 458" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE457,Set/Clear Active Bit 457" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE456,Set/Clear Active Bit 456" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE455,Set/Clear Active Bit 455" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE454,Set/Clear Active Bit 454" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE453,Set/Clear Active Bit 453" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE452,Set/Clear Active Bit 452" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE451,Set/Clear Active Bit 451" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE450,Set/Clear Active Bit 450" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE449,Set/Clear Active Bit 449" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE448,Set/Clear Active Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F) group.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE511,Set/Clear Active Bit 511" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE510,Set/Clear Active Bit 510" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE509,Set/Clear Active Bit 509" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE508,Set/Clear Active Bit 508" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE507,Set/Clear Active Bit 507" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE506,Set/Clear Active Bit 506" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE505,Set/Clear Active Bit 505" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE504,Set/Clear Active Bit 504" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE503,Set/Clear Active Bit 503" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE502,Set/Clear Active Bit 502" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE501,Set/Clear Active Bit 501" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE500,Set/Clear Active Bit 500" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE499,Set/Clear Active Bit 499" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE498,Set/Clear Active Bit 498" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE497,Set/Clear Active Bit 497" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE496,Set/Clear Active Bit 496" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE495,Set/Clear Active Bit 495" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE494,Set/Clear Active Bit 494" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE493,Set/Clear Active Bit 493" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE492,Set/Clear Active Bit 492" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE491,Set/Clear Active Bit 491" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE490,Set/Clear Active Bit 490" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE489,Set/Clear Active Bit 489" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE488,Set/Clear Active Bit 488" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE487,Set/Clear Active Bit 487" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE486,Set/Clear Active Bit 486" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE485,Set/Clear Active Bit 485" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE484,Set/Clear Active Bit 484" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE483,Set/Clear Active Bit 483" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE482,Set/Clear Active Bit 482" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE481,Set/Clear Active Bit 481" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE480,Set/Clear Active Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10) group.long 0x0340++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE543,Set/Clear Active Bit 543" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE542,Set/Clear Active Bit 542" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE541,Set/Clear Active Bit 541" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE540,Set/Clear Active Bit 540" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE539,Set/Clear Active Bit 539" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE538,Set/Clear Active Bit 538" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE537,Set/Clear Active Bit 537" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE536,Set/Clear Active Bit 536" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE535,Set/Clear Active Bit 535" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE534,Set/Clear Active Bit 534" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE533,Set/Clear Active Bit 533" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE532,Set/Clear Active Bit 532" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE531,Set/Clear Active Bit 531" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE530,Set/Clear Active Bit 530" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE529,Set/Clear Active Bit 529" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE528,Set/Clear Active Bit 528" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE527,Set/Clear Active Bit 527" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE526,Set/Clear Active Bit 526" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE525,Set/Clear Active Bit 525" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE524,Set/Clear Active Bit 524" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE523,Set/Clear Active Bit 523" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE522,Set/Clear Active Bit 522" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE521,Set/Clear Active Bit 521" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE520,Set/Clear Active Bit 520" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE519,Set/Clear Active Bit 519" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE518,Set/Clear Active Bit 518" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE517,Set/Clear Active Bit 517" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE516,Set/Clear Active Bit 516" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE515,Set/Clear Active Bit 515" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE514,Set/Clear Active Bit 514" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE513,Set/Clear Active Bit 513" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE512,Set/Clear Active Bit 512" "Not active,Active" else rgroup.long 0x0340++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11) group.long 0x0344++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE575,Set/Clear Active Bit 575" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE574,Set/Clear Active Bit 574" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE573,Set/Clear Active Bit 573" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE572,Set/Clear Active Bit 572" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE571,Set/Clear Active Bit 571" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE570,Set/Clear Active Bit 570" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE569,Set/Clear Active Bit 569" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE568,Set/Clear Active Bit 568" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE567,Set/Clear Active Bit 567" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE566,Set/Clear Active Bit 566" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE565,Set/Clear Active Bit 565" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE564,Set/Clear Active Bit 564" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE563,Set/Clear Active Bit 563" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE562,Set/Clear Active Bit 562" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE561,Set/Clear Active Bit 561" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE560,Set/Clear Active Bit 560" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE559,Set/Clear Active Bit 559" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE558,Set/Clear Active Bit 558" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE557,Set/Clear Active Bit 557" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE556,Set/Clear Active Bit 556" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE555,Set/Clear Active Bit 555" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE554,Set/Clear Active Bit 554" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE553,Set/Clear Active Bit 553" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE552,Set/Clear Active Bit 552" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE551,Set/Clear Active Bit 551" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE550,Set/Clear Active Bit 550" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE549,Set/Clear Active Bit 549" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE548,Set/Clear Active Bit 548" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE547,Set/Clear Active Bit 547" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE546,Set/Clear Active Bit 546" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE545,Set/Clear Active Bit 545" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE544,Set/Clear Active Bit 544" "Not active,Active" else rgroup.long 0x0344++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12) group.long 0x0348++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE607,Set/Clear Active Bit 607" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE606,Set/Clear Active Bit 606" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE605,Set/Clear Active Bit 605" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE604,Set/Clear Active Bit 604" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE603,Set/Clear Active Bit 603" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE602,Set/Clear Active Bit 602" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE601,Set/Clear Active Bit 601" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE600,Set/Clear Active Bit 600" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE599,Set/Clear Active Bit 599" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE598,Set/Clear Active Bit 598" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE597,Set/Clear Active Bit 597" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE596,Set/Clear Active Bit 596" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE595,Set/Clear Active Bit 595" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE594,Set/Clear Active Bit 594" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE593,Set/Clear Active Bit 593" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE592,Set/Clear Active Bit 592" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE591,Set/Clear Active Bit 591" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE590,Set/Clear Active Bit 590" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE589,Set/Clear Active Bit 589" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE588,Set/Clear Active Bit 588" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE587,Set/Clear Active Bit 587" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE586,Set/Clear Active Bit 586" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE585,Set/Clear Active Bit 585" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE584,Set/Clear Active Bit 584" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE583,Set/Clear Active Bit 583" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE582,Set/Clear Active Bit 582" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE581,Set/Clear Active Bit 581" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE580,Set/Clear Active Bit 580" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE579,Set/Clear Active Bit 579" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE578,Set/Clear Active Bit 578" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE577,Set/Clear Active Bit 577" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE576,Set/Clear Active Bit 576" "Not active,Active" else rgroup.long 0x0348++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13) group.long 0x034C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE639,Set/Clear Active Bit 639" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE638,Set/Clear Active Bit 638" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE637,Set/Clear Active Bit 637" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE636,Set/Clear Active Bit 636" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE635,Set/Clear Active Bit 635" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE634,Set/Clear Active Bit 634" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE633,Set/Clear Active Bit 633" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE632,Set/Clear Active Bit 632" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE631,Set/Clear Active Bit 631" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE630,Set/Clear Active Bit 630" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE629,Set/Clear Active Bit 629" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE628,Set/Clear Active Bit 628" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE627,Set/Clear Active Bit 627" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE626,Set/Clear Active Bit 626" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE625,Set/Clear Active Bit 625" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE624,Set/Clear Active Bit 624" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE623,Set/Clear Active Bit 623" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE622,Set/Clear Active Bit 622" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE621,Set/Clear Active Bit 621" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE620,Set/Clear Active Bit 620" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE619,Set/Clear Active Bit 619" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE618,Set/Clear Active Bit 618" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE617,Set/Clear Active Bit 617" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE616,Set/Clear Active Bit 616" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE615,Set/Clear Active Bit 615" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE614,Set/Clear Active Bit 614" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE613,Set/Clear Active Bit 613" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE612,Set/Clear Active Bit 612" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE611,Set/Clear Active Bit 611" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE610,Set/Clear Active Bit 610" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE609,Set/Clear Active Bit 609" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE608,Set/Clear Active Bit 608" "Not active,Active" else rgroup.long 0x034C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14) group.long 0x0350++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE671,Set/Clear Active Bit 671" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE670,Set/Clear Active Bit 670" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE669,Set/Clear Active Bit 669" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE668,Set/Clear Active Bit 668" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE667,Set/Clear Active Bit 667" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE666,Set/Clear Active Bit 666" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE665,Set/Clear Active Bit 665" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE664,Set/Clear Active Bit 664" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE663,Set/Clear Active Bit 663" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE662,Set/Clear Active Bit 662" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE661,Set/Clear Active Bit 661" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE660,Set/Clear Active Bit 660" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE659,Set/Clear Active Bit 659" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE658,Set/Clear Active Bit 658" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE657,Set/Clear Active Bit 657" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE656,Set/Clear Active Bit 656" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE655,Set/Clear Active Bit 655" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE654,Set/Clear Active Bit 654" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE653,Set/Clear Active Bit 653" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE652,Set/Clear Active Bit 652" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE651,Set/Clear Active Bit 651" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE650,Set/Clear Active Bit 650" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE649,Set/Clear Active Bit 649" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE648,Set/Clear Active Bit 648" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE647,Set/Clear Active Bit 647" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE646,Set/Clear Active Bit 646" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE645,Set/Clear Active Bit 645" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE644,Set/Clear Active Bit 644" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE643,Set/Clear Active Bit 643" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE642,Set/Clear Active Bit 642" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE641,Set/Clear Active Bit 641" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE640,Set/Clear Active Bit 640" "Not active,Active" else rgroup.long 0x0350++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15) group.long 0x0354++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE703,Set/Clear Active Bit 703" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE702,Set/Clear Active Bit 702" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE701,Set/Clear Active Bit 701" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE700,Set/Clear Active Bit 700" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE699,Set/Clear Active Bit 699" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE698,Set/Clear Active Bit 698" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE697,Set/Clear Active Bit 697" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE696,Set/Clear Active Bit 696" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE695,Set/Clear Active Bit 695" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE694,Set/Clear Active Bit 694" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE693,Set/Clear Active Bit 693" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE692,Set/Clear Active Bit 692" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE691,Set/Clear Active Bit 691" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE690,Set/Clear Active Bit 690" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE689,Set/Clear Active Bit 689" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE688,Set/Clear Active Bit 688" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE687,Set/Clear Active Bit 687" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE686,Set/Clear Active Bit 686" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE685,Set/Clear Active Bit 685" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE684,Set/Clear Active Bit 684" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE683,Set/Clear Active Bit 683" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE682,Set/Clear Active Bit 682" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE681,Set/Clear Active Bit 681" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE680,Set/Clear Active Bit 680" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE679,Set/Clear Active Bit 679" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE678,Set/Clear Active Bit 678" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE677,Set/Clear Active Bit 677" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE676,Set/Clear Active Bit 676" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE675,Set/Clear Active Bit 675" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE674,Set/Clear Active Bit 674" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE673,Set/Clear Active Bit 673" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE672,Set/Clear Active Bit 672" "Not active,Active" else rgroup.long 0x0354++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16) group.long 0x0358++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE735,Set/Clear Active Bit 735" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE734,Set/Clear Active Bit 734" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE733,Set/Clear Active Bit 733" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE732,Set/Clear Active Bit 732" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE731,Set/Clear Active Bit 731" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE730,Set/Clear Active Bit 730" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE729,Set/Clear Active Bit 729" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE728,Set/Clear Active Bit 728" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE727,Set/Clear Active Bit 727" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE726,Set/Clear Active Bit 726" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE725,Set/Clear Active Bit 725" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE724,Set/Clear Active Bit 724" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE723,Set/Clear Active Bit 723" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE722,Set/Clear Active Bit 722" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE721,Set/Clear Active Bit 721" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE720,Set/Clear Active Bit 720" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE719,Set/Clear Active Bit 719" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE718,Set/Clear Active Bit 718" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE717,Set/Clear Active Bit 717" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE716,Set/Clear Active Bit 716" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE715,Set/Clear Active Bit 715" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE714,Set/Clear Active Bit 714" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE713,Set/Clear Active Bit 713" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE712,Set/Clear Active Bit 712" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE711,Set/Clear Active Bit 711" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE710,Set/Clear Active Bit 710" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE709,Set/Clear Active Bit 709" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE708,Set/Clear Active Bit 708" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE707,Set/Clear Active Bit 707" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE706,Set/Clear Active Bit 706" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE705,Set/Clear Active Bit 705" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE704,Set/Clear Active Bit 704" "Not active,Active" else rgroup.long 0x0358++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17) group.long 0x035C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE767,Set/Clear Active Bit 767" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE766,Set/Clear Active Bit 766" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE765,Set/Clear Active Bit 765" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE764,Set/Clear Active Bit 764" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE763,Set/Clear Active Bit 763" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE762,Set/Clear Active Bit 762" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE761,Set/Clear Active Bit 761" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE760,Set/Clear Active Bit 760" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE759,Set/Clear Active Bit 759" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE758,Set/Clear Active Bit 758" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE757,Set/Clear Active Bit 757" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE756,Set/Clear Active Bit 756" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE755,Set/Clear Active Bit 755" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE754,Set/Clear Active Bit 754" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE753,Set/Clear Active Bit 753" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE752,Set/Clear Active Bit 752" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE751,Set/Clear Active Bit 751" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE750,Set/Clear Active Bit 750" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE749,Set/Clear Active Bit 749" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE748,Set/Clear Active Bit 748" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE747,Set/Clear Active Bit 747" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE746,Set/Clear Active Bit 746" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE745,Set/Clear Active Bit 745" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE744,Set/Clear Active Bit 744" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE743,Set/Clear Active Bit 743" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE742,Set/Clear Active Bit 742" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE741,Set/Clear Active Bit 741" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE740,Set/Clear Active Bit 740" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE739,Set/Clear Active Bit 739" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE738,Set/Clear Active Bit 738" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE737,Set/Clear Active Bit 737" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE736,Set/Clear Active Bit 736" "Not active,Active" else rgroup.long 0x035C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18) group.long 0x0360++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE799,Set/Clear Active Bit 799" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE798,Set/Clear Active Bit 798" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE797,Set/Clear Active Bit 797" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE796,Set/Clear Active Bit 796" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE795,Set/Clear Active Bit 795" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE794,Set/Clear Active Bit 794" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE793,Set/Clear Active Bit 793" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE792,Set/Clear Active Bit 792" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE791,Set/Clear Active Bit 791" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE790,Set/Clear Active Bit 790" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE789,Set/Clear Active Bit 789" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE788,Set/Clear Active Bit 788" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE787,Set/Clear Active Bit 787" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE786,Set/Clear Active Bit 786" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE785,Set/Clear Active Bit 785" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE784,Set/Clear Active Bit 784" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE783,Set/Clear Active Bit 783" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE782,Set/Clear Active Bit 782" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE781,Set/Clear Active Bit 781" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE780,Set/Clear Active Bit 780" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE779,Set/Clear Active Bit 779" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE778,Set/Clear Active Bit 778" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE777,Set/Clear Active Bit 777" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE776,Set/Clear Active Bit 776" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE775,Set/Clear Active Bit 775" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE774,Set/Clear Active Bit 774" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE773,Set/Clear Active Bit 773" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE772,Set/Clear Active Bit 772" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE771,Set/Clear Active Bit 771" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE770,Set/Clear Active Bit 770" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE769,Set/Clear Active Bit 769" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE768,Set/Clear Active Bit 768" "Not active,Active" else rgroup.long 0x0360++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19) group.long 0x0364++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE831,Set/Clear Active Bit 831" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE830,Set/Clear Active Bit 830" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE829,Set/Clear Active Bit 829" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE828,Set/Clear Active Bit 828" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE827,Set/Clear Active Bit 827" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE826,Set/Clear Active Bit 826" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE825,Set/Clear Active Bit 825" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE824,Set/Clear Active Bit 824" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE823,Set/Clear Active Bit 823" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE822,Set/Clear Active Bit 822" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE821,Set/Clear Active Bit 821" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE820,Set/Clear Active Bit 820" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE819,Set/Clear Active Bit 819" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE818,Set/Clear Active Bit 818" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE817,Set/Clear Active Bit 817" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE816,Set/Clear Active Bit 816" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE815,Set/Clear Active Bit 815" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE814,Set/Clear Active Bit 814" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE813,Set/Clear Active Bit 813" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE812,Set/Clear Active Bit 812" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE811,Set/Clear Active Bit 811" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE810,Set/Clear Active Bit 810" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE809,Set/Clear Active Bit 809" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE808,Set/Clear Active Bit 808" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE807,Set/Clear Active Bit 807" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE806,Set/Clear Active Bit 806" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE805,Set/Clear Active Bit 805" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE804,Set/Clear Active Bit 804" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE803,Set/Clear Active Bit 803" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE802,Set/Clear Active Bit 802" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE801,Set/Clear Active Bit 801" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE800,Set/Clear Active Bit 800" "Not active,Active" else rgroup.long 0x0364++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A) group.long 0x0368++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE863,Set/Clear Active Bit 863" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE862,Set/Clear Active Bit 862" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE861,Set/Clear Active Bit 861" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE860,Set/Clear Active Bit 860" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE859,Set/Clear Active Bit 859" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE858,Set/Clear Active Bit 858" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE857,Set/Clear Active Bit 857" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE856,Set/Clear Active Bit 856" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE855,Set/Clear Active Bit 855" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE854,Set/Clear Active Bit 854" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE853,Set/Clear Active Bit 853" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE852,Set/Clear Active Bit 852" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE851,Set/Clear Active Bit 851" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE850,Set/Clear Active Bit 850" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE849,Set/Clear Active Bit 849" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE848,Set/Clear Active Bit 848" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE847,Set/Clear Active Bit 847" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE846,Set/Clear Active Bit 846" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE845,Set/Clear Active Bit 845" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE844,Set/Clear Active Bit 844" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE843,Set/Clear Active Bit 843" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE842,Set/Clear Active Bit 842" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE841,Set/Clear Active Bit 841" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE840,Set/Clear Active Bit 840" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE839,Set/Clear Active Bit 839" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE838,Set/Clear Active Bit 838" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE837,Set/Clear Active Bit 837" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE836,Set/Clear Active Bit 836" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE835,Set/Clear Active Bit 835" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE834,Set/Clear Active Bit 834" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE833,Set/Clear Active Bit 833" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE832,Set/Clear Active Bit 832" "Not active,Active" else rgroup.long 0x0368++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B) group.long 0x036C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE895,Set/Clear Active Bit 895" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE894,Set/Clear Active Bit 894" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE893,Set/Clear Active Bit 893" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE892,Set/Clear Active Bit 892" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE891,Set/Clear Active Bit 891" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE890,Set/Clear Active Bit 890" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE889,Set/Clear Active Bit 889" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE888,Set/Clear Active Bit 888" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE887,Set/Clear Active Bit 887" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE886,Set/Clear Active Bit 886" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE885,Set/Clear Active Bit 885" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE884,Set/Clear Active Bit 884" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE883,Set/Clear Active Bit 883" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE882,Set/Clear Active Bit 882" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE881,Set/Clear Active Bit 881" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE880,Set/Clear Active Bit 880" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE879,Set/Clear Active Bit 879" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE878,Set/Clear Active Bit 878" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE877,Set/Clear Active Bit 877" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE876,Set/Clear Active Bit 876" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE875,Set/Clear Active Bit 875" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE874,Set/Clear Active Bit 874" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE873,Set/Clear Active Bit 873" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE872,Set/Clear Active Bit 872" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE871,Set/Clear Active Bit 871" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE870,Set/Clear Active Bit 870" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE869,Set/Clear Active Bit 869" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE868,Set/Clear Active Bit 868" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE867,Set/Clear Active Bit 867" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE866,Set/Clear Active Bit 866" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE865,Set/Clear Active Bit 865" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE864,Set/Clear Active Bit 864" "Not active,Active" else rgroup.long 0x036C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C) group.long 0x0370++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE927,Set/Clear Active Bit 927" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE926,Set/Clear Active Bit 926" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE925,Set/Clear Active Bit 925" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE924,Set/Clear Active Bit 924" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE923,Set/Clear Active Bit 923" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE922,Set/Clear Active Bit 922" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE921,Set/Clear Active Bit 921" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE920,Set/Clear Active Bit 920" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE919,Set/Clear Active Bit 919" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE918,Set/Clear Active Bit 918" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE917,Set/Clear Active Bit 917" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE916,Set/Clear Active Bit 916" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE915,Set/Clear Active Bit 915" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE914,Set/Clear Active Bit 914" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE913,Set/Clear Active Bit 913" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE912,Set/Clear Active Bit 912" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE911,Set/Clear Active Bit 911" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE910,Set/Clear Active Bit 910" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE909,Set/Clear Active Bit 909" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE908,Set/Clear Active Bit 908" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE907,Set/Clear Active Bit 907" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE906,Set/Clear Active Bit 906" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE905,Set/Clear Active Bit 905" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE904,Set/Clear Active Bit 904" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE903,Set/Clear Active Bit 903" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE902,Set/Clear Active Bit 902" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE901,Set/Clear Active Bit 901" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE900,Set/Clear Active Bit 900" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE899,Set/Clear Active Bit 899" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE898,Set/Clear Active Bit 898" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE897,Set/Clear Active Bit 897" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE896,Set/Clear Active Bit 896" "Not active,Active" else rgroup.long 0x0370++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D) group.long 0x0374++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE959,Set/Clear Active Bit 959" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE958,Set/Clear Active Bit 958" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE957,Set/Clear Active Bit 957" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE956,Set/Clear Active Bit 956" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE955,Set/Clear Active Bit 955" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE954,Set/Clear Active Bit 954" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE953,Set/Clear Active Bit 953" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE952,Set/Clear Active Bit 952" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE951,Set/Clear Active Bit 951" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE950,Set/Clear Active Bit 950" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE949,Set/Clear Active Bit 949" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE948,Set/Clear Active Bit 948" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE947,Set/Clear Active Bit 947" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE946,Set/Clear Active Bit 946" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE945,Set/Clear Active Bit 945" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE944,Set/Clear Active Bit 944" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE943,Set/Clear Active Bit 943" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE942,Set/Clear Active Bit 942" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE941,Set/Clear Active Bit 941" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE940,Set/Clear Active Bit 940" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE939,Set/Clear Active Bit 939" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE938,Set/Clear Active Bit 938" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE937,Set/Clear Active Bit 937" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE936,Set/Clear Active Bit 936" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE935,Set/Clear Active Bit 935" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE934,Set/Clear Active Bit 934" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE933,Set/Clear Active Bit 933" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE932,Set/Clear Active Bit 932" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE931,Set/Clear Active Bit 931" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE930,Set/Clear Active Bit 930" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE929,Set/Clear Active Bit 929" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE928,Set/Clear Active Bit 928" "Not active,Active" else rgroup.long 0x0374++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E) group.long 0x0378++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "SET/CLRACTIVE991,Set/Clear Active Bit 991" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "SET/CLRACTIVE990,Set/Clear Active Bit 990" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "SET/CLRACTIVE989,Set/Clear Active Bit 989" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "SET/CLRACTIVE988,Set/Clear Active Bit 988" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "SET/CLRACTIVE987,Set/Clear Active Bit 987" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "SET/CLRACTIVE986,Set/Clear Active Bit 986" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "SET/CLRACTIVE985,Set/Clear Active Bit 985" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "SET/CLRACTIVE984,Set/Clear Active Bit 984" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "SET/CLRACTIVE983,Set/Clear Active Bit 983" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "SET/CLRACTIVE982,Set/Clear Active Bit 982" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "SET/CLRACTIVE981,Set/Clear Active Bit 981" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "SET/CLRACTIVE980,Set/Clear Active Bit 980" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "SET/CLRACTIVE979,Set/Clear Active Bit 979" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "SET/CLRACTIVE978,Set/Clear Active Bit 978" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "SET/CLRACTIVE977,Set/Clear Active Bit 977" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "SET/CLRACTIVE976,Set/Clear Active Bit 976" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SET/CLRACTIVE975,Set/Clear Active Bit 975" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SET/CLRACTIVE974,Set/Clear Active Bit 974" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SET/CLRACTIVE973,Set/Clear Active Bit 973" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SET/CLRACTIVE972,Set/Clear Active Bit 972" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SET/CLRACTIVE971,Set/Clear Active Bit 971" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SET/CLRACTIVE970,Set/Clear Active Bit 970" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SET/CLRACTIVE969,Set/Clear Active Bit 969" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SET/CLRACTIVE968,Set/Clear Active Bit 968" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SET/CLRACTIVE967,Set/Clear Active Bit 967" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SET/CLRACTIVE966,Set/Clear Active Bit 966" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SET/CLRACTIVE965,Set/Clear Active Bit 965" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SET/CLRACTIVE964,Set/Clear Active Bit 964" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SET/CLRACTIVE963,Set/Clear Active Bit 963" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SET/CLRACTIVE962,Set/Clear Active Bit 962" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SET/CLRACTIVE961,Set/Clear Active Bit 961" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SET/CLRACTIVE960,Set/Clear Active Bit 960" "Not active,Active" else rgroup.long 0x0378++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30" endif tree.end tree "Priority Registers" if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01) group.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 27.--31. 1. "INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 " hexmask.long.byte 0x00 19.--23. 1. "INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 " hexmask.long.byte 0x00 11.--15. 1. "INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 " hexmask.long.byte 0x00 3.--7. 1. "INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 " group.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 27.--31. 1. "INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 " hexmask.long.byte 0x00 19.--23. 1. "INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 " hexmask.long.byte 0x00 11.--15. 1. "INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 " hexmask.long.byte 0x00 3.--7. 1. "INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 " group.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 27.--31. 1. "INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 " hexmask.long.byte 0x00 19.--23. 1. "INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 " hexmask.long.byte 0x00 11.--15. 1. "INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 " hexmask.long.byte 0x00 3.--7. 1. "INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 " group.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 27.--31. 1. "INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 " hexmask.long.byte 0x00 19.--23. 1. "INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 " hexmask.long.byte 0x00 11.--15. 1. "INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 " hexmask.long.byte 0x00 3.--7. 1. "INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 " group.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 27.--31. 1. "INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 " hexmask.long.byte 0x00 19.--23. 1. "INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 " hexmask.long.byte 0x00 11.--15. 1. "INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 " hexmask.long.byte 0x00 3.--7. 1. "INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 " group.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 27.--31. 1. "INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 " hexmask.long.byte 0x00 19.--23. 1. "INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 " hexmask.long.byte 0x00 11.--15. 1. "INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 " hexmask.long.byte 0x00 3.--7. 1. "INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 " group.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 27.--31. 1. "INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 " hexmask.long.byte 0x00 19.--23. 1. "INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 " hexmask.long.byte 0x00 11.--15. 1. "INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 " hexmask.long.byte 0x00 3.--7. 1. "INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 " group.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 27.--31. 1. "INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 " hexmask.long.byte 0x00 19.--23. 1. "INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 " hexmask.long.byte 0x00 11.--15. 1. "INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 " hexmask.long.byte 0x00 3.--7. 1. "INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 " else rgroup.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" rgroup.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" rgroup.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" rgroup.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" rgroup.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" rgroup.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" rgroup.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" rgroup.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02) group.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 27.--31. 1. "INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 " hexmask.long.byte 0x00 19.--23. 1. "INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 " hexmask.long.byte 0x00 11.--15. 1. "INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 " hexmask.long.byte 0x00 3.--7. 1. "INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 " group.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 27.--31. 1. "INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 " hexmask.long.byte 0x00 19.--23. 1. "INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 " hexmask.long.byte 0x00 11.--15. 1. "INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 " hexmask.long.byte 0x00 3.--7. 1. "INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 " group.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 27.--31. 1. "INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 " hexmask.long.byte 0x00 19.--23. 1. "INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 " hexmask.long.byte 0x00 11.--15. 1. "INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 " hexmask.long.byte 0x00 3.--7. 1. "INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 " group.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 27.--31. 1. "INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 " hexmask.long.byte 0x00 19.--23. 1. "INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 " hexmask.long.byte 0x00 11.--15. 1. "INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 " hexmask.long.byte 0x00 3.--7. 1. "INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 " group.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 27.--31. 1. "INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 " hexmask.long.byte 0x00 19.--23. 1. "INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 " hexmask.long.byte 0x00 11.--15. 1. "INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 " hexmask.long.byte 0x00 3.--7. 1. "INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 " group.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 27.--31. 1. "INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 " hexmask.long.byte 0x00 19.--23. 1. "INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 " hexmask.long.byte 0x00 11.--15. 1. "INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 " hexmask.long.byte 0x00 3.--7. 1. "INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 " group.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 27.--31. 1. "INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 " hexmask.long.byte 0x00 19.--23. 1. "INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 " hexmask.long.byte 0x00 11.--15. 1. "INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 " hexmask.long.byte 0x00 3.--7. 1. "INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 " group.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 27.--31. 1. "INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 " hexmask.long.byte 0x00 19.--23. 1. "INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 " hexmask.long.byte 0x00 11.--15. 1. "INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 " hexmask.long.byte 0x00 3.--7. 1. "INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 " else rgroup.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" rgroup.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" rgroup.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" rgroup.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" rgroup.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" rgroup.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" rgroup.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" rgroup.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03) group.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 27.--31. 1. "INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 " hexmask.long.byte 0x00 19.--23. 1. "INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 " hexmask.long.byte 0x00 11.--15. 1. "INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 " hexmask.long.byte 0x00 3.--7. 1. "INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 " group.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 27.--31. 1. "INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 " hexmask.long.byte 0x00 19.--23. 1. "INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 " hexmask.long.byte 0x00 11.--15. 1. "INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 " hexmask.long.byte 0x00 3.--7. 1. "INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 " group.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 27.--31. 1. "INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 " hexmask.long.byte 0x00 19.--23. 1. "INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 " hexmask.long.byte 0x00 11.--15. 1. "INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 " hexmask.long.byte 0x00 3.--7. 1. "INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 " group.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 27.--31. 1. "INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 " hexmask.long.byte 0x00 19.--23. 1. "INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 " hexmask.long.byte 0x00 11.--15. 1. "INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 " hexmask.long.byte 0x00 3.--7. 1. "INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 " group.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 27.--31. 1. "INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 " hexmask.long.byte 0x00 19.--23. 1. "INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 " hexmask.long.byte 0x00 11.--15. 1. "INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 " hexmask.long.byte 0x00 3.--7. 1. "INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 " group.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 27.--31. 1. "INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 " hexmask.long.byte 0x00 19.--23. 1. "INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 " hexmask.long.byte 0x00 11.--15. 1. "INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 " hexmask.long.byte 0x00 3.--7. 1. "INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 " group.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 27.--31. 1. "INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 " hexmask.long.byte 0x00 19.--23. 1. "INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 " hexmask.long.byte 0x00 11.--15. 1. "INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 " hexmask.long.byte 0x00 3.--7. 1. "INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 " group.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 27.--31. 1. "INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 " hexmask.long.byte 0x00 19.--23. 1. "INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 " hexmask.long.byte 0x00 11.--15. 1. "INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 " hexmask.long.byte 0x00 3.--7. 1. "INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 " else rgroup.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" rgroup.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" rgroup.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" rgroup.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" rgroup.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" rgroup.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" rgroup.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" rgroup.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04) group.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 27.--31. 1. "INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 " hexmask.long.byte 0x00 19.--23. 1. "INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 " hexmask.long.byte 0x00 11.--15. 1. "INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 " hexmask.long.byte 0x00 3.--7. 1. "INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 " group.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 27.--31. 1. "INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 " hexmask.long.byte 0x00 19.--23. 1. "INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 " hexmask.long.byte 0x00 11.--15. 1. "INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 " hexmask.long.byte 0x00 3.--7. 1. "INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 " group.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 27.--31. 1. "INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 " hexmask.long.byte 0x00 19.--23. 1. "INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 " hexmask.long.byte 0x00 11.--15. 1. "INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 " hexmask.long.byte 0x00 3.--7. 1. "INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 " group.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 27.--31. 1. "INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 " hexmask.long.byte 0x00 19.--23. 1. "INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 " hexmask.long.byte 0x00 11.--15. 1. "INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 " hexmask.long.byte 0x00 3.--7. 1. "INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 " group.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 27.--31. 1. "INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 " hexmask.long.byte 0x00 19.--23. 1. "INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 " hexmask.long.byte 0x00 11.--15. 1. "INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 " hexmask.long.byte 0x00 3.--7. 1. "INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 " group.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 27.--31. 1. "INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 " hexmask.long.byte 0x00 19.--23. 1. "INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 " hexmask.long.byte 0x00 11.--15. 1. "INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 " hexmask.long.byte 0x00 3.--7. 1. "INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 " group.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 27.--31. 1. "INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 " hexmask.long.byte 0x00 19.--23. 1. "INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 " hexmask.long.byte 0x00 11.--15. 1. "INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 " hexmask.long.byte 0x00 3.--7. 1. "INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 " group.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 27.--31. 1. "INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 " hexmask.long.byte 0x00 19.--23. 1. "INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 " hexmask.long.byte 0x00 11.--15. 1. "INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 " hexmask.long.byte 0x00 3.--7. 1. "INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 " else rgroup.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" rgroup.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" rgroup.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" rgroup.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" rgroup.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" rgroup.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" rgroup.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" rgroup.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05) group.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 27.--31. 1. "INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 " hexmask.long.byte 0x00 19.--23. 1. "INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 " hexmask.long.byte 0x00 11.--15. 1. "INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 " hexmask.long.byte 0x00 3.--7. 1. "INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 " group.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 27.--31. 1. "INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 " hexmask.long.byte 0x00 19.--23. 1. "INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 " hexmask.long.byte 0x00 11.--15. 1. "INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 " hexmask.long.byte 0x00 3.--7. 1. "INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 " group.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 27.--31. 1. "INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 " hexmask.long.byte 0x00 19.--23. 1. "INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 " hexmask.long.byte 0x00 11.--15. 1. "INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 " hexmask.long.byte 0x00 3.--7. 1. "INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 " group.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 27.--31. 1. "INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 " hexmask.long.byte 0x00 19.--23. 1. "INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 " hexmask.long.byte 0x00 11.--15. 1. "INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 " hexmask.long.byte 0x00 3.--7. 1. "INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 " group.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 27.--31. 1. "INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 " hexmask.long.byte 0x00 19.--23. 1. "INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 " hexmask.long.byte 0x00 11.--15. 1. "INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 " hexmask.long.byte 0x00 3.--7. 1. "INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 " group.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 27.--31. 1. "INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 " hexmask.long.byte 0x00 19.--23. 1. "INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 " hexmask.long.byte 0x00 11.--15. 1. "INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 " hexmask.long.byte 0x00 3.--7. 1. "INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 " group.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 27.--31. 1. "INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 " hexmask.long.byte 0x00 19.--23. 1. "INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 " hexmask.long.byte 0x00 11.--15. 1. "INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 " hexmask.long.byte 0x00 3.--7. 1. "INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 " group.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 27.--31. 1. "INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 " hexmask.long.byte 0x00 19.--23. 1. "INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 " hexmask.long.byte 0x00 11.--15. 1. "INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 " hexmask.long.byte 0x00 3.--7. 1. "INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 " else rgroup.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" rgroup.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" rgroup.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" rgroup.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" rgroup.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" rgroup.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" rgroup.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" rgroup.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06) group.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 27.--31. 1. "INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 " hexmask.long.byte 0x00 19.--23. 1. "INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 " hexmask.long.byte 0x00 11.--15. 1. "INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 " hexmask.long.byte 0x00 3.--7. 1. "INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 " group.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 27.--31. 1. "INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 " hexmask.long.byte 0x00 19.--23. 1. "INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 " hexmask.long.byte 0x00 11.--15. 1. "INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 " hexmask.long.byte 0x00 3.--7. 1. "INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 " group.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 27.--31. 1. "INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 " hexmask.long.byte 0x00 19.--23. 1. "INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 " hexmask.long.byte 0x00 11.--15. 1. "INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 " hexmask.long.byte 0x00 3.--7. 1. "INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 " group.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 27.--31. 1. "INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 " hexmask.long.byte 0x00 19.--23. 1. "INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 " hexmask.long.byte 0x00 11.--15. 1. "INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 " hexmask.long.byte 0x00 3.--7. 1. "INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 " group.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 27.--31. 1. "INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 " hexmask.long.byte 0x00 19.--23. 1. "INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 " hexmask.long.byte 0x00 11.--15. 1. "INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 " hexmask.long.byte 0x00 3.--7. 1. "INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 " group.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 27.--31. 1. "INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 " hexmask.long.byte 0x00 19.--23. 1. "INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 " hexmask.long.byte 0x00 11.--15. 1. "INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 " hexmask.long.byte 0x00 3.--7. 1. "INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 " group.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 27.--31. 1. "INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 " hexmask.long.byte 0x00 19.--23. 1. "INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 " hexmask.long.byte 0x00 11.--15. 1. "INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 " hexmask.long.byte 0x00 3.--7. 1. "INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 " group.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 27.--31. 1. "INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 " hexmask.long.byte 0x00 19.--23. 1. "INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 " hexmask.long.byte 0x00 11.--15. 1. "INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 " hexmask.long.byte 0x00 3.--7. 1. "INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 " else rgroup.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" rgroup.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" rgroup.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" rgroup.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" rgroup.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" rgroup.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" rgroup.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" rgroup.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07) group.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 27.--31. 1. "INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 " hexmask.long.byte 0x00 19.--23. 1. "INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 " hexmask.long.byte 0x00 11.--15. 1. "INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 " hexmask.long.byte 0x00 3.--7. 1. "INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 " group.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 27.--31. 1. "INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 " hexmask.long.byte 0x00 19.--23. 1. "INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 " hexmask.long.byte 0x00 11.--15. 1. "INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 " hexmask.long.byte 0x00 3.--7. 1. "INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 " group.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 27.--31. 1. "INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 " hexmask.long.byte 0x00 19.--23. 1. "INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 " hexmask.long.byte 0x00 11.--15. 1. "INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 " hexmask.long.byte 0x00 3.--7. 1. "INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 " group.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 27.--31. 1. "INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 " hexmask.long.byte 0x00 19.--23. 1. "INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 " hexmask.long.byte 0x00 11.--15. 1. "INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 " hexmask.long.byte 0x00 3.--7. 1. "INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 " group.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 27.--31. 1. "INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 " hexmask.long.byte 0x00 19.--23. 1. "INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 " hexmask.long.byte 0x00 11.--15. 1. "INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 " hexmask.long.byte 0x00 3.--7. 1. "INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 " group.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 27.--31. 1. "INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 " hexmask.long.byte 0x00 19.--23. 1. "INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 " hexmask.long.byte 0x00 11.--15. 1. "INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 " hexmask.long.byte 0x00 3.--7. 1. "INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 " group.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 27.--31. 1. "INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 " hexmask.long.byte 0x00 19.--23. 1. "INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 " hexmask.long.byte 0x00 11.--15. 1. "INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 " hexmask.long.byte 0x00 3.--7. 1. "INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 " group.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 27.--31. 1. "INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 " hexmask.long.byte 0x00 19.--23. 1. "INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 " hexmask.long.byte 0x00 11.--15. 1. "INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 " hexmask.long.byte 0x00 3.--7. 1. "INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 " else rgroup.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" rgroup.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" rgroup.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" rgroup.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" rgroup.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" rgroup.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" rgroup.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" rgroup.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08) group.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hexmask.long.byte 0x00 27.--31. 1. "INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 " hexmask.long.byte 0x00 19.--23. 1. "INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 " hexmask.long.byte 0x00 11.--15. 1. "INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 " hexmask.long.byte 0x00 3.--7. 1. "INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 " group.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hexmask.long.byte 0x00 27.--31. 1. "INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 " hexmask.long.byte 0x00 19.--23. 1. "INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 " hexmask.long.byte 0x00 11.--15. 1. "INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 " hexmask.long.byte 0x00 3.--7. 1. "INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 " group.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hexmask.long.byte 0x00 27.--31. 1. "INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 " hexmask.long.byte 0x00 19.--23. 1. "INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 " hexmask.long.byte 0x00 11.--15. 1. "INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 " hexmask.long.byte 0x00 3.--7. 1. "INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 " group.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hexmask.long.byte 0x00 27.--31. 1. "INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 " hexmask.long.byte 0x00 19.--23. 1. "INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 " hexmask.long.byte 0x00 11.--15. 1. "INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 " hexmask.long.byte 0x00 3.--7. 1. "INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 " group.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hexmask.long.byte 0x00 27.--31. 1. "INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 " hexmask.long.byte 0x00 19.--23. 1. "INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 " hexmask.long.byte 0x00 11.--15. 1. "INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 " hexmask.long.byte 0x00 3.--7. 1. "INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 " group.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hexmask.long.byte 0x00 27.--31. 1. "INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 " hexmask.long.byte 0x00 19.--23. 1. "INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 " hexmask.long.byte 0x00 11.--15. 1. "INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 " hexmask.long.byte 0x00 3.--7. 1. "INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 " group.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hexmask.long.byte 0x00 27.--31. 1. "INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 " hexmask.long.byte 0x00 19.--23. 1. "INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 " hexmask.long.byte 0x00 11.--15. 1. "INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 " hexmask.long.byte 0x00 3.--7. 1. "INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 " group.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" hexmask.long.byte 0x00 27.--31. 1. "INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 " hexmask.long.byte 0x00 19.--23. 1. "INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 " hexmask.long.byte 0x00 11.--15. 1. "INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 " hexmask.long.byte 0x00 3.--7. 1. "INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 " else rgroup.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" rgroup.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" rgroup.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" rgroup.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" rgroup.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" rgroup.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" rgroup.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" rgroup.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09) group.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hexmask.long.byte 0x00 27.--31. 1. "INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 " hexmask.long.byte 0x00 19.--23. 1. "INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 " hexmask.long.byte 0x00 11.--15. 1. "INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 " hexmask.long.byte 0x00 3.--7. 1. "INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 " group.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hexmask.long.byte 0x00 27.--31. 1. "INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 " hexmask.long.byte 0x00 19.--23. 1. "INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 " hexmask.long.byte 0x00 11.--15. 1. "INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 " hexmask.long.byte 0x00 3.--7. 1. "INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 " group.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hexmask.long.byte 0x00 27.--31. 1. "INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 " hexmask.long.byte 0x00 19.--23. 1. "INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 " hexmask.long.byte 0x00 11.--15. 1. "INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 " hexmask.long.byte 0x00 3.--7. 1. "INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 " group.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hexmask.long.byte 0x00 27.--31. 1. "INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 " hexmask.long.byte 0x00 19.--23. 1. "INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 " hexmask.long.byte 0x00 11.--15. 1. "INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 " hexmask.long.byte 0x00 3.--7. 1. "INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 " group.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hexmask.long.byte 0x00 27.--31. 1. "INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 " hexmask.long.byte 0x00 19.--23. 1. "INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 " hexmask.long.byte 0x00 11.--15. 1. "INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 " hexmask.long.byte 0x00 3.--7. 1. "INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 " group.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hexmask.long.byte 0x00 27.--31. 1. "INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 " hexmask.long.byte 0x00 19.--23. 1. "INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 " hexmask.long.byte 0x00 11.--15. 1. "INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 " hexmask.long.byte 0x00 3.--7. 1. "INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 " group.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hexmask.long.byte 0x00 27.--31. 1. "INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 " hexmask.long.byte 0x00 19.--23. 1. "INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 " hexmask.long.byte 0x00 11.--15. 1. "INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 " hexmask.long.byte 0x00 3.--7. 1. "INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 " group.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" hexmask.long.byte 0x00 27.--31. 1. "INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 " hexmask.long.byte 0x00 19.--23. 1. "INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 " hexmask.long.byte 0x00 11.--15. 1. "INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 " hexmask.long.byte 0x00 3.--7. 1. "INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 " else rgroup.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" rgroup.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" rgroup.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" rgroup.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" rgroup.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" rgroup.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" rgroup.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" rgroup.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A) group.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hexmask.long.byte 0x00 27.--31. 1. "INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 " hexmask.long.byte 0x00 19.--23. 1. "INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 " hexmask.long.byte 0x00 11.--15. 1. "INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 " hexmask.long.byte 0x00 3.--7. 1. "INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 " group.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hexmask.long.byte 0x00 27.--31. 1. "INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 " hexmask.long.byte 0x00 19.--23. 1. "INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 " hexmask.long.byte 0x00 11.--15. 1. "INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 " hexmask.long.byte 0x00 3.--7. 1. "INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 " group.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hexmask.long.byte 0x00 27.--31. 1. "INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 " hexmask.long.byte 0x00 19.--23. 1. "INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 " hexmask.long.byte 0x00 11.--15. 1. "INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 " hexmask.long.byte 0x00 3.--7. 1. "INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 " group.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hexmask.long.byte 0x00 27.--31. 1. "INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 " hexmask.long.byte 0x00 19.--23. 1. "INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 " hexmask.long.byte 0x00 11.--15. 1. "INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 " hexmask.long.byte 0x00 3.--7. 1. "INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 " group.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hexmask.long.byte 0x00 27.--31. 1. "INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 " hexmask.long.byte 0x00 19.--23. 1. "INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 " hexmask.long.byte 0x00 11.--15. 1. "INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 " hexmask.long.byte 0x00 3.--7. 1. "INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 " group.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hexmask.long.byte 0x00 27.--31. 1. "INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 " hexmask.long.byte 0x00 19.--23. 1. "INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 " hexmask.long.byte 0x00 11.--15. 1. "INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 " hexmask.long.byte 0x00 3.--7. 1. "INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 " group.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hexmask.long.byte 0x00 27.--31. 1. "INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 " hexmask.long.byte 0x00 19.--23. 1. "INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 " hexmask.long.byte 0x00 11.--15. 1. "INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 " hexmask.long.byte 0x00 3.--7. 1. "INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 " group.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" hexmask.long.byte 0x00 27.--31. 1. "INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 " hexmask.long.byte 0x00 19.--23. 1. "INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 " hexmask.long.byte 0x00 11.--15. 1. "INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 " hexmask.long.byte 0x00 3.--7. 1. "INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 " else rgroup.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" rgroup.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" rgroup.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" rgroup.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" rgroup.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" rgroup.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" rgroup.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" rgroup.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B) group.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hexmask.long.byte 0x00 27.--31. 1. "INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 " hexmask.long.byte 0x00 19.--23. 1. "INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 " hexmask.long.byte 0x00 11.--15. 1. "INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 " hexmask.long.byte 0x00 3.--7. 1. "INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 " group.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hexmask.long.byte 0x00 27.--31. 1. "INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 " hexmask.long.byte 0x00 19.--23. 1. "INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 " hexmask.long.byte 0x00 11.--15. 1. "INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 " hexmask.long.byte 0x00 3.--7. 1. "INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 " group.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hexmask.long.byte 0x00 27.--31. 1. "INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 " hexmask.long.byte 0x00 19.--23. 1. "INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 " hexmask.long.byte 0x00 11.--15. 1. "INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 " hexmask.long.byte 0x00 3.--7. 1. "INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 " group.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hexmask.long.byte 0x00 27.--31. 1. "INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 " hexmask.long.byte 0x00 19.--23. 1. "INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 " hexmask.long.byte 0x00 11.--15. 1. "INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 " hexmask.long.byte 0x00 3.--7. 1. "INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 " group.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hexmask.long.byte 0x00 27.--31. 1. "INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 " hexmask.long.byte 0x00 19.--23. 1. "INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 " hexmask.long.byte 0x00 11.--15. 1. "INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 " hexmask.long.byte 0x00 3.--7. 1. "INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 " group.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hexmask.long.byte 0x00 27.--31. 1. "INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 " hexmask.long.byte 0x00 19.--23. 1. "INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 " hexmask.long.byte 0x00 11.--15. 1. "INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 " hexmask.long.byte 0x00 3.--7. 1. "INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 " group.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hexmask.long.byte 0x00 27.--31. 1. "INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 " hexmask.long.byte 0x00 19.--23. 1. "INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 " hexmask.long.byte 0x00 11.--15. 1. "INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 " hexmask.long.byte 0x00 3.--7. 1. "INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 " group.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" hexmask.long.byte 0x00 27.--31. 1. "INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 " hexmask.long.byte 0x00 19.--23. 1. "INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 " hexmask.long.byte 0x00 11.--15. 1. "INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 " hexmask.long.byte 0x00 3.--7. 1. "INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 " else rgroup.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" rgroup.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" rgroup.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" rgroup.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" rgroup.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" rgroup.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" rgroup.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" rgroup.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C) group.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hexmask.long.byte 0x00 27.--31. 1. "INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 " hexmask.long.byte 0x00 19.--23. 1. "INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 " hexmask.long.byte 0x00 11.--15. 1. "INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 " hexmask.long.byte 0x00 3.--7. 1. "INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 " group.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hexmask.long.byte 0x00 27.--31. 1. "INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 " hexmask.long.byte 0x00 19.--23. 1. "INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 " hexmask.long.byte 0x00 11.--15. 1. "INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 " hexmask.long.byte 0x00 3.--7. 1. "INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 " group.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hexmask.long.byte 0x00 27.--31. 1. "INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 " hexmask.long.byte 0x00 19.--23. 1. "INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 " hexmask.long.byte 0x00 11.--15. 1. "INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 " hexmask.long.byte 0x00 3.--7. 1. "INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 " group.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hexmask.long.byte 0x00 27.--31. 1. "INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 " hexmask.long.byte 0x00 19.--23. 1. "INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 " hexmask.long.byte 0x00 11.--15. 1. "INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 " hexmask.long.byte 0x00 3.--7. 1. "INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 " group.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hexmask.long.byte 0x00 27.--31. 1. "INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 " hexmask.long.byte 0x00 19.--23. 1. "INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 " hexmask.long.byte 0x00 11.--15. 1. "INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 " hexmask.long.byte 0x00 3.--7. 1. "INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 " group.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hexmask.long.byte 0x00 27.--31. 1. "INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 " hexmask.long.byte 0x00 19.--23. 1. "INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 " hexmask.long.byte 0x00 11.--15. 1. "INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 " hexmask.long.byte 0x00 3.--7. 1. "INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 " group.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hexmask.long.byte 0x00 27.--31. 1. "INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 " hexmask.long.byte 0x00 19.--23. 1. "INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 " hexmask.long.byte 0x00 11.--15. 1. "INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 " hexmask.long.byte 0x00 3.--7. 1. "INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 " group.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" hexmask.long.byte 0x00 27.--31. 1. "INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 " hexmask.long.byte 0x00 19.--23. 1. "INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 " hexmask.long.byte 0x00 11.--15. 1. "INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 " hexmask.long.byte 0x00 3.--7. 1. "INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 " else rgroup.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" rgroup.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" rgroup.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" rgroup.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" rgroup.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" rgroup.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" rgroup.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" rgroup.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D) group.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hexmask.long.byte 0x00 27.--31. 1. "INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 " hexmask.long.byte 0x00 19.--23. 1. "INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 " hexmask.long.byte 0x00 11.--15. 1. "INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 " hexmask.long.byte 0x00 3.--7. 1. "INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 " group.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hexmask.long.byte 0x00 27.--31. 1. "INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 " hexmask.long.byte 0x00 19.--23. 1. "INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 " hexmask.long.byte 0x00 11.--15. 1. "INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 " hexmask.long.byte 0x00 3.--7. 1. "INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 " group.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hexmask.long.byte 0x00 27.--31. 1. "INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 " hexmask.long.byte 0x00 19.--23. 1. "INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 " hexmask.long.byte 0x00 11.--15. 1. "INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 " hexmask.long.byte 0x00 3.--7. 1. "INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 " group.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hexmask.long.byte 0x00 27.--31. 1. "INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 " hexmask.long.byte 0x00 19.--23. 1. "INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 " hexmask.long.byte 0x00 11.--15. 1. "INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 " hexmask.long.byte 0x00 3.--7. 1. "INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 " group.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hexmask.long.byte 0x00 27.--31. 1. "INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 " hexmask.long.byte 0x00 19.--23. 1. "INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 " hexmask.long.byte 0x00 11.--15. 1. "INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 " hexmask.long.byte 0x00 3.--7. 1. "INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 " group.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hexmask.long.byte 0x00 27.--31. 1. "INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 " hexmask.long.byte 0x00 19.--23. 1. "INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 " hexmask.long.byte 0x00 11.--15. 1. "INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 " hexmask.long.byte 0x00 3.--7. 1. "INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 " group.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hexmask.long.byte 0x00 27.--31. 1. "INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 " hexmask.long.byte 0x00 19.--23. 1. "INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 " hexmask.long.byte 0x00 11.--15. 1. "INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 " hexmask.long.byte 0x00 3.--7. 1. "INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 " group.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" hexmask.long.byte 0x00 27.--31. 1. "INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 " hexmask.long.byte 0x00 19.--23. 1. "INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 " hexmask.long.byte 0x00 11.--15. 1. "INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 " hexmask.long.byte 0x00 3.--7. 1. "INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 " else rgroup.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" rgroup.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" rgroup.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" rgroup.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" rgroup.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" rgroup.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" rgroup.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" rgroup.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E) group.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hexmask.long.byte 0x00 27.--31. 1. "INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 " hexmask.long.byte 0x00 19.--23. 1. "INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 " hexmask.long.byte 0x00 11.--15. 1. "INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 " hexmask.long.byte 0x00 3.--7. 1. "INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 " group.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hexmask.long.byte 0x00 27.--31. 1. "INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 " hexmask.long.byte 0x00 19.--23. 1. "INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 " hexmask.long.byte 0x00 11.--15. 1. "INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 " hexmask.long.byte 0x00 3.--7. 1. "INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 " group.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hexmask.long.byte 0x00 27.--31. 1. "INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 " hexmask.long.byte 0x00 19.--23. 1. "INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 " hexmask.long.byte 0x00 11.--15. 1. "INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 " hexmask.long.byte 0x00 3.--7. 1. "INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 " group.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hexmask.long.byte 0x00 27.--31. 1. "INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 " hexmask.long.byte 0x00 19.--23. 1. "INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 " hexmask.long.byte 0x00 11.--15. 1. "INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 " hexmask.long.byte 0x00 3.--7. 1. "INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 " group.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hexmask.long.byte 0x00 27.--31. 1. "INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 " hexmask.long.byte 0x00 19.--23. 1. "INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 " hexmask.long.byte 0x00 11.--15. 1. "INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 " hexmask.long.byte 0x00 3.--7. 1. "INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 " group.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hexmask.long.byte 0x00 27.--31. 1. "INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 " hexmask.long.byte 0x00 19.--23. 1. "INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 " hexmask.long.byte 0x00 11.--15. 1. "INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 " hexmask.long.byte 0x00 3.--7. 1. "INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 " group.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hexmask.long.byte 0x00 27.--31. 1. "INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 " hexmask.long.byte 0x00 19.--23. 1. "INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 " hexmask.long.byte 0x00 11.--15. 1. "INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 " hexmask.long.byte 0x00 3.--7. 1. "INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 " group.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" hexmask.long.byte 0x00 27.--31. 1. "INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 " hexmask.long.byte 0x00 19.--23. 1. "INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 " hexmask.long.byte 0x00 11.--15. 1. "INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 " hexmask.long.byte 0x00 3.--7. 1. "INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 " else rgroup.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" rgroup.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" rgroup.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" rgroup.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" rgroup.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" rgroup.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" rgroup.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" rgroup.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F) group.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hexmask.long.byte 0x00 27.--31. 1. "INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 " hexmask.long.byte 0x00 19.--23. 1. "INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 " hexmask.long.byte 0x00 11.--15. 1. "INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 " hexmask.long.byte 0x00 3.--7. 1. "INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 " group.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hexmask.long.byte 0x00 27.--31. 1. "INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 " hexmask.long.byte 0x00 19.--23. 1. "INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 " hexmask.long.byte 0x00 11.--15. 1. "INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 " hexmask.long.byte 0x00 3.--7. 1. "INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 " group.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hexmask.long.byte 0x00 27.--31. 1. "INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 " hexmask.long.byte 0x00 19.--23. 1. "INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 " hexmask.long.byte 0x00 11.--15. 1. "INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 " hexmask.long.byte 0x00 3.--7. 1. "INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 " group.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hexmask.long.byte 0x00 27.--31. 1. "INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 " hexmask.long.byte 0x00 19.--23. 1. "INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 " hexmask.long.byte 0x00 11.--15. 1. "INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 " hexmask.long.byte 0x00 3.--7. 1. "INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 " group.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hexmask.long.byte 0x00 27.--31. 1. "INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 " hexmask.long.byte 0x00 19.--23. 1. "INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 " hexmask.long.byte 0x00 11.--15. 1. "INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 " hexmask.long.byte 0x00 3.--7. 1. "INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 " group.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hexmask.long.byte 0x00 27.--31. 1. "INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 " hexmask.long.byte 0x00 19.--23. 1. "INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 " hexmask.long.byte 0x00 11.--15. 1. "INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 " hexmask.long.byte 0x00 3.--7. 1. "INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 " group.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hexmask.long.byte 0x00 27.--31. 1. "INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 " hexmask.long.byte 0x00 19.--23. 1. "INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 " hexmask.long.byte 0x00 11.--15. 1. "INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 " hexmask.long.byte 0x00 3.--7. 1. "INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 " group.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" hexmask.long.byte 0x00 27.--31. 1. "INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 " hexmask.long.byte 0x00 19.--23. 1. "INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 " hexmask.long.byte 0x00 11.--15. 1. "INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 " hexmask.long.byte 0x00 3.--7. 1. "INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 " else rgroup.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" rgroup.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" rgroup.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" rgroup.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" rgroup.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" rgroup.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" rgroup.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" rgroup.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10) group.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hexmask.long.byte 0x00 27.--31. 1. "INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 " hexmask.long.byte 0x00 19.--23. 1. "INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 " hexmask.long.byte 0x00 11.--15. 1. "INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 " hexmask.long.byte 0x00 3.--7. 1. "INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 " group.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hexmask.long.byte 0x00 27.--31. 1. "INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 " hexmask.long.byte 0x00 19.--23. 1. "INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 " hexmask.long.byte 0x00 11.--15. 1. "INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 " hexmask.long.byte 0x00 3.--7. 1. "INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 " group.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hexmask.long.byte 0x00 27.--31. 1. "INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 " hexmask.long.byte 0x00 19.--23. 1. "INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 " hexmask.long.byte 0x00 11.--15. 1. "INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 " hexmask.long.byte 0x00 3.--7. 1. "INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 " group.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hexmask.long.byte 0x00 27.--31. 1. "INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 " hexmask.long.byte 0x00 19.--23. 1. "INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 " hexmask.long.byte 0x00 11.--15. 1. "INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 " hexmask.long.byte 0x00 3.--7. 1. "INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 " group.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hexmask.long.byte 0x00 27.--31. 1. "INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 " hexmask.long.byte 0x00 19.--23. 1. "INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 " hexmask.long.byte 0x00 11.--15. 1. "INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 " hexmask.long.byte 0x00 3.--7. 1. "INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 " group.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hexmask.long.byte 0x00 27.--31. 1. "INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 " hexmask.long.byte 0x00 19.--23. 1. "INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 " hexmask.long.byte 0x00 11.--15. 1. "INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 " hexmask.long.byte 0x00 3.--7. 1. "INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 " group.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hexmask.long.byte 0x00 27.--31. 1. "INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 " hexmask.long.byte 0x00 19.--23. 1. "INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 " hexmask.long.byte 0x00 11.--15. 1. "INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 " hexmask.long.byte 0x00 3.--7. 1. "INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 " group.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" hexmask.long.byte 0x00 27.--31. 1. "INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 " hexmask.long.byte 0x00 19.--23. 1. "INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 " hexmask.long.byte 0x00 11.--15. 1. "INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 " hexmask.long.byte 0x00 3.--7. 1. "INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 " else rgroup.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" rgroup.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" rgroup.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" rgroup.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" rgroup.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" rgroup.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" rgroup.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" rgroup.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11) group.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hexmask.long.byte 0x00 27.--31. 1. "INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 " hexmask.long.byte 0x00 19.--23. 1. "INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 " hexmask.long.byte 0x00 11.--15. 1. "INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 " hexmask.long.byte 0x00 3.--7. 1. "INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 " group.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hexmask.long.byte 0x00 27.--31. 1. "INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 " hexmask.long.byte 0x00 19.--23. 1. "INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 " hexmask.long.byte 0x00 11.--15. 1. "INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 " hexmask.long.byte 0x00 3.--7. 1. "INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 " group.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hexmask.long.byte 0x00 27.--31. 1. "INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 " hexmask.long.byte 0x00 19.--23. 1. "INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 " hexmask.long.byte 0x00 11.--15. 1. "INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 " hexmask.long.byte 0x00 3.--7. 1. "INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 " group.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hexmask.long.byte 0x00 27.--31. 1. "INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 " hexmask.long.byte 0x00 19.--23. 1. "INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 " hexmask.long.byte 0x00 11.--15. 1. "INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 " hexmask.long.byte 0x00 3.--7. 1. "INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 " group.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hexmask.long.byte 0x00 27.--31. 1. "INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 " hexmask.long.byte 0x00 19.--23. 1. "INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 " hexmask.long.byte 0x00 11.--15. 1. "INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 " hexmask.long.byte 0x00 3.--7. 1. "INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 " group.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hexmask.long.byte 0x00 27.--31. 1. "INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 " hexmask.long.byte 0x00 19.--23. 1. "INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 " hexmask.long.byte 0x00 11.--15. 1. "INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 " hexmask.long.byte 0x00 3.--7. 1. "INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 " group.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hexmask.long.byte 0x00 27.--31. 1. "INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 " hexmask.long.byte 0x00 19.--23. 1. "INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 " hexmask.long.byte 0x00 11.--15. 1. "INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 " hexmask.long.byte 0x00 3.--7. 1. "INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 " group.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" hexmask.long.byte 0x00 27.--31. 1. "INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 " hexmask.long.byte 0x00 19.--23. 1. "INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 " hexmask.long.byte 0x00 11.--15. 1. "INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 " hexmask.long.byte 0x00 3.--7. 1. "INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 " else rgroup.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" rgroup.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" rgroup.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" rgroup.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" rgroup.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" rgroup.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" rgroup.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" rgroup.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12) group.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hexmask.long.byte 0x00 27.--31. 1. "INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 " hexmask.long.byte 0x00 19.--23. 1. "INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 " hexmask.long.byte 0x00 11.--15. 1. "INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 " hexmask.long.byte 0x00 3.--7. 1. "INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 " group.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hexmask.long.byte 0x00 27.--31. 1. "INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 " hexmask.long.byte 0x00 19.--23. 1. "INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 " hexmask.long.byte 0x00 11.--15. 1. "INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 " hexmask.long.byte 0x00 3.--7. 1. "INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 " group.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hexmask.long.byte 0x00 27.--31. 1. "INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 " hexmask.long.byte 0x00 19.--23. 1. "INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 " hexmask.long.byte 0x00 11.--15. 1. "INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 " hexmask.long.byte 0x00 3.--7. 1. "INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 " group.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hexmask.long.byte 0x00 27.--31. 1. "INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 " hexmask.long.byte 0x00 19.--23. 1. "INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 " hexmask.long.byte 0x00 11.--15. 1. "INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 " hexmask.long.byte 0x00 3.--7. 1. "INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 " group.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hexmask.long.byte 0x00 27.--31. 1. "INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 " hexmask.long.byte 0x00 19.--23. 1. "INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 " hexmask.long.byte 0x00 11.--15. 1. "INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 " hexmask.long.byte 0x00 3.--7. 1. "INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 " group.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hexmask.long.byte 0x00 27.--31. 1. "INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 " hexmask.long.byte 0x00 19.--23. 1. "INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 " hexmask.long.byte 0x00 11.--15. 1. "INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 " hexmask.long.byte 0x00 3.--7. 1. "INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 " group.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hexmask.long.byte 0x00 27.--31. 1. "INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 " hexmask.long.byte 0x00 19.--23. 1. "INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 " hexmask.long.byte 0x00 11.--15. 1. "INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 " hexmask.long.byte 0x00 3.--7. 1. "INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 " group.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" hexmask.long.byte 0x00 27.--31. 1. "INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 " hexmask.long.byte 0x00 19.--23. 1. "INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 " hexmask.long.byte 0x00 11.--15. 1. "INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 " hexmask.long.byte 0x00 3.--7. 1. "INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 " else rgroup.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" rgroup.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" rgroup.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" rgroup.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" rgroup.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" rgroup.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" rgroup.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" rgroup.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13) group.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hexmask.long.byte 0x00 27.--31. 1. "INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 " hexmask.long.byte 0x00 19.--23. 1. "INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 " hexmask.long.byte 0x00 11.--15. 1. "INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 " hexmask.long.byte 0x00 3.--7. 1. "INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 " group.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hexmask.long.byte 0x00 27.--31. 1. "INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 " hexmask.long.byte 0x00 19.--23. 1. "INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 " hexmask.long.byte 0x00 11.--15. 1. "INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 " hexmask.long.byte 0x00 3.--7. 1. "INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 " group.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hexmask.long.byte 0x00 27.--31. 1. "INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 " hexmask.long.byte 0x00 19.--23. 1. "INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 " hexmask.long.byte 0x00 11.--15. 1. "INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 " hexmask.long.byte 0x00 3.--7. 1. "INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 " group.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hexmask.long.byte 0x00 27.--31. 1. "INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 " hexmask.long.byte 0x00 19.--23. 1. "INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 " hexmask.long.byte 0x00 11.--15. 1. "INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 " hexmask.long.byte 0x00 3.--7. 1. "INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 " group.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hexmask.long.byte 0x00 27.--31. 1. "INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 " hexmask.long.byte 0x00 19.--23. 1. "INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 " hexmask.long.byte 0x00 11.--15. 1. "INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 " hexmask.long.byte 0x00 3.--7. 1. "INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 " group.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hexmask.long.byte 0x00 27.--31. 1. "INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 " hexmask.long.byte 0x00 19.--23. 1. "INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 " hexmask.long.byte 0x00 11.--15. 1. "INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 " hexmask.long.byte 0x00 3.--7. 1. "INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 " group.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hexmask.long.byte 0x00 27.--31. 1. "INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 " hexmask.long.byte 0x00 19.--23. 1. "INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 " hexmask.long.byte 0x00 11.--15. 1. "INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 " hexmask.long.byte 0x00 3.--7. 1. "INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 " group.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" hexmask.long.byte 0x00 27.--31. 1. "INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 " hexmask.long.byte 0x00 19.--23. 1. "INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 " hexmask.long.byte 0x00 11.--15. 1. "INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 " hexmask.long.byte 0x00 3.--7. 1. "INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 " else rgroup.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" rgroup.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" rgroup.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" rgroup.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" rgroup.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" rgroup.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" rgroup.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" rgroup.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14) group.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hexmask.long.byte 0x00 27.--31. 1. "INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 " hexmask.long.byte 0x00 19.--23. 1. "INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 " hexmask.long.byte 0x00 11.--15. 1. "INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 " hexmask.long.byte 0x00 3.--7. 1. "INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 " group.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hexmask.long.byte 0x00 27.--31. 1. "INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 " hexmask.long.byte 0x00 19.--23. 1. "INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 " hexmask.long.byte 0x00 11.--15. 1. "INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 " hexmask.long.byte 0x00 3.--7. 1. "INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 " group.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hexmask.long.byte 0x00 27.--31. 1. "INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 " hexmask.long.byte 0x00 19.--23. 1. "INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 " hexmask.long.byte 0x00 11.--15. 1. "INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 " hexmask.long.byte 0x00 3.--7. 1. "INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 " group.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hexmask.long.byte 0x00 27.--31. 1. "INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 " hexmask.long.byte 0x00 19.--23. 1. "INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 " hexmask.long.byte 0x00 11.--15. 1. "INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 " hexmask.long.byte 0x00 3.--7. 1. "INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 " group.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hexmask.long.byte 0x00 27.--31. 1. "INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 " hexmask.long.byte 0x00 19.--23. 1. "INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 " hexmask.long.byte 0x00 11.--15. 1. "INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 " hexmask.long.byte 0x00 3.--7. 1. "INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 " group.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hexmask.long.byte 0x00 27.--31. 1. "INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 " hexmask.long.byte 0x00 19.--23. 1. "INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 " hexmask.long.byte 0x00 11.--15. 1. "INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 " hexmask.long.byte 0x00 3.--7. 1. "INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 " group.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hexmask.long.byte 0x00 27.--31. 1. "INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 " hexmask.long.byte 0x00 19.--23. 1. "INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 " hexmask.long.byte 0x00 11.--15. 1. "INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 " hexmask.long.byte 0x00 3.--7. 1. "INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 " group.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" hexmask.long.byte 0x00 27.--31. 1. "INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 " hexmask.long.byte 0x00 19.--23. 1. "INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 " hexmask.long.byte 0x00 11.--15. 1. "INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 " hexmask.long.byte 0x00 3.--7. 1. "INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 " else rgroup.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" rgroup.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" rgroup.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" rgroup.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" rgroup.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" rgroup.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" rgroup.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" rgroup.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15) group.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hexmask.long.byte 0x00 27.--31. 1. "INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 " hexmask.long.byte 0x00 19.--23. 1. "INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 " hexmask.long.byte 0x00 11.--15. 1. "INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 " hexmask.long.byte 0x00 3.--7. 1. "INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 " group.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hexmask.long.byte 0x00 27.--31. 1. "INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 " hexmask.long.byte 0x00 19.--23. 1. "INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 " hexmask.long.byte 0x00 11.--15. 1. "INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 " hexmask.long.byte 0x00 3.--7. 1. "INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 " group.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hexmask.long.byte 0x00 27.--31. 1. "INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 " hexmask.long.byte 0x00 19.--23. 1. "INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 " hexmask.long.byte 0x00 11.--15. 1. "INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 " hexmask.long.byte 0x00 3.--7. 1. "INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 " group.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hexmask.long.byte 0x00 27.--31. 1. "INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 " hexmask.long.byte 0x00 19.--23. 1. "INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 " hexmask.long.byte 0x00 11.--15. 1. "INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 " hexmask.long.byte 0x00 3.--7. 1. "INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 " group.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hexmask.long.byte 0x00 27.--31. 1. "INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 " hexmask.long.byte 0x00 19.--23. 1. "INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 " hexmask.long.byte 0x00 11.--15. 1. "INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 " hexmask.long.byte 0x00 3.--7. 1. "INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 " group.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hexmask.long.byte 0x00 27.--31. 1. "INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 " hexmask.long.byte 0x00 19.--23. 1. "INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 " hexmask.long.byte 0x00 11.--15. 1. "INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 " hexmask.long.byte 0x00 3.--7. 1. "INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 " group.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hexmask.long.byte 0x00 27.--31. 1. "INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 " hexmask.long.byte 0x00 19.--23. 1. "INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 " hexmask.long.byte 0x00 11.--15. 1. "INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 " hexmask.long.byte 0x00 3.--7. 1. "INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 " group.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" hexmask.long.byte 0x00 27.--31. 1. "INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 " hexmask.long.byte 0x00 19.--23. 1. "INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 " hexmask.long.byte 0x00 11.--15. 1. "INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 " hexmask.long.byte 0x00 3.--7. 1. "INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 " else rgroup.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" rgroup.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" rgroup.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" rgroup.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" rgroup.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" rgroup.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" rgroup.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" rgroup.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16) group.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hexmask.long.byte 0x00 27.--31. 1. "INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 " hexmask.long.byte 0x00 19.--23. 1. "INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 " hexmask.long.byte 0x00 11.--15. 1. "INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 " hexmask.long.byte 0x00 3.--7. 1. "INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 " group.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hexmask.long.byte 0x00 27.--31. 1. "INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 " hexmask.long.byte 0x00 19.--23. 1. "INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 " hexmask.long.byte 0x00 11.--15. 1. "INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 " hexmask.long.byte 0x00 3.--7. 1. "INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 " group.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hexmask.long.byte 0x00 27.--31. 1. "INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 " hexmask.long.byte 0x00 19.--23. 1. "INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 " hexmask.long.byte 0x00 11.--15. 1. "INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 " hexmask.long.byte 0x00 3.--7. 1. "INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 " group.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hexmask.long.byte 0x00 27.--31. 1. "INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 " hexmask.long.byte 0x00 19.--23. 1. "INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 " hexmask.long.byte 0x00 11.--15. 1. "INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 " hexmask.long.byte 0x00 3.--7. 1. "INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 " group.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hexmask.long.byte 0x00 27.--31. 1. "INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 " hexmask.long.byte 0x00 19.--23. 1. "INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 " hexmask.long.byte 0x00 11.--15. 1. "INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 " hexmask.long.byte 0x00 3.--7. 1. "INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 " group.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hexmask.long.byte 0x00 27.--31. 1. "INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 " hexmask.long.byte 0x00 19.--23. 1. "INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 " hexmask.long.byte 0x00 11.--15. 1. "INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 " hexmask.long.byte 0x00 3.--7. 1. "INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 " group.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hexmask.long.byte 0x00 27.--31. 1. "INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 " hexmask.long.byte 0x00 19.--23. 1. "INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 " hexmask.long.byte 0x00 11.--15. 1. "INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 " hexmask.long.byte 0x00 3.--7. 1. "INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 " group.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" hexmask.long.byte 0x00 27.--31. 1. "INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 " hexmask.long.byte 0x00 19.--23. 1. "INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 " hexmask.long.byte 0x00 11.--15. 1. "INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 " hexmask.long.byte 0x00 3.--7. 1. "INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 " else rgroup.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" rgroup.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" rgroup.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" rgroup.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" rgroup.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" rgroup.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" rgroup.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" rgroup.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17) group.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hexmask.long.byte 0x00 27.--31. 1. "INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 " hexmask.long.byte 0x00 19.--23. 1. "INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 " hexmask.long.byte 0x00 11.--15. 1. "INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 " hexmask.long.byte 0x00 3.--7. 1. "INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 " group.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hexmask.long.byte 0x00 27.--31. 1. "INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 " hexmask.long.byte 0x00 19.--23. 1. "INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 " hexmask.long.byte 0x00 11.--15. 1. "INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 " hexmask.long.byte 0x00 3.--7. 1. "INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 " group.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hexmask.long.byte 0x00 27.--31. 1. "INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 " hexmask.long.byte 0x00 19.--23. 1. "INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 " hexmask.long.byte 0x00 11.--15. 1. "INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 " hexmask.long.byte 0x00 3.--7. 1. "INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 " group.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hexmask.long.byte 0x00 27.--31. 1. "INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 " hexmask.long.byte 0x00 19.--23. 1. "INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 " hexmask.long.byte 0x00 11.--15. 1. "INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 " hexmask.long.byte 0x00 3.--7. 1. "INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 " group.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hexmask.long.byte 0x00 27.--31. 1. "INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 " hexmask.long.byte 0x00 19.--23. 1. "INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 " hexmask.long.byte 0x00 11.--15. 1. "INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 " hexmask.long.byte 0x00 3.--7. 1. "INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 " group.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hexmask.long.byte 0x00 27.--31. 1. "INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 " hexmask.long.byte 0x00 19.--23. 1. "INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 " hexmask.long.byte 0x00 11.--15. 1. "INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 " hexmask.long.byte 0x00 3.--7. 1. "INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 " group.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hexmask.long.byte 0x00 27.--31. 1. "INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 " hexmask.long.byte 0x00 19.--23. 1. "INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 " hexmask.long.byte 0x00 11.--15. 1. "INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 " hexmask.long.byte 0x00 3.--7. 1. "INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 " group.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" hexmask.long.byte 0x00 27.--31. 1. "INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 " hexmask.long.byte 0x00 19.--23. 1. "INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 " hexmask.long.byte 0x00 11.--15. 1. "INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 " hexmask.long.byte 0x00 3.--7. 1. "INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 " else rgroup.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" rgroup.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" rgroup.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" rgroup.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" rgroup.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" rgroup.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" rgroup.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" rgroup.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18) group.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hexmask.long.byte 0x00 27.--31. 1. "INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 " hexmask.long.byte 0x00 19.--23. 1. "INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 " hexmask.long.byte 0x00 11.--15. 1. "INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 " hexmask.long.byte 0x00 3.--7. 1. "INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 " group.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hexmask.long.byte 0x00 27.--31. 1. "INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 " hexmask.long.byte 0x00 19.--23. 1. "INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 " hexmask.long.byte 0x00 11.--15. 1. "INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 " hexmask.long.byte 0x00 3.--7. 1. "INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 " group.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hexmask.long.byte 0x00 27.--31. 1. "INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 " hexmask.long.byte 0x00 19.--23. 1. "INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 " hexmask.long.byte 0x00 11.--15. 1. "INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 " hexmask.long.byte 0x00 3.--7. 1. "INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 " group.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hexmask.long.byte 0x00 27.--31. 1. "INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 " hexmask.long.byte 0x00 19.--23. 1. "INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 " hexmask.long.byte 0x00 11.--15. 1. "INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 " hexmask.long.byte 0x00 3.--7. 1. "INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 " group.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hexmask.long.byte 0x00 27.--31. 1. "INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 " hexmask.long.byte 0x00 19.--23. 1. "INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 " hexmask.long.byte 0x00 11.--15. 1. "INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 " hexmask.long.byte 0x00 3.--7. 1. "INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 " group.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hexmask.long.byte 0x00 27.--31. 1. "INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 " hexmask.long.byte 0x00 19.--23. 1. "INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 " hexmask.long.byte 0x00 11.--15. 1. "INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 " hexmask.long.byte 0x00 3.--7. 1. "INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 " group.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hexmask.long.byte 0x00 27.--31. 1. "INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 " hexmask.long.byte 0x00 19.--23. 1. "INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 " hexmask.long.byte 0x00 11.--15. 1. "INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 " hexmask.long.byte 0x00 3.--7. 1. "INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 " group.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" hexmask.long.byte 0x00 27.--31. 1. "INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 " hexmask.long.byte 0x00 19.--23. 1. "INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 " hexmask.long.byte 0x00 11.--15. 1. "INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 " hexmask.long.byte 0x00 3.--7. 1. "INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 " else rgroup.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" rgroup.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" rgroup.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" rgroup.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" rgroup.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" rgroup.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" rgroup.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" rgroup.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19) group.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hexmask.long.byte 0x00 27.--31. 1. "INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 " hexmask.long.byte 0x00 19.--23. 1. "INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 " hexmask.long.byte 0x00 11.--15. 1. "INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 " hexmask.long.byte 0x00 3.--7. 1. "INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 " group.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hexmask.long.byte 0x00 27.--31. 1. "INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 " hexmask.long.byte 0x00 19.--23. 1. "INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 " hexmask.long.byte 0x00 11.--15. 1. "INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 " hexmask.long.byte 0x00 3.--7. 1. "INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 " group.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hexmask.long.byte 0x00 27.--31. 1. "INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 " hexmask.long.byte 0x00 19.--23. 1. "INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 " hexmask.long.byte 0x00 11.--15. 1. "INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 " hexmask.long.byte 0x00 3.--7. 1. "INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 " group.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hexmask.long.byte 0x00 27.--31. 1. "INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 " hexmask.long.byte 0x00 19.--23. 1. "INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 " hexmask.long.byte 0x00 11.--15. 1. "INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 " hexmask.long.byte 0x00 3.--7. 1. "INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 " group.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hexmask.long.byte 0x00 27.--31. 1. "INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 " hexmask.long.byte 0x00 19.--23. 1. "INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 " hexmask.long.byte 0x00 11.--15. 1. "INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 " hexmask.long.byte 0x00 3.--7. 1. "INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 " group.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hexmask.long.byte 0x00 27.--31. 1. "INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 " hexmask.long.byte 0x00 19.--23. 1. "INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 " hexmask.long.byte 0x00 11.--15. 1. "INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 " hexmask.long.byte 0x00 3.--7. 1. "INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 " group.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hexmask.long.byte 0x00 27.--31. 1. "INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 " hexmask.long.byte 0x00 19.--23. 1. "INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 " hexmask.long.byte 0x00 11.--15. 1. "INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 " hexmask.long.byte 0x00 3.--7. 1. "INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 " group.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" hexmask.long.byte 0x00 27.--31. 1. "INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 " hexmask.long.byte 0x00 19.--23. 1. "INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 " hexmask.long.byte 0x00 11.--15. 1. "INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 " hexmask.long.byte 0x00 3.--7. 1. "INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 " else rgroup.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" rgroup.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" rgroup.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" rgroup.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" rgroup.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" rgroup.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" rgroup.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" rgroup.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A) group.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hexmask.long.byte 0x00 27.--31. 1. "INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 " hexmask.long.byte 0x00 19.--23. 1. "INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 " hexmask.long.byte 0x00 11.--15. 1. "INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 " hexmask.long.byte 0x00 3.--7. 1. "INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 " group.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hexmask.long.byte 0x00 27.--31. 1. "INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 " hexmask.long.byte 0x00 19.--23. 1. "INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 " hexmask.long.byte 0x00 11.--15. 1. "INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 " hexmask.long.byte 0x00 3.--7. 1. "INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 " group.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hexmask.long.byte 0x00 27.--31. 1. "INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 " hexmask.long.byte 0x00 19.--23. 1. "INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 " hexmask.long.byte 0x00 11.--15. 1. "INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 " hexmask.long.byte 0x00 3.--7. 1. "INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 " group.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hexmask.long.byte 0x00 27.--31. 1. "INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 " hexmask.long.byte 0x00 19.--23. 1. "INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 " hexmask.long.byte 0x00 11.--15. 1. "INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 " hexmask.long.byte 0x00 3.--7. 1. "INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 " group.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hexmask.long.byte 0x00 27.--31. 1. "INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 " hexmask.long.byte 0x00 19.--23. 1. "INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 " hexmask.long.byte 0x00 11.--15. 1. "INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 " hexmask.long.byte 0x00 3.--7. 1. "INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 " group.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hexmask.long.byte 0x00 27.--31. 1. "INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 " hexmask.long.byte 0x00 19.--23. 1. "INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 " hexmask.long.byte 0x00 11.--15. 1. "INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 " hexmask.long.byte 0x00 3.--7. 1. "INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 " group.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hexmask.long.byte 0x00 27.--31. 1. "INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 " hexmask.long.byte 0x00 19.--23. 1. "INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 " hexmask.long.byte 0x00 11.--15. 1. "INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 " hexmask.long.byte 0x00 3.--7. 1. "INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 " group.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" hexmask.long.byte 0x00 27.--31. 1. "INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 " hexmask.long.byte 0x00 19.--23. 1. "INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 " hexmask.long.byte 0x00 11.--15. 1. "INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 " hexmask.long.byte 0x00 3.--7. 1. "INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 " else rgroup.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" rgroup.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" rgroup.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" rgroup.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" rgroup.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" rgroup.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" rgroup.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" rgroup.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B) group.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hexmask.long.byte 0x00 27.--31. 1. "INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 " hexmask.long.byte 0x00 19.--23. 1. "INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 " hexmask.long.byte 0x00 11.--15. 1. "INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 " hexmask.long.byte 0x00 3.--7. 1. "INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 " group.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hexmask.long.byte 0x00 27.--31. 1. "INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 " hexmask.long.byte 0x00 19.--23. 1. "INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 " hexmask.long.byte 0x00 11.--15. 1. "INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 " hexmask.long.byte 0x00 3.--7. 1. "INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 " group.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hexmask.long.byte 0x00 27.--31. 1. "INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 " hexmask.long.byte 0x00 19.--23. 1. "INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 " hexmask.long.byte 0x00 11.--15. 1. "INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 " hexmask.long.byte 0x00 3.--7. 1. "INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 " group.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hexmask.long.byte 0x00 27.--31. 1. "INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 " hexmask.long.byte 0x00 19.--23. 1. "INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 " hexmask.long.byte 0x00 11.--15. 1. "INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 " hexmask.long.byte 0x00 3.--7. 1. "INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 " group.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hexmask.long.byte 0x00 27.--31. 1. "INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 " hexmask.long.byte 0x00 19.--23. 1. "INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 " hexmask.long.byte 0x00 11.--15. 1. "INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 " hexmask.long.byte 0x00 3.--7. 1. "INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 " group.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hexmask.long.byte 0x00 27.--31. 1. "INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 " hexmask.long.byte 0x00 19.--23. 1. "INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 " hexmask.long.byte 0x00 11.--15. 1. "INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 " hexmask.long.byte 0x00 3.--7. 1. "INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 " group.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hexmask.long.byte 0x00 27.--31. 1. "INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 " hexmask.long.byte 0x00 19.--23. 1. "INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 " hexmask.long.byte 0x00 11.--15. 1. "INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 " hexmask.long.byte 0x00 3.--7. 1. "INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 " group.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" hexmask.long.byte 0x00 27.--31. 1. "INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 " hexmask.long.byte 0x00 19.--23. 1. "INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 " hexmask.long.byte 0x00 11.--15. 1. "INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 " hexmask.long.byte 0x00 3.--7. 1. "INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 " else rgroup.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" rgroup.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" rgroup.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" rgroup.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" rgroup.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" rgroup.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" rgroup.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" rgroup.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C) group.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hexmask.long.byte 0x00 27.--31. 1. "INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 " hexmask.long.byte 0x00 19.--23. 1. "INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 " hexmask.long.byte 0x00 11.--15. 1. "INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 " hexmask.long.byte 0x00 3.--7. 1. "INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 " group.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hexmask.long.byte 0x00 27.--31. 1. "INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 " hexmask.long.byte 0x00 19.--23. 1. "INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 " hexmask.long.byte 0x00 11.--15. 1. "INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 " hexmask.long.byte 0x00 3.--7. 1. "INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 " group.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hexmask.long.byte 0x00 27.--31. 1. "INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 " hexmask.long.byte 0x00 19.--23. 1. "INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 " hexmask.long.byte 0x00 11.--15. 1. "INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 " hexmask.long.byte 0x00 3.--7. 1. "INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 " group.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hexmask.long.byte 0x00 27.--31. 1. "INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 " hexmask.long.byte 0x00 19.--23. 1. "INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 " hexmask.long.byte 0x00 11.--15. 1. "INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 " hexmask.long.byte 0x00 3.--7. 1. "INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 " group.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hexmask.long.byte 0x00 27.--31. 1. "INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 " hexmask.long.byte 0x00 19.--23. 1. "INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 " hexmask.long.byte 0x00 11.--15. 1. "INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 " hexmask.long.byte 0x00 3.--7. 1. "INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 " group.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hexmask.long.byte 0x00 27.--31. 1. "INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 " hexmask.long.byte 0x00 19.--23. 1. "INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 " hexmask.long.byte 0x00 11.--15. 1. "INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 " hexmask.long.byte 0x00 3.--7. 1. "INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 " group.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hexmask.long.byte 0x00 27.--31. 1. "INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 " hexmask.long.byte 0x00 19.--23. 1. "INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 " hexmask.long.byte 0x00 11.--15. 1. "INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 " hexmask.long.byte 0x00 3.--7. 1. "INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 " group.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" hexmask.long.byte 0x00 27.--31. 1. "INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 " hexmask.long.byte 0x00 19.--23. 1. "INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 " hexmask.long.byte 0x00 11.--15. 1. "INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 " hexmask.long.byte 0x00 3.--7. 1. "INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 " else rgroup.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" rgroup.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" rgroup.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" rgroup.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" rgroup.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" rgroup.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" rgroup.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" rgroup.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D) group.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hexmask.long.byte 0x00 27.--31. 1. "INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 " hexmask.long.byte 0x00 19.--23. 1. "INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 " hexmask.long.byte 0x00 11.--15. 1. "INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 " hexmask.long.byte 0x00 3.--7. 1. "INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 " group.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hexmask.long.byte 0x00 27.--31. 1. "INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 " hexmask.long.byte 0x00 19.--23. 1. "INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 " hexmask.long.byte 0x00 11.--15. 1. "INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 " hexmask.long.byte 0x00 3.--7. 1. "INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 " group.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hexmask.long.byte 0x00 27.--31. 1. "INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 " hexmask.long.byte 0x00 19.--23. 1. "INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 " hexmask.long.byte 0x00 11.--15. 1. "INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 " hexmask.long.byte 0x00 3.--7. 1. "INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 " group.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hexmask.long.byte 0x00 27.--31. 1. "INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 " hexmask.long.byte 0x00 19.--23. 1. "INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 " hexmask.long.byte 0x00 11.--15. 1. "INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 " hexmask.long.byte 0x00 3.--7. 1. "INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 " group.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hexmask.long.byte 0x00 27.--31. 1. "INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 " hexmask.long.byte 0x00 19.--23. 1. "INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 " hexmask.long.byte 0x00 11.--15. 1. "INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 " hexmask.long.byte 0x00 3.--7. 1. "INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 " group.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hexmask.long.byte 0x00 27.--31. 1. "INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 " hexmask.long.byte 0x00 19.--23. 1. "INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 " hexmask.long.byte 0x00 11.--15. 1. "INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 " hexmask.long.byte 0x00 3.--7. 1. "INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 " group.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hexmask.long.byte 0x00 27.--31. 1. "INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 " hexmask.long.byte 0x00 19.--23. 1. "INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 " hexmask.long.byte 0x00 11.--15. 1. "INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 " hexmask.long.byte 0x00 3.--7. 1. "INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 " group.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" hexmask.long.byte 0x00 27.--31. 1. "INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 " hexmask.long.byte 0x00 19.--23. 1. "INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 " hexmask.long.byte 0x00 11.--15. 1. "INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 " hexmask.long.byte 0x00 3.--7. 1. "INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 " else rgroup.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" rgroup.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" rgroup.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" rgroup.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" rgroup.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" rgroup.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" rgroup.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" rgroup.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E) group.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hexmask.long.byte 0x00 27.--31. 1. "INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 " hexmask.long.byte 0x00 19.--23. 1. "INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 " hexmask.long.byte 0x00 11.--15. 1. "INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 " hexmask.long.byte 0x00 3.--7. 1. "INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 " group.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hexmask.long.byte 0x00 27.--31. 1. "INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 " hexmask.long.byte 0x00 19.--23. 1. "INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 " hexmask.long.byte 0x00 11.--15. 1. "INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 " hexmask.long.byte 0x00 3.--7. 1. "INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 " group.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hexmask.long.byte 0x00 27.--31. 1. "INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 " hexmask.long.byte 0x00 19.--23. 1. "INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 " hexmask.long.byte 0x00 11.--15. 1. "INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 " hexmask.long.byte 0x00 3.--7. 1. "INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 " group.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hexmask.long.byte 0x00 27.--31. 1. "INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 " hexmask.long.byte 0x00 19.--23. 1. "INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 " hexmask.long.byte 0x00 11.--15. 1. "INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 " hexmask.long.byte 0x00 3.--7. 1. "INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 " group.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hexmask.long.byte 0x00 27.--31. 1. "INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 " hexmask.long.byte 0x00 19.--23. 1. "INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 " hexmask.long.byte 0x00 11.--15. 1. "INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 " hexmask.long.byte 0x00 3.--7. 1. "INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 " group.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hexmask.long.byte 0x00 27.--31. 1. "INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 " hexmask.long.byte 0x00 19.--23. 1. "INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 " hexmask.long.byte 0x00 11.--15. 1. "INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 " hexmask.long.byte 0x00 3.--7. 1. "INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 " group.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hexmask.long.byte 0x00 27.--31. 1. "INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 " hexmask.long.byte 0x00 19.--23. 1. "INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 " hexmask.long.byte 0x00 11.--15. 1. "INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 " hexmask.long.byte 0x00 3.--7. 1. "INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 " group.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" hexmask.long.byte 0x00 27.--31. 1. "INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 " hexmask.long.byte 0x00 19.--23. 1. "INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 " hexmask.long.byte 0x00 11.--15. 1. "INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 " hexmask.long.byte 0x00 3.--7. 1. "INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 " else rgroup.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" rgroup.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" rgroup.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" rgroup.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" rgroup.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" rgroup.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" rgroup.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" rgroup.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" endif tree.end tree "Configuration Registers" if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1) group.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" rgroup.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2) group.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" rgroup.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3) group.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" rgroup.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4) group.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" rgroup.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5) group.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" rgroup.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6) group.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" rgroup.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7) group.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" rgroup.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8) group.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" rgroup.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9) group.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" rgroup.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA) group.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" rgroup.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB) group.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" rgroup.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC) group.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" rgroup.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD) group.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" rgroup.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE) group.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" rgroup.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF) group.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" rgroup.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10) group.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" rgroup.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11) group.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" rgroup.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12) group.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" rgroup.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13) group.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" rgroup.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14) group.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" rgroup.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15) group.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" rgroup.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16) group.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" rgroup.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17) group.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" rgroup.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18) group.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" rgroup.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19) group.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" rgroup.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A) group.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" rgroup.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B) group.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" rgroup.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C) group.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" rgroup.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D) group.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" rgroup.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" endif if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E) group.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" group.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" bitfld.long 0x00 31. "ICF15,Interrupt Configuration 15 (SPI)" "Level,Edge" bitfld.long 0x00 29. "ICF14,Interrupt Configuration 14 (SPI)" "Level,Edge" bitfld.long 0x00 27. "ICF13,Interrupt Configuration 13 (SPI)" "Level,Edge" newline bitfld.long 0x00 25. "ICF12,Interrupt Configuration 12 (SPI)" "Level,Edge" bitfld.long 0x00 23. "ICF11,Interrupt Configuration 11 (SPI)" "Level,Edge" bitfld.long 0x00 21. "ICF10,Interrupt Configuration 10 (SPI)" "Level,Edge" newline bitfld.long 0x00 19. "ICF9,Interrupt Configuration 9 (SPI)" "Level,Edge" bitfld.long 0x00 17. "ICF8,Interrupt Configuration 8 (SPI)" "Level,Edge" bitfld.long 0x00 15. "ICF7,Interrupt Configuration 7 (SPI)" "Level,Edge" newline bitfld.long 0x00 13. "ICF6,Interrupt Configuration 6 (SPI)" "Level,Edge" bitfld.long 0x00 11. "ICF5,Interrupt Configuration 5 (SPI)" "Level,Edge" bitfld.long 0x00 9. "ICF4,Interrupt Configuration 4 (SPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF3,Interrupt Configuration 3 (SPI)" "Level,Edge" bitfld.long 0x00 5. "ICF2,Interrupt Configuration 2 (SPI)" "Level,Edge" bitfld.long 0x00 3. "ICF1,Interrupt Configuration 1 (SPI)" "Level,Edge" newline bitfld.long 0x00 1. "ICF0,Interrupt Configuration 0 (SPI)" "Level,Edge" else rgroup.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" rgroup.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" endif tree.end tree "Interrupt Routing Registers" group.quad 0x6100++0x07 line.quad 0x00 "GICD_IROUTER32,Interrupt Routing Register 32" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6108++0x07 line.quad 0x00 "GICD_IROUTER33,Interrupt Routing Register 33" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6110++0x07 line.quad 0x00 "GICD_IROUTER34,Interrupt Routing Register 34" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6118++0x07 line.quad 0x00 "GICD_IROUTER35,Interrupt Routing Register 35" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6120++0x07 line.quad 0x00 "GICD_IROUTER36,Interrupt Routing Register 36" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6128++0x07 line.quad 0x00 "GICD_IROUTER37,Interrupt Routing Register 37" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6130++0x07 line.quad 0x00 "GICD_IROUTER38,Interrupt Routing Register 38" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6138++0x07 line.quad 0x00 "GICD_IROUTER39,Interrupt Routing Register 39" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6140++0x07 line.quad 0x00 "GICD_IROUTER40,Interrupt Routing Register 40" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6148++0x07 line.quad 0x00 "GICD_IROUTER41,Interrupt Routing Register 41" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6150++0x07 line.quad 0x00 "GICD_IROUTER42,Interrupt Routing Register 42" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6158++0x07 line.quad 0x00 "GICD_IROUTER43,Interrupt Routing Register 43" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6160++0x07 line.quad 0x00 "GICD_IROUTER44,Interrupt Routing Register 44" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6168++0x07 line.quad 0x00 "GICD_IROUTER45,Interrupt Routing Register 45" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6170++0x07 line.quad 0x00 "GICD_IROUTER46,Interrupt Routing Register 46" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6178++0x07 line.quad 0x00 "GICD_IROUTER47,Interrupt Routing Register 47" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6180++0x07 line.quad 0x00 "GICD_IROUTER48,Interrupt Routing Register 48" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6188++0x07 line.quad 0x00 "GICD_IROUTER49,Interrupt Routing Register 49" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6190++0x07 line.quad 0x00 "GICD_IROUTER50,Interrupt Routing Register 50" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6198++0x07 line.quad 0x00 "GICD_IROUTER51,Interrupt Routing Register 51" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61A0++0x07 line.quad 0x00 "GICD_IROUTER52,Interrupt Routing Register 52" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61A8++0x07 line.quad 0x00 "GICD_IROUTER53,Interrupt Routing Register 53" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61B0++0x07 line.quad 0x00 "GICD_IROUTER54,Interrupt Routing Register 54" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61B8++0x07 line.quad 0x00 "GICD_IROUTER55,Interrupt Routing Register 55" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61C0++0x07 line.quad 0x00 "GICD_IROUTER56,Interrupt Routing Register 56" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61C8++0x07 line.quad 0x00 "GICD_IROUTER57,Interrupt Routing Register 57" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61D0++0x07 line.quad 0x00 "GICD_IROUTER58,Interrupt Routing Register 58" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61D8++0x07 line.quad 0x00 "GICD_IROUTER59,Interrupt Routing Register 59" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61E0++0x07 line.quad 0x00 "GICD_IROUTER60,Interrupt Routing Register 60" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61E8++0x07 line.quad 0x00 "GICD_IROUTER61,Interrupt Routing Register 61" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61F0++0x07 line.quad 0x00 "GICD_IROUTER62,Interrupt Routing Register 62" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x61F8++0x07 line.quad 0x00 "GICD_IROUTER63,Interrupt Routing Register 63" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6200++0x07 line.quad 0x00 "GICD_IROUTER64,Interrupt Routing Register 64" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6208++0x07 line.quad 0x00 "GICD_IROUTER65,Interrupt Routing Register 65" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6210++0x07 line.quad 0x00 "GICD_IROUTER66,Interrupt Routing Register 66" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6218++0x07 line.quad 0x00 "GICD_IROUTER67,Interrupt Routing Register 67" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6220++0x07 line.quad 0x00 "GICD_IROUTER68,Interrupt Routing Register 68" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6228++0x07 line.quad 0x00 "GICD_IROUTER69,Interrupt Routing Register 69" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6230++0x07 line.quad 0x00 "GICD_IROUTER70,Interrupt Routing Register 70" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6238++0x07 line.quad 0x00 "GICD_IROUTER71,Interrupt Routing Register 71" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6240++0x07 line.quad 0x00 "GICD_IROUTER72,Interrupt Routing Register 72" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6248++0x07 line.quad 0x00 "GICD_IROUTER73,Interrupt Routing Register 73" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6250++0x07 line.quad 0x00 "GICD_IROUTER74,Interrupt Routing Register 74" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6258++0x07 line.quad 0x00 "GICD_IROUTER75,Interrupt Routing Register 75" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6260++0x07 line.quad 0x00 "GICD_IROUTER76,Interrupt Routing Register 76" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6268++0x07 line.quad 0x00 "GICD_IROUTER77,Interrupt Routing Register 77" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6270++0x07 line.quad 0x00 "GICD_IROUTER78,Interrupt Routing Register 78" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6278++0x07 line.quad 0x00 "GICD_IROUTER79,Interrupt Routing Register 79" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6280++0x07 line.quad 0x00 "GICD_IROUTER80,Interrupt Routing Register 80" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6288++0x07 line.quad 0x00 "GICD_IROUTER81,Interrupt Routing Register 81" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6290++0x07 line.quad 0x00 "GICD_IROUTER82,Interrupt Routing Register 82" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6298++0x07 line.quad 0x00 "GICD_IROUTER83,Interrupt Routing Register 83" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62A0++0x07 line.quad 0x00 "GICD_IROUTER84,Interrupt Routing Register 84" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62A8++0x07 line.quad 0x00 "GICD_IROUTER85,Interrupt Routing Register 85" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62B0++0x07 line.quad 0x00 "GICD_IROUTER86,Interrupt Routing Register 86" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62B8++0x07 line.quad 0x00 "GICD_IROUTER87,Interrupt Routing Register 87" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62C0++0x07 line.quad 0x00 "GICD_IROUTER88,Interrupt Routing Register 88" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62C8++0x07 line.quad 0x00 "GICD_IROUTER89,Interrupt Routing Register 89" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62D0++0x07 line.quad 0x00 "GICD_IROUTER90,Interrupt Routing Register 90" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62D8++0x07 line.quad 0x00 "GICD_IROUTER91,Interrupt Routing Register 91" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62E0++0x07 line.quad 0x00 "GICD_IROUTER92,Interrupt Routing Register 92" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62E8++0x07 line.quad 0x00 "GICD_IROUTER93,Interrupt Routing Register 93" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62F0++0x07 line.quad 0x00 "GICD_IROUTER94,Interrupt Routing Register 94" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x62F8++0x07 line.quad 0x00 "GICD_IROUTER95,Interrupt Routing Register 95" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6300++0x07 line.quad 0x00 "GICD_IROUTER96,Interrupt Routing Register 96" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6308++0x07 line.quad 0x00 "GICD_IROUTER97,Interrupt Routing Register 97" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6310++0x07 line.quad 0x00 "GICD_IROUTER98,Interrupt Routing Register 98" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6318++0x07 line.quad 0x00 "GICD_IROUTER99,Interrupt Routing Register 99" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6320++0x07 line.quad 0x00 "GICD_IROUTER100,Interrupt Routing Register 100" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6328++0x07 line.quad 0x00 "GICD_IROUTER101,Interrupt Routing Register 101" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6330++0x07 line.quad 0x00 "GICD_IROUTER102,Interrupt Routing Register 102" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6338++0x07 line.quad 0x00 "GICD_IROUTER103,Interrupt Routing Register 103" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6340++0x07 line.quad 0x00 "GICD_IROUTER104,Interrupt Routing Register 104" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6348++0x07 line.quad 0x00 "GICD_IROUTER105,Interrupt Routing Register 105" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6350++0x07 line.quad 0x00 "GICD_IROUTER106,Interrupt Routing Register 106" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6358++0x07 line.quad 0x00 "GICD_IROUTER107,Interrupt Routing Register 107" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6360++0x07 line.quad 0x00 "GICD_IROUTER108,Interrupt Routing Register 108" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6368++0x07 line.quad 0x00 "GICD_IROUTER109,Interrupt Routing Register 109" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6370++0x07 line.quad 0x00 "GICD_IROUTER110,Interrupt Routing Register 110" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6378++0x07 line.quad 0x00 "GICD_IROUTER111,Interrupt Routing Register 111" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6380++0x07 line.quad 0x00 "GICD_IROUTER112,Interrupt Routing Register 112" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6388++0x07 line.quad 0x00 "GICD_IROUTER113,Interrupt Routing Register 113" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6390++0x07 line.quad 0x00 "GICD_IROUTER114,Interrupt Routing Register 114" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6398++0x07 line.quad 0x00 "GICD_IROUTER115,Interrupt Routing Register 115" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63A0++0x07 line.quad 0x00 "GICD_IROUTER116,Interrupt Routing Register 116" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63A8++0x07 line.quad 0x00 "GICD_IROUTER117,Interrupt Routing Register 117" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63B0++0x07 line.quad 0x00 "GICD_IROUTER118,Interrupt Routing Register 118" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63B8++0x07 line.quad 0x00 "GICD_IROUTER119,Interrupt Routing Register 119" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63C0++0x07 line.quad 0x00 "GICD_IROUTER120,Interrupt Routing Register 120" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63C8++0x07 line.quad 0x00 "GICD_IROUTER121,Interrupt Routing Register 121" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63D0++0x07 line.quad 0x00 "GICD_IROUTER122,Interrupt Routing Register 122" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63D8++0x07 line.quad 0x00 "GICD_IROUTER123,Interrupt Routing Register 123" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63E0++0x07 line.quad 0x00 "GICD_IROUTER124,Interrupt Routing Register 124" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63E8++0x07 line.quad 0x00 "GICD_IROUTER125,Interrupt Routing Register 125" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63F0++0x07 line.quad 0x00 "GICD_IROUTER126,Interrupt Routing Register 126" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x63F8++0x07 line.quad 0x00 "GICD_IROUTER127,Interrupt Routing Register 127" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6400++0x07 line.quad 0x00 "GICD_IROUTER128,Interrupt Routing Register 128" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6408++0x07 line.quad 0x00 "GICD_IROUTER129,Interrupt Routing Register 129" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6410++0x07 line.quad 0x00 "GICD_IROUTER130,Interrupt Routing Register 130" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6418++0x07 line.quad 0x00 "GICD_IROUTER131,Interrupt Routing Register 131" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6420++0x07 line.quad 0x00 "GICD_IROUTER132,Interrupt Routing Register 132" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6428++0x07 line.quad 0x00 "GICD_IROUTER133,Interrupt Routing Register 133" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6430++0x07 line.quad 0x00 "GICD_IROUTER134,Interrupt Routing Register 134" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6438++0x07 line.quad 0x00 "GICD_IROUTER135,Interrupt Routing Register 135" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6440++0x07 line.quad 0x00 "GICD_IROUTER136,Interrupt Routing Register 136" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6448++0x07 line.quad 0x00 "GICD_IROUTER137,Interrupt Routing Register 137" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6450++0x07 line.quad 0x00 "GICD_IROUTER138,Interrupt Routing Register 138" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6458++0x07 line.quad 0x00 "GICD_IROUTER139,Interrupt Routing Register 139" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6460++0x07 line.quad 0x00 "GICD_IROUTER140,Interrupt Routing Register 140" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6468++0x07 line.quad 0x00 "GICD_IROUTER141,Interrupt Routing Register 141" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6470++0x07 line.quad 0x00 "GICD_IROUTER142,Interrupt Routing Register 142" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6478++0x07 line.quad 0x00 "GICD_IROUTER143,Interrupt Routing Register 143" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6480++0x07 line.quad 0x00 "GICD_IROUTER144,Interrupt Routing Register 144" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6488++0x07 line.quad 0x00 "GICD_IROUTER145,Interrupt Routing Register 145" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6490++0x07 line.quad 0x00 "GICD_IROUTER146,Interrupt Routing Register 146" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6498++0x07 line.quad 0x00 "GICD_IROUTER147,Interrupt Routing Register 147" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64A0++0x07 line.quad 0x00 "GICD_IROUTER148,Interrupt Routing Register 148" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64A8++0x07 line.quad 0x00 "GICD_IROUTER149,Interrupt Routing Register 149" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64B0++0x07 line.quad 0x00 "GICD_IROUTER150,Interrupt Routing Register 150" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64B8++0x07 line.quad 0x00 "GICD_IROUTER151,Interrupt Routing Register 151" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64C0++0x07 line.quad 0x00 "GICD_IROUTER152,Interrupt Routing Register 152" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64C8++0x07 line.quad 0x00 "GICD_IROUTER153,Interrupt Routing Register 153" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64D0++0x07 line.quad 0x00 "GICD_IROUTER154,Interrupt Routing Register 154" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64D8++0x07 line.quad 0x00 "GICD_IROUTER155,Interrupt Routing Register 155" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64E0++0x07 line.quad 0x00 "GICD_IROUTER156,Interrupt Routing Register 156" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64E8++0x07 line.quad 0x00 "GICD_IROUTER157,Interrupt Routing Register 157" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64F0++0x07 line.quad 0x00 "GICD_IROUTER158,Interrupt Routing Register 158" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x64F8++0x07 line.quad 0x00 "GICD_IROUTER159,Interrupt Routing Register 159" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6500++0x07 line.quad 0x00 "GICD_IROUTER160,Interrupt Routing Register 160" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6508++0x07 line.quad 0x00 "GICD_IROUTER161,Interrupt Routing Register 161" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6510++0x07 line.quad 0x00 "GICD_IROUTER162,Interrupt Routing Register 162" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6518++0x07 line.quad 0x00 "GICD_IROUTER163,Interrupt Routing Register 163" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6520++0x07 line.quad 0x00 "GICD_IROUTER164,Interrupt Routing Register 164" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6528++0x07 line.quad 0x00 "GICD_IROUTER165,Interrupt Routing Register 165" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6530++0x07 line.quad 0x00 "GICD_IROUTER166,Interrupt Routing Register 166" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6538++0x07 line.quad 0x00 "GICD_IROUTER167,Interrupt Routing Register 167" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6540++0x07 line.quad 0x00 "GICD_IROUTER168,Interrupt Routing Register 168" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6548++0x07 line.quad 0x00 "GICD_IROUTER169,Interrupt Routing Register 169" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6550++0x07 line.quad 0x00 "GICD_IROUTER170,Interrupt Routing Register 170" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6558++0x07 line.quad 0x00 "GICD_IROUTER171,Interrupt Routing Register 171" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6560++0x07 line.quad 0x00 "GICD_IROUTER172,Interrupt Routing Register 172" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6568++0x07 line.quad 0x00 "GICD_IROUTER173,Interrupt Routing Register 173" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6570++0x07 line.quad 0x00 "GICD_IROUTER174,Interrupt Routing Register 174" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6578++0x07 line.quad 0x00 "GICD_IROUTER175,Interrupt Routing Register 175" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6580++0x07 line.quad 0x00 "GICD_IROUTER176,Interrupt Routing Register 176" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6588++0x07 line.quad 0x00 "GICD_IROUTER177,Interrupt Routing Register 177" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6590++0x07 line.quad 0x00 "GICD_IROUTER178,Interrupt Routing Register 178" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6598++0x07 line.quad 0x00 "GICD_IROUTER179,Interrupt Routing Register 179" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65A0++0x07 line.quad 0x00 "GICD_IROUTER180,Interrupt Routing Register 180" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65A8++0x07 line.quad 0x00 "GICD_IROUTER181,Interrupt Routing Register 181" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65B0++0x07 line.quad 0x00 "GICD_IROUTER182,Interrupt Routing Register 182" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65B8++0x07 line.quad 0x00 "GICD_IROUTER183,Interrupt Routing Register 183" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65C0++0x07 line.quad 0x00 "GICD_IROUTER184,Interrupt Routing Register 184" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65C8++0x07 line.quad 0x00 "GICD_IROUTER185,Interrupt Routing Register 185" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65D0++0x07 line.quad 0x00 "GICD_IROUTER186,Interrupt Routing Register 186" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65D8++0x07 line.quad 0x00 "GICD_IROUTER187,Interrupt Routing Register 187" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65E0++0x07 line.quad 0x00 "GICD_IROUTER188,Interrupt Routing Register 188" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65E8++0x07 line.quad 0x00 "GICD_IROUTER189,Interrupt Routing Register 189" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65F0++0x07 line.quad 0x00 "GICD_IROUTER190,Interrupt Routing Register 190" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x65F8++0x07 line.quad 0x00 "GICD_IROUTER191,Interrupt Routing Register 191" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6600++0x07 line.quad 0x00 "GICD_IROUTER192,Interrupt Routing Register 192" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6608++0x07 line.quad 0x00 "GICD_IROUTER193,Interrupt Routing Register 193" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6610++0x07 line.quad 0x00 "GICD_IROUTER194,Interrupt Routing Register 194" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6618++0x07 line.quad 0x00 "GICD_IROUTER195,Interrupt Routing Register 195" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6620++0x07 line.quad 0x00 "GICD_IROUTER196,Interrupt Routing Register 196" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6628++0x07 line.quad 0x00 "GICD_IROUTER197,Interrupt Routing Register 197" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6630++0x07 line.quad 0x00 "GICD_IROUTER198,Interrupt Routing Register 198" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6638++0x07 line.quad 0x00 "GICD_IROUTER199,Interrupt Routing Register 199" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6640++0x07 line.quad 0x00 "GICD_IROUTER200,Interrupt Routing Register 200" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6648++0x07 line.quad 0x00 "GICD_IROUTER201,Interrupt Routing Register 201" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6650++0x07 line.quad 0x00 "GICD_IROUTER202,Interrupt Routing Register 202" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6658++0x07 line.quad 0x00 "GICD_IROUTER203,Interrupt Routing Register 203" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6660++0x07 line.quad 0x00 "GICD_IROUTER204,Interrupt Routing Register 204" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6668++0x07 line.quad 0x00 "GICD_IROUTER205,Interrupt Routing Register 205" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6670++0x07 line.quad 0x00 "GICD_IROUTER206,Interrupt Routing Register 206" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6678++0x07 line.quad 0x00 "GICD_IROUTER207,Interrupt Routing Register 207" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6680++0x07 line.quad 0x00 "GICD_IROUTER208,Interrupt Routing Register 208" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6688++0x07 line.quad 0x00 "GICD_IROUTER209,Interrupt Routing Register 209" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6690++0x07 line.quad 0x00 "GICD_IROUTER210,Interrupt Routing Register 210" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6698++0x07 line.quad 0x00 "GICD_IROUTER211,Interrupt Routing Register 211" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66A0++0x07 line.quad 0x00 "GICD_IROUTER212,Interrupt Routing Register 212" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66A8++0x07 line.quad 0x00 "GICD_IROUTER213,Interrupt Routing Register 213" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66B0++0x07 line.quad 0x00 "GICD_IROUTER214,Interrupt Routing Register 214" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66B8++0x07 line.quad 0x00 "GICD_IROUTER215,Interrupt Routing Register 215" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66C0++0x07 line.quad 0x00 "GICD_IROUTER216,Interrupt Routing Register 216" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66C8++0x07 line.quad 0x00 "GICD_IROUTER217,Interrupt Routing Register 217" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66D0++0x07 line.quad 0x00 "GICD_IROUTER218,Interrupt Routing Register 218" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66D8++0x07 line.quad 0x00 "GICD_IROUTER219,Interrupt Routing Register 219" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66E0++0x07 line.quad 0x00 "GICD_IROUTER220,Interrupt Routing Register 220" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66E8++0x07 line.quad 0x00 "GICD_IROUTER221,Interrupt Routing Register 221" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66F0++0x07 line.quad 0x00 "GICD_IROUTER222,Interrupt Routing Register 222" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x66F8++0x07 line.quad 0x00 "GICD_IROUTER223,Interrupt Routing Register 223" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6700++0x07 line.quad 0x00 "GICD_IROUTER224,Interrupt Routing Register 224" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6708++0x07 line.quad 0x00 "GICD_IROUTER225,Interrupt Routing Register 225" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6710++0x07 line.quad 0x00 "GICD_IROUTER226,Interrupt Routing Register 226" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6718++0x07 line.quad 0x00 "GICD_IROUTER227,Interrupt Routing Register 227" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6720++0x07 line.quad 0x00 "GICD_IROUTER228,Interrupt Routing Register 228" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6728++0x07 line.quad 0x00 "GICD_IROUTER229,Interrupt Routing Register 229" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6730++0x07 line.quad 0x00 "GICD_IROUTER230,Interrupt Routing Register 230" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6738++0x07 line.quad 0x00 "GICD_IROUTER231,Interrupt Routing Register 231" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6740++0x07 line.quad 0x00 "GICD_IROUTER232,Interrupt Routing Register 232" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6748++0x07 line.quad 0x00 "GICD_IROUTER233,Interrupt Routing Register 233" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6750++0x07 line.quad 0x00 "GICD_IROUTER234,Interrupt Routing Register 234" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6758++0x07 line.quad 0x00 "GICD_IROUTER235,Interrupt Routing Register 235" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6760++0x07 line.quad 0x00 "GICD_IROUTER236,Interrupt Routing Register 236" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6768++0x07 line.quad 0x00 "GICD_IROUTER237,Interrupt Routing Register 237" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6770++0x07 line.quad 0x00 "GICD_IROUTER238,Interrupt Routing Register 238" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6778++0x07 line.quad 0x00 "GICD_IROUTER239,Interrupt Routing Register 239" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6780++0x07 line.quad 0x00 "GICD_IROUTER240,Interrupt Routing Register 240" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6788++0x07 line.quad 0x00 "GICD_IROUTER241,Interrupt Routing Register 241" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6790++0x07 line.quad 0x00 "GICD_IROUTER242,Interrupt Routing Register 242" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6798++0x07 line.quad 0x00 "GICD_IROUTER243,Interrupt Routing Register 243" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67A0++0x07 line.quad 0x00 "GICD_IROUTER244,Interrupt Routing Register 244" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67A8++0x07 line.quad 0x00 "GICD_IROUTER245,Interrupt Routing Register 245" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67B0++0x07 line.quad 0x00 "GICD_IROUTER246,Interrupt Routing Register 246" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67B8++0x07 line.quad 0x00 "GICD_IROUTER247,Interrupt Routing Register 247" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67C0++0x07 line.quad 0x00 "GICD_IROUTER248,Interrupt Routing Register 248" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67C8++0x07 line.quad 0x00 "GICD_IROUTER249,Interrupt Routing Register 249" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67D0++0x07 line.quad 0x00 "GICD_IROUTER250,Interrupt Routing Register 250" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67D8++0x07 line.quad 0x00 "GICD_IROUTER251,Interrupt Routing Register 251" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67E0++0x07 line.quad 0x00 "GICD_IROUTER252,Interrupt Routing Register 252" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67E8++0x07 line.quad 0x00 "GICD_IROUTER253,Interrupt Routing Register 253" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67F0++0x07 line.quad 0x00 "GICD_IROUTER254,Interrupt Routing Register 254" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x67F8++0x07 line.quad 0x00 "GICD_IROUTER255,Interrupt Routing Register 255" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6800++0x07 line.quad 0x00 "GICD_IROUTER256,Interrupt Routing Register 256" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6808++0x07 line.quad 0x00 "GICD_IROUTER257,Interrupt Routing Register 257" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6810++0x07 line.quad 0x00 "GICD_IROUTER258,Interrupt Routing Register 258" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6818++0x07 line.quad 0x00 "GICD_IROUTER259,Interrupt Routing Register 259" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6820++0x07 line.quad 0x00 "GICD_IROUTER260,Interrupt Routing Register 260" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6828++0x07 line.quad 0x00 "GICD_IROUTER261,Interrupt Routing Register 261" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6830++0x07 line.quad 0x00 "GICD_IROUTER262,Interrupt Routing Register 262" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6838++0x07 line.quad 0x00 "GICD_IROUTER263,Interrupt Routing Register 263" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6840++0x07 line.quad 0x00 "GICD_IROUTER264,Interrupt Routing Register 264" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6848++0x07 line.quad 0x00 "GICD_IROUTER265,Interrupt Routing Register 265" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6850++0x07 line.quad 0x00 "GICD_IROUTER266,Interrupt Routing Register 266" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6858++0x07 line.quad 0x00 "GICD_IROUTER267,Interrupt Routing Register 267" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6860++0x07 line.quad 0x00 "GICD_IROUTER268,Interrupt Routing Register 268" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6868++0x07 line.quad 0x00 "GICD_IROUTER269,Interrupt Routing Register 269" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6870++0x07 line.quad 0x00 "GICD_IROUTER270,Interrupt Routing Register 270" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6878++0x07 line.quad 0x00 "GICD_IROUTER271,Interrupt Routing Register 271" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6880++0x07 line.quad 0x00 "GICD_IROUTER272,Interrupt Routing Register 272" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6888++0x07 line.quad 0x00 "GICD_IROUTER273,Interrupt Routing Register 273" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6890++0x07 line.quad 0x00 "GICD_IROUTER274,Interrupt Routing Register 274" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6898++0x07 line.quad 0x00 "GICD_IROUTER275,Interrupt Routing Register 275" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68A0++0x07 line.quad 0x00 "GICD_IROUTER276,Interrupt Routing Register 276" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68A8++0x07 line.quad 0x00 "GICD_IROUTER277,Interrupt Routing Register 277" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68B0++0x07 line.quad 0x00 "GICD_IROUTER278,Interrupt Routing Register 278" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68B8++0x07 line.quad 0x00 "GICD_IROUTER279,Interrupt Routing Register 279" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68C0++0x07 line.quad 0x00 "GICD_IROUTER280,Interrupt Routing Register 280" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68C8++0x07 line.quad 0x00 "GICD_IROUTER281,Interrupt Routing Register 281" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68D0++0x07 line.quad 0x00 "GICD_IROUTER282,Interrupt Routing Register 282" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68D8++0x07 line.quad 0x00 "GICD_IROUTER283,Interrupt Routing Register 283" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68E0++0x07 line.quad 0x00 "GICD_IROUTER284,Interrupt Routing Register 284" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68E8++0x07 line.quad 0x00 "GICD_IROUTER285,Interrupt Routing Register 285" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68F0++0x07 line.quad 0x00 "GICD_IROUTER286,Interrupt Routing Register 286" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x68F8++0x07 line.quad 0x00 "GICD_IROUTER287,Interrupt Routing Register 287" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6900++0x07 line.quad 0x00 "GICD_IROUTER288,Interrupt Routing Register 288" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6908++0x07 line.quad 0x00 "GICD_IROUTER289,Interrupt Routing Register 289" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6910++0x07 line.quad 0x00 "GICD_IROUTER290,Interrupt Routing Register 290" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6918++0x07 line.quad 0x00 "GICD_IROUTER291,Interrupt Routing Register 291" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6920++0x07 line.quad 0x00 "GICD_IROUTER292,Interrupt Routing Register 292" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6928++0x07 line.quad 0x00 "GICD_IROUTER293,Interrupt Routing Register 293" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6930++0x07 line.quad 0x00 "GICD_IROUTER294,Interrupt Routing Register 294" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6938++0x07 line.quad 0x00 "GICD_IROUTER295,Interrupt Routing Register 295" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6940++0x07 line.quad 0x00 "GICD_IROUTER296,Interrupt Routing Register 296" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6948++0x07 line.quad 0x00 "GICD_IROUTER297,Interrupt Routing Register 297" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6950++0x07 line.quad 0x00 "GICD_IROUTER298,Interrupt Routing Register 298" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6958++0x07 line.quad 0x00 "GICD_IROUTER299,Interrupt Routing Register 299" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6960++0x07 line.quad 0x00 "GICD_IROUTER300,Interrupt Routing Register 300" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6968++0x07 line.quad 0x00 "GICD_IROUTER301,Interrupt Routing Register 301" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6970++0x07 line.quad 0x00 "GICD_IROUTER302,Interrupt Routing Register 302" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6978++0x07 line.quad 0x00 "GICD_IROUTER303,Interrupt Routing Register 303" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6980++0x07 line.quad 0x00 "GICD_IROUTER304,Interrupt Routing Register 304" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6988++0x07 line.quad 0x00 "GICD_IROUTER305,Interrupt Routing Register 305" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6990++0x07 line.quad 0x00 "GICD_IROUTER306,Interrupt Routing Register 306" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6998++0x07 line.quad 0x00 "GICD_IROUTER307,Interrupt Routing Register 307" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69A0++0x07 line.quad 0x00 "GICD_IROUTER308,Interrupt Routing Register 308" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69A8++0x07 line.quad 0x00 "GICD_IROUTER309,Interrupt Routing Register 309" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69B0++0x07 line.quad 0x00 "GICD_IROUTER310,Interrupt Routing Register 310" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69B8++0x07 line.quad 0x00 "GICD_IROUTER311,Interrupt Routing Register 311" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69C0++0x07 line.quad 0x00 "GICD_IROUTER312,Interrupt Routing Register 312" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69C8++0x07 line.quad 0x00 "GICD_IROUTER313,Interrupt Routing Register 313" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69D0++0x07 line.quad 0x00 "GICD_IROUTER314,Interrupt Routing Register 314" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69D8++0x07 line.quad 0x00 "GICD_IROUTER315,Interrupt Routing Register 315" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69E0++0x07 line.quad 0x00 "GICD_IROUTER316,Interrupt Routing Register 316" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69E8++0x07 line.quad 0x00 "GICD_IROUTER317,Interrupt Routing Register 317" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69F0++0x07 line.quad 0x00 "GICD_IROUTER318,Interrupt Routing Register 318" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x69F8++0x07 line.quad 0x00 "GICD_IROUTER319,Interrupt Routing Register 319" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A00++0x07 line.quad 0x00 "GICD_IROUTER320,Interrupt Routing Register 320" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A08++0x07 line.quad 0x00 "GICD_IROUTER321,Interrupt Routing Register 321" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A10++0x07 line.quad 0x00 "GICD_IROUTER322,Interrupt Routing Register 322" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A18++0x07 line.quad 0x00 "GICD_IROUTER323,Interrupt Routing Register 323" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A20++0x07 line.quad 0x00 "GICD_IROUTER324,Interrupt Routing Register 324" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A28++0x07 line.quad 0x00 "GICD_IROUTER325,Interrupt Routing Register 325" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A30++0x07 line.quad 0x00 "GICD_IROUTER326,Interrupt Routing Register 326" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A38++0x07 line.quad 0x00 "GICD_IROUTER327,Interrupt Routing Register 327" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A40++0x07 line.quad 0x00 "GICD_IROUTER328,Interrupt Routing Register 328" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A48++0x07 line.quad 0x00 "GICD_IROUTER329,Interrupt Routing Register 329" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A50++0x07 line.quad 0x00 "GICD_IROUTER330,Interrupt Routing Register 330" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A58++0x07 line.quad 0x00 "GICD_IROUTER331,Interrupt Routing Register 331" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A60++0x07 line.quad 0x00 "GICD_IROUTER332,Interrupt Routing Register 332" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A68++0x07 line.quad 0x00 "GICD_IROUTER333,Interrupt Routing Register 333" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A70++0x07 line.quad 0x00 "GICD_IROUTER334,Interrupt Routing Register 334" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A78++0x07 line.quad 0x00 "GICD_IROUTER335,Interrupt Routing Register 335" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A80++0x07 line.quad 0x00 "GICD_IROUTER336,Interrupt Routing Register 336" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A88++0x07 line.quad 0x00 "GICD_IROUTER337,Interrupt Routing Register 337" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A90++0x07 line.quad 0x00 "GICD_IROUTER338,Interrupt Routing Register 338" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6A98++0x07 line.quad 0x00 "GICD_IROUTER339,Interrupt Routing Register 339" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AA0++0x07 line.quad 0x00 "GICD_IROUTER340,Interrupt Routing Register 340" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AA8++0x07 line.quad 0x00 "GICD_IROUTER341,Interrupt Routing Register 341" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AB0++0x07 line.quad 0x00 "GICD_IROUTER342,Interrupt Routing Register 342" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AB8++0x07 line.quad 0x00 "GICD_IROUTER343,Interrupt Routing Register 343" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AC0++0x07 line.quad 0x00 "GICD_IROUTER344,Interrupt Routing Register 344" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AC8++0x07 line.quad 0x00 "GICD_IROUTER345,Interrupt Routing Register 345" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AD0++0x07 line.quad 0x00 "GICD_IROUTER346,Interrupt Routing Register 346" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AD8++0x07 line.quad 0x00 "GICD_IROUTER347,Interrupt Routing Register 347" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AE0++0x07 line.quad 0x00 "GICD_IROUTER348,Interrupt Routing Register 348" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AE8++0x07 line.quad 0x00 "GICD_IROUTER349,Interrupt Routing Register 349" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AF0++0x07 line.quad 0x00 "GICD_IROUTER350,Interrupt Routing Register 350" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6AF8++0x07 line.quad 0x00 "GICD_IROUTER351,Interrupt Routing Register 351" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B00++0x07 line.quad 0x00 "GICD_IROUTER352,Interrupt Routing Register 352" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B08++0x07 line.quad 0x00 "GICD_IROUTER353,Interrupt Routing Register 353" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B10++0x07 line.quad 0x00 "GICD_IROUTER354,Interrupt Routing Register 354" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B18++0x07 line.quad 0x00 "GICD_IROUTER355,Interrupt Routing Register 355" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B20++0x07 line.quad 0x00 "GICD_IROUTER356,Interrupt Routing Register 356" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B28++0x07 line.quad 0x00 "GICD_IROUTER357,Interrupt Routing Register 357" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B30++0x07 line.quad 0x00 "GICD_IROUTER358,Interrupt Routing Register 358" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B38++0x07 line.quad 0x00 "GICD_IROUTER359,Interrupt Routing Register 359" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B40++0x07 line.quad 0x00 "GICD_IROUTER360,Interrupt Routing Register 360" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B48++0x07 line.quad 0x00 "GICD_IROUTER361,Interrupt Routing Register 361" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B50++0x07 line.quad 0x00 "GICD_IROUTER362,Interrupt Routing Register 362" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B58++0x07 line.quad 0x00 "GICD_IROUTER363,Interrupt Routing Register 363" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B60++0x07 line.quad 0x00 "GICD_IROUTER364,Interrupt Routing Register 364" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B68++0x07 line.quad 0x00 "GICD_IROUTER365,Interrupt Routing Register 365" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B70++0x07 line.quad 0x00 "GICD_IROUTER366,Interrupt Routing Register 366" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B78++0x07 line.quad 0x00 "GICD_IROUTER367,Interrupt Routing Register 367" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B80++0x07 line.quad 0x00 "GICD_IROUTER368,Interrupt Routing Register 368" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B88++0x07 line.quad 0x00 "GICD_IROUTER369,Interrupt Routing Register 369" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B90++0x07 line.quad 0x00 "GICD_IROUTER370,Interrupt Routing Register 370" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6B98++0x07 line.quad 0x00 "GICD_IROUTER371,Interrupt Routing Register 371" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BA0++0x07 line.quad 0x00 "GICD_IROUTER372,Interrupt Routing Register 372" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BA8++0x07 line.quad 0x00 "GICD_IROUTER373,Interrupt Routing Register 373" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BB0++0x07 line.quad 0x00 "GICD_IROUTER374,Interrupt Routing Register 374" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BB8++0x07 line.quad 0x00 "GICD_IROUTER375,Interrupt Routing Register 375" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BC0++0x07 line.quad 0x00 "GICD_IROUTER376,Interrupt Routing Register 376" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BC8++0x07 line.quad 0x00 "GICD_IROUTER377,Interrupt Routing Register 377" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BD0++0x07 line.quad 0x00 "GICD_IROUTER378,Interrupt Routing Register 378" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BD8++0x07 line.quad 0x00 "GICD_IROUTER379,Interrupt Routing Register 379" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BE0++0x07 line.quad 0x00 "GICD_IROUTER380,Interrupt Routing Register 380" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BE8++0x07 line.quad 0x00 "GICD_IROUTER381,Interrupt Routing Register 381" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BF0++0x07 line.quad 0x00 "GICD_IROUTER382,Interrupt Routing Register 382" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6BF8++0x07 line.quad 0x00 "GICD_IROUTER383,Interrupt Routing Register 383" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C00++0x07 line.quad 0x00 "GICD_IROUTER384,Interrupt Routing Register 384" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C08++0x07 line.quad 0x00 "GICD_IROUTER385,Interrupt Routing Register 385" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C10++0x07 line.quad 0x00 "GICD_IROUTER386,Interrupt Routing Register 386" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C18++0x07 line.quad 0x00 "GICD_IROUTER387,Interrupt Routing Register 387" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C20++0x07 line.quad 0x00 "GICD_IROUTER388,Interrupt Routing Register 388" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C28++0x07 line.quad 0x00 "GICD_IROUTER389,Interrupt Routing Register 389" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C30++0x07 line.quad 0x00 "GICD_IROUTER390,Interrupt Routing Register 390" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C38++0x07 line.quad 0x00 "GICD_IROUTER391,Interrupt Routing Register 391" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C40++0x07 line.quad 0x00 "GICD_IROUTER392,Interrupt Routing Register 392" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C48++0x07 line.quad 0x00 "GICD_IROUTER393,Interrupt Routing Register 393" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C50++0x07 line.quad 0x00 "GICD_IROUTER394,Interrupt Routing Register 394" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C58++0x07 line.quad 0x00 "GICD_IROUTER395,Interrupt Routing Register 395" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C60++0x07 line.quad 0x00 "GICD_IROUTER396,Interrupt Routing Register 396" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C68++0x07 line.quad 0x00 "GICD_IROUTER397,Interrupt Routing Register 397" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C70++0x07 line.quad 0x00 "GICD_IROUTER398,Interrupt Routing Register 398" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C78++0x07 line.quad 0x00 "GICD_IROUTER399,Interrupt Routing Register 399" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C80++0x07 line.quad 0x00 "GICD_IROUTER400,Interrupt Routing Register 400" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C88++0x07 line.quad 0x00 "GICD_IROUTER401,Interrupt Routing Register 401" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C90++0x07 line.quad 0x00 "GICD_IROUTER402,Interrupt Routing Register 402" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6C98++0x07 line.quad 0x00 "GICD_IROUTER403,Interrupt Routing Register 403" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CA0++0x07 line.quad 0x00 "GICD_IROUTER404,Interrupt Routing Register 404" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CA8++0x07 line.quad 0x00 "GICD_IROUTER405,Interrupt Routing Register 405" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CB0++0x07 line.quad 0x00 "GICD_IROUTER406,Interrupt Routing Register 406" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CB8++0x07 line.quad 0x00 "GICD_IROUTER407,Interrupt Routing Register 407" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CC0++0x07 line.quad 0x00 "GICD_IROUTER408,Interrupt Routing Register 408" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CC8++0x07 line.quad 0x00 "GICD_IROUTER409,Interrupt Routing Register 409" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CD0++0x07 line.quad 0x00 "GICD_IROUTER410,Interrupt Routing Register 410" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CD8++0x07 line.quad 0x00 "GICD_IROUTER411,Interrupt Routing Register 411" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CE0++0x07 line.quad 0x00 "GICD_IROUTER412,Interrupt Routing Register 412" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CE8++0x07 line.quad 0x00 "GICD_IROUTER413,Interrupt Routing Register 413" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CF0++0x07 line.quad 0x00 "GICD_IROUTER414,Interrupt Routing Register 414" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6CF8++0x07 line.quad 0x00 "GICD_IROUTER415,Interrupt Routing Register 415" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D00++0x07 line.quad 0x00 "GICD_IROUTER416,Interrupt Routing Register 416" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D08++0x07 line.quad 0x00 "GICD_IROUTER417,Interrupt Routing Register 417" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D10++0x07 line.quad 0x00 "GICD_IROUTER418,Interrupt Routing Register 418" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D18++0x07 line.quad 0x00 "GICD_IROUTER419,Interrupt Routing Register 419" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D20++0x07 line.quad 0x00 "GICD_IROUTER420,Interrupt Routing Register 420" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D28++0x07 line.quad 0x00 "GICD_IROUTER421,Interrupt Routing Register 421" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D30++0x07 line.quad 0x00 "GICD_IROUTER422,Interrupt Routing Register 422" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D38++0x07 line.quad 0x00 "GICD_IROUTER423,Interrupt Routing Register 423" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D40++0x07 line.quad 0x00 "GICD_IROUTER424,Interrupt Routing Register 424" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D48++0x07 line.quad 0x00 "GICD_IROUTER425,Interrupt Routing Register 425" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D50++0x07 line.quad 0x00 "GICD_IROUTER426,Interrupt Routing Register 426" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D58++0x07 line.quad 0x00 "GICD_IROUTER427,Interrupt Routing Register 427" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D60++0x07 line.quad 0x00 "GICD_IROUTER428,Interrupt Routing Register 428" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D68++0x07 line.quad 0x00 "GICD_IROUTER429,Interrupt Routing Register 429" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D70++0x07 line.quad 0x00 "GICD_IROUTER430,Interrupt Routing Register 430" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D78++0x07 line.quad 0x00 "GICD_IROUTER431,Interrupt Routing Register 431" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D80++0x07 line.quad 0x00 "GICD_IROUTER432,Interrupt Routing Register 432" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D88++0x07 line.quad 0x00 "GICD_IROUTER433,Interrupt Routing Register 433" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D90++0x07 line.quad 0x00 "GICD_IROUTER434,Interrupt Routing Register 434" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6D98++0x07 line.quad 0x00 "GICD_IROUTER435,Interrupt Routing Register 435" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DA0++0x07 line.quad 0x00 "GICD_IROUTER436,Interrupt Routing Register 436" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DA8++0x07 line.quad 0x00 "GICD_IROUTER437,Interrupt Routing Register 437" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DB0++0x07 line.quad 0x00 "GICD_IROUTER438,Interrupt Routing Register 438" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DB8++0x07 line.quad 0x00 "GICD_IROUTER439,Interrupt Routing Register 439" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DC0++0x07 line.quad 0x00 "GICD_IROUTER440,Interrupt Routing Register 440" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DC8++0x07 line.quad 0x00 "GICD_IROUTER441,Interrupt Routing Register 441" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DD0++0x07 line.quad 0x00 "GICD_IROUTER442,Interrupt Routing Register 442" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DD8++0x07 line.quad 0x00 "GICD_IROUTER443,Interrupt Routing Register 443" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DE0++0x07 line.quad 0x00 "GICD_IROUTER444,Interrupt Routing Register 444" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DE8++0x07 line.quad 0x00 "GICD_IROUTER445,Interrupt Routing Register 445" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DF0++0x07 line.quad 0x00 "GICD_IROUTER446,Interrupt Routing Register 446" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6DF8++0x07 line.quad 0x00 "GICD_IROUTER447,Interrupt Routing Register 447" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E00++0x07 line.quad 0x00 "GICD_IROUTER448,Interrupt Routing Register 448" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E08++0x07 line.quad 0x00 "GICD_IROUTER449,Interrupt Routing Register 449" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E10++0x07 line.quad 0x00 "GICD_IROUTER450,Interrupt Routing Register 450" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E18++0x07 line.quad 0x00 "GICD_IROUTER451,Interrupt Routing Register 451" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E20++0x07 line.quad 0x00 "GICD_IROUTER452,Interrupt Routing Register 452" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E28++0x07 line.quad 0x00 "GICD_IROUTER453,Interrupt Routing Register 453" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E30++0x07 line.quad 0x00 "GICD_IROUTER454,Interrupt Routing Register 454" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E38++0x07 line.quad 0x00 "GICD_IROUTER455,Interrupt Routing Register 455" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E40++0x07 line.quad 0x00 "GICD_IROUTER456,Interrupt Routing Register 456" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E48++0x07 line.quad 0x00 "GICD_IROUTER457,Interrupt Routing Register 457" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E50++0x07 line.quad 0x00 "GICD_IROUTER458,Interrupt Routing Register 458" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E58++0x07 line.quad 0x00 "GICD_IROUTER459,Interrupt Routing Register 459" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E60++0x07 line.quad 0x00 "GICD_IROUTER460,Interrupt Routing Register 460" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E68++0x07 line.quad 0x00 "GICD_IROUTER461,Interrupt Routing Register 461" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E70++0x07 line.quad 0x00 "GICD_IROUTER462,Interrupt Routing Register 462" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E78++0x07 line.quad 0x00 "GICD_IROUTER463,Interrupt Routing Register 463" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E80++0x07 line.quad 0x00 "GICD_IROUTER464,Interrupt Routing Register 464" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E88++0x07 line.quad 0x00 "GICD_IROUTER465,Interrupt Routing Register 465" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E90++0x07 line.quad 0x00 "GICD_IROUTER466,Interrupt Routing Register 466" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6E98++0x07 line.quad 0x00 "GICD_IROUTER467,Interrupt Routing Register 467" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6EA0++0x07 line.quad 0x00 "GICD_IROUTER468,Interrupt Routing Register 468" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6EA8++0x07 line.quad 0x00 "GICD_IROUTER469,Interrupt Routing Register 469" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6EB0++0x07 line.quad 0x00 "GICD_IROUTER470,Interrupt Routing Register 470" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6EB8++0x07 line.quad 0x00 "GICD_IROUTER471,Interrupt Routing Register 471" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6EC0++0x07 line.quad 0x00 "GICD_IROUTER472,Interrupt Routing Register 472" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6EC8++0x07 line.quad 0x00 "GICD_IROUTER473,Interrupt Routing Register 473" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6ED0++0x07 line.quad 0x00 "GICD_IROUTER474,Interrupt Routing Register 474" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6ED8++0x07 line.quad 0x00 "GICD_IROUTER475,Interrupt Routing Register 475" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6EE0++0x07 line.quad 0x00 "GICD_IROUTER476,Interrupt Routing Register 476" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6EE8++0x07 line.quad 0x00 "GICD_IROUTER477,Interrupt Routing Register 477" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6EF0++0x07 line.quad 0x00 "GICD_IROUTER478,Interrupt Routing Register 478" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6EF8++0x07 line.quad 0x00 "GICD_IROUTER479,Interrupt Routing Register 479" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F00++0x07 line.quad 0x00 "GICD_IROUTER480,Interrupt Routing Register 480" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F08++0x07 line.quad 0x00 "GICD_IROUTER481,Interrupt Routing Register 481" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F10++0x07 line.quad 0x00 "GICD_IROUTER482,Interrupt Routing Register 482" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F18++0x07 line.quad 0x00 "GICD_IROUTER483,Interrupt Routing Register 483" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F20++0x07 line.quad 0x00 "GICD_IROUTER484,Interrupt Routing Register 484" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F28++0x07 line.quad 0x00 "GICD_IROUTER485,Interrupt Routing Register 485" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F30++0x07 line.quad 0x00 "GICD_IROUTER486,Interrupt Routing Register 486" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F38++0x07 line.quad 0x00 "GICD_IROUTER487,Interrupt Routing Register 487" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F40++0x07 line.quad 0x00 "GICD_IROUTER488,Interrupt Routing Register 488" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F48++0x07 line.quad 0x00 "GICD_IROUTER489,Interrupt Routing Register 489" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F50++0x07 line.quad 0x00 "GICD_IROUTER490,Interrupt Routing Register 490" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F58++0x07 line.quad 0x00 "GICD_IROUTER491,Interrupt Routing Register 491" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F60++0x07 line.quad 0x00 "GICD_IROUTER492,Interrupt Routing Register 492" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F68++0x07 line.quad 0x00 "GICD_IROUTER493,Interrupt Routing Register 493" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F70++0x07 line.quad 0x00 "GICD_IROUTER494,Interrupt Routing Register 494" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F78++0x07 line.quad 0x00 "GICD_IROUTER495,Interrupt Routing Register 495" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F80++0x07 line.quad 0x00 "GICD_IROUTER496,Interrupt Routing Register 496" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F88++0x07 line.quad 0x00 "GICD_IROUTER497,Interrupt Routing Register 497" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F90++0x07 line.quad 0x00 "GICD_IROUTER498,Interrupt Routing Register 498" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6F98++0x07 line.quad 0x00 "GICD_IROUTER499,Interrupt Routing Register 499" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FA0++0x07 line.quad 0x00 "GICD_IROUTER500,Interrupt Routing Register 500" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FA8++0x07 line.quad 0x00 "GICD_IROUTER501,Interrupt Routing Register 501" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FB0++0x07 line.quad 0x00 "GICD_IROUTER502,Interrupt Routing Register 502" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FB8++0x07 line.quad 0x00 "GICD_IROUTER503,Interrupt Routing Register 503" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FC0++0x07 line.quad 0x00 "GICD_IROUTER504,Interrupt Routing Register 504" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FC8++0x07 line.quad 0x00 "GICD_IROUTER505,Interrupt Routing Register 505" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FD0++0x07 line.quad 0x00 "GICD_IROUTER506,Interrupt Routing Register 506" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FD8++0x07 line.quad 0x00 "GICD_IROUTER507,Interrupt Routing Register 507" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FE0++0x07 line.quad 0x00 "GICD_IROUTER508,Interrupt Routing Register 508" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FE8++0x07 line.quad 0x00 "GICD_IROUTER509,Interrupt Routing Register 509" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FF0++0x07 line.quad 0x00 "GICD_IROUTER510,Interrupt Routing Register 510" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x6FF8++0x07 line.quad 0x00 "GICD_IROUTER511,Interrupt Routing Register 511" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7000++0x07 line.quad 0x00 "GICD_IROUTER512,Interrupt Routing Register 512" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7008++0x07 line.quad 0x00 "GICD_IROUTER513,Interrupt Routing Register 513" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7010++0x07 line.quad 0x00 "GICD_IROUTER514,Interrupt Routing Register 514" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7018++0x07 line.quad 0x00 "GICD_IROUTER515,Interrupt Routing Register 515" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7020++0x07 line.quad 0x00 "GICD_IROUTER516,Interrupt Routing Register 516" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7028++0x07 line.quad 0x00 "GICD_IROUTER517,Interrupt Routing Register 517" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7030++0x07 line.quad 0x00 "GICD_IROUTER518,Interrupt Routing Register 518" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7038++0x07 line.quad 0x00 "GICD_IROUTER519,Interrupt Routing Register 519" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7040++0x07 line.quad 0x00 "GICD_IROUTER520,Interrupt Routing Register 520" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7048++0x07 line.quad 0x00 "GICD_IROUTER521,Interrupt Routing Register 521" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7050++0x07 line.quad 0x00 "GICD_IROUTER522,Interrupt Routing Register 522" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7058++0x07 line.quad 0x00 "GICD_IROUTER523,Interrupt Routing Register 523" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7060++0x07 line.quad 0x00 "GICD_IROUTER524,Interrupt Routing Register 524" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7068++0x07 line.quad 0x00 "GICD_IROUTER525,Interrupt Routing Register 525" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7070++0x07 line.quad 0x00 "GICD_IROUTER526,Interrupt Routing Register 526" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7078++0x07 line.quad 0x00 "GICD_IROUTER527,Interrupt Routing Register 527" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7080++0x07 line.quad 0x00 "GICD_IROUTER528,Interrupt Routing Register 528" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7088++0x07 line.quad 0x00 "GICD_IROUTER529,Interrupt Routing Register 529" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7090++0x07 line.quad 0x00 "GICD_IROUTER530,Interrupt Routing Register 530" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7098++0x07 line.quad 0x00 "GICD_IROUTER531,Interrupt Routing Register 531" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70A0++0x07 line.quad 0x00 "GICD_IROUTER532,Interrupt Routing Register 532" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70A8++0x07 line.quad 0x00 "GICD_IROUTER533,Interrupt Routing Register 533" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70B0++0x07 line.quad 0x00 "GICD_IROUTER534,Interrupt Routing Register 534" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70B8++0x07 line.quad 0x00 "GICD_IROUTER535,Interrupt Routing Register 535" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70C0++0x07 line.quad 0x00 "GICD_IROUTER536,Interrupt Routing Register 536" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70C8++0x07 line.quad 0x00 "GICD_IROUTER537,Interrupt Routing Register 537" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70D0++0x07 line.quad 0x00 "GICD_IROUTER538,Interrupt Routing Register 538" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70D8++0x07 line.quad 0x00 "GICD_IROUTER539,Interrupt Routing Register 539" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70E0++0x07 line.quad 0x00 "GICD_IROUTER540,Interrupt Routing Register 540" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70E8++0x07 line.quad 0x00 "GICD_IROUTER541,Interrupt Routing Register 541" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70F0++0x07 line.quad 0x00 "GICD_IROUTER542,Interrupt Routing Register 542" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x70F8++0x07 line.quad 0x00 "GICD_IROUTER543,Interrupt Routing Register 543" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7100++0x07 line.quad 0x00 "GICD_IROUTER544,Interrupt Routing Register 544" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7108++0x07 line.quad 0x00 "GICD_IROUTER545,Interrupt Routing Register 545" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7110++0x07 line.quad 0x00 "GICD_IROUTER546,Interrupt Routing Register 546" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7118++0x07 line.quad 0x00 "GICD_IROUTER547,Interrupt Routing Register 547" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7120++0x07 line.quad 0x00 "GICD_IROUTER548,Interrupt Routing Register 548" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7128++0x07 line.quad 0x00 "GICD_IROUTER549,Interrupt Routing Register 549" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7130++0x07 line.quad 0x00 "GICD_IROUTER550,Interrupt Routing Register 550" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7138++0x07 line.quad 0x00 "GICD_IROUTER551,Interrupt Routing Register 551" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7140++0x07 line.quad 0x00 "GICD_IROUTER552,Interrupt Routing Register 552" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7148++0x07 line.quad 0x00 "GICD_IROUTER553,Interrupt Routing Register 553" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7150++0x07 line.quad 0x00 "GICD_IROUTER554,Interrupt Routing Register 554" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7158++0x07 line.quad 0x00 "GICD_IROUTER555,Interrupt Routing Register 555" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7160++0x07 line.quad 0x00 "GICD_IROUTER556,Interrupt Routing Register 556" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7168++0x07 line.quad 0x00 "GICD_IROUTER557,Interrupt Routing Register 557" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7170++0x07 line.quad 0x00 "GICD_IROUTER558,Interrupt Routing Register 558" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7178++0x07 line.quad 0x00 "GICD_IROUTER559,Interrupt Routing Register 559" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7180++0x07 line.quad 0x00 "GICD_IROUTER560,Interrupt Routing Register 560" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7188++0x07 line.quad 0x00 "GICD_IROUTER561,Interrupt Routing Register 561" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7190++0x07 line.quad 0x00 "GICD_IROUTER562,Interrupt Routing Register 562" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7198++0x07 line.quad 0x00 "GICD_IROUTER563,Interrupt Routing Register 563" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71A0++0x07 line.quad 0x00 "GICD_IROUTER564,Interrupt Routing Register 564" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71A8++0x07 line.quad 0x00 "GICD_IROUTER565,Interrupt Routing Register 565" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71B0++0x07 line.quad 0x00 "GICD_IROUTER566,Interrupt Routing Register 566" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71B8++0x07 line.quad 0x00 "GICD_IROUTER567,Interrupt Routing Register 567" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71C0++0x07 line.quad 0x00 "GICD_IROUTER568,Interrupt Routing Register 568" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71C8++0x07 line.quad 0x00 "GICD_IROUTER569,Interrupt Routing Register 569" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71D0++0x07 line.quad 0x00 "GICD_IROUTER570,Interrupt Routing Register 570" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71D8++0x07 line.quad 0x00 "GICD_IROUTER571,Interrupt Routing Register 571" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71E0++0x07 line.quad 0x00 "GICD_IROUTER572,Interrupt Routing Register 572" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71E8++0x07 line.quad 0x00 "GICD_IROUTER573,Interrupt Routing Register 573" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71F0++0x07 line.quad 0x00 "GICD_IROUTER574,Interrupt Routing Register 574" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x71F8++0x07 line.quad 0x00 "GICD_IROUTER575,Interrupt Routing Register 575" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7200++0x07 line.quad 0x00 "GICD_IROUTER576,Interrupt Routing Register 576" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7208++0x07 line.quad 0x00 "GICD_IROUTER577,Interrupt Routing Register 577" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7210++0x07 line.quad 0x00 "GICD_IROUTER578,Interrupt Routing Register 578" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7218++0x07 line.quad 0x00 "GICD_IROUTER579,Interrupt Routing Register 579" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7220++0x07 line.quad 0x00 "GICD_IROUTER580,Interrupt Routing Register 580" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7228++0x07 line.quad 0x00 "GICD_IROUTER581,Interrupt Routing Register 581" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7230++0x07 line.quad 0x00 "GICD_IROUTER582,Interrupt Routing Register 582" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7238++0x07 line.quad 0x00 "GICD_IROUTER583,Interrupt Routing Register 583" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7240++0x07 line.quad 0x00 "GICD_IROUTER584,Interrupt Routing Register 584" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7248++0x07 line.quad 0x00 "GICD_IROUTER585,Interrupt Routing Register 585" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7250++0x07 line.quad 0x00 "GICD_IROUTER586,Interrupt Routing Register 586" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7258++0x07 line.quad 0x00 "GICD_IROUTER587,Interrupt Routing Register 587" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7260++0x07 line.quad 0x00 "GICD_IROUTER588,Interrupt Routing Register 588" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7268++0x07 line.quad 0x00 "GICD_IROUTER589,Interrupt Routing Register 589" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7270++0x07 line.quad 0x00 "GICD_IROUTER590,Interrupt Routing Register 590" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7278++0x07 line.quad 0x00 "GICD_IROUTER591,Interrupt Routing Register 591" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7280++0x07 line.quad 0x00 "GICD_IROUTER592,Interrupt Routing Register 592" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7288++0x07 line.quad 0x00 "GICD_IROUTER593,Interrupt Routing Register 593" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7290++0x07 line.quad 0x00 "GICD_IROUTER594,Interrupt Routing Register 594" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7298++0x07 line.quad 0x00 "GICD_IROUTER595,Interrupt Routing Register 595" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72A0++0x07 line.quad 0x00 "GICD_IROUTER596,Interrupt Routing Register 596" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72A8++0x07 line.quad 0x00 "GICD_IROUTER597,Interrupt Routing Register 597" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72B0++0x07 line.quad 0x00 "GICD_IROUTER598,Interrupt Routing Register 598" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72B8++0x07 line.quad 0x00 "GICD_IROUTER599,Interrupt Routing Register 599" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72C0++0x07 line.quad 0x00 "GICD_IROUTER600,Interrupt Routing Register 600" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72C8++0x07 line.quad 0x00 "GICD_IROUTER601,Interrupt Routing Register 601" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72D0++0x07 line.quad 0x00 "GICD_IROUTER602,Interrupt Routing Register 602" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72D8++0x07 line.quad 0x00 "GICD_IROUTER603,Interrupt Routing Register 603" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72E0++0x07 line.quad 0x00 "GICD_IROUTER604,Interrupt Routing Register 604" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72E8++0x07 line.quad 0x00 "GICD_IROUTER605,Interrupt Routing Register 605" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72F0++0x07 line.quad 0x00 "GICD_IROUTER606,Interrupt Routing Register 606" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x72F8++0x07 line.quad 0x00 "GICD_IROUTER607,Interrupt Routing Register 607" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7300++0x07 line.quad 0x00 "GICD_IROUTER608,Interrupt Routing Register 608" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7308++0x07 line.quad 0x00 "GICD_IROUTER609,Interrupt Routing Register 609" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7310++0x07 line.quad 0x00 "GICD_IROUTER610,Interrupt Routing Register 610" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7318++0x07 line.quad 0x00 "GICD_IROUTER611,Interrupt Routing Register 611" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7320++0x07 line.quad 0x00 "GICD_IROUTER612,Interrupt Routing Register 612" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7328++0x07 line.quad 0x00 "GICD_IROUTER613,Interrupt Routing Register 613" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7330++0x07 line.quad 0x00 "GICD_IROUTER614,Interrupt Routing Register 614" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7338++0x07 line.quad 0x00 "GICD_IROUTER615,Interrupt Routing Register 615" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7340++0x07 line.quad 0x00 "GICD_IROUTER616,Interrupt Routing Register 616" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7348++0x07 line.quad 0x00 "GICD_IROUTER617,Interrupt Routing Register 617" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7350++0x07 line.quad 0x00 "GICD_IROUTER618,Interrupt Routing Register 618" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7358++0x07 line.quad 0x00 "GICD_IROUTER619,Interrupt Routing Register 619" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7360++0x07 line.quad 0x00 "GICD_IROUTER620,Interrupt Routing Register 620" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7368++0x07 line.quad 0x00 "GICD_IROUTER621,Interrupt Routing Register 621" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7370++0x07 line.quad 0x00 "GICD_IROUTER622,Interrupt Routing Register 622" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7378++0x07 line.quad 0x00 "GICD_IROUTER623,Interrupt Routing Register 623" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7380++0x07 line.quad 0x00 "GICD_IROUTER624,Interrupt Routing Register 624" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7388++0x07 line.quad 0x00 "GICD_IROUTER625,Interrupt Routing Register 625" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7390++0x07 line.quad 0x00 "GICD_IROUTER626,Interrupt Routing Register 626" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7398++0x07 line.quad 0x00 "GICD_IROUTER627,Interrupt Routing Register 627" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73A0++0x07 line.quad 0x00 "GICD_IROUTER628,Interrupt Routing Register 628" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73A8++0x07 line.quad 0x00 "GICD_IROUTER629,Interrupt Routing Register 629" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73B0++0x07 line.quad 0x00 "GICD_IROUTER630,Interrupt Routing Register 630" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73B8++0x07 line.quad 0x00 "GICD_IROUTER631,Interrupt Routing Register 631" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73C0++0x07 line.quad 0x00 "GICD_IROUTER632,Interrupt Routing Register 632" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73C8++0x07 line.quad 0x00 "GICD_IROUTER633,Interrupt Routing Register 633" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73D0++0x07 line.quad 0x00 "GICD_IROUTER634,Interrupt Routing Register 634" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73D8++0x07 line.quad 0x00 "GICD_IROUTER635,Interrupt Routing Register 635" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73E0++0x07 line.quad 0x00 "GICD_IROUTER636,Interrupt Routing Register 636" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73E8++0x07 line.quad 0x00 "GICD_IROUTER637,Interrupt Routing Register 637" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73F0++0x07 line.quad 0x00 "GICD_IROUTER638,Interrupt Routing Register 638" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x73F8++0x07 line.quad 0x00 "GICD_IROUTER639,Interrupt Routing Register 639" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7400++0x07 line.quad 0x00 "GICD_IROUTER640,Interrupt Routing Register 640" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7408++0x07 line.quad 0x00 "GICD_IROUTER641,Interrupt Routing Register 641" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7410++0x07 line.quad 0x00 "GICD_IROUTER642,Interrupt Routing Register 642" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7418++0x07 line.quad 0x00 "GICD_IROUTER643,Interrupt Routing Register 643" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7420++0x07 line.quad 0x00 "GICD_IROUTER644,Interrupt Routing Register 644" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7428++0x07 line.quad 0x00 "GICD_IROUTER645,Interrupt Routing Register 645" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7430++0x07 line.quad 0x00 "GICD_IROUTER646,Interrupt Routing Register 646" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7438++0x07 line.quad 0x00 "GICD_IROUTER647,Interrupt Routing Register 647" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7440++0x07 line.quad 0x00 "GICD_IROUTER648,Interrupt Routing Register 648" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7448++0x07 line.quad 0x00 "GICD_IROUTER649,Interrupt Routing Register 649" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7450++0x07 line.quad 0x00 "GICD_IROUTER650,Interrupt Routing Register 650" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7458++0x07 line.quad 0x00 "GICD_IROUTER651,Interrupt Routing Register 651" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7460++0x07 line.quad 0x00 "GICD_IROUTER652,Interrupt Routing Register 652" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7468++0x07 line.quad 0x00 "GICD_IROUTER653,Interrupt Routing Register 653" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7470++0x07 line.quad 0x00 "GICD_IROUTER654,Interrupt Routing Register 654" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7478++0x07 line.quad 0x00 "GICD_IROUTER655,Interrupt Routing Register 655" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7480++0x07 line.quad 0x00 "GICD_IROUTER656,Interrupt Routing Register 656" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7488++0x07 line.quad 0x00 "GICD_IROUTER657,Interrupt Routing Register 657" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7490++0x07 line.quad 0x00 "GICD_IROUTER658,Interrupt Routing Register 658" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7498++0x07 line.quad 0x00 "GICD_IROUTER659,Interrupt Routing Register 659" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74A0++0x07 line.quad 0x00 "GICD_IROUTER660,Interrupt Routing Register 660" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74A8++0x07 line.quad 0x00 "GICD_IROUTER661,Interrupt Routing Register 661" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74B0++0x07 line.quad 0x00 "GICD_IROUTER662,Interrupt Routing Register 662" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74B8++0x07 line.quad 0x00 "GICD_IROUTER663,Interrupt Routing Register 663" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74C0++0x07 line.quad 0x00 "GICD_IROUTER664,Interrupt Routing Register 664" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74C8++0x07 line.quad 0x00 "GICD_IROUTER665,Interrupt Routing Register 665" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74D0++0x07 line.quad 0x00 "GICD_IROUTER666,Interrupt Routing Register 666" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74D8++0x07 line.quad 0x00 "GICD_IROUTER667,Interrupt Routing Register 667" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74E0++0x07 line.quad 0x00 "GICD_IROUTER668,Interrupt Routing Register 668" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74E8++0x07 line.quad 0x00 "GICD_IROUTER669,Interrupt Routing Register 669" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74F0++0x07 line.quad 0x00 "GICD_IROUTER670,Interrupt Routing Register 670" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x74F8++0x07 line.quad 0x00 "GICD_IROUTER671,Interrupt Routing Register 671" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7500++0x07 line.quad 0x00 "GICD_IROUTER672,Interrupt Routing Register 672" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7508++0x07 line.quad 0x00 "GICD_IROUTER673,Interrupt Routing Register 673" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7510++0x07 line.quad 0x00 "GICD_IROUTER674,Interrupt Routing Register 674" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7518++0x07 line.quad 0x00 "GICD_IROUTER675,Interrupt Routing Register 675" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7520++0x07 line.quad 0x00 "GICD_IROUTER676,Interrupt Routing Register 676" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7528++0x07 line.quad 0x00 "GICD_IROUTER677,Interrupt Routing Register 677" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7530++0x07 line.quad 0x00 "GICD_IROUTER678,Interrupt Routing Register 678" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7538++0x07 line.quad 0x00 "GICD_IROUTER679,Interrupt Routing Register 679" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7540++0x07 line.quad 0x00 "GICD_IROUTER680,Interrupt Routing Register 680" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7548++0x07 line.quad 0x00 "GICD_IROUTER681,Interrupt Routing Register 681" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7550++0x07 line.quad 0x00 "GICD_IROUTER682,Interrupt Routing Register 682" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7558++0x07 line.quad 0x00 "GICD_IROUTER683,Interrupt Routing Register 683" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7560++0x07 line.quad 0x00 "GICD_IROUTER684,Interrupt Routing Register 684" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7568++0x07 line.quad 0x00 "GICD_IROUTER685,Interrupt Routing Register 685" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7570++0x07 line.quad 0x00 "GICD_IROUTER686,Interrupt Routing Register 686" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7578++0x07 line.quad 0x00 "GICD_IROUTER687,Interrupt Routing Register 687" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7580++0x07 line.quad 0x00 "GICD_IROUTER688,Interrupt Routing Register 688" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7588++0x07 line.quad 0x00 "GICD_IROUTER689,Interrupt Routing Register 689" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7590++0x07 line.quad 0x00 "GICD_IROUTER690,Interrupt Routing Register 690" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7598++0x07 line.quad 0x00 "GICD_IROUTER691,Interrupt Routing Register 691" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75A0++0x07 line.quad 0x00 "GICD_IROUTER692,Interrupt Routing Register 692" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75A8++0x07 line.quad 0x00 "GICD_IROUTER693,Interrupt Routing Register 693" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75B0++0x07 line.quad 0x00 "GICD_IROUTER694,Interrupt Routing Register 694" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75B8++0x07 line.quad 0x00 "GICD_IROUTER695,Interrupt Routing Register 695" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75C0++0x07 line.quad 0x00 "GICD_IROUTER696,Interrupt Routing Register 696" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75C8++0x07 line.quad 0x00 "GICD_IROUTER697,Interrupt Routing Register 697" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75D0++0x07 line.quad 0x00 "GICD_IROUTER698,Interrupt Routing Register 698" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75D8++0x07 line.quad 0x00 "GICD_IROUTER699,Interrupt Routing Register 699" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75E0++0x07 line.quad 0x00 "GICD_IROUTER700,Interrupt Routing Register 700" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75E8++0x07 line.quad 0x00 "GICD_IROUTER701,Interrupt Routing Register 701" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75F0++0x07 line.quad 0x00 "GICD_IROUTER702,Interrupt Routing Register 702" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x75F8++0x07 line.quad 0x00 "GICD_IROUTER703,Interrupt Routing Register 703" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7600++0x07 line.quad 0x00 "GICD_IROUTER704,Interrupt Routing Register 704" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7608++0x07 line.quad 0x00 "GICD_IROUTER705,Interrupt Routing Register 705" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7610++0x07 line.quad 0x00 "GICD_IROUTER706,Interrupt Routing Register 706" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7618++0x07 line.quad 0x00 "GICD_IROUTER707,Interrupt Routing Register 707" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7620++0x07 line.quad 0x00 "GICD_IROUTER708,Interrupt Routing Register 708" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7628++0x07 line.quad 0x00 "GICD_IROUTER709,Interrupt Routing Register 709" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7630++0x07 line.quad 0x00 "GICD_IROUTER710,Interrupt Routing Register 710" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7638++0x07 line.quad 0x00 "GICD_IROUTER711,Interrupt Routing Register 711" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7640++0x07 line.quad 0x00 "GICD_IROUTER712,Interrupt Routing Register 712" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7648++0x07 line.quad 0x00 "GICD_IROUTER713,Interrupt Routing Register 713" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7650++0x07 line.quad 0x00 "GICD_IROUTER714,Interrupt Routing Register 714" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7658++0x07 line.quad 0x00 "GICD_IROUTER715,Interrupt Routing Register 715" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7660++0x07 line.quad 0x00 "GICD_IROUTER716,Interrupt Routing Register 716" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7668++0x07 line.quad 0x00 "GICD_IROUTER717,Interrupt Routing Register 717" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7670++0x07 line.quad 0x00 "GICD_IROUTER718,Interrupt Routing Register 718" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7678++0x07 line.quad 0x00 "GICD_IROUTER719,Interrupt Routing Register 719" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7680++0x07 line.quad 0x00 "GICD_IROUTER720,Interrupt Routing Register 720" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7688++0x07 line.quad 0x00 "GICD_IROUTER721,Interrupt Routing Register 721" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7690++0x07 line.quad 0x00 "GICD_IROUTER722,Interrupt Routing Register 722" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7698++0x07 line.quad 0x00 "GICD_IROUTER723,Interrupt Routing Register 723" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76A0++0x07 line.quad 0x00 "GICD_IROUTER724,Interrupt Routing Register 724" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76A8++0x07 line.quad 0x00 "GICD_IROUTER725,Interrupt Routing Register 725" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76B0++0x07 line.quad 0x00 "GICD_IROUTER726,Interrupt Routing Register 726" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76B8++0x07 line.quad 0x00 "GICD_IROUTER727,Interrupt Routing Register 727" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76C0++0x07 line.quad 0x00 "GICD_IROUTER728,Interrupt Routing Register 728" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76C8++0x07 line.quad 0x00 "GICD_IROUTER729,Interrupt Routing Register 729" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76D0++0x07 line.quad 0x00 "GICD_IROUTER730,Interrupt Routing Register 730" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76D8++0x07 line.quad 0x00 "GICD_IROUTER731,Interrupt Routing Register 731" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76E0++0x07 line.quad 0x00 "GICD_IROUTER732,Interrupt Routing Register 732" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76E8++0x07 line.quad 0x00 "GICD_IROUTER733,Interrupt Routing Register 733" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76F0++0x07 line.quad 0x00 "GICD_IROUTER734,Interrupt Routing Register 734" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x76F8++0x07 line.quad 0x00 "GICD_IROUTER735,Interrupt Routing Register 735" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7700++0x07 line.quad 0x00 "GICD_IROUTER736,Interrupt Routing Register 736" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7708++0x07 line.quad 0x00 "GICD_IROUTER737,Interrupt Routing Register 737" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7710++0x07 line.quad 0x00 "GICD_IROUTER738,Interrupt Routing Register 738" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7718++0x07 line.quad 0x00 "GICD_IROUTER739,Interrupt Routing Register 739" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7720++0x07 line.quad 0x00 "GICD_IROUTER740,Interrupt Routing Register 740" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7728++0x07 line.quad 0x00 "GICD_IROUTER741,Interrupt Routing Register 741" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7730++0x07 line.quad 0x00 "GICD_IROUTER742,Interrupt Routing Register 742" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7738++0x07 line.quad 0x00 "GICD_IROUTER743,Interrupt Routing Register 743" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7740++0x07 line.quad 0x00 "GICD_IROUTER744,Interrupt Routing Register 744" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7748++0x07 line.quad 0x00 "GICD_IROUTER745,Interrupt Routing Register 745" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7750++0x07 line.quad 0x00 "GICD_IROUTER746,Interrupt Routing Register 746" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7758++0x07 line.quad 0x00 "GICD_IROUTER747,Interrupt Routing Register 747" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7760++0x07 line.quad 0x00 "GICD_IROUTER748,Interrupt Routing Register 748" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7768++0x07 line.quad 0x00 "GICD_IROUTER749,Interrupt Routing Register 749" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7770++0x07 line.quad 0x00 "GICD_IROUTER750,Interrupt Routing Register 750" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7778++0x07 line.quad 0x00 "GICD_IROUTER751,Interrupt Routing Register 751" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7780++0x07 line.quad 0x00 "GICD_IROUTER752,Interrupt Routing Register 752" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7788++0x07 line.quad 0x00 "GICD_IROUTER753,Interrupt Routing Register 753" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7790++0x07 line.quad 0x00 "GICD_IROUTER754,Interrupt Routing Register 754" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7798++0x07 line.quad 0x00 "GICD_IROUTER755,Interrupt Routing Register 755" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77A0++0x07 line.quad 0x00 "GICD_IROUTER756,Interrupt Routing Register 756" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77A8++0x07 line.quad 0x00 "GICD_IROUTER757,Interrupt Routing Register 757" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77B0++0x07 line.quad 0x00 "GICD_IROUTER758,Interrupt Routing Register 758" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77B8++0x07 line.quad 0x00 "GICD_IROUTER759,Interrupt Routing Register 759" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77C0++0x07 line.quad 0x00 "GICD_IROUTER760,Interrupt Routing Register 760" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77C8++0x07 line.quad 0x00 "GICD_IROUTER761,Interrupt Routing Register 761" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77D0++0x07 line.quad 0x00 "GICD_IROUTER762,Interrupt Routing Register 762" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77D8++0x07 line.quad 0x00 "GICD_IROUTER763,Interrupt Routing Register 763" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77E0++0x07 line.quad 0x00 "GICD_IROUTER764,Interrupt Routing Register 764" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77E8++0x07 line.quad 0x00 "GICD_IROUTER765,Interrupt Routing Register 765" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77F0++0x07 line.quad 0x00 "GICD_IROUTER766,Interrupt Routing Register 766" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x77F8++0x07 line.quad 0x00 "GICD_IROUTER767,Interrupt Routing Register 767" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7800++0x07 line.quad 0x00 "GICD_IROUTER768,Interrupt Routing Register 768" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7808++0x07 line.quad 0x00 "GICD_IROUTER769,Interrupt Routing Register 769" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7810++0x07 line.quad 0x00 "GICD_IROUTER770,Interrupt Routing Register 770" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7818++0x07 line.quad 0x00 "GICD_IROUTER771,Interrupt Routing Register 771" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7820++0x07 line.quad 0x00 "GICD_IROUTER772,Interrupt Routing Register 772" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7828++0x07 line.quad 0x00 "GICD_IROUTER773,Interrupt Routing Register 773" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7830++0x07 line.quad 0x00 "GICD_IROUTER774,Interrupt Routing Register 774" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7838++0x07 line.quad 0x00 "GICD_IROUTER775,Interrupt Routing Register 775" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7840++0x07 line.quad 0x00 "GICD_IROUTER776,Interrupt Routing Register 776" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7848++0x07 line.quad 0x00 "GICD_IROUTER777,Interrupt Routing Register 777" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7850++0x07 line.quad 0x00 "GICD_IROUTER778,Interrupt Routing Register 778" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7858++0x07 line.quad 0x00 "GICD_IROUTER779,Interrupt Routing Register 779" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7860++0x07 line.quad 0x00 "GICD_IROUTER780,Interrupt Routing Register 780" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7868++0x07 line.quad 0x00 "GICD_IROUTER781,Interrupt Routing Register 781" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7870++0x07 line.quad 0x00 "GICD_IROUTER782,Interrupt Routing Register 782" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7878++0x07 line.quad 0x00 "GICD_IROUTER783,Interrupt Routing Register 783" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7880++0x07 line.quad 0x00 "GICD_IROUTER784,Interrupt Routing Register 784" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7888++0x07 line.quad 0x00 "GICD_IROUTER785,Interrupt Routing Register 785" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7890++0x07 line.quad 0x00 "GICD_IROUTER786,Interrupt Routing Register 786" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7898++0x07 line.quad 0x00 "GICD_IROUTER787,Interrupt Routing Register 787" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78A0++0x07 line.quad 0x00 "GICD_IROUTER788,Interrupt Routing Register 788" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78A8++0x07 line.quad 0x00 "GICD_IROUTER789,Interrupt Routing Register 789" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78B0++0x07 line.quad 0x00 "GICD_IROUTER790,Interrupt Routing Register 790" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78B8++0x07 line.quad 0x00 "GICD_IROUTER791,Interrupt Routing Register 791" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78C0++0x07 line.quad 0x00 "GICD_IROUTER792,Interrupt Routing Register 792" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78C8++0x07 line.quad 0x00 "GICD_IROUTER793,Interrupt Routing Register 793" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78D0++0x07 line.quad 0x00 "GICD_IROUTER794,Interrupt Routing Register 794" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78D8++0x07 line.quad 0x00 "GICD_IROUTER795,Interrupt Routing Register 795" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78E0++0x07 line.quad 0x00 "GICD_IROUTER796,Interrupt Routing Register 796" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78E8++0x07 line.quad 0x00 "GICD_IROUTER797,Interrupt Routing Register 797" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78F0++0x07 line.quad 0x00 "GICD_IROUTER798,Interrupt Routing Register 798" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x78F8++0x07 line.quad 0x00 "GICD_IROUTER799,Interrupt Routing Register 799" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7900++0x07 line.quad 0x00 "GICD_IROUTER800,Interrupt Routing Register 800" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7908++0x07 line.quad 0x00 "GICD_IROUTER801,Interrupt Routing Register 801" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7910++0x07 line.quad 0x00 "GICD_IROUTER802,Interrupt Routing Register 802" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7918++0x07 line.quad 0x00 "GICD_IROUTER803,Interrupt Routing Register 803" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7920++0x07 line.quad 0x00 "GICD_IROUTER804,Interrupt Routing Register 804" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7928++0x07 line.quad 0x00 "GICD_IROUTER805,Interrupt Routing Register 805" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7930++0x07 line.quad 0x00 "GICD_IROUTER806,Interrupt Routing Register 806" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7938++0x07 line.quad 0x00 "GICD_IROUTER807,Interrupt Routing Register 807" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7940++0x07 line.quad 0x00 "GICD_IROUTER808,Interrupt Routing Register 808" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7948++0x07 line.quad 0x00 "GICD_IROUTER809,Interrupt Routing Register 809" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7950++0x07 line.quad 0x00 "GICD_IROUTER810,Interrupt Routing Register 810" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7958++0x07 line.quad 0x00 "GICD_IROUTER811,Interrupt Routing Register 811" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7960++0x07 line.quad 0x00 "GICD_IROUTER812,Interrupt Routing Register 812" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7968++0x07 line.quad 0x00 "GICD_IROUTER813,Interrupt Routing Register 813" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7970++0x07 line.quad 0x00 "GICD_IROUTER814,Interrupt Routing Register 814" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7978++0x07 line.quad 0x00 "GICD_IROUTER815,Interrupt Routing Register 815" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7980++0x07 line.quad 0x00 "GICD_IROUTER816,Interrupt Routing Register 816" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7988++0x07 line.quad 0x00 "GICD_IROUTER817,Interrupt Routing Register 817" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7990++0x07 line.quad 0x00 "GICD_IROUTER818,Interrupt Routing Register 818" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7998++0x07 line.quad 0x00 "GICD_IROUTER819,Interrupt Routing Register 819" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79A0++0x07 line.quad 0x00 "GICD_IROUTER820,Interrupt Routing Register 820" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79A8++0x07 line.quad 0x00 "GICD_IROUTER821,Interrupt Routing Register 821" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79B0++0x07 line.quad 0x00 "GICD_IROUTER822,Interrupt Routing Register 822" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79B8++0x07 line.quad 0x00 "GICD_IROUTER823,Interrupt Routing Register 823" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79C0++0x07 line.quad 0x00 "GICD_IROUTER824,Interrupt Routing Register 824" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79C8++0x07 line.quad 0x00 "GICD_IROUTER825,Interrupt Routing Register 825" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79D0++0x07 line.quad 0x00 "GICD_IROUTER826,Interrupt Routing Register 826" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79D8++0x07 line.quad 0x00 "GICD_IROUTER827,Interrupt Routing Register 827" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79E0++0x07 line.quad 0x00 "GICD_IROUTER828,Interrupt Routing Register 828" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79E8++0x07 line.quad 0x00 "GICD_IROUTER829,Interrupt Routing Register 829" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79F0++0x07 line.quad 0x00 "GICD_IROUTER830,Interrupt Routing Register 830" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x79F8++0x07 line.quad 0x00 "GICD_IROUTER831,Interrupt Routing Register 831" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A00++0x07 line.quad 0x00 "GICD_IROUTER832,Interrupt Routing Register 832" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A08++0x07 line.quad 0x00 "GICD_IROUTER833,Interrupt Routing Register 833" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A10++0x07 line.quad 0x00 "GICD_IROUTER834,Interrupt Routing Register 834" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A18++0x07 line.quad 0x00 "GICD_IROUTER835,Interrupt Routing Register 835" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A20++0x07 line.quad 0x00 "GICD_IROUTER836,Interrupt Routing Register 836" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A28++0x07 line.quad 0x00 "GICD_IROUTER837,Interrupt Routing Register 837" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A30++0x07 line.quad 0x00 "GICD_IROUTER838,Interrupt Routing Register 838" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A38++0x07 line.quad 0x00 "GICD_IROUTER839,Interrupt Routing Register 839" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A40++0x07 line.quad 0x00 "GICD_IROUTER840,Interrupt Routing Register 840" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A48++0x07 line.quad 0x00 "GICD_IROUTER841,Interrupt Routing Register 841" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A50++0x07 line.quad 0x00 "GICD_IROUTER842,Interrupt Routing Register 842" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A58++0x07 line.quad 0x00 "GICD_IROUTER843,Interrupt Routing Register 843" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A60++0x07 line.quad 0x00 "GICD_IROUTER844,Interrupt Routing Register 844" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A68++0x07 line.quad 0x00 "GICD_IROUTER845,Interrupt Routing Register 845" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A70++0x07 line.quad 0x00 "GICD_IROUTER846,Interrupt Routing Register 846" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A78++0x07 line.quad 0x00 "GICD_IROUTER847,Interrupt Routing Register 847" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A80++0x07 line.quad 0x00 "GICD_IROUTER848,Interrupt Routing Register 848" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A88++0x07 line.quad 0x00 "GICD_IROUTER849,Interrupt Routing Register 849" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A90++0x07 line.quad 0x00 "GICD_IROUTER850,Interrupt Routing Register 850" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7A98++0x07 line.quad 0x00 "GICD_IROUTER851,Interrupt Routing Register 851" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AA0++0x07 line.quad 0x00 "GICD_IROUTER852,Interrupt Routing Register 852" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AA8++0x07 line.quad 0x00 "GICD_IROUTER853,Interrupt Routing Register 853" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AB0++0x07 line.quad 0x00 "GICD_IROUTER854,Interrupt Routing Register 854" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AB8++0x07 line.quad 0x00 "GICD_IROUTER855,Interrupt Routing Register 855" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AC0++0x07 line.quad 0x00 "GICD_IROUTER856,Interrupt Routing Register 856" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AC8++0x07 line.quad 0x00 "GICD_IROUTER857,Interrupt Routing Register 857" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AD0++0x07 line.quad 0x00 "GICD_IROUTER858,Interrupt Routing Register 858" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AD8++0x07 line.quad 0x00 "GICD_IROUTER859,Interrupt Routing Register 859" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AE0++0x07 line.quad 0x00 "GICD_IROUTER860,Interrupt Routing Register 860" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AE8++0x07 line.quad 0x00 "GICD_IROUTER861,Interrupt Routing Register 861" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AF0++0x07 line.quad 0x00 "GICD_IROUTER862,Interrupt Routing Register 862" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7AF8++0x07 line.quad 0x00 "GICD_IROUTER863,Interrupt Routing Register 863" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B00++0x07 line.quad 0x00 "GICD_IROUTER864,Interrupt Routing Register 864" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B08++0x07 line.quad 0x00 "GICD_IROUTER865,Interrupt Routing Register 865" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B10++0x07 line.quad 0x00 "GICD_IROUTER866,Interrupt Routing Register 866" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B18++0x07 line.quad 0x00 "GICD_IROUTER867,Interrupt Routing Register 867" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B20++0x07 line.quad 0x00 "GICD_IROUTER868,Interrupt Routing Register 868" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B28++0x07 line.quad 0x00 "GICD_IROUTER869,Interrupt Routing Register 869" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B30++0x07 line.quad 0x00 "GICD_IROUTER870,Interrupt Routing Register 870" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B38++0x07 line.quad 0x00 "GICD_IROUTER871,Interrupt Routing Register 871" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B40++0x07 line.quad 0x00 "GICD_IROUTER872,Interrupt Routing Register 872" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B48++0x07 line.quad 0x00 "GICD_IROUTER873,Interrupt Routing Register 873" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B50++0x07 line.quad 0x00 "GICD_IROUTER874,Interrupt Routing Register 874" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B58++0x07 line.quad 0x00 "GICD_IROUTER875,Interrupt Routing Register 875" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B60++0x07 line.quad 0x00 "GICD_IROUTER876,Interrupt Routing Register 876" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B68++0x07 line.quad 0x00 "GICD_IROUTER877,Interrupt Routing Register 877" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B70++0x07 line.quad 0x00 "GICD_IROUTER878,Interrupt Routing Register 878" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B78++0x07 line.quad 0x00 "GICD_IROUTER879,Interrupt Routing Register 879" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B80++0x07 line.quad 0x00 "GICD_IROUTER880,Interrupt Routing Register 880" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B88++0x07 line.quad 0x00 "GICD_IROUTER881,Interrupt Routing Register 881" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B90++0x07 line.quad 0x00 "GICD_IROUTER882,Interrupt Routing Register 882" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7B98++0x07 line.quad 0x00 "GICD_IROUTER883,Interrupt Routing Register 883" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BA0++0x07 line.quad 0x00 "GICD_IROUTER884,Interrupt Routing Register 884" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BA8++0x07 line.quad 0x00 "GICD_IROUTER885,Interrupt Routing Register 885" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BB0++0x07 line.quad 0x00 "GICD_IROUTER886,Interrupt Routing Register 886" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BB8++0x07 line.quad 0x00 "GICD_IROUTER887,Interrupt Routing Register 887" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BC0++0x07 line.quad 0x00 "GICD_IROUTER888,Interrupt Routing Register 888" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BC8++0x07 line.quad 0x00 "GICD_IROUTER889,Interrupt Routing Register 889" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BD0++0x07 line.quad 0x00 "GICD_IROUTER890,Interrupt Routing Register 890" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BD8++0x07 line.quad 0x00 "GICD_IROUTER891,Interrupt Routing Register 891" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BE0++0x07 line.quad 0x00 "GICD_IROUTER892,Interrupt Routing Register 892" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BE8++0x07 line.quad 0x00 "GICD_IROUTER893,Interrupt Routing Register 893" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BF0++0x07 line.quad 0x00 "GICD_IROUTER894,Interrupt Routing Register 894" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7BF8++0x07 line.quad 0x00 "GICD_IROUTER895,Interrupt Routing Register 895" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C00++0x07 line.quad 0x00 "GICD_IROUTER896,Interrupt Routing Register 896" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C08++0x07 line.quad 0x00 "GICD_IROUTER897,Interrupt Routing Register 897" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C10++0x07 line.quad 0x00 "GICD_IROUTER898,Interrupt Routing Register 898" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C18++0x07 line.quad 0x00 "GICD_IROUTER899,Interrupt Routing Register 899" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C20++0x07 line.quad 0x00 "GICD_IROUTER900,Interrupt Routing Register 900" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C28++0x07 line.quad 0x00 "GICD_IROUTER901,Interrupt Routing Register 901" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C30++0x07 line.quad 0x00 "GICD_IROUTER902,Interrupt Routing Register 902" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C38++0x07 line.quad 0x00 "GICD_IROUTER903,Interrupt Routing Register 903" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C40++0x07 line.quad 0x00 "GICD_IROUTER904,Interrupt Routing Register 904" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C48++0x07 line.quad 0x00 "GICD_IROUTER905,Interrupt Routing Register 905" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C50++0x07 line.quad 0x00 "GICD_IROUTER906,Interrupt Routing Register 906" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C58++0x07 line.quad 0x00 "GICD_IROUTER907,Interrupt Routing Register 907" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C60++0x07 line.quad 0x00 "GICD_IROUTER908,Interrupt Routing Register 908" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C68++0x07 line.quad 0x00 "GICD_IROUTER909,Interrupt Routing Register 909" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C70++0x07 line.quad 0x00 "GICD_IROUTER910,Interrupt Routing Register 910" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C78++0x07 line.quad 0x00 "GICD_IROUTER911,Interrupt Routing Register 911" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C80++0x07 line.quad 0x00 "GICD_IROUTER912,Interrupt Routing Register 912" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C88++0x07 line.quad 0x00 "GICD_IROUTER913,Interrupt Routing Register 913" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C90++0x07 line.quad 0x00 "GICD_IROUTER914,Interrupt Routing Register 914" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7C98++0x07 line.quad 0x00 "GICD_IROUTER915,Interrupt Routing Register 915" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CA0++0x07 line.quad 0x00 "GICD_IROUTER916,Interrupt Routing Register 916" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CA8++0x07 line.quad 0x00 "GICD_IROUTER917,Interrupt Routing Register 917" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CB0++0x07 line.quad 0x00 "GICD_IROUTER918,Interrupt Routing Register 918" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CB8++0x07 line.quad 0x00 "GICD_IROUTER919,Interrupt Routing Register 919" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CC0++0x07 line.quad 0x00 "GICD_IROUTER920,Interrupt Routing Register 920" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CC8++0x07 line.quad 0x00 "GICD_IROUTER921,Interrupt Routing Register 921" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CD0++0x07 line.quad 0x00 "GICD_IROUTER922,Interrupt Routing Register 922" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CD8++0x07 line.quad 0x00 "GICD_IROUTER923,Interrupt Routing Register 923" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CE0++0x07 line.quad 0x00 "GICD_IROUTER924,Interrupt Routing Register 924" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CE8++0x07 line.quad 0x00 "GICD_IROUTER925,Interrupt Routing Register 925" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CF0++0x07 line.quad 0x00 "GICD_IROUTER926,Interrupt Routing Register 926" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7CF8++0x07 line.quad 0x00 "GICD_IROUTER927,Interrupt Routing Register 927" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D00++0x07 line.quad 0x00 "GICD_IROUTER928,Interrupt Routing Register 928" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D08++0x07 line.quad 0x00 "GICD_IROUTER929,Interrupt Routing Register 929" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D10++0x07 line.quad 0x00 "GICD_IROUTER930,Interrupt Routing Register 930" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D18++0x07 line.quad 0x00 "GICD_IROUTER931,Interrupt Routing Register 931" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D20++0x07 line.quad 0x00 "GICD_IROUTER932,Interrupt Routing Register 932" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D28++0x07 line.quad 0x00 "GICD_IROUTER933,Interrupt Routing Register 933" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D30++0x07 line.quad 0x00 "GICD_IROUTER934,Interrupt Routing Register 934" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D38++0x07 line.quad 0x00 "GICD_IROUTER935,Interrupt Routing Register 935" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D40++0x07 line.quad 0x00 "GICD_IROUTER936,Interrupt Routing Register 936" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D48++0x07 line.quad 0x00 "GICD_IROUTER937,Interrupt Routing Register 937" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D50++0x07 line.quad 0x00 "GICD_IROUTER938,Interrupt Routing Register 938" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D58++0x07 line.quad 0x00 "GICD_IROUTER939,Interrupt Routing Register 939" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D60++0x07 line.quad 0x00 "GICD_IROUTER940,Interrupt Routing Register 940" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D68++0x07 line.quad 0x00 "GICD_IROUTER941,Interrupt Routing Register 941" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D70++0x07 line.quad 0x00 "GICD_IROUTER942,Interrupt Routing Register 942" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D78++0x07 line.quad 0x00 "GICD_IROUTER943,Interrupt Routing Register 943" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D80++0x07 line.quad 0x00 "GICD_IROUTER944,Interrupt Routing Register 944" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D88++0x07 line.quad 0x00 "GICD_IROUTER945,Interrupt Routing Register 945" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D90++0x07 line.quad 0x00 "GICD_IROUTER946,Interrupt Routing Register 946" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7D98++0x07 line.quad 0x00 "GICD_IROUTER947,Interrupt Routing Register 947" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DA0++0x07 line.quad 0x00 "GICD_IROUTER948,Interrupt Routing Register 948" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DA8++0x07 line.quad 0x00 "GICD_IROUTER949,Interrupt Routing Register 949" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DB0++0x07 line.quad 0x00 "GICD_IROUTER950,Interrupt Routing Register 950" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DB8++0x07 line.quad 0x00 "GICD_IROUTER951,Interrupt Routing Register 951" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DC0++0x07 line.quad 0x00 "GICD_IROUTER952,Interrupt Routing Register 952" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DC8++0x07 line.quad 0x00 "GICD_IROUTER953,Interrupt Routing Register 953" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DD0++0x07 line.quad 0x00 "GICD_IROUTER954,Interrupt Routing Register 954" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DD8++0x07 line.quad 0x00 "GICD_IROUTER955,Interrupt Routing Register 955" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DE0++0x07 line.quad 0x00 "GICD_IROUTER956,Interrupt Routing Register 956" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DE8++0x07 line.quad 0x00 "GICD_IROUTER957,Interrupt Routing Register 957" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DF0++0x07 line.quad 0x00 "GICD_IROUTER958,Interrupt Routing Register 958" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7DF8++0x07 line.quad 0x00 "GICD_IROUTER959,Interrupt Routing Register 959" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E00++0x07 line.quad 0x00 "GICD_IROUTER960,Interrupt Routing Register 960" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E08++0x07 line.quad 0x00 "GICD_IROUTER961,Interrupt Routing Register 961" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E10++0x07 line.quad 0x00 "GICD_IROUTER962,Interrupt Routing Register 962" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E18++0x07 line.quad 0x00 "GICD_IROUTER963,Interrupt Routing Register 963" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E20++0x07 line.quad 0x00 "GICD_IROUTER964,Interrupt Routing Register 964" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E28++0x07 line.quad 0x00 "GICD_IROUTER965,Interrupt Routing Register 965" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E30++0x07 line.quad 0x00 "GICD_IROUTER966,Interrupt Routing Register 966" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E38++0x07 line.quad 0x00 "GICD_IROUTER967,Interrupt Routing Register 967" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E40++0x07 line.quad 0x00 "GICD_IROUTER968,Interrupt Routing Register 968" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E48++0x07 line.quad 0x00 "GICD_IROUTER969,Interrupt Routing Register 969" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E50++0x07 line.quad 0x00 "GICD_IROUTER970,Interrupt Routing Register 970" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E58++0x07 line.quad 0x00 "GICD_IROUTER971,Interrupt Routing Register 971" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E60++0x07 line.quad 0x00 "GICD_IROUTER972,Interrupt Routing Register 972" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E68++0x07 line.quad 0x00 "GICD_IROUTER973,Interrupt Routing Register 973" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E70++0x07 line.quad 0x00 "GICD_IROUTER974,Interrupt Routing Register 974" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E78++0x07 line.quad 0x00 "GICD_IROUTER975,Interrupt Routing Register 975" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E80++0x07 line.quad 0x00 "GICD_IROUTER976,Interrupt Routing Register 976" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E88++0x07 line.quad 0x00 "GICD_IROUTER977,Interrupt Routing Register 977" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E90++0x07 line.quad 0x00 "GICD_IROUTER978,Interrupt Routing Register 978" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7E98++0x07 line.quad 0x00 "GICD_IROUTER979,Interrupt Routing Register 979" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7EA0++0x07 line.quad 0x00 "GICD_IROUTER980,Interrupt Routing Register 980" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7EA8++0x07 line.quad 0x00 "GICD_IROUTER981,Interrupt Routing Register 981" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7EB0++0x07 line.quad 0x00 "GICD_IROUTER982,Interrupt Routing Register 982" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7EB8++0x07 line.quad 0x00 "GICD_IROUTER983,Interrupt Routing Register 983" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7EC0++0x07 line.quad 0x00 "GICD_IROUTER984,Interrupt Routing Register 984" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7EC8++0x07 line.quad 0x00 "GICD_IROUTER985,Interrupt Routing Register 985" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7ED0++0x07 line.quad 0x00 "GICD_IROUTER986,Interrupt Routing Register 986" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7ED8++0x07 line.quad 0x00 "GICD_IROUTER987,Interrupt Routing Register 987" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7EE0++0x07 line.quad 0x00 "GICD_IROUTER988,Interrupt Routing Register 988" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7EE8++0x07 line.quad 0x00 "GICD_IROUTER989,Interrupt Routing Register 989" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7EF0++0x07 line.quad 0x00 "GICD_IROUTER990,Interrupt Routing Register 990" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" group.quad 0x7EF8++0x07 line.quad 0x00 "GICD_IROUTER991,Interrupt Routing Register 991" hexmask.quad.byte 0x00 32.--39. 1. "AFF3,Affinity level 3" hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2" hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1" hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0" tree.end tree "Peripheral/Component ID Registers" rgroup.long 0xFFE0++0x03 line.long 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFE4++0x03 line.long 0x00 "GICD_PIDR1,Peripheral ID0 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFE8++0x03 line.long 0x00 "GICD_PIDR2,Peripheral ID0 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFEC++0x03 line.long 0x00 "GICD_PIDR3,Peripheral ID0 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFD0++0x03 line.long 0x00 "GICD_PIDR4,Peripheral ID0 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFD4++0x03 line.long 0x00 "GICD_PIDR5,Peripheral ID0 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFD8++0x03 line.long 0x00 "GICD_PIDR6,Peripheral ID0 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFDC++0x03 line.long 0x00 "GICD_PIDR7,Peripheral ID0 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" newline rgroup.long 0xFFF0++0x03 line.long 0x00 "GICD_CIDR0,Component ID0 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFF4++0x03 line.long 0x00 "GICD_CIDR1,Component ID1 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFF8++0x03 line.long 0x00 "GICD_CIDR2,Component ID2 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFFC++0x03 line.long 0x00 "GICD_CIDR3,Component ID3 Register" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" newline tree.end tree.end AUTOINDENT.OFF endif sif COMP.AVAILABLE("GICR") AUTOINDENT.ON center tree base COMP.BASE("GICR",-1.) tree "Redistributor Interface" tree "Control Registers" rgroup.long 0x00++0x03 line.long 0x00 "GICR_CTLR,Redistributor Control Register" bitfld.long 0x00 31. "UWP,Upstream writes pending" "Not pending,?..." bitfld.long 0x00 3. "RWP,Register Write Pending" "Not pending,Pending" rgroup.long 0x0004++0x03 line.long 0x00 "GICR_IIDR,Distributor Implementer Identification Register" hexmask.long.byte 0x00 24.--31. 1. "PRODUCTID,Product ID" bitfld.long 0x00 16.--19. "VARIANT,Major revision number" "r0p0,?..." newline bitfld.long 0x00 12.--15. "REVISION,Minor revision number" "r0p0,?..." hexmask.long.word 0x00 0.--11. 1. "IMPLEMENTER,Implementer" rgroup.quad 0x0008++0x07 line.quad 0x00 "GICR_TYPER,Redistributor Type Register" hexmask.quad.byte 0x00 32.--39. 1. "AFF0,Affinity level 0" hexmask.quad.word 0x00 8.--23. 1. "PROCESSOR_NUMBER,Processor Number" newline bitfld.quad 0x00 5. "DPGS,GICR_CTLR.DPG* bits support" "Not supported,?..." bitfld.quad 0x00 4. "LAST,Last numbered Redistributor" "Not last,Last" bitfld.quad 0x00 3. "DIRECTLPI,Direct injection of LPIs support" "Not supported,?..." newline bitfld.quad 0x00 1. "VLPIS,Virtual LPIs support" "Not supported,?..." bitfld.quad 0x00 0. "PLPIS,Physical LPI support" "Not supported,?..." group.long 0x0014++0x03 line.long 0x00 "GICR_WAKER,Redistributor Wake Register" bitfld.long 0x00 2. "CHILDRENASLEEP,Connected target quiescent" "Not quiescent,Quiescent" bitfld.long 0x00 1. "PROCESSORSLEEP,Target is entering the processor sleep state" "No,Yes" tree.end tree "SGI and PPI Registers" group.long 0x10080++0x03 line.long 0x00 "GICR_IGROUPR0,Interrupt Group Register 0" bitfld.long 0x00 31. "PPIS[15],Controls the group for the corresponding PPIs" "Group 0,Group 1" bitfld.long 0x00 30. "PPIS[14],Controls the group for the corresponding PPIs" "Group 0,Group 1" bitfld.long 0x00 29. "PPIS[13],Controls the group for the corresponding PPIs" "Group 0,Group 1" newline bitfld.long 0x00 28. "PPIS[12],Controls the group for the corresponding PPIs" "Group 0,Group 1" bitfld.long 0x00 27. "PPIS[11],Controls the group for the corresponding PPIs" "Group 0,Group 1" bitfld.long 0x00 26. "PPIS[10],Controls the group for the corresponding PPIs" "Group 0,Group 1" newline bitfld.long 0x00 25. "PPIS[9],Controls the group for the corresponding PPIs" "Group 0,Group 1" bitfld.long 0x00 24. "PPIS[8],Controls the group for the corresponding PPIs" "Group 0,Group 1" bitfld.long 0x00 23. "PPIS[7],Controls the group for the corresponding PPIs" "Group 0,Group 1" newline bitfld.long 0x00 22. "PPIS[6],Controls the group for the corresponding PPIs" "Group 0,Group 1" bitfld.long 0x00 21. "PPIS[5],Controls the group for the corresponding PPIs" "Group 0,Group 1" bitfld.long 0x00 20. "PPIS[4],Controls the group for the corresponding PPIs" "Group 0,Group 1" newline bitfld.long 0x00 19. "PPIS[3],Controls the group for the corresponding PPIs" "Group 0,Group 1" bitfld.long 0x00 18. "PPIS[2],Controls the group for the corresponding PPIs" "Group 0,Group 1" bitfld.long 0x00 17. "PPIS[1],Controls the group for the corresponding PPIs" "Group 0,Group 1" newline bitfld.long 0x00 16. "PPIS[0],Controls the group for the corresponding PPIs" "Group 0,Group 1" bitfld.long 0x00 15. "SGI[15],Controls the group for the corresponding SGIs" "Group 0,Group 1" bitfld.long 0x00 14. "SGI[14],Controls the group for the corresponding SGIs" "Group 0,Group 1" newline bitfld.long 0x00 13. "SGI[13],Controls the group for the corresponding SGIs" "Group 0,Group 1" bitfld.long 0x00 12. "SGI[12],Controls the group for the corresponding SGIs" "Group 0,Group 1" bitfld.long 0x00 11. "SGI[11],Controls the group for the corresponding SGIs" "Group 0,Group 1" newline bitfld.long 0x00 10. "SGI[10],Controls the group for the corresponding SGIs" "Group 0,Group 1" bitfld.long 0x00 9. "SGI[9],Controls the group for the corresponding SGIs" "Group 0,Group 1" bitfld.long 0x00 8. "SGI[8],Controls the group for the corresponding SGIs" "Group 0,Group 1" newline bitfld.long 0x00 7. "SGI[7],Controls the group for the corresponding SGIs" "Group 0,Group 1" bitfld.long 0x00 6. "SGI[6],Controls the group for the corresponding SGIs" "Group 0,Group 1" bitfld.long 0x00 5. "SGI[5],Controls the group for the corresponding SGIs" "Group 0,Group 1" newline bitfld.long 0x00 4. "SGI[4],Controls the group for the corresponding SGIs" "Group 0,Group 1" bitfld.long 0x00 3. "SGI[3],Controls the group for the corresponding SGIs" "Group 0,Group 1" bitfld.long 0x00 2. "SGI[2],Controls the group for the corresponding SGIs" "Group 0,Group 1" newline bitfld.long 0x00 1. "SGI[1],Controls the group for the corresponding SGIs" "Group 0,Group 1" bitfld.long 0x00 0. "SGI[0],Controls the group for the corresponding SGIs" "Group 0,Group 1" newline group.long 0x10100++0x03 line.long 0x00 "GICR_ISET/CLR_ENABLER0,Interrupt Group Set/Clear Enable Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "PPI[15],Set/Clear Enable Bit 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "PPI[14],Set/Clear Enable Bit 30" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "PPI[13],Set/Clear Enable Bit 29" "Disabled,Enabled" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "PPI[12],Set/Clear Enable Bit 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "PPI[11],Set/Clear Enable Bit 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "PPI[10],Set/Clear Enable Bit 26" "Disabled,Enabled" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "PPI[9],Set/Clear Enable Bit 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "PPI[8],Set/Clear Enable Bit 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "PPI[7],Set/Clear Enable Bit 23" "Disabled,Enabled" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "PPI[6],Set/Clear Enable Bit 22" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "PPI[5],Set/Clear Enable Bit 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "PPI[4],Set/Clear Enable Bit 20" "Disabled,Enabled" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "PPI[3],Set/Clear Enable Bit 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "PPI[2],Set/Clear Enable Bit 18" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "PPI[1],Set/Clear Enable Bit 17" "Disabled,Enabled" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "PPI[0],Set/Clear Enable Bit 16" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SGI[15],Set/Clear Enable Bit 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SGI[14],Set/Clear Enable Bit 14" "Disabled,Enabled" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SGI[13],Set/Clear Enable Bit 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SGI[12],Set/Clear Enable Bit 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SGI[11],Set/Clear Enable Bit 11" "Disabled,Enabled" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SGI[10],Set/Clear Enable Bit 10" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SGI[9],Set/Clear Enable Bit 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SGI[8],Set/Clear Enable Bit 8" "Disabled,Enabled" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SGI[7],Set/Clear Enable Bit 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SGI[6],Set/Clear Enable Bit 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SGI[5],Set/Clear Enable Bit 5" "Disabled,Enabled" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SGI[4],Set/Clear Enable Bit 4" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SGI[3],Set/Clear Enable Bit 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SGI[2],Set/Clear Enable Bit 2" "Disabled,Enabled" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SGI[1],Set/Clear Enable Bit 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SGI[0],Set/Clear Enable Bit 0" "Disabled,Enabled" group.long 0x10200++0x03 line.long 0x00 "GICR_ISET/CLR_PENDR0,Interrupt Set/Clear-Pending Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "PPI[15],Set/Clear Pending Bit 31" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "PPI[14],Set/Clear Pending Bit 30" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "PPI[13],Set/Clear Pending Bit 29" "Not pending,Pending" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "PPI[12],Set/Clear Pending Bit 28" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "PPI[11],Set/Clear Pending Bit 27" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "PPI[10],Set/Clear Pending Bit 26" "Not pending,Pending" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "PPI[9],Set/Clear Pending Bit 25" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "PPI[8],Set/Clear Pending Bit 24" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "PPI[7],Set/Clear Pending Bit 23" "Not pending,Pending" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "PPI[6],Set/Clear Pending Bit 22" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "PPI[5],Set/Clear Pending Bit 21" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "PPI[4],Set/Clear Pending Bit 20" "Not pending,Pending" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "PPI[3],Set/Clear Pending Bit 19" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "PPI[2],Set/Clear Pending Bit 18" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "PPI[1],Set/Clear Pending Bit 17" "Not pending,Pending" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "PPI[0],Set/Clear Pending Bit 16" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SGI[15],Set/Clear Pending Bit 15" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SGI[14],Set/Clear Pending Bit 14" "Not pending,Pending" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SGI[13],Set/Clear Pending Bit 13" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SGI[12],Set/Clear Pending Bit 12" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SGI[11],Set/Clear Pending Bit 11" "Not pending,Pending" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SGI[10],Set/Clear Pending Bit 10" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SGI[9],Set/Clear Pending Bit 9" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SGI[8],Set/Clear Pending Bit 8" "Not pending,Pending" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SGI[7],Set/Clear Pending Bit 7" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SGI[6],Set/Clear Pending Bit 6" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SGI[5],Set/Clear Pending Bit 5" "Not pending,Pending" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SGI[4],Set/Clear Pending Bit 4" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SGI[3],Set/Clear Pending Bit 3" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SGI[2],Set/Clear Pending Bit 2" "Not pending,Pending" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SGI[1],Set/Clear Pending Bit 1" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SGI[0],Set/Clear Pending Bit 0" "Not pending,Pending" group.long 0x10300++0x03 line.long 0x00 "GICR_ISET/CLR_ACTIVER0,Interrupt Set/Clear-Active Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. "PPI[15],Set/Clear Active Bit 31" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. "PPI[14],Set/Clear Active Bit 30" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. "PPI[13],Set/Clear Active Bit 29" "Not active,Active" newline setclrfld.long 0x00 28. 0x00 28. 0x80 28. "PPI[12],Set/Clear Active Bit 28" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. "PPI[11],Set/Clear Active Bit 27" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. "PPI[10],Set/Clear Active Bit 26" "Not active,Active" newline setclrfld.long 0x00 25. 0x00 25. 0x80 25. "PPI[9],Set/Clear Active Bit 25" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. "PPI[8],Set/Clear Active Bit 24" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. "PPI[7],Set/Clear Active Bit 23" "Not active,Active" newline setclrfld.long 0x00 22. 0x00 22. 0x80 22. "PPI[6],Set/Clear Active Bit 22" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. "PPI[5],Set/Clear Active Bit 21" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. "PPI[4],Set/Clear Active Bit 20" "Not active,Active" newline setclrfld.long 0x00 19. 0x00 19. 0x80 19. "PPI[3],Set/Clear Active Bit 19" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. "PPI[2],Set/Clear Active Bit 18" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. "PPI[1],Set/Clear Active Bit 17" "Not active,Active" newline setclrfld.long 0x00 16. 0x00 16. 0x80 16. "PPI[0],Set/Clear Active Bit 16" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. "SGI[15],Set/Clear Active Bit 15" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. "SGI[14],Set/Clear Active Bit 14" "Not active,Active" newline setclrfld.long 0x00 13. 0x00 13. 0x80 13. "SGI[13],Set/Clear Active Bit 13" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. "SGI[12],Set/Clear Active Bit 12" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. "SGI[11],Set/Clear Active Bit 11" "Not active,Active" newline setclrfld.long 0x00 10. 0x00 10. 0x80 10. "SGI[10],Set/Clear Active Bit 10" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. "SGI[9],Set/Clear Active Bit 9" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. "SGI[8],Set/Clear Active Bit 8" "Not active,Active" newline setclrfld.long 0x00 7. 0x00 7. 0x80 7. "SGI[7],Set/Clear Active Bit 7" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. "SGI[6],Set/Clear Active Bit 6" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. "SGI[5],Set/Clear Active Bit 5" "Not active,Active" newline setclrfld.long 0x00 4. 0x00 4. 0x80 4. "SGI[4],Set/Clear Active Bit 4" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. "SGI[3],Set/Clear Active Bit 3" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. "SGI[2],Set/Clear Active Bit 2" "Not active,Active" newline setclrfld.long 0x00 1. 0x00 1. 0x80 1. "SGI[1],Set/Clear Active Bit 1" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. "SGI[0],Set/Clear Active Bit 0" "Not active,Active" newline group.long 0x10400++0x03 line.long 0x00 "GICR_IPRIORITYR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 27.--31. 1. "PRI3 ,Interrupt ID3 Priority/Priority Byte Offset 3 " hexmask.long.byte 0x00 19.--23. 1. "PRI2 ,Interrupt ID2 Priority/Priority Byte Offset 2 " hexmask.long.byte 0x00 11.--15. 1. "PRI1 ,Interrupt ID1 Priority/Priority Byte Offset 1 " hexmask.long.byte 0x00 3.--7. 1. "PRI0 ,Interrupt ID0 Priority/Priority Byte Offset 0 " group.long 0x10404++0x03 line.long 0x00 "GICR_IPRIORITYR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 27.--31. 1. "PRI7 ,Interrupt ID7 Priority/Priority Byte Offset 7 " hexmask.long.byte 0x00 19.--23. 1. "PRI6 ,Interrupt ID6 Priority/Priority Byte Offset 6 " hexmask.long.byte 0x00 11.--15. 1. "PRI5 ,Interrupt ID5 Priority/Priority Byte Offset 5 " hexmask.long.byte 0x00 3.--7. 1. "PRI4 ,Interrupt ID4 Priority/Priority Byte Offset 4 " group.long 0x10408++0x03 line.long 0x00 "GICR_IPRIORITYR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 27.--31. 1. "PRI11 ,Interrupt ID11 Priority/Priority Byte Offset 11 " hexmask.long.byte 0x00 19.--23. 1. "PRI10 ,Interrupt ID10 Priority/Priority Byte Offset 10 " hexmask.long.byte 0x00 11.--15. 1. "PRI9 ,Interrupt ID9 Priority/Priority Byte Offset 9 " hexmask.long.byte 0x00 3.--7. 1. "PRI8 ,Interrupt ID8 Priority/Priority Byte Offset 8 " group.long 0x1040C++0x03 line.long 0x00 "GICR_IPRIORITYR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 27.--31. 1. "PRI15 ,Interrupt ID15 Priority/Priority Byte Offset 15 " hexmask.long.byte 0x00 19.--23. 1. "PRI14 ,Interrupt ID14 Priority/Priority Byte Offset 14 " hexmask.long.byte 0x00 11.--15. 1. "PRI13 ,Interrupt ID13 Priority/Priority Byte Offset 13 " hexmask.long.byte 0x00 3.--7. 1. "PRI12 ,Interrupt ID12 Priority/Priority Byte Offset 12 " group.long 0x10410++0x03 line.long 0x00 "GICR_IPRIORITYR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 27.--31. 1. "PRI19 ,Interrupt ID19 Priority/Priority Byte Offset 19 " hexmask.long.byte 0x00 19.--23. 1. "PRI18 ,Interrupt ID18 Priority/Priority Byte Offset 18 " hexmask.long.byte 0x00 11.--15. 1. "PRI17 ,Interrupt ID17 Priority/Priority Byte Offset 17 " hexmask.long.byte 0x00 3.--7. 1. "PRI16 ,Interrupt ID16 Priority/Priority Byte Offset 16 " group.long 0x10414++0x03 line.long 0x00 "GICR_IPRIORITYR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 27.--31. 1. "PRI23 ,Interrupt ID23 Priority/Priority Byte Offset 23 " hexmask.long.byte 0x00 19.--23. 1. "PRI22 ,Interrupt ID22 Priority/Priority Byte Offset 22 " hexmask.long.byte 0x00 11.--15. 1. "PRI21 ,Interrupt ID21 Priority/Priority Byte Offset 21 " hexmask.long.byte 0x00 3.--7. 1. "PRI20 ,Interrupt ID20 Priority/Priority Byte Offset 20 " group.long 0x10418++0x03 line.long 0x00 "GICR_IPRIORITYR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 27.--31. 1. "PRI27 ,Interrupt ID27 Priority/Priority Byte Offset 27 " hexmask.long.byte 0x00 19.--23. 1. "PRI26 ,Interrupt ID26 Priority/Priority Byte Offset 26 " hexmask.long.byte 0x00 11.--15. 1. "PRI25 ,Interrupt ID25 Priority/Priority Byte Offset 25 " hexmask.long.byte 0x00 3.--7. 1. "PRI24 ,Interrupt ID24 Priority/Priority Byte Offset 24 " group.long 0x1041C++0x03 line.long 0x00 "GICR_IPRIORITYR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 27.--31. 1. "PRI31 ,Interrupt ID31 Priority/Priority Byte Offset 31 " hexmask.long.byte 0x00 19.--23. 1. "PRI30 ,Interrupt ID30 Priority/Priority Byte Offset 30 " hexmask.long.byte 0x00 11.--15. 1. "PRI29 ,Interrupt ID29 Priority/Priority Byte Offset 29 " hexmask.long.byte 0x00 3.--7. 1. "PRI28 ,Interrupt ID28 Priority/Priority Byte Offset 28 " newline rgroup.long 0x10C00++0x03 line.long 0x00 "GICR_ICFGR0,Interrupt Configuration Register 0" bitfld.long 0x00 31. "ICF[15],Interrupt configuration 15 (SGI)" "Level,Edge" bitfld.long 0x00 29. "ICF[14],Interrupt configuration 14 (SGI)" "Level,Edge" bitfld.long 0x00 27. "ICF[13],Interrupt configuration 13 (SGI)" "Level,Edge" bitfld.long 0x00 25. "ICF[12],Interrupt configuration 12 (SGI)" "Level,Edge" newline bitfld.long 0x00 23. "ICF[11],Interrupt configuration 11 (SGI)" "Level,Edge" bitfld.long 0x00 21. "ICF[10],Interrupt configuration 10 (SGI)" "Level,Edge" bitfld.long 0x00 19. "ICF[9],Interrupt configuration 9 (SGI)" "Level,Edge" bitfld.long 0x00 17. "ICF[8],Interrupt configuration 8 (SGI)" "Level,Edge" newline bitfld.long 0x00 15. "ICF[7],Interrupt configuration 7 (SGI)" "Level,Edge" bitfld.long 0x00 13. "ICF[6],Interrupt configuration 6 (SGI)" "Level,Edge" bitfld.long 0x00 11. "ICF[5],Interrupt configuration 5 (SGI)" "Level,Edge" bitfld.long 0x00 9. "ICF[4],Interrupt configuration 4 (SGI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF[3],Interrupt configuration 3 (SGI)" "Level,Edge" bitfld.long 0x00 5. "ICF[2],Interrupt configuration 2 (SGI)" "Level,Edge" bitfld.long 0x00 3. "ICF[1],Interrupt configuration 1 (SGI)" "Level,Edge" bitfld.long 0x00 1. "ICF[0],Interrupt configuration 0 (SGI)" "Level,Edge" group.long 0x10C04++0x03 line.long 0x00 "GICR_ICFGR1,Interrupt Configuration Register 1" bitfld.long 0x00 31. "ICF[15],Interrupt configuration 15 (PPI)" "Level,Edge" bitfld.long 0x00 29. "ICF[14],Interrupt configuration 14 (PPI)" "Level,Edge" bitfld.long 0x00 27. "ICF[13],Interrupt configuration 13 (PPI)" "Level,Edge" bitfld.long 0x00 25. "ICF[12],Interrupt configuration 12 (PPI)" "Level,Edge" newline bitfld.long 0x00 23. "ICF[11],Interrupt configuration 11 (PPI)" "Level,Edge" bitfld.long 0x00 21. "ICF[10],Interrupt configuration 10 (PPI)" "Level,Edge" bitfld.long 0x00 19. "ICF[9],Interrupt configuration 9 (PPI)" "Level,Edge" bitfld.long 0x00 17. "ICF[8],Interrupt configuration 8 (PPI)" "Level,Edge" newline bitfld.long 0x00 15. "ICF[7],Interrupt configuration 7 (PPI)" "Level,Edge" bitfld.long 0x00 13. "ICF[6],Interrupt configuration 6 (PPI)" "Level,Edge" bitfld.long 0x00 11. "ICF[5],Interrupt configuration 5 (PPI)" "Level,Edge" bitfld.long 0x00 9. "ICF[4],Interrupt configuration 4 (PPI)" "Level,Edge" newline bitfld.long 0x00 7. "ICF[3],Interrupt configuration 3 (PPI)" "Level,Edge" bitfld.long 0x00 5. "ICF[2],Interrupt configuration 2 (PPI)" "Level,Edge" bitfld.long 0x00 3. "ICF[1],Interrupt configuration 1 (PPI)" "Level,Edge" bitfld.long 0x00 1. "ICF[0],Interrupt configuration 0 (PPI)" "Level,Edge" newline tree.end tree "Peripheral/Component ID Registers" rgroup.long 0xFFE0++0x03 line.long 0x00 "GICR_PIDR0,Redistributor Identification Register 0" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFE4++0x03 line.long 0x00 "GICR_PIDR1,Redistributor Identification Register 1" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFE8++0x03 line.long 0x00 "GICR_PIDR2,Redistributor Identification Register 2" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFEC++0x03 line.long 0x00 "GICR_PIDR3,Redistributor Identification Register 3" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFF0++0x03 line.long 0x00 "GICR_PIDR4,Redistributor Identification Register 4" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFF4++0x03 line.long 0x00 "GICR_PIDR5,Redistributor Identification Register 5" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFF8++0x03 line.long 0x00 "GICR_PIDR6,Redistributor Identification Register 6" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFFC++0x03 line.long 0x00 "GICR_PIDR7,Redistributor Identification Register 7" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFD0++0x03 line.long 0x00 "GICR_PIDR4,Redistributor Identification Register 4" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFD4++0x03 line.long 0x00 "GICR_PIDR5,Redistributor Identification Register 5" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFD8++0x03 line.long 0x00 "GICR_PIDR6,Redistributor Identification Register 6" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFDC++0x03 line.long 0x00 "GICR_PIDR7,Redistributor Identification Register 7" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFF0++0x03 line.long 0x00 "GICR_CIDR0,Redistributor Component Identification Register 0" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFF4++0x03 line.long 0x00 "GICR_CIDR1,Redistributor Component Identification Register 1" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFF8++0x03 line.long 0x00 "GICR_CIDR2,Redistributor Component Identification Register 2" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" rgroup.long 0xFFFC++0x03 line.long 0x00 "GICR_CIDR3,Redistributor Component Identification Register 3" hexmask.long.byte 0x00 0.--7. 1. "COMPONENTID,Component ID" tree.end tree.end AUTOINDENT.OFF endif tree.end AUTOINDENT.POP tree.end endif sif (CORENAME()=="SC300") tree.close "Core Registers (Cortex-M3)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 11. group 0x10--0x1b line.long 0x00 "SYST_CSR,SysTick Control and Status Register" bitfld.long 0x00 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x00 2. " CLKSOURCE ,Clock Source" "External,Core" bitfld.long 0x00 1. " TICKINT ,SysTick Handler" "Not SysTick,SysTick" textline " " bitfld.long 0x00 0. " ENABLE ,Counter Enable" "Disabled,Enabled" ;group 0x14++0x03 line.long 0x04 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x04 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" ;group 0x18++0x03 line.long 0x08 "SYST_CVR,SysTick Current Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " CURRENT ,Current Value" rgroup 0x1c++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration Value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" textline " " rgroup 0xd00++0x03 line.long 0x00 "CPUID,CPU ID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,ARMv7-M" textline " " abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xC24=Cortex-M3" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" group 0xd04--0xd17 line.long 0x00 "ICSR,Interrupt Control State Register" bitfld.long 0x00 31. " NMIPENDSET ,Set Pending NMI Bit" "Not set,Set" bitfld.long 0x00 28. " PENDSVSET ,Set Pending pendSV Bit" "Not set,Set" bitfld.long 0x00 27. " PENDSVCLR ,Clear Pending pendSV Bit" "Not cleared,Cleared" textline " " bitfld.long 0x00 26. " PENDSTSET ,Set Pending SysTick Bit" "Not set,Set" bitfld.long 0x00 25. " PENDSTCLR ,Clear Pending SysTick Bit" "Not cleared,Cleared" bitfld.long 0x00 23. " ISRPREEMPT ,Use Only at Debug Time" "Not active,Active" textline " " bitfld.long 0x00 22. " ISRPENDING ,Interrupt Pending Flag" "Not pending,Pending" hexmask.long.word 0x00 12.--21. 1. " VECTPENDING ,Pending ISR Number Field" bitfld.long 0x00 11. " RETTOBASE ,Interrupt Exception" "Active,Not active" textline " " hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,Active ISR Number Field" ;group 0xd08++0x03 line.long 0x04 "VTOR,Vector Table Offset Register" bitfld.long 0x04 29. " TBLBASE ,Table Base" "Code,RAM" hexmask.long.tbyte 0x04 7.--28. 1. " TBLOFF ,Vector Table Base Offset Field" ;group 0xd0c++0x03 line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEY ,Register Key" rbitfld.long 0x08 15. " ENDIANESS ,Data endianness Bit" "Little,Big" bitfld.long 0x08 8.--10. " PRIGROUP ,Interrupt Priority Grouping Field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System Reset Request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Clear Active Vector Bit" "Not cleared,Cleared all" bitfld.long 0x08 0. " VECTRESET ,System Reset" "No reset,Reset" ;group 0xd10++0x03 line.long 0x0c "SCR,System Control Register" bitfld.long 0x0c 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0c 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x0c 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" ;group 0xd14++0x03 line.long 0x10 "CCR,Configuration Control Register" bitfld.long 0x10 9. " STKALIGN ,8-byte Stack Frame Alignment" "4-byte,8-byte" bitfld.long 0x10 8. " BFHFNMIGN ,Enable NMI, Hard Fault and FAULTMASK to Ignore Bus Fault" "Disabled,Enabled" textline " " bitfld.long 0x10 4. " DIV_0_TRP ,Trap Divide by Zero" "Disabled,Enabled" bitfld.long 0x10 3. " UNALIGN_TRP ,Trap for Unaligned Access" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " USERSETMPEND ,Enable User Access to the Software Trigger Exception Register" "Disabled,Enabled" bitfld.long 0x10 0. " NONEBASETHRDENA ,Control Entry to Thread Mode" "Only from last exception,Any level" group 0xd18--0xd23 line.long 0x00 "SHPR1,SSystem Handler Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " PRI_7 ,Priority of System Handler 7" hexmask.long.byte 0x00 16.--23. 1. " PRI_6 ,Priority of system handler 6(UsageFault)" hexmask.long.byte 0x00 8.--15. 1. " PRI_5 ,Priority of system handler 5(BusFault)" textline " " hexmask.long.byte 0x00 0.--7. 1. " PRI_4 ,Priority of system handler 4(MemManage)" line.long 0x04 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x04 24.--31. 1. " PRI_11 ,Priority of system handler 11(SVCall)" hexmask.long.byte 0x04 16.--23. 1. " PRI_10 ,Priority of System Handler 10" hexmask.long.byte 0x04 8.--15. 1. " PRI_9 ,Priority of System Handler 9" textline " " hexmask.long.byte 0x04 0.--7. 1. " PRI_8 ,Priority of System Handler 8" line.long 0x08 "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x08 24.--31. 1. " PRI_15 ,Priority of System Handler 15(SysTick)" hexmask.long.byte 0x08 16.--23. 1. " PRI_14 ,Priority of System Handler 14(PendSV)" hexmask.long.byte 0x08 8.--15. 1. " PRI_13 ,Priority of System Handler 13" textline " " hexmask.long.byte 0x08 0.--7. 1. " PRI_12 ,Priority of System Handler 12(DebugMonitor)" group 0xd24++0x3 line.long 0x00 "SHCSR,System Handler Control and State Register" bitfld.long 0x00 18. " USGFAULTENA ,USGFAULTENA" "Disabled,Enabled" bitfld.long 0x00 17. " BUSFAULTENA ,BUSFAULTENA" "Disabled,Enabled" bitfld.long 0x00 16. " MEMFAULTENA ,MEMFAULTENA" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " SVCALLPENDED ,SVCall is Pended Started" "Not replaced,Replaced" bitfld.long 0x00 14. " BUSFAULTPENDED ,BusFault is Pended Started" "Not replaced,Replaced" bitfld.long 0x00 13. " MEMFAULTPENDED ,MemManage is Pended Started" "Not replaced,Replaced" textline " " bitfld.long 0x00 11. " SYSTICKACT ,SysTick is Active" "Not active,Active" bitfld.long 0x00 10. " PENDSVACT ,PendSV is Active" "Not active,Active" bitfld.long 0x00 8. " MONITORACT ,Monitor is Active" "Not active,Active" textline " " bitfld.long 0x00 7. " SVCALLACT ,SVCall is Active" "Not active,Active" bitfld.long 0x00 3. " USGFAULTACT ,UsageFault is Active" "Not active,Active" bitfld.long 0x00 1. " BUSFAULTACT ,BusFault is Active" "Not active,Active" textline " " bitfld.long 0x00 0. " MEMFAULTACT ,MemManage is Active" "Not active,Active" group 0xd28--0xd3b line.byte 0x0 "MMFSR,Memory Manage Fault Status Register" bitfld.byte 0x0 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x0 4. " MSTKERR ,Stacking Access Violations" "No error,Error" bitfld.byte 0x0 3. " MUNSTKERR ,Unstack Access Violations" "No error,Error" textline " " bitfld.byte 0x0 1. " DACCVIOL ,Data Access Violation" "No error,Error" bitfld.byte 0x0 0. " IACCVIOL ,Instruction Access Violation" "No error,Error" ;group 0xd29++0x00 line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid" "Not valid,Valid" bitfld.byte 0x01 4. " STKERR ,Stacking from Exception has Caused Bus Faults" "No error,Error" bitfld.byte 0x01 3. " UNSTKERR ,Unstack from Exception Return has Caused Bus Faults" "No error,Error" textline " " bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise Data Bus Error" "No error,Error" bitfld.byte 0x01 1. " PRECISERR ,Precise Data Bus Error Return" "No error,Error" bitfld.byte 0x01 0. " IBUSERR ,Instruction Bus Error Flag" "No error,Error" ;group 0xd2a++0x01 line.word 0x02 "USAFAULT,Usage Fault Status Register" bitfld.word 0x02 9. " DIVBYZERO ,Illegal PC Load" "No error,Error" bitfld.word 0x02 8. " UNALIGNED ,Illegal Unaligned Access" "No error,Error" bitfld.word 0x02 3. " NOCP ,Attempt to use a coprocessor instruction" "No error,Error" textline " " bitfld.word 0x02 2. " INVPC ,Attempt to Load EXC_RETURN into PC Illegally" "No error,Error" bitfld.word 0x02 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error" bitfld.word 0x02 0. " UNDEFINSTR ,Illegal Processor State" "No error,Error" ;group 0xd2c++0x03 line.long 0x04 "HFSR,Hard Fault Status Register" bitfld.long 0x04 31. " DEBUGEVT ,This Bit is Set if There is a Fault Related to Debug" "No error,Error" bitfld.long 0x04 30. " FORCED ,Hard Fault Activated" "No error,Error" bitfld.long 0x04 1. " VECTTBL ,Bus Fault" "No error,Error" ;group 0xd30++0x03 line.long 0x08 "DFSR,Debug Fault Status Register" bitfld.long 0x08 4. " EXTERNAL ,External Debug Request Flag" "Not asserted,Asserted" bitfld.long 0x08 3. " VCATCH ,Vector Catch Flag" "Not occurred,Occurred" bitfld.long 0x08 2. " DWTTRAP ,Data Watchpoint and Trace (DWT) Flag" "Not matched,Matched" textline " " bitfld.long 0x08 1. " BKPT ,BKPT Flag" "Not executed,Executed" bitfld.long 0x08 0. " HALTED ,Halt Request Flag" "Not requested,Requested" ;group 0xd34++0x03 line.long 0xc "MMFAR,Memory Manage Fault Address Register" ;group 0xd38++0x03 line.long 0x10 "BFAR,Bus Fault Address Register" wgroup 0xf00++0x03 line.long 0x00 "STIR,Software Trigger Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be triggered" tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,Thumb instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " DBGMOD ,Support for memory-mapped debug model for M profile processors" "Not supported,Supported,?..." hgroup.long 0xD4C++0x03 hide.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,ACTLR only,?..." bitfld.long 0x00 16.--19. " TCMSUP ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "Level 1,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,PMSAv7,?..." hgroup.long 0xD54++0x03 hide.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD60++0x13 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,CDP/LDC/MCR/STC,CDP2/LDC2/MCR2/STC2,MCRR/MRRC,MCRR2/MRRC2,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." line.long 0x04 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x04 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x04 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x04 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x04 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Supported,Supported,?..." line.long 0x08 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x08 24.--27. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x08 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x08 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,Supported,Supported,Supported,?..." textline " " bitfld.long 0x08 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MLA,MLA/MLS,?..." bitfld.long 0x08 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x08 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x08 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,LDRD/STRD,?..." line.long 0x0C "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x0C 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x0C 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x0C 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x0C 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x0C 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x0C 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Supported,?..." textline " " bitfld.long 0x0C 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB,?..." line.long 0x10 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x10 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,?..." bitfld.long 0x10 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,Supported,Supported,Supported,?..." bitfld.long 0x10 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,DMB/DSB/ISB,?..." textline " " bitfld.long 0x10 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x10 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,Shift LSL 0-3,,Shift other,?..." bitfld.long 0x10 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,LDRBT/LDRT/STRBT/STRT/LDRHT/LDRSBT/LDRSHTSTRHT,?..." tree.end tree "CoreSight Identification Registers" width 6. rgroup.long 0xFE0++0x0F line.long 0x00 "PID0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "PID1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "PID2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "PID3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "CID0,Component ID0 (Preamble)" line.long 0x04 "CID1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " Preamble ,Preamble" line.long 0x08 "CID2,Component ID2" line.long 0x0c "CID3,Component ID3" tree.end else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 16.--23. " IREGION ,Instruction region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,Supported" group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RASR0,MPU Region Attribute and Size Register 0" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RASR1,MPU Region Attribute and Size Register 1" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RASR2,MPU Region Attribute and Size Register 2" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RASR3,MPU Region Attribute and Size Register 3" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RASR4,MPU Region Attribute and Size Register 4" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RASR5,MPU Region Attribute and Size Register 5" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RASR6,MPU Region Attribute and Size Register 6" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RASR7,MPU Region Attribute and Size Register 7" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RASR8,MPU Region Attribute and Size Register 8" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RASR9,MPU Region Attribute and Size Register 9" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RASR10,MPU Region Attribute and Size Register 10" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RASR11,MPU Region Attribute and Size Register 11" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RASR12,MPU Region Attribute and Size Register 12" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RASR13,MPU Region Attribute and Size Register 13" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RASR14,MPU Region Attribute and Size Register 14" textline " " textline " " endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" bitfld.long 0x00 28. " XN ,eXecute Never" "Execute,Not execute" bitfld.long 0x00 24.--26. " AP ,Data Access Permission" "No access,S:RW U:--,S:RW U:R-,S:RW U:RW,reserved,S:R- U:--,S:R- U:R-,S:R- U:R-" bitfld.long 0x00 19.--21. " TEX ,Type Extension Field" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 18. " S ,Shareable Bit" "Not shareable,Shareable" bitfld.long 0x00 17. " C ,Cacheable Bit" "Not cacheable,Cacheable" bitfld.long 0x00 16. " B ,Bufferable Bit" "Not bufferable,Bufferable" textline " " bitfld.long 0x00 15. " SRD[7..0] ,Subregion 7 Disable" "0,1" bitfld.long 0x00 14. ",Subregion 6 Disable" "0,1" bitfld.long 0x00 13. ",Subregion 5 Disable" "0,1" bitfld.long 0x00 12. ",Subregion 4 Disable" "0,1" bitfld.long 0x00 11. ",Subregion 3 Disable" "0,1" bitfld.long 0x00 10. ",Subregion 2 Disable" "0,1" bitfld.long 0x00 9. ",Subregion 1 Disabled" "0,1" bitfld.long 0x00 8. ",Subregion 0 Disable" "0,1" bitfld.long 0x00 1.--5. " SIZE ,Indicates the region size" "-,-,-,-,32 B,64 B,128 B,256 B,512 B,1 kB,2 kB,4 kB,8 kB,16 kB,32 kB,64 kB,128 kB,256 kB,512 kB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB" bitfld.long 0x00 0. " ENABLE ,Enables this region" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RASR15,MPU Region Attribute and Size Register 15" textline " " textline " " endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. rgroup.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,33-64,65-96,97-128,129-160,161-192,193-224,225-240,?..." tree "Interrupt Enable Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x100++0x7 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x100++0x0B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x100++0x0F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x100++0x13 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x100++0x17 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x100++0x1B line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x100++0x1F line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" line.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x100++0x1F hide.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" hide.long 0x04 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" hide.long 0x08 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" hide.long 0x0c "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" hide.long 0x10 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" hide.long 0x14 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" hide.long 0x18 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" hide.long 0x1c "IRQ224_239_EN_SET/CLR,Interrupt Enable Register" endif tree.end tree "Interrupt Pending Registers" width 23. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x200++0x07 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x200++0x0B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x200++0x0F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x200++0x13 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x200++0x17 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x200++0x1B line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x200++0x1F line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x04 31. 0x04 31. 0x84 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 30. 0x04 30. 0x84 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 29. 0x04 29. 0x84 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 28. 0x04 28. 0x84 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 27. 0x04 27. 0x84 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 26. 0x04 26. 0x84 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 25. 0x04 25. 0x84 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 24. 0x04 24. 0x84 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 23. 0x04 23. 0x84 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 22. 0x04 22. 0x84 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 21. 0x04 21. 0x84 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 20. 0x04 20. 0x84 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 19. 0x04 19. 0x84 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 18. 0x04 18. 0x84 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 17. 0x04 17. 0x84 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 16. 0x04 16. 0x84 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 15. 0x04 15. 0x84 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 14. 0x04 14. 0x84 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 13. 0x04 13. 0x84 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 12. 0x04 12. 0x84 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 11. 0x04 11. 0x84 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 10. 0x04 10. 0x84 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 9. 0x04 9. 0x84 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 8. 0x04 8. 0x84 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 7. 0x04 7. 0x84 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 6. 0x04 6. 0x84 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 5. 0x04 5. 0x84 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 4. 0x04 4. 0x84 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 3. 0x04 3. 0x84 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 2. 0x04 2. 0x84 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x04 1. 0x04 1. 0x84 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x04 0. 0x04 0. 0x84 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x08 31. 0x08 31. 0x88 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 30. 0x08 30. 0x88 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 29. 0x08 29. 0x88 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 28. 0x08 28. 0x88 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 27. 0x08 27. 0x88 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 26. 0x08 26. 0x88 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 25. 0x08 25. 0x88 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 24. 0x08 24. 0x88 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 23. 0x08 23. 0x88 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 22. 0x08 22. 0x88 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 21. 0x08 21. 0x88 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 20. 0x08 20. 0x88 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 19. 0x08 19. 0x88 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 18. 0x08 18. 0x88 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 17. 0x08 17. 0x88 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 16. 0x08 16. 0x88 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 15. 0x08 15. 0x88 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 14. 0x08 14. 0x88 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 13. 0x08 13. 0x88 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 12. 0x08 12. 0x88 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 11. 0x08 11. 0x88 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 10. 0x08 10. 0x88 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 9. 0x08 9. 0x88 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 8. 0x08 8. 0x88 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 7. 0x08 7. 0x88 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 6. 0x08 6. 0x88 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 5. 0x08 5. 0x88 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 4. 0x08 4. 0x88 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 3. 0x08 3. 0x88 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 2. 0x08 2. 0x88 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x08 1. 0x08 1. 0x88 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x08 0. 0x08 0. 0x88 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x0c 31. 0x0c 31. 0x8c 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 30. 0x0c 30. 0x8c 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 29. 0x0c 29. 0x8c 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 28. 0x0c 28. 0x8c 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 27. 0x0c 27. 0x8c 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 26. 0x0c 26. 0x8c 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 25. 0x0c 25. 0x8c 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 24. 0x0c 24. 0x8c 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 23. 0x0c 23. 0x8c 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 22. 0x0c 22. 0x8c 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 21. 0x0c 21. 0x8c 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 20. 0x0c 20. 0x8c 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 19. 0x0c 19. 0x8c 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 18. 0x0c 18. 0x8c 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 17. 0x0c 17. 0x8c 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 16. 0x0c 16. 0x8c 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 15. 0x0c 15. 0x8c 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 14. 0x0c 14. 0x8c 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 13. 0x0c 13. 0x8c 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 12. 0x0c 12. 0x8c 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 11. 0x0c 11. 0x8c 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 10. 0x0c 10. 0x8c 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 9. 0x0c 9. 0x8c 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 8. 0x0c 8. 0x8c 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 7. 0x0c 7. 0x8c 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 6. 0x0c 6. 0x8c 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 5. 0x0c 5. 0x8c 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 4. 0x0c 4. 0x8c 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 3. 0x0c 3. 0x8c 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 2. 0x0c 2. 0x8c 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x0c 1. 0x0c 1. 0x8c 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x0c 0. 0x0c 0. 0x8c 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x10 31. 0x10 31. 0x90 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 30. 0x10 30. 0x90 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 29. 0x10 29. 0x90 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 28. 0x10 28. 0x90 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 27. 0x10 27. 0x90 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 26. 0x10 26. 0x90 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 25. 0x10 25. 0x90 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 24. 0x10 24. 0x90 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 23. 0x10 23. 0x90 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 22. 0x10 22. 0x90 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 21. 0x10 21. 0x90 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 20. 0x10 20. 0x90 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 19. 0x10 19. 0x90 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 18. 0x10 18. 0x90 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 17. 0x10 17. 0x90 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 16. 0x10 16. 0x90 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 15. 0x10 15. 0x90 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 14. 0x10 14. 0x90 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 13. 0x10 13. 0x90 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 12. 0x10 12. 0x90 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 11. 0x10 11. 0x90 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 10. 0x10 10. 0x90 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 9. 0x10 9. 0x90 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 8. 0x10 8. 0x90 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 7. 0x10 7. 0x90 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 6. 0x10 6. 0x90 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 5. 0x10 5. 0x90 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 4. 0x10 4. 0x90 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 3. 0x10 3. 0x90 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 2. 0x10 2. 0x90 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x10 1. 0x10 1. 0x90 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x10 0. 0x10 0. 0x90 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x14 31. 0x14 31. 0x94 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 30. 0x14 30. 0x94 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 29. 0x14 29. 0x94 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 28. 0x14 28. 0x94 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 27. 0x14 27. 0x94 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 26. 0x14 26. 0x94 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 25. 0x14 25. 0x94 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 24. 0x14 24. 0x94 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 23. 0x14 23. 0x94 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 22. 0x14 22. 0x94 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 21. 0x14 21. 0x94 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 20. 0x14 20. 0x94 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 19. 0x14 19. 0x94 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 18. 0x14 18. 0x94 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 17. 0x14 17. 0x94 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 16. 0x14 16. 0x94 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 15. 0x14 15. 0x94 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 14. 0x14 14. 0x94 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 13. 0x14 13. 0x94 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 12. 0x14 12. 0x94 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 11. 0x14 11. 0x94 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 10. 0x14 10. 0x94 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 9. 0x14 9. 0x94 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 8. 0x14 8. 0x94 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 7. 0x14 7. 0x94 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 6. 0x14 6. 0x94 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 5. 0x14 5. 0x94 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 4. 0x14 4. 0x94 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 3. 0x14 3. 0x94 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 2. 0x14 2. 0x94 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x14 1. 0x14 1. 0x94 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x14 0. 0x14 0. 0x94 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x18 31. 0x18 31. 0x98 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 30. 0x18 30. 0x98 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 29. 0x18 29. 0x98 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 28. 0x18 28. 0x98 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 27. 0x18 27. 0x98 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 26. 0x18 26. 0x98 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 25. 0x18 25. 0x98 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 24. 0x18 24. 0x98 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 23. 0x18 23. 0x98 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 22. 0x18 22. 0x98 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 21. 0x18 21. 0x98 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 20. 0x18 20. 0x98 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 19. 0x18 19. 0x98 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 18. 0x18 18. 0x98 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 17. 0x18 17. 0x98 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 16. 0x18 16. 0x98 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 15. 0x18 15. 0x98 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 14. 0x18 14. 0x98 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 13. 0x18 13. 0x98 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 12. 0x18 12. 0x98 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 11. 0x18 11. 0x98 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 10. 0x18 10. 0x98 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 9. 0x18 9. 0x98 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 8. 0x18 8. 0x98 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 7. 0x18 7. 0x98 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 6. 0x18 6. 0x98 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 5. 0x18 5. 0x98 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 4. 0x18 4. 0x98 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 3. 0x18 3. 0x98 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 2. 0x18 2. 0x98 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x18 1. 0x18 1. 0x98 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x18 0. 0x18 0. 0x98 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" line.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x1c 15. 0x1c 15. 0x9c 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 14. 0x1c 14. 0x9c 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 13. 0x1c 13. 0x9c 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 12. 0x1c 12. 0x9c 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 11. 0x1c 11. 0x9c 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 10. 0x1c 10. 0x9c 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 9. 0x1c 9. 0x9c 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 8. 0x1c 8. 0x9c 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 7. 0x1c 7. 0x9c 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 6. 0x1c 6. 0x9c 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 5. 0x1c 5. 0x9c 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 4. 0x1c 4. 0x9c 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x1c 3. 0x1c 3. 0x9c 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 2. 0x1c 2. 0x9c 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 1. 0x1c 1. 0x9c 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x1c 0. 0x1c 0. 0x9c 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x200++0x1F hide.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x04 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x08 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x0c "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x10 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x14 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x18 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" hide.long 0x1c "IRQ224_239_PEN_SET/CLR,Interrupt Pending Register" endif tree.end tree "Interrupt Active Bit Registers" width 9. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) rgroup.long 0x300++0x07 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) rgroup.long 0x300++0x0B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) rgroup.long 0x300++0x0F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) rgroup.long 0x300++0x13 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) rgroup.long 0x300++0x17 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) rgroup.long 0x300++0x1B line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) rgroup.long 0x300++0x1F line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" line.long 0x04 "ACTIVE2,Active Bit Register 2" bitfld.long 0x04 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x04 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x04 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" line.long 0x08 "ACTIVE3,Active Bit Register 3" bitfld.long 0x08 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x08 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x08 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" line.long 0x0c "ACTIVE4,Active Bit Register 4" bitfld.long 0x0c 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x0c 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x0c 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" line.long 0x10 "ACTIVE5,Active Bit Register 5" bitfld.long 0x10 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x10 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x10 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" line.long 0x14 "ACTIVE6,Active Bit Register 6" bitfld.long 0x14 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x14 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x14 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" line.long 0x18 "ACTIVE7,Active Bit Register 7" bitfld.long 0x18 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x18 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x18 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" line.long 0x1c "ACTIVE8,Active Bit Register 8" bitfld.long 0x1c 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x1c 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x1c 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x300++0x1F hide.long 0x00 "ACTIVE1,Active Bit Register 1" hide.long 0x04 "ACTIVE2,Active Bit Register 2" hide.long 0x08 "ACTIVE3,Active Bit Register 3" hide.long 0x0c "ACTIVE4,Active Bit Register 4" hide.long 0x10 "ACTIVE5,Active Bit Register 5" hide.long 0x14 "ACTIVE6,Active Bit Register 6" hide.long 0x18 "ACTIVE7,Active Bit Register 7" hide.long 0x1c "ACTIVE8,Active Bit Register 8" endif tree.end tree "Interrupt Priority Registers" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x00) group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x01) group.long 0x400++0x3F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x02) group.long 0x400++0x5F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x03) group.long 0x400++0x7F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x04) group.long 0x400++0x9F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x05) group.long 0x400++0xBF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x06) group.long 0x400++0xDF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" elif (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x07) group.long 0x400++0xEF line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" line.long 0x20 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x20 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x20 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x20 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x20 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x24 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x24 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x24 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x24 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x24 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x28 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x28 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x28 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x28 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x28 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0x2C "IPR11,Interrupt Priority Register" hexmask.long.byte 0x2C 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0x2C 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0x2C 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0x2C 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x30 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x30 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x30 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x30 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x30 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x34 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x34 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x34 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x34 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x34 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x38 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x38 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x38 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x38 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x38 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x3C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x3C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x3C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x3C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x3C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" line.long 0x40 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x40 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x40 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x40 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x40 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x44 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x44 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x44 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x44 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x44 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x48 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x48 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x48 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x48 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x48 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0x4C "IPR19,Interrupt Priority Register" hexmask.long.byte 0x4C 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0x4C 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0x4C 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0x4C 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x50 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x50 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x50 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x50 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x50 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x54 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x54 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x54 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x54 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x54 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x58 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x58 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x58 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x58 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x58 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x5C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x5C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x5C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x5C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x5C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" line.long 0x60 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x60 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x60 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x60 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x60 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x64 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x64 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x64 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x64 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x64 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x68 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x68 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x68 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x68 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x68 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0x6C "IPR27,Interrupt Priority Register" hexmask.long.byte 0x6C 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0x6C 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0x6C 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0x6C 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x70 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x70 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x70 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x70 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x70 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x74 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x74 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x74 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x74 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x74 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x78 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x78 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x78 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x78 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x78 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x7C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x7C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x7C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x7C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x7C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" line.long 0x80 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x80 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x80 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x80 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x80 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x84 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x84 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x84 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x84 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x84 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x88 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x88 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x88 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x88 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x88 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0x8C "IPR35,Interrupt Priority Register" hexmask.long.byte 0x8C 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0x8C 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0x8C 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0x8C 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x90 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x90 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x90 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x90 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x90 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x94 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x94 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x94 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x94 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x94 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x98 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x98 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x98 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x98 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x98 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x9C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x9C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x9C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x9C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x9C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" line.long 0xA0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0xA0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0xA0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0xA0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0xA0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0xA4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0xA4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0xA4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0xA4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0xA4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0xA8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0xA8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0xA8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0xA8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0xA8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xAC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xAC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xAC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xAC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xAC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0xB0 "IPR44,Interrupt Priority Register" hexmask.long.byte 0xB0 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0xB0 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0xB0 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0xB0 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0xB4 "IPR45,Interrupt Priority Register" hexmask.long.byte 0xB4 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0xB4 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0xB4 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0xB4 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0xB8 "IPR46,Interrupt Priority Register" hexmask.long.byte 0xB8 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0xB8 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0xB8 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0xB8 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0xBC "IPR47,Interrupt Priority Register" hexmask.long.byte 0xBC 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0xBC 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0xBC 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0xBC 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" line.long 0xC0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0xC0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0xC0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0xC0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0xC0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0xC4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0xC4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0xC4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0xC4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0xC4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0xC8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0xC8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0xC8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0xC8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0xC8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xCC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xCC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xCC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xCC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xCC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0xD0 "IPR52,Interrupt Priority Register" hexmask.long.byte 0xD0 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0xD0 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0xD0 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0xD0 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0xD4 "IPR53,Interrupt Priority Register" hexmask.long.byte 0xD4 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0xD4 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0xD4 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0xD4 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0xD8 "IPR54,Interrupt Priority Register" hexmask.long.byte 0xD8 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0xD8 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0xD8 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0xD8 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0xDC "IPR55,Interrupt Priority Register" hexmask.long.byte 0xDC 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0xDC 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0xDC 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0xDC 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" line.long 0xE0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0xE0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0xE0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0xE0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0xE0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0xE4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0xE4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0xE4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0xE4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0xE4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0xE8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0xE8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0xE8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0xE8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0xE8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xEC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xEC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xEC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xEC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xEC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" else hgroup.long 0x400++0xEF hide.long 0x0 "IPR0,Interrupt Priority Register" hide.long 0x4 "IPR1,Interrupt Priority Register" hide.long 0x8 "IPR2,Interrupt Priority Register" hide.long 0xC "IPR3,Interrupt Priority Register" hide.long 0x10 "IPR4,Interrupt Priority Register" hide.long 0x14 "IPR5,Interrupt Priority Register" hide.long 0x18 "IPR6,Interrupt Priority Register" hide.long 0x1C "IPR7,Interrupt Priority Register" hide.long 0x20 "IPR8,Interrupt Priority Register" hide.long 0x24 "IPR9,Interrupt Priority Register" hide.long 0x28 "IPR10,Interrupt Priority Register" hide.long 0x2C "IPR11,Interrupt Priority Register" hide.long 0x30 "IPR12,Interrupt Priority Register" hide.long 0x34 "IPR13,Interrupt Priority Register" hide.long 0x38 "IPR14,Interrupt Priority Register" hide.long 0x3C "IPR15,Interrupt Priority Register" hide.long 0x40 "IPR16,Interrupt Priority Register" hide.long 0x44 "IPR17,Interrupt Priority Register" hide.long 0x48 "IPR18,Interrupt Priority Register" hide.long 0x4C "IPR19,Interrupt Priority Register" hide.long 0x50 "IPR20,Interrupt Priority Register" hide.long 0x54 "IPR21,Interrupt Priority Register" hide.long 0x58 "IPR22,Interrupt Priority Register" hide.long 0x5C "IPR23,Interrupt Priority Register" hide.long 0x60 "IPR24,Interrupt Priority Register" hide.long 0x64 "IPR25,Interrupt Priority Register" hide.long 0x68 "IPR26,Interrupt Priority Register" hide.long 0x6C "IPR27,Interrupt Priority Register" hide.long 0x70 "IPR28,Interrupt Priority Register" hide.long 0x74 "IPR29,Interrupt Priority Register" hide.long 0x78 "IPR30,Interrupt Priority Register" hide.long 0x7C "IPR31,Interrupt Priority Register" hide.long 0x80 "IPR32,Interrupt Priority Register" hide.long 0x84 "IPR33,Interrupt Priority Register" hide.long 0x88 "IPR34,Interrupt Priority Register" hide.long 0x8C "IPR35,Interrupt Priority Register" hide.long 0x90 "IPR36,Interrupt Priority Register" hide.long 0x94 "IPR37,Interrupt Priority Register" hide.long 0x98 "IPR38,Interrupt Priority Register" hide.long 0x9C "IPR39,Interrupt Priority Register" hide.long 0xA0 "IPR40,Interrupt Priority Register" hide.long 0xA4 "IPR41,Interrupt Priority Register" hide.long 0xA8 "IPR42,Interrupt Priority Register" hide.long 0xAC "IPR43,Interrupt Priority Register" hide.long 0xB0 "IPR44,Interrupt Priority Register" hide.long 0xB4 "IPR45,Interrupt Priority Register" hide.long 0xB8 "IPR46,Interrupt Priority Register" hide.long 0xBC "IPR47,Interrupt Priority Register" hide.long 0xC0 "IPR48,Interrupt Priority Register" hide.long 0xC4 "IPR49,Interrupt Priority Register" hide.long 0xC8 "IPR50,Interrupt Priority Register" hide.long 0xCC "IPR51,Interrupt Priority Register" hide.long 0xD0 "IPR52,Interrupt Priority Register" hide.long 0xD4 "IPR53,Interrupt Priority Register" hide.long 0xD8 "IPR54,Interrupt Priority Register" hide.long 0xDC "IPR55,Interrupt Priority Register" hide.long 0xE0 "IPR56,Interrupt Priority Register" hide.long 0xE4 "IPR57,Interrupt Priority Register" hide.long 0xE8 "IPR58,Interrupt Priority Register" hide.long 0xEC "IPR59,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 7. if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20000) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x20001) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 5. " C_SNAPSTALL ,Halting debug to gain control of the core" "Disabled,Enabled" bitfld.long 0x00 3. " C_MASKINTS ,Interrupts Mask" "Not masked,Masked" textline " " bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x0) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" elif (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDF0))&0x20001)==0x00001) group 0xDF0++0x03 line.long 0x00 "DHCSR,Debug Halting Control and Status Register" bitfld.long 0x00 31. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 30. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 29. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 28. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 27. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 26. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 25. " S_RESET_ST/DBGKEY ,Core Reset/Debug Key" "No reset,Reset" bitfld.long 0x00 24. " S_RETIRE_ST/DBGKEY ,Instruction completed since last read/Debug Key" "Not read,Read" textline " " bitfld.long 0x00 23. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 22. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 21. " DBGKEY ,Debug Key" "0,1" bitfld.long 0x00 20. " DBGKEY ,Debug Key" "0,1" textline " " bitfld.long 0x00 19. " S_LOCKUP/DBGKEY ,Core running and Lockup/Debug Key" "Not running,Running" bitfld.long 0x00 18. " S_SLEEP/DBGKEY ,Core is sleeping/Debug Key" "Not sleeping,Sleeping" textline " " bitfld.long 0x00 17. " S_HALT/DBGKEY ,Core Halted Status/Debug Key" "Not halted,Halted" bitfld.long 0x00 16. " S_REGRDY/DBGKEY ,Register Read/Write on the Debug Core Register Selector/Debug Key" "Not available,Available" textline " " bitfld.long 0x00 2. " C_STEP ,Core Step" "No step,Step" bitfld.long 0x00 1. " C_HALT ,Core Halted" "Not halted,Halted" textline " " bitfld.long 0x00 0. " C_DEBUGEN ,Debug Enable" "Disabled,Enabled" endif wgroup 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Register Read/Write" "Read,Write" bitfld.long 0x00 0.--4. " REGSEL ,Register Selection" "R0,R1,R2,R3,R4,R5,R6,R7,R8,R9,R10,R11,R12,R13,R14,R15,xPSR/ Flags,MSP,PSP,RAZ/WI,CONTROL/FAULTMASK/BASEPRI/PRIMASK,?..." group 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" textline " " bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception" "Disabled,Enabled" bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 10. group 0x00--0x27 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 8.--11. " NUM_LIT ,Number of Literal Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " NUM_CODE ,Number of Code Slots Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" ;group 0x04++0x03 line.long 0x04 "FP_REMAP,Flash Patch Remap Register" hexmask.long.tbyte 0x04 5.--28. 1. " REMAP ,Remap Base Address Field" ;group 0x08++0x03 line.long 0x8 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x8 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x8 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x8 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0xC "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0xC 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0xC 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0xC 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x10 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x10 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x10 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x10 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x14 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x14 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x14 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x14 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x18 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x18 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x18 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x18 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x1C "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x1C 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x1C 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x1C 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x20 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x20 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x20 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x20 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" line.long 0x24 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x24 30.--31. " REPLACE ,REPLACE" "Remap to remap address,Set BKPT on lower halfword,Set BKPT on upper halfword,Set BKPT on both" hexmask.long 0x24 2.--28. 1. " COMP ,Comparison Address" bitfld.long 0x24 0. " ENABLE ,Compare and Remap Enable" "Disabled,Enabled" tree "Coresight Management Registers" rgroup 0xfd0--0xfff line.long 0x00 "PID4,Peripheral ID4" line.long 0x04 "PID5,Peripheral ID5" line.long 0x08 "PID6,Peripheral ID6" line.long 0x0c "PID7,Peripheral ID7" line.long 0x10 "PID0,Peripheral ID0" line.long 0x14 "PID1,Peripheral ID1" line.long 0x18 "PID2,Peripheral ID2" line.long 0x1c "PID3,Peripheral ID3" line.long 0x20 "CID0,Component ID0" line.long 0x24 "CID1,Component ID1" line.long 0x28 "CID2,Component ID2" line.long 0x2c "CID3,Component ID3" tree.end else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 15. group 0x00--0x1B line.long 0x00 "DWT_CTRL,DWT Control Register" bitfld.long 0x00 28.--31. " NUMCOMP ,Number of Comparators Field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 22. " CYCEVTENA ,Enables Cycle Count Event" "Disabled,Enabled" bitfld.long 0x00 21. " FOLDEVTENA ,Enables Folded Instruction Count Event" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " LSUEVTENA ,Enables LSU Count Event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables Sleep Count Event" "Disabled,Enabled" bitfld.long 0x00 18. " EXCEVTENA ,Enables Interrupt Overhead Event" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " CPIEVTENA ,Enables CPI Count Event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables Interrupt Event Tracing" "Disabled,Enabled" bitfld.long 0x00 12. " PCSAMPLEENA ,Enables PC Sampling Event" "Disabled,Enabled" textline " " bitfld.long 0x00 10.--11. " SYNCTAP ,Feed Synchronization Pulse to the ITM SYNCEN Control" "Disabled,24,26,28" bitfld.long 0x00 9. " CYCTAP ,Selects a Tap on the DWT_CYCCNT Register" "Bit 6,Bit 10" bitfld.long 0x00 5.--8. " POSTCNT ,Post-Scalar Counter for CYCTAP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1.--4. " POSTPRESET ,Reload Value for POSTCNT Post-Scalar Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enable the DWT_CYCCNT Counter" "Disabled,Enabled" ;group 0x04++0x03 line.long 0x04 "DWT_CYCCNT,Cycle Count register" ;group 0x08++0x03 line.long 0x08 "DWT_CPICNT,DWT CPI Count Register" hexmask.long.byte 0x08 0.--7. 1. " CPICNT ,The base CPI counter" ;group 0x0c++0x03 line.long 0x0c "DWT_EXCCNT,DWT Exception Overhead Count Register" hexmask.long.byte 0x0c 0.--7. 1. " EXCCNT ,The exception overhead counter" ;group 0x10++0x03 line.long 0x10 "DWT_SLEEPCNT,DWT Sleep Count Register" hexmask.long.byte 0x10 0.--7. 1. " SLEEPCNT ,Sleep Counter" ;group 0x14++0x03 line.long 0x14 "DWT_LSUCNT,DWT LSU Count Register" hexmask.long.byte 0x14 0.--7. 1. " LSUCNT ,Load-store counter" ;group 0x18++0x03 line.long 0x18 "DWT_FOLDCNT,DWT Fold Count Register" hexmask.long.byte 0x18 0.--7. 1. " FOLDCNT ,Folded-instruction counter" group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" group.long 0x24++0x03 line.long 0x00 "DWT_MASK0,DWT Mask Registers 0" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x34++0x03 line.long 0x00 "DWT_MASK1,DWT Mask Registers 1" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x44++0x03 line.long 0x00 "DWT_MASK2,DWT Mask Registers 2" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x54++0x03 line.long 0x00 "DWT_MASK3,DWT Mask Registers 3" bitfld.long 0x00 0.--3. " MASK ,Mask on Data Address when Matching Against COMP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x28))&0x20)==0x00) group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x28++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Registers 0" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x38))&0x20)==0x00) group.long 0x38++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x38++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Registers 1" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x48))&0x20)==0x00) group.long 0x48++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x48++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Registers 2" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif if (((per.long(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x58))&0x20)==0x00) group.long 0x58++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Sample and emit PC through ITM,Emit data through ITM,Sample PC and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." else group.long 0x58++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Registers 3" bitfld.long 0x00 16.--19. " DATAVADDR1 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " DATAVADDR0 ,Data Value Comparator ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "byte,half,word,res" bitfld.long 0x00 9. " LNK1ENA ,DATAVADDR1 support" "Not Supported,Supported" bitfld.long 0x00 8. " DATAVMATCH ,Data value compare" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " CYCMATCH ,Comparator Compares Against the PC Sampler Counter" "Cleared,Set" bitfld.long 0x00 5. " EMITRANGE ,Emit Range Field" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. " FUNCTION ,FUNCTION settings" "Disabled,Emit address offset through ITM,Emit data and address offset through ITM,Emit address offset and data value through ITM,Watchpoint on PC match,Watchpoint on read,Watchpoint on write,Watchpoint on read or write,ETM trigger on PC match,ETM trigger on read,ETM trigger on write,ETM trigger on read or write,?..." endif tree "Coresight Management Registers" rgroup 0xfd0--0xfff line.long 0x00 "PID4,Peripheral ID4" line.long 0x04 "PID5,Peripheral ID5" line.long 0x08 "PID6,Peripheral ID6" line.long 0x0c "PID7,Peripheral ID7" line.long 0x10 "PID0,Peripheral ID1" line.long 0x14 "PID1,Peripheral ID2" line.long 0x18 "PID2,Peripheral ID3" line.long 0x1c "PID3,Peripheral ID4" line.long 0x20 "CID0,Component ID0" line.long 0x24 "CID1,Component ID1" line.long 0x28 "CID2,Component ID2" line.long 0x2c "CID3,Component ID3" tree.end else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end endif sif (CORENAME()=="CORTEXR52+") tree "ITMU" rgroup.long ad:0xC0020C00++0x0B line.long 0x00 "SSWSTS,SSW Status Register" bitfld.long 0x00 11. "BOOT_PINCFG,External Pin select boot mode" "0,1" bitfld.long 0x00 8.--10. "BOOT_CFG,Boot Mode Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "SECURE_BOOTEN,Secure Boot Enable" "0,1" bitfld.long 0x00 6. "CHSW_EN,Checker software Enable" "0,1" bitfld.long 0x00 4.--5. "BMHD_INDEX,BMHD Index indicator" "0,1,2,3" bitfld.long 0x00 2. "BMHD_COPY,BMHD Copy selection indicator" "0,1" newline bitfld.long 0x00 1. "BOOT_PIN,The boot mode selection is from HWCFG pins" "0,1" bitfld.long 0x00 0. "BMI_VALID,BMI Valid Flag" "0,1" line.long 0x04 "HWPINCFG,Hardware pin Configuration Register" bitfld.long 0x04 16. "LUDIS,Latch Update Disable" "0,1" bitfld.long 0x04 0.--2. "HWPINCFG,HWCFG Pin Configuration" "0,1,2,3,4,5,6,7" line.long 0x08 "ORIGCOPYINFO,Origin and Copy Valid Information Register" bitfld.long 0x08 1.--2. "CFGVD_STS,UCB Configuration Valid State" "0,1,2,3" bitfld.long 0x08 0. "CFGORIG,UCB Configuration Valid Region" "0,1" rgroup.long ad:0xC0020C20++0x17 line.long 0x00 "STMEM0,SSW Startup Checking Register0" bitfld.long 0x00 5. "BOOT_CS,Boot Check Start" "0,1" bitfld.long 0x00 4. "GPIO_CS,GPIO Configuration Check Start" "0,1" bitfld.long 0x00 3. "HSM_CS,HSM Configuration Check Start" "0,1" bitfld.long 0x00 2. "NVM_CS,NVM Configuration Check Start" "0,1" bitfld.long 0x00 1. "ITMU_CS,ITMU Configuration Check Start" "0,1" bitfld.long 0x00 0. "CHSWGEN_CS,Check Software Start" "0,1" line.long 0x04 "STMEM1,SSW Startup Checking Register1" bitfld.long 0x04 5. "BOOT_CF,Boot Check Fail" "0,1" bitfld.long 0x04 4. "GPIO_CF,GPIO Configuration Check Fail" "0,1" bitfld.long 0x04 3. "HSM_CF,HSM Configuration Check Fail" "0,1" bitfld.long 0x04 2. "NVM_CF,NVM Configuration Check Fail" "0,1" bitfld.long 0x04 1. "ITMU_CF,ITMU Configuration Check Fail" "0,1" bitfld.long 0x04 0. "CHSWGEN_CF,Check Software Fail" "0,1" line.long 0x08 "STMEM2,SSW Startup Checking Register2" bitfld.long 0x08 5. "BOOT_CP,Boot Check Pass" "0,1" bitfld.long 0x08 4. "GPIO_CP,GPIO Configuration Check Pass" "0,1" bitfld.long 0x08 3. "HSM_CP,HSM Configuration Check Pass" "0,1" bitfld.long 0x08 2. "NVM_CP,NVM Configuration Check Pass" "0,1" bitfld.long 0x08 1. "ITMU_CP,ITMU Configuration Check Pass" "0,1" bitfld.long 0x08 0. "CHSWGEN_CP,Check Software Pass" "0,1" line.long 0x0C "STMEM3,SSW Startup Checking Register3" bitfld.long 0x0C 5. "BOOT_CE,Boot Check End" "0,1" bitfld.long 0x0C 4. "GPIO_CE,GPIO Configuration Check End" "0,1" bitfld.long 0x0C 3. "HSM_CE,HSM Configuration Check End" "0,1" bitfld.long 0x0C 2. "NVM_CE,NVM Configuration Check End" "0,1" bitfld.long 0x0C 1. "ITMU_CE,ITMU Configuration Check End" "0,1" bitfld.long 0x0C 0. "CHSWGEN_CE,Check Software End" "0,1" line.long 0x10 "CPU0STRADDR,CPU0 Start Address Register" line.long 0x14 "CPU1STRADDR,CPU1 Start Address Register" group.long ad:0xC0020C4C++0x0B line.long 0x00 "RAMINI,RAM Initialization Selection Register" bitfld.long 0x00 0.--3. "SITS,RAM Initialization Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RAMINICTRL,RAM Initialization Control Register" bitfld.long 0x04 24.--25. "LMU3_EN,LMU3 Initialization Enable" "0,1,2,3" bitfld.long 0x04 22.--23. "LMU2_EN,LMU2 Initialization Enable" "0,1,2,3" bitfld.long 0x04 20.--21. "LMU1_EN,LMU1 Initialization Enable" "0,1,2,3" bitfld.long 0x04 18.--19. "CAN_EN,CAN Initialization Enable" "0,1,2,3" bitfld.long 0x04 16.--17. "GMU_EN,GMU Initialization Enable" "0,1,2,3" bitfld.long 0x04 14.--15. "CPU1CTCM_EN,CPU1 CTCM Initialization Enable" "0,1,2,3" newline bitfld.long 0x04 12.--13. "CPU1BTCM1_EN,CPU1 BTCM1 Initialization Enable" "0,1,2,3" bitfld.long 0x04 10.--11. "CPU1BTCM0_EN,CPU1 BTCM0 Initialization Enable" "0,1,2,3" bitfld.long 0x04 8.--9. "CPU1ATCM_EN,CPU1 ATCM Initialization Enable" "0,1,2,3" bitfld.long 0x04 6.--7. "CPU0CTCM_EN,CPU0 CTCM Initialization Enable" "0,1,2,3" bitfld.long 0x04 4.--5. "CPU0BTCM1_EN,CPU0 BTCM1 Initialization Enable" "0,1,2,3" bitfld.long 0x04 2.--3. "CPU0BTCM0_EN,CPU0 BTCM0 Initialization Enable" "0,1,2,3" newline bitfld.long 0x04 0.--1. "CPU0ATCM_EN,CPU0 ATCM Initialization Enable" "0,1,2,3" line.long 0x08 "RAMINISTS,RAM Initialization Status Register" bitfld.long 0x08 24. "LMU3_DONE,LMU3 Initialization Done Status" "0,1" bitfld.long 0x08 22. "LMU2_DONE,LMU2 Initialization Done" "0,1" bitfld.long 0x08 20. "LMU1_DONE,LMU3 Initialization Done" "0,1" bitfld.long 0x08 18. "CAN_DONE,CAN Initialization Done" "0,1" bitfld.long 0x08 16. "GMU_DONE,GMU Initialization Done" "0,1" bitfld.long 0x08 14. "CPU1CTCM_DONE,CPU1 CTCM Initialization Done" "0,1" newline bitfld.long 0x08 12. "CPU1BTCM1_DONE,CPU1 BTCM1 Initialization Done" "0,1" bitfld.long 0x08 10. "CPU1BTCM0_DONE,CPU1 BTCM0 Initialization Done" "0,1" bitfld.long 0x08 8. "CPU1ATCM_DONE,CPU 1ATCM Initialization Done" "0,1" bitfld.long 0x08 6. "CPU0CTCM_DONE,CPU0 CTCM Initialization Done" "0,1" bitfld.long 0x08 4. "CPU0BTCM1_DONE,CPU0 BTCM1 Initialization Done" "0,1" bitfld.long 0x08 2. "CPU0BTCM0_DONE,CPU0 BTCM0 Initialization Done" "0,1" newline bitfld.long 0x08 0. "CPU0ATCM_DONE,CPU0 ATCM Initialization Done" "0,1" rgroup.long ad:0xC0020C58++0x03 line.long 0x00 "BOOTCOREID,Boot Core ID Register" hexmask.long.byte 0x00 0.--7. 1. "BOOTCOREID,Boot Core ID Selection" group.long ad:0xC0020C5C++0x03 line.long 0x00 "CPURUN,CPU Running Start Register" bitfld.long 0x00 0. "CPURUNST,CPU Run State" "0,1" rgroup.long ad:0xC0020C70++0x07 line.long 0x00 "SYSMODE,System Mode Register" hexmask.long.byte 0x00 0.--7. 1. "SYSMODE,System Mode" line.long 0x04 "INITSTS,Flash Initialization Status Register" bitfld.long 0x04 25. "DF1RECALLTRIMC,DFLASH1 Recall TRIMC" "0,1" bitfld.long 0x04 24. "SFRECALLDONE,SFLASH Recall DONE" "0,1" bitfld.long 0x04 17. "SFRECALLTRIMC,SFLASH Recall TRIMC" "0,1" bitfld.long 0x04 16. "DFRECALLDONE,DFLASH Recall DONE" "0,1" bitfld.long 0x04 9. "PF1RECALLTRIMC,PFLASH1Recall TRIMC" "0,1" bitfld.long 0x04 8. "PF1RECALLDONE,PFLASH1Recall DONE" "0,1" newline bitfld.long 0x04 1. "PF0RECALLTRIMC,PFLASH0 Recall TRIMC" "0,1" bitfld.long 0x04 0. "PF0RECALLDONE,PFLASH0 Recall DONE" "0,1" group.long ad:0xC0020C78++0x13 line.long 0x00 "INITFAULTCTRL,Initialization Fault Control Register" bitfld.long 0x00 16.--17. "TIMEOUTFLT_EN,Timeout Fault Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "TESTFLT_EN,Test Fault Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "STATUSFLT_EN,State Fault Enable" "0,1,2,3" line.long 0x04 "INITMASK,Bus Error Mask Register" bitfld.long 0x04 0. "BUSERRMSK,Bus Error Mask" "0,1" line.long 0x08 "SERRPORSTS,Error Status Register" bitfld.long 0x08 16. "TIMEOUTERR,TIMEOUT ERROR" "0,1" bitfld.long 0x08 0. "BUSERR,BUS ERROR" "0,1" line.long 0x0C "SERRSYSSTS,Error Status Register" bitfld.long 0x0C 25. "ROBUSERR,Read Only and Protect BUS Error" "0,1" bitfld.long 0x0C 24. "ESEERR,E and SE Error" "0,1" bitfld.long 0x0C 16. "RDNERR,RND Error" "0,1" bitfld.long 0x0C 9. "TESTMODERR,Test Mode Error" "0,1" bitfld.long 0x0C 8. "CMPERR,Compare Error" "0,1" bitfld.long 0x0C 1. "STATUSERR,Status Error" "0,1" newline bitfld.long 0x0C 0. "CMPERR_OV,Compare Error Overflow" "0,1" line.long 0x10 "SAFEENINIT,Safety Enable Register" bitfld.long 0x10 4.--5. "TESTMODERREN,TESTMODERR error check Enable" "0,1,2,3" bitfld.long 0x10 2.--3. "STATUSERREN,STATUSERR error check Enable" "0,1,2,3" bitfld.long 0x10 0.--1. "RDNEN,RDNERR error check Enable" "0,1,2,3" rgroup.long ad:0xC0020CA0++0x0B line.long 0x00 "BUSERRADDR0,Bus Error Address Register" hexmask.long 0x00 2.--31. 1. "BUSERRADDR,Bus Error Address Record" bitfld.long 0x00 0. "ERRVD,BUSERR ERR Record Valid" "0,1" line.long 0x04 "BUSERRADDR1,Bus Error Address Register" hexmask.long 0x04 2.--31. 1. "BUSERRADDR,Bus Error Address Record" bitfld.long 0x04 0. "ERRVD,BUSERR ERR Record Valid" "0,1" line.long 0x08 "BUSERRADDR2,Bus Error Address Register" hexmask.long 0x08 2.--31. 1. "BUSERRADDR,Bus Error Address Record" bitfld.long 0x08 0. "ERRVD,BUSERR ERR Record Valid" "0,1" rgroup.long ad:0xC0020CB0++0x0B line.long 0x00 "BUSERRDATA0,Bus Error Data Register" line.long 0x04 "BUSERRDATA1,Bus Error Data Register" line.long 0x08 "BUSERRDATA2,Bus Error Data Register" rgroup.long ad:0xC0020CC0++0x0B line.long 0x00 "CMPERRADDR0,TRIM Compare Error Address Register" hexmask.long 0x00 2.--31. 1. "CMPERRADDR,Compare Error Address" bitfld.long 0x00 0. "ERRVD,Error Address Valid" "0,1" line.long 0x04 "CMPERRADDR1,TRIM Compare Error Address Register" hexmask.long 0x04 2.--31. 1. "CMPERRADDR,Compare Error Address" bitfld.long 0x04 0. "ERRVD,Error Address Valid" "0,1" line.long 0x08 "CMPERRADDR2,TRIM Compare Error Address Register" hexmask.long 0x08 2.--31. 1. "CMPERRADDR,Compare Error Address" bitfld.long 0x08 0. "ERRVD,Error Address Valid" "0,1" rgroup.long ad:0xC0020CD0++0x0B line.long 0x00 "CMPERRDATA0,TRIM Compare Error Data Register" line.long 0x04 "CMPERRDATA1,TRIM Compare Error Data Register" line.long 0x08 "CMPERRDATA2,TRIM Compare Error Data Register" rgroup.long ad:0xC0020CE0++0x13 line.long 0x00 "HWINITSTS0,Hardware Initialization Status Register0" bitfld.long 0x00 0. "HWINITDONE,Hardware Initialization Done" "0,1" line.long 0x04 "HWINITSTS1,Hardware Initialization Status Register1" bitfld.long 0x04 0. "HWINITFLAG,Hardware Initialization FLAG" "0,1" line.long 0x08 "LCSTS,Life-cycle Status Register" bitfld.long 0x08 0.--2. "LC_STS,Life Cycle Status" "0,1,2,3,4,5,6,7" line.long 0x0C "CENSORSHIP,Censorship Register" line.long 0x10 "DBGLCK,DBG Lock Register" group.long ad:0xC0020CF4++0x07 line.long 0x00 "BUSLCKCTRL,Bus Lockstep Control Register" bitfld.long 0x00 0.--1. "BUSLCK,Bus Lockstep" "0,1,2,3" line.long 0x04 "BUSFAULTCTRL,Bus Fault Injection Register" bitfld.long 0x04 0.--1. "BUSFAULTCTRL,Bus Fault Injection" "0,1,2,3" rgroup.long ad:0xC0020D00++0x03 line.long 0x00 "PACKAGEID,Package Identity Register" hexmask.long.byte 0x00 0.--7. 1. "PACKAGEID,Package Identity" tree.end tree "Common Registers" rgroup.long ad:0xC0100000++0x03 line.long 0x00 "IDR,NVMC ID Register" group.long ad:0xC0100004++0x07 line.long 0x00 "DFCON,Data Flash Control Register" bitfld.long 0x00 24.--26. "CLKDIV,System Clock Divider" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--20. "STO1,Erase/Program Timer Parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 8.--15. 1. "STO0,Erase/Program Timer Parameter 0" bitfld.long 0x00 0.--3. "RDT,Read Delay Time (TRDT) Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "PFCON,Program Flash Control Register" bitfld.long 0x04 24.--26. "CLKDIV,System Clock Divider" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--20. "STO1,Erase/Program Timer Parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x04 8.--15. 1. "STO0,Erase/Program Timer Parameter 0" bitfld.long 0x04 0.--3. "RDT,Read Delay Time (TRDT) Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC0100020++0x03 line.long 0x00 "SWAPCON,Swap Control Register" bitfld.long 0x00 10.--12. "DWIDX,Valid SWAP Configure Offset" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--9. "TARGET,Reserved" "0,1,2,3" hexmask.long.byte 0x00 0.--7. 1. "CFG,Swap Configuration" group.long ad:0xC0100100++0x0B line.long 0x00 "PRTMSKINT,Interrupt Mask Register" bitfld.long 0x00 6.--7. "MNVRNFE,Mask NVR NF MPU Register Modify Error Interrupt" "0,1,2,3" bitfld.long 0x00 4.--5. "MNVRBSE,Mask NVR BS MPU Register Modify Error Interrupt" "0,1,2,3" bitfld.long 0x00 2.--3. "MPFMAINE,Mask PFLASH MAIN MPU Register Modify Error Interrupt" "0,1,2,3" bitfld.long 0x00 0.--1. "MDFMAINE,Mask DFLASH MAIN MPU Register Modify Error Interrupt" "0,1,2,3" line.long 0x04 "SAMSKALM,Safe Alarm Mask Register" bitfld.long 0x04 0.--1. "MREGRDNE,Mask NVMC Register Redundancy Error Alarm" "0,1,2,3" line.long 0x08 "SAMSKBE,Safe Bus Error Mask Register" bitfld.long 0x08 0.--1. "MAHBERR,Mask AHB Bus Error Generated by NVMC Register" "0,1,2,3" group.long ad:0xC0100200++0x0B line.long 0x00 "PRTSTS,Protection Status Register" bitfld.long 0x00 6. "NVRNFE,NVR NF MPU Register Modify Error Status" "0,1" bitfld.long 0x00 4. "NVRBSE,NVR BS MPU Register Modify Error Status" "0,1" bitfld.long 0x00 2. "PFMAINE,PFLASH0 MAIN MPU Register Modify Error Status" "0,1" bitfld.long 0x00 0. "DFMAINE,DFLASH MAIN MPU Register Modify Error Status" "0,1" line.long 0x04 "SASTS,Safe Status Register" bitfld.long 0x04 31. "REGSAFEE,Write E/SE Register Without Unlock E/SE Protect Error Status" "0,1" bitfld.long 0x04 0. "REGRDNE,NVMC Register Redundancy Error Status" "0,1" line.long 0x08 "EPRSTSTS,Erase/Program Break by Reset Status Register" bitfld.long 0x08 1. "EPBRKMOD,Reset Break Erase/Program Mode" "0,1" bitfld.long 0x08 0. "EPBRKFLG,Reset Break Status" "0,1" rgroup.long ad:0xC010020C++0x03 line.long 0x00 "RDTSTS,Read Delay Time Switch Status Register" bitfld.long 0x00 1. "PRDTBUSY,PFLASH RDT Switch State" "0,1" bitfld.long 0x00 0. "DRDTBUSY,DFLASH RDT Switch State" "0,1" group.long ad:0xC0100400++0x07 line.long 0x00 "NVREWMPU,NVR Erase and Write MPU Register" bitfld.long 0x00 16.--17. "PFSA0,PFLASH0 NVR Sector 0 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 6.--7. "DFSA3,DF0 NVR Sector 3 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 4.--5. "DFSA2,DF0 NVR Sector 2 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 2.--3. "DFSA1,DF0 NVR Sector 1 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 0.--1. "DFSA0,DF0 NVR Sector 0 Erase and Write Permission" "0,1,2,3" line.long 0x04 "NVRRMPU,NVR Read MPU Register" bitfld.long 0x04 3. "DFSA3,DF0 NVR Sector 3 Read Permission" "0,1" bitfld.long 0x04 2. "DFSA2,DF0 NVR Sector 2 Read Permission" "0,1" bitfld.long 0x04 1. "DFSA1,DF0 NVR Sector 1 Read Permission" "0,1" bitfld.long 0x04 0. "DFSA0,DF0 NVR Sector 0 Read Permission" "0,1" tree.end tree "BROM" group.long ad:0xC0101000++0x07 line.long 0x00 "CTR,BROM Control Register" bitfld.long 0x00 0.--1. "MODE,BROM Sleep Mode" "0,1,2,3" line.long 0x04 "FIT,BROM Fault Injection Test Register" bitfld.long 0x04 12.--13. "AEDCINJ,Bus AR Channel Address EDC Fault Injection" "0,1,2,3" bitfld.long 0x04 10.--11. "CEDCINJ,Bus AR Channel CTRL EDC Fault Injection" "0,1,2,3" bitfld.long 0x04 8.--9. "CPTYINJ,Bus AR Channel PTY Fault Injection" "0,1,2,3" bitfld.long 0x04 0.--1. "INJSEL,Fault Injection Position Select" "0,1,2,3" group.long ad:0xC0101100++0x07 line.long 0x00 "SAMSKALM,BROM Safe Alarm Mask Register" bitfld.long 0x00 2.--3. "MARE,Mask AREE and ARPE Alarms" "0,1,2,3" line.long 0x04 "SAMSKBE,BROM Safe Bus Error Mask Register" bitfld.long 0x04 2.--3. "MARE,Mask AREE and ARPE Bus Error" "0,1,2,3" group.long ad:0xC0101200++0x03 line.long 0x00 "SASTS,BROM Safe Status Register" bitfld.long 0x00 3. "ARPE,Bus AR Channel Parity Error" "0,1" bitfld.long 0x00 2. "AREE,Bus AR Channel ECC Error" "0,1" rgroup.long ad:0xC0101204++0x03 line.long 0x00 "STS,BROM Status Register" bitfld.long 0x00 0. "SLP,BROM Sleep State" "0,1" tree.end tree "DFLASH0" group.long ad:0xC0108000++0x23 line.long 0x00 "CTR0,DF0/PF0/PF1 Control Register 0" bitfld.long 0x00 4.--5. "SSLMLVL,Sleep Mode" "0,1,2,3" bitfld.long 0x00 2.--3. "SCELVL,Software Control Flash Enable Signal" "0,1,2,3" bitfld.long 0x00 0.--1. "CEMOD,Flash Enable Signal Controller" "0,1,2,3" line.long 0x04 "CTR1,DF0/PF0/PF1 Control Register 1" bitfld.long 0x04 0.--1. "BUFEN,Read Buffer Enable" "0,1,2,3" line.long 0x08 "CTR2,DF0/PF0/PF1 Control Register 2" rbitfld.long 0x08 6.--7. "LOCK,Flash Lock State" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "MID,Flash Master ID" line.long 0x0C "CTR3,DF0/PF0/PF1 Control Register 3" hexmask.long.tbyte 0x0C 13.--31. 1. "EADDR,DFLASH Erase Sector Address" line.long 0x10 "CTR4,DF0/PF0/PF1 Control Register 4" bitfld.long 0x10 4.--6. "ETYP,Erase Type Select" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--1. "ESTART,Erase Start" "0,1,2,3" line.long 0x14 "CTR5,DF0/PF0/PF1 Control Register 5" hexmask.long 0x14 4.--31. 1. "ECADDR,Erase Check Address" bitfld.long 0x14 2. "ECLEN,Erase Check Type" "0,1" bitfld.long 0x14 0.--1. "ECEN,Erase Check Start" "0,1,2,3" line.long 0x18 "CTR6,DF0/PF0/PF1 Control Register 6" hexmask.long.byte 0x18 0.--7. 1. "CANCEL,Cancel Erase/Write Operation" line.long 0x1C "CTR7,DF0/PF0/PF1 Control Register 7" bitfld.long 0x1C 10. "PEXTRA,Program Progress Control" "0,1" bitfld.long 0x1C 8.--9. "PTYP,Program Type" "0,1,2,3" bitfld.long 0x1C 0.--2. "PBL,Program Length" "0,1,2,3,4,5,6,7" line.long 0x20 "CTR8,DF0/PF0/PF1 Control Register 8" bitfld.long 0x20 30.--31. "OVTE,Program Overtime Enable" "0,1,2,3" hexmask.long.tbyte 0x20 0.--23. 1. "OVTIME,Overtime" group.long ad:0xC0108030++0x17 line.long 0x00 "FIT0,DF0/PF0/PF1 Fault Injection Test Register 0" bitfld.long 0x00 24.--25. "AFITE,Read Redundancy Address Check Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "ECCFITE,Read ECC Check Bit Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DFITE,Read Data Fault Injection Enable" "0,1,2,3" line.long 0x04 "FIT1,DF0/PF0/PF1 Fault Injection Test Register 1" bitfld.long 0x04 24.--27. "AFIT,Read Redundancy Address Fault Injection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--20. "ECCFIT,ECC Check Bit Fault Injection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 15. "DFHIT,Data High Bit Fault Injection" "0,1" bitfld.long 0x04 14. "DFLIT,Data Low Bit Fault Injection" "0,1" hexmask.long.byte 0x04 0.--6. 1. "DFMIT,Data Middle Bit Fault Injection" line.long 0x08 "FIT2,DF0/PF0/PF1 Fault Injection Test Registe1r 2" bitfld.long 0x08 14.--15. "WDEDCINJ,Bus W Channel EDC Fault Injection" "0,1,2,3" bitfld.long 0x08 12.--13. "AEDCINJ,Bus AR Channel Address EDC Fault Injection" "0,1,2,3" bitfld.long 0x08 10.--11. "CEDCINJ,Bus AR Channel CTRL EDC Fault Injection" "0,1,2,3" bitfld.long 0x08 8.--9. "CPTYINJ,Bus AR Channel PTY Fault Injection" "0,1,2,3" bitfld.long 0x08 0.--1. "INJSEL,Fault Injection Position Select" "0,1,2,3" line.long 0x0C "ECCCTR,DF0/PF0/PF1 ECC Control Register" bitfld.long 0x0C 2.--3. "ECCDEN,ECC Decode Enable" "0,1,2,3" bitfld.long 0x0C 0.--1. "ECCEEN,ECC Encode Enable" "0,1,2,3" line.long 0x10 "ECCTESTCTR,DF0/PF0/PF1 ECC Test Control Register" bitfld.long 0x10 2.--3. "RDEN,ECC Read Test Enable" "0,1,2,3" bitfld.long 0x10 0.--1. "WREN,ECC Write Test Enable" "0,1,2,3" line.long 0x14 "ECCDATCTR,DF0/PF0/PF1 ECC Test Data Register" hexmask.long.word 0x14 0.--12. 1. "DATA,ECC Write Test Data" group.long ad:0xC0108100++0x13 line.long 0x00 "MSKINT,DF0/PF0/PF1 Interrupt Mask Register" bitfld.long 0x00 20.--21. "MPOVT,Mask Program Overtime Interrupt" "0,1,2,3" bitfld.long 0x00 18.--19. "MMISAE,Mask Program Miss Align Error Interrupt" "0,1,2,3" bitfld.long 0x00 16.--17. "MESQE,Mask Erase Sequence Error Interrupt" "0,1,2,3" bitfld.long 0x00 8.--9. "MCF,Mask Cancel Finish Interrupt" "0,1,2,3" bitfld.long 0x00 4.--5. "MECF,Mask Erase Check Finish Interrupt" "0,1,2,3" bitfld.long 0x00 2.--3. "MPF,Mask Program Finish Interrupt" "0,1,2,3" bitfld.long 0x00 0.--1. "MEF,Mask Erase Finish Interrupt" "0,1,2,3" line.long 0x04 "SAMSKALM0,DF0/PF0/PF1 Safe Alarm Mask Register 0" bitfld.long 0x04 18.--19. "MTRIMC,Mask TRIMC Alarm" "0,1,2,3" bitfld.long 0x04 14.--15. "MEARE,Mask EARE Alarm" "0,1,2,3" bitfld.long 0x04 12.--13. "MUCRE,Mask UCRE Alarm" "0,1,2,3" bitfld.long 0x04 10.--11. "MCROE,Mask CROE Alarm" "0,1,2,3" bitfld.long 0x04 8.--9. "MCRE,Mask CRE Alarm" "0,1,2,3" bitfld.long 0x04 6.--7. "MDARE,Mask DARE Alarm" "0,1,2,3" bitfld.long 0x04 4.--5. "MRERR,Mask RERR Alarm" "0,1,2,3" newline bitfld.long 0x04 2.--3. "MWERR,Mask WERR Alarm" "0,1,2,3" bitfld.long 0x04 0.--1. "MRDERS,Mask RDERS Alarm" "0,1,2,3" line.long 0x08 "SAMSKBE0,DF0/PF0/PF1 Safe Bus Error Mask Register 0" bitfld.long 0x08 12.--13. "MUCRE,Mask UCRE Bus Error" "0,1,2,3" bitfld.long 0x08 4.--5. "MRERR,Mask RERR Bus Error" "0,1,2,3" bitfld.long 0x08 2.--3. "MWERR,Mask WERR Bus Error" "0,1,2,3" line.long 0x0C "SAMSKALM1,DF0/PF0/PF1 Safe Alarm Mask Register 1" bitfld.long 0x0C 4.--5. "MWE,Mask WEE and WPE Alarms" "0,1,2,3" bitfld.long 0x0C 2.--3. "MARE,Mask AREE and ARPE Alarms" "0,1,2,3" bitfld.long 0x0C 0.--1. "MAWE,Mask AWEE and AWPE Alarms" "0,1,2,3" line.long 0x10 "SAMSKBE1,DF0/PF0/PF1 Safe Bus Error Mask Register 1" bitfld.long 0x10 4.--5. "MWE,Mask WEE and WPE Bus Error" "0,1,2,3" bitfld.long 0x10 2.--3. "MARE,Mask AREE and ARPE Bus Error" "0,1,2,3" bitfld.long 0x10 0.--1. "MAWE,Mask AWEE and AWPE Bus Error" "0,1,2,3" group.long ad:0xC0108200++0x0B line.long 0x00 "STS,DF0/PF0/PF1 Status Register" rbitfld.long 0x00 26. "ECBUSY,FLASH Current Erase Check Operation Status" "0,1" rbitfld.long 0x00 25. "PROGBUSY,FLASH Current Program Operation Status" "0,1" rbitfld.long 0x00 24. "ERSBUSY,FLASH Current Erase Operation Status" "0,1" bitfld.long 0x00 20. "POVT,Program Overtime Status" "0,1" bitfld.long 0x00 18. "MISAE,Program Miss Align Error Status" "0,1" bitfld.long 0x00 16. "ESQE,Erase Sequence Error Status" "0,1" bitfld.long 0x00 10. "CDF,Cancel Finish Status" "0,1" newline bitfld.long 0x00 8. "CF,Cancel Finish Redundancy Status" "0,1" bitfld.long 0x00 5. "ECSTS,Erase Check Result" "0,1" bitfld.long 0x00 4. "ECF,Erase Check Finished Status" "0,1" bitfld.long 0x00 3. "PROGE,Program Error Status" "0,1" bitfld.long 0x00 2. "PROGF,Program Finished Status" "0,1" bitfld.long 0x00 1. "ERSE,Erase Error Status" "0,1" bitfld.long 0x00 0. "ERSF,Erase Finished Status" "0,1" line.long 0x04 "SASTS0,DF0/PF0/PF1 Safe Status Register 0" rbitfld.long 0x04 31. "TRIMC,NVM TRIMC Port Status" "0,1" bitfld.long 0x04 18. "TRIMCE,NVM TRIMC Port State After Recall Finished" "0,1" bitfld.long 0x04 14. "EARE,ECC Main Channel and Redundant Channel Inconsistency Error" "0,1" bitfld.long 0x04 12. "UCRE,ECC Unrepairable Fault Error" "0,1" bitfld.long 0x04 10. "CROE,ECC Reparable Fault Occurred Over 5 Times Error" "0,1" bitfld.long 0x04 8. "CRE,ECC Reparable Fault Error" "0,1" bitfld.long 0x04 6. "DARE,Read Main Channel and Redundant Channel Inconsistency Error" "0,1" newline bitfld.long 0x04 4. "RERR,Read Permission Error" "0,1" bitfld.long 0x04 2. "WERR,Program Permission Error" "0,1" bitfld.long 0x04 0. "RDERS,Region Read State" "0,1" line.long 0x08 "SASTS1,DF0/PF0/PF1 Safe Status Register 1" bitfld.long 0x08 5. "WPE,Bus W Channel Parity Error" "0,1" bitfld.long 0x08 4. "WEE,Bus W Channel ECC Error" "0,1" bitfld.long 0x08 3. "ARPE,Bus AR Channel Parity Error" "0,1" bitfld.long 0x08 2. "AREE,Bus AR Channel ECC Error" "0,1" bitfld.long 0x08 1. "AWPE,Bus AW Channel Parity Error" "0,1" bitfld.long 0x08 0. "AWEE,Bus AW Channel ECC Error" "0,1" rgroup.long ad:0xC0108300++0x03 line.long 0x00 "SAINFn,DF0/PF0/PF1 Ecc Error Information Register n" hexmask.long 0x00 4.--31. 1. "DFEA,ECC Error PWord Address Record" bitfld.long 0x00 0. "DFAV,Address Valid Status" "0,1" group.long ad:0xC0108400++0x03 line.long 0x00 "EWMPU0,DF0/PF0/PF1 Erase and Write MPU Register 0" bitfld.long 0x00 0.--1. "DFMAIN,DFLASH0 Main Region Erase and Write Permission" "0,1,2,3" group.long ad:0xC0108410++0x03 line.long 0x00 "RMPU,DF0/PF0/PF1 Read MPU Register" bitfld.long 0x00 0. "DFMAIN/PFMAIN,DFLASH0/PFLASH0/PFLASH1 Main Region Read Permission" "0,1" tree.end tree "PFLASH0" group.long ad:0xC0110000++0x23 line.long 0x00 "CTR0,DF0/PF0/PF1 Control Register 0" bitfld.long 0x00 4.--5. "SSLMLVL,Sleep Mode" "0,1,2,3" bitfld.long 0x00 2.--3. "SCELVL,Software Control Flash Enable Signal" "0,1,2,3" bitfld.long 0x00 0.--1. "CEMOD,Flash Enable Signal Controller" "0,1,2,3" line.long 0x04 "CTR1,DF0/PF0/PF1 Control Register 1" bitfld.long 0x04 0.--1. "BUFEN,Read Buffer Enable" "0,1,2,3" line.long 0x08 "CTR2,DF0/PF0/PF1 Control Register 2" rbitfld.long 0x08 6.--7. "LOCK,Flash Lock State" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "MID,Flash Master ID" line.long 0x0C "CTR3,DF0/PF0/PF1 Control Register 3" hexmask.long.tbyte 0x0C 14.--31. 1. "EADDR,PFLASH Erase Sector Address" line.long 0x10 "CTR4,DF0/PF0/PF1 Control Register 4" bitfld.long 0x10 4.--6. "ETYP,Erase Type Select" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--1. "ESTART,Erase Start" "0,1,2,3" line.long 0x14 "CTR5,DF0/PF0/PF1 Control Register 5" hexmask.long 0x14 5.--31. 1. "ECADDR,Erase Check Address" bitfld.long 0x14 2. "ECLEN,Erase Check Type" "0,1" bitfld.long 0x14 0.--1. "ECEN,Erase Check Start" "0,1,2,3" line.long 0x18 "CTR6,DF0/PF0/PF1 Control Register 6" hexmask.long.byte 0x18 0.--7. 1. "CANCEL,Cancel Erase/Write Operation" line.long 0x1C "CTR7,DF0/PF0/PF1 Control Register 7" bitfld.long 0x1C 10. "PEXTRA,Program Progress Control" "0,1" bitfld.long 0x1C 8.--9. "PTYP,Program Type" "0,1,2,3" bitfld.long 0x1C 0.--2. "PBL,Program Length" "0,1,2,3,4,5,6,7" line.long 0x20 "CTR8,DF0/PF0/PF1 Control Register 8" bitfld.long 0x20 30.--31. "OVTE,Program Overtime Enable" "0,1,2,3" hexmask.long.tbyte 0x20 0.--23. 1. "OVTIME,Overtime" group.long ad:0xC0110030++0x17 line.long 0x00 "FIT0,DF0/PF0/PF1 Fault Injection Test Register 0" bitfld.long 0x00 24.--25. "AFITE,Read Redundancy Address Check Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "ECCFITE,Read ECC Check Bit Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DFITE,Read Data Fault Injection Enable" "0,1,2,3" line.long 0x04 "FIT1,DF0/PF0/PF1 Fault Injection Test Register 1" bitfld.long 0x04 24.--28. "AFIT,Read Redundancy Address Fault Injection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--20. "ECCFIT,ECC Check Bit Fault Injection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 15. "DFHIT,Data High Bit Fault Injection" "0,1" bitfld.long 0x04 14. "DFLIT,Data Low Bit Fault Injection" "0,1" hexmask.long.byte 0x04 0.--7. 1. "DFMIT,Data Middle Bit Fault Injection" line.long 0x08 "FIT2,DF0/PF0/PF1 Fault Injection Test Registe1r 2" bitfld.long 0x08 14.--15. "WDEDCINJ,Bus W Channel EDC Fault Injection" "0,1,2,3" bitfld.long 0x08 12.--13. "AEDCINJ,Bus AR Channel Address EDC Fault Injection" "0,1,2,3" bitfld.long 0x08 10.--11. "CEDCINJ,Bus AR Channel CTRL EDC Fault Injection" "0,1,2,3" bitfld.long 0x08 8.--9. "CPTYINJ,Bus AR Channel PTY Fault Injection" "0,1,2,3" bitfld.long 0x08 0.--1. "INJSEL,Fault Injection Position Select" "0,1,2,3" line.long 0x0C "ECCCTR,DF0/PF0/PF1 ECC Control Register" bitfld.long 0x0C 2.--3. "ECCDEN,ECC Decode Enable" "0,1,2,3" bitfld.long 0x0C 0.--1. "ECCEEN,ECC Encode Enable" "0,1,2,3" line.long 0x10 "ECCTESTCTR,DF0/PF0/PF1 ECC Test Control Register" bitfld.long 0x10 2.--3. "RDEN,ECC Read Test Enable" "0,1,2,3" bitfld.long 0x10 0.--1. "WREN,ECC Write Test Enable" "0,1,2,3" line.long 0x14 "ECCDATCTR,DF0/PF0/PF1 ECC Test Data Register" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,ECC Write Test Data" group.long ad:0xC0110100++0x13 line.long 0x00 "MSKINT,DF0/PF0/PF1 Interrupt Mask Register" bitfld.long 0x00 20.--21. "MPOVT,Mask Program Overtime Interrupt" "0,1,2,3" bitfld.long 0x00 18.--19. "MMISAE,Mask Program Miss Align Error Interrupt" "0,1,2,3" bitfld.long 0x00 16.--17. "MESQE,Mask Erase Sequence Error Interrupt" "0,1,2,3" bitfld.long 0x00 8.--9. "MCF,Mask Cancel Finish Interrupt" "0,1,2,3" bitfld.long 0x00 4.--5. "MECF,Mask Erase Check Finish Interrupt" "0,1,2,3" bitfld.long 0x00 2.--3. "MPF,Mask Program Finish Interrupt" "0,1,2,3" bitfld.long 0x00 0.--1. "MEF,Mask Erase Finish Interrupt" "0,1,2,3" line.long 0x04 "SAMSKALM0,DF0/PF0/PF1 Safe Alarm Mask Register 0" bitfld.long 0x04 18.--19. "MTRIMC,Mask TRIMC Alarm" "0,1,2,3" bitfld.long 0x04 14.--15. "MEARE,Mask EARE Alarm" "0,1,2,3" bitfld.long 0x04 12.--13. "MUCRE,Mask UCRE Alarm" "0,1,2,3" bitfld.long 0x04 10.--11. "MCROE,Mask CROE Alarm" "0,1,2,3" bitfld.long 0x04 8.--9. "MCRE,Mask CRE Alarm" "0,1,2,3" bitfld.long 0x04 6.--7. "MDARE,Mask DARE Alarm" "0,1,2,3" bitfld.long 0x04 4.--5. "MRERR,Mask RERR Alarm" "0,1,2,3" newline bitfld.long 0x04 2.--3. "MWERR,Mask WERR Alarm" "0,1,2,3" bitfld.long 0x04 0.--1. "MRDERS,Mask RDERS Alarm" "0,1,2,3" line.long 0x08 "SAMSKBE0,DF0/PF0/PF1 Safe Bus Error Mask Register 0" bitfld.long 0x08 12.--13. "MUCRE,Mask UCRE Bus Error" "0,1,2,3" bitfld.long 0x08 4.--5. "MRERR,Mask RERR Bus Error" "0,1,2,3" bitfld.long 0x08 2.--3. "MWERR,Mask WERR Bus Error" "0,1,2,3" line.long 0x0C "SAMSKALM1,DF0/PF0/PF1 Safe Alarm Mask Register 1" bitfld.long 0x0C 4.--5. "MWE,Mask WEE and WPE Alarms" "0,1,2,3" bitfld.long 0x0C 2.--3. "MARE,Mask AREE and ARPE Alarms" "0,1,2,3" bitfld.long 0x0C 0.--1. "MAWE,Mask AWEE and AWPE Alarms" "0,1,2,3" line.long 0x10 "SAMSKBE1,DF0/PF0/PF1 Safe Bus Error Mask Register 1" bitfld.long 0x10 4.--5. "MWE,Mask WEE and WPE Bus Error" "0,1,2,3" bitfld.long 0x10 2.--3. "MARE,Mask AREE and ARPE Bus Error" "0,1,2,3" bitfld.long 0x10 0.--1. "MAWE,Mask AWEE and AWPE Bus Error" "0,1,2,3" group.long ad:0xC0110200++0x0B line.long 0x00 "STS,DF0/PF0/PF1 Status Register" rbitfld.long 0x00 26. "ECBUSY,FLASH Current Erase Check Operation Status" "0,1" rbitfld.long 0x00 25. "PROGBUSY,FLASH Current Program Operation Status" "0,1" rbitfld.long 0x00 24. "ERSBUSY,FLASH Current Erase Operation Status" "0,1" bitfld.long 0x00 20. "POVT,Program Overtime Status" "0,1" bitfld.long 0x00 18. "MISAE,Program Miss Align Error Status" "0,1" bitfld.long 0x00 16. "ESQE,Erase Sequence Error Status" "0,1" bitfld.long 0x00 10. "CDF,Cancel Finish Status" "0,1" newline bitfld.long 0x00 8. "CF,Cancel Finish Redundancy Status" "0,1" bitfld.long 0x00 5. "ECSTS,Erase Check Result" "0,1" bitfld.long 0x00 4. "ECF,Erase Check Finished Status" "0,1" bitfld.long 0x00 3. "PROGE,Program Error Status" "0,1" bitfld.long 0x00 2. "PROGF,Program Finished Status" "0,1" bitfld.long 0x00 1. "ERSE,Erase Error Status" "0,1" bitfld.long 0x00 0. "ERSF,Erase Finished Status" "0,1" line.long 0x04 "SASTS0,DF0/PF0/PF1 Safe Status Register 0" rbitfld.long 0x04 31. "TRIMC,NVM TRIMC Port Status" "0,1" bitfld.long 0x04 18. "TRIMCE,NVM TRIMC Port State After Recall Finished" "0,1" bitfld.long 0x04 14. "EARE,ECC Main Channel and Redundant Channel Inconsistency Error" "0,1" bitfld.long 0x04 12. "UCRE,ECC Unrepairable Fault Error" "0,1" bitfld.long 0x04 10. "CROE,ECC Reparable Fault Occurred Over 5 Times Error" "0,1" bitfld.long 0x04 8. "CRE,ECC Reparable Fault Error" "0,1" bitfld.long 0x04 6. "DARE,Read Main Channel and Redundant Channel Inconsistency Error" "0,1" newline bitfld.long 0x04 4. "RERR,Read Permission Error" "0,1" bitfld.long 0x04 2. "WERR,Program Permission Error" "0,1" bitfld.long 0x04 0. "RDERS,Region Read State" "0,1" line.long 0x08 "SASTS1,DF0/PF0/PF1 Safe Status Register 1" bitfld.long 0x08 5. "WPE,Bus W Channel Parity Error" "0,1" bitfld.long 0x08 4. "WEE,Bus W Channel ECC Error" "0,1" bitfld.long 0x08 3. "ARPE,Bus AR Channel Parity Error" "0,1" bitfld.long 0x08 2. "AREE,Bus AR Channel ECC Error" "0,1" bitfld.long 0x08 1. "AWPE,Bus AW Channel Parity Error" "0,1" bitfld.long 0x08 0. "AWEE,Bus AW Channel ECC Error" "0,1" rgroup.long ad:0xC0110300++0x03 line.long 0x00 "SAINFn,DF0/PF0/PF1 Ecc Error Information Register n" hexmask.long 0x00 4.--31. 1. "DFEA,ECC Error PWord Address Record" bitfld.long 0x00 0. "DFAV,Address Valid Status" "0,1" group.long ad:0xC0110400++0x07 line.long 0x00 "EWMPU0,DF0/PF0/PF1 Erase and Write MPU Register 0" bitfld.long 0x00 30.--31. "BA15,PFLASH0/PFLASH1 Block 15 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 28.--29. "BA14,PFLASH0/PFLASH1 Block 14 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 26.--27. "BA13,PFLASH0/PFLASH1 Block 13 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 24.--25. "BA12,PFLASH0/PFLASH1 Block 12 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 22.--23. "BA11,PFLASH0/PFLASH1 Block 11 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 20.--21. "BA10,PFLASH0/PFLASH1 Block 10 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 18.--19. "BA9,PFLASH0/PFLASH1 Block 9 Erase and Write Permission" "0,1,2,3" newline bitfld.long 0x00 16.--17. "BA8,PFLASH0/PFLASH1 Block 8 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 14.--15. "BA7,PFLASH0/PFLASH1 Block 7 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 12.--13. "BA6,PFLASH0/PFLASH1 Block 6 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 10.--11. "BA5,PFLASH0/PFLASH1 Block 5 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 8.--9. "BA4,PFLASH0/PFLASH1 Block 4 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 6.--7. "BA3,PFLASH0/PFLASH1 Block 3 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 4.--5. "BA2,PFLASH0/PFLASH1 Block 2 Erase and Write Permission" "0,1,2,3" newline bitfld.long 0x00 2.--3. "BA1,PFLASH0/PFLASH1 Block 1 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 0.--1. "BA0,PFLASH0/PFLASH1 Block 0 Erase and Write Permission" "0,1,2,3" line.long 0x04 "EWMPU1,DF0/PF0/PF1 Erase and Write MPU Register 1" bitfld.long 0x04 14.--15. "BA23,PFLASH0/PFLASH1 Block 23 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 12.--13. "BA22,PFLASH0/PFLASH1 Block 22 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 10.--11. "BA21,PFLASH0/PFLASH1 Block 21 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 8.--9. "BA20,PFLASH0/PFLASH1 Block 20 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 6.--7. "BA19,PFLASH0/PFLASH1 Block 19 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 4.--5. "BA18,PFLASH0/PFLASH1 Block 18 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 2.--3. "BA17,PFLASH0/PFLASH1 Block 17 Erase and Write Permission" "0,1,2,3" newline bitfld.long 0x04 0.--1. "BA16,PFLASH0/PFLASH1 Block 16 Erase and Write Permission" "0,1,2,3" group.long ad:0xC0110410++0x03 line.long 0x00 "RMPU,DF0/PF0/PF1 Read MPU Register" bitfld.long 0x00 0. "DFMAIN/PFMAIN,DFLASH0/PFLASH0/PFLASH1 Main Region Read Permission" "0,1" tree.end tree "PFLASH1" group.long ad:0xC0111000++0x23 line.long 0x00 "CTR0,DF0/PF0/PF1 Control Register 0" bitfld.long 0x00 4.--5. "SSLMLVL,Sleep Mode" "0,1,2,3" bitfld.long 0x00 2.--3. "SCELVL,Software Control Flash Enable Signal" "0,1,2,3" bitfld.long 0x00 0.--1. "CEMOD,Flash Enable Signal Controller" "0,1,2,3" line.long 0x04 "CTR1,DF0/PF0/PF1 Control Register 1" bitfld.long 0x04 0.--1. "BUFEN,Read Buffer Enable" "0,1,2,3" line.long 0x08 "CTR2,DF0/PF0/PF1 Control Register 2" rbitfld.long 0x08 6.--7. "LOCK,Flash Lock State" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "MID,Flash Master ID" line.long 0x0C "CTR3,DF0/PF0/PF1 Control Register 3" hexmask.long.tbyte 0x0C 14.--31. 1. "EADDR,PFLASH Erase Sector Address" line.long 0x10 "CTR4,DF0/PF0/PF1 Control Register 4" bitfld.long 0x10 4.--6. "ETYP,Erase Type Select" "0,1,2,3,4,5,6,7" bitfld.long 0x10 0.--1. "ESTART,Erase Start" "0,1,2,3" line.long 0x14 "CTR5,DF0/PF0/PF1 Control Register 5" hexmask.long 0x14 5.--31. 1. "ECADDR,Erase Check Address" bitfld.long 0x14 2. "ECLEN,Erase Check Type" "0,1" bitfld.long 0x14 0.--1. "ECEN,Erase Check Start" "0,1,2,3" line.long 0x18 "CTR6,DF0/PF0/PF1 Control Register 6" hexmask.long.byte 0x18 0.--7. 1. "CANCEL,Cancel Erase/Write Operation" line.long 0x1C "CTR7,DF0/PF0/PF1 Control Register 7" bitfld.long 0x1C 10. "PEXTRA,Program Progress Control" "0,1" bitfld.long 0x1C 8.--9. "PTYP,Program Type" "0,1,2,3" bitfld.long 0x1C 0.--2. "PBL,Program Length" "0,1,2,3,4,5,6,7" line.long 0x20 "CTR8,DF0/PF0/PF1 Control Register 8" bitfld.long 0x20 30.--31. "OVTE,Program Overtime Enable" "0,1,2,3" hexmask.long.tbyte 0x20 0.--23. 1. "OVTIME,Overtime" group.long ad:0xC0111030++0x17 line.long 0x00 "FIT0,DF0/PF0/PF1 Fault Injection Test Register 0" bitfld.long 0x00 24.--25. "AFITE,Read Redundancy Address Check Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "ECCFITE,Read ECC Check Bit Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DFITE,Read Data Fault Injection Enable" "0,1,2,3" line.long 0x04 "FIT1,DF0/PF0/PF1 Fault Injection Test Register 1" bitfld.long 0x04 24.--28. "AFIT,Read Redundancy Address Fault Injection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--20. "ECCFIT,ECC Check Bit Fault Injection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 15. "DFHIT,Data High Bit Fault Injection" "0,1" bitfld.long 0x04 14. "DFLIT,Data Low Bit Fault Injection" "0,1" hexmask.long.byte 0x04 0.--7. 1. "DFMIT,Data Middle Bit Fault Injection" line.long 0x08 "FIT2,DF0/PF0/PF1 Fault Injection Test Registe1r 2" bitfld.long 0x08 14.--15. "WDEDCINJ,Bus W Channel EDC Fault Injection" "0,1,2,3" bitfld.long 0x08 12.--13. "AEDCINJ,Bus AR Channel Address EDC Fault Injection" "0,1,2,3" bitfld.long 0x08 10.--11. "CEDCINJ,Bus AR Channel CTRL EDC Fault Injection" "0,1,2,3" bitfld.long 0x08 8.--9. "CPTYINJ,Bus AR Channel PTY Fault Injection" "0,1,2,3" bitfld.long 0x08 0.--1. "INJSEL,Fault Injection Position Select" "0,1,2,3" line.long 0x0C "ECCCTR,DF0/PF0/PF1 ECC Control Register" bitfld.long 0x0C 2.--3. "ECCDEN,ECC Decode Enable" "0,1,2,3" bitfld.long 0x0C 0.--1. "ECCEEN,ECC Encode Enable" "0,1,2,3" line.long 0x10 "ECCTESTCTR,DF0/PF0/PF1 ECC Test Control Register" bitfld.long 0x10 2.--3. "RDEN,ECC Read Test Enable" "0,1,2,3" bitfld.long 0x10 0.--1. "WREN,ECC Write Test Enable" "0,1,2,3" line.long 0x14 "ECCDATCTR,DF0/PF0/PF1 ECC Test Data Register" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,ECC Write Test Data" group.long ad:0xC0111100++0x13 line.long 0x00 "MSKINT,DF0/PF0/PF1 Interrupt Mask Register" bitfld.long 0x00 20.--21. "MPOVT,Mask Program Overtime Interrupt" "0,1,2,3" bitfld.long 0x00 18.--19. "MMISAE,Mask Program Miss Align Error Interrupt" "0,1,2,3" bitfld.long 0x00 16.--17. "MESQE,Mask Erase Sequence Error Interrupt" "0,1,2,3" bitfld.long 0x00 8.--9. "MCF,Mask Cancel Finish Interrupt" "0,1,2,3" bitfld.long 0x00 4.--5. "MECF,Mask Erase Check Finish Interrupt" "0,1,2,3" bitfld.long 0x00 2.--3. "MPF,Mask Program Finish Interrupt" "0,1,2,3" bitfld.long 0x00 0.--1. "MEF,Mask Erase Finish Interrupt" "0,1,2,3" line.long 0x04 "SAMSKALM0,DF0/PF0/PF1 Safe Alarm Mask Register 0" bitfld.long 0x04 18.--19. "MTRIMC,Mask TRIMC Alarm" "0,1,2,3" bitfld.long 0x04 14.--15. "MEARE,Mask EARE Alarm" "0,1,2,3" bitfld.long 0x04 12.--13. "MUCRE,Mask UCRE Alarm" "0,1,2,3" bitfld.long 0x04 10.--11. "MCROE,Mask CROE Alarm" "0,1,2,3" bitfld.long 0x04 8.--9. "MCRE,Mask CRE Alarm" "0,1,2,3" bitfld.long 0x04 6.--7. "MDARE,Mask DARE Alarm" "0,1,2,3" bitfld.long 0x04 4.--5. "MRERR,Mask RERR Alarm" "0,1,2,3" newline bitfld.long 0x04 2.--3. "MWERR,Mask WERR Alarm" "0,1,2,3" bitfld.long 0x04 0.--1. "MRDERS,Mask RDERS Alarm" "0,1,2,3" line.long 0x08 "SAMSKBE0,DF0/PF0/PF1 Safe Bus Error Mask Register 0" bitfld.long 0x08 12.--13. "MUCRE,Mask UCRE Bus Error" "0,1,2,3" bitfld.long 0x08 4.--5. "MRERR,Mask RERR Bus Error" "0,1,2,3" bitfld.long 0x08 2.--3. "MWERR,Mask WERR Bus Error" "0,1,2,3" line.long 0x0C "SAMSKALM1,DF0/PF0/PF1 Safe Alarm Mask Register 1" bitfld.long 0x0C 4.--5. "MWE,Mask WEE and WPE Alarms" "0,1,2,3" bitfld.long 0x0C 2.--3. "MARE,Mask AREE and ARPE Alarms" "0,1,2,3" bitfld.long 0x0C 0.--1. "MAWE,Mask AWEE and AWPE Alarms" "0,1,2,3" line.long 0x10 "SAMSKBE1,DF0/PF0/PF1 Safe Bus Error Mask Register 1" bitfld.long 0x10 4.--5. "MWE,Mask WEE and WPE Bus Error" "0,1,2,3" bitfld.long 0x10 2.--3. "MARE,Mask AREE and ARPE Bus Error" "0,1,2,3" bitfld.long 0x10 0.--1. "MAWE,Mask AWEE and AWPE Bus Error" "0,1,2,3" group.long ad:0xC0111200++0x0B line.long 0x00 "STS,DF0/PF0/PF1 Status Register" rbitfld.long 0x00 26. "ECBUSY,FLASH Current Erase Check Operation Status" "0,1" rbitfld.long 0x00 25. "PROGBUSY,FLASH Current Program Operation Status" "0,1" rbitfld.long 0x00 24. "ERSBUSY,FLASH Current Erase Operation Status" "0,1" bitfld.long 0x00 20. "POVT,Program Overtime Status" "0,1" bitfld.long 0x00 18. "MISAE,Program Miss Align Error Status" "0,1" bitfld.long 0x00 16. "ESQE,Erase Sequence Error Status" "0,1" bitfld.long 0x00 10. "CDF,Cancel Finish Status" "0,1" newline bitfld.long 0x00 8. "CF,Cancel Finish Redundancy Status" "0,1" bitfld.long 0x00 5. "ECSTS,Erase Check Result" "0,1" bitfld.long 0x00 4. "ECF,Erase Check Finished Status" "0,1" bitfld.long 0x00 3. "PROGE,Program Error Status" "0,1" bitfld.long 0x00 2. "PROGF,Program Finished Status" "0,1" bitfld.long 0x00 1. "ERSE,Erase Error Status" "0,1" bitfld.long 0x00 0. "ERSF,Erase Finished Status" "0,1" line.long 0x04 "SASTS0,DF0/PF0/PF1 Safe Status Register 0" rbitfld.long 0x04 31. "TRIMC,NVM TRIMC Port Status" "0,1" bitfld.long 0x04 18. "TRIMCE,NVM TRIMC Port State After Recall Finished" "0,1" bitfld.long 0x04 14. "EARE,ECC Main Channel and Redundant Channel Inconsistency Error" "0,1" bitfld.long 0x04 12. "UCRE,ECC Unrepairable Fault Error" "0,1" bitfld.long 0x04 10. "CROE,ECC Reparable Fault Occurred Over 5 Times Error" "0,1" bitfld.long 0x04 8. "CRE,ECC Reparable Fault Error" "0,1" bitfld.long 0x04 6. "DARE,Read Main Channel and Redundant Channel Inconsistency Error" "0,1" newline bitfld.long 0x04 4. "RERR,Read Permission Error" "0,1" bitfld.long 0x04 2. "WERR,Program Permission Error" "0,1" bitfld.long 0x04 0. "RDERS,Region Read State" "0,1" line.long 0x08 "SASTS1,DF0/PF0/PF1 Safe Status Register 1" bitfld.long 0x08 5. "WPE,Bus W Channel Parity Error" "0,1" bitfld.long 0x08 4. "WEE,Bus W Channel ECC Error" "0,1" bitfld.long 0x08 3. "ARPE,Bus AR Channel Parity Error" "0,1" bitfld.long 0x08 2. "AREE,Bus AR Channel ECC Error" "0,1" bitfld.long 0x08 1. "AWPE,Bus AW Channel Parity Error" "0,1" bitfld.long 0x08 0. "AWEE,Bus AW Channel ECC Error" "0,1" rgroup.long ad:0xC0111300++0x03 line.long 0x00 "SAINFn,DF0/PF0/PF1 Ecc Error Information Register n" hexmask.long 0x00 4.--31. 1. "DFEA,ECC Error PWord Address Record" bitfld.long 0x00 0. "DFAV,Address Valid Status" "0,1" group.long ad:0xC0111400++0x07 line.long 0x00 "EWMPU0,DF0/PF0/PF1 Erase and Write MPU Register 0" bitfld.long 0x00 30.--31. "BA15,PFLASH0/PFLASH1 Block 15 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 28.--29. "BA14,PFLASH0/PFLASH1 Block 14 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 26.--27. "BA13,PFLASH0/PFLASH1 Block 13 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 24.--25. "BA12,PFLASH0/PFLASH1 Block 12 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 22.--23. "BA11,PFLASH0/PFLASH1 Block 11 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 20.--21. "BA10,PFLASH0/PFLASH1 Block 10 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 18.--19. "BA9,PFLASH0/PFLASH1 Block 9 Erase and Write Permission" "0,1,2,3" newline bitfld.long 0x00 16.--17. "BA8,PFLASH0/PFLASH1 Block 8 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 14.--15. "BA7,PFLASH0/PFLASH1 Block 7 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 12.--13. "BA6,PFLASH0/PFLASH1 Block 6 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 10.--11. "BA5,PFLASH0/PFLASH1 Block 5 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 8.--9. "BA4,PFLASH0/PFLASH1 Block 4 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 6.--7. "BA3,PFLASH0/PFLASH1 Block 3 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 4.--5. "BA2,PFLASH0/PFLASH1 Block 2 Erase and Write Permission" "0,1,2,3" newline bitfld.long 0x00 2.--3. "BA1,PFLASH0/PFLASH1 Block 1 Erase and Write Permission" "0,1,2,3" bitfld.long 0x00 0.--1. "BA0,PFLASH0/PFLASH1 Block 0 Erase and Write Permission" "0,1,2,3" line.long 0x04 "EWMPU1,DF0/PF0/PF1 Erase and Write MPU Register 1" bitfld.long 0x04 14.--15. "BA23,PFLASH0/PFLASH1 Block 23 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 12.--13. "BA22,PFLASH0/PFLASH1 Block 22 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 10.--11. "BA21,PFLASH0/PFLASH1 Block 21 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 8.--9. "BA20,PFLASH0/PFLASH1 Block 20 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 6.--7. "BA19,PFLASH0/PFLASH1 Block 19 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 4.--5. "BA18,PFLASH0/PFLASH1 Block 18 Erase and Write Permission" "0,1,2,3" bitfld.long 0x04 2.--3. "BA17,PFLASH0/PFLASH1 Block 17 Erase and Write Permission" "0,1,2,3" newline bitfld.long 0x04 0.--1. "BA16,PFLASH0/PFLASH1 Block 16 Erase and Write Permission" "0,1,2,3" group.long ad:0xC0111410++0x03 line.long 0x00 "RMPU,DF0/PF0/PF1 Read MPU Register" bitfld.long 0x00 0. "DFMAIN/PFMAIN,DFLASH0/PFLASH0/PFLASH1 Main Region Read Permission" "0,1" tree.end tree "Password" group.long ad:0xC0128000++0x7F line.long 0x00 "DFMAINPIN0,DFLASH0 MPU Password Input Register" line.long 0x04 "DFMAINPIN1,DFLASH0 MPU Password Input Register" line.long 0x08 "DFMAINPIN2,DFLASH0 MPU Password Input Register" line.long 0x0C "DFMAINPIN3,DFLASH0 MPU Password Input Register" line.long 0x10 "DFMAINPIN4,DFLASH0 MPU Password Input Register" line.long 0x14 "DFMAINPIN5,DFLASH0 MPU Password Input Register" line.long 0x18 "DFMAINPIN6,DFLASH0 MPU Password Input Register" line.long 0x1C "DFMAINPIN7,DFLASH0 MPU Password Input Register" line.long 0x20 "PFMAINPIN0,PFLASH0/1 MPU Password Input Register" line.long 0x24 "PFMAINPIN1,PFLASH0/1 MPU Password Input Register" line.long 0x28 "PFMAINPIN2,PFLASH0/1 MPU Password Input Register" line.long 0x2C "PFMAINPIN3,PFLASH0/1 MPU Password Input Register" line.long 0x30 "PFMAINPIN4,PFLASH0/1 MPU Password Input Register" line.long 0x34 "PFMAINPIN5,PFLASH0/1 MPU Password Input Register" line.long 0x38 "PFMAINPIN6,PFLASH0/1 MPU Password Input Register" line.long 0x3C "PFMAINPIN7,PFLASH0/1 MPU Password Input Register" line.long 0x40 "NVRBSPIN0,NVR MPU BS Password Input Register" line.long 0x44 "NVRBSPIN1,NVR MPU BS Password Input Register" line.long 0x48 "NVRBSPIN2,NVR MPU BS Password Input Register" line.long 0x4C "NVRBSPIN3,NVR MPU BS Password Input Register" line.long 0x50 "NVRBSPIN4,NVR MPU BS Password Input Register" line.long 0x54 "NVRBSPIN5,NVR MPU BS Password Input Register" line.long 0x58 "NVRBSPIN6,NVR MPU BS Password Input Register" line.long 0x5C "NVRBSPIN7,NVR MPU BS Password Input Register" line.long 0x60 "NVRNFPIN0,NVR MPU CFG Password Input Register" line.long 0x64 "NVRNFPIN1,NVR MPU CFG Password Input Register" line.long 0x68 "NVRNFPIN2,NVR MPU CFG Password Input Register" line.long 0x6C "NVRNFPIN3,NVR MPU CFG Password Input Register" line.long 0x70 "NVRNFPIN4,NVR MPU CFG Password Input Register" line.long 0x74 "NVRNFPIN5,NVR MPU CFG Password Input Register" line.long 0x78 "NVRNFPIN6,NVR MPU CFG Password Input Register" line.long 0x7C "NVRNFPIN7,NVR MPU CFG Password Input Register" tree.end tree "GMU" group.long ad:0xC0060010++0x0B line.long 0x00 "MEMCFG,Memory Config Register" bitfld.long 0x00 18.--19. "AEDIS,Address Error Disable" "0,1,2,3" bitfld.long 0x00 16.--17. "WDEDIS,Write Data Error Disable" "0,1,2,3" bitfld.long 0x00 14.--15. "CEDIS,Control Error Disable" "0,1,2,3" bitfld.long 0x00 12.--13. "RDEDIS,Read Data Error Disable" "0,1,2,3" bitfld.long 0x00 10.--11. "RMWEDIS,Read Modify Write Error Disable" "0,1,2,3" bitfld.long 0x00 8.--9. "MPUEDIS,MPU Error Disable" "0,1,2,3" bitfld.long 0x00 6.--7. "RSVEDIS,Reserve Error Disable" "0,1,2,3" bitfld.long 0x00 5. "APBEDIS,APB Bus Error Disable" "0,1" bitfld.long 0x00 0.--1. "ROM,Read Only Memory" "0,1,2,3" line.long 0x04 "SPMCTRL0,Sleep Mode Control 0" bitfld.long 0x04 6.--7. "GRP3SPM,Sram Group 3 Sleep Mode" "0,1,2,3" bitfld.long 0x04 4.--5. "GRP2SPM,Sram Group 2 Sleep Mode" "0,1,2,3" bitfld.long 0x04 2.--3. "GRP1SPM,Sram Group 1 Sleep Mode" "0,1,2,3" bitfld.long 0x04 0.--1. "GRP0SPM,Sram Group 0 Sleep Mode" "0,1,2,3" line.long 0x08 "SPMCTRL1,Sleep Mode Control 1" bitfld.long 0x08 6.--7. "GRP3SPMEN,Sram Group 3 Sleep Mode Enable" "0,1,2,3" bitfld.long 0x08 4.--5. "GRP2SPMEN,Sram Group 2 Sleep Mode Enable" "0,1,2,3" bitfld.long 0x08 2.--3. "GRP1SPMEN,Sram Group 1 Sleep Mode Enable" "0,1,2,3" bitfld.long 0x08 0.--1. "GRP0SPMEN,Sram Group 0 Sleep Mode Enable" "0,1,2,3" group.long ad:0xC0060020++0x03 line.long 0x00 "MEMSTS,Memory Status Register" bitfld.long 0x00 22. "UTOE,Upstream Timeout Error" "0,1" bitfld.long 0x00 21. "DGIFLSE,Downstream GIFbus Lockstep Error" "0,1" bitfld.long 0x00 20. "UGIFLSE,Upstream GIFbus Lockstep Error" "0,1" bitfld.long 0x00 19. "DIPLSE,Downstream IPbus Lockstep Error" "0,1" bitfld.long 0x00 18. "UIPLSE,Upstream IPbus Lockstep Error" "0,1" bitfld.long 0x00 17. "AEDCE,Address EDC Error" "0,1" bitfld.long 0x00 16. "WDEDCE,Write Data EDC Error" "0,1" bitfld.long 0x00 15. "CEDCE,Control-Single EDC Error" "0,1" bitfld.long 0x00 14. "CPTYE,Control-Single Parity Error" "0,1" newline bitfld.long 0x00 13. "RMWE,Read Modify Write Error" "0,1" bitfld.long 0x00 12. "RSBECCE,Read Data Single-Bit ECC Error" "0,1" bitfld.long 0x00 11. "RSBOFE,Read Data Single-Bit Overflow Error" "0,1" bitfld.long 0x00 10. "RDBECCE,Read Data Double-Bit ECC Error" "0,1" bitfld.long 0x00 5. "MPUWE,MPU Write Error" "0,1" bitfld.long 0x00 4. "MPURE,MPU Read Error" "0,1" bitfld.long 0x00 3. "MPUROE,MPU Read-Only Error" "0,1" bitfld.long 0x00 2. "RSRVE,Reserved Error" "0,1" bitfld.long 0x00 1. "SFRRDNE,SFR Redundancy Error" "0,1" newline bitfld.long 0x00 0. "SFRE,SFR Error" "0,1" rgroup.long ad:0xC0060024++0x03 line.long 0x00 "SPSTS,Sleep State Register" bitfld.long 0x00 3. "GRP3SPA,Sram Group 3 Sleep Active" "0,1" bitfld.long 0x00 2. "GRP2SPA,Sram Group 2 Sleep Active" "0,1" bitfld.long 0x00 1. "GRP1SPA,Sram Group 1 Sleep Active" "0,1" bitfld.long 0x00 0. "GRP0SPA,Sram Group 0 Sleep Active" "0,1" group.long ad:0xC0060028++0x0B line.long 0x00 "ALMMSK,Alarm Mask Register" bitfld.long 0x00 26.--27. "UTOAMSK,Upstream Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x00 24.--25. "LSAMSK,Lockstep Alarm Mask" "0,1,2,3" bitfld.long 0x00 22.--23. "DSMAMSK,Downstream Alarm Mask" "0,1,2,3" bitfld.long 0x00 20.--21. "RSBAMSK,Read Single-Bit Alarm Mask" "0,1,2,3" bitfld.long 0x00 18.--19. "RSBOFAMSK,Read Single-Bit Overflow Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "RDBAMSK,Read Double-Bit Alarm Mask" "0,1,2,3" bitfld.long 0x00 14.--15. "SFRAMSK,SFR Alarm Mask" "0,1,2,3" bitfld.long 0x00 12.--13. "MPUAMSK,MPU Alarm Mask" "0,1,2,3" bitfld.long 0x00 10.--11. "RSVAMSK,Reserve Alarm Mask" "0,1,2,3" line.long 0x04 "MEMSCTRL0,Memory Safety Control Register 0" bitfld.long 0x04 22.--23. "UTOEN,Upstream Timeout Enable" "0,1,2,3" bitfld.long 0x04 20.--21. "GIFLSEN,GIFbus Lockstep Enable" "0,1,2,3" bitfld.long 0x04 18.--19. "IPLSEN,IPbus Lockstep Enable" "0,1,2,3" bitfld.long 0x04 16.--17. "AEDCEN,Address EDC Enable" "0,1,2,3" bitfld.long 0x04 14.--15. "WDEDCEN,Write Data EDC Enable" "0,1,2,3" bitfld.long 0x04 12.--13. "CCEN,Control Check Enable" "0,1,2,3" bitfld.long 0x04 8.--9. "RDECCEN,Read Data ECC Enable" "0,1,2,3" bitfld.long 0x04 4.--5. "RMPEN,REMAP Enable" "0,1,2,3" line.long 0x08 "MEMSCTRL1,Memory Safety Control Register 1" bitfld.long 0x08 25.--26. "DGIFLSINJ,Downstream GIFbus Lockstep Inject" "0,1,2,3" bitfld.long 0x08 23.--24. "UGIFLSINJ,Upstream GIFbus Lockstep Inject" "0,1,2,3" bitfld.long 0x08 21.--22. "DIPLSINJ,Downstream IPbus Lockstep Inject" "0,1,2,3" bitfld.long 0x08 19.--20. "UIPLSINJ,Upstream IPbus Lockstep Inject" "0,1,2,3" bitfld.long 0x08 17.--18. "AEDCINJ,Address EDC Inject" "0,1,2,3" bitfld.long 0x08 15.--16. "WDEDCINJ,Write Data EDC Inject" "0,1,2,3" bitfld.long 0x08 13.--14. "CEDCINJ,Control EDC Inject" "0,1,2,3" bitfld.long 0x08 11.--12. "CPTYINJ,Control Parity Inject" "0,1,2,3" bitfld.long 0x08 9.--10. "RDECCINJ,Read Data ECC Inject" "0,1,2,3" newline bitfld.long 0x08 7.--8. "INJSEL,Inject Select" "0,1,2,3" group.long ad:0xC0060050++0x03 line.long 0x00 "RGNLA0,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060060++0x03 line.long 0x00 "RGNLA1,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060070++0x03 line.long 0x00 "RGNLA2,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060080++0x03 line.long 0x00 "RGNLA3,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060090++0x03 line.long 0x00 "RGNLA4,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00600A0++0x03 line.long 0x00 "RGNLA5,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00600B0++0x03 line.long 0x00 "RGNLA6,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00600C0++0x03 line.long 0x00 "RGNLA7,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00600D0++0x03 line.long 0x00 "RGNLA8,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00600E0++0x03 line.long 0x00 "RGNLA9,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00600F0++0x03 line.long 0x00 "RGNLA10,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060100++0x03 line.long 0x00 "RGNLA11,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060110++0x03 line.long 0x00 "RGNLA12,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060120++0x03 line.long 0x00 "RGNLA13,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060130++0x03 line.long 0x00 "RGNLA14,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060140++0x03 line.long 0x00 "RGNLA15,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060150++0x03 line.long 0x00 "RGNLA16,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060160++0x03 line.long 0x00 "RGNLA17,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060170++0x03 line.long 0x00 "RGNLA18,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060180++0x03 line.long 0x00 "RGNLA19,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060190++0x03 line.long 0x00 "RGNLA20,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00601A0++0x03 line.long 0x00 "RGNLA21,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00601B0++0x03 line.long 0x00 "RGNLA22,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00601C0++0x03 line.long 0x00 "RGNLA23,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00601D0++0x03 line.long 0x00 "RGNLA24,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00601E0++0x03 line.long 0x00 "RGNLA25,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC00601F0++0x03 line.long 0x00 "RGNLA26,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060200++0x03 line.long 0x00 "RGNLA27,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060210++0x03 line.long 0x00 "RGNLA28,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060220++0x03 line.long 0x00 "RGNLA29,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060230++0x03 line.long 0x00 "RGNLA30,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060240++0x03 line.long 0x00 "RGNLA31,Region Lower Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "LADDR,Lower Address" group.long ad:0xC0060054++0x03 line.long 0x00 "RGNHA0,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060064++0x03 line.long 0x00 "RGNHA1,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060074++0x03 line.long 0x00 "RGNHA2,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060084++0x03 line.long 0x00 "RGNHA3,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060094++0x03 line.long 0x00 "RGNHA4,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00600A4++0x03 line.long 0x00 "RGNHA5,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00600B4++0x03 line.long 0x00 "RGNHA6,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00600C4++0x03 line.long 0x00 "RGNHA7,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00600D4++0x03 line.long 0x00 "RGNHA8,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00600E4++0x03 line.long 0x00 "RGNHA9,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00600F4++0x03 line.long 0x00 "RGNHA10,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060104++0x03 line.long 0x00 "RGNHA11,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060114++0x03 line.long 0x00 "RGNHA12,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060124++0x03 line.long 0x00 "RGNHA13,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060134++0x03 line.long 0x00 "RGNHA14,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060144++0x03 line.long 0x00 "RGNHA15,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060154++0x03 line.long 0x00 "RGNHA16,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060164++0x03 line.long 0x00 "RGNHA17,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060174++0x03 line.long 0x00 "RGNHA18,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060184++0x03 line.long 0x00 "RGNHA19,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060194++0x03 line.long 0x00 "RGNHA20,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00601A4++0x03 line.long 0x00 "RGNHA21,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00601B4++0x03 line.long 0x00 "RGNHA22,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00601C4++0x03 line.long 0x00 "RGNHA23,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00601D4++0x03 line.long 0x00 "RGNHA24,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00601E4++0x03 line.long 0x00 "RGNHA25,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC00601F4++0x03 line.long 0x00 "RGNHA26,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060204++0x03 line.long 0x00 "RGNHA27,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060214++0x03 line.long 0x00 "RGNHA28,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060224++0x03 line.long 0x00 "RGNHA29,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060234++0x03 line.long 0x00 "RGNHA30,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060244++0x03 line.long 0x00 "RGNHA31,Region Higher Address Register n (n=0~31)" hexmask.long.word 0x00 5.--19. 1. "HADDR,Higher Address" group.long ad:0xC0060058++0x03 line.long 0x00 "RGNACCENW0,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060068++0x03 line.long 0x00 "RGNACCENW1,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060078++0x03 line.long 0x00 "RGNACCENW2,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060088++0x03 line.long 0x00 "RGNACCENW3,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060098++0x03 line.long 0x00 "RGNACCENW4,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00600A8++0x03 line.long 0x00 "RGNACCENW5,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00600B8++0x03 line.long 0x00 "RGNACCENW6,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00600C8++0x03 line.long 0x00 "RGNACCENW7,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00600D8++0x03 line.long 0x00 "RGNACCENW8,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00600E8++0x03 line.long 0x00 "RGNACCENW9,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00600F8++0x03 line.long 0x00 "RGNACCENW10,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060108++0x03 line.long 0x00 "RGNACCENW11,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060118++0x03 line.long 0x00 "RGNACCENW12,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060128++0x03 line.long 0x00 "RGNACCENW13,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060138++0x03 line.long 0x00 "RGNACCENW14,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060148++0x03 line.long 0x00 "RGNACCENW15,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060158++0x03 line.long 0x00 "RGNACCENW16,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060168++0x03 line.long 0x00 "RGNACCENW17,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060178++0x03 line.long 0x00 "RGNACCENW18,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060188++0x03 line.long 0x00 "RGNACCENW19,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060198++0x03 line.long 0x00 "RGNACCENW20,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00601A8++0x03 line.long 0x00 "RGNACCENW21,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00601B8++0x03 line.long 0x00 "RGNACCENW22,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00601C8++0x03 line.long 0x00 "RGNACCENW23,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00601D8++0x03 line.long 0x00 "RGNACCENW24,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00601E8++0x03 line.long 0x00 "RGNACCENW25,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00601F8++0x03 line.long 0x00 "RGNACCENW26,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060208++0x03 line.long 0x00 "RGNACCENW27,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060218++0x03 line.long 0x00 "RGNACCENW28,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060228++0x03 line.long 0x00 "RGNACCENW29,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060238++0x03 line.long 0x00 "RGNACCENW30,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060248++0x03 line.long 0x00 "RGNACCENW31,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC006005C++0x03 line.long 0x00 "RGNACCENR0,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006006C++0x03 line.long 0x00 "RGNACCENR1,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006007C++0x03 line.long 0x00 "RGNACCENR2,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006008C++0x03 line.long 0x00 "RGNACCENR3,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006009C++0x03 line.long 0x00 "RGNACCENR4,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00600AC++0x03 line.long 0x00 "RGNACCENR5,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00600BC++0x03 line.long 0x00 "RGNACCENR6,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00600CC++0x03 line.long 0x00 "RGNACCENR7,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00600DC++0x03 line.long 0x00 "RGNACCENR8,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00600EC++0x03 line.long 0x00 "RGNACCENR9,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00600FC++0x03 line.long 0x00 "RGNACCENR10,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006010C++0x03 line.long 0x00 "RGNACCENR11,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006011C++0x03 line.long 0x00 "RGNACCENR12,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006012C++0x03 line.long 0x00 "RGNACCENR13,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006013C++0x03 line.long 0x00 "RGNACCENR14,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006014C++0x03 line.long 0x00 "RGNACCENR15,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006015C++0x03 line.long 0x00 "RGNACCENR16,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006016C++0x03 line.long 0x00 "RGNACCENR17,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006017C++0x03 line.long 0x00 "RGNACCENR18,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006018C++0x03 line.long 0x00 "RGNACCENR19,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006019C++0x03 line.long 0x00 "RGNACCENR20,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00601AC++0x03 line.long 0x00 "RGNACCENR21,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00601BC++0x03 line.long 0x00 "RGNACCENR22,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00601CC++0x03 line.long 0x00 "RGNACCENR23,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00601DC++0x03 line.long 0x00 "RGNACCENR24,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00601EC++0x03 line.long 0x00 "RGNACCENR25,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00601FC++0x03 line.long 0x00 "RGNACCENR26,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006020C++0x03 line.long 0x00 "RGNACCENR27,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006021C++0x03 line.long 0x00 "RGNACCENR28,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006022C++0x03 line.long 0x00 "RGNACCENR29,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006023C++0x03 line.long 0x00 "RGNACCENR30,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006024C++0x03 line.long 0x00 "RGNACCENR31,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" rgroup.long ad:0xC00602A0++0x17 line.long 0x00 "SBRECORD0,Single Bit Record Register (n=0~4)" hexmask.long 0x00 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x00 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x04 "SBRECORD1,Single Bit Record Register (n=0~4)" hexmask.long 0x04 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x04 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x08 "SBRECORD2,Single Bit Record Register (n=0~4)" hexmask.long 0x08 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x08 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x0C "SBRECORD3,Single Bit Record Register (n=0~4)" hexmask.long 0x0C 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x0C 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x10 "SBRECORD4,Single Bit Record Register (n=0~4)" hexmask.long 0x10 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x10 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x14 "DBRECORD,Double Bit Record Register" hexmask.long 0x14 2.--31. 1. "DBADDR,Double-Bit Address" bitfld.long 0x14 0. "DBRDVD,Double-Bit Record Valid" "0,1" tree.end tree "LMU" tree "LMU1" group.long ad:0xB0060020++0x13 line.long 0x00 "MEMCFG,Memory Config Register" bitfld.long 0x00 18.--19. "AEDIS,Address Error Disable" "0,1,2,3" bitfld.long 0x00 16.--17. "WDEDIS,Write Data Error Disable" "0,1,2,3" bitfld.long 0x00 14.--15. "CEDIS,Control Error Disable" "0,1,2,3" bitfld.long 0x00 12.--13. "RDEDIS,Read Data Error Disable" "0,1,2,3" bitfld.long 0x00 10.--11. "RMWEDIS,Read Modify Write Error Disable" "0,1,2,3" bitfld.long 0x00 8.--9. "MPUEDIS,MPU Error Disable" "0,1,2,3" bitfld.long 0x00 6.--7. "RSVEDIS,Reserve Error Disable" "0,1,2,3" bitfld.long 0x00 0.--1. "ROM,Read Only Memory" "0,1,2,3" line.long 0x04 "MEMSTS,Memory Status Register" bitfld.long 0x04 18. "DIPLSE,Downstream IPbus Lockstep Error" "0,1" bitfld.long 0x04 17. "UIPLSE,Upstream IPbus Lockstep Error" "0,1" bitfld.long 0x04 16. "AEDCE,Address EDC Error" "0,1" bitfld.long 0x04 15. "WDEDCE,Write Data EDC Error" "0,1" bitfld.long 0x04 14. "CPTYE,Control-Single Parity Error" "0,1" bitfld.long 0x04 13. "RMWE,Read Modify Write Error" "0,1" bitfld.long 0x04 12. "RSBECCE,Read Data Single-Bit ECC Error" "0,1" bitfld.long 0x04 11. "RSBOFE,Read Data Single-Bit Overflow Error" "0,1" bitfld.long 0x04 10. "RDBECCE,Read Data Double-Bit ECC Error" "0,1" newline bitfld.long 0x04 5. "MPUWE,MPU Write Error" "0,1" bitfld.long 0x04 4. "MPURE,MPU Read Error" "0,1" bitfld.long 0x04 3. "MPUROE,MPU Read-Only Error" "0,1" bitfld.long 0x04 2. "RSRVE,Reserved Error" "0,1" bitfld.long 0x04 1. "SFRRDNE,SFR Redundancy Error" "0,1" bitfld.long 0x04 0. "SFRE,SFR Error" "0,1" line.long 0x08 "ALMMSK,Alarm Mask Register" bitfld.long 0x08 24.--25. "LSAMSK,Lockstep Alarm Mask" "0,1,2,3" bitfld.long 0x08 22.--23. "DSMAMSK,Downstream Alarm Mask" "0,1,2,3" bitfld.long 0x08 20.--21. "RSBAMSK,Read Single-Bit Alarm Mask" "0,1,2,3" bitfld.long 0x08 18.--19. "RSBOFAMSK,Read Single-Bit Overflow Alarm Mask" "0,1,2,3" bitfld.long 0x08 16.--17. "RDBAMSK,Read Double-Bit Alarm Mask" "0,1,2,3" bitfld.long 0x08 14.--15. "SFRAMSK,SFR Alarm Mask" "0,1,2,3" bitfld.long 0x08 12.--13. "MPUAMSK,MPU Alarm Mask" "0,1,2,3" bitfld.long 0x08 10.--11. "RSVAMSK,Reserve Alarm Mask" "0,1,2,3" line.long 0x0C "MEMSCTRL0,Memory Safety Control Register 0" bitfld.long 0x0C 18.--19. "IPLSEN,IPbus Lockstep Enable" "0,1,2,3" bitfld.long 0x0C 16.--17. "AEDCEN,Address EDC Enable" "0,1,2,3" bitfld.long 0x0C 14.--15. "WDEDCEN,Write Data EDC Enable" "0,1,2,3" bitfld.long 0x0C 12.--13. "CCEN,Control Check Enable" "0,1,2,3" bitfld.long 0x0C 8.--9. "RDECCEN,Read Data ECC Enable" "0,1,2,3" bitfld.long 0x0C 4.--5. "RMPEN,REMAP Enable" "0,1,2,3" bitfld.long 0x0C 0. "SFRBEN,SFR Bus Error Mask" "0,1" line.long 0x10 "MEMSCTRL1,Memory Safety Control Register 1" bitfld.long 0x10 19.--20. "DIPLSINJ,Downstream IPbus Lockstep Inject" "0,1,2,3" bitfld.long 0x10 17.--18. "UIPLSINJ,Upstream IPbus Lockstep Inject" "0,1,2,3" bitfld.long 0x10 15.--16. "AEDCINJ,Address EDC Inject" "0,1,2,3" bitfld.long 0x10 13.--14. "WDEDCINJ,Write Data EDC Inject" "0,1,2,3" bitfld.long 0x10 11.--12. "CPTYINJ,Control Parity Inject" "0,1,2,3" bitfld.long 0x10 9.--10. "RDECCINJ,Read Data ECC Inject" "0,1,2,3" bitfld.long 0x10 7.--8. "INJSEL,Inject Select" "0,1,2,3" group.long ad:0xB0060050++0x03 line.long 0x00 "RGNLA0,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060060++0x03 line.long 0x00 "RGNLA1,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060070++0x03 line.long 0x00 "RGNLA2,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060080++0x03 line.long 0x00 "RGNLA3,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060090++0x03 line.long 0x00 "RGNLA4,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00600A0++0x03 line.long 0x00 "RGNLA5,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00600B0++0x03 line.long 0x00 "RGNLA6,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00600C0++0x03 line.long 0x00 "RGNLA7,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00600D0++0x03 line.long 0x00 "RGNLA8,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00600E0++0x03 line.long 0x00 "RGNLA9,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00600F0++0x03 line.long 0x00 "RGNLA10,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060100++0x03 line.long 0x00 "RGNLA11,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060110++0x03 line.long 0x00 "RGNLA12,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060120++0x03 line.long 0x00 "RGNLA13,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060130++0x03 line.long 0x00 "RGNLA14,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060140++0x03 line.long 0x00 "RGNLA15,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060150++0x03 line.long 0x00 "RGNLA16,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060160++0x03 line.long 0x00 "RGNLA17,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060170++0x03 line.long 0x00 "RGNLA18,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060180++0x03 line.long 0x00 "RGNLA19,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060190++0x03 line.long 0x00 "RGNLA20,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00601A0++0x03 line.long 0x00 "RGNLA21,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00601B0++0x03 line.long 0x00 "RGNLA22,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00601C0++0x03 line.long 0x00 "RGNLA23,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00601D0++0x03 line.long 0x00 "RGNLA24,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00601E0++0x03 line.long 0x00 "RGNLA25,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB00601F0++0x03 line.long 0x00 "RGNLA26,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060200++0x03 line.long 0x00 "RGNLA27,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060210++0x03 line.long 0x00 "RGNLA28,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060220++0x03 line.long 0x00 "RGNLA29,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060230++0x03 line.long 0x00 "RGNLA30,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060240++0x03 line.long 0x00 "RGNLA31,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xB0060054++0x03 line.long 0x00 "RGNHA0,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060064++0x03 line.long 0x00 "RGNHA1,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060074++0x03 line.long 0x00 "RGNHA2,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060084++0x03 line.long 0x00 "RGNHA3,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060094++0x03 line.long 0x00 "RGNHA4,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00600A4++0x03 line.long 0x00 "RGNHA5,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00600B4++0x03 line.long 0x00 "RGNHA6,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00600C4++0x03 line.long 0x00 "RGNHA7,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00600D4++0x03 line.long 0x00 "RGNHA8,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00600E4++0x03 line.long 0x00 "RGNHA9,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00600F4++0x03 line.long 0x00 "RGNHA10,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060104++0x03 line.long 0x00 "RGNHA11,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060114++0x03 line.long 0x00 "RGNHA12,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060124++0x03 line.long 0x00 "RGNHA13,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060134++0x03 line.long 0x00 "RGNHA14,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060144++0x03 line.long 0x00 "RGNHA15,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060154++0x03 line.long 0x00 "RGNHA16,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060164++0x03 line.long 0x00 "RGNHA17,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060174++0x03 line.long 0x00 "RGNHA18,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060184++0x03 line.long 0x00 "RGNHA19,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060194++0x03 line.long 0x00 "RGNHA20,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00601A4++0x03 line.long 0x00 "RGNHA21,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00601B4++0x03 line.long 0x00 "RGNHA22,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00601C4++0x03 line.long 0x00 "RGNHA23,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00601D4++0x03 line.long 0x00 "RGNHA24,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00601E4++0x03 line.long 0x00 "RGNHA25,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB00601F4++0x03 line.long 0x00 "RGNHA26,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060204++0x03 line.long 0x00 "RGNHA27,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060214++0x03 line.long 0x00 "RGNHA28,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060224++0x03 line.long 0x00 "RGNHA29,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060234++0x03 line.long 0x00 "RGNHA30,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060244++0x03 line.long 0x00 "RGNHA31,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xB0060058++0x03 line.long 0x00 "RGNACCENW0,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060068++0x03 line.long 0x00 "RGNACCENW1,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060078++0x03 line.long 0x00 "RGNACCENW2,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060088++0x03 line.long 0x00 "RGNACCENW3,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060098++0x03 line.long 0x00 "RGNACCENW4,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00600A8++0x03 line.long 0x00 "RGNACCENW5,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00600B8++0x03 line.long 0x00 "RGNACCENW6,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00600C8++0x03 line.long 0x00 "RGNACCENW7,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00600D8++0x03 line.long 0x00 "RGNACCENW8,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00600E8++0x03 line.long 0x00 "RGNACCENW9,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00600F8++0x03 line.long 0x00 "RGNACCENW10,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060108++0x03 line.long 0x00 "RGNACCENW11,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060118++0x03 line.long 0x00 "RGNACCENW12,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060128++0x03 line.long 0x00 "RGNACCENW13,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060138++0x03 line.long 0x00 "RGNACCENW14,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060148++0x03 line.long 0x00 "RGNACCENW15,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060158++0x03 line.long 0x00 "RGNACCENW16,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060168++0x03 line.long 0x00 "RGNACCENW17,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060178++0x03 line.long 0x00 "RGNACCENW18,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060188++0x03 line.long 0x00 "RGNACCENW19,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060198++0x03 line.long 0x00 "RGNACCENW20,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00601A8++0x03 line.long 0x00 "RGNACCENW21,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00601B8++0x03 line.long 0x00 "RGNACCENW22,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00601C8++0x03 line.long 0x00 "RGNACCENW23,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00601D8++0x03 line.long 0x00 "RGNACCENW24,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00601E8++0x03 line.long 0x00 "RGNACCENW25,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB00601F8++0x03 line.long 0x00 "RGNACCENW26,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060208++0x03 line.long 0x00 "RGNACCENW27,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060218++0x03 line.long 0x00 "RGNACCENW28,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060228++0x03 line.long 0x00 "RGNACCENW29,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060238++0x03 line.long 0x00 "RGNACCENW30,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB0060248++0x03 line.long 0x00 "RGNACCENW31,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xB006005C++0x03 line.long 0x00 "RGNACCENR0,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006006C++0x03 line.long 0x00 "RGNACCENR1,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006007C++0x03 line.long 0x00 "RGNACCENR2,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006008C++0x03 line.long 0x00 "RGNACCENR3,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006009C++0x03 line.long 0x00 "RGNACCENR4,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00600AC++0x03 line.long 0x00 "RGNACCENR5,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00600BC++0x03 line.long 0x00 "RGNACCENR6,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00600CC++0x03 line.long 0x00 "RGNACCENR7,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00600DC++0x03 line.long 0x00 "RGNACCENR8,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00600EC++0x03 line.long 0x00 "RGNACCENR9,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00600FC++0x03 line.long 0x00 "RGNACCENR10,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006010C++0x03 line.long 0x00 "RGNACCENR11,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006011C++0x03 line.long 0x00 "RGNACCENR12,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006012C++0x03 line.long 0x00 "RGNACCENR13,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006013C++0x03 line.long 0x00 "RGNACCENR14,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006014C++0x03 line.long 0x00 "RGNACCENR15,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006015C++0x03 line.long 0x00 "RGNACCENR16,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006016C++0x03 line.long 0x00 "RGNACCENR17,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006017C++0x03 line.long 0x00 "RGNACCENR18,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006018C++0x03 line.long 0x00 "RGNACCENR19,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006019C++0x03 line.long 0x00 "RGNACCENR20,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00601AC++0x03 line.long 0x00 "RGNACCENR21,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00601BC++0x03 line.long 0x00 "RGNACCENR22,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00601CC++0x03 line.long 0x00 "RGNACCENR23,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00601DC++0x03 line.long 0x00 "RGNACCENR24,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00601EC++0x03 line.long 0x00 "RGNACCENR25,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB00601FC++0x03 line.long 0x00 "RGNACCENR26,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006020C++0x03 line.long 0x00 "RGNACCENR27,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006021C++0x03 line.long 0x00 "RGNACCENR28,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006022C++0x03 line.long 0x00 "RGNACCENR29,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006023C++0x03 line.long 0x00 "RGNACCENR30,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xB006024C++0x03 line.long 0x00 "RGNACCENR31,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" rgroup.long ad:0xB0060250++0x1B line.long 0x00 "SBRECORD0,Single Bit Record Register (n=0~4)" hexmask.long 0x00 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x00 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x04 "SBRECORD1,Single Bit Record Register (n=0~4)" hexmask.long 0x04 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x04 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x08 "SBRECORD2,Single Bit Record Register (n=0~4)" hexmask.long 0x08 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x08 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x0C "SBRECORD3,Single Bit Record Register (n=0~4)" hexmask.long 0x0C 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x0C 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x10 "SBRECORD4,Single Bit Record Register (n=0~4)" hexmask.long 0x10 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x10 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x14 "DBRECORD,Double Bit Record Register" hexmask.long 0x14 2.--31. 1. "DBADDR,Double-Bit Address" bitfld.long 0x14 0. "DBRDVD,Double-Bit Record Valid" "0,1" line.long 0x18 "WDRECORD,AHB Write Data Record Register" hexmask.long 0x18 2.--31. 1. "WDADDR,AHB Write Data Address" bitfld.long 0x18 0. "WDRDVD,AHB Write Data Record Address" "0,1" tree.end tree "LMU2" group.long ad:0xC0060420++0x13 line.long 0x00 "MEMCFG,Memory Config Register" bitfld.long 0x00 18.--19. "AEDIS,Address Error Disable" "0,1,2,3" bitfld.long 0x00 16.--17. "WDEDIS,Write Data Error Disable" "0,1,2,3" bitfld.long 0x00 14.--15. "CEDIS,Control Error Disable" "0,1,2,3" bitfld.long 0x00 12.--13. "RDEDIS,Read Data Error Disable" "0,1,2,3" bitfld.long 0x00 10.--11. "RMWEDIS,Read Modify Write Error Disable" "0,1,2,3" bitfld.long 0x00 8.--9. "MPUEDIS,MPU Error Disable" "0,1,2,3" bitfld.long 0x00 6.--7. "RSVEDIS,Reserve Error Disable" "0,1,2,3" bitfld.long 0x00 0.--1. "ROM,Read Only Memory" "0,1,2,3" line.long 0x04 "MEMSTS,Memory Status Register" bitfld.long 0x04 18. "DIPLSE,Downstream IPbus Lockstep Error" "0,1" bitfld.long 0x04 17. "UIPLSE,Upstream IPbus Lockstep Error" "0,1" bitfld.long 0x04 16. "AEDCE,Address EDC Error" "0,1" bitfld.long 0x04 15. "WDEDCE,Write Data EDC Error" "0,1" bitfld.long 0x04 14. "CPTYE,Control-Single Parity Error" "0,1" bitfld.long 0x04 13. "RMWE,Read Modify Write Error" "0,1" bitfld.long 0x04 12. "RSBECCE,Read Data Single-Bit ECC Error" "0,1" bitfld.long 0x04 11. "RSBOFE,Read Data Single-Bit Overflow Error" "0,1" bitfld.long 0x04 10. "RDBECCE,Read Data Double-Bit ECC Error" "0,1" newline bitfld.long 0x04 5. "MPUWE,MPU Write Error" "0,1" bitfld.long 0x04 4. "MPURE,MPU Read Error" "0,1" bitfld.long 0x04 3. "MPUROE,MPU Read-Only Error" "0,1" bitfld.long 0x04 2. "RSRVE,Reserved Error" "0,1" bitfld.long 0x04 1. "SFRRDNE,SFR Redundancy Error" "0,1" bitfld.long 0x04 0. "SFRE,SFR Error" "0,1" line.long 0x08 "ALMMSK,Alarm Mask Register" bitfld.long 0x08 24.--25. "LSAMSK,Lockstep Alarm Mask" "0,1,2,3" bitfld.long 0x08 22.--23. "DSMAMSK,Downstream Alarm Mask" "0,1,2,3" bitfld.long 0x08 20.--21. "RSBAMSK,Read Single-Bit Alarm Mask" "0,1,2,3" bitfld.long 0x08 18.--19. "RSBOFAMSK,Read Single-Bit Overflow Alarm Mask" "0,1,2,3" bitfld.long 0x08 16.--17. "RDBAMSK,Read Double-Bit Alarm Mask" "0,1,2,3" bitfld.long 0x08 14.--15. "SFRAMSK,SFR Alarm Mask" "0,1,2,3" bitfld.long 0x08 12.--13. "MPUAMSK,MPU Alarm Mask" "0,1,2,3" bitfld.long 0x08 10.--11. "RSVAMSK,Reserve Alarm Mask" "0,1,2,3" line.long 0x0C "MEMSCTRL0,Memory Safety Control Register 0" bitfld.long 0x0C 18.--19. "IPLSEN,IPbus Lockstep Enable" "0,1,2,3" bitfld.long 0x0C 16.--17. "AEDCEN,Address EDC Enable" "0,1,2,3" bitfld.long 0x0C 14.--15. "WDEDCEN,Write Data EDC Enable" "0,1,2,3" bitfld.long 0x0C 12.--13. "CCEN,Control Check Enable" "0,1,2,3" bitfld.long 0x0C 8.--9. "RDECCEN,Read Data ECC Enable" "0,1,2,3" bitfld.long 0x0C 4.--5. "RMPEN,REMAP Enable" "0,1,2,3" bitfld.long 0x0C 0. "SFRBEN,SFR Bus Error Mask" "0,1" line.long 0x10 "MEMSCTRL1,Memory Safety Control Register 1" bitfld.long 0x10 19.--20. "DIPLSINJ,Downstream IPbus Lockstep Inject" "0,1,2,3" bitfld.long 0x10 17.--18. "UIPLSINJ,Upstream IPbus Lockstep Inject" "0,1,2,3" bitfld.long 0x10 15.--16. "AEDCINJ,Address EDC Inject" "0,1,2,3" bitfld.long 0x10 13.--14. "WDEDCINJ,Write Data EDC Inject" "0,1,2,3" bitfld.long 0x10 11.--12. "CPTYINJ,Control Parity Inject" "0,1,2,3" bitfld.long 0x10 9.--10. "RDECCINJ,Read Data ECC Inject" "0,1,2,3" bitfld.long 0x10 7.--8. "INJSEL,Inject Select" "0,1,2,3" group.long ad:0xC0060450++0x03 line.long 0x00 "RGNLA0,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060460++0x03 line.long 0x00 "RGNLA1,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060470++0x03 line.long 0x00 "RGNLA2,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060480++0x03 line.long 0x00 "RGNLA3,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060490++0x03 line.long 0x00 "RGNLA4,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00604A0++0x03 line.long 0x00 "RGNLA5,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00604B0++0x03 line.long 0x00 "RGNLA6,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00604C0++0x03 line.long 0x00 "RGNLA7,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00604D0++0x03 line.long 0x00 "RGNLA8,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00604E0++0x03 line.long 0x00 "RGNLA9,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00604F0++0x03 line.long 0x00 "RGNLA10,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060500++0x03 line.long 0x00 "RGNLA11,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060510++0x03 line.long 0x00 "RGNLA12,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060520++0x03 line.long 0x00 "RGNLA13,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060530++0x03 line.long 0x00 "RGNLA14,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060540++0x03 line.long 0x00 "RGNLA15,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060550++0x03 line.long 0x00 "RGNLA16,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060560++0x03 line.long 0x00 "RGNLA17,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060570++0x03 line.long 0x00 "RGNLA18,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060580++0x03 line.long 0x00 "RGNLA19,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060590++0x03 line.long 0x00 "RGNLA20,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00605A0++0x03 line.long 0x00 "RGNLA21,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00605B0++0x03 line.long 0x00 "RGNLA22,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00605C0++0x03 line.long 0x00 "RGNLA23,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00605D0++0x03 line.long 0x00 "RGNLA24,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00605E0++0x03 line.long 0x00 "RGNLA25,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC00605F0++0x03 line.long 0x00 "RGNLA26,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060600++0x03 line.long 0x00 "RGNLA27,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060610++0x03 line.long 0x00 "RGNLA28,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060620++0x03 line.long 0x00 "RGNLA29,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060630++0x03 line.long 0x00 "RGNLA30,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060640++0x03 line.long 0x00 "RGNLA31,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xC0060454++0x03 line.long 0x00 "RGNHA0,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060464++0x03 line.long 0x00 "RGNHA1,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060474++0x03 line.long 0x00 "RGNHA2,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060484++0x03 line.long 0x00 "RGNHA3,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060494++0x03 line.long 0x00 "RGNHA4,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00604A4++0x03 line.long 0x00 "RGNHA5,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00604B4++0x03 line.long 0x00 "RGNHA6,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00604C4++0x03 line.long 0x00 "RGNHA7,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00604D4++0x03 line.long 0x00 "RGNHA8,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00604E4++0x03 line.long 0x00 "RGNHA9,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00604F4++0x03 line.long 0x00 "RGNHA10,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060504++0x03 line.long 0x00 "RGNHA11,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060514++0x03 line.long 0x00 "RGNHA12,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060524++0x03 line.long 0x00 "RGNHA13,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060534++0x03 line.long 0x00 "RGNHA14,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060544++0x03 line.long 0x00 "RGNHA15,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060554++0x03 line.long 0x00 "RGNHA16,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060564++0x03 line.long 0x00 "RGNHA17,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060574++0x03 line.long 0x00 "RGNHA18,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060584++0x03 line.long 0x00 "RGNHA19,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060594++0x03 line.long 0x00 "RGNHA20,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00605A4++0x03 line.long 0x00 "RGNHA21,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00605B4++0x03 line.long 0x00 "RGNHA22,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00605C4++0x03 line.long 0x00 "RGNHA23,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00605D4++0x03 line.long 0x00 "RGNHA24,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00605E4++0x03 line.long 0x00 "RGNHA25,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC00605F4++0x03 line.long 0x00 "RGNHA26,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060604++0x03 line.long 0x00 "RGNHA27,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060614++0x03 line.long 0x00 "RGNHA28,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060624++0x03 line.long 0x00 "RGNHA29,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060634++0x03 line.long 0x00 "RGNHA30,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060644++0x03 line.long 0x00 "RGNHA31,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xC0060458++0x03 line.long 0x00 "RGNACCENW0,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060468++0x03 line.long 0x00 "RGNACCENW1,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060478++0x03 line.long 0x00 "RGNACCENW2,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060488++0x03 line.long 0x00 "RGNACCENW3,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060498++0x03 line.long 0x00 "RGNACCENW4,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00604A8++0x03 line.long 0x00 "RGNACCENW5,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00604B8++0x03 line.long 0x00 "RGNACCENW6,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00604C8++0x03 line.long 0x00 "RGNACCENW7,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00604D8++0x03 line.long 0x00 "RGNACCENW8,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00604E8++0x03 line.long 0x00 "RGNACCENW9,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00604F8++0x03 line.long 0x00 "RGNACCENW10,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060508++0x03 line.long 0x00 "RGNACCENW11,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060518++0x03 line.long 0x00 "RGNACCENW12,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060528++0x03 line.long 0x00 "RGNACCENW13,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060538++0x03 line.long 0x00 "RGNACCENW14,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060548++0x03 line.long 0x00 "RGNACCENW15,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060558++0x03 line.long 0x00 "RGNACCENW16,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060568++0x03 line.long 0x00 "RGNACCENW17,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060578++0x03 line.long 0x00 "RGNACCENW18,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060588++0x03 line.long 0x00 "RGNACCENW19,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060598++0x03 line.long 0x00 "RGNACCENW20,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00605A8++0x03 line.long 0x00 "RGNACCENW21,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00605B8++0x03 line.long 0x00 "RGNACCENW22,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00605C8++0x03 line.long 0x00 "RGNACCENW23,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00605D8++0x03 line.long 0x00 "RGNACCENW24,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00605E8++0x03 line.long 0x00 "RGNACCENW25,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC00605F8++0x03 line.long 0x00 "RGNACCENW26,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060608++0x03 line.long 0x00 "RGNACCENW27,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060618++0x03 line.long 0x00 "RGNACCENW28,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060628++0x03 line.long 0x00 "RGNACCENW29,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060638++0x03 line.long 0x00 "RGNACCENW30,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC0060648++0x03 line.long 0x00 "RGNACCENW31,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xC006045C++0x03 line.long 0x00 "RGNACCENR0,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006046C++0x03 line.long 0x00 "RGNACCENR1,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006047C++0x03 line.long 0x00 "RGNACCENR2,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006048C++0x03 line.long 0x00 "RGNACCENR3,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006049C++0x03 line.long 0x00 "RGNACCENR4,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00604AC++0x03 line.long 0x00 "RGNACCENR5,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00604BC++0x03 line.long 0x00 "RGNACCENR6,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00604CC++0x03 line.long 0x00 "RGNACCENR7,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00604DC++0x03 line.long 0x00 "RGNACCENR8,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00604EC++0x03 line.long 0x00 "RGNACCENR9,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00604FC++0x03 line.long 0x00 "RGNACCENR10,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006050C++0x03 line.long 0x00 "RGNACCENR11,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006051C++0x03 line.long 0x00 "RGNACCENR12,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006052C++0x03 line.long 0x00 "RGNACCENR13,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006053C++0x03 line.long 0x00 "RGNACCENR14,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006054C++0x03 line.long 0x00 "RGNACCENR15,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006055C++0x03 line.long 0x00 "RGNACCENR16,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006056C++0x03 line.long 0x00 "RGNACCENR17,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006057C++0x03 line.long 0x00 "RGNACCENR18,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006058C++0x03 line.long 0x00 "RGNACCENR19,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006059C++0x03 line.long 0x00 "RGNACCENR20,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00605AC++0x03 line.long 0x00 "RGNACCENR21,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00605BC++0x03 line.long 0x00 "RGNACCENR22,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00605CC++0x03 line.long 0x00 "RGNACCENR23,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00605DC++0x03 line.long 0x00 "RGNACCENR24,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00605EC++0x03 line.long 0x00 "RGNACCENR25,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC00605FC++0x03 line.long 0x00 "RGNACCENR26,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006060C++0x03 line.long 0x00 "RGNACCENR27,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006061C++0x03 line.long 0x00 "RGNACCENR28,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006062C++0x03 line.long 0x00 "RGNACCENR29,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006063C++0x03 line.long 0x00 "RGNACCENR30,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xC006064C++0x03 line.long 0x00 "RGNACCENR31,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" rgroup.long ad:0xC0060650++0x1B line.long 0x00 "SBRECORD0,Single Bit Record Register (n=0~4)" hexmask.long 0x00 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x00 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x04 "SBRECORD1,Single Bit Record Register (n=0~4)" hexmask.long 0x04 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x04 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x08 "SBRECORD2,Single Bit Record Register (n=0~4)" hexmask.long 0x08 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x08 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x0C "SBRECORD3,Single Bit Record Register (n=0~4)" hexmask.long 0x0C 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x0C 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x10 "SBRECORD4,Single Bit Record Register (n=0~4)" hexmask.long 0x10 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x10 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x14 "DBRECORD,Double Bit Record Register" hexmask.long 0x14 2.--31. 1. "DBADDR,Double-Bit Address" bitfld.long 0x14 0. "DBRDVD,Double-Bit Record Valid" "0,1" line.long 0x18 "WDRECORD,AHB Write Data Record Register" hexmask.long 0x18 2.--31. 1. "WDADDR,AHB Write Data Address" bitfld.long 0x18 0. "WDRDVD,AHB Write Data Record Address" "0,1" tree.end tree "LMU3" group.long ad:0xD0050020++0x13 line.long 0x00 "MEMCFG,Memory Config Register" bitfld.long 0x00 18.--19. "AEDIS,Address Error Disable" "0,1,2,3" bitfld.long 0x00 16.--17. "WDEDIS,Write Data Error Disable" "0,1,2,3" bitfld.long 0x00 14.--15. "CEDIS,Control Error Disable" "0,1,2,3" bitfld.long 0x00 12.--13. "RDEDIS,Read Data Error Disable" "0,1,2,3" bitfld.long 0x00 10.--11. "RMWEDIS,Read Modify Write Error Disable" "0,1,2,3" bitfld.long 0x00 8.--9. "MPUEDIS,MPU Error Disable" "0,1,2,3" bitfld.long 0x00 6.--7. "RSVEDIS,Reserve Error Disable" "0,1,2,3" bitfld.long 0x00 0.--1. "ROM,Read Only Memory" "0,1,2,3" line.long 0x04 "MEMSTS,Memory Status Register" bitfld.long 0x04 18. "DIPLSE,Downstream IPbus Lockstep Error" "0,1" bitfld.long 0x04 17. "UIPLSE,Upstream IPbus Lockstep Error" "0,1" bitfld.long 0x04 16. "AEDCE,Address EDC Error" "0,1" bitfld.long 0x04 15. "WDEDCE,Write Data EDC Error" "0,1" bitfld.long 0x04 14. "CPTYE,Control-Single Parity Error" "0,1" bitfld.long 0x04 13. "RMWE,Read Modify Write Error" "0,1" bitfld.long 0x04 12. "RSBECCE,Read Data Single-Bit ECC Error" "0,1" bitfld.long 0x04 11. "RSBOFE,Read Data Single-Bit Overflow Error" "0,1" bitfld.long 0x04 10. "RDBECCE,Read Data Double-Bit ECC Error" "0,1" newline bitfld.long 0x04 5. "MPUWE,MPU Write Error" "0,1" bitfld.long 0x04 4. "MPURE,MPU Read Error" "0,1" bitfld.long 0x04 3. "MPUROE,MPU Read-Only Error" "0,1" bitfld.long 0x04 2. "RSRVE,Reserved Error" "0,1" bitfld.long 0x04 1. "SFRRDNE,SFR Redundancy Error" "0,1" bitfld.long 0x04 0. "SFRE,SFR Error" "0,1" line.long 0x08 "ALMMSK,Alarm Mask Register" bitfld.long 0x08 24.--25. "LSAMSK,Lockstep Alarm Mask" "0,1,2,3" bitfld.long 0x08 22.--23. "DSMAMSK,Downstream Alarm Mask" "0,1,2,3" bitfld.long 0x08 20.--21. "RSBAMSK,Read Single-Bit Alarm Mask" "0,1,2,3" bitfld.long 0x08 18.--19. "RSBOFAMSK,Read Single-Bit Overflow Alarm Mask" "0,1,2,3" bitfld.long 0x08 16.--17. "RDBAMSK,Read Double-Bit Alarm Mask" "0,1,2,3" bitfld.long 0x08 14.--15. "SFRAMSK,SFR Alarm Mask" "0,1,2,3" bitfld.long 0x08 12.--13. "MPUAMSK,MPU Alarm Mask" "0,1,2,3" bitfld.long 0x08 10.--11. "RSVAMSK,Reserve Alarm Mask" "0,1,2,3" line.long 0x0C "MEMSCTRL0,Memory Safety Control Register 0" bitfld.long 0x0C 18.--19. "IPLSEN,IPbus Lockstep Enable" "0,1,2,3" bitfld.long 0x0C 16.--17. "AEDCEN,Address EDC Enable" "0,1,2,3" bitfld.long 0x0C 14.--15. "WDEDCEN,Write Data EDC Enable" "0,1,2,3" bitfld.long 0x0C 12.--13. "CCEN,Control Check Enable" "0,1,2,3" bitfld.long 0x0C 8.--9. "RDECCEN,Read Data ECC Enable" "0,1,2,3" bitfld.long 0x0C 4.--5. "RMPEN,REMAP Enable" "0,1,2,3" bitfld.long 0x0C 0. "SFRBEN,SFR Bus Error Mask" "0,1" line.long 0x10 "MEMSCTRL1,Memory Safety Control Register 1" bitfld.long 0x10 19.--20. "DIPLSINJ,Downstream IPbus Lockstep Inject" "0,1,2,3" bitfld.long 0x10 17.--18. "UIPLSINJ,Upstream IPbus Lockstep Inject" "0,1,2,3" bitfld.long 0x10 15.--16. "AEDCINJ,Address EDC Inject" "0,1,2,3" bitfld.long 0x10 13.--14. "WDEDCINJ,Write Data EDC Inject" "0,1,2,3" bitfld.long 0x10 11.--12. "CPTYINJ,Control Parity Inject" "0,1,2,3" bitfld.long 0x10 9.--10. "RDECCINJ,Read Data ECC Inject" "0,1,2,3" bitfld.long 0x10 7.--8. "INJSEL,Inject Select" "0,1,2,3" group.long ad:0xD0050050++0x03 line.long 0x00 "RGNLA0,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050060++0x03 line.long 0x00 "RGNLA1,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050070++0x03 line.long 0x00 "RGNLA2,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050080++0x03 line.long 0x00 "RGNLA3,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050090++0x03 line.long 0x00 "RGNLA4,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00500A0++0x03 line.long 0x00 "RGNLA5,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00500B0++0x03 line.long 0x00 "RGNLA6,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00500C0++0x03 line.long 0x00 "RGNLA7,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00500D0++0x03 line.long 0x00 "RGNLA8,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00500E0++0x03 line.long 0x00 "RGNLA9,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00500F0++0x03 line.long 0x00 "RGNLA10,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050100++0x03 line.long 0x00 "RGNLA11,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050110++0x03 line.long 0x00 "RGNLA12,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050120++0x03 line.long 0x00 "RGNLA13,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050130++0x03 line.long 0x00 "RGNLA14,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050140++0x03 line.long 0x00 "RGNLA15,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050150++0x03 line.long 0x00 "RGNLA16,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050160++0x03 line.long 0x00 "RGNLA17,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050170++0x03 line.long 0x00 "RGNLA18,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050180++0x03 line.long 0x00 "RGNLA19,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050190++0x03 line.long 0x00 "RGNLA20,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00501A0++0x03 line.long 0x00 "RGNLA21,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00501B0++0x03 line.long 0x00 "RGNLA22,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00501C0++0x03 line.long 0x00 "RGNLA23,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00501D0++0x03 line.long 0x00 "RGNLA24,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00501E0++0x03 line.long 0x00 "RGNLA25,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD00501F0++0x03 line.long 0x00 "RGNLA26,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050200++0x03 line.long 0x00 "RGNLA27,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050210++0x03 line.long 0x00 "RGNLA28,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050220++0x03 line.long 0x00 "RGNLA29,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050230++0x03 line.long 0x00 "RGNLA30,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050240++0x03 line.long 0x00 "RGNLA31,Region Lower Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "LADDR,Lower Address" group.long ad:0xD0050054++0x03 line.long 0x00 "RGNHA0,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050064++0x03 line.long 0x00 "RGNHA1,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050074++0x03 line.long 0x00 "RGNHA2,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050084++0x03 line.long 0x00 "RGNHA3,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050094++0x03 line.long 0x00 "RGNHA4,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00500A4++0x03 line.long 0x00 "RGNHA5,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00500B4++0x03 line.long 0x00 "RGNHA6,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00500C4++0x03 line.long 0x00 "RGNHA7,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00500D4++0x03 line.long 0x00 "RGNHA8,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00500E4++0x03 line.long 0x00 "RGNHA9,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00500F4++0x03 line.long 0x00 "RGNHA10,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050104++0x03 line.long 0x00 "RGNHA11,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050114++0x03 line.long 0x00 "RGNHA12,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050124++0x03 line.long 0x00 "RGNHA13,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050134++0x03 line.long 0x00 "RGNHA14,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050144++0x03 line.long 0x00 "RGNHA15,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050154++0x03 line.long 0x00 "RGNHA16,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050164++0x03 line.long 0x00 "RGNHA17,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050174++0x03 line.long 0x00 "RGNHA18,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050184++0x03 line.long 0x00 "RGNHA19,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050194++0x03 line.long 0x00 "RGNHA20,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00501A4++0x03 line.long 0x00 "RGNHA21,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00501B4++0x03 line.long 0x00 "RGNHA22,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00501C4++0x03 line.long 0x00 "RGNHA23,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00501D4++0x03 line.long 0x00 "RGNHA24,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00501E4++0x03 line.long 0x00 "RGNHA25,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD00501F4++0x03 line.long 0x00 "RGNHA26,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050204++0x03 line.long 0x00 "RGNHA27,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050214++0x03 line.long 0x00 "RGNHA28,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050224++0x03 line.long 0x00 "RGNHA29,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050234++0x03 line.long 0x00 "RGNHA30,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050244++0x03 line.long 0x00 "RGNHA31,Region Higher Address Register n (n=0~31)" hexmask.long 0x00 5.--31. 1. "HADDR,Higher Address" group.long ad:0xD0050058++0x03 line.long 0x00 "RGNACCENW0,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050068++0x03 line.long 0x00 "RGNACCENW1,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050078++0x03 line.long 0x00 "RGNACCENW2,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050088++0x03 line.long 0x00 "RGNACCENW3,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050098++0x03 line.long 0x00 "RGNACCENW4,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00500A8++0x03 line.long 0x00 "RGNACCENW5,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00500B8++0x03 line.long 0x00 "RGNACCENW6,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00500C8++0x03 line.long 0x00 "RGNACCENW7,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00500D8++0x03 line.long 0x00 "RGNACCENW8,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00500E8++0x03 line.long 0x00 "RGNACCENW9,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00500F8++0x03 line.long 0x00 "RGNACCENW10,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050108++0x03 line.long 0x00 "RGNACCENW11,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050118++0x03 line.long 0x00 "RGNACCENW12,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050128++0x03 line.long 0x00 "RGNACCENW13,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050138++0x03 line.long 0x00 "RGNACCENW14,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050148++0x03 line.long 0x00 "RGNACCENW15,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050158++0x03 line.long 0x00 "RGNACCENW16,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050168++0x03 line.long 0x00 "RGNACCENW17,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050178++0x03 line.long 0x00 "RGNACCENW18,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050188++0x03 line.long 0x00 "RGNACCENW19,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050198++0x03 line.long 0x00 "RGNACCENW20,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00501A8++0x03 line.long 0x00 "RGNACCENW21,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00501B8++0x03 line.long 0x00 "RGNACCENW22,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00501C8++0x03 line.long 0x00 "RGNACCENW23,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00501D8++0x03 line.long 0x00 "RGNACCENW24,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00501E8++0x03 line.long 0x00 "RGNACCENW25,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD00501F8++0x03 line.long 0x00 "RGNACCENW26,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050208++0x03 line.long 0x00 "RGNACCENW27,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050218++0x03 line.long 0x00 "RGNACCENW28,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050228++0x03 line.long 0x00 "RGNACCENW29,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050238++0x03 line.long 0x00 "RGNACCENW30,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD0050248++0x03 line.long 0x00 "RGNACCENW31,Region Write Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "WEN31,Write Enable" "0,1" bitfld.long 0x00 30. "WEN30,Write Enable" "0,1" bitfld.long 0x00 29. "WEN29,Write Enable" "0,1" bitfld.long 0x00 28. "WEN28,Write Enable" "0,1" bitfld.long 0x00 27. "WEN27,Write Enable" "0,1" bitfld.long 0x00 26. "WEN26,Write Enable" "0,1" bitfld.long 0x00 25. "WEN25,Write Enable" "0,1" bitfld.long 0x00 24. "WEN24,Write Enable" "0,1" bitfld.long 0x00 23. "WEN23,Write Enable" "0,1" newline bitfld.long 0x00 22. "WEN22,Write Enable" "0,1" bitfld.long 0x00 21. "WEN21,Write Enable" "0,1" bitfld.long 0x00 20. "WEN20,Write Enable" "0,1" bitfld.long 0x00 19. "WEN19,Write Enable" "0,1" bitfld.long 0x00 18. "WEN18,Write Enable" "0,1" bitfld.long 0x00 17. "WEN17,Write Enable" "0,1" bitfld.long 0x00 16. "WEN16,Write Enable" "0,1" bitfld.long 0x00 15. "WEN15,Write Enable" "0,1" bitfld.long 0x00 14. "WEN14,Write Enable" "0,1" newline bitfld.long 0x00 13. "WEN13,Write Enable" "0,1" bitfld.long 0x00 12. "WEN12,Write Enable" "0,1" bitfld.long 0x00 11. "WEN11,Write Enable" "0,1" bitfld.long 0x00 10. "WEN10,Write Enable" "0,1" bitfld.long 0x00 9. "WEN9,Write Enable" "0,1" bitfld.long 0x00 8. "WEN8,Write Enable" "0,1" bitfld.long 0x00 7. "WEN7,Write Enable" "0,1" bitfld.long 0x00 6. "WEN6,Write Enable" "0,1" bitfld.long 0x00 5. "WEN5,Write Enable" "0,1" newline bitfld.long 0x00 4. "WEN4,Write Enable" "0,1" bitfld.long 0x00 3. "WEN3,Write Enable" "0,1" bitfld.long 0x00 2. "WEN2,Write Enable" "0,1" bitfld.long 0x00 1. "WEN1,Write Enable" "0,1" bitfld.long 0x00 0. "WEN0,Write Enable" "0,1" group.long ad:0xD005005C++0x03 line.long 0x00 "RGNACCENR0,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005006C++0x03 line.long 0x00 "RGNACCENR1,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005007C++0x03 line.long 0x00 "RGNACCENR2,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005008C++0x03 line.long 0x00 "RGNACCENR3,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005009C++0x03 line.long 0x00 "RGNACCENR4,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00500AC++0x03 line.long 0x00 "RGNACCENR5,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00500BC++0x03 line.long 0x00 "RGNACCENR6,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00500CC++0x03 line.long 0x00 "RGNACCENR7,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00500DC++0x03 line.long 0x00 "RGNACCENR8,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00500EC++0x03 line.long 0x00 "RGNACCENR9,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00500FC++0x03 line.long 0x00 "RGNACCENR10,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005010C++0x03 line.long 0x00 "RGNACCENR11,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005011C++0x03 line.long 0x00 "RGNACCENR12,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005012C++0x03 line.long 0x00 "RGNACCENR13,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005013C++0x03 line.long 0x00 "RGNACCENR14,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005014C++0x03 line.long 0x00 "RGNACCENR15,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005015C++0x03 line.long 0x00 "RGNACCENR16,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005016C++0x03 line.long 0x00 "RGNACCENR17,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005017C++0x03 line.long 0x00 "RGNACCENR18,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005018C++0x03 line.long 0x00 "RGNACCENR19,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005019C++0x03 line.long 0x00 "RGNACCENR20,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00501AC++0x03 line.long 0x00 "RGNACCENR21,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00501BC++0x03 line.long 0x00 "RGNACCENR22,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00501CC++0x03 line.long 0x00 "RGNACCENR23,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00501DC++0x03 line.long 0x00 "RGNACCENR24,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00501EC++0x03 line.long 0x00 "RGNACCENR25,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD00501FC++0x03 line.long 0x00 "RGNACCENR26,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005020C++0x03 line.long 0x00 "RGNACCENR27,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005021C++0x03 line.long 0x00 "RGNACCENR28,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005022C++0x03 line.long 0x00 "RGNACCENR29,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005023C++0x03 line.long 0x00 "RGNACCENR30,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" group.long ad:0xD005024C++0x03 line.long 0x00 "RGNACCENR31,Region Read Access Enable Register n (n=0~31)" bitfld.long 0x00 31. "REN31,Read Enable" "0,1" bitfld.long 0x00 30. "REN30,Read Enable" "0,1" bitfld.long 0x00 29. "REN29,Read Enable" "0,1" bitfld.long 0x00 28. "REN28,Read Enable" "0,1" bitfld.long 0x00 27. "REN27,Read Enable" "0,1" bitfld.long 0x00 26. "REN26,Read Enable" "0,1" bitfld.long 0x00 25. "REN25,Read Enable" "0,1" bitfld.long 0x00 24. "REN24,Read Enable" "0,1" bitfld.long 0x00 23. "REN23,Read Enable" "0,1" newline bitfld.long 0x00 22. "REN22,Read Enable" "0,1" bitfld.long 0x00 21. "REN21,Read Enable" "0,1" bitfld.long 0x00 20. "REN20,Read Enable" "0,1" bitfld.long 0x00 19. "REN19,Read Enable" "0,1" bitfld.long 0x00 18. "REN18,Read Enable" "0,1" bitfld.long 0x00 17. "REN17,Read Enable" "0,1" bitfld.long 0x00 16. "REN16,Read Enable" "0,1" bitfld.long 0x00 15. "REN15,Read Enable" "0,1" bitfld.long 0x00 14. "REN14,Read Enable" "0,1" newline bitfld.long 0x00 13. "REN13,Read Enable" "0,1" bitfld.long 0x00 12. "REN12,Read Enable" "0,1" bitfld.long 0x00 11. "REN11,Read Enable" "0,1" bitfld.long 0x00 10. "REN10,Read Enable" "0,1" bitfld.long 0x00 9. "REN9,Read Enable" "0,1" bitfld.long 0x00 8. "REN8,Read Enable" "0,1" bitfld.long 0x00 7. "REN7,Read Enable" "0,1" bitfld.long 0x00 6. "REN6,Read Enable" "0,1" bitfld.long 0x00 5. "REN5,Read Enable" "0,1" newline bitfld.long 0x00 4. "REN4,Read Enable" "0,1" bitfld.long 0x00 3. "REN3,Read Enable" "0,1" bitfld.long 0x00 2. "REN2,Read Enable" "0,1" bitfld.long 0x00 1. "REN1,Read Enable" "0,1" bitfld.long 0x00 0. "REN0,Read Enable" "0,1" rgroup.long ad:0xD0050250++0x1B line.long 0x00 "SBRECORD0,Single Bit Record Register (n=0~4)" hexmask.long 0x00 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x00 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x04 "SBRECORD1,Single Bit Record Register (n=0~4)" hexmask.long 0x04 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x04 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x08 "SBRECORD2,Single Bit Record Register (n=0~4)" hexmask.long 0x08 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x08 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x0C "SBRECORD3,Single Bit Record Register (n=0~4)" hexmask.long 0x0C 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x0C 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x10 "SBRECORD4,Single Bit Record Register (n=0~4)" hexmask.long 0x10 2.--31. 1. "SBADDR,Single-Bit Address" bitfld.long 0x10 0. "SBRDVD,Single-Bit Record Valid" "0,1" line.long 0x14 "DBRECORD,Double Bit Record Register" hexmask.long 0x14 2.--31. 1. "DBADDR,Double-Bit Address" bitfld.long 0x14 0. "DBRDVD,Double-Bit Record Valid" "0,1" line.long 0x18 "WDRECORD,AHB Write Data Record Register" hexmask.long 0x18 2.--31. 1. "WDADDR,AHB Write Data Address" bitfld.long 0x18 0. "WDRDVD,AHB Write Data Record Address" "0,1" tree.end tree.end tree "MAINCLOCK" group.long ad:0xC0000010++0x07 line.long 0x00 "HSECON1,HSE Control Register 1" rbitfld.long 0x00 9. "HSE_READY,HSE Clock Stability Flag" "0,1" bitfld.long 0x00 3.--4. "HSE_GAINSEL,Gain select signal" "0,1,2,3" bitfld.long 0x00 2. "HSE_APREN,Automatic Amplitude Control Enable" "0,1" bitfld.long 0x00 1. "HSE_BYPEN,BYPASS enable signal" "0,1" newline bitfld.long 0x00 0. "HSE_EN,HSE Enable" "0,1" line.long 0x04 "HSECON2,HSE Control Register 2 (Stability Time Counter Configuration)" hexmask.long.word 0x04 0.--15. 1. "STBCNT,HSE Clock Waiting Stabilization Time Configuration" group.long ad:0xC0000060++0x2B line.long 0x00 "PLLREFSEL,PLL Reference Clock Selection Register" bitfld.long 0x00 2.--3. "PERPLL_REFSEL,Peripheral PLL Reference Clock Selection" "0,1,2,3" bitfld.long 0x00 0.--1. "SYSPLL_REFSEL,System PLL Reference Clock Selection" "0,1,2,3" line.long 0x04 "SYSPLLCON1,System PLL Control Register 1" rbitfld.long 0x04 16. "PLLRDY,PLL Clock Lock Flag" "0,1" bitfld.long 0x04 13. "BYPASS,PLL Clock Output BYPASS Control" "0,1" bitfld.long 0x04 12. "FOUTVCOPD,FOUTVCO Output Clock Off Enable" "0,1" bitfld.long 0x04 9. "DACPD,DAC Off Control" "0,1" newline bitfld.long 0x04 8. "PLLMOD,PLL Clock Mode" "0,1" bitfld.long 0x04 5. "FOUT4PHASEPD,4 Phase Output Clock (e.g. FOUT1PH0) Produces a Shutdown Enable" "0,1" bitfld.long 0x04 4. "FOUTPOSTDIVPD,POST DIVIDE's Circuit Power Down Enable" "0,1" bitfld.long 0x04 0. "PLLPD,PLL Power Down Enable" "0,1" line.long 0x08 "SYSPLLCON2,System PLL Control Register 2" hexmask.long.byte 0x08 20.--25. 1. "REFDIV,Reference Clock Frequency Division Value" bitfld.long 0x08 16.--18. "POSTDIV2,PLL POST Divider2 Setting (1 to 7)" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. "POSTDIV1,PLL POST Divider1 Setting (1 to 7)" "0,1,2,3,4,5,6,7" hexmask.long.word 0x08 0.--11. 1. "FBDIV,PLL Feedback Factor Setting" line.long 0x0C "SYSPLLCON3,System PLL Control Register 3" hexmask.long.tbyte 0x0C 0.--23. 1. "FRAC,Fractional Frequency Multiplier Value" line.long 0x10 "SYSPLLCON4,System PLL Control Register 4" bitfld.long 0x10 0. "SYSPLL_MODE,System PLL Spread Spectrum Mode Enable" "0,1" line.long 0x14 "SSMODCON1,Spread Spectrum Modulator Control Register 1" hexmask.long.word 0x14 16.--27. 1. "INTIN,Input Integer Divide Value" hexmask.long.byte 0x14 9.--14. 1. "DIVVAL,Divider Value" bitfld.long 0x14 4.--8. "SPREAD,Amplitude Control of Frequency Variation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 2. "DISABLE_SSCG,SSMOD Bypass Mode Control" "0,1" newline bitfld.long 0x14 1. "DOWNPACE,Downspread Control" "0,1" bitfld.long 0x14 0. "RESET,Modulator Reset Control" "0,1" line.long 0x18 "SSMODCON2,Spread Spectrum Modulator Control Register 2" bitfld.long 0x18 1. "RESETPTR,Wave Table Pointer Reset Control" "0,1" line.long 0x1C "SSMODCON3,Spread Spectrum Modulator Control Register 3" hexmask.long.tbyte 0x1C 0.--23. 1. "FRACIN,Input Fractional Divide Value" line.long 0x20 "PERPLLCON1,Peripheral PLL Control Register 1" rbitfld.long 0x20 16. "PLLRDY,PLL Clock Lock Flag" "0,1" bitfld.long 0x20 13. "BYPASS,PLL Clock Output BYPASS Control" "0,1" bitfld.long 0x20 12. "FOUTVCOPD,FOUTVCO Clock Port Off Enable" "0,1" bitfld.long 0x20 9. "DACPD,DAC Off Enable" "0,1" newline bitfld.long 0x20 8. "PLLMOD,PLL Clock Mode" "0,1" bitfld.long 0x20 5. "FOUT4PHASEPD,4-Phase Output Clock (e.g. FOUT1PH0) Produces a Shutdown Enable" "0,1" bitfld.long 0x20 4. "FOUTPOSTDIVPD,POST DIVIDE's Circuit Power Down Enable" "0,1" bitfld.long 0x20 0. "PLLPD,PLL Power Down Enable" "0,1" line.long 0x24 "PERPLLCON2,Peripheral PLL Control Register 2" hexmask.long.byte 0x24 20.--25. 1. "REFDIV,Reference Clock Frequency Division Value" bitfld.long 0x24 16.--18. "POSTDIV2,PLL POST Divider2 Setting (1 to 7)" "0,1,2,3,4,5,6,7" bitfld.long 0x24 12.--14. "POSTDIV1,PLL POST Divider1 Setting (1 to 7)" "0,1,2,3,4,5,6,7" hexmask.long.word 0x24 0.--11. 1. "FBDIV,PLL Feedback Factor Setting" line.long 0x28 "PERPLLCON3,Peripheral PLL Control Register 3" hexmask.long.tbyte 0x28 0.--23. 1. "FRAC,Fractional Frequency Multiplication Coefficient Configuration" group.long ad:0xC0000100++0x1F line.long 0x00 "SYSCLKCON1,System Clock Control Register 1" bitfld.long 0x00 20.--21. "SYSCLKSEL,System Clock Source (SYS_CLK_SRC) Selection" "0,1,2,3" hexmask.long.byte 0x00 0.--7. 1. "CPU_DIV,CPU Clock Frequency Division Coefficient" line.long 0x04 "SYSCLKCON2,System Clock Control Register 2" bitfld.long 0x04 20.--22. "SYS_DIV,System Clock Frequency Division Coefficient" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 12.--17. 1. "AXI_DIV,AXI Clock Division Factor" hexmask.long.word 0x04 0.--8. 1. "AHB_DIV,AHB Clock Frequency Division Coefficient" line.long 0x08 "SYSCLKCON3,System Clock Control Register 3" bitfld.long 0x08 0. "RESET_BUSCLKDIVCNT_EN,When the system is reset the bus clock frequency division counter is forced to 0" "0,1" line.long 0x0C "SYSCLKCON4,System Clock Control Register 4" bitfld.long 0x0C 0. "BUSDIV_UPDATE,Bus Frequency Division Update" "0,1" line.long 0x10 "SYSCLKCON5,System Clock Control Register 5" bitfld.long 0x10 0.--4. "CPU_CNTCLKENDIV,CPU Counter Clock Frequency Division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "SYSCLKCON6,System Clock Control Register 6" bitfld.long 0x14 8.--10. "CPU_PCLKENDBGDIV,CPU Debug APB interface clock frequency division coefficient maximum 8 division" "0,1,2,3,4,5,6,7" bitfld.long 0x14 4.--6. "CPU_ATCLKENIDIV,CPU instruction trace clock frequency division factor maximum 8 frequency division" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0.--2. "CPU_ATCLKENDDIV,CPU data trace clock frequency division factor maximum 8 frequency division" "0,1,2,3,4,5,6,7" line.long 0x18 "SYSCLKCON7,System Clock Control Register 7" bitfld.long 0x18 24.--25. "ATB_CLKSEL,ATBCLK Clock Source Selection" "0,1,2,3" bitfld.long 0x18 0.--3. "ATB_DIV,ATB clock frequency division coefficient maximum 16 frequency division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "SYSCLKCON8,System Clock Control Register 8" bitfld.long 0x1C 16.--17. "TRACE_CLKSEL,Trace Clock Source Selection" "0,1,2,3" bitfld.long 0x1C 0.--3. "TRACE_DIV,Trace clock frequency division coefficient maximum 16 frequency division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00001A0++0x23 line.long 0x00 "CLKCON1,Clock Control Register 1" bitfld.long 0x00 16.--17. "GTM_CLKSEL,GTM Clock Source Selection" "0,1,2,3" bitfld.long 0x00 0.--4. "GTM_DIV,GTM clock frequency division factor maximum 32 frequency division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "CLKCON2,Clock Control Register 2" bitfld.long 0x04 16.--17. "QSPI_CLKSEL,QSPI Clock Selection" "0,1,2,3" bitfld.long 0x04 0.--4. "QSPI_DIV,QSPI frequency division factor maximum 32 frequency division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "CLKCON3,Clock Control Register 3" bitfld.long 0x08 16.--17. "ESPI_CLKSEL,ESPI Clock Selection" "0,1,2,3" bitfld.long 0x08 0.--4. "ESPI_DIV,ESPI frequency division factor maximum 32 frequency division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "CLKCON4,Clock Control Register 4" bitfld.long 0x0C 16.--17. "CAN_CCLKSEL,CAN Clock Selection" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "CAN_DIV,CAN Frequency Division Factor" line.long 0x10 "CLKCON5,Clock Control Register 5" bitfld.long 0x10 16.--17. "SARADC_CLKSEL,SARADC Clock Selection" "0,1,2,3" line.long 0x14 "CLKCON6,Clock Control Register 6" bitfld.long 0x14 16.--17. "RDCDSADC_CLKSEL,RDC/DSADC Clock Selection" "0,1,2,3" hexmask.long.byte 0x14 8.--13. 1. "RDC_DIV,RDC clock frequency division factor maximum 64 frequency division" hexmask.long.byte 0x14 0.--5. 1. "DSADC_DIV,DSADC clock frequency division factor maximum 64 frequency division" line.long 0x18 "CLKCON7,Clock Control Register 7" bitfld.long 0x18 0.--1. "MSC_CLKSEL,MSC Clock Selection" "0,1,2,3" line.long 0x1C "CLKCON8,Clock Control Register 8" bitfld.long 0x1C 16.--17. "CPUWDT_CLKSEL,CPU0/1 WDT and Safety WDT Clock Selection" "0,1,2,3" bitfld.long 0x1C 0.--4. "CPUWDT_DIV,CPU_WDT_CLOCK frequency division factor maximum 32 frequency division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "CLKCON9,Clock Control Register 9" bitfld.long 0x20 16.--17. "IPCNT_CLKSEL,IPCNT Clock Selection" "0,1,2,3" hexmask.long.byte 0x20 0.--5. 1. "IPCNT_DIV,IPCNT Clock Frequency Division Factor" rgroup.long ad:0xC00001C4++0x03 line.long 0x00 "CLKCON10,Clock Control Register 10" hexmask.long.byte 0x00 0.--7. 1. "ASIBAUD_DIV,The register is read-only and reads 1/2 of the value SYCLKCON2" group.long ad:0xC00001C8++0x03 line.long 0x00 "CLKCON11,Clock Control Register 11" bitfld.long 0x00 16.--17. "FC_CLKSEL,FC Clock Selection" "0,1,2,3" bitfld.long 0x00 0.--4. "FC_DIV,FC Clock Frequency Division Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC0000260++0x17 line.long 0x00 "CLKTIM1CON,Timer1 Clock Control Register" bitfld.long 0x00 16.--17. "TIM1_CLKSEL,Timer1 Clock Selection" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. "DIV,Clock Divide" line.long 0x04 "CLKTIM2CON,Timer2 Clock Control Register" bitfld.long 0x04 16.--17. "TIM2_CLKSEL,Timer2 Clock Selection" "0,1,2,3" hexmask.long.word 0x04 0.--15. 1. "DIV,Clock Divide" line.long 0x08 "CLKTIM3CON,Timer3 Clock Control Register" bitfld.long 0x08 16.--17. "TIM3_CLKSEL,Timer3 Clock Selection" "0,1,2,3" hexmask.long.word 0x08 0.--15. 1. "DIV,Clock Divide" line.long 0x0C "CLKTIM4CON,Timer4 Clock Control Register" bitfld.long 0x0C 16.--17. "TIM4_CLKSEL,Timer4 Clock Selection" "0,1,2,3" hexmask.long.word 0x0C 0.--15. 1. "DIV,Clock Divide" line.long 0x10 "CLKTIM5CON,Timer5 Clock Control Register" bitfld.long 0x10 16.--17. "TIM5_CLKSEL,Timer5 Clock Selection" "0,1,2,3" hexmask.long.word 0x10 0.--15. 1. "DIV,Clock Divide" line.long 0x14 "CLKTIM6CON,Timer6 Clock Control Register" bitfld.long 0x14 16.--17. "TIM6_CLKSEL,Timer6 Clock Selection" "0,1,2,3" hexmask.long.word 0x14 0.--15. 1. "DIV,Clock Divide" group.long ad:0xC0000300++0x1B line.long 0x00 "CLKEN1,Clock Enable Register 1" bitfld.long 0x00 21. "TSENSOR1_EN,TSENSOR1 Enable" "0,1" bitfld.long 0x00 20. "TSENSOR0_EN,TSENSOR0 Enable" "0,1" bitfld.long 0x00 6. "AHB_DMA3_EN,AHB_DMA3 Enable" "0,1" bitfld.long 0x00 5. "AHB_DMA2_EN,AHB_DMA2 Enable" "0,1" newline bitfld.long 0x00 4. "AHB_DMA1_EN,AHB_DMA1 Enable" "0,1" bitfld.long 0x00 0. "AXI_DMA0_EN,AXI_DMA0 Enable" "0,1" line.long 0x04 "CLKEN2,Clock Enable Register 2" bitfld.long 0x04 28. "ECRC_EN,ECRC Enable" "0,1" bitfld.long 0x04 24. "MSC0_EN,MSC0 Enable" "0,1" bitfld.long 0x04 20. "I2C0_EN,I2C0 Enable" "0,1" bitfld.long 0x04 16. "QSPI_EN,QSPI Enable" "0,1" newline bitfld.long 0x04 6. "BASETIM2PCLK_EN,BASETIMER2 PCLK Enable" "0,1" bitfld.long 0x04 5. "BASETIM1PCLK_EN,BASETIMER1 PCLK Enable" "0,1" bitfld.long 0x04 4. "BASETIM0PCLK_EN,BASETIMER0 PCLK Enable" "0,1" bitfld.long 0x04 1. "GETH_EN,GETH Enable" "0,1" newline bitfld.long 0x04 0. "GTM_EN,GTM Enable" "0,1" line.long 0x08 "CLKEN3,Clock Enable Register 3" bitfld.long 0x08 24. "ESPI8_EN,ESPI8 Enable" "0,1" bitfld.long 0x08 23. "ESPI7_EN,ESPI7 Enable" "0,1" bitfld.long 0x08 22. "ESPI6_EN,ESPI6 Enable" "0,1" bitfld.long 0x08 21. "ESPI5_EN,ESPI5 enable" "0,1" newline bitfld.long 0x08 20. "ESPI4_EN,ESPI4 Enable" "0,1" bitfld.long 0x08 19. "ESPI3_EN,ESPI3 Enable" "0,1" bitfld.long 0x08 18. "ESPI2_EN,ESPI2 Enable" "0,1" bitfld.long 0x08 17. "ESPI1_EN,ESPI1 Enable" "0,1" newline bitfld.long 0x08 16. "ESPI0_EN,ESPI0 Enable" "0,1" bitfld.long 0x08 9. "SENT9_EN,SENT9 Enable" "0,1" bitfld.long 0x08 8. "SENT8_EN,SENT8 Enable" "0,1" bitfld.long 0x08 7. "SENT7_EN,SENT7 Enable" "0,1" newline bitfld.long 0x08 6. "SENT6_EN,SENT6 Enable" "0,1" bitfld.long 0x08 5. "SENT5_EN,SENT5 Enable" "0,1" bitfld.long 0x08 4. "SENT4_EN,SENT4 Enable" "0,1" bitfld.long 0x08 3. "SENT3_EN,SENT3 Enable" "0,1" newline bitfld.long 0x08 2. "SENT2_EN,SENT2 Enable" "0,1" bitfld.long 0x08 1. "SENT1_EN,SENT1 Enable" "0,1" bitfld.long 0x08 0. "SENT0_EN,SENT0 Enable" "0,1" line.long 0x0C "CLKEN4,Clock Enable Register 4" bitfld.long 0x0C 21. "CAN5_EN,CAN5 Enable" "0,1" bitfld.long 0x0C 20. "CAN4_EN,CAN4 Enable" "0,1" bitfld.long 0x0C 19. "CAN3_EN,CAN3 Enable" "0,1" bitfld.long 0x0C 18. "CAN2_EN,CAN2 Enable" "0,1" newline bitfld.long 0x0C 17. "CAN1_EN,CAN1 Enable" "0,1" bitfld.long 0x0C 16. "CAN0_EN,CAN0 Enable" "0,1" bitfld.long 0x0C 7. "ASI7_EN,ASI7 Enable" "0,1" bitfld.long 0x0C 6. "ASI6_EN,AS6 Enable" "0,1" newline bitfld.long 0x0C 5. "ASI5_EN,ASI5 Enable" "0,1" bitfld.long 0x0C 4. "ASI4_EN,ASI4 Enable" "0,1" bitfld.long 0x0C 3. "ASI3_EN,ASI3 Enable" "0,1" bitfld.long 0x0C 2. "ASI2_EN,ASI2 Enable" "0,1" newline bitfld.long 0x0C 1. "ASI1_EN,ASI1 Enable" "0,1" bitfld.long 0x0C 0. "ASI0_EN,ASI0 Enable" "0,1" line.long 0x10 "CLKEN5,Clock Enable Register 5" bitfld.long 0x10 28. "RDC0_EN,RDC0 Enable" "0,1" bitfld.long 0x10 25. "FC1_EN,FC1 Enable" "0,1" bitfld.long 0x10 24. "FC0_EN,FC0 Enable" "0,1" bitfld.long 0x10 17. "SARADC9_EN,SARADC9 Enable" "0,1" newline bitfld.long 0x10 16. "SARADC8_EN,SARADC8 Enable" "0,1" bitfld.long 0x10 15. "SARADC3_EN,SARADC3 Enable" "0,1" bitfld.long 0x10 14. "SARADC2_EN,SARADC2 Enable" "0,1" bitfld.long 0x10 13. "SARADC1_EN,SARADC1 Enable" "0,1" newline bitfld.long 0x10 12. "SARADC0_EN,SARADC0 Enable" "0,1" bitfld.long 0x10 3. "DSADC3_EN,DSADC3 Enable" "0,1" bitfld.long 0x10 2. "DSADC2_EN,DSADC2 Enable" "0,1" bitfld.long 0x10 1. "DSADC1_EN,DSADC1 Enable" "0,1" newline bitfld.long 0x10 0. "DSADC0_EN,DSADC0 Enable" "0,1" line.long 0x14 "CLKEN6,Clock Enable Register 6" bitfld.long 0x14 30. "TRACECLK_EN,TRACECLK Enable" "0,1" bitfld.long 0x14 29. "ATBCLK_EN,ATBCLK Enable" "0,1" bitfld.long 0x14 28. "DBGCLK_EN,DBGCLK Enable" "0,1" bitfld.long 0x14 18. "LMU3_EN,LMU3 Enable" "0,1" newline bitfld.long 0x14 17. "LMU2_EN,LMU2 Enable" "0,1" bitfld.long 0x14 16. "LMU1_EN,LMU1 Enable" "0,1" bitfld.long 0x14 12. "GMU0_EN,GMU0 Enable" "0,1" bitfld.long 0x14 5. "BASETIM2_TIMCLK2_EN,BASETIMER2 TIMCLK2 Enable" "0,1" newline bitfld.long 0x14 4. "BASETIM2_TIMCLK1_EN,BASETIMER2 TIMCLK1 Enable" "0,1" bitfld.long 0x14 3. "BASETIM1_TIMCLK2_EN,BASETIMER1 TIMCLK2 Enable" "0,1" bitfld.long 0x14 2. "BASETIM1_TIMCLK1_EN,BASETIMER1 TIMCLK1 Enable" "0,1" bitfld.long 0x14 1. "BASETIM0_TIMCLK2_EN,BASETIMER0 TIMCLK2 Enable" "0,1" newline bitfld.long 0x14 0. "BASETIM0_TIMCLK1_EN,BASETIMER0 TIMCLK1 Enable" "0,1" line.long 0x18 "CLKEN7,Clock Enable Register 7" bitfld.long 0x18 3. "NVMDFC0_EN,NVM DFC0 CLK Enable" "0,1" bitfld.long 0x18 2. "NVMPFC1_EN,NVM PFC1 CLK Enable" "0,1" bitfld.long 0x18 1. "NVMPFC0_EN,NVM PFC0 CLK Enable" "0,1" bitfld.long 0x18 0. "NVMHCLK_EN,NVM HCLK Enable" "0,1" group.long ad:0xC0000374++0x13 line.long 0x00 "CLKENWDT,WDT Clock Enable Register" bitfld.long 0x00 5. "CPU1WDT_EN,CPU1WDT Enable" "0,1" bitfld.long 0x00 4. "CPU0WDT_EN,CPU0WDT Enable" "0,1" bitfld.long 0x00 0. "SAFEWDT_EN,SAFEWDT Enable" "0,1" line.long 0x04 "CLKENWDTPROT,WDT Clock Enable Write-Protect Register" line.long 0x08 "CLKENDIV,Module Frequency Division Enable Register" bitfld.long 0x08 23. "CPUATCLKDDIVEN,CPUATCLKD Clock Divider Operation Enable" "0,1" bitfld.long 0x08 22. "CPUATCLKIDIVEN,CPUATCLKI Clock Divider Operation Enable" "0,1" bitfld.long 0x08 21. "CPUPCLKDBGDIVEN,CPUPCLKDBG Clock Divider Operation Enable" "0,1" bitfld.long 0x08 20. "CNTCLKDIVEN,CNT Clock Divider Operation Enable" "0,1" newline bitfld.long 0x08 19. "LBISTDCCLKDIVEN,LBISTDC Clock Divider Operation Enable" "0,1" bitfld.long 0x08 18. "ISTCONCLKDIVEN,IST Clock Divider Operation Enable" "0,1" bitfld.long 0x08 17. "TRACECLKDIVEN,TRACE Clock Divider Operation Enable" "0,1" bitfld.long 0x08 16. "ATBCLKDIVEN,ATB Clock Divider Operation Enable" "0,1" newline bitfld.long 0x08 15. "BASETIM2TCLK2DIVEN,BASETIMER2 Timer2 Clock Divider Operation Enable" "0,1" bitfld.long 0x08 14. "BASETIM2TCLK1DIVEN,BASETIMER2 Timer1 Clock Divider Operation Enable" "0,1" bitfld.long 0x08 13. "BASETIM1TCLK2DIVEN,BASETIMER1 Timer2 Clock Divider Operation Enable" "0,1" bitfld.long 0x08 12. "BASETIM1TCLK1DIVEN,BASETIMER1 Timer1 Clock Divider Operation Enable" "0,1" newline bitfld.long 0x08 11. "BASETIM0TCLK2DIVEN,BASETIMER0 Timer2 Clock Divider Operation Enable" "0,1" bitfld.long 0x08 10. "BASETIM0TCLK1DIVEN,BASETIMER0 Timer1 Clock Divider Operation Enable" "0,1" bitfld.long 0x08 9. "FCCLKDIVEN,FC Clock Divider Operation Enable" "0,1" bitfld.long 0x08 8. "ASIBAUDCLKDIVEN,ASI Baud Clock Divider Operation Enable" "0,1" newline bitfld.long 0x08 7. "RDCDSADCCLKDIVEN,RDC/DSADC Clock Divider Operation Enable" "0,1" bitfld.long 0x08 5. "CANCCLKDIVEN,CAN Clock Divider Operation Enable" "0,1" bitfld.long 0x08 4. "ESPICLKDIVEN,ESPI Clock Divider Operation Enable" "0,1" bitfld.long 0x08 3. "QSPICLKDIVEN,QSPI Clock Divider Operation Enable" "0,1" newline bitfld.long 0x08 2. "GTMCLKDIVEN,GTM Clock Divider Operation Enable" "0,1" bitfld.long 0x08 1. "IPCNTCLKDIVEN,IPCNT Clock Divider Operation Enable" "0,1" line.long 0x0C "EXTCLKCON,External Clock Output Control Register" bitfld.long 0x0C 12.--16. "EXTCLK1_SEL,EXT CLK1 Output Clock Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 4.--8. "EXTCLK0_SEL,EXT CLK0 Output Clock Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 1. "EXTCLK1_EN,EXT1 Pin Clock Output Enable" "0,1" bitfld.long 0x0C 0. "EXTCLK0_EN,EXT0 Pin Clock Output Enable" "0,1" line.long 0x10 "EXTCLKDIV,External Clock Output Frequency Division Register" bitfld.long 0x10 28. "EXTCLK1_DIV,Frequency division coefficient of EXTCLK1_PRE" "0,1" hexmask.long.word 0x10 16.--25. 1. "EXTCLK1PRE_DIV,Configure the ICG integer frequency division coefficient for EXTCLK1PRE division range 0~1023" bitfld.long 0x10 12. "EXTCLK0_DIV,Frequency division coefficient of EXTCLK0_PRE" "0,1" hexmask.long.word 0x10 0.--9. 1. "EXTCLK0PRE_DIV,Configure the ICG integer frequency division coefficient for EXTCLK0pre frequency division range 0~1023" group.long ad:0xC0000400++0x5B line.long 0x00 "PLLLOCKCON,PLL Loss of Lock Control Register" bitfld.long 0x00 3. "PERPLL_LLALMEN,PERPLL Loss Lock Alarm Enable" "0,1" bitfld.long 0x00 2. "SYSPLL_LLALMEN,SYSPLL Loss Lock Alarm Enable" "0,1" bitfld.long 0x00 1. "PERPLL_SWITCHEN,After PERPLL lost lock or alive alarm PERPLL clock switches to HSI clock control" "0,1" bitfld.long 0x00 0. "SYSPLL_SWITCHEN,After SYSPLL lost lock or alive alarm the SYSPLL clock switches to HSI clock control" "0,1" line.long 0x04 "SYSPLLCLKMON,SYSPLL Clock Monitor Register" bitfld.long 0x04 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x04 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x04 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x04 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x04 0. "FREQMON_EN,SYSPLL Clock Frequency Monitoring Enable" "0,1" line.long 0x08 "PERPLLMON,PERPLL Clock Monitor Register" bitfld.long 0x08 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x08 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x08 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x08 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x08 0. "FREQMON_EN,PERPLL Clock Frequency Monitoring Enable" "0,1" line.long 0x0C "HSECLKMON,HSE Clock Monitor Register" bitfld.long 0x0C 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x0C 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x0C 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x0C 0. "FREQMON_EN,HSE Clock Frequency Monitoring Enable" "0,1" line.long 0x10 "HSICLKMON,HSI Clock Monitor Register" bitfld.long 0x10 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x10 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x10 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x10 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x10 0. "FREQMON_EN,HSI Clock Frequency Monitoring Enable" "0,1" line.long 0x14 "LSICLKMON,LSI Clock Monitor Register" bitfld.long 0x14 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x14 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x14 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" bitfld.long 0x14 0. "FREQMON_EN,LSI Clock Frequency Monitoring Enable" "0,1" line.long 0x18 "CPUCLKMON,CPU Clock Monitor Register" bitfld.long 0x18 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x18 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x18 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x18 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x18 0. "FREQMON_EN,CPU Clock Frequency Monitoring Enable" "0,1" line.long 0x1C "SYSCLKMON,System Clock Monitor Register" bitfld.long 0x1C 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x1C 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x1C 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x1C 0. "FREQMON_EN,SYSCLK Frequency Monitoring Enable" "0,1" line.long 0x20 "AXICLKMON,AXI Clock Monitor Register" bitfld.long 0x20 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x20 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x20 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x20 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x20 0. "FREQMON_EN,AXI Clock Frequency Monitoring Enable" "0,1" line.long 0x24 "AHBCLKMON,AHB Clock Monitor Register" bitfld.long 0x24 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x24 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x24 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x24 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x24 0. "FREQMON_EN,AHB Clock Frequency Monitoring Enable" "0,1" line.long 0x28 "APBSTBCLKMON,APB STB Clock Monitor Register" bitfld.long 0x28 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x28 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x28 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x28 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x28 0. "FREQMON_EN,APB_STB Clock Frequency Monitoring Enable" "0,1" line.long 0x2C "WDTCLKMON,WDT Clock Monitor Register" bitfld.long 0x2C 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x2C 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x2C 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x2C 0. "FREQMON_EN,CPU WDT Clock Frequency Monitoring Enable" "0,1" line.long 0x30 "IPCNTCLKMON,IPCNT Clock Monitor Register" bitfld.long 0x30 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x30 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x30 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x30 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x30 0. "FREQMON_EN,IPCNT Clock Frequency Monitoring Enable" "0,1" line.long 0x34 "IWDGCLKMON,IWDG Clock Monitor Register" bitfld.long 0x34 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x34 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x34 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" bitfld.long 0x34 0. "FREQMON_EN,IWDG Clock Frequency Monitoring Enable" "0,1" line.long 0x38 "GTMCLKMON,GTM Clock Monitor Register" bitfld.long 0x38 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x38 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x38 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x38 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x38 0. "FREQMON_EN,GTM Clock Frequency Monitoring Enable" "0,1" line.long 0x3C "QSPICLKMON,QSPI Clock Monitor Register" bitfld.long 0x3C 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x3C 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x3C 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x3C 0. "FREQMON_EN,QSPI Clock Frequency Monitoring Enable" "0,1" line.long 0x40 "ESPICLKMON,ESPI Clock Monitor Register" bitfld.long 0x40 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x40 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x40 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x40 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x40 0. "FREQMON_EN,ESPI Clock Frequency Monitoring Enable" "0,1" line.long 0x44 "CANCCLKMON,CAN Clock Monitor Register" bitfld.long 0x44 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x44 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x44 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x44 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x44 0. "FREQMON_EN,CAN Clock Frequency Monitoring Enable" "0,1" line.long 0x48 "SARADCCLKMON,SARADC Clock Monitor Register" bitfld.long 0x48 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x48 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x48 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x48 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x48 0. "FREQMON_EN,SARADC Clock Frequency Monitoring Enable" "0,1" line.long 0x4C "RDCCLKMON,RDC Clock Monitor Register" bitfld.long 0x4C 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x4C 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x4C 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x4C 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x4C 0. "FREQMON_EN,RDC Clock Frequency Monitoring Enable" "0,1" line.long 0x50 "DSADCCLKMON,DSADC Clock Monitor Register" bitfld.long 0x50 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x50 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x50 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x50 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x50 0. "FREQMON_EN,DSADC Clock Frequency Monitoring Enable" "0,1" line.long 0x54 "MSCCLKMON,MSC Clock Monitor Register" bitfld.long 0x54 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x54 25. "ALIVEMON_EN,Frequency alive monitoring Enable" "0,1" hexmask.long.word 0x54 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x54 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x54 0. "FREQMON_EN,MSC Clock Frequency Monitoring Enable" "0,1" line.long 0x58 "FCCLKMON,FC Clock Monitor Register" bitfld.long 0x58 27.--29. "MONALIVE_DIV,Alive Monitor Division" "0,1,2,3,4,5,6,7" bitfld.long 0x58 25. "ALIVEMON_EN,Frequency Alive Monitoring Enable" "0,1" hexmask.long.word 0x58 13.--24. 1. "LOWER_VAL,Frequency Monitoring Preset Lower Threshold" hexmask.long.word 0x58 1.--12. 1. "UPPER_VAL,Frequency Monitoring Preset Upper Threshold" newline bitfld.long 0x58 0. "FREQMON_EN,FC Clock Frequency Monitoring Enable" "0,1" group.long ad:0xC0000500++0x07 line.long 0x00 "CLKFREQMONSTAT1,Clock Frequency Monitor State Register 1" line.long 0x04 "CLKFREQMONSTAT1CLR,Clock Frequency Monitor State Clear Register 1" bitfld.long 0x04 30. "ESPI_FLAGCLR,ESPI Clock Monitor State Clear" "0,1" bitfld.long 0x04 28. "QSPI_FLAGCLR,QSPI Clock Monitor State Clear" "0,1" bitfld.long 0x04 26. "GTM_FLAGCLR,GTM Clock Monitor State Clear" "0,1" bitfld.long 0x04 24. "IWDG_FLAGCLR,IWDG Clock Monitor State Clear" "0,1" newline bitfld.long 0x04 22. "IPCNT_FLAGCLR,IPCNT Clock Monitor State Clear" "0,1" bitfld.long 0x04 20. "WDT_FLAGCLR,WDT Clock Monitor State Clear" "0,1" bitfld.long 0x04 18. "APBSTB_FLAGCLR,APB Standby Monitor State Clear" "0,1" bitfld.long 0x04 16. "AHB_FLAGCLR,AHB Clock Monitor State Clear" "0,1" newline bitfld.long 0x04 14. "AXI_FLAGCLR,AXI Clock Monitor State Clear" "0,1" bitfld.long 0x04 12. "SYSCLK_FLAGCLR,SYSCLK Monitor State Clear" "0,1" bitfld.long 0x04 10. "CPUCLK_FLAGCLR,CPUCLK Monitor State Clear" "0,1" bitfld.long 0x04 8. "LSICLK_FLAGCLR,LSI Monitor State Clear" "0,1" newline bitfld.long 0x04 6. "HSI_FLAGCLR,HSI Monitor State Clear" "0,1" bitfld.long 0x04 4. "HSE_FLAGCLR,HSE Monitor State Clear" "0,1" bitfld.long 0x04 2. "PERPLL_FLAGCLR,PERPLL Monitor State Clear" "0,1" bitfld.long 0x04 0. "SYSPLL_FLAGCLR,SYSPLL Monitor State Clear" "0,1" rgroup.long ad:0xC0000508++0x03 line.long 0x00 "CLKFREQMONSTAT2,Clock Frequency Monitor State Register 2" bitfld.long 0x00 11. "FC_LOWFLAG,FC Clock Lower Frequency Monitoring Status" "0,1" bitfld.long 0x00 10. "FC_UPFLAG,FC Clock Upper Frequency Monitoring Status" "0,1" bitfld.long 0x00 9. "MSC_LOWFLAG,MSC Clock Lower Frequency Monitoring Status" "0,1" bitfld.long 0x00 8. "MSC_UPFLAG,MSC Clock Upper Frequency Monitoring Status" "0,1" newline bitfld.long 0x00 7. "DSADC_LOWFLAG,DSADC Clock Lower Frequency Monitoring Status" "0,1" bitfld.long 0x00 6. "DSADC_UPFLAG,DSADC Clock Upper Frequency Monitoring Status" "0,1" bitfld.long 0x00 5. "RDC_LOWFLAG,RDC Clock Lower Frequency Monitoring Status" "0,1" bitfld.long 0x00 4. "RDC_UPFLAG,RDC Clock Upper Frequency Monitoring Status" "0,1" newline bitfld.long 0x00 3. "SARADC_LOWFLAG,SARADC Clock Lower Frequency Monitoring Status" "0,1" bitfld.long 0x00 2. "SARADC_UPFLAG,SARADC Clock Upper Frequency Monitoring Status" "0,1" bitfld.long 0x00 1. "CAN_LOWFLAG,CAN Clock Lower Frequency Monitoring Status" "0,1" bitfld.long 0x00 0. "CAN_UPFLAG,CAN Clock Upper Frequency Monitoring Status" "0,1" group.long ad:0xC000050C++0x03 line.long 0x00 "CLKFREQMONSTAT2CLR,Clock Frequency Monitor State Clear Register 2" bitfld.long 0x00 10. "FC_FLAGCLR,FC Clock Monitor State Clear" "0,1" bitfld.long 0x00 8. "MSC_FLAGCLR,MSC Clock Monitor State Clear" "0,1" bitfld.long 0x00 6. "DSADC_FLAGCLR,DSADC Clock Monitor State Clear" "0,1" bitfld.long 0x00 4. "RDC_FLAGCLR,RDC Clock Monitor State Clear" "0,1" newline bitfld.long 0x00 2. "SARADC_FLAGCLR,SARADC Clock Monitor State Clear" "0,1" bitfld.long 0x00 0. "CAN_FLAGCLR,CAN Clock Monitor State Clear" "0,1" rgroup.long ad:0xC0000510++0x03 line.long 0x00 "CLKALIVEMONSTAT,Clock Alive Monitor State Register" bitfld.long 0x00 23. "PERPLLLOCKLOSS_ERRFLAG,PERPLL Lock Loss Alive Monitors Status" "0,1" bitfld.long 0x00 22. "SYSPLLLOCKLOSS_ERRFLAG,SYSPLL Lock Loss Alive Monitors Status" "0,1" bitfld.long 0x00 21. "FC_ERRFLAG,FC Alive Monitors Status" "0,1" bitfld.long 0x00 20. "MSC_ERRFLAG,MSC Alive Monitors Status" "0,1" newline bitfld.long 0x00 19. "DSADC_ERRFLAG,DSADC Alive Monitors Status" "0,1" bitfld.long 0x00 18. "RDC_ERRFLAG,RDC Alive Monitors Status" "0,1" bitfld.long 0x00 17. "SARADC_ERRFLAG,SARADC Alive Monitors Status" "0,1" bitfld.long 0x00 16. "CAN_ERRFLAG,CAN Alive Monitors Status" "0,1" newline bitfld.long 0x00 15. "ESPI_ERRFLAG,ESPI Alive Monitors Status" "0,1" bitfld.long 0x00 14. "QSPI_ERRFLAG,QSPI Alive Monitors Status" "0,1" bitfld.long 0x00 13. "GTM_ERRFLAG,GTM Alive Monitors Status" "0,1" bitfld.long 0x00 12. "IWDG_ERRFLAG,IWDG Alive Monitors Status" "0,1" newline bitfld.long 0x00 11. "IPCNT_ERRFLAG,IPCNT Alive Monitors Status" "0,1" bitfld.long 0x00 10. "WDT_ERRFLAG,WDT Alive Monitors Status" "0,1" bitfld.long 0x00 9. "APBSTB_ERRFLAG,APB Standby Alive Monitors Status" "0,1" bitfld.long 0x00 8. "AHB_ERRFLAG,AHB Alive Monitors Status" "0,1" newline bitfld.long 0x00 7. "AXI_ERRFLAG,AXI Alive Monitors Status" "0,1" bitfld.long 0x00 6. "SYSCLK_ERRFLAG,SYSCLK Alive Monitors Status" "0,1" bitfld.long 0x00 5. "CPUCLK_ERRFLAG,CPUCLK Alive Monitors Status" "0,1" bitfld.long 0x00 4. "LSI_ERRFLAG,LSI Alive Monitors Status" "0,1" newline bitfld.long 0x00 3. "HSI_ERRFLAG,HSI Alive Monitors Status" "0,1" bitfld.long 0x00 2. "HSE_ERRFLAG,HSE Alive Monitors Status" "0,1" bitfld.long 0x00 1. "PERPLL_ERRFLAG,PERPLL Alive Monitors Status" "0,1" bitfld.long 0x00 0. "SYSPLL_ERRFLAG,SYSPLL Alive Monitors Status" "0,1" group.long ad:0xC0000514++0x03 line.long 0x00 "CLKALIVEMONSTATCLR,Clock Alive Monitor State Clear Register" bitfld.long 0x00 23. "PERPLL_LOCKLOSS_ERRCLR,PERPLL LOCK LOSS Alive Monitor State Clear" "0,1" bitfld.long 0x00 22. "SYSPLL_LOCKLOSS_ERRCLR,SYSPLL LOCK LOSS Alive Monitor State Clear" "0,1" bitfld.long 0x00 21. "FC_ERRCLR,FC Alive Monitor State Clear" "0,1" bitfld.long 0x00 20. "MSC_ERRCLR,MSC Alive Monitor State Clear" "0,1" newline bitfld.long 0x00 19. "DSADC_ERRCLR,DSADC Alive Monitor State Clear" "0,1" bitfld.long 0x00 18. "RDC_ERRCLR,RDC Alive Monitor State Clear" "0,1" bitfld.long 0x00 17. "SARADC_ERRCLR,SARADC Alive Monitor State Clear" "0,1" bitfld.long 0x00 16. "CAN_ERRCLR,CAN Alive Monitor State Clear" "0,1" newline bitfld.long 0x00 15. "ESPI_ERRCLR,ESPI Alive Monitor State Clear" "0,1" bitfld.long 0x00 14. "QSPI_ERRCLR,QSPI Alive Monitor State Clear" "0,1" bitfld.long 0x00 13. "GTM_ERRCLR,GTM Alive Monitor State Clear" "0,1" bitfld.long 0x00 12. "IWDG_ERRCLR,IWDG Alive Monitor State Clear" "0,1" newline bitfld.long 0x00 11. "IPCNT_ERRCLR,IPCNT Alive Monitor State Clear" "0,1" bitfld.long 0x00 10. "WDT_ERRCLR,WDT Alive Monitor State Clear" "0,1" bitfld.long 0x00 9. "APBSTB_ERRCLR,APB Standby Alive Monitor State Clear" "0,1" bitfld.long 0x00 8. "AHB_ERRCLR,AHB Alive Monitor State Clear" "0,1" newline bitfld.long 0x00 7. "AXI_ERRCLR,AXI Alive Monitor State Clear" "0,1" bitfld.long 0x00 6. "SYSCLK_ERRCLR,SYSCLK Alive Monitor State Clear" "0,1" bitfld.long 0x00 5. "CPUCLK_ERRCLR,CPUCLK Alive Monitor State Clear" "0,1" bitfld.long 0x00 4. "LSI_ERRCLR,LSI Alive Monitor State Clear" "0,1" newline bitfld.long 0x00 3. "HSI_ERRCLR,HSI Alive Monitor State Clear" "0,1" bitfld.long 0x00 2. "HSE_ERRCLR,HSE Alive Monitor State Clear" "0,1" bitfld.long 0x00 1. "PERPLL_ERRCLR,PERPLL Alive Monitor State Clear" "0,1" bitfld.long 0x00 0. "SYSPLL_ERRCLR,SYSPLL Alive Monitor State Clear" "0,1" group.long ad:0xC0000560++0x03 line.long 0x00 "CLKSFFALMSMEN,Clock Safety Flip-Flop Alarm Security Mechanism Enable Register" bitfld.long 0x00 0. "CLKSFFALMSMEN,Security Register Alarm Enable" "0,1" rgroup.long ad:0xC0000564++0x03 line.long 0x00 "CLKSFFALMSTAT,Clock Safety Flip-Flop Alarm State Register" bitfld.long 0x00 7. "GROUP7_CLKSFALMSTAT,Group7 Security Register Alarm Status" "0,1" bitfld.long 0x00 6. "GROUP6_CLKSFALMSTAT,Group6 Security Register Alarm Status" "0,1" bitfld.long 0x00 5. "GROUP5_CLKSFALMSTAT,Group5 Security Register Alarm Status" "0,1" bitfld.long 0x00 4. "GROUP4_CLKSFALMSTAT,Group4 Security Register Alarm Status" "0,1" newline bitfld.long 0x00 3. "GROUP3_CLKSFALMSTAT,Group3 Security Register Alarm Status" "0,1" bitfld.long 0x00 2. "GROUP2_CLKSFALMSTAT,Group2 Security Register Alarm Status" "0,1" bitfld.long 0x00 1. "GROUP1_CLKSFALMSTAT,Group1 Security Register Alarm Status" "0,1" bitfld.long 0x00 0. "GROUP0_CLKSFALMSTAT,Group0 Security Register Alarm Status" "0,1" group.long ad:0xC0000568++0x07 line.long 0x00 "CLKSFFALMSTATCLR,Clock Safety Flip-Flop Alarm State Clear Register" bitfld.long 0x00 0. "CLKSFALMSTATCLR,Clear Safety Register Alarm Status" "0,1" line.long 0x04 "CLKSFFALMFAULTIN,Clock Safety Flip-Flop Alarm Fault Injection Register" bitfld.long 0x04 0. "CLKSFALMFAULTIN,Safety Register Fault Injection" "0,1" group.long ad:0xC0000580++0x03 line.long 0x00 "CLKBEMASK,Clock Bus Error Mask Register" bitfld.long 0x00 0. "CLKBEMASK,Bus Error Mask Control" "0,1" rgroup.long ad:0xC0000584++0x03 line.long 0x00 "CLKESEALMSTAT,Clock Register E or SE Authority Alarm Register" bitfld.long 0x00 1. "CLKSEALMSTAT,Clock Register SE Authority Alarm Status" "0,1" bitfld.long 0x00 0. "CLKEALMSTAT,Clock Register E Authority Alarm Status" "0,1" group.long ad:0xC0000588++0x03 line.long 0x00 "CLKSEALMSTATCLR,Clock Register E or SE Authority Alarm Clear Register" bitfld.long 0x00 1. "CLKSEALMSTATCLR,Clock Register SE Authority Alarm Status Clear" "0,1" bitfld.long 0x00 0. "CLKEALMSTATCLR,Clock Register E Authority Alarm Status Clear" "0,1" tree.end tree "STBCLOCK" rgroup.long ad:0xD0060400++0x03 line.long 0x00 "LSICON1,LSI Control Register 1" bitfld.long 0x00 0. "LSIREADY,The HSI Clock Stability Flag" "0,1" group.long ad:0xD0060404++0x03 line.long 0x00 "LSICON2,LSI Control Register 2" bitfld.long 0x00 0. "STBCNT,HSI Clock Waiting Stabilization Time Configuration" "0,1" group.long ad:0xD0060410++0x07 line.long 0x00 "CLKSTBSEL,Clock of Standby Select Register" bitfld.long 0x00 0. "CLKSEL,Standby Power Domain Clock Source Selection" "0,1" line.long 0x04 "CLKSTBEN,Clock of Standby Enable Register" bitfld.long 0x04 0. "IWDG_EN,IWDG Clock Enable Control" "0,1" group.long ad:0xD0060480++0x03 line.long 0x00 "CLKSTBSFFALMSMEN,Clock of Standby Safety Flip-Flop Alarm Security Mechanism Enable Register" bitfld.long 0x00 0. "CLKSTASFFALMSMEN,Safety Alarm Enable" "0,1" rgroup.long ad:0xD0060484++0x03 line.long 0x00 "CLKSTBSFFALMSTAT,Clock of Standby Safety Flip-Flop Alarm Status Register" bitfld.long 0x00 8. "CLKSTBSFF8ALMSTAT,Clock of Standby Safety Flip-Flop 8 Alarm Status" "0,1" bitfld.long 0x00 7. "CLKSTBSFF7ALMSTAT,Clock of Standby Safety Flip-Flop 7 Alarm Status" "0,1" bitfld.long 0x00 6. "CLKSTBSFF6ALMSTAT,Clock of Standby Safety Flip-Flop 6 Alarm Status" "0,1" bitfld.long 0x00 5. "CLKSTBSFF5ALMSTAT,Clock of Standby Safety Flip-Flop 5 Alarm Status" "0,1" bitfld.long 0x00 4. "CLKSTBSFF4ALMSTAT,Clock of Standby Safety Flip-Flop 4 Alarm Status" "0,1" newline bitfld.long 0x00 3. "CLKSTBSFF3ALMSTAT,Clock of Standby Safety Flip-Flop 3 Alarm Status" "0,1" bitfld.long 0x00 1. "CLKSTBSFF1ALMSTAT,Clock of Standby Safety Flip-Flop 1 Alarm Status" "0,1" bitfld.long 0x00 0. "CLKSTBSFF0ALMSTAT,Clock of Standby Safety Flip-Flop 0 Alarm Status" "0,1" group.long ad:0xD0060488++0x07 line.long 0x00 "CLKSTBSFFALMSTATCLR,Clock of Standby Safety Flip-Flop Alarm Status Clear Register" bitfld.long 0x00 0. "CLKSTBSFFALMSTATCLR,Clear Safety Register Alarm Status" "0,1" line.long 0x04 "CLKSTBSFFALMFAULTIN,Clock of Standby Safety Flip-Flop Alarm Fault Injection Register" bitfld.long 0x04 0. "CLKSTBSFFALMFAULTIN,Safety Register Fault Injection" "0,1" group.long ad:0xD0060500++0x03 line.long 0x00 "CLKSTBBEMASK,Clock of Standby Bus Error Mask Register" bitfld.long 0x00 0. "CLKSTBBEMASK,Bus Error Mask Control" "0,1" rgroup.long ad:0xD0060504++0x03 line.long 0x00 "CLKSTBESEALMSTAT,Clock of Standby E or SE Authority Alarm State Register" bitfld.long 0x00 1. "CLKSTBSEALMSTAT,Standby Clock Register SE Authority Alarm Status" "0,1" bitfld.long 0x00 0. "CLKSTBEALMSTAT,Standby Clock Register E Authority Alarm Status" "0,1" group.long ad:0xD0060508++0x03 line.long 0x00 "CLKSTBESEALMSTATCLR,Clock of Standby E or SE Authority Alarm State Clear Register" bitfld.long 0x00 1. "CLKSTBSEALMSTATCLR,Standby Clock Register SE Authority Alarm Status Clear" "0,1" bitfld.long 0x00 0. "CLKSTBEALMSTATCLR,Standby Clock Register E Authority Alarm Status Clear" "0,1" tree.end tree "MAINRESET" rgroup.long ad:0xC0000800++0x03 line.long 0x00 "RSTSTAT,Reset Status Register" bitfld.long 0x00 23. "POR_RSTSTA,Power-On Reset Status Flag Bit" "0,1" bitfld.long 0x00 19. "HSM_SYSRSTSTA,HSM System Reset Request Reset Status" "0,1" bitfld.long 0x00 18. "HSM_APPRSTSTA,HSM Application Reset Request Reset Status" "0,1" bitfld.long 0x00 17. "IST_REQSTA,IST Request Reset Status" "0,1" newline bitfld.long 0x00 16. "PORSTPINRSTSTA,PORST PIN Request Reset Status" "0,1" bitfld.long 0x00 9. "HSM_DBGSYSRESETREQRSTSTA,HSM Debug System Reset Request Reset Status" "0,1" bitfld.long 0x00 8. "CPU1_WARMRESET_REQRSTSTA,Cpu1 Warm Reset Request Reset Status" "0,1" bitfld.long 0x00 7. "CPU0_WARMRESET_REQRSTSTA,Cpu0 Warm Reset Request Reset Status" "0,1" newline bitfld.long 0x00 6. "CPU1_DBGRST_REQRSTSTA,Cpu1 Debug Reset Request Reset Status" "0,1" bitfld.long 0x00 5. "CPU0_DBGRST_REQRSTSTA,Cpu0 Debug Reset Request Reset Status" "0,1" bitfld.long 0x00 4. "IWDGRSTSTA,IWDG Request Reset Status" "0,1" bitfld.long 0x00 3. "SWRSTSTA,Software Request Reset Status" "0,1" newline bitfld.long 0x00 2. "SACRSTSTA,SAC Request Reset Status" "0,1" bitfld.long 0x00 1. "ESR1RSTSTA,ESR1 Request Reset Status" "0,1" bitfld.long 0x00 0. "ESR0RSTSTA,ESR0 Request Reset Status" "0,1" group.long ad:0xC0000804++0x03 line.long 0x00 "RSTSTATCLR,Reset Status Clear Register" bitfld.long 0x00 23. "POR_STAT,Power-On Reset Status Clear" "0,1" bitfld.long 0x00 19. "HSM_SYS,HSM System Request Reset Status Clear" "0,1" bitfld.long 0x00 18. "HSM_APP,HSM Application Request Reset Status Clear" "0,1" bitfld.long 0x00 17. "IST_REQSTAT,IST Request Reset Status Clear" "0,1" newline bitfld.long 0x00 16. "PORST_PIN,PORST PIN Request Reset Status Clear" "0,1" bitfld.long 0x00 9. "HSM_DBGSYSRESETREQ,HSM Debug System Request Reset Status Clear" "0,1" bitfld.long 0x00 8. "CPU1_WARMRESETREQ,CPU1 Warm Request Reset Status Clear" "0,1" bitfld.long 0x00 7. "CPU0_WARMRESETREQ,CPU0 Warm Request Reset Status Clear" "0,1" newline bitfld.long 0x00 6. "CPU1_DBGRSTREQ,CPU1 Debug Request Reset Status Clear" "0,1" bitfld.long 0x00 5. "CPU0_DBGRSTREQ,CPU0 Debug Request Reset Status Clear" "0,1" bitfld.long 0x00 4. "IWDG,IWDG Request Reset Status Clear" "0,1" bitfld.long 0x00 3. "SW,Software Request Reset Status Clear" "0,1" newline bitfld.long 0x00 2. "SAC,SAC Request Reset Status Clear" "0,1" bitfld.long 0x00 1. "ESR1,ESR1 Request Reset Status Clear" "0,1" bitfld.long 0x00 0. "ESR0,ESR0 Request Reset Status Clear" "0,1" rgroup.long ad:0xC0000808++0x03 line.long 0x00 "SACRSTFLAG,SAC Reset Request Flag Register" bitfld.long 0x00 0. "RSTFLAG,SAC Request Reset Flag" "0,1" group.long ad:0xC000080C++0x03 line.long 0x00 "SACRSTCLR,SAC Reset Request Flag Clear Register" bitfld.long 0x00 0. "SACRSTCLR,SAC Request Reset Flag Clear" "0,1" wgroup.long ad:0xC0000860++0x03 line.long 0x00 "SWRSTCON,Software Reset Control Register" bitfld.long 0x00 0. "SWRSTREQ,Software Reset Request" "0,1" group.long ad:0xC0000864++0x03 line.long 0x00 "RSTCON1,Reset Control Register 1" bitfld.long 0x00 18.--19. "HSM_DBGSYSRESETREQ,HSM Debug System Reset Request Reset Select" "0,1,2,3" bitfld.long 0x00 16.--17. "CPU1_WARMRSTREQRSTSEL,Cpu1 Warm Reset Request Reset Select" "0,1,2,3" bitfld.long 0x00 14.--15. "CPU0_WARMRST_REQRST_SEL,Cpu0 Warm Reset Request Reset Select" "0,1,2,3" bitfld.long 0x00 8.--9. "IWDGRST_SEL,IWDG Request Reset Select" "0,1,2,3" newline bitfld.long 0x00 6.--7. "SWRST_SEL,Software Request Reset Select" "0,1,2,3" bitfld.long 0x00 4.--5. "SACRST_SEL,SAC Request Reset Select" "0,1,2,3" bitfld.long 0x00 2.--3. "ESR1RST_SEL,ESR1 Request Reset Select" "0,1,2,3" bitfld.long 0x00 0.--1. "ESR0RST_SEL,ESR0 Request Reset Select" "0,1,2,3" rgroup.long ad:0xC0000868++0x03 line.long 0x00 "RSTCON2,Reset Control Register 2" bitfld.long 0x00 2.--3. "HSM_SYS,HSM System Reset Request Reset Type Select" "0,1,2,3" bitfld.long 0x00 0.--1. "HSM_APP,HSM Application Reset Request Reset Type Select" "0,1,2,3" group.long ad:0xC000086C++0x03 line.long 0x00 "RSTCON3,Reset Control Register 3" bitfld.long 0x00 2.--3. "CPU1_DBGRSTREQ,Cpu1 Debug Reset Request Reset Type Select" "0,1,2,3" bitfld.long 0x00 0.--1. "CPU0_DBGRSTREQ,Cpu0 Debug Reset Request Reset Type Select" "0,1,2,3" group.long ad:0xC00008A0++0x07 line.long 0x00 "DBGRSTCON,Debug Reset Control Register" bitfld.long 0x00 0. "DBGRST,Trigger debug reset self-clearing 0" "0,1" line.long 0x04 "WDTRSTCON,WDT Reset Control Register" bitfld.long 0x04 2. "SAFE_WDTRSTTYPE,SAFE WDT Response Reset Type" "0,1" bitfld.long 0x04 1. "CPU1_WDTRSTTYPE,CPU1 WDT Response Reset Type" "0,1" bitfld.long 0x04 0. "CPU0_WDTRSTTYPE,CPU0 WDT Response Reset Type" "0,1" group.long ad:0xC00008D0++0x1B line.long 0x00 "CPURSTWPROT,CPU Reset Write-Protection Register" line.long 0x04 "CPUCLUSTERRSTCLR,CPU Cluster Reset Clear Register" bitfld.long 0x04 0. "nTOPRESET_CLR,Clear Reset Flag Bit CPUCLUSTERRSTCON.nTOPRESET_FLA" "0,1" line.long 0x08 "CPUCLUSTERRSTCON,CPU Cluster Reset Control Register" bitfld.long 0x08 7. "nCPUPORESET1_FLLOWEN,CPU1 Follow Cluster Reset" "0,1" bitfld.long 0x08 6. "nCORERESET1_FLLOWEN,Core1 Follow Cluster Reset" "0,1" bitfld.long 0x08 5. "nCPUPORESET0_FLLOWEN,CPU0 Follow Cluster Reset" "0,1" bitfld.long 0x08 4. "nCORERESET0_FLLOWEN,Core0 Follow Cluster Reset" "0,1" newline rbitfld.long 0x08 1. "nTOPRESET_FLAG,nTOPRESET Reset Flag" "0,1" bitfld.long 0x08 0. "nTOPRESET,Cluster Reset Flag Clear" "0,1" line.long 0x0C "CPU0RSTCLR,CPU0 Reset Clear Register" bitfld.long 0x0C 0. "CPU0RSTCLR,CPU0 Reset Flag Clear" "0,1" line.long 0x10 "CPU0RSTCON,CPU0 Reset Control Register" rbitfld.long 0x10 5. "nCPUPORESET0_FLAG,CPU0 Reset Flag" "0,1" bitfld.long 0x10 4. "nCPUPORESET0,Triggers CPU0 Reset" "0,1" rbitfld.long 0x10 1. "nCORERESET0_FLAG,Core0 Reset Flag" "0,1" bitfld.long 0x10 0. "nCORERESET0,Triggers Core0 Reset" "0,1" line.long 0x14 "CPU1RSTCLR,CPU1 Reset Clear Register" bitfld.long 0x14 0. "CPU1RSTCLR,CPU1 Reset Flag Clear" "0,1" line.long 0x18 "CPU1RSTCON,CPU1 Reset Control Register" rbitfld.long 0x18 5. "nCPUPORESET1_FLAG,CPU1 Reset Flag" "0,1" bitfld.long 0x18 4. "nCPUPORESET1,Triggers CPU1 Reset" "0,1" rbitfld.long 0x18 1. "nCORERESET1_FLAG,Core1 Reset Flag" "0,1" bitfld.long 0x18 0. "nCORERESET1,Triggers Core1 Reset" "0,1" group.long ad:0xC0000900++0x17 line.long 0x00 "MODRSTCON1,Module Reset Control Register 1" bitfld.long 0x00 21. "TSENSOR1_RST,Software Reset TSENSOR1_RST" "0,1" bitfld.long 0x00 20. "TSENSOR0_RST,Software Reset TSENSOR0_RST" "0,1" bitfld.long 0x00 6. "AHB_DMA3_RST,Software Reset AHB_DMA3" "0,1" bitfld.long 0x00 5. "AHB_DMA2_RST,Software Reset AHB_DMA2" "0,1" newline bitfld.long 0x00 4. "AHB_DMA1_RST,Software Reset AHB_DMA1" "0,1" bitfld.long 0x00 0. "AXI_DMA0_RST,Software Reset AXI_DMA0" "0,1" line.long 0x04 "MODRSTCON2,Module Reset Control Register 2" bitfld.long 0x04 28. "ECRC_RST,Software Reset ECRC" "0,1" bitfld.long 0x04 24. "MSC0_RST,Software Reset MSC0" "0,1" bitfld.long 0x04 20. "I2C0_RST,Software Reset I2C0" "0,1" bitfld.long 0x04 16. "QSPI_RST,Software Reset QSPI" "0,1" newline bitfld.long 0x04 6. "BASETIM2_RST,Software Reset BASETIMER2" "0,1" bitfld.long 0x04 5. "BASETIM1_RST,Software Reset BASETIMER1" "0,1" bitfld.long 0x04 4. "BASETIM0_RST,Software Reset BASETIMER0" "0,1" bitfld.long 0x04 1. "GETH_RST,Software Reset GETH" "0,1" newline bitfld.long 0x04 0. "GTM_RST,Software Reset GTM" "0,1" line.long 0x08 "MODRSTCON3,Module Reset Control Register 3" bitfld.long 0x08 24. "ESPI8_RST,Software Reset ESPI8" "0,1" bitfld.long 0x08 23. "ESPI7_RST,Software Reset ESPI7" "0,1" bitfld.long 0x08 22. "ESPI6_RST,Software Reset ESPI6" "0,1" bitfld.long 0x08 21. "ESPI5_RST,Software Reset ESPI5" "0,1" newline bitfld.long 0x08 20. "ESPI4_RST,Software Reset ESPI4" "0,1" bitfld.long 0x08 19. "ESPI3_RST,Software Reset ESPI3" "0,1" bitfld.long 0x08 18. "ESPI2_RST,Software Reset ESPI2" "0,1" bitfld.long 0x08 17. "ESPI1_RST,Software Reset ESPI1" "0,1" newline bitfld.long 0x08 16. "ESPI0_RST,Software Reset ESPI0" "0,1" bitfld.long 0x08 9. "SENT9_RST,Software Reset SENT9" "0,1" bitfld.long 0x08 8. "SENT8_RST,Software Reset SENT8" "0,1" bitfld.long 0x08 7. "SENT7_RST,Software Reset SENT7" "0,1" newline bitfld.long 0x08 6. "SENT6_RST,Software Reset SENT6" "0,1" bitfld.long 0x08 5. "SENT5_RST,Software Reset SENT5" "0,1" bitfld.long 0x08 4. "SENT4_RST,Software Reset SENT4" "0,1" bitfld.long 0x08 3. "SENT3_RST,Software Reset SENT3" "0,1" newline bitfld.long 0x08 2. "SENT2_RST,Software Reset SENT2" "0,1" bitfld.long 0x08 1. "SENT1_RST,Software Reset SENT1" "0,1" bitfld.long 0x08 0. "SENT0_RST,Software Reset SENT0" "0,1" line.long 0x0C "MODRSTCON4,Module Reset Control Register 4" bitfld.long 0x0C 19. "MULTICAN1_RST,Software Reset MULTICAN1" "0,1" bitfld.long 0x0C 16. "MULTICAN0_RST,Software Reset MULTICAN0" "0,1" bitfld.long 0x0C 7. "ASI7_RST,Software Reset ASI7" "0,1" bitfld.long 0x0C 6. "ASI6_RST,Software Reset ASI6" "0,1" newline bitfld.long 0x0C 5. "ASI5_RST,Software Reset ASI5" "0,1" bitfld.long 0x0C 4. "ASI4_RST,Software Reset ASI4" "0,1" bitfld.long 0x0C 3. "ASI3_RST,Software Reset ASI3" "0,1" bitfld.long 0x0C 2. "ASI2_RST,Software Reset ASI2" "0,1" newline bitfld.long 0x0C 1. "ASI1_RST,Software Reset ASI1" "0,1" bitfld.long 0x0C 0. "ASI0_RST,Software Reset ASI0" "0,1" line.long 0x10 "MODRSTCON5,Module Reset Control Register 5" bitfld.long 0x10 28. "RDC0_RST,Software Reset RDC0" "0,1" bitfld.long 0x10 25. "FC1_RST,Software Reset FC1" "0,1" bitfld.long 0x10 24. "FC0_RST,Software Reset FC0" "0,1" bitfld.long 0x10 17. "SARADC9_RST,Software Reset SARADC9" "0,1" newline bitfld.long 0x10 16. "SARADC8_RST,Software Reset SARADC8" "0,1" bitfld.long 0x10 15. "SARADC3_RST,Software Reset SARADC3" "0,1" bitfld.long 0x10 14. "SARADC2_RST,Software Reset SARADC2" "0,1" bitfld.long 0x10 13. "SARADC1_RST,Software Reset SARADC1" "0,1" newline bitfld.long 0x10 12. "SARADC0_RST,Software Reset SARADC0" "0,1" bitfld.long 0x10 3. "DSADC3_RST,Software Reset DSADC3" "0,1" bitfld.long 0x10 2. "DSADC2_RST,Software Reset DSADC2" "0,1" bitfld.long 0x10 1. "DSADC1_RST,Software Reset DSADC1" "0,1" newline bitfld.long 0x10 0. "DSADC0_RST,Software Reset DSADC0" "0,1" line.long 0x14 "MODRSTCON6,Module Reset Control Register 6" bitfld.long 0x14 0. "BUSPROT_RST,Software Reset BUSPROT" "0,1" group.long ad:0xC0000954++0x07 line.long 0x00 "MODRSTCONWDT,Module Reset Control Register of WDT" bitfld.long 0x00 5. "CPU1_WDTRST,Software Reset CPU1_WDT" "0,1" bitfld.long 0x00 4. "CPU0_WDTRST,Software Reset CPU0_WDT" "0,1" bitfld.long 0x00 0. "SAFE_WDTRST,Software Reset SAFE_WDT" "0,1" line.long 0x04 "WDTRSTPROT,WDT Module Reset Control Write-Protect Register" group.long ad:0xC0000960++0x03 line.long 0x00 "ESRPORSTIODFEN,ESR_PORST IO Digital Filter Enable Register" bitfld.long 0x00 3. "JTAGnTRST_EN,JTAGnTRST Digital Filter Enable" "0,1" bitfld.long 0x00 2. "PORST_EN,PORST Digital Filter Enable" "0,1" bitfld.long 0x00 1. "ESR1_EN,ESR1 Digital Filter Enable" "0,1" bitfld.long 0x00 0. "ESR0_EN,ESR0 Digital Filter Enable" "0,1" group.long ad:0xC0000A00++0x13 line.long 0x00 "TIMOUTCNTEN,Warm Reset Processing Timeout Counter Enable Register" bitfld.long 0x00 0. "TIMOUTCNTEN,Delay Count Enable Bit" "0,1" line.long 0x04 "TIMOUTCNT,Warm Reset Processing Timeout Counter Register" hexmask.long.word 0x04 0.--15. 1. "TIMEOUTCOUNTER,Set the Timeout counter value the default value is 0x190 and the time length is 100us" line.long 0x08 "CPUSHUTDOWNFLAG,CPU Shutdown Flag Register" hexmask.long.word 0x08 16.--31. 1. "USRINFO,User Information" bitfld.long 0x08 0. "CPUSHUTDOWNFLAG,CPU Shutdown Program Completion Flag" "0,1" line.long 0x0C "RCCINTMASK,RCC Warm Reset Interrupt Mask Register" bitfld.long 0x0C 0. "RCCINTMASK,Warm Reset Interrupt Mask Control" "0,1" line.long 0x10 "RCCINTEN,RCC Warm Reset Interrupt Enable Register" bitfld.long 0x10 0. "RCCINTEN,Warm Reset Interrupt Enable Control" "0,1" rgroup.long ad:0xC0000A14++0x03 line.long 0x00 "RCCINTSTAT,RCC Warm Reset Interrupt Status Register" bitfld.long 0x00 0. "RCCINTSTAT,Warm Reset Interrupt State" "0,1" group.long ad:0xC0000A18++0x07 line.long 0x00 "RCCINTSETCLR,RCC Warm Reset Interrupt Status Clear Register" bitfld.long 0x00 16. "SETRCCINT,Software Set Warm Reset Interrupt State" "0,1" bitfld.long 0x00 0. "CLRRCCINT,Clear Warm Reset Interrupt State" "0,1" line.long 0x04 "RCCINTSETPROT,RCC Warm Reset Interrupt Set Protection Register" bitfld.long 0x04 0. "RCCINTSETPROT,Software set warm reset interrupt state write protection" "0,1" group.long ad:0xC0000A60++0x0B line.long 0x00 "RAMLPEXITFLAGCLR,RAM Low Power Exit Flag Clear Register" bitfld.long 0x00 0. "RAMLPEXITFLAGCLR,Clear the RAM Low Power Exit Completion Flag" "0,1" line.long 0x04 "RAMLPEXITFLAG,RAM Low Power Exit Flag Register" bitfld.long 0x04 3. "RAM3LPEXITFLAG,RAM3(GTM RAM) Low Power Exit Completion Flag" "0,1" bitfld.long 0x04 2. "RAM2LPEXITFLAG,RAM2(GMU) Low Power Exit Completion Flag" "0,1" bitfld.long 0x04 1. "RAM1LPEXITFLAG,RAM1(CPU1 TCM) Low Power Exit Completion Flag" "0,1" bitfld.long 0x04 0. "RAM0LPEXITFLAG,RAM0(CPU0 TCM) Low Power Exit Completion Flag" "0,1" line.long 0x08 "RAMLPEXITEN,RAM Low Power Exit Enable Register" bitfld.long 0x08 3. "RAM3LPEXITEN,RAM3 (GTM) Low Power Exit Control" "0,1" bitfld.long 0x08 2. "RAM2LPEXITEN,RAM2 (GMU) Low Power Exit Control" "0,1" bitfld.long 0x08 1. "RAM1LPEXITEN,RAM1 (CPU1 TCM) Low Power Exit Control" "0,1" bitfld.long 0x08 0. "RAM0LPEXITEN,RAM0 (CPU0 TCM) Low Power Exit Control" "0,1" group.long ad:0xC0000B00++0x03 line.long 0x00 "RSTSFFALMSMEN,Reset Safety Flip-Flop Alarm Security Mechanism Enable Register" bitfld.long 0x00 0. "RSTSFFALMSMEN,Safe Register Alarm Enable Control" "0,1" rgroup.long ad:0xC0000B04++0x03 line.long 0x00 "RSTSFFALMSTAT,Reset Safety Flip-Flop Alarm Status Register" bitfld.long 0x00 6. "GRP6_RSTSFFALMSTAT,GRP6 Safety Register Alarm Status" "0,1" bitfld.long 0x00 5. "GRP5_RSTSFFALMSTAT,GRP5 Safety Register Alarm Status" "0,1" bitfld.long 0x00 4. "GRP4_RSTSFFALMSTAT,GRP4 Safety Register Alarm Status" "0,1" bitfld.long 0x00 3. "GRP3_RSTSFFALMSTAT,GRP3 Safety Register Alarm Status" "0,1" newline bitfld.long 0x00 2. "GRP2_RSTSFFALMSTAT,GRP2 Safety Register Alarm Status" "0,1" bitfld.long 0x00 1. "GRP1_RSTSFFALMSTAT,GRP1 Safety Register Alarm Status" "0,1" bitfld.long 0x00 0. "GRP0_RSTSFFALMSTAT,GRP0 Safety Register Alarm Status" "0,1" group.long ad:0xC0000B08++0x07 line.long 0x00 "RSTSFFALMSTATCLR,Reset Safety Flip-Flop Alarm Status Clear Register" bitfld.long 0x00 0. "RSTSFFALMSTATCLR,Clear Safety Register Alarm Status" "0,1" line.long 0x04 "RSTSFFALMFAULTIN,Reset Safe Alarm Fault Injection Register" bitfld.long 0x04 0. "RSTSFFALMFAULTIN,Safe Register Fault Injection" "0,1" group.long ad:0xC0000B80++0x03 line.long 0x00 "RSTBEMASK,Reset Bus Error Mask Register" bitfld.long 0x00 0. "RSTBEMASK,Reset Area Register Bus Error Mask" "0,1" rgroup.long ad:0xC0000B84++0x03 line.long 0x00 "RSTESEALMSTAT,Reset E or SE Authority Alarm State Register" bitfld.long 0x00 1. "RSTSEALMSTAT,Reset Register SE Permission Alarm Status" "0,1" bitfld.long 0x00 0. "RSTEALMSTAT,Reset Register E Permission Alarm Status" "0,1" group.long ad:0xC0000B88++0x03 line.long 0x00 "RSTESEALMSTATCLR,Reset E or SE Authority Alarm State Clear Register" bitfld.long 0x00 1. "RSTSEALMSTATCLR,Clear SE Permission Alarm Status" "0,1" bitfld.long 0x00 0. "RSTEALMSTATCLR,Clear E Permission Alarm Status" "0,1" tree.end tree "STBRESET" group.long ad:0xD0060600++0x0B line.long 0x00 "STBMODRST,Standby Module Reset Register" bitfld.long 0x00 0. "IWDG_RST,IWDG Module Reset" "0,1" line.long 0x04 "STBSWRST,Standby Software Reset Register" bitfld.long 0x04 0. "SW_RST,Software Trigger Reset of Standby" "0,1" line.long 0x08 "IORSTEN,Standby IO Reset Enable Register" bitfld.long 0x08 0. "RST_EN,Standby IO Reset Enable" "0,1" group.long ad:0xD0060680++0x03 line.long 0x00 "RSTSTBSFFALMSMEN,Reset of Standby Safety Flip-Flop Alarm Security Mechanism Enable Register" bitfld.long 0x00 0. "RSTSTBSFFALMSMEN,Safety Alarm Enable" "0,1" rgroup.long ad:0xD0060684++0x03 line.long 0x00 "RSTSTBSFFALMSTAT,Reset of Standby Safety Flip-Flop Alarm Status Register" bitfld.long 0x00 6. "RSTSTBSFF6ALMSTAT,Reset of Standby Safety Flip-Flop 6 Alarm Status" "0,1" bitfld.long 0x00 5. "RSTSTBSFF5ALMSTAT,Reset of Standby Safety Flip-Flop 5 Alarm Status" "0,1" bitfld.long 0x00 4. "RSTSTBSFF4ALMSTAT,Reset of Standby Safety Flip-Flop 4 Alarm Status" "0,1" bitfld.long 0x00 3. "RSTSTBSFF3ALMSTAT,Reset of Standby Safety Flip-Flop 3 Alarm Status" "0,1" bitfld.long 0x00 2. "RSTSTBSFF2ALMSTAT,Reset of Standby Safety Flip-Flop 2 Alarm Status" "0,1" newline bitfld.long 0x00 1. "RSTSTBSFF1ALMSTAT,Reset of Standby Safety Flip-Flop 1 Alarm Status" "0,1" bitfld.long 0x00 0. "RSTSTBSFF0ALMSTAT,Reset of Standby Safety Flip-Flop 0 Alarm Status" "0,1" group.long ad:0xD0060688++0x07 line.long 0x00 "RSTSTBSFFALMSTATCLR,Reset of Standby Safety Flip-Flop Alarm Status Clear Register" bitfld.long 0x00 0. "RSTSFFALMSTATCLR,Clear Safety Register Alarm Status" "0,1" line.long 0x04 "RSTSTBSFFALMFAULTIN,Reset of Standby Safety Flip-Flop Alarm Fault Injection Register" bitfld.long 0x04 0. "RSTSTBSFFALMFAULTIN,Safety Register Fault Injection" "0,1" group.long ad:0xD0060700++0x03 line.long 0x00 "RSTSTBBEMASK,Reset of Standby Bus Error Mask Register" bitfld.long 0x00 0. "RSTSTBBEMASK,Bus Error Mask Control" "0,1" rgroup.long ad:0xD0060704++0x03 line.long 0x00 "RSTSTBESEALMSTAT,Reset of Standby E or SE Authority Alarm State Register" bitfld.long 0x00 1. "RSTSTBSEALMSTAT,Reset Register SE Permission Alarm Status" "0,1" bitfld.long 0x00 0. "RSTSTBEALMSTAT,Reset Register E Permission Alarm Status" "0,1" group.long ad:0xD0060708++0x03 line.long 0x00 "RSTSTBESEALMSTATCLR,Reset of Standby E or SE Authority Alarm State Clear Register" bitfld.long 0x00 1. "STBSTBSEALMSTATCLR,Reset Register SE Permission Alarm Status Clear" "0,1" bitfld.long 0x00 0. "STBSTBEALMSTATCLR,Reset Register E Permission Alarm Status Clear" "0,1" tree.end tree "MAINDOMAIN_PWRC" group.long ad:0xC0004000++0x0B line.long 0x00 "LPCON,System Low Power Module Control Register" hexmask.long.byte 0x00 16.--23. 1. "STBYBLNK,Standby Mode Delay Time" bitfld.long 0x00 8. "UP_EN,Bit Update Enable" "0,1" bitfld.long 0x00 0. "LPMSEL,Low Power Mode Select" "0,1" line.long 0x04 "VLTALMCON,Voltage Alarm Control Register" bitfld.long 0x04 16. "UP_EN,Bit Update Enable" "0,1" bitfld.long 0x04 13. "VDDMOV,VDDM Over-voltage Detect" "0,1" bitfld.long 0x04 12. "VDDSBOV,VDDSB Over-voltage Detect" "0,1" bitfld.long 0x04 11. "VEVRSBOV,VEVRSB Over-voltage Detect" "0,1" bitfld.long 0x04 10. "VDDOV,VDD Over-voltage Detect" "0,1" bitfld.long 0x04 9. "VDDP3OV,VDDP3 Over-voltage Detect" "0,1" newline bitfld.long 0x04 8. "VEXTOV,VEXT Over-voltage Detect" "0,1" bitfld.long 0x04 5. "VDDMUV,VDDM Under-voltage Detect" "0,1" bitfld.long 0x04 4. "VDDSBUV,VDDSB Under-voltage Detect" "0,1" bitfld.long 0x04 3. "VEVRSBUV,VEVRSB Under-voltage Detect" "0,1" bitfld.long 0x04 2. "VDDUV,VDD Under-voltage Detect" "0,1" bitfld.long 0x04 1. "VDDP3UV,VDDP3 Under-voltage Detect" "0,1" newline bitfld.long 0x04 0. "VEXTUV,VEXT Under-voltage Detect" "0,1" line.long 0x08 "ESR1SCON,ESR1 Signal Control Register" bitfld.long 0x08 2. "ESR1DFEN,ESR1 Digital Filter Enable" "0,1" bitfld.long 0x08 0.--1. "ESR1DETSEL,ESR1 Edge Select" "0,1,2,3" rgroup.long ad:0xC0004040++0x0F line.long 0x00 "CPULPRTSTS,CPU Low Power Mode Real Time Status Register" bitfld.long 0x00 3. "CPU1WFE,CPU1 WFE Low Power Real Time Indicator" "0,1" bitfld.long 0x00 2. "CPU1WFI,CPU1 WFI Low Power Real Time Indicator" "0,1" bitfld.long 0x00 1. "CPU0WFE,CPU0 WFE Low Power Real Time Indicate" "0,1" bitfld.long 0x00 0. "CPU0WFI,CPU0 WFI Low Power Real Time Indicator" "0,1" line.long 0x04 "CURVLTALMRTSTS,Current and Voltage Alarm Real Time Status Register" bitfld.long 0x04 20. "VDDP3SCP,VDDP3 Short Circuit Protect" "0,1" bitfld.long 0x04 19. "VDDP3OCP,VDDP3 Over-current Protect" "0,1" bitfld.long 0x04 18. "VDDSCP,VDD Short Circuit Protect" "0,1" bitfld.long 0x04 17. "VDDOCP,VDD Over-current Protect" "0,1" bitfld.long 0x04 13. "VDDMOV,VDDM Over-voltage Alarm" "0,1" bitfld.long 0x04 12. "VDDSBOV,VDDSB Over-voltage Alarm" "0,1" newline bitfld.long 0x04 11. "VEVRSBOV,VEVRSB Over-voltage Alarm" "0,1" bitfld.long 0x04 10. "VDDOV,VDD Over-voltage Alarm" "0,1" bitfld.long 0x04 9. "VDDP3OV,VDDP3 Over-voltage Alarm" "0,1" bitfld.long 0x04 8. "VEXTOV,VEXT Over-voltage Alarm" "0,1" bitfld.long 0x04 5. "VDDMUV,VDDM Under-voltage Alarm" "0,1" bitfld.long 0x04 4. "VDDSBUV,VDDSB Under-voltage Alarm" "0,1" newline bitfld.long 0x04 3. "VEVRSBUV,VEVRSB Under-voltage Alarm" "0,1" bitfld.long 0x04 2. "VDDUV,VDD Under-voltage Alarm" "0,1" bitfld.long 0x04 1. "VDDP3UV,VDDP3 Under-voltage Alarm" "0,1" bitfld.long 0x04 0. "VEXTUV,VEXT Under-voltage Alarm" "0,1" line.long 0x08 "PBIST2ALMRTSTS,PBIST2 Voltage Self Detect Alarm Real Time Status Register" bitfld.long 0x08 5. "VDDSBOV,VDDSB PBIST2 Over-voltage State" "0,1" bitfld.long 0x08 4. "VEVRSBOV,VEVRSB PBIST2 Over-voltage State" "0,1" bitfld.long 0x08 3. "VDDOV,VDD PBIST2 Over-voltage State" "0,1" bitfld.long 0x08 2. "VDDP3OV,VDDP3 PBIST2 Over-voltage State" "0,1" bitfld.long 0x08 1. "VEXTOV,VEXT PBIST2 Over-voltage State" "0,1" bitfld.long 0x08 0. "ALLOV,PBIST2 Over-voltage State" "0,1" line.long 0x0C "CPUACTRTSTS,CPU Active Real Time Status Register" bitfld.long 0x0C 1. "CPU1PACTIVESTS,CPU1 Active State" "0,1" bitfld.long 0x0C 0. "CPU0PACTIVESTS,CPU0 Active State" "0,1" rgroup.long ad:0xC0004090++0x03 line.long 0x00 "ESR1STS,ESR1 Status Register" bitfld.long 0x00 0. "ESR1STS,ESR1 Edge Detect Status" "0,1" group.long ad:0xC0004094++0x03 line.long 0x00 "ESR1INTMSK,ESR1 Interrupt Mask Register" bitfld.long 0x00 2. "INTMSK,ESR1 Interrupt Mask" "0,1" bitfld.long 0x00 1. "SEICPU1MSK,ESR1 SEI Interrupt to CPU1 Mask" "0,1" bitfld.long 0x00 0. "SEICPU0MSK,ESR1 SEI Interrupt to CPU0 Mask" "0,1" wgroup.long ad:0xC0004098++0x03 line.long 0x00 "ESR1INTCLR,ESR1 Interrupt Clear Register" bitfld.long 0x00 0. "CLR,ESR1 Interrupt Clear" "0,1" rgroup.long ad:0xC0004100++0x03 line.long 0x00 "CPULPINTSTS,CPU Low Power Mode Interrupt Status Register" bitfld.long 0x00 3. "CPU1WFE,CPU1 WFE State" "0,1" bitfld.long 0x00 2. "CPU1WFI,CPU1 WFI State" "0,1" bitfld.long 0x00 1. "CPU0WFE,CPU0 WFE State" "0,1" bitfld.long 0x00 0. "CPU0WFI,CPU0 WFI State" "0,1" group.long ad:0xC0004104++0x03 line.long 0x00 "CPULPINTMSK,CPU Low Power Mode Interrupt Mask Register" bitfld.long 0x00 0.--3. "MSK,CPU Low Power Mode Interrupt Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC0004108++0x03 line.long 0x00 "CPULPINTCLR,CPU Low Power Mode Interrupt Clear Register" bitfld.long 0x00 0.--3. "CLR,CPU Low Power mode Interrupt Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC0004110++0x03 line.long 0x00 "CURVLTSTS,Current and Voltage Status Register" bitfld.long 0x00 19. "VDDP3SCP,VDDP3 Short-circuit Protect" "0,1" bitfld.long 0x00 18. "VDDP3OCP,VDDP3 Over-current Protect" "0,1" bitfld.long 0x00 17. "VDDSCP,VDD Short-circuit Protect" "0,1" bitfld.long 0x00 16. "VDDOCP,VDD Over-current Protect" "0,1" bitfld.long 0x00 13. "VDDMOV,VDDM Over-voltage Alarm" "0,1" bitfld.long 0x00 12. "VDDSBOV,VDDSB Over-voltage Alarm" "0,1" newline bitfld.long 0x00 11. "VEVRSBOV,VEVRSB Over-voltage Alarm" "0,1" bitfld.long 0x00 10. "VDDOV,VDD Over-voltage Alarm" "0,1" bitfld.long 0x00 9. "VDDP3OV,VDDP3 Over-voltage Alarm" "0,1" bitfld.long 0x00 8. "VEXTOV,VEXT Over-voltage Alarm" "0,1" bitfld.long 0x00 5. "VDDMUV,VDDM Under-voltage Alarm" "0,1" bitfld.long 0x00 4. "VDDSBUV,VDDSB Under-voltage Alarm" "0,1" newline bitfld.long 0x00 3. "VEVRSBUV,VEVRSB Under-voltage Alarm" "0,1" bitfld.long 0x00 2. "VDDUV,VDD Under-voltage Alarm" "0,1" bitfld.long 0x00 1. "VDDP3UV,VDDP3 Under-voltage Alarm" "0,1" bitfld.long 0x00 0. "VEXTUV,VEXT Under-voltage Alarm" "0,1" group.long ad:0xC0004114++0x03 line.long 0x00 "CURVLTINTMSK,Current and Voltage Interrupt Mask Register" bitfld.long 0x00 16.--19. "CMSK,Current Interrupt Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--13. 1. "OVMSK,Over-voltage Interrupt Mask" hexmask.long.byte 0x00 0.--5. 1. "UVMSK,Under-voltage Interrupt Mask" group.long ad:0xC0004150++0x03 line.long 0x00 "CURVLTALMMSK,Current and Voltage Alarm Mask Register" bitfld.long 0x00 16.--19. "CMSK,Current Alarm Mask" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--13. 1. "OVMSK,Over-voltage Alarm Mask" hexmask.long.byte 0x00 0.--5. 1. "UVMSK,Under-voltage Alarm Mask" wgroup.long ad:0xC0004158++0x03 line.long 0x00 "CURVLTCLR,Current and Voltage Clear Register" bitfld.long 0x00 16.--19. "CCLR,Current Alarm Clear" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--13. 1. "OVCLR,Over-voltage Alarm Clear" hexmask.long.byte 0x00 0.--5. 1. "UVCLR,Under-voltage Alarm Clear" rgroup.long ad:0xC0004160++0x03 line.long 0x00 "SAFEALMSTS,Safety Alarm Status Register" bitfld.long 0x00 11. "SE_ALM,SE Illegal Access" "0,1" bitfld.long 0x00 10. "E_ALM,E Illegal Access" "0,1" bitfld.long 0x00 9. "FSM,FSM Illegal Jump" "0,1" bitfld.long 0x00 7. "LPCON,LPCON Redundancy" "0,1" bitfld.long 0x00 6. "VLTALMCON,VLTALMCON Redundancy" "0,1" bitfld.long 0x00 5. "ESR1SCON,ESR1SCON Redundancy" "0,1" newline bitfld.long 0x00 4. "CURVLTALMMSK,CURVLTALMMSK Redundancy" "0,1" bitfld.long 0x00 3. "SAFEALMEN,SAFEALMEN Redundancy" "0,1" bitfld.long 0x00 1. "ERRIN,ERRIN Redundancy" "0,1" bitfld.long 0x00 0. "ADCREF,ADCREF Redundancy" "0,1" group.long ad:0xC0004164++0x03 line.long 0x00 "SAFEALMEN,Safety Alarm Mask Register" bitfld.long 0x00 1. "FSMEN,FSM Illegal Jump Alarm Enable" "0,1" bitfld.long 0x00 0. "SFFEN,Redundancy Register Alarm Report Enable" "0,1" wgroup.long ad:0xC0004168++0x03 line.long 0x00 "SAFEALMCLR,Safety Alarm Clear Register" bitfld.long 0x00 6. "SECLR,SE Illegal Access Clear" "0,1" bitfld.long 0x00 4. "ECLR,E Illegal Access Clear" "0,1" bitfld.long 0x00 2. "FSMCLR,FSM Illegal Jump Clear" "0,1" bitfld.long 0x00 0. "SFFCLR,Redundancy Register Alarm Clear" "0,1" group.long ad:0xC000416C++0x07 line.long 0x00 "ERRIN,Safety Error Injection Register" bitfld.long 0x00 2.--3. "FSMERRIN,FSM Illegal Jump Injection" "0,1,2,3" bitfld.long 0x00 0.--1. "FSMERRIN,Redundancy Alarm Injection" "0,1,2,3" line.long 0x04 "BEMSK,Bus Error Mask Register" bitfld.long 0x04 0. "BEMSK,Bus Error Mask" "0,1" group.long ad:0xC0004200++0x0F line.long 0x00 "DETADJ,Voltage Detect Threshold Coarse Adjustment Register" bitfld.long 0x00 24. "UP_EN,Bit Update Enable" "0,1" bitfld.long 0x00 20.--22. "VDDM_ADJ,VDDM Threshold Adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--18. "VDDSB_ADJ,VDDSB Threshold Adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "VEVRSB_ADJ,VEVRSB Threshold Adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. "VDD_ADJ,VDD Threshold Adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--5. "VDDP3_ADJ,VDDP3 Threshold Adjustment" "0,1,2,3" newline bitfld.long 0x00 0.--2. "VEXT_ADJ,VEXT Threshold Adjustment" "0,1,2,3,4,5,6,7" line.long 0x04 "DETEADJ,Voltage Detect Threshold Fine Adjustment Register" bitfld.long 0x04 24. "UP_EN,Bit Update Enable" "0,1" bitfld.long 0x04 20.--22. "VDDM_SHIFT,VDDM Fine Adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--18. "VDDSB_SHIFT,VDDSB Fine Adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--14. "VEVRSB_SHIFT,VEVRSB Fine Adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--10. "VDD_SHIFT,VDD Fine Adjustment" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4.--6. "VDDP3_SHIFT,VDDP3 Fine Adjustment" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0.--2. "VEXT_SHIFT,VEXT Fine Adjustment" "0,1,2,3,4,5,6,7" line.long 0x08 "ADCREFC,ADC Reference Current Control Register" bitfld.long 0x08 2. "FCTEST_EN,High-Precision BGR12 FC Test Enable" "0,1" bitfld.long 0x08 0. "IREF_EN,DSADC Reference Current Enable" "0,1" line.long 0x0C "DBGC,Debug Mode Low Power Configuration Register" bitfld.long 0x0C 0.--3. "DBGEN,Debug Mode Low Power Enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "STANDBYDOMAIN_PWRC" group.long ad:0xD0060000++0x07 line.long 0x00 "SWP,Soft Write Protect Register" line.long 0x04 "STDP,Standby Mode Protect Register" hexmask.long.byte 0x04 0.--7. 1. "STDP,Standby Protect Enable" rgroup.long ad:0xD0060008++0x03 line.long 0x00 "HWCFGSTS,HWCFG Status Register" bitfld.long 0x00 2. "HWCFG6,HWCFG6 Level" "0,1" bitfld.long 0x00 1. "HWCFG2,HWCFG2 Level" "0,1" bitfld.long 0x00 0. "HWCFG1,HWCFG1 Level" "0,1" group.long ad:0xD006000C++0x0F line.long 0x00 "DPCR,Default HWCFG6 Control Register" rbitfld.long 0x00 8. "TRIST,Port Tri-Status" "0,1" bitfld.long 0x00 0. "TRISTREQ,Port Tri-Status Require" "0,1" line.long 0x04 "WKUPC,Wakeup Control Register" bitfld.long 0x04 26.--27. "PORSTEDCON,PORST Edge Wakeup Control" "0,1,2,3" bitfld.long 0x04 22.--23. "PINBEDCON,PINB Edge Wakeup" "0,1,2,3" bitfld.long 0x04 20.--21. "PINAEDCON,PINA Edge Wakeup Control" "0,1,2,3" bitfld.long 0x04 18.--19. "ESR1EDCON,ESR1 Edge Wakeup Control" "0,1,2,3" bitfld.long 0x04 16.--17. "ESR0EDCON,ESR0 Edge Wakeup Control" "0,1,2,3" bitfld.long 0x04 13. "PORSTDFEN,PORST Digital Filter Enable" "0,1" bitfld.long 0x04 11. "PINBDFEN,PINB Digital Filter Enable" "0,1" newline bitfld.long 0x04 10. "PINADFEN,PINA Digital Filter Enable" "0,1" bitfld.long 0x04 9. "ESR1DFEN,ESR1 Digital Filter Enable" "0,1" bitfld.long 0x04 8. "ESR0DFEN,ESR0 Digital Filter Enable" "0,1" bitfld.long 0x04 7. "PWRWKEN,VEXT Power on Enable" "0,1" bitfld.long 0x04 6. "IWDTWKEN,IWDT Wakeup Enable" "0,1" bitfld.long 0x04 5. "PORSTWKEN,PORST Wakeup Enable" "0,1" bitfld.long 0x04 3. "PINBWKEN,PINB Wakeup Enable" "0,1" newline bitfld.long 0x04 2. "PINAWKEN,PINA Wakeup Enable" "0,1" bitfld.long 0x04 1. "ESR1WKEN,ESR1 Wakeup Enable" "0,1" bitfld.long 0x04 0. "ESR0WKEN,ESR0 Wakeup Enable" "0,1" line.long 0x08 "WKUPTIM,Wakeup Timing Register" hexmask.long.byte 0x08 8.--15. 1. "RSTTIME,Reset Time" bitfld.long 0x08 4. "BLNKFIL_ALL,Blank Filter with all Wakeup Source Enable" "0,1" bitfld.long 0x08 0.--3. "BLNKFIL,Blank Filter Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "WKUPSTS,Wakeup Status Register" bitfld.long 0x0C 9. "STBY_FLAG,Standby Flag" "0,1" rbitfld.long 0x0C 8. "STBY_RDY,Standby Ready" "0,1" bitfld.long 0x0C 7. "VEXTUP_TRG,VEXT Wakeup Status Query" "0,1" bitfld.long 0x0C 6. "IWDT_TRG,IWDG Wakeup Status Query" "0,1" bitfld.long 0x0C 5. "PORST_TRG,PORST Wakeup Status Query" "0,1" bitfld.long 0x0C 3. "PINB_TRG,PINB Wakeup Status Query" "0,1" bitfld.long 0x0C 2. "PINA_TRG,PINA Wakeup Status Query" "0,1" newline bitfld.long 0x0C 1. "ESR1_TRG,ESR1 Wakeup Status Query" "0,1" bitfld.long 0x0C 0. "ESR0_TRG,ESR0 Wakeup Status Query" "0,1" group.long ad:0xD0060020++0x03 line.long 0x00 "IPPC,IP Low Power Status Control Register" bitfld.long 0x00 12. "LSHL_PD,Level Shifter High to Low Enable" "0,1" group.long ad:0xD0060030++0x0B line.long 0x00 "VOSEL,Internal Voltage Select Register" bitfld.long 0x00 20. "UP_EN,Bit Update Enable" "0,1" bitfld.long 0x00 16.--18. "VDDSB_SEL,VDDSB Level Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. "VDDP3_SEL,VDDP3 Level Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "VDD_SEL,VDD Level Select" "0,1,2,3,4,5,6,7" line.long 0x04 "PRIMRYDC,Primary Detect Control Register" bitfld.long 0x04 8. "UP_EN,Bit Update Enable" "0,1" bitfld.long 0x04 2. "VDD_DIS,VDD Primary Power Supply Control" "0,1" bitfld.long 0x04 1. "VDDP3_DIS,VDDP3 Primary Power Supply Control" "0,1" bitfld.long 0x04 0. "VEXT_DIS,VEXT Primary Power Supply Control" "0,1" line.long 0x08 "PBIST2DC,Power Built in Self Test 2 Detect Control Register" bitfld.long 0x08 16. "UP_EN,Bit Update Enable" "0,1" bitfld.long 0x08 12. "VDDSB_OVDIS,VDDSB Over-voltage Primary Power Supply Control" "0,1" bitfld.long 0x08 11. "VEVRSB_OVDIS,VEVRSB Over-voltage Primary Power Supply Control" "0,1" bitfld.long 0x08 10. "VDD_OVDIS,VDD Over-voltage Primary Power Supply Control" "0,1" bitfld.long 0x08 9. "VDDP3_OVDIS,VDDP3 Over-voltage Primary Power Supply Control" "0,1" bitfld.long 0x08 8. "VEXT_OVDIS,VEXT Over-voltage Primary Power Supply Control" "0,1" bitfld.long 0x08 4. "VDDSB_UVDIS,VDDSB Under-voltage Primary Power Supply Control" "0,1" newline bitfld.long 0x08 3. "VEVRSB_UVDIS,VEVRSB Under-voltage Primary Power Supply Control" "0,1" bitfld.long 0x08 2. "VDD_UVDIS,VDD Under-voltage Primary Power Supply Control" "0,1" bitfld.long 0x08 1. "VDDP3_UVDIS,VDDP3 Under-voltage Primary Power Supply Control" "0,1" bitfld.long 0x08 0. "VEXT_UVDIS,VEXT Under-voltage Primary Power Supply Control" "0,1" group.long ad:0xD0060040++0x0F line.long 0x00 "EVRCC,EVRC Control Register" bitfld.long 0x00 10. "UP_EN,DCDC Update" "0,1" bitfld.long 0x00 9. "SLEEP,DCDC Sleep" "0,1" bitfld.long 0x00 4. "DRV_SEL,DCDC Down-node Enable" "0,1" bitfld.long 0x00 3. "SCP_EN,Short Circuit Protect Enable" "0,1" bitfld.long 0x00 2. "OCP_EN,Over-current Protect Enable" "0,1" bitfld.long 0x00 0.--1. "DCDC_EN,DCDC Enable" "0,1,2,3" line.long 0x04 "EVR33C,EVR33 Control Register" bitfld.long 0x04 7. "UP_EN,EVR33 Update Enable" "0,1" bitfld.long 0x04 5. "DISCHG2_EN,Discharge2 Enable" "0,1" bitfld.long 0x04 4. "DISCHG1_EN,Discharge1 Enable" "0,1" bitfld.long 0x04 3. "SCP_EN,Short Circuit Protect Enable" "0,1" bitfld.long 0x04 2. "OCP_EN,Over-voltage Protect Enable" "0,1" bitfld.long 0x04 0.--1. "EVR33_EN,EVR33 Enable" "0,1,2,3" line.long 0x08 "VEVRSBVC,VEVRSB Voltage Control Register" bitfld.long 0x08 7. "UP_EN,EVRSB Update Enable" "0,1" bitfld.long 0x08 0. "VDDSB_THRDSEL,VDDSB Threshold Select" "0,1" line.long 0x0C "REFC,Reference Control Register" bitfld.long 0x0C 7. "UP_EN,Update Enable" "0,1" bitfld.long 0x0C 1. "BGRCMP_DIS,HPBGR and LPBGR Compare Enable" "0,1" bitfld.long 0x0C 0. "HPBGR_DIS,HPBGR Close" "0,1" rgroup.long ad:0xD0060060++0x03 line.long 0x00 "ALMS,Alarm Status Register" bitfld.long 0x00 16. "SE_ALM,SE Illegal Access" "0,1" bitfld.long 0x00 15. "E_ALM,E Illegal Access" "0,1" bitfld.long 0x00 14. "FSM,FSM Illegal Jump" "0,1" bitfld.long 0x00 12. "IPPC,IPPC Redundancy" "0,1" bitfld.long 0x00 11. "STDP,STDP Redundancy" "0,1" bitfld.long 0x00 10. "SWP,SWP Redundancy" "0,1" bitfld.long 0x00 9. "VOSEL,VOSEL Redundancy" "0,1" newline bitfld.long 0x00 8. "PRIMRYDC,PRIMRYDC Redundancy" "0,1" bitfld.long 0x00 7. "PBIST2DC,PBIST2DC Redundancy" "0,1" bitfld.long 0x00 6. "EVRCC,EVRCC Redundancy" "0,1" bitfld.long 0x00 5. "EVR33C,EVR33C Redundancy" "0,1" bitfld.long 0x00 4. "EVRSBVC,EVRSBVC Redundancy" "0,1" bitfld.long 0x00 3. "REFC,REFC Redundancy" "0,1" bitfld.long 0x00 2. "ALME,ALME Redundancy" "0,1" newline bitfld.long 0x00 1. "ALMC,ALMC Redundancy" "0,1" bitfld.long 0x00 0. "ERRINS,ERRINS Redundancy" "0,1" group.long ad:0xD0060064++0x0F line.long 0x00 "ALME,Alarm Enable Register" bitfld.long 0x00 1. "FSMEN,FSM Illegal Jump Enable" "0,1" bitfld.long 0x00 0. "SFFEN,Redundancy Register Alarm Report Enable" "0,1" line.long 0x04 "ALMC,Alarm Clear Register" bitfld.long 0x04 6. "SECLR,SE Illegal Access Clear" "0,1" bitfld.long 0x04 4. "ECLR,E Illegal Access Clear" "0,1" bitfld.long 0x04 2. "FSMCLR,FSM Illegal Jump Clear" "0,1" bitfld.long 0x04 0. "SFFCLR,Redundancy Register Alarm Clear" "0,1" line.long 0x08 "ERRINS,Error Injection Register" bitfld.long 0x08 2.--3. "FSMERRIN,FSM Illegal Jump Injection" "0,1,2,3" bitfld.long 0x08 0.--1. "SFFERRIN,Redundancy Register Alarm Injection" "0,1,2,3" line.long 0x0C "BEMSKS,Bus Error Mask Register" bitfld.long 0x0C 0. "BEMSKS,Bus Error Mask" "0,1" tree.end tree "GIPC" group.long ad:0xC0060C00++0x03 line.long 0x00 "ERG,Exclusions Reservation Granule Register" bitfld.long 0x00 0.--3. "ERG,GIPC Exclusions Reservation Granule" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC0060C04++0x07 line.long 0x00 "FSMSTS0,Finite State Machine Status Register n (n=0~1)" hexmask.long.tbyte 0x00 2.--25. 1. "MADDR,Marked Address" bitfld.long 0x00 0.--1. "STATE,FSM State" "0,1,2,3" line.long 0x04 "FSMSTS1,Finite State Machine Status Register n (n=0~1)" hexmask.long.tbyte 0x04 2.--25. 1. "MADDR,Marked Address" bitfld.long 0x04 0.--1. "STATE,FSM State" "0,1,2,3" wgroup.long ad:0xC0060C14++0x07 line.long 0x00 "FSMSTSCLR0,Finite State Machine Status Clear Register n (n=0~1)" bitfld.long 0x00 0.--1. "STATECLR,State Clear" "0,1,2,3" line.long 0x04 "FSMSTSCLR1,Finite State Machine Status Clear Register n (n=0~1)" bitfld.long 0x04 0.--1. "STATECLR,State Clear" "0,1,2,3" group.long ad:0xC0060C24++0x07 line.long 0x00 "PPISTS0,Private Peripheral Interrupt Status Register n (n=0~1)" bitfld.long 0x00 0. "PPISTSn,PPI Status" "0,1" line.long 0x04 "PPISTS1,Private Peripheral Interrupt Status Register n (n=0~1)" bitfld.long 0x04 0. "PPISTSn,PPI Status" "0,1" group.long ad:0xC0060C34++0x07 line.long 0x00 "PPICTRL0,Private Peripheral Interrupt Control Register n (n=0~1)" rbitfld.long 0x00 30.--31. "PPIMASK,Private Peripheral Interrupt Mask" "0,1,2,3" bitfld.long 0x00 0.--1. "PPICTRLn,Private Peripheral Interrupt Control" "0,1,2,3" line.long 0x04 "PPICTRL1,Private Peripheral Interrupt Control Register n (n=0~1)" rbitfld.long 0x04 30.--31. "PPIMASK,Private Peripheral Interrupt Mask" "0,1,2,3" bitfld.long 0x04 0.--1. "PPICTRLn,Private Peripheral Interrupt Control" "0,1,2,3" rgroup.long ad:0xC0060C44++0x03 line.long 0x00 "ALMADDR,AXI Address Channel Protection Code Alarm Address Register" hexmask.long.tbyte 0x00 0.--23. 1. "ALMADDR,AXI Address Channel Protection Code Alarm Address" group.long ad:0xC0060C48++0x07 line.long 0x00 "SAFEFAULT,Functional Safety Fault Injection Register" bitfld.long 0x00 8.--9. "AACPCFI,AXI Address Channel Protection Code Fault Injection" "0,1,2,3" bitfld.long 0x00 6.--7. "AARFI,AXI Addrlogic Redundancy Fault Injection" "0,1,2,3" bitfld.long 0x00 4.--5. "FPCFI,FSM Plausibility Check Fault Injection" "0,1,2,3" bitfld.long 0x00 2.--3. "FMFI,FSM Monitor Fault Injection" "0,1,2,3" line.long 0x04 "SAFEEN,Functional Safety Enable Register" bitfld.long 0x04 8.--9. "AACPCSE,AXI Addr Channel Protection Code Safety Enable" "0,1,2,3" bitfld.long 0x04 6.--7. "AARSE,AXI Addrlogic Redundancy Safety Enable" "0,1,2,3" bitfld.long 0x04 4.--5. "FPCSE,FSM Plausibility Check Safety Enable" "0,1,2,3" bitfld.long 0x04 2.--3. "FMSE,FSM Monitor Safety Enable" "0,1,2,3" bitfld.long 0x04 0.--1. "DRSE,DFF Redundancy Safety Enable" "0,1,2,3" rgroup.long ad:0xC0060C50++0x03 line.long 0x00 "ALARM,Alarm Register" bitfld.long 0x00 23. "ALARMCLRALM,GIPC Safety Alarm Register" "0,1" bitfld.long 0x00 22. "SAFEENALM,GIPC Safety Alarm Register" "0,1" bitfld.long 0x00 21. "SAFEFAULTALM,GIPC Safety Alarm Register" "0,1" bitfld.long 0x00 18. "PPICTRLALM1,GIPC Safety Alarm Register" "0,1" bitfld.long 0x00 17. "PPICTRLALM0,GIPC Safety Alarm Register" "0,1" bitfld.long 0x00 14. "FSMSTSCLRALM1,GIPC Safety Alarm Register" "0,1" bitfld.long 0x00 13. "FSMSTSCLRALM0,GIPC Safety Alarm Register" "0,1" newline bitfld.long 0x00 12. "ERGALM,GIPC Safety Alarm Register" "0,1" bitfld.long 0x00 11. "SEALM,GIPC Safety Alarm Register" "0,1" bitfld.long 0x00 10. "EALM,GIPC Safety Alarm Register" "0,1" bitfld.long 0x00 9. "AACPCALM,GIPC Safety Alarm Register" "0,1" bitfld.long 0x00 8. "AARALM,GIPC Safety Alarm Register" "0,1" bitfld.long 0x00 5. "FPCALM1,Core 1 FSM Plausibility Check" "0,1" bitfld.long 0x00 4. "FPCALM0,Core 0 FSM Plausibility Check" "0,1" newline bitfld.long 0x00 1. "FMALM1,Core 1 FSM Monitor" "0,1" bitfld.long 0x00 0. "FMALM0,Core 0 FSM Monitor" "0,1" wgroup.long ad:0xC0060C54++0x03 line.long 0x00 "ALARMCLR,Alarm Clear Register" bitfld.long 0x00 10.--11. "DRALMC,DFF Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 8.--9. "ESEALMC,E/SE Alarm Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "AACPCCALMC,AXI Address Channel Protection Code Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "AARALMC,AXI Addrlogic Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "FPCALMC,FSM Plausibility Check Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "FMALMC,FSM Monitor Alarm Clear" "0,1,2,3" tree.end tree "DMA" tree "DMA0" rgroup.long ad:0xC00B4000++0x07 line.long 0x00 "INTSTAT0,Interrupt Status Register 0" bitfld.long 0x00 31. "INTSTAT31,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 30. "INTSTAT30,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 29. "INTSTAT29,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 28. "INTSTAT28,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 27. "INTSTAT27,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 26. "INTSTAT26,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 25. "INTSTAT25,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 24. "INTSTAT24,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 23. "INTSTAT23,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 22. "INTSTAT22,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 21. "INTSTAT21,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 20. "INTSTAT20,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 19. "INTSTAT19,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 18. "INTSTAT18,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 17. "INTSTAT17,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 16. "INTSTAT16,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 15. "INTSTAT15,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 14. "INTSTAT14,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 13. "INTSTAT13,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 12. "INTSTAT12,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 11. "INTSTAT11,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 10. "INTSTAT10,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 9. "INTSTAT9,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 8. "INTSTAT8,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 7. "INTSTAT7,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 6. "INTSTAT6,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 5. "INTSTAT5,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 4. "INTSTAT4,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 3. "INTSTAT3,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 2. "INTSTAT2,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 1. "INTSTAT1,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 0. "INTSTAT0,Interrupt Status for Channel i after Masking" "0,1" line.long 0x04 "INTSTAT1,Interrupt Status Register 1" bitfld.long 0x04 7. "INTSTAT7,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 6. "INTSTAT6,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 5. "INTSTAT5,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 4. "INTSTAT4,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 3. "INTSTAT3,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 2. "INTSTAT2,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 1. "INTSTAT1,Interrupt Status for Channel 32+i after Masking" "0,1" newline bitfld.long 0x04 0. "INTSTAT0,Interrupt Status for Channel 32+i after Masking" "0,1" rgroup.long ad:0xC00B4070++0x07 line.long 0x00 "ENBLDCHNS0,Enabled Channel Register 0" bitfld.long 0x00 31. "ENBLD31,Channel i Enable Status" "0,1" bitfld.long 0x00 30. "ENBLD30,Channel i Enable Status" "0,1" bitfld.long 0x00 29. "ENBLD29,Channel i Enable Status" "0,1" bitfld.long 0x00 28. "ENBLD28,Channel i Enable Status" "0,1" bitfld.long 0x00 27. "ENBLD27,Channel i Enable Status" "0,1" bitfld.long 0x00 26. "ENBLD26,Channel i Enable Status" "0,1" bitfld.long 0x00 25. "ENBLD25,Channel i Enable Status" "0,1" newline bitfld.long 0x00 24. "ENBLD24,Channel i Enable Status" "0,1" bitfld.long 0x00 23. "ENBLD23,Channel i Enable Status" "0,1" bitfld.long 0x00 22. "ENBLD22,Channel i Enable Status" "0,1" bitfld.long 0x00 21. "ENBLD21,Channel i Enable Status" "0,1" bitfld.long 0x00 20. "ENBLD20,Channel i Enable Status" "0,1" bitfld.long 0x00 19. "ENBLD19,Channel i Enable Status" "0,1" bitfld.long 0x00 18. "ENBLD18,Channel i Enable Status" "0,1" newline bitfld.long 0x00 17. "ENBLD17,Channel i Enable Status" "0,1" bitfld.long 0x00 16. "ENBLD16,Channel i Enable Status" "0,1" bitfld.long 0x00 15. "ENBLD15,Channel i Enable Status" "0,1" bitfld.long 0x00 14. "ENBLD14,Channel i Enable Status" "0,1" bitfld.long 0x00 13. "ENBLD13,Channel i Enable Status" "0,1" bitfld.long 0x00 12. "ENBLD12,Channel i Enable Status" "0,1" bitfld.long 0x00 11. "ENBLD11,Channel i Enable Status" "0,1" newline bitfld.long 0x00 10. "ENBLD10,Channel i Enable Status" "0,1" bitfld.long 0x00 9. "ENBLD9,Channel i Enable Status" "0,1" bitfld.long 0x00 8. "ENBLD8,Channel i Enable Status" "0,1" bitfld.long 0x00 7. "ENBLD7,Channel i Enable Status" "0,1" bitfld.long 0x00 6. "ENBLD6,Channel i Enable Status" "0,1" bitfld.long 0x00 5. "ENBLD5,Channel i Enable Status" "0,1" bitfld.long 0x00 4. "ENBLD4,Channel i Enable Status" "0,1" newline bitfld.long 0x00 3. "ENBLD3,Channel i Enable Status" "0,1" bitfld.long 0x00 2. "ENBLD2,Channel i Enable Status" "0,1" bitfld.long 0x00 1. "ENBLD1,Channel i Enable Status" "0,1" bitfld.long 0x00 0. "ENBLD0,Channel i Enable Status" "0,1" line.long 0x04 "ENBLDCHNS1,Enabled Channel Register 1" bitfld.long 0x04 7. "ENBLD7,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 6. "ENBLD6,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 5. "ENBLD5,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 4. "ENBLD4,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 3. "ENBLD3,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 2. "ENBLD2,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 1. "ENBLD1,Channel 32+i Enable Status" "0,1" newline bitfld.long 0x04 0. "ENBLD0,Channel 32+i Enable Status" "0,1" group.long ad:0xC00B4080++0x43 line.long 0x00 "SOFTBREQ0,Software Burst Request Register x (x=0~3)" bitfld.long 0x00 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x04 "SOFTBREQ1,Software Burst Request Register x (x=0~3)" bitfld.long 0x04 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x08 "SOFTBREQ2,Software Burst Request Register x (x=0~3)" bitfld.long 0x08 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x0C "SOFTBREQ3,Software Burst Request Register x (x=0~3)" bitfld.long 0x0C 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x10 "SOFTSREQ0,Software Single Request Register x (x=0~3)" bitfld.long 0x10 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x14 "SOFTSREQ1,Software Single Request Register x (x=0~3)" bitfld.long 0x14 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x18 "SOFTSREQ2,Software Single Request Register x (x=0~3)" bitfld.long 0x18 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x1C "SOFTSREQ3,Software Single Request Register x (x=0~3)" bitfld.long 0x1C 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x20 "SOFTLBREQ0,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x20 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x24 "SOFTLBREQ1,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x24 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x28 "SOFTLBREQ2,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x28 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x2C "SOFTLBREQ3,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x2C 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x30 "SOFTLSREQ0,Software Last Single Request Register x (x=0~3)" bitfld.long 0x30 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x34 "SOFTLSREQ1,Software Last Single Request Register x (x=0~3)" bitfld.long 0x34 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x38 "SOFTLSREQ2,Software Last Single Request Register x (x=0~3)" bitfld.long 0x38 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x3C "SOFTLSREQ3,Software Last Single Request Register x (x=0~3)" bitfld.long 0x3C 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x40 "CONFIG,DMA Configuration Register" bitfld.long 0x40 2. "M2,AHB Master 2 Endianness Configuration" "0,1" bitfld.long 0x40 1. "M1,AHB Master 1 Endianness Configuration" "0,1" bitfld.long 0x40 0. "E,DMA Enable" "0,1" group.long ad:0xC00B40E0++0x03 line.long 0x00 "SFCONFIG,DMA Safety Configuration Register" bitfld.long 0x00 26.--27. "REGPAMSK,Register Privileged Access Protection Error Mask" "0,1,2,3" bitfld.long 0x00 20.--21. "REGRDNMSK,Register Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 18.--19. "M2RDNMSK,DMA Master2 Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "M1RDNMSK,DMA Master1 Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 14.--15. "LLICRCEA,LLI CRC Error Abort Transfer" "0,1,2,3" bitfld.long 0x00 12.--13. "REGRDNEA,Register Redundancy Error Abort Transfer" "0,1,2,3" bitfld.long 0x00 10.--11. "MRDNSTEA,Master Redundancy Error Abort Transfer" "0,1,2,3" newline bitfld.long 0x00 8.--9. "TSTMPEN,Timestamp Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "REGRDNEN,Register Redundancy Check Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "M2RDNEN,DMA Master2 Redundancy Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "M1RDNEN,DMA Master1 Redundancy Check Enable" "0,1,2,3" rgroup.long ad:0xC00B40E4++0x1F line.long 0x00 "ALMSTS,DMA Alarm Status Register" bitfld.long 0x00 4. "CRC,CRC Check Alarm Status" "0,1" bitfld.long 0x00 2. "REGACC,Register Safety Endinit Access Protection Alarm Status" "0,1" bitfld.long 0x00 1. "REGRDN,Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 0. "MRDN,DMA Master Redundancy Check Alarm Status" "0,1" line.long 0x04 "ERRSTS0,DMA Error Status Register 0" bitfld.long 0x04 5. "REGPAERR,Register Privileged Access Protection Error Status" "0,1" bitfld.long 0x04 4. "REGSEERR,Register Safety Endinit Protection Error Status" "0,1" bitfld.long 0x04 1. "M2RDNERR,DMA Master2 Redundancy Check Error Status" "0,1" bitfld.long 0x04 0. "M1RDNERR,DMA Master1 Redundancy Check Error Status" "0,1" line.long 0x08 "ERRSTS1,DMA Error Status Register 1" bitfld.long 0x08 31. "CHREGERR31,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 30. "CHREGERR30,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 29. "CHREGERR29,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 28. "CHREGERR28,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 27. "CHREGERR27,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 26. "CHREGERR26,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 25. "CHREGERR25,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 24. "CHREGERR24,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 23. "CHREGERR23,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 22. "CHREGERR22,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 21. "CHREGERR21,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 20. "CHREGERR20,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 19. "CHREGERR19,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 18. "CHREGERR18,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 17. "CHREGERR17,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 16. "CHREGERR16,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 15. "CHREGERR15,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 14. "CHREGERR14,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 13. "CHREGERR13,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 12. "CHREGERR12,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 11. "CHREGERR11,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 10. "CHREGERR10,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 9. "CHREGERR9,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 8. "CHREGERR8,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 7. "CHREGERR7,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 6. "CHREGERR6,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 5. "CHREGERR5,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 4. "CHREGERR4,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 3. "CHREGERR3,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 2. "CHREGERR2,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 1. "CHREGERR1,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 0. "CHREGERR0,Register Redundancy Check Error Status for Channel i" "0,1" line.long 0x0C "ERRSTS2,DMA Error Status Register 2" bitfld.long 0x0C 8. "GLBREGERR,Global Register Redundancy Check Error Status" "0,1" bitfld.long 0x0C 7. "CHREGERR7,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 6. "CHREGERR6,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 5. "CHREGERR5,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 4. "CHREGERR4,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 3. "CHREGERR3,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 2. "CHREGERR2,Register Redundancy Check Error Status for Channel 32+i" "0,1" newline bitfld.long 0x0C 1. "CHREGERR1,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 0. "CHREGERR0,Register Redundancy Check Error Status for Channel 32+i" "0,1" line.long 0x10 "ERRSTS3,DMA Error Status Register 3" bitfld.long 0x10 31. "CHDCRCERR31,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 30. "CHDCRCERR30,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 29. "CHDCRCERR29,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 28. "CHDCRCERR28,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 27. "CHDCRCERR27,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 26. "CHDCRCERR26,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 25. "CHDCRCERR25,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 24. "CHDCRCERR24,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 23. "CHDCRCERR23,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 22. "CHDCRCERR22,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 21. "CHDCRCERR21,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 20. "CHDCRCERR20,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 19. "CHDCRCERR19,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 18. "CHDCRCERR18,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 17. "CHDCRCERR17,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 16. "CHDCRCERR16,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 15. "CHDCRCERR15,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 14. "CHDCRCERR14,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 13. "CHDCRCERR13,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 12. "CHDCRCERR12,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 11. "CHDCRCERR11,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 10. "CHDCRCERR10,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 9. "CHDCRCERR9,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 8. "CHDCRCERR8,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 7. "CHDCRCERR7,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 6. "CHDCRCERR6,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 5. "CHDCRCERR5,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 4. "CHDCRCERR4,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 3. "CHDCRCERR3,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 2. "CHDCRCERR2,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 1. "CHDCRCERR1,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 0. "CHDCRCERR0,Data CRC Check Error Status for Channel i" "0,1" line.long 0x14 "ERRSTS4,DMA Error Status Register 4" bitfld.long 0x14 7. "CHDCRCERR7,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 6. "CHDCRCERR6,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 5. "CHDCRCERR5,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 4. "CHDCRCERR4,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 3. "CHDCRCERR3,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 2. "CHDCRCERR2,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 1. "CHDCRCERR1,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x14 0. "CHDCRCERR0,Data CRC Check Error Status for Channel i" "0,1" line.long 0x18 "ERRSTS5,DMA Error Status Register 5" bitfld.long 0x18 31. "CHLCRCERR31,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 30. "CHLCRCERR30,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 29. "CHLCRCERR29,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 28. "CHLCRCERR28,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 27. "CHLCRCERR27,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 26. "CHLCRCERR26,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 25. "CHLCRCERR25,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 24. "CHLCRCERR24,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 23. "CHLCRCERR23,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 22. "CHLCRCERR22,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 21. "CHLCRCERR21,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 20. "CHLCRCERR20,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 19. "CHLCRCERR19,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 18. "CHLCRCERR18,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 17. "CHLCRCERR17,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 16. "CHLCRCERR16,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 15. "CHLCRCERR15,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 14. "CHLCRCERR14,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 13. "CHLCRCERR13,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 12. "CHLCRCERR12,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 11. "CHLCRCERR11,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 10. "CHLCRCERR10,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 9. "CHLCRCERR9,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 8. "CHLCRCERR8,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 7. "CHLCRCERR7,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 6. "CHLCRCERR6,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 5. "CHLCRCERR5,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 4. "CHLCRCERR4,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 3. "CHLCRCERR3,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 2. "CHLCRCERR2,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 1. "CHLCRCERR1,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 0. "CHLCRCERR0,LLI CRC Check Error Status for Channel i" "0,1" line.long 0x1C "ERRSTS6,DMA Error Status Register 6" bitfld.long 0x1C 7. "CHLCRCERR7,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 6. "CHLCRCERR6,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 5. "CHLCRCERR5,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 4. "CHLCRCERR4,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 3. "CHLCRCERR3,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 2. "CHLCRCERR2,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 1. "CHLCRCERR1,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x1C 0. "CHLCRCERR0,LLI CRC Check Error Status for Channel i" "0,1" wgroup.long ad:0xC00B4104++0x07 line.long 0x00 "ERRCLR0,DMA Error Clear Register 0" bitfld.long 0x00 5. "REGPAECLR,Register Privileged Access Protection Error Clear" "0,1" bitfld.long 0x00 4. "REGSEECLR,Register Safety Endinit Protection Error Clear" "0,1" bitfld.long 0x00 1. "M2RDNECLR,DMA Master2 Redundancy Check Error Clear" "0,1" bitfld.long 0x00 0. "M1RDNECLR,DMA Master1 Redundancy Check Error Clear" "0,1" line.long 0x04 "ERRCLR2,DMA Error Clear Register 2" bitfld.long 0x04 8. "GLBREGECLR,Global Register Redundancy Check Error Clear" "0,1" group.long ad:0xC00B410C++0x07 line.long 0x00 "ERRINJ,DMA Error Injection Register" bitfld.long 0x00 16.--17. "CRCEINJ,DMA CRC Error Injection" "0,1,2,3" bitfld.long 0x00 2.--3. "M2RDNEINJ,DMA Master2 Redundancy Check Error Injection" "0,1,2,3" bitfld.long 0x00 0.--1. "M1RDNEINJ,DMA Master1 Redundancy Check Error Injection" "0,1,2,3" line.long 0x04 "ITIMERDIV,DMA Internal Timer Clock Divider Configuration Register" bitfld.long 0x04 8. "CKG,Timer Clock Gating" "0,1" hexmask.long.byte 0x04 0.--7. 1. "DIV,Timer Clock Divider Configuration" rgroup.long ad:0xC00B4114++0x03 line.long 0x00 "ITIMERVAL,DMA Internal Timer Value Register" group.long ad:0xC00B4800++0x3F line.long 0x00 "REQMUX0,DMA global request select register m (m=0~15)" hexmask.long.byte 0x00 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x04 "REQMUX1,DMA global request select register m (m=0~15)" hexmask.long.byte 0x04 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x08 "REQMUX2,DMA global request select register m (m=0~15)" hexmask.long.byte 0x08 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x0C "REQMUX3,DMA global request select register m (m=0~15)" hexmask.long.byte 0x0C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x10 "REQMUX4,DMA global request select register m (m=0~15)" hexmask.long.byte 0x10 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x14 "REQMUX5,DMA global request select register m (m=0~15)" hexmask.long.byte 0x14 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x18 "REQMUX6,DMA global request select register m (m=0~15)" hexmask.long.byte 0x18 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x1C "REQMUX7,DMA global request select register m (m=0~15)" hexmask.long.byte 0x1C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x20 "REQMUX8,DMA global request select register m (m=0~15)" hexmask.long.byte 0x20 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x24 "REQMUX9,DMA global request select register m (m=0~15)" hexmask.long.byte 0x24 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x28 "REQMUX10,DMA global request select register m (m=0~15)" hexmask.long.byte 0x28 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x2C "REQMUX11,DMA global request select register m (m=0~15)" hexmask.long.byte 0x2C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x30 "REQMUX12,DMA global request select register m (m=0~15)" hexmask.long.byte 0x30 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x34 "REQMUX13,DMA global request select register m (m=0~15)" hexmask.long.byte 0x34 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x38 "REQMUX14,DMA global request select register m (m=0~15)" hexmask.long.byte 0x38 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x3C "REQMUX15,DMA global request select register m (m=0~15)" hexmask.long.byte 0x3C 0.--7. 1. "REQSEL,DMA Global Request Selection" group.long ad:0xC00B5000++0x03 line.long 0x00 "C0SRCADDR,Channel n Source Address Register" group.long ad:0xC00B5080++0x03 line.long 0x00 "C1SRCADDR,Channel n Source Address Register" group.long ad:0xC00B5100++0x03 line.long 0x00 "C2SRCADDR,Channel n Source Address Register" group.long ad:0xC00B5180++0x03 line.long 0x00 "C3SRCADDR,Channel n Source Address Register" group.long ad:0xC00B5200++0x03 line.long 0x00 "C4SRCADDR,Channel n Source Address Register" group.long ad:0xC00B5280++0x03 line.long 0x00 "C5SRCADDR,Channel n Source Address Register" group.long ad:0xC00B5300++0x03 line.long 0x00 "C6SRCADDR,Channel n Source Address Register" group.long ad:0xC00B5380++0x03 line.long 0x00 "C7SRCADDR,Channel n Source Address Register" group.long ad:0xC00B5004++0x03 line.long 0x00 "C0DESTADR,Channel n Destination Address Register" group.long ad:0xC00B5084++0x03 line.long 0x00 "C1DESTADR,Channel n Destination Address Register" group.long ad:0xC00B5104++0x03 line.long 0x00 "C2DESTADR,Channel n Destination Address Register" group.long ad:0xC00B5184++0x03 line.long 0x00 "C3DESTADR,Channel n Destination Address Register" group.long ad:0xC00B5204++0x03 line.long 0x00 "C4DESTADR,Channel n Destination Address Register" group.long ad:0xC00B5284++0x03 line.long 0x00 "C5DESTADR,Channel n Destination Address Register" group.long ad:0xC00B5304++0x03 line.long 0x00 "C6DESTADR,Channel n Destination Address Register" group.long ad:0xC00B5384++0x03 line.long 0x00 "C7DESTADR,Channel n Destination Address Register" group.long ad:0xC00B5008++0x03 line.long 0x00 "C0LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B5088++0x03 line.long 0x00 "C1LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B5108++0x03 line.long 0x00 "C2LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B5188++0x03 line.long 0x00 "C3LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B5208++0x03 line.long 0x00 "C4LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B5288++0x03 line.long 0x00 "C5LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B5308++0x03 line.long 0x00 "C6LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B5388++0x03 line.long 0x00 "C7LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B500C++0x03 line.long 0x00 "C0CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B508C++0x03 line.long 0x00 "C1CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B510C++0x03 line.long 0x00 "C2CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B518C++0x03 line.long 0x00 "C3CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B520C++0x03 line.long 0x00 "C4CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B528C++0x03 line.long 0x00 "C5CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B530C++0x03 line.long 0x00 "C6CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B538C++0x03 line.long 0x00 "C7CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B5010++0x03 line.long 0x00 "C0CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B5090++0x03 line.long 0x00 "C1CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B5110++0x03 line.long 0x00 "C2CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B5190++0x03 line.long 0x00 "C3CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B5210++0x03 line.long 0x00 "C4CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B5290++0x03 line.long 0x00 "C5CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B5310++0x03 line.long 0x00 "C6CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B5390++0x03 line.long 0x00 "C7CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B5014++0x03 line.long 0x00 "C0ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B5094++0x03 line.long 0x00 "C1ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B5114++0x03 line.long 0x00 "C2ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B5194++0x03 line.long 0x00 "C3ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B5214++0x03 line.long 0x00 "C4ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B5294++0x03 line.long 0x00 "C5ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B5314++0x03 line.long 0x00 "C6ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B5394++0x03 line.long 0x00 "C7ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B5018++0x03 line.long 0x00 "C0PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B5098++0x03 line.long 0x00 "C1PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B5118++0x03 line.long 0x00 "C2PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B5198++0x03 line.long 0x00 "C3PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B5218++0x03 line.long 0x00 "C4PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B5298++0x03 line.long 0x00 "C5PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B5318++0x03 line.long 0x00 "C6PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B5398++0x03 line.long 0x00 "C7PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B501C++0x03 line.long 0x00 "C0SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B509C++0x03 line.long 0x00 "C1SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B511C++0x03 line.long 0x00 "C2SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B519C++0x03 line.long 0x00 "C3SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B521C++0x03 line.long 0x00 "C4SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B529C++0x03 line.long 0x00 "C5SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B531C++0x03 line.long 0x00 "C6SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B539C++0x03 line.long 0x00 "C7SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B5020++0x03 line.long 0x00 "C0DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B50A0++0x03 line.long 0x00 "C1DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B5120++0x03 line.long 0x00 "C2DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B51A0++0x03 line.long 0x00 "C3DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B5220++0x03 line.long 0x00 "C4DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B52A0++0x03 line.long 0x00 "C5DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B5320++0x03 line.long 0x00 "C6DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B53A0++0x03 line.long 0x00 "C7DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B5024++0x03 line.long 0x00 "C0LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B50A4++0x03 line.long 0x00 "C1LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B5124++0x03 line.long 0x00 "C2LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B51A4++0x03 line.long 0x00 "C3LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B5224++0x03 line.long 0x00 "C4LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B52A4++0x03 line.long 0x00 "C5LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B5324++0x03 line.long 0x00 "C6LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B53A4++0x03 line.long 0x00 "C7LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B5028++0x03 line.long 0x00 "C0CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B50A8++0x03 line.long 0x00 "C1CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B5128++0x03 line.long 0x00 "C2CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B51A8++0x03 line.long 0x00 "C3CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B5228++0x03 line.long 0x00 "C4CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B52A8++0x03 line.long 0x00 "C5CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B5328++0x03 line.long 0x00 "C6CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B53A8++0x03 line.long 0x00 "C7CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B502C++0x03 line.long 0x00 "C0SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B50AC++0x03 line.long 0x00 "C1SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B512C++0x03 line.long 0x00 "C2SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B51AC++0x03 line.long 0x00 "C3SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B522C++0x03 line.long 0x00 "C4SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B52AC++0x03 line.long 0x00 "C5SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B532C++0x03 line.long 0x00 "C6SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B53AC++0x03 line.long 0x00 "C7SWADDR,Channel n Double Buffer Switch Address Register" wgroup.long ad:0xC00B5030++0x03 line.long 0x00 "C0DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B50B0++0x03 line.long 0x00 "C1DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B5130++0x03 line.long 0x00 "C2DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B51B0++0x03 line.long 0x00 "C3DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B5230++0x03 line.long 0x00 "C4DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B52B0++0x03 line.long 0x00 "C5DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B5330++0x03 line.long 0x00 "C6DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B53B0++0x03 line.long 0x00 "C7DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" group.long ad:0xC00B5034++0x03 line.long 0x00 "C0DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B50B4++0x03 line.long 0x00 "C1DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B5134++0x03 line.long 0x00 "C2DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B51B4++0x03 line.long 0x00 "C3DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B5234++0x03 line.long 0x00 "C4DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B52B4++0x03 line.long 0x00 "C5DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B5334++0x03 line.long 0x00 "C6DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B53B4++0x03 line.long 0x00 "C7DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B5038++0x03 line.long 0x00 "C0PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B50B8++0x03 line.long 0x00 "C1PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B5138++0x03 line.long 0x00 "C2PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B51B8++0x03 line.long 0x00 "C3PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B5238++0x03 line.long 0x00 "C4PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B52B8++0x03 line.long 0x00 "C5PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B5338++0x03 line.long 0x00 "C6PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B53B8++0x03 line.long 0x00 "C7PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B503C++0x03 line.long 0x00 "C0PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B50BC++0x03 line.long 0x00 "C1PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B513C++0x03 line.long 0x00 "C2PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B51BC++0x03 line.long 0x00 "C3PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B523C++0x03 line.long 0x00 "C4PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B52BC++0x03 line.long 0x00 "C5PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B533C++0x03 line.long 0x00 "C6PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B53BC++0x03 line.long 0x00 "C7PATMSK,Channel n Data Match Pattern Register" rgroup.long ad:0xC00B5040++0x03 line.long 0x00 "C0INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B50C0++0x03 line.long 0x00 "C1INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B5140++0x03 line.long 0x00 "C2INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B51C0++0x03 line.long 0x00 "C3INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B5240++0x03 line.long 0x00 "C4INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B52C0++0x03 line.long 0x00 "C5INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B5340++0x03 line.long 0x00 "C6INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B53C0++0x03 line.long 0x00 "C7INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B5044++0x03 line.long 0x00 "C0RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B50C4++0x03 line.long 0x00 "C1RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B5144++0x03 line.long 0x00 "C2RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B51C4++0x03 line.long 0x00 "C3RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B5244++0x03 line.long 0x00 "C4RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B52C4++0x03 line.long 0x00 "C5RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B5344++0x03 line.long 0x00 "C6RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B53C4++0x03 line.long 0x00 "C7RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" wgroup.long ad:0xC00B5048++0x03 line.long 0x00 "C0INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B50C8++0x03 line.long 0x00 "C1INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B5148++0x03 line.long 0x00 "C2INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B51C8++0x03 line.long 0x00 "C3INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B5248++0x03 line.long 0x00 "C4INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B52C8++0x03 line.long 0x00 "C5INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B5348++0x03 line.long 0x00 "C6INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B53C8++0x03 line.long 0x00 "C7INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B504C++0x03 line.long 0x00 "C0ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B50CC++0x03 line.long 0x00 "C1ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B514C++0x03 line.long 0x00 "C2ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B51CC++0x03 line.long 0x00 "C3ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B524C++0x03 line.long 0x00 "C4ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B52CC++0x03 line.long 0x00 "C5ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B534C++0x03 line.long 0x00 "C6ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B53CC++0x03 line.long 0x00 "C7ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" rgroup.long ad:0xC00B5050++0x03 line.long 0x00 "C0STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B50D0++0x03 line.long 0x00 "C1STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B5150++0x03 line.long 0x00 "C2STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B51D0++0x03 line.long 0x00 "C3STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B5250++0x03 line.long 0x00 "C4STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B52D0++0x03 line.long 0x00 "C5STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B5350++0x03 line.long 0x00 "C6STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B53D0++0x03 line.long 0x00 "C7STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B5054++0x03 line.long 0x00 "C0EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B50D4++0x03 line.long 0x00 "C1EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B5154++0x03 line.long 0x00 "C2EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B51D4++0x03 line.long 0x00 "C3EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B5254++0x03 line.long 0x00 "C4EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B52D4++0x03 line.long 0x00 "C5EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B5354++0x03 line.long 0x00 "C6EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B53D4++0x03 line.long 0x00 "C7EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B5058++0x03 line.long 0x00 "C0TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B50D8++0x03 line.long 0x00 "C1TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B5158++0x03 line.long 0x00 "C2TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B51D8++0x03 line.long 0x00 "C3TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B5258++0x03 line.long 0x00 "C4TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B52D8++0x03 line.long 0x00 "C5TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B5358++0x03 line.long 0x00 "C6TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B53D8++0x03 line.long 0x00 "C7TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" wgroup.long ad:0xC00B505C++0x03 line.long 0x00 "C0TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B50DC++0x03 line.long 0x00 "C1TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B515C++0x03 line.long 0x00 "C2TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B51DC++0x03 line.long 0x00 "C3TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B525C++0x03 line.long 0x00 "C4TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B52DC++0x03 line.long 0x00 "C5TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B535C++0x03 line.long 0x00 "C6TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B53DC++0x03 line.long 0x00 "C7TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" group.long ad:0xC00B5060++0x03 line.long 0x00 "C0CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B50E0++0x03 line.long 0x00 "C1CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B5160++0x03 line.long 0x00 "C2CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B51E0++0x03 line.long 0x00 "C3CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B5260++0x03 line.long 0x00 "C4CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B52E0++0x03 line.long 0x00 "C5CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B5360++0x03 line.long 0x00 "C6CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B53E0++0x03 line.long 0x00 "C7CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" rgroup.long ad:0xC00B5064++0x03 line.long 0x00 "C0SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B50E4++0x03 line.long 0x00 "C1SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B5164++0x03 line.long 0x00 "C2SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B51E4++0x03 line.long 0x00 "C3SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B5264++0x03 line.long 0x00 "C4SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B52E4++0x03 line.long 0x00 "C5SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B5364++0x03 line.long 0x00 "C6SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B53E4++0x03 line.long 0x00 "C7SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B5068++0x03 line.long 0x00 "C0DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B50E8++0x03 line.long 0x00 "C1DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B5168++0x03 line.long 0x00 "C2DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B51E8++0x03 line.long 0x00 "C3DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B5268++0x03 line.long 0x00 "C4DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B52E8++0x03 line.long 0x00 "C5DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B5368++0x03 line.long 0x00 "C6DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B53E8++0x03 line.long 0x00 "C7DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B506C++0x03 line.long 0x00 "C0LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B50EC++0x03 line.long 0x00 "C1LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B516C++0x03 line.long 0x00 "C2LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B51EC++0x03 line.long 0x00 "C3LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B526C++0x03 line.long 0x00 "C4LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B52EC++0x03 line.long 0x00 "C5LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B536C++0x03 line.long 0x00 "C6LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B53EC++0x03 line.long 0x00 "C7LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" group.long ad:0xC00B5070++0x03 line.long 0x00 "C0EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B50F0++0x03 line.long 0x00 "C1EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B5170++0x03 line.long 0x00 "C2EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B51F0++0x03 line.long 0x00 "C3EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B5270++0x03 line.long 0x00 "C4EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B52F0++0x03 line.long 0x00 "C5EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B5370++0x03 line.long 0x00 "C6EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B53F0++0x03 line.long 0x00 "C7EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B5074++0x03 line.long 0x00 "C0THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B50F4++0x03 line.long 0x00 "C1THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B5174++0x03 line.long 0x00 "C2THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B51F4++0x03 line.long 0x00 "C3THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B5274++0x03 line.long 0x00 "C4THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B52F4++0x03 line.long 0x00 "C5THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B5374++0x03 line.long 0x00 "C6THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B53F4++0x03 line.long 0x00 "C7THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" tree.end tree "DMA1" rgroup.long ad:0xB0030000++0x07 line.long 0x00 "INTSTAT0,Interrupt Status Register 0" bitfld.long 0x00 31. "INTSTAT31,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 30. "INTSTAT30,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 29. "INTSTAT29,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 28. "INTSTAT28,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 27. "INTSTAT27,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 26. "INTSTAT26,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 25. "INTSTAT25,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 24. "INTSTAT24,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 23. "INTSTAT23,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 22. "INTSTAT22,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 21. "INTSTAT21,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 20. "INTSTAT20,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 19. "INTSTAT19,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 18. "INTSTAT18,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 17. "INTSTAT17,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 16. "INTSTAT16,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 15. "INTSTAT15,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 14. "INTSTAT14,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 13. "INTSTAT13,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 12. "INTSTAT12,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 11. "INTSTAT11,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 10. "INTSTAT10,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 9. "INTSTAT9,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 8. "INTSTAT8,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 7. "INTSTAT7,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 6. "INTSTAT6,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 5. "INTSTAT5,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 4. "INTSTAT4,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 3. "INTSTAT3,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 2. "INTSTAT2,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 1. "INTSTAT1,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 0. "INTSTAT0,Interrupt Status for Channel i after Masking" "0,1" line.long 0x04 "INTSTAT1,Interrupt Status Register 1" bitfld.long 0x04 7. "INTSTAT7,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 6. "INTSTAT6,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 5. "INTSTAT5,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 4. "INTSTAT4,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 3. "INTSTAT3,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 2. "INTSTAT2,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 1. "INTSTAT1,Interrupt Status for Channel 32+i after Masking" "0,1" newline bitfld.long 0x04 0. "INTSTAT0,Interrupt Status for Channel 32+i after Masking" "0,1" rgroup.long ad:0xB0030070++0x07 line.long 0x00 "ENBLDCHNS0,Enabled Channel Register 0" bitfld.long 0x00 31. "ENBLD31,Channel i Enable Status" "0,1" bitfld.long 0x00 30. "ENBLD30,Channel i Enable Status" "0,1" bitfld.long 0x00 29. "ENBLD29,Channel i Enable Status" "0,1" bitfld.long 0x00 28. "ENBLD28,Channel i Enable Status" "0,1" bitfld.long 0x00 27. "ENBLD27,Channel i Enable Status" "0,1" bitfld.long 0x00 26. "ENBLD26,Channel i Enable Status" "0,1" bitfld.long 0x00 25. "ENBLD25,Channel i Enable Status" "0,1" newline bitfld.long 0x00 24. "ENBLD24,Channel i Enable Status" "0,1" bitfld.long 0x00 23. "ENBLD23,Channel i Enable Status" "0,1" bitfld.long 0x00 22. "ENBLD22,Channel i Enable Status" "0,1" bitfld.long 0x00 21. "ENBLD21,Channel i Enable Status" "0,1" bitfld.long 0x00 20. "ENBLD20,Channel i Enable Status" "0,1" bitfld.long 0x00 19. "ENBLD19,Channel i Enable Status" "0,1" bitfld.long 0x00 18. "ENBLD18,Channel i Enable Status" "0,1" newline bitfld.long 0x00 17. "ENBLD17,Channel i Enable Status" "0,1" bitfld.long 0x00 16. "ENBLD16,Channel i Enable Status" "0,1" bitfld.long 0x00 15. "ENBLD15,Channel i Enable Status" "0,1" bitfld.long 0x00 14. "ENBLD14,Channel i Enable Status" "0,1" bitfld.long 0x00 13. "ENBLD13,Channel i Enable Status" "0,1" bitfld.long 0x00 12. "ENBLD12,Channel i Enable Status" "0,1" bitfld.long 0x00 11. "ENBLD11,Channel i Enable Status" "0,1" newline bitfld.long 0x00 10. "ENBLD10,Channel i Enable Status" "0,1" bitfld.long 0x00 9. "ENBLD9,Channel i Enable Status" "0,1" bitfld.long 0x00 8. "ENBLD8,Channel i Enable Status" "0,1" bitfld.long 0x00 7. "ENBLD7,Channel i Enable Status" "0,1" bitfld.long 0x00 6. "ENBLD6,Channel i Enable Status" "0,1" bitfld.long 0x00 5. "ENBLD5,Channel i Enable Status" "0,1" bitfld.long 0x00 4. "ENBLD4,Channel i Enable Status" "0,1" newline bitfld.long 0x00 3. "ENBLD3,Channel i Enable Status" "0,1" bitfld.long 0x00 2. "ENBLD2,Channel i Enable Status" "0,1" bitfld.long 0x00 1. "ENBLD1,Channel i Enable Status" "0,1" bitfld.long 0x00 0. "ENBLD0,Channel i Enable Status" "0,1" line.long 0x04 "ENBLDCHNS1,Enabled Channel Register 1" bitfld.long 0x04 7. "ENBLD7,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 6. "ENBLD6,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 5. "ENBLD5,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 4. "ENBLD4,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 3. "ENBLD3,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 2. "ENBLD2,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 1. "ENBLD1,Channel 32+i Enable Status" "0,1" newline bitfld.long 0x04 0. "ENBLD0,Channel 32+i Enable Status" "0,1" group.long ad:0xB0030080++0x43 line.long 0x00 "SOFTBREQ0,Software Burst Request Register x (x=0~3)" bitfld.long 0x00 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x04 "SOFTBREQ1,Software Burst Request Register x (x=0~3)" bitfld.long 0x04 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x08 "SOFTBREQ2,Software Burst Request Register x (x=0~3)" bitfld.long 0x08 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x0C "SOFTBREQ3,Software Burst Request Register x (x=0~3)" bitfld.long 0x0C 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x10 "SOFTSREQ0,Software Single Request Register x (x=0~3)" bitfld.long 0x10 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x14 "SOFTSREQ1,Software Single Request Register x (x=0~3)" bitfld.long 0x14 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x18 "SOFTSREQ2,Software Single Request Register x (x=0~3)" bitfld.long 0x18 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x1C "SOFTSREQ3,Software Single Request Register x (x=0~3)" bitfld.long 0x1C 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x20 "SOFTLBREQ0,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x20 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x24 "SOFTLBREQ1,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x24 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x28 "SOFTLBREQ2,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x28 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x2C "SOFTLBREQ3,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x2C 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x30 "SOFTLSREQ0,Software Last Single Request Register x (x=0~3)" bitfld.long 0x30 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x34 "SOFTLSREQ1,Software Last Single Request Register x (x=0~3)" bitfld.long 0x34 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x38 "SOFTLSREQ2,Software Last Single Request Register x (x=0~3)" bitfld.long 0x38 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x3C "SOFTLSREQ3,Software Last Single Request Register x (x=0~3)" bitfld.long 0x3C 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x40 "CONFIG,DMA Configuration Register" bitfld.long 0x40 2. "M2,AHB Master 2 Endianness Configuration" "0,1" bitfld.long 0x40 1. "M1,AHB Master 1 Endianness Configuration" "0,1" bitfld.long 0x40 0. "E,DMA Enable" "0,1" group.long ad:0xB00300E0++0x03 line.long 0x00 "SFCONFIG,DMA Safety Configuration Register" bitfld.long 0x00 26.--27. "REGPAMSK,Register Privileged Access Protection Error Mask" "0,1,2,3" bitfld.long 0x00 20.--21. "REGRDNMSK,Register Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 18.--19. "M2RDNMSK,DMA Master2 Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "M1RDNMSK,DMA Master1 Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 14.--15. "LLICRCEA,LLI CRC Error Abort Transfer" "0,1,2,3" bitfld.long 0x00 12.--13. "REGRDNEA,Register Redundancy Error Abort Transfer" "0,1,2,3" bitfld.long 0x00 10.--11. "MRDNSTEA,Master Redundancy Error Abort Transfer" "0,1,2,3" newline bitfld.long 0x00 8.--9. "TSTMPEN,Timestamp Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "REGRDNEN,Register Redundancy Check Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "M2RDNEN,DMA Master2 Redundancy Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "M1RDNEN,DMA Master1 Redundancy Check Enable" "0,1,2,3" rgroup.long ad:0xB00300E4++0x1F line.long 0x00 "ALMSTS,DMA Alarm Status Register" bitfld.long 0x00 4. "CRC,CRC Check Alarm Status" "0,1" bitfld.long 0x00 2. "REGACC,Register Safety Endinit Access Protection Alarm Status" "0,1" bitfld.long 0x00 1. "REGRDN,Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 0. "MRDN,DMA Master Redundancy Check Alarm Status" "0,1" line.long 0x04 "ERRSTS0,DMA Error Status Register 0" bitfld.long 0x04 5. "REGPAERR,Register Privileged Access Protection Error Status" "0,1" bitfld.long 0x04 4. "REGSEERR,Register Safety Endinit Protection Error Status" "0,1" bitfld.long 0x04 1. "M2RDNERR,DMA Master2 Redundancy Check Error Status" "0,1" bitfld.long 0x04 0. "M1RDNERR,DMA Master1 Redundancy Check Error Status" "0,1" line.long 0x08 "ERRSTS1,DMA Error Status Register 1" bitfld.long 0x08 31. "CHREGERR31,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 30. "CHREGERR30,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 29. "CHREGERR29,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 28. "CHREGERR28,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 27. "CHREGERR27,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 26. "CHREGERR26,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 25. "CHREGERR25,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 24. "CHREGERR24,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 23. "CHREGERR23,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 22. "CHREGERR22,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 21. "CHREGERR21,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 20. "CHREGERR20,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 19. "CHREGERR19,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 18. "CHREGERR18,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 17. "CHREGERR17,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 16. "CHREGERR16,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 15. "CHREGERR15,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 14. "CHREGERR14,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 13. "CHREGERR13,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 12. "CHREGERR12,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 11. "CHREGERR11,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 10. "CHREGERR10,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 9. "CHREGERR9,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 8. "CHREGERR8,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 7. "CHREGERR7,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 6. "CHREGERR6,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 5. "CHREGERR5,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 4. "CHREGERR4,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 3. "CHREGERR3,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 2. "CHREGERR2,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 1. "CHREGERR1,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 0. "CHREGERR0,Register Redundancy Check Error Status for Channel i" "0,1" line.long 0x0C "ERRSTS2,DMA Error Status Register 2" bitfld.long 0x0C 8. "GLBREGERR,Global Register Redundancy Check Error Status" "0,1" bitfld.long 0x0C 7. "CHREGERR7,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 6. "CHREGERR6,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 5. "CHREGERR5,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 4. "CHREGERR4,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 3. "CHREGERR3,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 2. "CHREGERR2,Register Redundancy Check Error Status for Channel 32+i" "0,1" newline bitfld.long 0x0C 1. "CHREGERR1,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 0. "CHREGERR0,Register Redundancy Check Error Status for Channel 32+i" "0,1" line.long 0x10 "ERRSTS3,DMA Error Status Register 3" bitfld.long 0x10 31. "CHDCRCERR31,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 30. "CHDCRCERR30,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 29. "CHDCRCERR29,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 28. "CHDCRCERR28,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 27. "CHDCRCERR27,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 26. "CHDCRCERR26,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 25. "CHDCRCERR25,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 24. "CHDCRCERR24,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 23. "CHDCRCERR23,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 22. "CHDCRCERR22,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 21. "CHDCRCERR21,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 20. "CHDCRCERR20,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 19. "CHDCRCERR19,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 18. "CHDCRCERR18,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 17. "CHDCRCERR17,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 16. "CHDCRCERR16,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 15. "CHDCRCERR15,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 14. "CHDCRCERR14,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 13. "CHDCRCERR13,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 12. "CHDCRCERR12,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 11. "CHDCRCERR11,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 10. "CHDCRCERR10,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 9. "CHDCRCERR9,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 8. "CHDCRCERR8,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 7. "CHDCRCERR7,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 6. "CHDCRCERR6,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 5. "CHDCRCERR5,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 4. "CHDCRCERR4,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 3. "CHDCRCERR3,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 2. "CHDCRCERR2,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 1. "CHDCRCERR1,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 0. "CHDCRCERR0,Data CRC Check Error Status for Channel i" "0,1" line.long 0x14 "ERRSTS4,DMA Error Status Register 4" bitfld.long 0x14 7. "CHDCRCERR7,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 6. "CHDCRCERR6,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 5. "CHDCRCERR5,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 4. "CHDCRCERR4,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 3. "CHDCRCERR3,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 2. "CHDCRCERR2,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 1. "CHDCRCERR1,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x14 0. "CHDCRCERR0,Data CRC Check Error Status for Channel i" "0,1" line.long 0x18 "ERRSTS5,DMA Error Status Register 5" bitfld.long 0x18 31. "CHLCRCERR31,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 30. "CHLCRCERR30,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 29. "CHLCRCERR29,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 28. "CHLCRCERR28,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 27. "CHLCRCERR27,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 26. "CHLCRCERR26,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 25. "CHLCRCERR25,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 24. "CHLCRCERR24,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 23. "CHLCRCERR23,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 22. "CHLCRCERR22,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 21. "CHLCRCERR21,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 20. "CHLCRCERR20,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 19. "CHLCRCERR19,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 18. "CHLCRCERR18,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 17. "CHLCRCERR17,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 16. "CHLCRCERR16,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 15. "CHLCRCERR15,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 14. "CHLCRCERR14,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 13. "CHLCRCERR13,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 12. "CHLCRCERR12,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 11. "CHLCRCERR11,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 10. "CHLCRCERR10,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 9. "CHLCRCERR9,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 8. "CHLCRCERR8,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 7. "CHLCRCERR7,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 6. "CHLCRCERR6,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 5. "CHLCRCERR5,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 4. "CHLCRCERR4,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 3. "CHLCRCERR3,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 2. "CHLCRCERR2,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 1. "CHLCRCERR1,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 0. "CHLCRCERR0,LLI CRC Check Error Status for Channel i" "0,1" line.long 0x1C "ERRSTS6,DMA Error Status Register 6" bitfld.long 0x1C 7. "CHLCRCERR7,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 6. "CHLCRCERR6,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 5. "CHLCRCERR5,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 4. "CHLCRCERR4,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 3. "CHLCRCERR3,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 2. "CHLCRCERR2,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 1. "CHLCRCERR1,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x1C 0. "CHLCRCERR0,LLI CRC Check Error Status for Channel i" "0,1" wgroup.long ad:0xB0030104++0x07 line.long 0x00 "ERRCLR0,DMA Error Clear Register 0" bitfld.long 0x00 5. "REGPAECLR,Register Privileged Access Protection Error Clear" "0,1" bitfld.long 0x00 4. "REGSEECLR,Register Safety Endinit Protection Error Clear" "0,1" bitfld.long 0x00 1. "M2RDNECLR,DMA Master2 Redundancy Check Error Clear" "0,1" bitfld.long 0x00 0. "M1RDNECLR,DMA Master1 Redundancy Check Error Clear" "0,1" line.long 0x04 "ERRCLR2,DMA Error Clear Register 2" bitfld.long 0x04 8. "GLBREGECLR,Global Register Redundancy Check Error Clear" "0,1" group.long ad:0xB003010C++0x07 line.long 0x00 "ERRINJ,DMA Error Injection Register" bitfld.long 0x00 16.--17. "CRCEINJ,DMA CRC Error Injection" "0,1,2,3" bitfld.long 0x00 2.--3. "M2RDNEINJ,DMA Master2 Redundancy Check Error Injection" "0,1,2,3" bitfld.long 0x00 0.--1. "M1RDNEINJ,DMA Master1 Redundancy Check Error Injection" "0,1,2,3" line.long 0x04 "ITIMERDIV,DMA Internal Timer Clock Divider Configuration Register" bitfld.long 0x04 8. "CKG,Timer Clock Gating" "0,1" hexmask.long.byte 0x04 0.--7. 1. "DIV,Timer Clock Divider Configuration" rgroup.long ad:0xB0030114++0x03 line.long 0x00 "ITIMERVAL,DMA Internal Timer Value Register" group.long ad:0xB0030800++0x3F line.long 0x00 "REQMUX0,DMA global request select register m (m=0~15)" hexmask.long.byte 0x00 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x04 "REQMUX1,DMA global request select register m (m=0~15)" hexmask.long.byte 0x04 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x08 "REQMUX2,DMA global request select register m (m=0~15)" hexmask.long.byte 0x08 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x0C "REQMUX3,DMA global request select register m (m=0~15)" hexmask.long.byte 0x0C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x10 "REQMUX4,DMA global request select register m (m=0~15)" hexmask.long.byte 0x10 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x14 "REQMUX5,DMA global request select register m (m=0~15)" hexmask.long.byte 0x14 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x18 "REQMUX6,DMA global request select register m (m=0~15)" hexmask.long.byte 0x18 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x1C "REQMUX7,DMA global request select register m (m=0~15)" hexmask.long.byte 0x1C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x20 "REQMUX8,DMA global request select register m (m=0~15)" hexmask.long.byte 0x20 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x24 "REQMUX9,DMA global request select register m (m=0~15)" hexmask.long.byte 0x24 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x28 "REQMUX10,DMA global request select register m (m=0~15)" hexmask.long.byte 0x28 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x2C "REQMUX11,DMA global request select register m (m=0~15)" hexmask.long.byte 0x2C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x30 "REQMUX12,DMA global request select register m (m=0~15)" hexmask.long.byte 0x30 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x34 "REQMUX13,DMA global request select register m (m=0~15)" hexmask.long.byte 0x34 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x38 "REQMUX14,DMA global request select register m (m=0~15)" hexmask.long.byte 0x38 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x3C "REQMUX15,DMA global request select register m (m=0~15)" hexmask.long.byte 0x3C 0.--7. 1. "REQSEL,DMA Global Request Selection" group.long ad:0xB0031000++0x03 line.long 0x00 "C0SRCADDR,Channel n Source Address Register" group.long ad:0xB0031080++0x03 line.long 0x00 "C1SRCADDR,Channel n Source Address Register" group.long ad:0xB0031100++0x03 line.long 0x00 "C2SRCADDR,Channel n Source Address Register" group.long ad:0xB0031180++0x03 line.long 0x00 "C3SRCADDR,Channel n Source Address Register" group.long ad:0xB0031200++0x03 line.long 0x00 "C4SRCADDR,Channel n Source Address Register" group.long ad:0xB0031280++0x03 line.long 0x00 "C5SRCADDR,Channel n Source Address Register" group.long ad:0xB0031300++0x03 line.long 0x00 "C6SRCADDR,Channel n Source Address Register" group.long ad:0xB0031380++0x03 line.long 0x00 "C7SRCADDR,Channel n Source Address Register" group.long ad:0xB0031400++0x03 line.long 0x00 "C8SRCADDR,Channel n Source Address Register" group.long ad:0xB0031480++0x03 line.long 0x00 "C9SRCADDR,Channel n Source Address Register" group.long ad:0xB0031500++0x03 line.long 0x00 "C10SRCADDR,Channel n Source Address Register" group.long ad:0xB0031580++0x03 line.long 0x00 "C11SRCADDR,Channel n Source Address Register" group.long ad:0xB0031600++0x03 line.long 0x00 "C12SRCADDR,Channel n Source Address Register" group.long ad:0xB0031680++0x03 line.long 0x00 "C13SRCADDR,Channel n Source Address Register" group.long ad:0xB0031700++0x03 line.long 0x00 "C14SRCADDR,Channel n Source Address Register" group.long ad:0xB0031780++0x03 line.long 0x00 "C15SRCADDR,Channel n Source Address Register" group.long ad:0xB0031800++0x03 line.long 0x00 "C16SRCADDR,Channel n Source Address Register" group.long ad:0xB0031880++0x03 line.long 0x00 "C17SRCADDR,Channel n Source Address Register" group.long ad:0xB0031900++0x03 line.long 0x00 "C18SRCADDR,Channel n Source Address Register" group.long ad:0xB0031980++0x03 line.long 0x00 "C19SRCADDR,Channel n Source Address Register" group.long ad:0xB0031A00++0x03 line.long 0x00 "C20SRCADDR,Channel n Source Address Register" group.long ad:0xB0031A80++0x03 line.long 0x00 "C21SRCADDR,Channel n Source Address Register" group.long ad:0xB0031B00++0x03 line.long 0x00 "C22SRCADDR,Channel n Source Address Register" group.long ad:0xB0031B80++0x03 line.long 0x00 "C23SRCADDR,Channel n Source Address Register" group.long ad:0xB0031C00++0x03 line.long 0x00 "C24SRCADDR,Channel n Source Address Register" group.long ad:0xB0031C80++0x03 line.long 0x00 "C25SRCADDR,Channel n Source Address Register" group.long ad:0xB0031D00++0x03 line.long 0x00 "C26SRCADDR,Channel n Source Address Register" group.long ad:0xB0031D80++0x03 line.long 0x00 "C27SRCADDR,Channel n Source Address Register" group.long ad:0xB0031E00++0x03 line.long 0x00 "C28SRCADDR,Channel n Source Address Register" group.long ad:0xB0031E80++0x03 line.long 0x00 "C29SRCADDR,Channel n Source Address Register" group.long ad:0xB0031F00++0x03 line.long 0x00 "C30SRCADDR,Channel n Source Address Register" group.long ad:0xB0031F80++0x03 line.long 0x00 "C31SRCADDR,Channel n Source Address Register" group.long ad:0xB0032000++0x03 line.long 0x00 "C32SRCADDR,Channel n Source Address Register" group.long ad:0xB0032080++0x03 line.long 0x00 "C33SRCADDR,Channel n Source Address Register" group.long ad:0xB0032100++0x03 line.long 0x00 "C34SRCADDR,Channel n Source Address Register" group.long ad:0xB0032180++0x03 line.long 0x00 "C35SRCADDR,Channel n Source Address Register" group.long ad:0xB0032200++0x03 line.long 0x00 "C36SRCADDR,Channel n Source Address Register" group.long ad:0xB0032280++0x03 line.long 0x00 "C37SRCADDR,Channel n Source Address Register" group.long ad:0xB0032300++0x03 line.long 0x00 "C38SRCADDR,Channel n Source Address Register" group.long ad:0xB0032380++0x03 line.long 0x00 "C39SRCADDR,Channel n Source Address Register" group.long ad:0xB0031004++0x03 line.long 0x00 "C0DESTADR,Channel n Destination Address Register" group.long ad:0xB0031084++0x03 line.long 0x00 "C1DESTADR,Channel n Destination Address Register" group.long ad:0xB0031104++0x03 line.long 0x00 "C2DESTADR,Channel n Destination Address Register" group.long ad:0xB0031184++0x03 line.long 0x00 "C3DESTADR,Channel n Destination Address Register" group.long ad:0xB0031204++0x03 line.long 0x00 "C4DESTADR,Channel n Destination Address Register" group.long ad:0xB0031284++0x03 line.long 0x00 "C5DESTADR,Channel n Destination Address Register" group.long ad:0xB0031304++0x03 line.long 0x00 "C6DESTADR,Channel n Destination Address Register" group.long ad:0xB0031384++0x03 line.long 0x00 "C7DESTADR,Channel n Destination Address Register" group.long ad:0xB0031404++0x03 line.long 0x00 "C8DESTADR,Channel n Destination Address Register" group.long ad:0xB0031484++0x03 line.long 0x00 "C9DESTADR,Channel n Destination Address Register" group.long ad:0xB0031504++0x03 line.long 0x00 "C10DESTADR,Channel n Destination Address Register" group.long ad:0xB0031584++0x03 line.long 0x00 "C11DESTADR,Channel n Destination Address Register" group.long ad:0xB0031604++0x03 line.long 0x00 "C12DESTADR,Channel n Destination Address Register" group.long ad:0xB0031684++0x03 line.long 0x00 "C13DESTADR,Channel n Destination Address Register" group.long ad:0xB0031704++0x03 line.long 0x00 "C14DESTADR,Channel n Destination Address Register" group.long ad:0xB0031784++0x03 line.long 0x00 "C15DESTADR,Channel n Destination Address Register" group.long ad:0xB0031804++0x03 line.long 0x00 "C16DESTADR,Channel n Destination Address Register" group.long ad:0xB0031884++0x03 line.long 0x00 "C17DESTADR,Channel n Destination Address Register" group.long ad:0xB0031904++0x03 line.long 0x00 "C18DESTADR,Channel n Destination Address Register" group.long ad:0xB0031984++0x03 line.long 0x00 "C19DESTADR,Channel n Destination Address Register" group.long ad:0xB0031A04++0x03 line.long 0x00 "C20DESTADR,Channel n Destination Address Register" group.long ad:0xB0031A84++0x03 line.long 0x00 "C21DESTADR,Channel n Destination Address Register" group.long ad:0xB0031B04++0x03 line.long 0x00 "C22DESTADR,Channel n Destination Address Register" group.long ad:0xB0031B84++0x03 line.long 0x00 "C23DESTADR,Channel n Destination Address Register" group.long ad:0xB0031C04++0x03 line.long 0x00 "C24DESTADR,Channel n Destination Address Register" group.long ad:0xB0031C84++0x03 line.long 0x00 "C25DESTADR,Channel n Destination Address Register" group.long ad:0xB0031D04++0x03 line.long 0x00 "C26DESTADR,Channel n Destination Address Register" group.long ad:0xB0031D84++0x03 line.long 0x00 "C27DESTADR,Channel n Destination Address Register" group.long ad:0xB0031E04++0x03 line.long 0x00 "C28DESTADR,Channel n Destination Address Register" group.long ad:0xB0031E84++0x03 line.long 0x00 "C29DESTADR,Channel n Destination Address Register" group.long ad:0xB0031F04++0x03 line.long 0x00 "C30DESTADR,Channel n Destination Address Register" group.long ad:0xB0031F84++0x03 line.long 0x00 "C31DESTADR,Channel n Destination Address Register" group.long ad:0xB0032004++0x03 line.long 0x00 "C32DESTADR,Channel n Destination Address Register" group.long ad:0xB0032084++0x03 line.long 0x00 "C33DESTADR,Channel n Destination Address Register" group.long ad:0xB0032104++0x03 line.long 0x00 "C34DESTADR,Channel n Destination Address Register" group.long ad:0xB0032184++0x03 line.long 0x00 "C35DESTADR,Channel n Destination Address Register" group.long ad:0xB0032204++0x03 line.long 0x00 "C36DESTADR,Channel n Destination Address Register" group.long ad:0xB0032284++0x03 line.long 0x00 "C37DESTADR,Channel n Destination Address Register" group.long ad:0xB0032304++0x03 line.long 0x00 "C38DESTADR,Channel n Destination Address Register" group.long ad:0xB0032384++0x03 line.long 0x00 "C39DESTADR,Channel n Destination Address Register" group.long ad:0xB0031008++0x03 line.long 0x00 "C0LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031088++0x03 line.long 0x00 "C1LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031108++0x03 line.long 0x00 "C2LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031188++0x03 line.long 0x00 "C3LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031208++0x03 line.long 0x00 "C4LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031288++0x03 line.long 0x00 "C5LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031308++0x03 line.long 0x00 "C6LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031388++0x03 line.long 0x00 "C7LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031408++0x03 line.long 0x00 "C8LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031488++0x03 line.long 0x00 "C9LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031508++0x03 line.long 0x00 "C10LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031588++0x03 line.long 0x00 "C11LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031608++0x03 line.long 0x00 "C12LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031688++0x03 line.long 0x00 "C13LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031708++0x03 line.long 0x00 "C14LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031788++0x03 line.long 0x00 "C15LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031808++0x03 line.long 0x00 "C16LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031888++0x03 line.long 0x00 "C17LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031908++0x03 line.long 0x00 "C18LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031988++0x03 line.long 0x00 "C19LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031A08++0x03 line.long 0x00 "C20LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031A88++0x03 line.long 0x00 "C21LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031B08++0x03 line.long 0x00 "C22LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031B88++0x03 line.long 0x00 "C23LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031C08++0x03 line.long 0x00 "C24LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031C88++0x03 line.long 0x00 "C25LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031D08++0x03 line.long 0x00 "C26LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031D88++0x03 line.long 0x00 "C27LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031E08++0x03 line.long 0x00 "C28LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031E88++0x03 line.long 0x00 "C29LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031F08++0x03 line.long 0x00 "C30LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031F88++0x03 line.long 0x00 "C31LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032008++0x03 line.long 0x00 "C32LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032088++0x03 line.long 0x00 "C33LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032108++0x03 line.long 0x00 "C34LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032188++0x03 line.long 0x00 "C35LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032208++0x03 line.long 0x00 "C36LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032288++0x03 line.long 0x00 "C37LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032308++0x03 line.long 0x00 "C38LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032388++0x03 line.long 0x00 "C39LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB003100C++0x03 line.long 0x00 "C0CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003108C++0x03 line.long 0x00 "C1CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003110C++0x03 line.long 0x00 "C2CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003118C++0x03 line.long 0x00 "C3CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003120C++0x03 line.long 0x00 "C4CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003128C++0x03 line.long 0x00 "C5CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003130C++0x03 line.long 0x00 "C6CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003138C++0x03 line.long 0x00 "C7CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003140C++0x03 line.long 0x00 "C8CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003148C++0x03 line.long 0x00 "C9CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003150C++0x03 line.long 0x00 "C10CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003158C++0x03 line.long 0x00 "C11CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003160C++0x03 line.long 0x00 "C12CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003168C++0x03 line.long 0x00 "C13CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003170C++0x03 line.long 0x00 "C14CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003178C++0x03 line.long 0x00 "C15CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003180C++0x03 line.long 0x00 "C16CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003188C++0x03 line.long 0x00 "C17CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003190C++0x03 line.long 0x00 "C18CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003198C++0x03 line.long 0x00 "C19CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031A0C++0x03 line.long 0x00 "C20CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031A8C++0x03 line.long 0x00 "C21CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031B0C++0x03 line.long 0x00 "C22CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031B8C++0x03 line.long 0x00 "C23CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031C0C++0x03 line.long 0x00 "C24CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031C8C++0x03 line.long 0x00 "C25CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031D0C++0x03 line.long 0x00 "C26CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031D8C++0x03 line.long 0x00 "C27CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031E0C++0x03 line.long 0x00 "C28CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031E8C++0x03 line.long 0x00 "C29CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031F0C++0x03 line.long 0x00 "C30CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031F8C++0x03 line.long 0x00 "C31CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003200C++0x03 line.long 0x00 "C32CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003208C++0x03 line.long 0x00 "C33CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003210C++0x03 line.long 0x00 "C34CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003218C++0x03 line.long 0x00 "C35CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003220C++0x03 line.long 0x00 "C36CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003228C++0x03 line.long 0x00 "C37CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003230C++0x03 line.long 0x00 "C38CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003238C++0x03 line.long 0x00 "C39CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031010++0x03 line.long 0x00 "C0CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031090++0x03 line.long 0x00 "C1CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031110++0x03 line.long 0x00 "C2CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031190++0x03 line.long 0x00 "C3CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031210++0x03 line.long 0x00 "C4CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031290++0x03 line.long 0x00 "C5CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031310++0x03 line.long 0x00 "C6CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031390++0x03 line.long 0x00 "C7CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031410++0x03 line.long 0x00 "C8CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031490++0x03 line.long 0x00 "C9CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031510++0x03 line.long 0x00 "C10CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031590++0x03 line.long 0x00 "C11CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031610++0x03 line.long 0x00 "C12CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031690++0x03 line.long 0x00 "C13CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031710++0x03 line.long 0x00 "C14CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031790++0x03 line.long 0x00 "C15CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031810++0x03 line.long 0x00 "C16CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031890++0x03 line.long 0x00 "C17CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031910++0x03 line.long 0x00 "C18CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031990++0x03 line.long 0x00 "C19CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031A10++0x03 line.long 0x00 "C20CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031A90++0x03 line.long 0x00 "C21CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031B10++0x03 line.long 0x00 "C22CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031B90++0x03 line.long 0x00 "C23CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031C10++0x03 line.long 0x00 "C24CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031C90++0x03 line.long 0x00 "C25CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031D10++0x03 line.long 0x00 "C26CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031D90++0x03 line.long 0x00 "C27CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031E10++0x03 line.long 0x00 "C28CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031E90++0x03 line.long 0x00 "C29CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031F10++0x03 line.long 0x00 "C30CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031F90++0x03 line.long 0x00 "C31CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0032010++0x03 line.long 0x00 "C32CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0032090++0x03 line.long 0x00 "C33CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0032110++0x03 line.long 0x00 "C34CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0032190++0x03 line.long 0x00 "C35CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0032210++0x03 line.long 0x00 "C36CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0032290++0x03 line.long 0x00 "C37CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0032310++0x03 line.long 0x00 "C38CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0032390++0x03 line.long 0x00 "C39CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xB0031014++0x03 line.long 0x00 "C0ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031094++0x03 line.long 0x00 "C1ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031114++0x03 line.long 0x00 "C2ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031194++0x03 line.long 0x00 "C3ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031214++0x03 line.long 0x00 "C4ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031294++0x03 line.long 0x00 "C5ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031314++0x03 line.long 0x00 "C6ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031394++0x03 line.long 0x00 "C7ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031414++0x03 line.long 0x00 "C8ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031494++0x03 line.long 0x00 "C9ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031514++0x03 line.long 0x00 "C10ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031594++0x03 line.long 0x00 "C11ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031614++0x03 line.long 0x00 "C12ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031694++0x03 line.long 0x00 "C13ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031714++0x03 line.long 0x00 "C14ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031794++0x03 line.long 0x00 "C15ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031814++0x03 line.long 0x00 "C16ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031894++0x03 line.long 0x00 "C17ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031914++0x03 line.long 0x00 "C18ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031994++0x03 line.long 0x00 "C19ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031A14++0x03 line.long 0x00 "C20ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031A94++0x03 line.long 0x00 "C21ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031B14++0x03 line.long 0x00 "C22ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031B94++0x03 line.long 0x00 "C23ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031C14++0x03 line.long 0x00 "C24ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031C94++0x03 line.long 0x00 "C25ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031D14++0x03 line.long 0x00 "C26ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031D94++0x03 line.long 0x00 "C27ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031E14++0x03 line.long 0x00 "C28ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031E94++0x03 line.long 0x00 "C29ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031F14++0x03 line.long 0x00 "C30ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031F94++0x03 line.long 0x00 "C31ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0032014++0x03 line.long 0x00 "C32ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0032094++0x03 line.long 0x00 "C33ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0032114++0x03 line.long 0x00 "C34ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0032194++0x03 line.long 0x00 "C35ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0032214++0x03 line.long 0x00 "C36ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0032294++0x03 line.long 0x00 "C37ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0032314++0x03 line.long 0x00 "C38ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0032394++0x03 line.long 0x00 "C39ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xB0031018++0x03 line.long 0x00 "C0PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031098++0x03 line.long 0x00 "C1PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031118++0x03 line.long 0x00 "C2PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031198++0x03 line.long 0x00 "C3PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031218++0x03 line.long 0x00 "C4PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031298++0x03 line.long 0x00 "C5PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031318++0x03 line.long 0x00 "C6PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031398++0x03 line.long 0x00 "C7PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031418++0x03 line.long 0x00 "C8PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031498++0x03 line.long 0x00 "C9PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031518++0x03 line.long 0x00 "C10PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031598++0x03 line.long 0x00 "C11PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031618++0x03 line.long 0x00 "C12PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031698++0x03 line.long 0x00 "C13PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031718++0x03 line.long 0x00 "C14PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031798++0x03 line.long 0x00 "C15PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031818++0x03 line.long 0x00 "C16PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031898++0x03 line.long 0x00 "C17PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031918++0x03 line.long 0x00 "C18PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031998++0x03 line.long 0x00 "C19PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031A18++0x03 line.long 0x00 "C20PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031A98++0x03 line.long 0x00 "C21PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031B18++0x03 line.long 0x00 "C22PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031B98++0x03 line.long 0x00 "C23PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031C18++0x03 line.long 0x00 "C24PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031C98++0x03 line.long 0x00 "C25PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031D18++0x03 line.long 0x00 "C26PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031D98++0x03 line.long 0x00 "C27PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031E18++0x03 line.long 0x00 "C28PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031E98++0x03 line.long 0x00 "C29PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031F18++0x03 line.long 0x00 "C30PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0031F98++0x03 line.long 0x00 "C31PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0032018++0x03 line.long 0x00 "C32PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0032098++0x03 line.long 0x00 "C33PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0032118++0x03 line.long 0x00 "C34PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0032198++0x03 line.long 0x00 "C35PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0032218++0x03 line.long 0x00 "C36PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0032298++0x03 line.long 0x00 "C37PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0032318++0x03 line.long 0x00 "C38PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB0032398++0x03 line.long 0x00 "C39PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xB003101C++0x03 line.long 0x00 "C0SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003109C++0x03 line.long 0x00 "C1SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003111C++0x03 line.long 0x00 "C2SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003119C++0x03 line.long 0x00 "C3SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003121C++0x03 line.long 0x00 "C4SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003129C++0x03 line.long 0x00 "C5SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003131C++0x03 line.long 0x00 "C6SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003139C++0x03 line.long 0x00 "C7SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003141C++0x03 line.long 0x00 "C8SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003149C++0x03 line.long 0x00 "C9SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003151C++0x03 line.long 0x00 "C10SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003159C++0x03 line.long 0x00 "C11SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003161C++0x03 line.long 0x00 "C12SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003169C++0x03 line.long 0x00 "C13SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003171C++0x03 line.long 0x00 "C14SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003179C++0x03 line.long 0x00 "C15SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003181C++0x03 line.long 0x00 "C16SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003189C++0x03 line.long 0x00 "C17SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003191C++0x03 line.long 0x00 "C18SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003199C++0x03 line.long 0x00 "C19SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031A1C++0x03 line.long 0x00 "C20SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031A9C++0x03 line.long 0x00 "C21SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031B1C++0x03 line.long 0x00 "C22SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031B9C++0x03 line.long 0x00 "C23SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031C1C++0x03 line.long 0x00 "C24SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031C9C++0x03 line.long 0x00 "C25SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031D1C++0x03 line.long 0x00 "C26SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031D9C++0x03 line.long 0x00 "C27SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031E1C++0x03 line.long 0x00 "C28SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031E9C++0x03 line.long 0x00 "C29SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031F1C++0x03 line.long 0x00 "C30SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031F9C++0x03 line.long 0x00 "C31SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003201C++0x03 line.long 0x00 "C32SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003209C++0x03 line.long 0x00 "C33SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003211C++0x03 line.long 0x00 "C34SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003219C++0x03 line.long 0x00 "C35SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003221C++0x03 line.long 0x00 "C36SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003229C++0x03 line.long 0x00 "C37SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003231C++0x03 line.long 0x00 "C38SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB003239C++0x03 line.long 0x00 "C39SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xB0031020++0x03 line.long 0x00 "C0DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00310A0++0x03 line.long 0x00 "C1DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031120++0x03 line.long 0x00 "C2DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00311A0++0x03 line.long 0x00 "C3DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031220++0x03 line.long 0x00 "C4DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00312A0++0x03 line.long 0x00 "C5DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031320++0x03 line.long 0x00 "C6DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00313A0++0x03 line.long 0x00 "C7DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031420++0x03 line.long 0x00 "C8DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00314A0++0x03 line.long 0x00 "C9DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031520++0x03 line.long 0x00 "C10DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00315A0++0x03 line.long 0x00 "C11DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031620++0x03 line.long 0x00 "C12DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00316A0++0x03 line.long 0x00 "C13DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031720++0x03 line.long 0x00 "C14DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00317A0++0x03 line.long 0x00 "C15DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031820++0x03 line.long 0x00 "C16DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00318A0++0x03 line.long 0x00 "C17DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031920++0x03 line.long 0x00 "C18DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00319A0++0x03 line.long 0x00 "C19DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031A20++0x03 line.long 0x00 "C20DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031AA0++0x03 line.long 0x00 "C21DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031B20++0x03 line.long 0x00 "C22DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031BA0++0x03 line.long 0x00 "C23DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031C20++0x03 line.long 0x00 "C24DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031CA0++0x03 line.long 0x00 "C25DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031D20++0x03 line.long 0x00 "C26DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031DA0++0x03 line.long 0x00 "C27DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031E20++0x03 line.long 0x00 "C28DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031EA0++0x03 line.long 0x00 "C29DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031F20++0x03 line.long 0x00 "C30DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031FA0++0x03 line.long 0x00 "C31DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0032020++0x03 line.long 0x00 "C32DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00320A0++0x03 line.long 0x00 "C33DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0032120++0x03 line.long 0x00 "C34DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00321A0++0x03 line.long 0x00 "C35DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0032220++0x03 line.long 0x00 "C36DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00322A0++0x03 line.long 0x00 "C37DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0032320++0x03 line.long 0x00 "C38DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB00323A0++0x03 line.long 0x00 "C39DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xB0031024++0x03 line.long 0x00 "C0LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00310A4++0x03 line.long 0x00 "C1LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031124++0x03 line.long 0x00 "C2LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00311A4++0x03 line.long 0x00 "C3LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031224++0x03 line.long 0x00 "C4LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00312A4++0x03 line.long 0x00 "C5LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031324++0x03 line.long 0x00 "C6LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00313A4++0x03 line.long 0x00 "C7LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031424++0x03 line.long 0x00 "C8LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00314A4++0x03 line.long 0x00 "C9LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031524++0x03 line.long 0x00 "C10LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00315A4++0x03 line.long 0x00 "C11LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031624++0x03 line.long 0x00 "C12LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00316A4++0x03 line.long 0x00 "C13LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031724++0x03 line.long 0x00 "C14LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00317A4++0x03 line.long 0x00 "C15LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031824++0x03 line.long 0x00 "C16LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00318A4++0x03 line.long 0x00 "C17LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031924++0x03 line.long 0x00 "C18LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00319A4++0x03 line.long 0x00 "C19LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031A24++0x03 line.long 0x00 "C20LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031AA4++0x03 line.long 0x00 "C21LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031B24++0x03 line.long 0x00 "C22LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031BA4++0x03 line.long 0x00 "C23LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031C24++0x03 line.long 0x00 "C24LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031CA4++0x03 line.long 0x00 "C25LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031D24++0x03 line.long 0x00 "C26LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031DA4++0x03 line.long 0x00 "C27LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031E24++0x03 line.long 0x00 "C28LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031EA4++0x03 line.long 0x00 "C29LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031F24++0x03 line.long 0x00 "C30LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031FA4++0x03 line.long 0x00 "C31LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032024++0x03 line.long 0x00 "C32LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00320A4++0x03 line.long 0x00 "C33LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032124++0x03 line.long 0x00 "C34LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00321A4++0x03 line.long 0x00 "C35LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032224++0x03 line.long 0x00 "C36LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00322A4++0x03 line.long 0x00 "C37LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0032324++0x03 line.long 0x00 "C38LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB00323A4++0x03 line.long 0x00 "C39LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xB0031028++0x03 line.long 0x00 "C0CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00310A8++0x03 line.long 0x00 "C1CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031128++0x03 line.long 0x00 "C2CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00311A8++0x03 line.long 0x00 "C3CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031228++0x03 line.long 0x00 "C4CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00312A8++0x03 line.long 0x00 "C5CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031328++0x03 line.long 0x00 "C6CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00313A8++0x03 line.long 0x00 "C7CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031428++0x03 line.long 0x00 "C8CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00314A8++0x03 line.long 0x00 "C9CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031528++0x03 line.long 0x00 "C10CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00315A8++0x03 line.long 0x00 "C11CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031628++0x03 line.long 0x00 "C12CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00316A8++0x03 line.long 0x00 "C13CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031728++0x03 line.long 0x00 "C14CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00317A8++0x03 line.long 0x00 "C15CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031828++0x03 line.long 0x00 "C16CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00318A8++0x03 line.long 0x00 "C17CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031928++0x03 line.long 0x00 "C18CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00319A8++0x03 line.long 0x00 "C19CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031A28++0x03 line.long 0x00 "C20CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031AA8++0x03 line.long 0x00 "C21CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031B28++0x03 line.long 0x00 "C22CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031BA8++0x03 line.long 0x00 "C23CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031C28++0x03 line.long 0x00 "C24CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031CA8++0x03 line.long 0x00 "C25CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031D28++0x03 line.long 0x00 "C26CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031DA8++0x03 line.long 0x00 "C27CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031E28++0x03 line.long 0x00 "C28CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031EA8++0x03 line.long 0x00 "C29CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031F28++0x03 line.long 0x00 "C30CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0031FA8++0x03 line.long 0x00 "C31CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0032028++0x03 line.long 0x00 "C32CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00320A8++0x03 line.long 0x00 "C33CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0032128++0x03 line.long 0x00 "C34CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00321A8++0x03 line.long 0x00 "C35CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0032228++0x03 line.long 0x00 "C36CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00322A8++0x03 line.long 0x00 "C37CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB0032328++0x03 line.long 0x00 "C38CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB00323A8++0x03 line.long 0x00 "C39CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xB003102C++0x03 line.long 0x00 "C0SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00310AC++0x03 line.long 0x00 "C1SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003112C++0x03 line.long 0x00 "C2SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00311AC++0x03 line.long 0x00 "C3SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003122C++0x03 line.long 0x00 "C4SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00312AC++0x03 line.long 0x00 "C5SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003132C++0x03 line.long 0x00 "C6SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00313AC++0x03 line.long 0x00 "C7SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003142C++0x03 line.long 0x00 "C8SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00314AC++0x03 line.long 0x00 "C9SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003152C++0x03 line.long 0x00 "C10SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00315AC++0x03 line.long 0x00 "C11SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003162C++0x03 line.long 0x00 "C12SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00316AC++0x03 line.long 0x00 "C13SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003172C++0x03 line.long 0x00 "C14SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00317AC++0x03 line.long 0x00 "C15SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003182C++0x03 line.long 0x00 "C16SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00318AC++0x03 line.long 0x00 "C17SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003192C++0x03 line.long 0x00 "C18SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00319AC++0x03 line.long 0x00 "C19SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031A2C++0x03 line.long 0x00 "C20SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031AAC++0x03 line.long 0x00 "C21SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031B2C++0x03 line.long 0x00 "C22SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031BAC++0x03 line.long 0x00 "C23SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031C2C++0x03 line.long 0x00 "C24SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031CAC++0x03 line.long 0x00 "C25SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031D2C++0x03 line.long 0x00 "C26SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031DAC++0x03 line.long 0x00 "C27SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031E2C++0x03 line.long 0x00 "C28SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031EAC++0x03 line.long 0x00 "C29SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031F2C++0x03 line.long 0x00 "C30SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB0031FAC++0x03 line.long 0x00 "C31SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003202C++0x03 line.long 0x00 "C32SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00320AC++0x03 line.long 0x00 "C33SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003212C++0x03 line.long 0x00 "C34SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00321AC++0x03 line.long 0x00 "C35SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003222C++0x03 line.long 0x00 "C36SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00322AC++0x03 line.long 0x00 "C37SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB003232C++0x03 line.long 0x00 "C38SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xB00323AC++0x03 line.long 0x00 "C39SWADDR,Channel n Double Buffer Switch Address Register" wgroup.long ad:0xB0031030++0x03 line.long 0x00 "C0DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00310B0++0x03 line.long 0x00 "C1DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031130++0x03 line.long 0x00 "C2DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00311B0++0x03 line.long 0x00 "C3DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031230++0x03 line.long 0x00 "C4DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00312B0++0x03 line.long 0x00 "C5DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031330++0x03 line.long 0x00 "C6DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00313B0++0x03 line.long 0x00 "C7DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031430++0x03 line.long 0x00 "C8DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00314B0++0x03 line.long 0x00 "C9DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031530++0x03 line.long 0x00 "C10DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00315B0++0x03 line.long 0x00 "C11DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031630++0x03 line.long 0x00 "C12DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00316B0++0x03 line.long 0x00 "C13DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031730++0x03 line.long 0x00 "C14DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00317B0++0x03 line.long 0x00 "C15DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031830++0x03 line.long 0x00 "C16DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00318B0++0x03 line.long 0x00 "C17DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031930++0x03 line.long 0x00 "C18DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00319B0++0x03 line.long 0x00 "C19DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031A30++0x03 line.long 0x00 "C20DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031AB0++0x03 line.long 0x00 "C21DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031B30++0x03 line.long 0x00 "C22DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031BB0++0x03 line.long 0x00 "C23DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031C30++0x03 line.long 0x00 "C24DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031CB0++0x03 line.long 0x00 "C25DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031D30++0x03 line.long 0x00 "C26DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031DB0++0x03 line.long 0x00 "C27DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031E30++0x03 line.long 0x00 "C28DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031EB0++0x03 line.long 0x00 "C29DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031F30++0x03 line.long 0x00 "C30DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0031FB0++0x03 line.long 0x00 "C31DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0032030++0x03 line.long 0x00 "C32DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00320B0++0x03 line.long 0x00 "C33DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0032130++0x03 line.long 0x00 "C34DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00321B0++0x03 line.long 0x00 "C35DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0032230++0x03 line.long 0x00 "C36DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00322B0++0x03 line.long 0x00 "C37DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB0032330++0x03 line.long 0x00 "C38DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xB00323B0++0x03 line.long 0x00 "C39DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" group.long ad:0xB0031034++0x03 line.long 0x00 "C0DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00310B4++0x03 line.long 0x00 "C1DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031134++0x03 line.long 0x00 "C2DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00311B4++0x03 line.long 0x00 "C3DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031234++0x03 line.long 0x00 "C4DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00312B4++0x03 line.long 0x00 "C5DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031334++0x03 line.long 0x00 "C6DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00313B4++0x03 line.long 0x00 "C7DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031434++0x03 line.long 0x00 "C8DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00314B4++0x03 line.long 0x00 "C9DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031534++0x03 line.long 0x00 "C10DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00315B4++0x03 line.long 0x00 "C11DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031634++0x03 line.long 0x00 "C12DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00316B4++0x03 line.long 0x00 "C13DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031734++0x03 line.long 0x00 "C14DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00317B4++0x03 line.long 0x00 "C15DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031834++0x03 line.long 0x00 "C16DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00318B4++0x03 line.long 0x00 "C17DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031934++0x03 line.long 0x00 "C18DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00319B4++0x03 line.long 0x00 "C19DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031A34++0x03 line.long 0x00 "C20DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031AB4++0x03 line.long 0x00 "C21DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031B34++0x03 line.long 0x00 "C22DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031BB4++0x03 line.long 0x00 "C23DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031C34++0x03 line.long 0x00 "C24DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031CB4++0x03 line.long 0x00 "C25DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031D34++0x03 line.long 0x00 "C26DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031DB4++0x03 line.long 0x00 "C27DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031E34++0x03 line.long 0x00 "C28DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031EB4++0x03 line.long 0x00 "C29DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031F34++0x03 line.long 0x00 "C30DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031FB4++0x03 line.long 0x00 "C31DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0032034++0x03 line.long 0x00 "C32DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00320B4++0x03 line.long 0x00 "C33DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0032134++0x03 line.long 0x00 "C34DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00321B4++0x03 line.long 0x00 "C35DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0032234++0x03 line.long 0x00 "C36DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00322B4++0x03 line.long 0x00 "C37DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0032334++0x03 line.long 0x00 "C38DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB00323B4++0x03 line.long 0x00 "C39DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xB0031038++0x03 line.long 0x00 "C0PAT,Channel n Data Match Pattern Register" group.long ad:0xB00310B8++0x03 line.long 0x00 "C1PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031138++0x03 line.long 0x00 "C2PAT,Channel n Data Match Pattern Register" group.long ad:0xB00311B8++0x03 line.long 0x00 "C3PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031238++0x03 line.long 0x00 "C4PAT,Channel n Data Match Pattern Register" group.long ad:0xB00312B8++0x03 line.long 0x00 "C5PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031338++0x03 line.long 0x00 "C6PAT,Channel n Data Match Pattern Register" group.long ad:0xB00313B8++0x03 line.long 0x00 "C7PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031438++0x03 line.long 0x00 "C8PAT,Channel n Data Match Pattern Register" group.long ad:0xB00314B8++0x03 line.long 0x00 "C9PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031538++0x03 line.long 0x00 "C10PAT,Channel n Data Match Pattern Register" group.long ad:0xB00315B8++0x03 line.long 0x00 "C11PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031638++0x03 line.long 0x00 "C12PAT,Channel n Data Match Pattern Register" group.long ad:0xB00316B8++0x03 line.long 0x00 "C13PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031738++0x03 line.long 0x00 "C14PAT,Channel n Data Match Pattern Register" group.long ad:0xB00317B8++0x03 line.long 0x00 "C15PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031838++0x03 line.long 0x00 "C16PAT,Channel n Data Match Pattern Register" group.long ad:0xB00318B8++0x03 line.long 0x00 "C17PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031938++0x03 line.long 0x00 "C18PAT,Channel n Data Match Pattern Register" group.long ad:0xB00319B8++0x03 line.long 0x00 "C19PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031A38++0x03 line.long 0x00 "C20PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031AB8++0x03 line.long 0x00 "C21PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031B38++0x03 line.long 0x00 "C22PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031BB8++0x03 line.long 0x00 "C23PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031C38++0x03 line.long 0x00 "C24PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031CB8++0x03 line.long 0x00 "C25PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031D38++0x03 line.long 0x00 "C26PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031DB8++0x03 line.long 0x00 "C27PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031E38++0x03 line.long 0x00 "C28PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031EB8++0x03 line.long 0x00 "C29PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031F38++0x03 line.long 0x00 "C30PAT,Channel n Data Match Pattern Register" group.long ad:0xB0031FB8++0x03 line.long 0x00 "C31PAT,Channel n Data Match Pattern Register" group.long ad:0xB0032038++0x03 line.long 0x00 "C32PAT,Channel n Data Match Pattern Register" group.long ad:0xB00320B8++0x03 line.long 0x00 "C33PAT,Channel n Data Match Pattern Register" group.long ad:0xB0032138++0x03 line.long 0x00 "C34PAT,Channel n Data Match Pattern Register" group.long ad:0xB00321B8++0x03 line.long 0x00 "C35PAT,Channel n Data Match Pattern Register" group.long ad:0xB0032238++0x03 line.long 0x00 "C36PAT,Channel n Data Match Pattern Register" group.long ad:0xB00322B8++0x03 line.long 0x00 "C37PAT,Channel n Data Match Pattern Register" group.long ad:0xB0032338++0x03 line.long 0x00 "C38PAT,Channel n Data Match Pattern Register" group.long ad:0xB00323B8++0x03 line.long 0x00 "C39PAT,Channel n Data Match Pattern Register" group.long ad:0xB003103C++0x03 line.long 0x00 "C0PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00310BC++0x03 line.long 0x00 "C1PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003113C++0x03 line.long 0x00 "C2PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00311BC++0x03 line.long 0x00 "C3PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003123C++0x03 line.long 0x00 "C4PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00312BC++0x03 line.long 0x00 "C5PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003133C++0x03 line.long 0x00 "C6PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00313BC++0x03 line.long 0x00 "C7PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003143C++0x03 line.long 0x00 "C8PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00314BC++0x03 line.long 0x00 "C9PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003153C++0x03 line.long 0x00 "C10PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00315BC++0x03 line.long 0x00 "C11PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003163C++0x03 line.long 0x00 "C12PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00316BC++0x03 line.long 0x00 "C13PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003173C++0x03 line.long 0x00 "C14PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00317BC++0x03 line.long 0x00 "C15PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003183C++0x03 line.long 0x00 "C16PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00318BC++0x03 line.long 0x00 "C17PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003193C++0x03 line.long 0x00 "C18PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00319BC++0x03 line.long 0x00 "C19PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031A3C++0x03 line.long 0x00 "C20PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031ABC++0x03 line.long 0x00 "C21PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031B3C++0x03 line.long 0x00 "C22PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031BBC++0x03 line.long 0x00 "C23PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031C3C++0x03 line.long 0x00 "C24PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031CBC++0x03 line.long 0x00 "C25PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031D3C++0x03 line.long 0x00 "C26PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031DBC++0x03 line.long 0x00 "C27PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031E3C++0x03 line.long 0x00 "C28PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031EBC++0x03 line.long 0x00 "C29PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031F3C++0x03 line.long 0x00 "C30PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB0031FBC++0x03 line.long 0x00 "C31PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003203C++0x03 line.long 0x00 "C32PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00320BC++0x03 line.long 0x00 "C33PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003213C++0x03 line.long 0x00 "C34PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00321BC++0x03 line.long 0x00 "C35PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003223C++0x03 line.long 0x00 "C36PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00322BC++0x03 line.long 0x00 "C37PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB003233C++0x03 line.long 0x00 "C38PATMSK,Channel n Data Match Pattern Register" group.long ad:0xB00323BC++0x03 line.long 0x00 "C39PATMSK,Channel n Data Match Pattern Register" rgroup.long ad:0xB0031040++0x03 line.long 0x00 "C0INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00310C0++0x03 line.long 0x00 "C1INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031140++0x03 line.long 0x00 "C2INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00311C0++0x03 line.long 0x00 "C3INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031240++0x03 line.long 0x00 "C4INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00312C0++0x03 line.long 0x00 "C5INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031340++0x03 line.long 0x00 "C6INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00313C0++0x03 line.long 0x00 "C7INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031440++0x03 line.long 0x00 "C8INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00314C0++0x03 line.long 0x00 "C9INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031540++0x03 line.long 0x00 "C10INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00315C0++0x03 line.long 0x00 "C11INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031640++0x03 line.long 0x00 "C12INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00316C0++0x03 line.long 0x00 "C13INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031740++0x03 line.long 0x00 "C14INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00317C0++0x03 line.long 0x00 "C15INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031840++0x03 line.long 0x00 "C16INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00318C0++0x03 line.long 0x00 "C17INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031940++0x03 line.long 0x00 "C18INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00319C0++0x03 line.long 0x00 "C19INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031A40++0x03 line.long 0x00 "C20INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031AC0++0x03 line.long 0x00 "C21INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031B40++0x03 line.long 0x00 "C22INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031BC0++0x03 line.long 0x00 "C23INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031C40++0x03 line.long 0x00 "C24INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031CC0++0x03 line.long 0x00 "C25INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031D40++0x03 line.long 0x00 "C26INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031DC0++0x03 line.long 0x00 "C27INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031E40++0x03 line.long 0x00 "C28INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031EC0++0x03 line.long 0x00 "C29INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031F40++0x03 line.long 0x00 "C30INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031FC0++0x03 line.long 0x00 "C31INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0032040++0x03 line.long 0x00 "C32INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00320C0++0x03 line.long 0x00 "C33INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0032140++0x03 line.long 0x00 "C34INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00321C0++0x03 line.long 0x00 "C35INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0032240++0x03 line.long 0x00 "C36INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00322C0++0x03 line.long 0x00 "C37INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0032340++0x03 line.long 0x00 "C38INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB00323C0++0x03 line.long 0x00 "C39INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xB0031044++0x03 line.long 0x00 "C0RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00310C4++0x03 line.long 0x00 "C1RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031144++0x03 line.long 0x00 "C2RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00311C4++0x03 line.long 0x00 "C3RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031244++0x03 line.long 0x00 "C4RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00312C4++0x03 line.long 0x00 "C5RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031344++0x03 line.long 0x00 "C6RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00313C4++0x03 line.long 0x00 "C7RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031444++0x03 line.long 0x00 "C8RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00314C4++0x03 line.long 0x00 "C9RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031544++0x03 line.long 0x00 "C10RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00315C4++0x03 line.long 0x00 "C11RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031644++0x03 line.long 0x00 "C12RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00316C4++0x03 line.long 0x00 "C13RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031744++0x03 line.long 0x00 "C14RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00317C4++0x03 line.long 0x00 "C15RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031844++0x03 line.long 0x00 "C16RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00318C4++0x03 line.long 0x00 "C17RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031944++0x03 line.long 0x00 "C18RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00319C4++0x03 line.long 0x00 "C19RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031A44++0x03 line.long 0x00 "C20RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031AC4++0x03 line.long 0x00 "C21RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031B44++0x03 line.long 0x00 "C22RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031BC4++0x03 line.long 0x00 "C23RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031C44++0x03 line.long 0x00 "C24RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031CC4++0x03 line.long 0x00 "C25RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031D44++0x03 line.long 0x00 "C26RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031DC4++0x03 line.long 0x00 "C27RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031E44++0x03 line.long 0x00 "C28RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031EC4++0x03 line.long 0x00 "C29RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031F44++0x03 line.long 0x00 "C30RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0031FC4++0x03 line.long 0x00 "C31RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0032044++0x03 line.long 0x00 "C32RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00320C4++0x03 line.long 0x00 "C33RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0032144++0x03 line.long 0x00 "C34RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00321C4++0x03 line.long 0x00 "C35RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0032244++0x03 line.long 0x00 "C36RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00322C4++0x03 line.long 0x00 "C37RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB0032344++0x03 line.long 0x00 "C38RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xB00323C4++0x03 line.long 0x00 "C39RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" wgroup.long ad:0xB0031048++0x03 line.long 0x00 "C0INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00310C8++0x03 line.long 0x00 "C1INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031148++0x03 line.long 0x00 "C2INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00311C8++0x03 line.long 0x00 "C3INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031248++0x03 line.long 0x00 "C4INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00312C8++0x03 line.long 0x00 "C5INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031348++0x03 line.long 0x00 "C6INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00313C8++0x03 line.long 0x00 "C7INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031448++0x03 line.long 0x00 "C8INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00314C8++0x03 line.long 0x00 "C9INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031548++0x03 line.long 0x00 "C10INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00315C8++0x03 line.long 0x00 "C11INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031648++0x03 line.long 0x00 "C12INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00316C8++0x03 line.long 0x00 "C13INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031748++0x03 line.long 0x00 "C14INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00317C8++0x03 line.long 0x00 "C15INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031848++0x03 line.long 0x00 "C16INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00318C8++0x03 line.long 0x00 "C17INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031948++0x03 line.long 0x00 "C18INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00319C8++0x03 line.long 0x00 "C19INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031A48++0x03 line.long 0x00 "C20INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031AC8++0x03 line.long 0x00 "C21INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031B48++0x03 line.long 0x00 "C22INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031BC8++0x03 line.long 0x00 "C23INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031C48++0x03 line.long 0x00 "C24INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031CC8++0x03 line.long 0x00 "C25INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031D48++0x03 line.long 0x00 "C26INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031DC8++0x03 line.long 0x00 "C27INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031E48++0x03 line.long 0x00 "C28INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031EC8++0x03 line.long 0x00 "C29INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031F48++0x03 line.long 0x00 "C30INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0031FC8++0x03 line.long 0x00 "C31INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0032048++0x03 line.long 0x00 "C32INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00320C8++0x03 line.long 0x00 "C33INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0032148++0x03 line.long 0x00 "C34INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00321C8++0x03 line.long 0x00 "C35INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0032248++0x03 line.long 0x00 "C36INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00322C8++0x03 line.long 0x00 "C37INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB0032348++0x03 line.long 0x00 "C38INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB00323C8++0x03 line.long 0x00 "C39INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xB003104C++0x03 line.long 0x00 "C0ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00310CC++0x03 line.long 0x00 "C1ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003114C++0x03 line.long 0x00 "C2ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00311CC++0x03 line.long 0x00 "C3ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003124C++0x03 line.long 0x00 "C4ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00312CC++0x03 line.long 0x00 "C5ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003134C++0x03 line.long 0x00 "C6ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00313CC++0x03 line.long 0x00 "C7ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003144C++0x03 line.long 0x00 "C8ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00314CC++0x03 line.long 0x00 "C9ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003154C++0x03 line.long 0x00 "C10ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00315CC++0x03 line.long 0x00 "C11ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003164C++0x03 line.long 0x00 "C12ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00316CC++0x03 line.long 0x00 "C13ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003174C++0x03 line.long 0x00 "C14ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00317CC++0x03 line.long 0x00 "C15ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003184C++0x03 line.long 0x00 "C16ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00318CC++0x03 line.long 0x00 "C17ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003194C++0x03 line.long 0x00 "C18ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00319CC++0x03 line.long 0x00 "C19ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031A4C++0x03 line.long 0x00 "C20ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031ACC++0x03 line.long 0x00 "C21ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031B4C++0x03 line.long 0x00 "C22ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031BCC++0x03 line.long 0x00 "C23ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031C4C++0x03 line.long 0x00 "C24ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031CCC++0x03 line.long 0x00 "C25ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031D4C++0x03 line.long 0x00 "C26ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031DCC++0x03 line.long 0x00 "C27ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031E4C++0x03 line.long 0x00 "C28ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031ECC++0x03 line.long 0x00 "C29ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031F4C++0x03 line.long 0x00 "C30ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB0031FCC++0x03 line.long 0x00 "C31ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003204C++0x03 line.long 0x00 "C32ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00320CC++0x03 line.long 0x00 "C33ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003214C++0x03 line.long 0x00 "C34ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00321CC++0x03 line.long 0x00 "C35ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003224C++0x03 line.long 0x00 "C36ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00322CC++0x03 line.long 0x00 "C37ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB003234C++0x03 line.long 0x00 "C38ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xB00323CC++0x03 line.long 0x00 "C39ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" rgroup.long ad:0xB0031050++0x03 line.long 0x00 "C0STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00310D0++0x03 line.long 0x00 "C1STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031150++0x03 line.long 0x00 "C2STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00311D0++0x03 line.long 0x00 "C3STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031250++0x03 line.long 0x00 "C4STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00312D0++0x03 line.long 0x00 "C5STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031350++0x03 line.long 0x00 "C6STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00313D0++0x03 line.long 0x00 "C7STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031450++0x03 line.long 0x00 "C8STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00314D0++0x03 line.long 0x00 "C9STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031550++0x03 line.long 0x00 "C10STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00315D0++0x03 line.long 0x00 "C11STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031650++0x03 line.long 0x00 "C12STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00316D0++0x03 line.long 0x00 "C13STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031750++0x03 line.long 0x00 "C14STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00317D0++0x03 line.long 0x00 "C15STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031850++0x03 line.long 0x00 "C16STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00318D0++0x03 line.long 0x00 "C17STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031950++0x03 line.long 0x00 "C18STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00319D0++0x03 line.long 0x00 "C19STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031A50++0x03 line.long 0x00 "C20STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031AD0++0x03 line.long 0x00 "C21STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031B50++0x03 line.long 0x00 "C22STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031BD0++0x03 line.long 0x00 "C23STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031C50++0x03 line.long 0x00 "C24STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031CD0++0x03 line.long 0x00 "C25STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031D50++0x03 line.long 0x00 "C26STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031DD0++0x03 line.long 0x00 "C27STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031E50++0x03 line.long 0x00 "C28STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031ED0++0x03 line.long 0x00 "C29STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031F50++0x03 line.long 0x00 "C30STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031FD0++0x03 line.long 0x00 "C31STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0032050++0x03 line.long 0x00 "C32STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00320D0++0x03 line.long 0x00 "C33STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0032150++0x03 line.long 0x00 "C34STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00321D0++0x03 line.long 0x00 "C35STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0032250++0x03 line.long 0x00 "C36STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00322D0++0x03 line.long 0x00 "C37STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0032350++0x03 line.long 0x00 "C38STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB00323D0++0x03 line.long 0x00 "C39STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xB0031054++0x03 line.long 0x00 "C0EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00310D4++0x03 line.long 0x00 "C1EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031154++0x03 line.long 0x00 "C2EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00311D4++0x03 line.long 0x00 "C3EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031254++0x03 line.long 0x00 "C4EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00312D4++0x03 line.long 0x00 "C5EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031354++0x03 line.long 0x00 "C6EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00313D4++0x03 line.long 0x00 "C7EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031454++0x03 line.long 0x00 "C8EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00314D4++0x03 line.long 0x00 "C9EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031554++0x03 line.long 0x00 "C10EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00315D4++0x03 line.long 0x00 "C11EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031654++0x03 line.long 0x00 "C12EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00316D4++0x03 line.long 0x00 "C13EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031754++0x03 line.long 0x00 "C14EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00317D4++0x03 line.long 0x00 "C15EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031854++0x03 line.long 0x00 "C16EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00318D4++0x03 line.long 0x00 "C17EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031954++0x03 line.long 0x00 "C18EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00319D4++0x03 line.long 0x00 "C19EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031A54++0x03 line.long 0x00 "C20EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031AD4++0x03 line.long 0x00 "C21EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031B54++0x03 line.long 0x00 "C22EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031BD4++0x03 line.long 0x00 "C23EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031C54++0x03 line.long 0x00 "C24EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031CD4++0x03 line.long 0x00 "C25EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031D54++0x03 line.long 0x00 "C26EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031DD4++0x03 line.long 0x00 "C27EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031E54++0x03 line.long 0x00 "C28EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031ED4++0x03 line.long 0x00 "C29EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031F54++0x03 line.long 0x00 "C30EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031FD4++0x03 line.long 0x00 "C31EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0032054++0x03 line.long 0x00 "C32EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00320D4++0x03 line.long 0x00 "C33EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0032154++0x03 line.long 0x00 "C34EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00321D4++0x03 line.long 0x00 "C35EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0032254++0x03 line.long 0x00 "C36EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00322D4++0x03 line.long 0x00 "C37EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0032354++0x03 line.long 0x00 "C38EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB00323D4++0x03 line.long 0x00 "C39EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xB0031058++0x03 line.long 0x00 "C0TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00310D8++0x03 line.long 0x00 "C1TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031158++0x03 line.long 0x00 "C2TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00311D8++0x03 line.long 0x00 "C3TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031258++0x03 line.long 0x00 "C4TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00312D8++0x03 line.long 0x00 "C5TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031358++0x03 line.long 0x00 "C6TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00313D8++0x03 line.long 0x00 "C7TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031458++0x03 line.long 0x00 "C8TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00314D8++0x03 line.long 0x00 "C9TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031558++0x03 line.long 0x00 "C10TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00315D8++0x03 line.long 0x00 "C11TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031658++0x03 line.long 0x00 "C12TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00316D8++0x03 line.long 0x00 "C13TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031758++0x03 line.long 0x00 "C14TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00317D8++0x03 line.long 0x00 "C15TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031858++0x03 line.long 0x00 "C16TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00318D8++0x03 line.long 0x00 "C17TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031958++0x03 line.long 0x00 "C18TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00319D8++0x03 line.long 0x00 "C19TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031A58++0x03 line.long 0x00 "C20TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031AD8++0x03 line.long 0x00 "C21TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031B58++0x03 line.long 0x00 "C22TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031BD8++0x03 line.long 0x00 "C23TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031C58++0x03 line.long 0x00 "C24TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031CD8++0x03 line.long 0x00 "C25TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031D58++0x03 line.long 0x00 "C26TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031DD8++0x03 line.long 0x00 "C27TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031E58++0x03 line.long 0x00 "C28TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031ED8++0x03 line.long 0x00 "C29TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031F58++0x03 line.long 0x00 "C30TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0031FD8++0x03 line.long 0x00 "C31TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0032058++0x03 line.long 0x00 "C32TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00320D8++0x03 line.long 0x00 "C33TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0032158++0x03 line.long 0x00 "C34TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00321D8++0x03 line.long 0x00 "C35TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0032258++0x03 line.long 0x00 "C36TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00322D8++0x03 line.long 0x00 "C37TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB0032358++0x03 line.long 0x00 "C38TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xB00323D8++0x03 line.long 0x00 "C39TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" wgroup.long ad:0xB003105C++0x03 line.long 0x00 "C0TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00310DC++0x03 line.long 0x00 "C1TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003115C++0x03 line.long 0x00 "C2TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00311DC++0x03 line.long 0x00 "C3TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003125C++0x03 line.long 0x00 "C4TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00312DC++0x03 line.long 0x00 "C5TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003135C++0x03 line.long 0x00 "C6TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00313DC++0x03 line.long 0x00 "C7TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003145C++0x03 line.long 0x00 "C8TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00314DC++0x03 line.long 0x00 "C9TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003155C++0x03 line.long 0x00 "C10TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00315DC++0x03 line.long 0x00 "C11TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003165C++0x03 line.long 0x00 "C12TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00316DC++0x03 line.long 0x00 "C13TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003175C++0x03 line.long 0x00 "C14TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00317DC++0x03 line.long 0x00 "C15TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003185C++0x03 line.long 0x00 "C16TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00318DC++0x03 line.long 0x00 "C17TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003195C++0x03 line.long 0x00 "C18TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00319DC++0x03 line.long 0x00 "C19TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031A5C++0x03 line.long 0x00 "C20TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031ADC++0x03 line.long 0x00 "C21TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031B5C++0x03 line.long 0x00 "C22TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031BDC++0x03 line.long 0x00 "C23TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031C5C++0x03 line.long 0x00 "C24TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031CDC++0x03 line.long 0x00 "C25TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031D5C++0x03 line.long 0x00 "C26TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031DDC++0x03 line.long 0x00 "C27TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031E5C++0x03 line.long 0x00 "C28TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031EDC++0x03 line.long 0x00 "C29TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031F5C++0x03 line.long 0x00 "C30TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB0031FDC++0x03 line.long 0x00 "C31TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003205C++0x03 line.long 0x00 "C32TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00320DC++0x03 line.long 0x00 "C33TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003215C++0x03 line.long 0x00 "C34TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00321DC++0x03 line.long 0x00 "C35TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003225C++0x03 line.long 0x00 "C36TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00322DC++0x03 line.long 0x00 "C37TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB003235C++0x03 line.long 0x00 "C38TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xB00323DC++0x03 line.long 0x00 "C39TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" group.long ad:0xB0031060++0x03 line.long 0x00 "C0CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00310E0++0x03 line.long 0x00 "C1CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031160++0x03 line.long 0x00 "C2CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00311E0++0x03 line.long 0x00 "C3CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031260++0x03 line.long 0x00 "C4CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00312E0++0x03 line.long 0x00 "C5CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031360++0x03 line.long 0x00 "C6CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00313E0++0x03 line.long 0x00 "C7CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031460++0x03 line.long 0x00 "C8CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00314E0++0x03 line.long 0x00 "C9CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031560++0x03 line.long 0x00 "C10CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00315E0++0x03 line.long 0x00 "C11CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031660++0x03 line.long 0x00 "C12CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00316E0++0x03 line.long 0x00 "C13CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031760++0x03 line.long 0x00 "C14CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00317E0++0x03 line.long 0x00 "C15CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031860++0x03 line.long 0x00 "C16CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00318E0++0x03 line.long 0x00 "C17CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031960++0x03 line.long 0x00 "C18CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00319E0++0x03 line.long 0x00 "C19CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031A60++0x03 line.long 0x00 "C20CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031AE0++0x03 line.long 0x00 "C21CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031B60++0x03 line.long 0x00 "C22CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031BE0++0x03 line.long 0x00 "C23CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031C60++0x03 line.long 0x00 "C24CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031CE0++0x03 line.long 0x00 "C25CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031D60++0x03 line.long 0x00 "C26CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031DE0++0x03 line.long 0x00 "C27CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031E60++0x03 line.long 0x00 "C28CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031EE0++0x03 line.long 0x00 "C29CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031F60++0x03 line.long 0x00 "C30CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0031FE0++0x03 line.long 0x00 "C31CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0032060++0x03 line.long 0x00 "C32CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00320E0++0x03 line.long 0x00 "C33CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0032160++0x03 line.long 0x00 "C34CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00321E0++0x03 line.long 0x00 "C35CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0032260++0x03 line.long 0x00 "C36CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00322E0++0x03 line.long 0x00 "C37CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB0032360++0x03 line.long 0x00 "C38CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xB00323E0++0x03 line.long 0x00 "C39CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" rgroup.long ad:0xB0031064++0x03 line.long 0x00 "C0SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00310E4++0x03 line.long 0x00 "C1SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031164++0x03 line.long 0x00 "C2SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00311E4++0x03 line.long 0x00 "C3SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031264++0x03 line.long 0x00 "C4SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00312E4++0x03 line.long 0x00 "C5SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031364++0x03 line.long 0x00 "C6SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00313E4++0x03 line.long 0x00 "C7SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031464++0x03 line.long 0x00 "C8SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00314E4++0x03 line.long 0x00 "C9SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031564++0x03 line.long 0x00 "C10SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00315E4++0x03 line.long 0x00 "C11SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031664++0x03 line.long 0x00 "C12SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00316E4++0x03 line.long 0x00 "C13SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031764++0x03 line.long 0x00 "C14SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00317E4++0x03 line.long 0x00 "C15SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031864++0x03 line.long 0x00 "C16SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00318E4++0x03 line.long 0x00 "C17SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031964++0x03 line.long 0x00 "C18SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00319E4++0x03 line.long 0x00 "C19SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031A64++0x03 line.long 0x00 "C20SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031AE4++0x03 line.long 0x00 "C21SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031B64++0x03 line.long 0x00 "C22SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031BE4++0x03 line.long 0x00 "C23SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031C64++0x03 line.long 0x00 "C24SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031CE4++0x03 line.long 0x00 "C25SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031D64++0x03 line.long 0x00 "C26SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031DE4++0x03 line.long 0x00 "C27SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031E64++0x03 line.long 0x00 "C28SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031EE4++0x03 line.long 0x00 "C29SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031F64++0x03 line.long 0x00 "C30SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031FE4++0x03 line.long 0x00 "C31SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0032064++0x03 line.long 0x00 "C32SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00320E4++0x03 line.long 0x00 "C33SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0032164++0x03 line.long 0x00 "C34SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00321E4++0x03 line.long 0x00 "C35SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0032264++0x03 line.long 0x00 "C36SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00322E4++0x03 line.long 0x00 "C37SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0032364++0x03 line.long 0x00 "C38SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB00323E4++0x03 line.long 0x00 "C39SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xB0031068++0x03 line.long 0x00 "C0DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00310E8++0x03 line.long 0x00 "C1DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031168++0x03 line.long 0x00 "C2DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00311E8++0x03 line.long 0x00 "C3DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031268++0x03 line.long 0x00 "C4DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00312E8++0x03 line.long 0x00 "C5DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031368++0x03 line.long 0x00 "C6DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00313E8++0x03 line.long 0x00 "C7DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031468++0x03 line.long 0x00 "C8DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00314E8++0x03 line.long 0x00 "C9DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031568++0x03 line.long 0x00 "C10DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00315E8++0x03 line.long 0x00 "C11DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031668++0x03 line.long 0x00 "C12DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00316E8++0x03 line.long 0x00 "C13DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031768++0x03 line.long 0x00 "C14DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00317E8++0x03 line.long 0x00 "C15DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031868++0x03 line.long 0x00 "C16DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00318E8++0x03 line.long 0x00 "C17DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031968++0x03 line.long 0x00 "C18DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00319E8++0x03 line.long 0x00 "C19DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031A68++0x03 line.long 0x00 "C20DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031AE8++0x03 line.long 0x00 "C21DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031B68++0x03 line.long 0x00 "C22DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031BE8++0x03 line.long 0x00 "C23DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031C68++0x03 line.long 0x00 "C24DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031CE8++0x03 line.long 0x00 "C25DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031D68++0x03 line.long 0x00 "C26DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031DE8++0x03 line.long 0x00 "C27DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031E68++0x03 line.long 0x00 "C28DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031EE8++0x03 line.long 0x00 "C29DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031F68++0x03 line.long 0x00 "C30DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0031FE8++0x03 line.long 0x00 "C31DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0032068++0x03 line.long 0x00 "C32DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00320E8++0x03 line.long 0x00 "C33DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0032168++0x03 line.long 0x00 "C34DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00321E8++0x03 line.long 0x00 "C35DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0032268++0x03 line.long 0x00 "C36DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00322E8++0x03 line.long 0x00 "C37DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB0032368++0x03 line.long 0x00 "C38DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB00323E8++0x03 line.long 0x00 "C39DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xB003106C++0x03 line.long 0x00 "C0LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00310EC++0x03 line.long 0x00 "C1LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003116C++0x03 line.long 0x00 "C2LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00311EC++0x03 line.long 0x00 "C3LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003126C++0x03 line.long 0x00 "C4LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00312EC++0x03 line.long 0x00 "C5LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003136C++0x03 line.long 0x00 "C6LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00313EC++0x03 line.long 0x00 "C7LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003146C++0x03 line.long 0x00 "C8LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00314EC++0x03 line.long 0x00 "C9LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003156C++0x03 line.long 0x00 "C10LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00315EC++0x03 line.long 0x00 "C11LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003166C++0x03 line.long 0x00 "C12LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00316EC++0x03 line.long 0x00 "C13LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003176C++0x03 line.long 0x00 "C14LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00317EC++0x03 line.long 0x00 "C15LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003186C++0x03 line.long 0x00 "C16LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00318EC++0x03 line.long 0x00 "C17LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003196C++0x03 line.long 0x00 "C18LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00319EC++0x03 line.long 0x00 "C19LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031A6C++0x03 line.long 0x00 "C20LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031AEC++0x03 line.long 0x00 "C21LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031B6C++0x03 line.long 0x00 "C22LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031BEC++0x03 line.long 0x00 "C23LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031C6C++0x03 line.long 0x00 "C24LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031CEC++0x03 line.long 0x00 "C25LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031D6C++0x03 line.long 0x00 "C26LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031DEC++0x03 line.long 0x00 "C27LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031E6C++0x03 line.long 0x00 "C28LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031EEC++0x03 line.long 0x00 "C29LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031F6C++0x03 line.long 0x00 "C30LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB0031FEC++0x03 line.long 0x00 "C31LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003206C++0x03 line.long 0x00 "C32LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00320EC++0x03 line.long 0x00 "C33LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003216C++0x03 line.long 0x00 "C34LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00321EC++0x03 line.long 0x00 "C35LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003226C++0x03 line.long 0x00 "C36LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00322EC++0x03 line.long 0x00 "C37LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB003236C++0x03 line.long 0x00 "C38LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xB00323EC++0x03 line.long 0x00 "C39LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" group.long ad:0xB0031070++0x03 line.long 0x00 "C0EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00310F0++0x03 line.long 0x00 "C1EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031170++0x03 line.long 0x00 "C2EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00311F0++0x03 line.long 0x00 "C3EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031270++0x03 line.long 0x00 "C4EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00312F0++0x03 line.long 0x00 "C5EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031370++0x03 line.long 0x00 "C6EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00313F0++0x03 line.long 0x00 "C7EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031470++0x03 line.long 0x00 "C8EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00314F0++0x03 line.long 0x00 "C9EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031570++0x03 line.long 0x00 "C10EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00315F0++0x03 line.long 0x00 "C11EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031670++0x03 line.long 0x00 "C12EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00316F0++0x03 line.long 0x00 "C13EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031770++0x03 line.long 0x00 "C14EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00317F0++0x03 line.long 0x00 "C15EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031870++0x03 line.long 0x00 "C16EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00318F0++0x03 line.long 0x00 "C17EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031970++0x03 line.long 0x00 "C18EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00319F0++0x03 line.long 0x00 "C19EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031A70++0x03 line.long 0x00 "C20EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031AF0++0x03 line.long 0x00 "C21EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031B70++0x03 line.long 0x00 "C22EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031BF0++0x03 line.long 0x00 "C23EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031C70++0x03 line.long 0x00 "C24EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031CF0++0x03 line.long 0x00 "C25EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031D70++0x03 line.long 0x00 "C26EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031DF0++0x03 line.long 0x00 "C27EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031E70++0x03 line.long 0x00 "C28EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031EF0++0x03 line.long 0x00 "C29EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031F70++0x03 line.long 0x00 "C30EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031FF0++0x03 line.long 0x00 "C31EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0032070++0x03 line.long 0x00 "C32EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00320F0++0x03 line.long 0x00 "C33EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0032170++0x03 line.long 0x00 "C34EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00321F0++0x03 line.long 0x00 "C35EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0032270++0x03 line.long 0x00 "C36EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00322F0++0x03 line.long 0x00 "C37EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0032370++0x03 line.long 0x00 "C38EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB00323F0++0x03 line.long 0x00 "C39EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xB0031074++0x03 line.long 0x00 "C0THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00310F4++0x03 line.long 0x00 "C1THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031174++0x03 line.long 0x00 "C2THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00311F4++0x03 line.long 0x00 "C3THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031274++0x03 line.long 0x00 "C4THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00312F4++0x03 line.long 0x00 "C5THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031374++0x03 line.long 0x00 "C6THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00313F4++0x03 line.long 0x00 "C7THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031474++0x03 line.long 0x00 "C8THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00314F4++0x03 line.long 0x00 "C9THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031574++0x03 line.long 0x00 "C10THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00315F4++0x03 line.long 0x00 "C11THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031674++0x03 line.long 0x00 "C12THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00316F4++0x03 line.long 0x00 "C13THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031774++0x03 line.long 0x00 "C14THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00317F4++0x03 line.long 0x00 "C15THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031874++0x03 line.long 0x00 "C16THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00318F4++0x03 line.long 0x00 "C17THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031974++0x03 line.long 0x00 "C18THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00319F4++0x03 line.long 0x00 "C19THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031A74++0x03 line.long 0x00 "C20THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031AF4++0x03 line.long 0x00 "C21THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031B74++0x03 line.long 0x00 "C22THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031BF4++0x03 line.long 0x00 "C23THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031C74++0x03 line.long 0x00 "C24THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031CF4++0x03 line.long 0x00 "C25THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031D74++0x03 line.long 0x00 "C26THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031DF4++0x03 line.long 0x00 "C27THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031E74++0x03 line.long 0x00 "C28THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031EF4++0x03 line.long 0x00 "C29THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031F74++0x03 line.long 0x00 "C30THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0031FF4++0x03 line.long 0x00 "C31THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0032074++0x03 line.long 0x00 "C32THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00320F4++0x03 line.long 0x00 "C33THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0032174++0x03 line.long 0x00 "C34THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00321F4++0x03 line.long 0x00 "C35THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0032274++0x03 line.long 0x00 "C36THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00322F4++0x03 line.long 0x00 "C37THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB0032374++0x03 line.long 0x00 "C38THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xB00323F4++0x03 line.long 0x00 "C39THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" tree.end tree "DMA2" rgroup.long ad:0xC00B8000++0x07 line.long 0x00 "INTSTAT0,Interrupt Status Register 0" bitfld.long 0x00 31. "INTSTAT31,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 30. "INTSTAT30,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 29. "INTSTAT29,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 28. "INTSTAT28,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 27. "INTSTAT27,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 26. "INTSTAT26,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 25. "INTSTAT25,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 24. "INTSTAT24,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 23. "INTSTAT23,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 22. "INTSTAT22,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 21. "INTSTAT21,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 20. "INTSTAT20,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 19. "INTSTAT19,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 18. "INTSTAT18,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 17. "INTSTAT17,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 16. "INTSTAT16,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 15. "INTSTAT15,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 14. "INTSTAT14,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 13. "INTSTAT13,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 12. "INTSTAT12,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 11. "INTSTAT11,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 10. "INTSTAT10,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 9. "INTSTAT9,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 8. "INTSTAT8,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 7. "INTSTAT7,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 6. "INTSTAT6,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 5. "INTSTAT5,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 4. "INTSTAT4,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 3. "INTSTAT3,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 2. "INTSTAT2,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 1. "INTSTAT1,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 0. "INTSTAT0,Interrupt Status for Channel i after Masking" "0,1" line.long 0x04 "INTSTAT1,Interrupt Status Register 1" bitfld.long 0x04 7. "INTSTAT7,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 6. "INTSTAT6,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 5. "INTSTAT5,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 4. "INTSTAT4,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 3. "INTSTAT3,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 2. "INTSTAT2,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 1. "INTSTAT1,Interrupt Status for Channel 32+i after Masking" "0,1" newline bitfld.long 0x04 0. "INTSTAT0,Interrupt Status for Channel 32+i after Masking" "0,1" rgroup.long ad:0xC00B8070++0x07 line.long 0x00 "ENBLDCHNS0,Enabled Channel Register 0" bitfld.long 0x00 31. "ENBLD31,Channel i Enable Status" "0,1" bitfld.long 0x00 30. "ENBLD30,Channel i Enable Status" "0,1" bitfld.long 0x00 29. "ENBLD29,Channel i Enable Status" "0,1" bitfld.long 0x00 28. "ENBLD28,Channel i Enable Status" "0,1" bitfld.long 0x00 27. "ENBLD27,Channel i Enable Status" "0,1" bitfld.long 0x00 26. "ENBLD26,Channel i Enable Status" "0,1" bitfld.long 0x00 25. "ENBLD25,Channel i Enable Status" "0,1" newline bitfld.long 0x00 24. "ENBLD24,Channel i Enable Status" "0,1" bitfld.long 0x00 23. "ENBLD23,Channel i Enable Status" "0,1" bitfld.long 0x00 22. "ENBLD22,Channel i Enable Status" "0,1" bitfld.long 0x00 21. "ENBLD21,Channel i Enable Status" "0,1" bitfld.long 0x00 20. "ENBLD20,Channel i Enable Status" "0,1" bitfld.long 0x00 19. "ENBLD19,Channel i Enable Status" "0,1" bitfld.long 0x00 18. "ENBLD18,Channel i Enable Status" "0,1" newline bitfld.long 0x00 17. "ENBLD17,Channel i Enable Status" "0,1" bitfld.long 0x00 16. "ENBLD16,Channel i Enable Status" "0,1" bitfld.long 0x00 15. "ENBLD15,Channel i Enable Status" "0,1" bitfld.long 0x00 14. "ENBLD14,Channel i Enable Status" "0,1" bitfld.long 0x00 13. "ENBLD13,Channel i Enable Status" "0,1" bitfld.long 0x00 12. "ENBLD12,Channel i Enable Status" "0,1" bitfld.long 0x00 11. "ENBLD11,Channel i Enable Status" "0,1" newline bitfld.long 0x00 10. "ENBLD10,Channel i Enable Status" "0,1" bitfld.long 0x00 9. "ENBLD9,Channel i Enable Status" "0,1" bitfld.long 0x00 8. "ENBLD8,Channel i Enable Status" "0,1" bitfld.long 0x00 7. "ENBLD7,Channel i Enable Status" "0,1" bitfld.long 0x00 6. "ENBLD6,Channel i Enable Status" "0,1" bitfld.long 0x00 5. "ENBLD5,Channel i Enable Status" "0,1" bitfld.long 0x00 4. "ENBLD4,Channel i Enable Status" "0,1" newline bitfld.long 0x00 3. "ENBLD3,Channel i Enable Status" "0,1" bitfld.long 0x00 2. "ENBLD2,Channel i Enable Status" "0,1" bitfld.long 0x00 1. "ENBLD1,Channel i Enable Status" "0,1" bitfld.long 0x00 0. "ENBLD0,Channel i Enable Status" "0,1" line.long 0x04 "ENBLDCHNS1,Enabled Channel Register 1" bitfld.long 0x04 7. "ENBLD7,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 6. "ENBLD6,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 5. "ENBLD5,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 4. "ENBLD4,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 3. "ENBLD3,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 2. "ENBLD2,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 1. "ENBLD1,Channel 32+i Enable Status" "0,1" newline bitfld.long 0x04 0. "ENBLD0,Channel 32+i Enable Status" "0,1" group.long ad:0xC00B8080++0x43 line.long 0x00 "SOFTBREQ0,Software Burst Request Register x (x=0~3)" bitfld.long 0x00 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x04 "SOFTBREQ1,Software Burst Request Register x (x=0~3)" bitfld.long 0x04 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x08 "SOFTBREQ2,Software Burst Request Register x (x=0~3)" bitfld.long 0x08 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x0C "SOFTBREQ3,Software Burst Request Register x (x=0~3)" bitfld.long 0x0C 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x10 "SOFTSREQ0,Software Single Request Register x (x=0~3)" bitfld.long 0x10 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x14 "SOFTSREQ1,Software Single Request Register x (x=0~3)" bitfld.long 0x14 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x18 "SOFTSREQ2,Software Single Request Register x (x=0~3)" bitfld.long 0x18 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x1C "SOFTSREQ3,Software Single Request Register x (x=0~3)" bitfld.long 0x1C 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x20 "SOFTLBREQ0,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x20 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x24 "SOFTLBREQ1,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x24 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x28 "SOFTLBREQ2,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x28 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x2C "SOFTLBREQ3,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x2C 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x30 "SOFTLSREQ0,Software Last Single Request Register x (x=0~3)" bitfld.long 0x30 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x34 "SOFTLSREQ1,Software Last Single Request Register x (x=0~3)" bitfld.long 0x34 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x38 "SOFTLSREQ2,Software Last Single Request Register x (x=0~3)" bitfld.long 0x38 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x3C "SOFTLSREQ3,Software Last Single Request Register x (x=0~3)" bitfld.long 0x3C 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x40 "CONFIG,DMA Configuration Register" bitfld.long 0x40 2. "M2,AHB Master 2 Endianness Configuration" "0,1" bitfld.long 0x40 1. "M1,AHB Master 1 Endianness Configuration" "0,1" bitfld.long 0x40 0. "E,DMA Enable" "0,1" group.long ad:0xC00B80E0++0x03 line.long 0x00 "SFCONFIG,DMA Safety Configuration Register" bitfld.long 0x00 26.--27. "REGPAMSK,Register Privileged Access Protection Error Mask" "0,1,2,3" bitfld.long 0x00 20.--21. "REGRDNMSK,Register Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 18.--19. "M2RDNMSK,DMA Master2 Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "M1RDNMSK,DMA Master1 Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 14.--15. "LLICRCEA,LLI CRC Error Abort Transfer" "0,1,2,3" bitfld.long 0x00 12.--13. "REGRDNEA,Register Redundancy Error Abort Transfer" "0,1,2,3" bitfld.long 0x00 10.--11. "MRDNSTEA,Master Redundancy Error Abort Transfer" "0,1,2,3" newline bitfld.long 0x00 8.--9. "TSTMPEN,Timestamp Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "REGRDNEN,Register Redundancy Check Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "M2RDNEN,DMA Master2 Redundancy Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "M1RDNEN,DMA Master1 Redundancy Check Enable" "0,1,2,3" rgroup.long ad:0xC00B80E4++0x1F line.long 0x00 "ALMSTS,DMA Alarm Status Register" bitfld.long 0x00 4. "CRC,CRC Check Alarm Status" "0,1" bitfld.long 0x00 2. "REGACC,Register Safety Endinit Access Protection Alarm Status" "0,1" bitfld.long 0x00 1. "REGRDN,Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 0. "MRDN,DMA Master Redundancy Check Alarm Status" "0,1" line.long 0x04 "ERRSTS0,DMA Error Status Register 0" bitfld.long 0x04 5. "REGPAERR,Register Privileged Access Protection Error Status" "0,1" bitfld.long 0x04 4. "REGSEERR,Register Safety Endinit Protection Error Status" "0,1" bitfld.long 0x04 1. "M2RDNERR,DMA Master2 Redundancy Check Error Status" "0,1" bitfld.long 0x04 0. "M1RDNERR,DMA Master1 Redundancy Check Error Status" "0,1" line.long 0x08 "ERRSTS1,DMA Error Status Register 1" bitfld.long 0x08 31. "CHREGERR31,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 30. "CHREGERR30,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 29. "CHREGERR29,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 28. "CHREGERR28,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 27. "CHREGERR27,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 26. "CHREGERR26,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 25. "CHREGERR25,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 24. "CHREGERR24,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 23. "CHREGERR23,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 22. "CHREGERR22,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 21. "CHREGERR21,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 20. "CHREGERR20,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 19. "CHREGERR19,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 18. "CHREGERR18,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 17. "CHREGERR17,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 16. "CHREGERR16,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 15. "CHREGERR15,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 14. "CHREGERR14,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 13. "CHREGERR13,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 12. "CHREGERR12,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 11. "CHREGERR11,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 10. "CHREGERR10,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 9. "CHREGERR9,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 8. "CHREGERR8,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 7. "CHREGERR7,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 6. "CHREGERR6,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 5. "CHREGERR5,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 4. "CHREGERR4,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 3. "CHREGERR3,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 2. "CHREGERR2,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 1. "CHREGERR1,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 0. "CHREGERR0,Register Redundancy Check Error Status for Channel i" "0,1" line.long 0x0C "ERRSTS2,DMA Error Status Register 2" bitfld.long 0x0C 8. "GLBREGERR,Global Register Redundancy Check Error Status" "0,1" bitfld.long 0x0C 7. "CHREGERR7,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 6. "CHREGERR6,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 5. "CHREGERR5,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 4. "CHREGERR4,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 3. "CHREGERR3,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 2. "CHREGERR2,Register Redundancy Check Error Status for Channel 32+i" "0,1" newline bitfld.long 0x0C 1. "CHREGERR1,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 0. "CHREGERR0,Register Redundancy Check Error Status for Channel 32+i" "0,1" line.long 0x10 "ERRSTS3,DMA Error Status Register 3" bitfld.long 0x10 31. "CHDCRCERR31,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 30. "CHDCRCERR30,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 29. "CHDCRCERR29,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 28. "CHDCRCERR28,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 27. "CHDCRCERR27,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 26. "CHDCRCERR26,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 25. "CHDCRCERR25,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 24. "CHDCRCERR24,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 23. "CHDCRCERR23,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 22. "CHDCRCERR22,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 21. "CHDCRCERR21,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 20. "CHDCRCERR20,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 19. "CHDCRCERR19,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 18. "CHDCRCERR18,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 17. "CHDCRCERR17,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 16. "CHDCRCERR16,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 15. "CHDCRCERR15,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 14. "CHDCRCERR14,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 13. "CHDCRCERR13,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 12. "CHDCRCERR12,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 11. "CHDCRCERR11,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 10. "CHDCRCERR10,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 9. "CHDCRCERR9,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 8. "CHDCRCERR8,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 7. "CHDCRCERR7,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 6. "CHDCRCERR6,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 5. "CHDCRCERR5,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 4. "CHDCRCERR4,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 3. "CHDCRCERR3,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 2. "CHDCRCERR2,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 1. "CHDCRCERR1,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 0. "CHDCRCERR0,Data CRC Check Error Status for Channel i" "0,1" line.long 0x14 "ERRSTS4,DMA Error Status Register 4" bitfld.long 0x14 7. "CHDCRCERR7,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 6. "CHDCRCERR6,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 5. "CHDCRCERR5,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 4. "CHDCRCERR4,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 3. "CHDCRCERR3,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 2. "CHDCRCERR2,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 1. "CHDCRCERR1,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x14 0. "CHDCRCERR0,Data CRC Check Error Status for Channel i" "0,1" line.long 0x18 "ERRSTS5,DMA Error Status Register 5" bitfld.long 0x18 31. "CHLCRCERR31,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 30. "CHLCRCERR30,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 29. "CHLCRCERR29,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 28. "CHLCRCERR28,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 27. "CHLCRCERR27,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 26. "CHLCRCERR26,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 25. "CHLCRCERR25,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 24. "CHLCRCERR24,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 23. "CHLCRCERR23,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 22. "CHLCRCERR22,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 21. "CHLCRCERR21,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 20. "CHLCRCERR20,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 19. "CHLCRCERR19,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 18. "CHLCRCERR18,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 17. "CHLCRCERR17,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 16. "CHLCRCERR16,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 15. "CHLCRCERR15,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 14. "CHLCRCERR14,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 13. "CHLCRCERR13,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 12. "CHLCRCERR12,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 11. "CHLCRCERR11,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 10. "CHLCRCERR10,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 9. "CHLCRCERR9,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 8. "CHLCRCERR8,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 7. "CHLCRCERR7,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 6. "CHLCRCERR6,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 5. "CHLCRCERR5,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 4. "CHLCRCERR4,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 3. "CHLCRCERR3,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 2. "CHLCRCERR2,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 1. "CHLCRCERR1,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 0. "CHLCRCERR0,LLI CRC Check Error Status for Channel i" "0,1" line.long 0x1C "ERRSTS6,DMA Error Status Register 6" bitfld.long 0x1C 7. "CHLCRCERR7,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 6. "CHLCRCERR6,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 5. "CHLCRCERR5,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 4. "CHLCRCERR4,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 3. "CHLCRCERR3,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 2. "CHLCRCERR2,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 1. "CHLCRCERR1,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x1C 0. "CHLCRCERR0,LLI CRC Check Error Status for Channel i" "0,1" wgroup.long ad:0xC00B8104++0x07 line.long 0x00 "ERRCLR0,DMA Error Clear Register 0" bitfld.long 0x00 5. "REGPAECLR,Register Privileged Access Protection Error Clear" "0,1" bitfld.long 0x00 4. "REGSEECLR,Register Safety Endinit Protection Error Clear" "0,1" bitfld.long 0x00 1. "M2RDNECLR,DMA Master2 Redundancy Check Error Clear" "0,1" bitfld.long 0x00 0. "M1RDNECLR,DMA Master1 Redundancy Check Error Clear" "0,1" line.long 0x04 "ERRCLR2,DMA Error Clear Register 2" bitfld.long 0x04 8. "GLBREGECLR,Global Register Redundancy Check Error Clear" "0,1" group.long ad:0xC00B810C++0x07 line.long 0x00 "ERRINJ,DMA Error Injection Register" bitfld.long 0x00 16.--17. "CRCEINJ,DMA CRC Error Injection" "0,1,2,3" bitfld.long 0x00 2.--3. "M2RDNEINJ,DMA Master2 Redundancy Check Error Injection" "0,1,2,3" bitfld.long 0x00 0.--1. "M1RDNEINJ,DMA Master1 Redundancy Check Error Injection" "0,1,2,3" line.long 0x04 "ITIMERDIV,DMA Internal Timer Clock Divider Configuration Register" bitfld.long 0x04 8. "CKG,Timer Clock Gating" "0,1" hexmask.long.byte 0x04 0.--7. 1. "DIV,Timer Clock Divider Configuration" rgroup.long ad:0xC00B8114++0x03 line.long 0x00 "ITIMERVAL,DMA Internal Timer Value Register" group.long ad:0xC00B8800++0x3F line.long 0x00 "REQMUX0,DMA global request select register m (m=0~15)" hexmask.long.byte 0x00 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x04 "REQMUX1,DMA global request select register m (m=0~15)" hexmask.long.byte 0x04 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x08 "REQMUX2,DMA global request select register m (m=0~15)" hexmask.long.byte 0x08 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x0C "REQMUX3,DMA global request select register m (m=0~15)" hexmask.long.byte 0x0C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x10 "REQMUX4,DMA global request select register m (m=0~15)" hexmask.long.byte 0x10 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x14 "REQMUX5,DMA global request select register m (m=0~15)" hexmask.long.byte 0x14 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x18 "REQMUX6,DMA global request select register m (m=0~15)" hexmask.long.byte 0x18 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x1C "REQMUX7,DMA global request select register m (m=0~15)" hexmask.long.byte 0x1C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x20 "REQMUX8,DMA global request select register m (m=0~15)" hexmask.long.byte 0x20 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x24 "REQMUX9,DMA global request select register m (m=0~15)" hexmask.long.byte 0x24 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x28 "REQMUX10,DMA global request select register m (m=0~15)" hexmask.long.byte 0x28 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x2C "REQMUX11,DMA global request select register m (m=0~15)" hexmask.long.byte 0x2C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x30 "REQMUX12,DMA global request select register m (m=0~15)" hexmask.long.byte 0x30 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x34 "REQMUX13,DMA global request select register m (m=0~15)" hexmask.long.byte 0x34 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x38 "REQMUX14,DMA global request select register m (m=0~15)" hexmask.long.byte 0x38 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x3C "REQMUX15,DMA global request select register m (m=0~15)" hexmask.long.byte 0x3C 0.--7. 1. "REQSEL,DMA Global Request Selection" group.long ad:0xC00B9000++0x03 line.long 0x00 "C0SRCADDR,Channel n Source Address Register" group.long ad:0xC00B9080++0x03 line.long 0x00 "C1SRCADDR,Channel n Source Address Register" group.long ad:0xC00B9100++0x03 line.long 0x00 "C2SRCADDR,Channel n Source Address Register" group.long ad:0xC00B9180++0x03 line.long 0x00 "C3SRCADDR,Channel n Source Address Register" group.long ad:0xC00B9200++0x03 line.long 0x00 "C4SRCADDR,Channel n Source Address Register" group.long ad:0xC00B9280++0x03 line.long 0x00 "C5SRCADDR,Channel n Source Address Register" group.long ad:0xC00B9300++0x03 line.long 0x00 "C6SRCADDR,Channel n Source Address Register" group.long ad:0xC00B9380++0x03 line.long 0x00 "C7SRCADDR,Channel n Source Address Register" group.long ad:0xC00B9004++0x03 line.long 0x00 "C0DESTADR,Channel n Destination Address Register" group.long ad:0xC00B9084++0x03 line.long 0x00 "C1DESTADR,Channel n Destination Address Register" group.long ad:0xC00B9104++0x03 line.long 0x00 "C2DESTADR,Channel n Destination Address Register" group.long ad:0xC00B9184++0x03 line.long 0x00 "C3DESTADR,Channel n Destination Address Register" group.long ad:0xC00B9204++0x03 line.long 0x00 "C4DESTADR,Channel n Destination Address Register" group.long ad:0xC00B9284++0x03 line.long 0x00 "C5DESTADR,Channel n Destination Address Register" group.long ad:0xC00B9304++0x03 line.long 0x00 "C6DESTADR,Channel n Destination Address Register" group.long ad:0xC00B9384++0x03 line.long 0x00 "C7DESTADR,Channel n Destination Address Register" group.long ad:0xC00B9008++0x03 line.long 0x00 "C0LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B9088++0x03 line.long 0x00 "C1LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B9108++0x03 line.long 0x00 "C2LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B9188++0x03 line.long 0x00 "C3LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B9208++0x03 line.long 0x00 "C4LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B9288++0x03 line.long 0x00 "C5LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B9308++0x03 line.long 0x00 "C6LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B9388++0x03 line.long 0x00 "C7LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B900C++0x03 line.long 0x00 "C0CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B908C++0x03 line.long 0x00 "C1CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B910C++0x03 line.long 0x00 "C2CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B918C++0x03 line.long 0x00 "C3CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B920C++0x03 line.long 0x00 "C4CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B928C++0x03 line.long 0x00 "C5CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B930C++0x03 line.long 0x00 "C6CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B938C++0x03 line.long 0x00 "C7CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B9010++0x03 line.long 0x00 "C0CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B9090++0x03 line.long 0x00 "C1CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B9110++0x03 line.long 0x00 "C2CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B9190++0x03 line.long 0x00 "C3CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B9210++0x03 line.long 0x00 "C4CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B9290++0x03 line.long 0x00 "C5CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B9310++0x03 line.long 0x00 "C6CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B9390++0x03 line.long 0x00 "C7CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xC00B9014++0x03 line.long 0x00 "C0ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B9094++0x03 line.long 0x00 "C1ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B9114++0x03 line.long 0x00 "C2ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B9194++0x03 line.long 0x00 "C3ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B9214++0x03 line.long 0x00 "C4ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B9294++0x03 line.long 0x00 "C5ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B9314++0x03 line.long 0x00 "C6ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B9394++0x03 line.long 0x00 "C7ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xC00B9018++0x03 line.long 0x00 "C0PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B9098++0x03 line.long 0x00 "C1PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B9118++0x03 line.long 0x00 "C2PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B9198++0x03 line.long 0x00 "C3PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B9218++0x03 line.long 0x00 "C4PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B9298++0x03 line.long 0x00 "C5PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B9318++0x03 line.long 0x00 "C6PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B9398++0x03 line.long 0x00 "C7PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xC00B901C++0x03 line.long 0x00 "C0SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B909C++0x03 line.long 0x00 "C1SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B911C++0x03 line.long 0x00 "C2SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B919C++0x03 line.long 0x00 "C3SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B921C++0x03 line.long 0x00 "C4SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B929C++0x03 line.long 0x00 "C5SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B931C++0x03 line.long 0x00 "C6SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B939C++0x03 line.long 0x00 "C7SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xC00B9020++0x03 line.long 0x00 "C0DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B90A0++0x03 line.long 0x00 "C1DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B9120++0x03 line.long 0x00 "C2DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B91A0++0x03 line.long 0x00 "C3DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B9220++0x03 line.long 0x00 "C4DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B92A0++0x03 line.long 0x00 "C5DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B9320++0x03 line.long 0x00 "C6DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B93A0++0x03 line.long 0x00 "C7DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xC00B9024++0x03 line.long 0x00 "C0LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B90A4++0x03 line.long 0x00 "C1LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B9124++0x03 line.long 0x00 "C2LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B91A4++0x03 line.long 0x00 "C3LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B9224++0x03 line.long 0x00 "C4LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B92A4++0x03 line.long 0x00 "C5LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B9324++0x03 line.long 0x00 "C6LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B93A4++0x03 line.long 0x00 "C7LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xC00B9028++0x03 line.long 0x00 "C0CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B90A8++0x03 line.long 0x00 "C1CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B9128++0x03 line.long 0x00 "C2CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B91A8++0x03 line.long 0x00 "C3CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B9228++0x03 line.long 0x00 "C4CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B92A8++0x03 line.long 0x00 "C5CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B9328++0x03 line.long 0x00 "C6CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B93A8++0x03 line.long 0x00 "C7CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xC00B902C++0x03 line.long 0x00 "C0SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B90AC++0x03 line.long 0x00 "C1SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B912C++0x03 line.long 0x00 "C2SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B91AC++0x03 line.long 0x00 "C3SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B922C++0x03 line.long 0x00 "C4SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B92AC++0x03 line.long 0x00 "C5SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B932C++0x03 line.long 0x00 "C6SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xC00B93AC++0x03 line.long 0x00 "C7SWADDR,Channel n Double Buffer Switch Address Register" wgroup.long ad:0xC00B9030++0x03 line.long 0x00 "C0DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B90B0++0x03 line.long 0x00 "C1DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B9130++0x03 line.long 0x00 "C2DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B91B0++0x03 line.long 0x00 "C3DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B9230++0x03 line.long 0x00 "C4DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B92B0++0x03 line.long 0x00 "C5DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B9330++0x03 line.long 0x00 "C6DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xC00B93B0++0x03 line.long 0x00 "C7DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" group.long ad:0xC00B9034++0x03 line.long 0x00 "C0DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B90B4++0x03 line.long 0x00 "C1DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B9134++0x03 line.long 0x00 "C2DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B91B4++0x03 line.long 0x00 "C3DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B9234++0x03 line.long 0x00 "C4DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B92B4++0x03 line.long 0x00 "C5DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B9334++0x03 line.long 0x00 "C6DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B93B4++0x03 line.long 0x00 "C7DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xC00B9038++0x03 line.long 0x00 "C0PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B90B8++0x03 line.long 0x00 "C1PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B9138++0x03 line.long 0x00 "C2PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B91B8++0x03 line.long 0x00 "C3PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B9238++0x03 line.long 0x00 "C4PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B92B8++0x03 line.long 0x00 "C5PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B9338++0x03 line.long 0x00 "C6PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B93B8++0x03 line.long 0x00 "C7PAT,Channel n Data Match Pattern Register" group.long ad:0xC00B903C++0x03 line.long 0x00 "C0PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B90BC++0x03 line.long 0x00 "C1PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B913C++0x03 line.long 0x00 "C2PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B91BC++0x03 line.long 0x00 "C3PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B923C++0x03 line.long 0x00 "C4PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B92BC++0x03 line.long 0x00 "C5PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B933C++0x03 line.long 0x00 "C6PATMSK,Channel n Data Match Pattern Register" group.long ad:0xC00B93BC++0x03 line.long 0x00 "C7PATMSK,Channel n Data Match Pattern Register" rgroup.long ad:0xC00B9040++0x03 line.long 0x00 "C0INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B90C0++0x03 line.long 0x00 "C1INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B9140++0x03 line.long 0x00 "C2INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B91C0++0x03 line.long 0x00 "C3INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B9240++0x03 line.long 0x00 "C4INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B92C0++0x03 line.long 0x00 "C5INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B9340++0x03 line.long 0x00 "C6INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B93C0++0x03 line.long 0x00 "C7INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xC00B9044++0x03 line.long 0x00 "C0RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B90C4++0x03 line.long 0x00 "C1RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B9144++0x03 line.long 0x00 "C2RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B91C4++0x03 line.long 0x00 "C3RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B9244++0x03 line.long 0x00 "C4RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B92C4++0x03 line.long 0x00 "C5RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B9344++0x03 line.long 0x00 "C6RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xC00B93C4++0x03 line.long 0x00 "C7RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" wgroup.long ad:0xC00B9048++0x03 line.long 0x00 "C0INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B90C8++0x03 line.long 0x00 "C1INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B9148++0x03 line.long 0x00 "C2INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B91C8++0x03 line.long 0x00 "C3INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B9248++0x03 line.long 0x00 "C4INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B92C8++0x03 line.long 0x00 "C5INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B9348++0x03 line.long 0x00 "C6INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B93C8++0x03 line.long 0x00 "C7INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xC00B904C++0x03 line.long 0x00 "C0ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B90CC++0x03 line.long 0x00 "C1ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B914C++0x03 line.long 0x00 "C2ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B91CC++0x03 line.long 0x00 "C3ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B924C++0x03 line.long 0x00 "C4ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B92CC++0x03 line.long 0x00 "C5ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B934C++0x03 line.long 0x00 "C6ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xC00B93CC++0x03 line.long 0x00 "C7ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" rgroup.long ad:0xC00B9050++0x03 line.long 0x00 "C0STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B90D0++0x03 line.long 0x00 "C1STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B9150++0x03 line.long 0x00 "C2STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B91D0++0x03 line.long 0x00 "C3STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B9250++0x03 line.long 0x00 "C4STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B92D0++0x03 line.long 0x00 "C5STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B9350++0x03 line.long 0x00 "C6STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B93D0++0x03 line.long 0x00 "C7STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xC00B9054++0x03 line.long 0x00 "C0EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B90D4++0x03 line.long 0x00 "C1EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B9154++0x03 line.long 0x00 "C2EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B91D4++0x03 line.long 0x00 "C3EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B9254++0x03 line.long 0x00 "C4EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B92D4++0x03 line.long 0x00 "C5EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B9354++0x03 line.long 0x00 "C6EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B93D4++0x03 line.long 0x00 "C7EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xC00B9058++0x03 line.long 0x00 "C0TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B90D8++0x03 line.long 0x00 "C1TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B9158++0x03 line.long 0x00 "C2TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B91D8++0x03 line.long 0x00 "C3TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B9258++0x03 line.long 0x00 "C4TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B92D8++0x03 line.long 0x00 "C5TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B9358++0x03 line.long 0x00 "C6TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xC00B93D8++0x03 line.long 0x00 "C7TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" wgroup.long ad:0xC00B905C++0x03 line.long 0x00 "C0TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B90DC++0x03 line.long 0x00 "C1TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B915C++0x03 line.long 0x00 "C2TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B91DC++0x03 line.long 0x00 "C3TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B925C++0x03 line.long 0x00 "C4TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B92DC++0x03 line.long 0x00 "C5TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B935C++0x03 line.long 0x00 "C6TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xC00B93DC++0x03 line.long 0x00 "C7TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" group.long ad:0xC00B9060++0x03 line.long 0x00 "C0CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B90E0++0x03 line.long 0x00 "C1CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B9160++0x03 line.long 0x00 "C2CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B91E0++0x03 line.long 0x00 "C3CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B9260++0x03 line.long 0x00 "C4CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B92E0++0x03 line.long 0x00 "C5CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B9360++0x03 line.long 0x00 "C6CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xC00B93E0++0x03 line.long 0x00 "C7CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" rgroup.long ad:0xC00B9064++0x03 line.long 0x00 "C0SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B90E4++0x03 line.long 0x00 "C1SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B9164++0x03 line.long 0x00 "C2SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B91E4++0x03 line.long 0x00 "C3SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B9264++0x03 line.long 0x00 "C4SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B92E4++0x03 line.long 0x00 "C5SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B9364++0x03 line.long 0x00 "C6SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B93E4++0x03 line.long 0x00 "C7SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xC00B9068++0x03 line.long 0x00 "C0DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B90E8++0x03 line.long 0x00 "C1DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B9168++0x03 line.long 0x00 "C2DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B91E8++0x03 line.long 0x00 "C3DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B9268++0x03 line.long 0x00 "C4DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B92E8++0x03 line.long 0x00 "C5DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B9368++0x03 line.long 0x00 "C6DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B93E8++0x03 line.long 0x00 "C7DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xC00B906C++0x03 line.long 0x00 "C0LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B90EC++0x03 line.long 0x00 "C1LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B916C++0x03 line.long 0x00 "C2LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B91EC++0x03 line.long 0x00 "C3LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B926C++0x03 line.long 0x00 "C4LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B92EC++0x03 line.long 0x00 "C5LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B936C++0x03 line.long 0x00 "C6LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xC00B93EC++0x03 line.long 0x00 "C7LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" group.long ad:0xC00B9070++0x03 line.long 0x00 "C0EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B90F0++0x03 line.long 0x00 "C1EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B9170++0x03 line.long 0x00 "C2EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B91F0++0x03 line.long 0x00 "C3EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B9270++0x03 line.long 0x00 "C4EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B92F0++0x03 line.long 0x00 "C5EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B9370++0x03 line.long 0x00 "C6EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B93F0++0x03 line.long 0x00 "C7EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xC00B9074++0x03 line.long 0x00 "C0THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B90F4++0x03 line.long 0x00 "C1THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B9174++0x03 line.long 0x00 "C2THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B91F4++0x03 line.long 0x00 "C3THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B9274++0x03 line.long 0x00 "C4THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B92F4++0x03 line.long 0x00 "C5THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B9374++0x03 line.long 0x00 "C6THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xC00B93F4++0x03 line.long 0x00 "C7THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" tree.end tree "DMA3" rgroup.long ad:0xD0030000++0x07 line.long 0x00 "INTSTAT0,Interrupt Status Register 0" bitfld.long 0x00 31. "INTSTAT31,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 30. "INTSTAT30,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 29. "INTSTAT29,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 28. "INTSTAT28,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 27. "INTSTAT27,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 26. "INTSTAT26,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 25. "INTSTAT25,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 24. "INTSTAT24,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 23. "INTSTAT23,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 22. "INTSTAT22,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 21. "INTSTAT21,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 20. "INTSTAT20,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 19. "INTSTAT19,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 18. "INTSTAT18,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 17. "INTSTAT17,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 16. "INTSTAT16,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 15. "INTSTAT15,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 14. "INTSTAT14,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 13. "INTSTAT13,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 12. "INTSTAT12,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 11. "INTSTAT11,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 10. "INTSTAT10,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 9. "INTSTAT9,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 8. "INTSTAT8,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 7. "INTSTAT7,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 6. "INTSTAT6,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 5. "INTSTAT5,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 4. "INTSTAT4,Interrupt Status for Channel i after Masking" "0,1" newline bitfld.long 0x00 3. "INTSTAT3,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 2. "INTSTAT2,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 1. "INTSTAT1,Interrupt Status for Channel i after Masking" "0,1" bitfld.long 0x00 0. "INTSTAT0,Interrupt Status for Channel i after Masking" "0,1" line.long 0x04 "INTSTAT1,Interrupt Status Register 1" bitfld.long 0x04 7. "INTSTAT7,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 6. "INTSTAT6,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 5. "INTSTAT5,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 4. "INTSTAT4,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 3. "INTSTAT3,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 2. "INTSTAT2,Interrupt Status for Channel 32+i after Masking" "0,1" bitfld.long 0x04 1. "INTSTAT1,Interrupt Status for Channel 32+i after Masking" "0,1" newline bitfld.long 0x04 0. "INTSTAT0,Interrupt Status for Channel 32+i after Masking" "0,1" rgroup.long ad:0xD0030070++0x07 line.long 0x00 "ENBLDCHNS0,Enabled Channel Register 0" bitfld.long 0x00 31. "ENBLD31,Channel i Enable Status" "0,1" bitfld.long 0x00 30. "ENBLD30,Channel i Enable Status" "0,1" bitfld.long 0x00 29. "ENBLD29,Channel i Enable Status" "0,1" bitfld.long 0x00 28. "ENBLD28,Channel i Enable Status" "0,1" bitfld.long 0x00 27. "ENBLD27,Channel i Enable Status" "0,1" bitfld.long 0x00 26. "ENBLD26,Channel i Enable Status" "0,1" bitfld.long 0x00 25. "ENBLD25,Channel i Enable Status" "0,1" newline bitfld.long 0x00 24. "ENBLD24,Channel i Enable Status" "0,1" bitfld.long 0x00 23. "ENBLD23,Channel i Enable Status" "0,1" bitfld.long 0x00 22. "ENBLD22,Channel i Enable Status" "0,1" bitfld.long 0x00 21. "ENBLD21,Channel i Enable Status" "0,1" bitfld.long 0x00 20. "ENBLD20,Channel i Enable Status" "0,1" bitfld.long 0x00 19. "ENBLD19,Channel i Enable Status" "0,1" bitfld.long 0x00 18. "ENBLD18,Channel i Enable Status" "0,1" newline bitfld.long 0x00 17. "ENBLD17,Channel i Enable Status" "0,1" bitfld.long 0x00 16. "ENBLD16,Channel i Enable Status" "0,1" bitfld.long 0x00 15. "ENBLD15,Channel i Enable Status" "0,1" bitfld.long 0x00 14. "ENBLD14,Channel i Enable Status" "0,1" bitfld.long 0x00 13. "ENBLD13,Channel i Enable Status" "0,1" bitfld.long 0x00 12. "ENBLD12,Channel i Enable Status" "0,1" bitfld.long 0x00 11. "ENBLD11,Channel i Enable Status" "0,1" newline bitfld.long 0x00 10. "ENBLD10,Channel i Enable Status" "0,1" bitfld.long 0x00 9. "ENBLD9,Channel i Enable Status" "0,1" bitfld.long 0x00 8. "ENBLD8,Channel i Enable Status" "0,1" bitfld.long 0x00 7. "ENBLD7,Channel i Enable Status" "0,1" bitfld.long 0x00 6. "ENBLD6,Channel i Enable Status" "0,1" bitfld.long 0x00 5. "ENBLD5,Channel i Enable Status" "0,1" bitfld.long 0x00 4. "ENBLD4,Channel i Enable Status" "0,1" newline bitfld.long 0x00 3. "ENBLD3,Channel i Enable Status" "0,1" bitfld.long 0x00 2. "ENBLD2,Channel i Enable Status" "0,1" bitfld.long 0x00 1. "ENBLD1,Channel i Enable Status" "0,1" bitfld.long 0x00 0. "ENBLD0,Channel i Enable Status" "0,1" line.long 0x04 "ENBLDCHNS1,Enabled Channel Register 1" bitfld.long 0x04 7. "ENBLD7,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 6. "ENBLD6,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 5. "ENBLD5,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 4. "ENBLD4,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 3. "ENBLD3,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 2. "ENBLD2,Channel 32+i Enable Status" "0,1" bitfld.long 0x04 1. "ENBLD1,Channel 32+i Enable Status" "0,1" newline bitfld.long 0x04 0. "ENBLD0,Channel 32+i Enable Status" "0,1" group.long ad:0xD0030080++0x43 line.long 0x00 "SOFTBREQ0,Software Burst Request Register x (x=0~3)" bitfld.long 0x00 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x00 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x00 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x04 "SOFTBREQ1,Software Burst Request Register x (x=0~3)" bitfld.long 0x04 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x04 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x04 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x08 "SOFTBREQ2,Software Burst Request Register x (x=0~3)" bitfld.long 0x08 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x08 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x08 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x0C "SOFTBREQ3,Software Burst Request Register x (x=0~3)" bitfld.long 0x0C 31. "SOFTBREQ31,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 30. "SOFTBREQ30,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 29. "SOFTBREQ29,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 28. "SOFTBREQ28,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 27. "SOFTBREQ27,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 26. "SOFTBREQ26,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 25. "SOFTBREQ25,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 24. "SOFTBREQ24,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 23. "SOFTBREQ23,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 22. "SOFTBREQ22,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 21. "SOFTBREQ21,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 20. "SOFTBREQ20,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 19. "SOFTBREQ19,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 18. "SOFTBREQ18,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 17. "SOFTBREQ17,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 16. "SOFTBREQ16,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 15. "SOFTBREQ15,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 14. "SOFTBREQ14,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 13. "SOFTBREQ13,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 12. "SOFTBREQ12,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 11. "SOFTBREQ11,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 10. "SOFTBREQ10,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 9. "SOFTBREQ9,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 8. "SOFTBREQ8,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 7. "SOFTBREQ7,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 6. "SOFTBREQ6,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 5. "SOFTBREQ5,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 4. "SOFTBREQ4,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" newline bitfld.long 0x0C 3. "SOFTBREQ3,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 2. "SOFTBREQ2,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 1. "SOFTBREQ1,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" bitfld.long 0x0C 0. "SOFTBREQ0,Generate Software Burst Request on Burst Request Line i+32*x" "0,1" line.long 0x10 "SOFTSREQ0,Software Single Request Register x (x=0~3)" bitfld.long 0x10 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x10 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x10 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x14 "SOFTSREQ1,Software Single Request Register x (x=0~3)" bitfld.long 0x14 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x14 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x14 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x18 "SOFTSREQ2,Software Single Request Register x (x=0~3)" bitfld.long 0x18 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x18 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x18 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x1C "SOFTSREQ3,Software Single Request Register x (x=0~3)" bitfld.long 0x1C 31. "SOFTSREQ31,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 30. "SOFTSREQ30,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 29. "SOFTSREQ29,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 28. "SOFTSREQ28,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 27. "SOFTSREQ27,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 26. "SOFTSREQ26,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 25. "SOFTSREQ25,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 24. "SOFTSREQ24,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 23. "SOFTSREQ23,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 22. "SOFTSREQ22,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 21. "SOFTSREQ21,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 20. "SOFTSREQ20,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 19. "SOFTSREQ19,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 18. "SOFTSREQ18,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 17. "SOFTSREQ17,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 16. "SOFTSREQ16,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 15. "SOFTSREQ15,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 14. "SOFTSREQ14,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 13. "SOFTSREQ13,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 12. "SOFTSREQ12,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 11. "SOFTSREQ11,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 10. "SOFTSREQ10,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 9. "SOFTSREQ9,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 8. "SOFTSREQ8,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 7. "SOFTSREQ7,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 6. "SOFTSREQ6,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 5. "SOFTSREQ5,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 4. "SOFTSREQ4,Generate Software Single Request on Single Request Line i+32*x" "0,1" newline bitfld.long 0x1C 3. "SOFTSREQ3,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 2. "SOFTSREQ2,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 1. "SOFTSREQ1,Generate Software Single Request on Single Request Line i+32*x" "0,1" bitfld.long 0x1C 0. "SOFTSREQ0,Generate Software Single Request on Single Request Line i+32*x" "0,1" line.long 0x20 "SOFTLBREQ0,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x20 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x20 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x20 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x24 "SOFTLBREQ1,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x24 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x24 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x24 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x28 "SOFTLBREQ2,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x28 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x28 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x28 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x2C "SOFTLBREQ3,Software Last Burst Request Register x (x=0~3)" bitfld.long 0x2C 31. "SOFTLBREQ31,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 30. "SOFTLBREQ30,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 29. "SOFTLBREQ29,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 28. "SOFTLBREQ28,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 27. "SOFTLBREQ27,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 26. "SOFTLBREQ26,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 25. "SOFTLBREQ25,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 24. "SOFTLBREQ24,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 23. "SOFTLBREQ23,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 22. "SOFTLBREQ22,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 21. "SOFTLBREQ21,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 20. "SOFTLBREQ20,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 19. "SOFTLBREQ19,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 18. "SOFTLBREQ18,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 17. "SOFTLBREQ17,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 16. "SOFTLBREQ16,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 15. "SOFTLBREQ15,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 14. "SOFTLBREQ14,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 13. "SOFTLBREQ13,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 12. "SOFTLBREQ12,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 11. "SOFTLBREQ11,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 10. "SOFTLBREQ10,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 9. "SOFTLBREQ9,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 8. "SOFTLBREQ8,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 7. "SOFTLBREQ7,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 6. "SOFTLBREQ6,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 5. "SOFTLBREQ5,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 4. "SOFTLBREQ4,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" newline bitfld.long 0x2C 3. "SOFTLBREQ3,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 2. "SOFTLBREQ2,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 1. "SOFTLBREQ1,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" bitfld.long 0x2C 0. "SOFTLBREQ0,Generate Software Last Burst Request on Last Burst Request Line i+32*x" "0,1" line.long 0x30 "SOFTLSREQ0,Software Last Single Request Register x (x=0~3)" bitfld.long 0x30 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x30 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x30 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x34 "SOFTLSREQ1,Software Last Single Request Register x (x=0~3)" bitfld.long 0x34 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x34 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x34 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x38 "SOFTLSREQ2,Software Last Single Request Register x (x=0~3)" bitfld.long 0x38 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x38 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x38 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x3C "SOFTLSREQ3,Software Last Single Request Register x (x=0~3)" bitfld.long 0x3C 31. "SOFTLSREQ31,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 30. "SOFTLSREQ30,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 29. "SOFTLSREQ29,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 28. "SOFTLSREQ28,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 27. "SOFTLSREQ27,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 26. "SOFTLSREQ26,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 25. "SOFTLSREQ25,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 24. "SOFTLSREQ24,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 23. "SOFTLSREQ23,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 22. "SOFTLSREQ22,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 21. "SOFTLSREQ21,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 20. "SOFTLSREQ20,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 19. "SOFTLSREQ19,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 18. "SOFTLSREQ18,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 17. "SOFTLSREQ17,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 16. "SOFTLSREQ16,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 15. "SOFTLSREQ15,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 14. "SOFTLSREQ14,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 13. "SOFTLSREQ13,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 12. "SOFTLSREQ12,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 11. "SOFTLSREQ11,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 10. "SOFTLSREQ10,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 9. "SOFTLSREQ9,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 8. "SOFTLSREQ8,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 7. "SOFTLSREQ7,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 6. "SOFTLSREQ6,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 5. "SOFTLSREQ5,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 4. "SOFTLSREQ4,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" newline bitfld.long 0x3C 3. "SOFTLSREQ3,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 2. "SOFTLSREQ2,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 1. "SOFTLSREQ1,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" bitfld.long 0x3C 0. "SOFTLSREQ0,Generate Software Last Single Request on Last Single Request Line i+32*x" "0,1" line.long 0x40 "CONFIG,DMA Configuration Register" bitfld.long 0x40 2. "M2,AHB Master 2 Endianness Configuration" "0,1" bitfld.long 0x40 1. "M1,AHB Master 1 Endianness Configuration" "0,1" bitfld.long 0x40 0. "E,DMA Enable" "0,1" group.long ad:0xD00300E0++0x03 line.long 0x00 "SFCONFIG,DMA Safety Configuration Register" bitfld.long 0x00 26.--27. "REGPAMSK,Register Privileged Access Protection Error Mask" "0,1,2,3" bitfld.long 0x00 20.--21. "REGRDNMSK,Register Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 18.--19. "M2RDNMSK,DMA Master2 Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "M1RDNMSK,DMA Master1 Redundancy Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 14.--15. "LLICRCEA,LLI CRC Error Abort Transfer" "0,1,2,3" bitfld.long 0x00 12.--13. "REGRDNEA,Register Redundancy Error Abort Transfer" "0,1,2,3" bitfld.long 0x00 10.--11. "MRDNSTEA,Master Redundancy Error Abort Transfer" "0,1,2,3" newline bitfld.long 0x00 8.--9. "TSTMPEN,Timestamp Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "REGRDNEN,Register Redundancy Check Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "M2RDNEN,DMA Master2 Redundancy Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "M1RDNEN,DMA Master1 Redundancy Check Enable" "0,1,2,3" rgroup.long ad:0xD00300E4++0x1F line.long 0x00 "ALMSTS,DMA Alarm Status Register" bitfld.long 0x00 4. "CRC,CRC Check Alarm Status" "0,1" bitfld.long 0x00 2. "REGACC,Register Safety Endinit Access Protection Alarm Status" "0,1" bitfld.long 0x00 1. "REGRDN,Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 0. "MRDN,DMA Master Redundancy Check Alarm Status" "0,1" line.long 0x04 "ERRSTS0,DMA Error Status Register 0" bitfld.long 0x04 5. "REGPAERR,Register Privileged Access Protection Error Status" "0,1" bitfld.long 0x04 4. "REGSEERR,Register Safety Endinit Protection Error Status" "0,1" bitfld.long 0x04 1. "M2RDNERR,DMA Master2 Redundancy Check Error Status" "0,1" bitfld.long 0x04 0. "M1RDNERR,DMA Master1 Redundancy Check Error Status" "0,1" line.long 0x08 "ERRSTS1,DMA Error Status Register 1" bitfld.long 0x08 31. "CHREGERR31,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 30. "CHREGERR30,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 29. "CHREGERR29,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 28. "CHREGERR28,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 27. "CHREGERR27,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 26. "CHREGERR26,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 25. "CHREGERR25,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 24. "CHREGERR24,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 23. "CHREGERR23,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 22. "CHREGERR22,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 21. "CHREGERR21,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 20. "CHREGERR20,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 19. "CHREGERR19,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 18. "CHREGERR18,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 17. "CHREGERR17,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 16. "CHREGERR16,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 15. "CHREGERR15,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 14. "CHREGERR14,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 13. "CHREGERR13,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 12. "CHREGERR12,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 11. "CHREGERR11,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 10. "CHREGERR10,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 9. "CHREGERR9,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 8. "CHREGERR8,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 7. "CHREGERR7,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 6. "CHREGERR6,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 5. "CHREGERR5,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 4. "CHREGERR4,Register Redundancy Check Error Status for Channel i" "0,1" newline bitfld.long 0x08 3. "CHREGERR3,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 2. "CHREGERR2,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 1. "CHREGERR1,Register Redundancy Check Error Status for Channel i" "0,1" bitfld.long 0x08 0. "CHREGERR0,Register Redundancy Check Error Status for Channel i" "0,1" line.long 0x0C "ERRSTS2,DMA Error Status Register 2" bitfld.long 0x0C 8. "GLBREGERR,Global Register Redundancy Check Error Status" "0,1" bitfld.long 0x0C 7. "CHREGERR7,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 6. "CHREGERR6,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 5. "CHREGERR5,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 4. "CHREGERR4,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 3. "CHREGERR3,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 2. "CHREGERR2,Register Redundancy Check Error Status for Channel 32+i" "0,1" newline bitfld.long 0x0C 1. "CHREGERR1,Register Redundancy Check Error Status for Channel 32+i" "0,1" bitfld.long 0x0C 0. "CHREGERR0,Register Redundancy Check Error Status for Channel 32+i" "0,1" line.long 0x10 "ERRSTS3,DMA Error Status Register 3" bitfld.long 0x10 31. "CHDCRCERR31,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 30. "CHDCRCERR30,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 29. "CHDCRCERR29,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 28. "CHDCRCERR28,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 27. "CHDCRCERR27,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 26. "CHDCRCERR26,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 25. "CHDCRCERR25,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 24. "CHDCRCERR24,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 23. "CHDCRCERR23,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 22. "CHDCRCERR22,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 21. "CHDCRCERR21,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 20. "CHDCRCERR20,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 19. "CHDCRCERR19,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 18. "CHDCRCERR18,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 17. "CHDCRCERR17,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 16. "CHDCRCERR16,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 15. "CHDCRCERR15,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 14. "CHDCRCERR14,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 13. "CHDCRCERR13,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 12. "CHDCRCERR12,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 11. "CHDCRCERR11,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 10. "CHDCRCERR10,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 9. "CHDCRCERR9,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 8. "CHDCRCERR8,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 7. "CHDCRCERR7,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 6. "CHDCRCERR6,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 5. "CHDCRCERR5,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 4. "CHDCRCERR4,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x10 3. "CHDCRCERR3,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 2. "CHDCRCERR2,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 1. "CHDCRCERR1,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x10 0. "CHDCRCERR0,Data CRC Check Error Status for Channel i" "0,1" line.long 0x14 "ERRSTS4,DMA Error Status Register 4" bitfld.long 0x14 7. "CHDCRCERR7,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 6. "CHDCRCERR6,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 5. "CHDCRCERR5,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 4. "CHDCRCERR4,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 3. "CHDCRCERR3,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 2. "CHDCRCERR2,Data CRC Check Error Status for Channel i" "0,1" bitfld.long 0x14 1. "CHDCRCERR1,Data CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x14 0. "CHDCRCERR0,Data CRC Check Error Status for Channel i" "0,1" line.long 0x18 "ERRSTS5,DMA Error Status Register 5" bitfld.long 0x18 31. "CHLCRCERR31,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 30. "CHLCRCERR30,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 29. "CHLCRCERR29,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 28. "CHLCRCERR28,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 27. "CHLCRCERR27,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 26. "CHLCRCERR26,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 25. "CHLCRCERR25,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 24. "CHLCRCERR24,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 23. "CHLCRCERR23,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 22. "CHLCRCERR22,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 21. "CHLCRCERR21,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 20. "CHLCRCERR20,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 19. "CHLCRCERR19,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 18. "CHLCRCERR18,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 17. "CHLCRCERR17,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 16. "CHLCRCERR16,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 15. "CHLCRCERR15,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 14. "CHLCRCERR14,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 13. "CHLCRCERR13,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 12. "CHLCRCERR12,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 11. "CHLCRCERR11,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 10. "CHLCRCERR10,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 9. "CHLCRCERR9,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 8. "CHLCRCERR8,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 7. "CHLCRCERR7,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 6. "CHLCRCERR6,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 5. "CHLCRCERR5,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 4. "CHLCRCERR4,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x18 3. "CHLCRCERR3,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 2. "CHLCRCERR2,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 1. "CHLCRCERR1,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x18 0. "CHLCRCERR0,LLI CRC Check Error Status for Channel i" "0,1" line.long 0x1C "ERRSTS6,DMA Error Status Register 6" bitfld.long 0x1C 7. "CHLCRCERR7,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 6. "CHLCRCERR6,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 5. "CHLCRCERR5,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 4. "CHLCRCERR4,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 3. "CHLCRCERR3,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 2. "CHLCRCERR2,LLI CRC Check Error Status for Channel i" "0,1" bitfld.long 0x1C 1. "CHLCRCERR1,LLI CRC Check Error Status for Channel i" "0,1" newline bitfld.long 0x1C 0. "CHLCRCERR0,LLI CRC Check Error Status for Channel i" "0,1" wgroup.long ad:0xD0030104++0x07 line.long 0x00 "ERRCLR0,DMA Error Clear Register 0" bitfld.long 0x00 5. "REGPAECLR,Register Privileged Access Protection Error Clear" "0,1" bitfld.long 0x00 4. "REGSEECLR,Register Safety Endinit Protection Error Clear" "0,1" bitfld.long 0x00 1. "M2RDNECLR,DMA Master2 Redundancy Check Error Clear" "0,1" bitfld.long 0x00 0. "M1RDNECLR,DMA Master1 Redundancy Check Error Clear" "0,1" line.long 0x04 "ERRCLR2,DMA Error Clear Register 2" bitfld.long 0x04 8. "GLBREGECLR,Global Register Redundancy Check Error Clear" "0,1" group.long ad:0xD003010C++0x07 line.long 0x00 "ERRINJ,DMA Error Injection Register" bitfld.long 0x00 16.--17. "CRCEINJ,DMA CRC Error Injection" "0,1,2,3" bitfld.long 0x00 2.--3. "M2RDNEINJ,DMA Master2 Redundancy Check Error Injection" "0,1,2,3" bitfld.long 0x00 0.--1. "M1RDNEINJ,DMA Master1 Redundancy Check Error Injection" "0,1,2,3" line.long 0x04 "ITIMERDIV,DMA Internal Timer Clock Divider Configuration Register" bitfld.long 0x04 8. "CKG,Timer Clock Gating" "0,1" hexmask.long.byte 0x04 0.--7. 1. "DIV,Timer Clock Divider Configuration" rgroup.long ad:0xD0030114++0x03 line.long 0x00 "ITIMERVAL,DMA Internal Timer Value Register" group.long ad:0xD0030800++0x3F line.long 0x00 "REQMUX0,DMA global request select register m (m=0~15)" hexmask.long.byte 0x00 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x04 "REQMUX1,DMA global request select register m (m=0~15)" hexmask.long.byte 0x04 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x08 "REQMUX2,DMA global request select register m (m=0~15)" hexmask.long.byte 0x08 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x0C "REQMUX3,DMA global request select register m (m=0~15)" hexmask.long.byte 0x0C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x10 "REQMUX4,DMA global request select register m (m=0~15)" hexmask.long.byte 0x10 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x14 "REQMUX5,DMA global request select register m (m=0~15)" hexmask.long.byte 0x14 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x18 "REQMUX6,DMA global request select register m (m=0~15)" hexmask.long.byte 0x18 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x1C "REQMUX7,DMA global request select register m (m=0~15)" hexmask.long.byte 0x1C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x20 "REQMUX8,DMA global request select register m (m=0~15)" hexmask.long.byte 0x20 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x24 "REQMUX9,DMA global request select register m (m=0~15)" hexmask.long.byte 0x24 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x28 "REQMUX10,DMA global request select register m (m=0~15)" hexmask.long.byte 0x28 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x2C "REQMUX11,DMA global request select register m (m=0~15)" hexmask.long.byte 0x2C 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x30 "REQMUX12,DMA global request select register m (m=0~15)" hexmask.long.byte 0x30 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x34 "REQMUX13,DMA global request select register m (m=0~15)" hexmask.long.byte 0x34 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x38 "REQMUX14,DMA global request select register m (m=0~15)" hexmask.long.byte 0x38 0.--7. 1. "REQSEL,DMA Global Request Selection" line.long 0x3C "REQMUX15,DMA global request select register m (m=0~15)" hexmask.long.byte 0x3C 0.--7. 1. "REQSEL,DMA Global Request Selection" group.long ad:0xD0031000++0x03 line.long 0x00 "C0SRCADDR,Channel n Source Address Register" group.long ad:0xD0031080++0x03 line.long 0x00 "C1SRCADDR,Channel n Source Address Register" group.long ad:0xD0031100++0x03 line.long 0x00 "C2SRCADDR,Channel n Source Address Register" group.long ad:0xD0031180++0x03 line.long 0x00 "C3SRCADDR,Channel n Source Address Register" group.long ad:0xD0031200++0x03 line.long 0x00 "C4SRCADDR,Channel n Source Address Register" group.long ad:0xD0031280++0x03 line.long 0x00 "C5SRCADDR,Channel n Source Address Register" group.long ad:0xD0031300++0x03 line.long 0x00 "C6SRCADDR,Channel n Source Address Register" group.long ad:0xD0031380++0x03 line.long 0x00 "C7SRCADDR,Channel n Source Address Register" group.long ad:0xD0031004++0x03 line.long 0x00 "C0DESTADR,Channel n Destination Address Register" group.long ad:0xD0031084++0x03 line.long 0x00 "C1DESTADR,Channel n Destination Address Register" group.long ad:0xD0031104++0x03 line.long 0x00 "C2DESTADR,Channel n Destination Address Register" group.long ad:0xD0031184++0x03 line.long 0x00 "C3DESTADR,Channel n Destination Address Register" group.long ad:0xD0031204++0x03 line.long 0x00 "C4DESTADR,Channel n Destination Address Register" group.long ad:0xD0031284++0x03 line.long 0x00 "C5DESTADR,Channel n Destination Address Register" group.long ad:0xD0031304++0x03 line.long 0x00 "C6DESTADR,Channel n Destination Address Register" group.long ad:0xD0031384++0x03 line.long 0x00 "C7DESTADR,Channel n Destination Address Register" group.long ad:0xD0031008++0x03 line.long 0x00 "C0LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD0031088++0x03 line.long 0x00 "C1LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD0031108++0x03 line.long 0x00 "C2LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD0031188++0x03 line.long 0x00 "C3LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD0031208++0x03 line.long 0x00 "C4LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD0031288++0x03 line.long 0x00 "C5LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD0031308++0x03 line.long 0x00 "C6LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD0031388++0x03 line.long 0x00 "C7LLIREG,Channel n Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD003100C++0x03 line.long 0x00 "C0CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD003108C++0x03 line.long 0x00 "C1CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD003110C++0x03 line.long 0x00 "C2CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD003118C++0x03 line.long 0x00 "C3CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD003120C++0x03 line.long 0x00 "C4CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD003128C++0x03 line.long 0x00 "C5CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD003130C++0x03 line.long 0x00 "C6CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD003138C++0x03 line.long 0x00 "C7CONTROL,Channel n Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD0031010++0x03 line.long 0x00 "C0CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xD0031090++0x03 line.long 0x00 "C1CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xD0031110++0x03 line.long 0x00 "C2CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xD0031190++0x03 line.long 0x00 "C3CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xD0031210++0x03 line.long 0x00 "C4CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xD0031290++0x03 line.long 0x00 "C5CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xD0031310++0x03 line.long 0x00 "C6CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xD0031390++0x03 line.long 0x00 "C7CONFIG,Channel n Configuration Register" hexmask.long.byte 0x00 24.--30. 1. "DESTPERH,Destination Peripheral" hexmask.long.byte 0x00 16.--22. 1. "SRCPERH,Source Peripheral" bitfld.long 0x00 14. "H,Halt" "0,1" rbitfld.long 0x00 13. "A,Active" "0,1" bitfld.long 0x00 10. "TC,Terminal Count Signal Mask" "0,1" bitfld.long 0x00 9. "ITC,Terminal Count Interrupt Mask" "0,1" bitfld.long 0x00 8. "IE,Interrupt Error Mask" "0,1" newline bitfld.long 0x00 4.--6. "FLOWCTR,Flow Control and Transfer Type" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. "E,Channel Enable" "0,1" group.long ad:0xD0031014++0x03 line.long 0x00 "C0ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xD0031094++0x03 line.long 0x00 "C1ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xD0031114++0x03 line.long 0x00 "C2ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xD0031194++0x03 line.long 0x00 "C3ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xD0031214++0x03 line.long 0x00 "C4ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xD0031294++0x03 line.long 0x00 "C5ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xD0031314++0x03 line.long 0x00 "C6ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xD0031394++0x03 line.long 0x00 "C7ADVCONFIG,Channel n Advance Configuration Register" bitfld.long 0x00 28. "ARB,Arbitration Mode" "0,1" bitfld.long 0x00 24. "DAISYEN,Daisy Chain Enable" "0,1" bitfld.long 0x00 20. "CMODEN,Continuous Mode Enable" "0,1" bitfld.long 0x00 16.--18. "DBMODE,Double Buffer Mode Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 14. "DCBWIC,Destination Circular Buffer Wait for Interrupt Clear" "0,1" bitfld.long 0x00 13. "SCBEN,Source Circular Buffer Enable" "0,1" bitfld.long 0x00 12. "DCBEN,Destination Circular Buffer Enable" "0,1" newline bitfld.long 0x00 8.--11. "SCBSIZE,Source Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DCBSIZE,Destination Circular Buffer Size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. "INTSCB,Interrupt Source Circular Buffer Enable" "0,1" bitfld.long 0x00 2. "INTDCB,Interrupt Destination Circular Buffer Enable" "0,1" bitfld.long 0x00 1. "INTSCBMSK,Interrupt Source Circular Buffer Mask" "0,1" bitfld.long 0x00 0. "INTDCBMSK,Interrupt Destination Circular Buffer Mask" "0,1" group.long ad:0xD0031018++0x03 line.long 0x00 "C0PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xD0031098++0x03 line.long 0x00 "C1PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xD0031118++0x03 line.long 0x00 "C2PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xD0031198++0x03 line.long 0x00 "C3PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xD0031218++0x03 line.long 0x00 "C4PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xD0031298++0x03 line.long 0x00 "C5PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xD0031318++0x03 line.long 0x00 "C6PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xD0031398++0x03 line.long 0x00 "C7PATCONFIG,Channel n Data Match Pattern Configuration Register" bitfld.long 0x00 16.--17. "SIZE,Pattern Size" "0,1,2,3" bitfld.long 0x00 8. "PATSTOP,Transfer Stop when Pattern Matched" "0,1" bitfld.long 0x00 1. "INTPATEN,Interrupt Pattern Matched Enable" "0,1" bitfld.long 0x00 0. "INTPATMSK,Interrupt Pattern Matched Mask" "0,1" group.long ad:0xD003101C++0x03 line.long 0x00 "C0SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xD003109C++0x03 line.long 0x00 "C1SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xD003111C++0x03 line.long 0x00 "C2SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xD003119C++0x03 line.long 0x00 "C3SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xD003121C++0x03 line.long 0x00 "C4SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xD003129C++0x03 line.long 0x00 "C5SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xD003131C++0x03 line.long 0x00 "C6SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xD003139C++0x03 line.long 0x00 "C7SRCADDRINIT,Channel n Initial Source Address Register" group.long ad:0xD0031020++0x03 line.long 0x00 "C0DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xD00310A0++0x03 line.long 0x00 "C1DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xD0031120++0x03 line.long 0x00 "C2DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xD00311A0++0x03 line.long 0x00 "C3DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xD0031220++0x03 line.long 0x00 "C4DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xD00312A0++0x03 line.long 0x00 "C5DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xD0031320++0x03 line.long 0x00 "C6DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xD00313A0++0x03 line.long 0x00 "C7DESTADDRINIT,Channel n Initial Destination Address Register" group.long ad:0xD0031024++0x03 line.long 0x00 "C0LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD00310A4++0x03 line.long 0x00 "C1LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD0031124++0x03 line.long 0x00 "C2LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD00311A4++0x03 line.long 0x00 "C3LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD0031224++0x03 line.long 0x00 "C4LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD00312A4++0x03 line.long 0x00 "C5LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD0031324++0x03 line.long 0x00 "C6LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD00313A4++0x03 line.long 0x00 "C7LLIREGINIT,Channel n Initial Linked List Item Register" hexmask.long 0x00 2.--31. 1. "LLI,Linked List Item" bitfld.long 0x00 0. "LM,AHB Master Select for Loading the Next LLI" "0,1" group.long ad:0xD0031028++0x03 line.long 0x00 "C0CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD00310A8++0x03 line.long 0x00 "C1CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD0031128++0x03 line.long 0x00 "C2CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD00311A8++0x03 line.long 0x00 "C3CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD0031228++0x03 line.long 0x00 "C4CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD00312A8++0x03 line.long 0x00 "C5CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD0031328++0x03 line.long 0x00 "C6CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD00313A8++0x03 line.long 0x00 "C7CONTROLINIT,Channel n Initial Control Register" bitfld.long 0x00 31. "I,Terminal Count Interrupt Enable" "0,1" bitfld.long 0x00 28.--30. "PROT,Protection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 27. "DI,Destination Increment" "0,1" bitfld.long 0x00 26. "SI,Source Increment" "0,1" bitfld.long 0x00 25. "D,Destination AHB Master Select" "0,1" bitfld.long 0x00 24. "S,Source AHB Master Select" "0,1" bitfld.long 0x00 21.--23. "DWIDTH,Destination Transfer Width" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "SWIDTH,Source Transfer Width" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "DBSIZE,Destination Burst Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "SBSIZE,Source Burst Size" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--11. 1. "TRANSIZE,Transfer Size" group.long ad:0xD003102C++0x03 line.long 0x00 "C0SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xD00310AC++0x03 line.long 0x00 "C1SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xD003112C++0x03 line.long 0x00 "C2SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xD00311AC++0x03 line.long 0x00 "C3SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xD003122C++0x03 line.long 0x00 "C4SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xD00312AC++0x03 line.long 0x00 "C5SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xD003132C++0x03 line.long 0x00 "C6SWADDR,Channel n Double Buffer Switch Address Register" group.long ad:0xD00313AC++0x03 line.long 0x00 "C7SWADDR,Channel n Double Buffer Switch Address Register" wgroup.long ad:0xD0031030++0x03 line.long 0x00 "C0DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xD00310B0++0x03 line.long 0x00 "C1DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xD0031130++0x03 line.long 0x00 "C2DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xD00311B0++0x03 line.long 0x00 "C3DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xD0031230++0x03 line.long 0x00 "C4DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xD00312B0++0x03 line.long 0x00 "C5DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xD0031330++0x03 line.long 0x00 "C6DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" wgroup.long ad:0xD00313B0++0x03 line.long 0x00 "C7DBCONTROL,Channel n Double Buffer Control Register" bitfld.long 0x00 0. "SW,Double Buffering Software Switch" "0,1" group.long ad:0xD0031034++0x03 line.long 0x00 "C0DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xD00310B4++0x03 line.long 0x00 "C1DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xD0031134++0x03 line.long 0x00 "C2DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xD00311B4++0x03 line.long 0x00 "C3DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xD0031234++0x03 line.long 0x00 "C4DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xD00312B4++0x03 line.long 0x00 "C5DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xD0031334++0x03 line.long 0x00 "C6DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xD00313B4++0x03 line.long 0x00 "C7DBSTS,Channel n Double Buffer Status Register" rbitfld.long 0x00 2. "ACTBUF,Active Buffer" "0,1" bitfld.long 0x00 1. "FROZEN1,Buffer1 Frozen" "0,1" bitfld.long 0x00 0. "FROZEN0,Buffer0 Frozen" "0,1" group.long ad:0xD0031038++0x03 line.long 0x00 "C0PAT,Channel n Data Match Pattern Register" group.long ad:0xD00310B8++0x03 line.long 0x00 "C1PAT,Channel n Data Match Pattern Register" group.long ad:0xD0031138++0x03 line.long 0x00 "C2PAT,Channel n Data Match Pattern Register" group.long ad:0xD00311B8++0x03 line.long 0x00 "C3PAT,Channel n Data Match Pattern Register" group.long ad:0xD0031238++0x03 line.long 0x00 "C4PAT,Channel n Data Match Pattern Register" group.long ad:0xD00312B8++0x03 line.long 0x00 "C5PAT,Channel n Data Match Pattern Register" group.long ad:0xD0031338++0x03 line.long 0x00 "C6PAT,Channel n Data Match Pattern Register" group.long ad:0xD00313B8++0x03 line.long 0x00 "C7PAT,Channel n Data Match Pattern Register" group.long ad:0xD003103C++0x03 line.long 0x00 "C0PATMSK,Channel n Data Match Pattern Register" group.long ad:0xD00310BC++0x03 line.long 0x00 "C1PATMSK,Channel n Data Match Pattern Register" group.long ad:0xD003113C++0x03 line.long 0x00 "C2PATMSK,Channel n Data Match Pattern Register" group.long ad:0xD00311BC++0x03 line.long 0x00 "C3PATMSK,Channel n Data Match Pattern Register" group.long ad:0xD003123C++0x03 line.long 0x00 "C4PATMSK,Channel n Data Match Pattern Register" group.long ad:0xD00312BC++0x03 line.long 0x00 "C5PATMSK,Channel n Data Match Pattern Register" group.long ad:0xD003133C++0x03 line.long 0x00 "C6PATMSK,Channel n Data Match Pattern Register" group.long ad:0xD00313BC++0x03 line.long 0x00 "C7PATMSK,Channel n Data Match Pattern Register" rgroup.long ad:0xD0031040++0x03 line.long 0x00 "C0INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xD00310C0++0x03 line.long 0x00 "C1INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xD0031140++0x03 line.long 0x00 "C2INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xD00311C0++0x03 line.long 0x00 "C3INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xD0031240++0x03 line.long 0x00 "C4INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xD00312C0++0x03 line.long 0x00 "C5INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xD0031340++0x03 line.long 0x00 "C6INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xD00313C0++0x03 line.long 0x00 "C7INT,Channel n Interrupt Status Register" bitfld.long 0x00 5. "INTTHR,Interrupt Transfer Size Threshold Status after Masking" "0,1" bitfld.long 0x00 4. "INTPATSTAT,Interrupt Pattern Request Status after Masking" "0,1" bitfld.long 0x00 3. "INTDCBSTAT,Interrupt Destination Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 2. "INTSCBSTAT,Interrupt Source Circular Buffer Status after Masking" "0,1" bitfld.long 0x00 1. "INTERRSTAT,Interrupt Error Status after Masking" "0,1" bitfld.long 0x00 0. "INTTCSTAT,Interrupt Terminal Count Request Status after Masking" "0,1" rgroup.long ad:0xD0031044++0x03 line.long 0x00 "C0RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xD00310C4++0x03 line.long 0x00 "C1RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xD0031144++0x03 line.long 0x00 "C2RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xD00311C4++0x03 line.long 0x00 "C3RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xD0031244++0x03 line.long 0x00 "C4RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xD00312C4++0x03 line.long 0x00 "C5RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xD0031344++0x03 line.long 0x00 "C6RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" rgroup.long ad:0xD00313C4++0x03 line.long 0x00 "C7RAWINT,Channel n Raw Interrupt Status Register" bitfld.long 0x00 5. "RAWINTTHR,Status of the Transfer Size Threshold Prior to Masking" "0,1" bitfld.long 0x00 4. "RAWINTPAT,Status of the Pattern Interrupt Prior to Masking" "0,1" bitfld.long 0x00 3. "RAWINTDCB,Status of the Destination Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 2. "RAWINTSCB,Status of the Source Circular Buffer Interrupt Prior to Masking" "0,1" bitfld.long 0x00 1. "RAWINTER,Status of the Error Interrupt Prior to Masking" "0,1" bitfld.long 0x00 0. "RAWINTTC,Status of the Terminal Count Interrupt Prior to Masking" "0,1" wgroup.long ad:0xD0031048++0x03 line.long 0x00 "C0INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xD00310C8++0x03 line.long 0x00 "C1INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xD0031148++0x03 line.long 0x00 "C2INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xD00311C8++0x03 line.long 0x00 "C3INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xD0031248++0x03 line.long 0x00 "C4INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xD00312C8++0x03 line.long 0x00 "C5INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xD0031348++0x03 line.long 0x00 "C6INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xD00313C8++0x03 line.long 0x00 "C7INTCLR,Channel n Interrupt Clear Register" bitfld.long 0x00 5. "INTTHRCLR,Transfer Size Threshold Clear" "0,1" bitfld.long 0x00 4. "INTPATCLR,Pattern Request Clear" "0,1" bitfld.long 0x00 3. "INTDCBCLR,Destination Circular Buffer Request Clear" "0,1" bitfld.long 0x00 2. "INTSCBCLR,Source Circular Buffer Request Clear" "0,1" bitfld.long 0x00 1. "INTERRCLR,Interrupt Error Request Clear" "0,1" bitfld.long 0x00 0. "INTTCCLR,Terminal Count Request Clear" "0,1" wgroup.long ad:0xD003104C++0x03 line.long 0x00 "C0ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xD00310CC++0x03 line.long 0x00 "C1ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xD003114C++0x03 line.long 0x00 "C2ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xD00311CC++0x03 line.long 0x00 "C3ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xD003124C++0x03 line.long 0x00 "C4ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xD00312CC++0x03 line.long 0x00 "C5ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xD003134C++0x03 line.long 0x00 "C6ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" wgroup.long ad:0xD00313CC++0x03 line.long 0x00 "C7ERRCLR,Channel n Error Clear Register" bitfld.long 0x00 2. "LCRC,Linked List CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 1. "DCRC,Data CRC Error Value and Valid Clear" "0,1" bitfld.long 0x00 0. "REG,Register Redundancy Check Error Clear" "0,1" rgroup.long ad:0xD0031050++0x03 line.long 0x00 "C0STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xD00310D0++0x03 line.long 0x00 "C1STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xD0031150++0x03 line.long 0x00 "C2STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xD00311D0++0x03 line.long 0x00 "C3STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xD0031250++0x03 line.long 0x00 "C4STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xD00312D0++0x03 line.long 0x00 "C5STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xD0031350++0x03 line.long 0x00 "C6STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xD00313D0++0x03 line.long 0x00 "C7STTSTMP,Channel n Transfer Start Timestamp Register" rgroup.long ad:0xD0031054++0x03 line.long 0x00 "C0EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xD00310D4++0x03 line.long 0x00 "C1EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xD0031154++0x03 line.long 0x00 "C2EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xD00311D4++0x03 line.long 0x00 "C3EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xD0031254++0x03 line.long 0x00 "C4EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xD00312D4++0x03 line.long 0x00 "C5EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xD0031354++0x03 line.long 0x00 "C6EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xD00313D4++0x03 line.long 0x00 "C7EDTSTMP,Channel n Transfer End Timestamp Register" rgroup.long ad:0xD0031058++0x03 line.long 0x00 "C0TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xD00310D8++0x03 line.long 0x00 "C1TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xD0031158++0x03 line.long 0x00 "C2TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xD00311D8++0x03 line.long 0x00 "C3TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xD0031258++0x03 line.long 0x00 "C4TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xD00312D8++0x03 line.long 0x00 "C5TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xD0031358++0x03 line.long 0x00 "C6TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" rgroup.long ad:0xD00313D8++0x03 line.long 0x00 "C7TSTMPVLD,Channel n Timestamp Valid Status Register" bitfld.long 0x00 1. "EDVLD,Channel n Transfer End Timestamp Valid Status" "0,1" bitfld.long 0x00 0. "STVLD,Channel n Transfer Start Timestamp Valid Status" "0,1" wgroup.long ad:0xD003105C++0x03 line.long 0x00 "C0TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xD00310DC++0x03 line.long 0x00 "C1TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xD003115C++0x03 line.long 0x00 "C2TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xD00311DC++0x03 line.long 0x00 "C3TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xD003125C++0x03 line.long 0x00 "C4TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xD00312DC++0x03 line.long 0x00 "C5TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xD003135C++0x03 line.long 0x00 "C6TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" wgroup.long ad:0xD00313DC++0x03 line.long 0x00 "C7TSTMPCLR,Channel n Timestamp Clear Register" bitfld.long 0x00 1. "EDCLR,Channel n Transfer End Timestamp Clear" "0,1" bitfld.long 0x00 0. "STCLR,Channel n Transfer Start Timestamp Clear" "0,1" group.long ad:0xD0031060++0x03 line.long 0x00 "C0CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xD00310E0++0x03 line.long 0x00 "C1CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xD0031160++0x03 line.long 0x00 "C2CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xD00311E0++0x03 line.long 0x00 "C3CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xD0031260++0x03 line.long 0x00 "C4CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xD00312E0++0x03 line.long 0x00 "C5CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xD0031360++0x03 line.long 0x00 "C6CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" group.long ad:0xD00313E0++0x03 line.long 0x00 "C7CRCCONFIG,Channel n CRC Configuration Register" bitfld.long 0x00 18.--19. "LLCRCMSK,Linked List CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 16.--17. "DCRCMSK,Data CRC Check Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "LLC,Linked List CRC Check Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "DCRCEN,Data CRC Check Enable" "0,1,2,3" rgroup.long ad:0xD0031064++0x03 line.long 0x00 "C0SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xD00310E4++0x03 line.long 0x00 "C1SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xD0031164++0x03 line.long 0x00 "C2SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xD00311E4++0x03 line.long 0x00 "C3SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xD0031264++0x03 line.long 0x00 "C4SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xD00312E4++0x03 line.long 0x00 "C5SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xD0031364++0x03 line.long 0x00 "C6SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xD00313E4++0x03 line.long 0x00 "C7SRCCRC,Channel n Source CRC Register" bitfld.long 0x00 8. "VLD,Source Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Source Data CRC Value" rgroup.long ad:0xD0031068++0x03 line.long 0x00 "C0DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xD00310E8++0x03 line.long 0x00 "C1DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xD0031168++0x03 line.long 0x00 "C2DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xD00311E8++0x03 line.long 0x00 "C3DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xD0031268++0x03 line.long 0x00 "C4DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xD00312E8++0x03 line.long 0x00 "C5DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xD0031368++0x03 line.long 0x00 "C6DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xD00313E8++0x03 line.long 0x00 "C7DESTCRC,Channel n Destination CRC Register" bitfld.long 0x00 8. "VLD,Destination Data CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Destination Data CRC Value" rgroup.long ad:0xD003106C++0x03 line.long 0x00 "C0LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xD00310EC++0x03 line.long 0x00 "C1LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xD003116C++0x03 line.long 0x00 "C2LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xD00311EC++0x03 line.long 0x00 "C3LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xD003126C++0x03 line.long 0x00 "C4LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xD00312EC++0x03 line.long 0x00 "C5LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xD003136C++0x03 line.long 0x00 "C6LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" rgroup.long ad:0xD00313EC++0x03 line.long 0x00 "C7LLICRC,Channel n Linked List CRC Register" bitfld.long 0x00 8. "VLD,Linked List CRC Valid" "0,1" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Linked List CRC Value" group.long ad:0xD0031070++0x03 line.long 0x00 "C0EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xD00310F0++0x03 line.long 0x00 "C1EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xD0031170++0x03 line.long 0x00 "C2EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xD00311F0++0x03 line.long 0x00 "C3EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xD0031270++0x03 line.long 0x00 "C4EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xD00312F0++0x03 line.long 0x00 "C5EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xD0031370++0x03 line.long 0x00 "C6EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xD00313F0++0x03 line.long 0x00 "C7EXPLLICRC,Channel n Expected Linked List CRC Register" hexmask.long.byte 0x00 0.--7. 1. "CRCVAL,Expected Linked List CRC Value" group.long ad:0xD0031074++0x03 line.long 0x00 "C0THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xD00310F4++0x03 line.long 0x00 "C1THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xD0031174++0x03 line.long 0x00 "C2THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xD00311F4++0x03 line.long 0x00 "C3THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xD0031274++0x03 line.long 0x00 "C4THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xD00312F4++0x03 line.long 0x00 "C5THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xD0031374++0x03 line.long 0x00 "C6THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" group.long ad:0xD00313F4++0x03 line.long 0x00 "C7THR,Channel n Transfer Size Threshold Register" bitfld.long 0x00 13. "INTTHREN,Transfer Size Threshold Interrupt Enable" "0,1" bitfld.long 0x00 12. "INTTHRMSK,Transfer Size Threshold Interrupt Mask" "0,1" hexmask.long.word 0x00 0.--11. 1. "THR,Transfer Size Threshold" tree.end tree.end tree "EXTI" group.long ad:0xC000460C++0x13 line.long 0x00 "EXIFLT,External Input Channel Filter Register" bitfld.long 0x00 28.--31. "DFDTH,Digital Filter Depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "FDCDFSC,Digital Filtered Clock Pre-Division Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 18. "FLTEQ7B,Enable the REQ7B Filter" "0,1" bitfld.long 0x00 17. "FLTEQ6B,Enable the REQ6B Filter" "0,1" bitfld.long 0x00 16. "FLTEQ7C,Enable the REQ7C Filter" "0,1" bitfld.long 0x00 15. "FLTEQ3B,Enable the REQ3B Filter" "0,1" bitfld.long 0x00 14. "FLTEQ2B,Enable the REQ2B Filter" "0,1" bitfld.long 0x00 13. "FLTEQ4D,Enable the REQ4D Filter" "0,1" bitfld.long 0x00 12. "FLTEQ6D,Enable the REQ6D Filter" "0,1" bitfld.long 0x00 11. "FLTEQ7A,Enable the REQ7A Filter" "0,1" bitfld.long 0x00 10. "FLTEQ1A,Enable the REQ1A Filter" "0,1" newline bitfld.long 0x00 9. "FLTEQ6A,Enable the REQ6A Filter" "0,1" bitfld.long 0x00 8. "FLTEQ4A,Enable the REQ4A Filter" "0,1" bitfld.long 0x00 7. "FLTEQ2C,Enable the REQ2C Filter" "0,1" bitfld.long 0x00 6. "FLTEQ3C,Enable the REQ3C Filter" "0,1" bitfld.long 0x00 5. "FLTEQ1C,Enable the REQ1C Filter" "0,1" bitfld.long 0x00 4. "FLTEQ0C,Enable the REQ0C Filter" "0,1" bitfld.long 0x00 3. "FLTEQ3A,Enable the REQ3A Filter" "0,1" bitfld.long 0x00 2. "FLTEQ2A,Enable the REQ2A Filter" "0,1" bitfld.long 0x00 1. "FLTEQ5A,Enable the REQ5A Filter" "0,1" bitfld.long 0x00 0. "FLTEQ0A,Enable the REQ0A Filter" "0,1" line.long 0x04 "ETIPC0,External Input Channel Control Register 0" bitfld.long 0x04 28.--30. "INNOP1,Input Node Pointer 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 27. "ETIPEN1,External Input Enable 1" "0,1" bitfld.long 0x04 26. "LEDEEN1,Level Detect Enable 1" "0,1" bitfld.long 0x04 25. "RIEEN1,Rising Edge Enable 1" "0,1" bitfld.long 0x04 24. "FAEEN1,Falling Edge Enable 1" "0,1" bitfld.long 0x04 20.--22. "ETIPS1,External Input Selection 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--14. "INNOP0,Enter the Node Pointer 0" "0,1,2,3,4,5,6,7" bitfld.long 0x04 11. "ETIPEN0,External Input Enable 0" "0,1" bitfld.long 0x04 10. "LEDEEN0,Level Detect Enable 0" "0,1" bitfld.long 0x04 9. "RIEEN0,Rising Edge Enable 0" "0,1" bitfld.long 0x04 8. "FAEEN0,Lower Edge Enable 0" "0,1" newline bitfld.long 0x04 4.--6. "ETIPS0,External Input Selection 0" "0,1,2,3,4,5,6,7" line.long 0x08 "ETIPC1,External Input Channel Control Register 1" bitfld.long 0x08 28.--30. "INNOP1,Input Node Pointer 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "ETIPEN1,External Input Enable 1" "0,1" bitfld.long 0x08 26. "LEDEEN1,Level Detect Enable 1" "0,1" bitfld.long 0x08 25. "RIEEN1,Rising Edge Enable 1" "0,1" bitfld.long 0x08 24. "FAEEN1,Falling Edge Enable 1" "0,1" bitfld.long 0x08 20.--22. "ETIPS1,External Input Selection 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. "INNOP0,Enter the Node Pointer 0" "0,1,2,3,4,5,6,7" bitfld.long 0x08 11. "ETIPEN0,External Input Enable 0" "0,1" bitfld.long 0x08 10. "LEDEEN0,Level Detect Enable 0" "0,1" bitfld.long 0x08 9. "RIEEN0,Rising Edge Enable 0" "0,1" bitfld.long 0x08 8. "FAEEN0,Lower Edge Enable 0" "0,1" newline bitfld.long 0x08 4.--6. "ETIPS0,External Input Selection 0" "0,1,2,3,4,5,6,7" line.long 0x0C "ETIPC2,External Input Channel Control Register 2" bitfld.long 0x0C 28.--30. "INNOP1,Input Node Pointer 1" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 27. "ETIPEN1,External Input Enable 1" "0,1" bitfld.long 0x0C 26. "LEDEEN1,Level Detect Enable 1" "0,1" bitfld.long 0x0C 25. "RIEEN1,Rising Edge Enable 1" "0,1" bitfld.long 0x0C 24. "FAEEN1,Falling Edge Enable 1" "0,1" bitfld.long 0x0C 20.--22. "ETIPS1,External Input Selection 1" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 12.--14. "INNOP0,Enter the Node Pointer 0" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 11. "ETIPEN0,External Input Enable 0" "0,1" bitfld.long 0x0C 10. "LEDEEN0,Level Detect Enable 0" "0,1" bitfld.long 0x0C 9. "RIEEN0,Rising Edge Enable 0" "0,1" bitfld.long 0x0C 8. "FAEEN0,Lower Edge Enable 0" "0,1" newline bitfld.long 0x0C 4.--6. "ETIPS0,External Input Selection 0" "0,1,2,3,4,5,6,7" line.long 0x10 "ETIPC3,External Input Channel Control Register 3" bitfld.long 0x10 28.--30. "INNOP1,Input Node Pointer 1" "0,1,2,3,4,5,6,7" bitfld.long 0x10 27. "ETIPEN1,External Input Enable 1" "0,1" bitfld.long 0x10 26. "LEDEEN1,Level Detect Enable 1" "0,1" bitfld.long 0x10 25. "RIEEN1,Rising Edge Enable 1" "0,1" bitfld.long 0x10 24. "FAEEN1,Falling Edge Enable 1" "0,1" bitfld.long 0x10 20.--22. "ETIPS1,External Input Selection 1" "0,1,2,3,4,5,6,7" bitfld.long 0x10 12.--14. "INNOP0,Enter the Node Pointer 0" "0,1,2,3,4,5,6,7" bitfld.long 0x10 11. "ETIPEN0,External Input Enable 0" "0,1" bitfld.long 0x10 10. "LEDEEN0,Level Detect Enable 0" "0,1" bitfld.long 0x10 9. "RIEEN0,Rising Edge Enable 0" "0,1" bitfld.long 0x10 8. "FAEEN0,Lower Edge Enable 0" "0,1" newline bitfld.long 0x10 4.--6. "ETIPS0,External Input Selection 0" "0,1,2,3,4,5,6,7" rgroup.long ad:0xC0004620++0x03 line.long 0x00 "ETIPF,External Input Flag Bit Register" bitfld.long 0x00 7. "EIFBIC7,External Event Flag of Channel x" "0,1" bitfld.long 0x00 6. "EIFBIC6,External Event Flag of Channel x" "0,1" bitfld.long 0x00 5. "EIFBIC5,External Event Flag of Channel x" "0,1" bitfld.long 0x00 4. "EIFBIC4,External Event Flag of Channel x" "0,1" bitfld.long 0x00 3. "EIFBIC3,External Event Flag of Channel x" "0,1" bitfld.long 0x00 2. "EIFBIC2,External Event Flag of Channel x" "0,1" bitfld.long 0x00 1. "EIFBIC1,External Event Flag of Channel x" "0,1" bitfld.long 0x00 0. "EIFBIC0,External Event Flag of Channel x" "0,1" wgroup.long ad:0xC0004624++0x03 line.long 0x00 "FLBMR,Flag Bit Modification Register" bitfld.long 0x00 23. "CICFB7,Clear Flag Bit EIFBICx" "0,1" bitfld.long 0x00 22. "CICFB6,Clear Flag Bit EIFBICx" "0,1" bitfld.long 0x00 21. "CICFB5,Clear Flag Bit EIFBICx" "0,1" bitfld.long 0x00 20. "CICFB4,Clear Flag Bit EIFBICx" "0,1" bitfld.long 0x00 19. "CICFB3,Clear Flag Bit EIFBICx" "0,1" bitfld.long 0x00 18. "CICFB2,Clear Flag Bit EIFBICx" "0,1" bitfld.long 0x00 17. "CICFB1,Clear Flag Bit EIFBICx" "0,1" bitfld.long 0x00 16. "CICFB0,Clear Flag Bit EIFBICx" "0,1" bitfld.long 0x00 7. "SFBIC7,Set Flag Bit EIFBICx" "0,1" bitfld.long 0x00 6. "SFBIC6,Set Flag Bit EIFBICx" "0,1" bitfld.long 0x00 5. "SFBIC5,Set Flag Bit EIFBICx" "0,1" newline bitfld.long 0x00 4. "SFBIC4,Set Flag Bit EIFBICx" "0,1" bitfld.long 0x00 3. "SFBIC3,Set Flag Bit EIFBICx" "0,1" bitfld.long 0x00 2. "SFBIC2,Set Flag Bit EIFBICx" "0,1" bitfld.long 0x00 1. "SFBIC1,Set Flag Bit EIFBICx" "0,1" bitfld.long 0x00 0. "SFBIC0,Set Flag Bit EIFBICx" "0,1" rgroup.long ad:0xC0004628++0x03 line.long 0x00 "PADERR,Pattern Detection Result Register" bitfld.long 0x00 7. "MDRC7,Pattern Detect Result for Output Channel y" "0,1" bitfld.long 0x00 6. "MDRC6,Pattern Detect Result for Output Channel y" "0,1" bitfld.long 0x00 5. "MDRC5,Pattern Detect Result for Output Channel y" "0,1" bitfld.long 0x00 4. "MDRC4,Pattern Detect Result for Output Channel y" "0,1" bitfld.long 0x00 3. "MDRC3,Pattern Detect Result for Output Channel y" "0,1" bitfld.long 0x00 2. "MDRC2,Pattern Detect Result for Output Channel y" "0,1" bitfld.long 0x00 1. "MDRC1,Pattern Detect Result for Output Channel y" "0,1" bitfld.long 0x00 0. "MDRC0,Pattern Detect Result for Output Channel y" "0,1" group.long ad:0xC000462C++0x37 line.long 0x00 "INTGC0,Interrupt Gate Register 0" bitfld.long 0x00 30.--31. "IGM1,Interrupt Gating Mode 1" "0,1,2,3" bitfld.long 0x00 29. "EGEN1,Generate Event Enable 1" "0,1" bitfld.long 0x00 23. "IMCEN17,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x00 22. "IMCEN16,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x00 21. "IMCEN15,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x00 20. "IMCEN14,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x00 19. "IMCEN13,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x00 18. "IMCEN12,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x00 17. "IMCEN11,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x00 16. "IMCEN10,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x00 14.--15. "IGM0,Interrupt Gating Mode 0" "0,1,2,3" newline bitfld.long 0x00 13. "EGEN0,Generate Event Enable 0" "0,1" bitfld.long 0x00 7. "IMCEN07,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x00 6. "IMCEN06,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x00 5. "IMCEN05,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x00 4. "IMCEN04,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x00 3. "IMCEN03,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x00 2. "IMCEN02,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x00 1. "IMCEN01,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x00 0. "IMCEN00,Pattern Enable for Output Channel(2y)" "0,1" line.long 0x04 "INTGC1,Interrupt Gate Register 1" bitfld.long 0x04 30.--31. "IGM1,Interrupt Gating Mode 1" "0,1,2,3" bitfld.long 0x04 29. "EGEN1,Generate Event Enable 1" "0,1" bitfld.long 0x04 23. "IMCEN17,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x04 22. "IMCEN16,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x04 21. "IMCEN15,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x04 20. "IMCEN14,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x04 19. "IMCEN13,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x04 18. "IMCEN12,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x04 17. "IMCEN11,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x04 16. "IMCEN10,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x04 14.--15. "IGM0,Interrupt Gating Mode 0" "0,1,2,3" newline bitfld.long 0x04 13. "EGEN0,Generate Event Enable 0" "0,1" bitfld.long 0x04 7. "IMCEN07,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x04 6. "IMCEN06,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x04 5. "IMCEN05,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x04 4. "IMCEN04,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x04 3. "IMCEN03,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x04 2. "IMCEN02,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x04 1. "IMCEN01,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x04 0. "IMCEN00,Pattern Enable for Output Channel(2y)" "0,1" line.long 0x08 "INTGC2,Interrupt Gate Register 2" bitfld.long 0x08 30.--31. "IGM1,Interrupt Gating Mode 1" "0,1,2,3" bitfld.long 0x08 29. "EGEN1,Generate Event Enable 1" "0,1" bitfld.long 0x08 23. "IMCEN17,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x08 22. "IMCEN16,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x08 21. "IMCEN15,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x08 20. "IMCEN14,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x08 19. "IMCEN13,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x08 18. "IMCEN12,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x08 17. "IMCEN11,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x08 16. "IMCEN10,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x08 14.--15. "IGM0,Interrupt Gating Mode 0" "0,1,2,3" newline bitfld.long 0x08 13. "EGEN0,Generate Event Enable 0" "0,1" bitfld.long 0x08 7. "IMCEN07,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x08 6. "IMCEN06,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x08 5. "IMCEN05,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x08 4. "IMCEN04,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x08 3. "IMCEN03,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x08 2. "IMCEN02,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x08 1. "IMCEN01,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x08 0. "IMCEN00,Pattern Enable for Output Channel(2y)" "0,1" line.long 0x0C "INTGC3,Interrupt Gate Register 3" bitfld.long 0x0C 30.--31. "IGM1,Interrupt Gating Mode 1" "0,1,2,3" bitfld.long 0x0C 29. "EGEN1,Generate Event Enable 1" "0,1" bitfld.long 0x0C 23. "IMCEN17,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x0C 22. "IMCEN16,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x0C 21. "IMCEN15,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x0C 20. "IMCEN14,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x0C 19. "IMCEN13,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x0C 18. "IMCEN12,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x0C 17. "IMCEN11,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x0C 16. "IMCEN10,Pattern Enable for Output Channel(2y+1)" "0,1" bitfld.long 0x0C 14.--15. "IGM0,Interrupt Gating Mode 0" "0,1,2,3" newline bitfld.long 0x0C 13. "EGEN0,Generate Event Enable 0" "0,1" bitfld.long 0x0C 7. "IMCEN07,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x0C 6. "IMCEN06,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x0C 5. "IMCEN05,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x0C 4. "IMCEN04,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x0C 3. "IMCEN03,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x0C 2. "IMCEN02,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x0C 1. "IMCEN01,Pattern Enable for Output Channel(2y)" "0,1" bitfld.long 0x0C 0. "IMCEN00,Pattern Enable for Output Channel(2y)" "0,1" line.long 0x10 "IASSR0,Interrupt and Alarm Signal Status Register 0" hexmask.long.byte 0x10 19.--26. 1. "SAE,ETL Module Alarm State" hexmask.long.tbyte 0x10 0.--18. 1. "SAF,Filter Module Alarm State" line.long 0x14 "IASSR1,Interrupt and Alarm Signal Status Register 1" hexmask.long.byte 0x14 8.--15. 1. "SAM,Connection Matrix Alarm State" hexmask.long.byte 0x14 0.--7. 1. "SAO,OGU Module Alarm State" line.long 0x18 "IASSR2,Interrupt and Alarm Signal Status Register 2" bitfld.long 0x18 5. "SAEX,EXTI Module Alarm State" "0,1" bitfld.long 0x18 4. "SAERE,E Protection Register Access Alarm State" "0,1" bitfld.long 0x18 3. "SAERSE,SE Protection Register Access Alarm State" "0,1" bitfld.long 0x18 2. "SAER,E Protection Register Redundancy Alarm State" "0,1" bitfld.long 0x18 1. "SAEREE,Safe Enable Register Redundancy Alarm State" "0,1" bitfld.long 0x18 0. "SAERCE,Error Clear Register Redundancy Alarm State" "0,1" line.long 0x1C "INTENR0,Interrupt and Alarm Signal Enable Register 0" hexmask.long.byte 0x1C 19.--26. 1. "SAEE,ETL Module Alarm Enable" hexmask.long.tbyte 0x1C 0.--18. 1. "SAFE,Filter Module Alarm Enable" line.long 0x20 "INTENR1,Interrupt and Alarm Signal Enable Register 1" hexmask.long.byte 0x20 8.--15. 1. "SAME,Connection Module Alarm Enable" hexmask.long.byte 0x20 0.--7. 1. "SAOE,OGU Module Alarm Enable" line.long 0x24 "INTENR2,Interrupt and Alarm Signal Enable Register 2" bitfld.long 0x24 5. "SAEXE,EXTI Module Alarm Enable" "0,1" bitfld.long 0x24 4. "SAEREE,E Protection Register Access Alarm Enable" "0,1" bitfld.long 0x24 3. "SAERSEE,SE Protection Register Access Alarm Enable" "0,1" bitfld.long 0x24 2. "SAERE,E Protection Register Redundancy Alarm Enable" "0,1" bitfld.long 0x24 1. "SAEREEE,Safe Enable Register Redundancy Alarm Enable" "0,1" bitfld.long 0x24 0. "SAERCEE,Error Clear Register Redundancy Alarm Enable" "0,1" line.long 0x28 "INTCL0,Interrupt Clean Register 0" hexmask.long.byte 0x28 19.--26. 1. "SAEC,ETL Module Alarm Clear" hexmask.long.tbyte 0x28 0.--18. 1. "SAFC,Filter Module Alarm Clear" line.long 0x2C "INTCL1,Interrupt Clean Register 1" hexmask.long.byte 0x2C 8.--15. 1. "SAMC,Connection Matrix Alarm Clear" hexmask.long.byte 0x2C 0.--7. 1. "SAOC,OGU Module Alarm Clear" line.long 0x30 "INTCL2,Interrupt Clean Register 2" bitfld.long 0x30 5. "SAEXC,EXTI Module Alarm Clear" "0,1" bitfld.long 0x30 4. "SAEREC,E Protection Register Access Alarm Clear" "0,1" bitfld.long 0x30 3. "SAERSEC,SE Protection Register Access Alarm Clear" "0,1" bitfld.long 0x30 2. "SAERC,E Protection Register Redundancy Alarm Clear" "0,1" bitfld.long 0x30 1. "SAEREEC,Safe Enable Register Redundancy Alarm Clear" "0,1" bitfld.long 0x30 0. "SAERCEC,Error Clear Register Redundancy Alarm Clear" "0,1" line.long 0x34 "APBEMR,APB Bus Error Mask Register" bitfld.long 0x34 0. "APBEMR,APB Bus Error Mask" "0,1" tree.end tree "OVC" group.long ad:0xC00C4000++0x0B line.long 0x00 "OVCEN,Overlay Enable Register" bitfld.long 0x00 1. "OVEN1,CPU1 Overlay Enable" "0,1" bitfld.long 0x00 0. "OVEN0,CPU0 Overlay Enable" "0,1" line.long 0x04 "OVCCTR,Overlay Control Register" bitfld.long 0x04 29. "POVCONF,Write-Protection Configuration Bit" "0,1" bitfld.long 0x04 25. "OVCONF1,The Status Bit of Overlay Configuration for CPU1" "0,1" bitfld.long 0x04 24. "OVCONF0,The Status Bit of Overlay Configuration for CPU0" "0,1" bitfld.long 0x04 17. "OVSTOP,Overlay Stop" "0,1" bitfld.long 0x04 16. "OVSTART,Overlay Start" "0,1" bitfld.long 0x04 1. "SEL1,Overlay Control Selection of CPU1" "0,1" bitfld.long 0x04 0. "SEL0,Overlay Control Selection of CPU0" "0,1" line.long 0x08 "SEL0,Overlay Block Selection Register (n = 0~1 for the SEL from CPU0 to CPU1)" group.long ad:0xC00C4208++0x03 line.long 0x00 "SEL1,Overlay Block Selection Register (n = 0~1 for the SEL from CPU0 to CPU1)" rgroup.long ad:0xC00C400C++0x03 line.long 0x00 "MAP0,Overlay Mapping Indication Register (n = 0~1 for the MAP from CPU0 to CPU1)" rgroup.long ad:0xC00C420C++0x03 line.long 0x00 "MAP1,Overlay Mapping Indication Register (n = 0~1 for the MAP from CPU0 to CPU1)" group.long ad:0xC00C4010++0x03 line.long 0x00 "ERRCON0,Overlay Error Control Register (n = 0~1 for the ERRCON from CPU0 to CPU1)" rbitfld.long 0x00 31. "ERRSTATUS,Overlay Error Status Indication" "0,1" rbitfld.long 0x00 30. "INVALIDADR,Invalid Address" "0,1" rbitfld.long 0x00 10. "EALM,ENDINIT Access Alarm Status" "0,1" rbitfld.long 0x00 9. "SEALM,Safety ENDINIT Access Alarm Status" "0,1" rbitfld.long 0x00 8. "BYPASSALM,Bypass Register Redundancy Alarm Status" "0,1" rbitfld.long 0x00 7. "ARSELALM,Read Address Channel Selected Redundant Alarm Status" "0,1" rbitfld.long 0x00 6. "AWSELALM,Write Address Channel Selected Redundant Alarm Status" "0,1" rbitfld.long 0x00 5. "ARECCALM,Read Address Channel ECC Alarm Status" "0,1" newline rbitfld.long 0x00 4. "AWECCALM,Write Address Channel ECC Alarm Status" "0,1" bitfld.long 0x00 0. "INTCLR,Interrupt Clear Control" "0,1" group.long ad:0xC00C4210++0x03 line.long 0x00 "ERRCON1,Overlay Error Control Register (n = 0~1 for the ERRCON from CPU0 to CPU1)" rbitfld.long 0x00 31. "ERRSTATUS,Overlay Error Status Indication" "0,1" rbitfld.long 0x00 30. "INVALIDADR,Invalid Address" "0,1" rbitfld.long 0x00 10. "EALM,ENDINIT Access Alarm Status" "0,1" rbitfld.long 0x00 9. "SEALM,Safety ENDINIT Access Alarm Status" "0,1" rbitfld.long 0x00 8. "BYPASSALM,Bypass Register Redundancy Alarm Status" "0,1" rbitfld.long 0x00 7. "ARSELALM,Read Address Channel Selected Redundant Alarm Status" "0,1" rbitfld.long 0x00 6. "AWSELALM,Write Address Channel Selected Redundant Alarm Status" "0,1" rbitfld.long 0x00 5. "ARECCALM,Read Address Channel ECC Alarm Status" "0,1" newline rbitfld.long 0x00 4. "AWECCALM,Write Address Channel ECC Alarm Status" "0,1" bitfld.long 0x00 0. "INTCLR,Interrupt Clear Control" "0,1" group.long ad:0xC00C4014++0x03 line.long 0x00 "RBAR00,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4020++0x03 line.long 0x00 "RBAR01,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C402C++0x03 line.long 0x00 "RBAR02,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4038++0x03 line.long 0x00 "RBAR03,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4044++0x03 line.long 0x00 "RBAR04,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4050++0x03 line.long 0x00 "RBAR05,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C405C++0x03 line.long 0x00 "RBAR06,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4068++0x03 line.long 0x00 "RBAR07,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4074++0x03 line.long 0x00 "RBAR08,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4080++0x03 line.long 0x00 "RBAR09,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C408C++0x03 line.long 0x00 "RBAR010,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4098++0x03 line.long 0x00 "RBAR011,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C40A4++0x03 line.long 0x00 "RBAR012,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C40B0++0x03 line.long 0x00 "RBAR013,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C40BC++0x03 line.long 0x00 "RBAR014,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C40C8++0x03 line.long 0x00 "RBAR015,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C40D4++0x03 line.long 0x00 "RBAR016,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C40E0++0x03 line.long 0x00 "RBAR017,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C40EC++0x03 line.long 0x00 "RBAR018,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C40F8++0x03 line.long 0x00 "RBAR019,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4104++0x03 line.long 0x00 "RBAR020,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4110++0x03 line.long 0x00 "RBAR021,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C411C++0x03 line.long 0x00 "RBAR022,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4128++0x03 line.long 0x00 "RBAR023,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4134++0x03 line.long 0x00 "RBAR024,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4140++0x03 line.long 0x00 "RBAR025,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C414C++0x03 line.long 0x00 "RBAR026,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4158++0x03 line.long 0x00 "RBAR027,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4164++0x03 line.long 0x00 "RBAR028,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4170++0x03 line.long 0x00 "RBAR029,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C417C++0x03 line.long 0x00 "RBAR030,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4188++0x03 line.long 0x00 "RBAR031,CPU0 Redirected Address Base Register (n = 0~31 for the RBAR0 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4214++0x03 line.long 0x00 "RBAR10,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4220++0x03 line.long 0x00 "RBAR11,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C422C++0x03 line.long 0x00 "RBAR12,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4238++0x03 line.long 0x00 "RBAR13,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4244++0x03 line.long 0x00 "RBAR14,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4250++0x03 line.long 0x00 "RBAR15,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C425C++0x03 line.long 0x00 "RBAR16,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4268++0x03 line.long 0x00 "RBAR17,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4274++0x03 line.long 0x00 "RBAR18,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4280++0x03 line.long 0x00 "RBAR19,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C428C++0x03 line.long 0x00 "RBAR110,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4298++0x03 line.long 0x00 "RBAR111,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C42A4++0x03 line.long 0x00 "RBAR112,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C42B0++0x03 line.long 0x00 "RBAR113,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C42BC++0x03 line.long 0x00 "RBAR114,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C42C8++0x03 line.long 0x00 "RBAR115,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C42D4++0x03 line.long 0x00 "RBAR116,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C42E0++0x03 line.long 0x00 "RBAR117,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C42EC++0x03 line.long 0x00 "RBAR118,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C42F8++0x03 line.long 0x00 "RBAR119,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4304++0x03 line.long 0x00 "RBAR120,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4310++0x03 line.long 0x00 "RBAR121,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C431C++0x03 line.long 0x00 "RBAR122,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4328++0x03 line.long 0x00 "RBAR123,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4334++0x03 line.long 0x00 "RBAR124,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4340++0x03 line.long 0x00 "RBAR125,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C434C++0x03 line.long 0x00 "RBAR126,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4358++0x03 line.long 0x00 "RBAR127,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4364++0x03 line.long 0x00 "RBAR128,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4370++0x03 line.long 0x00 "RBAR129,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C437C++0x03 line.long 0x00 "RBAR130,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4388++0x03 line.long 0x00 "RBAR131,CPU1 Redirected Address Base Register (n = 0~31 for the RBAR1 from block0 to block31)" bitfld.long 0x00 31. "OVBLKEN,Overlay Block Enable" "0,1" bitfld.long 0x00 24.--27. "MEMSEL,Memory Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 5.--21. 1. "BASE,Overlay Base Address" group.long ad:0xC00C4018++0x03 line.long 0x00 "TAR00,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4024++0x03 line.long 0x00 "TAR01,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4030++0x03 line.long 0x00 "TAR02,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C403C++0x03 line.long 0x00 "TAR03,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4048++0x03 line.long 0x00 "TAR04,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4054++0x03 line.long 0x00 "TAR05,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4060++0x03 line.long 0x00 "TAR06,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C406C++0x03 line.long 0x00 "TAR07,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4078++0x03 line.long 0x00 "TAR08,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4084++0x03 line.long 0x00 "TAR09,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4090++0x03 line.long 0x00 "TAR010,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C409C++0x03 line.long 0x00 "TAR011,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C40A8++0x03 line.long 0x00 "TAR012,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C40B4++0x03 line.long 0x00 "TAR013,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C40C0++0x03 line.long 0x00 "TAR014,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C40CC++0x03 line.long 0x00 "TAR015,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C40D8++0x03 line.long 0x00 "TAR016,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C40E4++0x03 line.long 0x00 "TAR017,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C40F0++0x03 line.long 0x00 "TAR018,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C40FC++0x03 line.long 0x00 "TAR019,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4108++0x03 line.long 0x00 "TAR020,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4114++0x03 line.long 0x00 "TAR021,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4120++0x03 line.long 0x00 "TAR022,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C412C++0x03 line.long 0x00 "TAR023,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4138++0x03 line.long 0x00 "TAR024,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4144++0x03 line.long 0x00 "TAR025,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4150++0x03 line.long 0x00 "TAR026,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C415C++0x03 line.long 0x00 "TAR027,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4168++0x03 line.long 0x00 "TAR028,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4174++0x03 line.long 0x00 "TAR029,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4180++0x03 line.long 0x00 "TAR030,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C418C++0x03 line.long 0x00 "TAR031,CPU0 Overlay Target Address Base Register (n = 0~31 for the TAR0 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4218++0x03 line.long 0x00 "TAR10,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4224++0x03 line.long 0x00 "TAR11,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4230++0x03 line.long 0x00 "TAR12,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C423C++0x03 line.long 0x00 "TAR13,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4248++0x03 line.long 0x00 "TAR14,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4254++0x03 line.long 0x00 "TAR15,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4260++0x03 line.long 0x00 "TAR16,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C426C++0x03 line.long 0x00 "TAR17,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4278++0x03 line.long 0x00 "TAR18,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4284++0x03 line.long 0x00 "TAR19,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4290++0x03 line.long 0x00 "TAR110,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C429C++0x03 line.long 0x00 "TAR111,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C42A8++0x03 line.long 0x00 "TAR112,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C42B4++0x03 line.long 0x00 "TAR113,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C42C0++0x03 line.long 0x00 "TAR114,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C42CC++0x03 line.long 0x00 "TAR115,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C42D8++0x03 line.long 0x00 "TAR116,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C42E4++0x03 line.long 0x00 "TAR117,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C42F0++0x03 line.long 0x00 "TAR118,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C42FC++0x03 line.long 0x00 "TAR119,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4308++0x03 line.long 0x00 "TAR120,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4314++0x03 line.long 0x00 "TAR121,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4320++0x03 line.long 0x00 "TAR122,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C432C++0x03 line.long 0x00 "TAR123,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4338++0x03 line.long 0x00 "TAR124,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4344++0x03 line.long 0x00 "TAR125,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4350++0x03 line.long 0x00 "TAR126,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C435C++0x03 line.long 0x00 "TAR127,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4368++0x03 line.long 0x00 "TAR128,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4374++0x03 line.long 0x00 "TAR129,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C4380++0x03 line.long 0x00 "TAR130,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C438C++0x03 line.long 0x00 "TAR131,CPU1 Overlay Target Address Base Register (n = 0~31 for the TAR1 from block0 to block31)" hexmask.long 0x00 5.--31. 1. "BASE,The Overlay Target Base Address for Block n" group.long ad:0xC00C401C++0x03 line.long 0x00 "MASK00,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4028++0x03 line.long 0x00 "MASK01,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4034++0x03 line.long 0x00 "MASK02,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4040++0x03 line.long 0x00 "MASK03,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C404C++0x03 line.long 0x00 "MASK04,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4058++0x03 line.long 0x00 "MASK05,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4064++0x03 line.long 0x00 "MASK06,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4070++0x03 line.long 0x00 "MASK07,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C407C++0x03 line.long 0x00 "MASK08,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4088++0x03 line.long 0x00 "MASK09,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4094++0x03 line.long 0x00 "MASK010,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C40A0++0x03 line.long 0x00 "MASK011,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C40AC++0x03 line.long 0x00 "MASK012,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C40B8++0x03 line.long 0x00 "MASK013,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C40C4++0x03 line.long 0x00 "MASK014,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C40D0++0x03 line.long 0x00 "MASK015,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C40DC++0x03 line.long 0x00 "MASK016,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C40E8++0x03 line.long 0x00 "MASK017,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C40F4++0x03 line.long 0x00 "MASK018,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4100++0x03 line.long 0x00 "MASK019,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C410C++0x03 line.long 0x00 "MASK020,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4118++0x03 line.long 0x00 "MASK021,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4124++0x03 line.long 0x00 "MASK022,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4130++0x03 line.long 0x00 "MASK023,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C413C++0x03 line.long 0x00 "MASK024,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4148++0x03 line.long 0x00 "MASK025,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4154++0x03 line.long 0x00 "MASK026,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4160++0x03 line.long 0x00 "MASK027,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C416C++0x03 line.long 0x00 "MASK028,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4178++0x03 line.long 0x00 "MASK029,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4184++0x03 line.long 0x00 "MASK030,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4190++0x03 line.long 0x00 "MASK031,CPU0 Overlay Mask Register (n = 0~31 for the MASK0 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C421C++0x03 line.long 0x00 "MASK10,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4228++0x03 line.long 0x00 "MASK11,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4234++0x03 line.long 0x00 "MASK12,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4240++0x03 line.long 0x00 "MASK13,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C424C++0x03 line.long 0x00 "MASK14,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4258++0x03 line.long 0x00 "MASK15,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4264++0x03 line.long 0x00 "MASK16,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4270++0x03 line.long 0x00 "MASK17,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C427C++0x03 line.long 0x00 "MASK18,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4288++0x03 line.long 0x00 "MASK19,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4294++0x03 line.long 0x00 "MASK110,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C42A0++0x03 line.long 0x00 "MASK111,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C42AC++0x03 line.long 0x00 "MASK112,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C42B8++0x03 line.long 0x00 "MASK113,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C42C4++0x03 line.long 0x00 "MASK114,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C42D0++0x03 line.long 0x00 "MASK115,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C42DC++0x03 line.long 0x00 "MASK116,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C42E8++0x03 line.long 0x00 "MASK117,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C42F4++0x03 line.long 0x00 "MASK118,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4300++0x03 line.long 0x00 "MASK119,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C430C++0x03 line.long 0x00 "MASK120,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4318++0x03 line.long 0x00 "MASK121,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4324++0x03 line.long 0x00 "MASK122,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4330++0x03 line.long 0x00 "MASK123,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C433C++0x03 line.long 0x00 "MASK124,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4348++0x03 line.long 0x00 "MASK125,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4354++0x03 line.long 0x00 "MASK126,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4360++0x03 line.long 0x00 "MASK127,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C436C++0x03 line.long 0x00 "MASK128,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4378++0x03 line.long 0x00 "MASK129,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4384++0x03 line.long 0x00 "MASK130,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4390++0x03 line.long 0x00 "MASK131,CPU1 Overlay Mask Register (n = 0~31 for the MASK1 from block0 to block31)" hexmask.long.word 0x00 17.--27. 1. "ONE,One" hexmask.long.word 0x00 5.--16. 1. "MASK,Overlay Address Mask" group.long ad:0xC00C4408++0x03 line.long 0x00 "BYPASS,Overlay Bypass Register" bitfld.long 0x00 0.--1. "OVCBYPS,OVC Bypass Control" "0,1,2,3" wgroup.long ad:0xC00C440C++0x07 line.long 0x00 "ALMCLR0,CPU0 Overlay Alarm Clear Register" bitfld.long 0x00 3. "PROTCLR,E/SE Protection Alarm Clear" "0,1" bitfld.long 0x00 2. "REGCLR,Register Redundancy Alarm Clear" "0,1" bitfld.long 0x00 0.--1. "CORECLR,Overlay Core Alarm Clear" "0,1,2,3" line.long 0x04 "ALMCLR1,CPU1 Overlay Alarm Clear Register" bitfld.long 0x04 3. "PROTCLR,E/SE Protection Alarm Clear" "0,1" bitfld.long 0x04 2. "REGCLR,Register Redundancy Alarm Clear" "0,1" bitfld.long 0x04 0.--1. "CORECLR,Overlay Core Alarm Clear" "0,1,2,3" group.long ad:0xC00C4414++0x0B line.long 0x00 "ALMEN,Overlay Alarm Enable Register" bitfld.long 0x00 4. "ALMEN4,Enable BYPASS Register Redundancy Alarm" "0,1" bitfld.long 0x00 3. "ALMEN3,Enable CPU1 Target Address ECC Error Alarm" "0,1" bitfld.long 0x00 2. "ALMEN2,Enable CPU1 Address Channel Selected Redundant Alarm" "0,1" bitfld.long 0x00 1. "ALMEN1,Enable CPU0 Target Address ECC Error Alarm" "0,1" bitfld.long 0x00 0. "ALMEN0,Enable CPU0 Address Channel Selected Redundant Alarm" "0,1" line.long 0x04 "INTMSK,Overlay Interrupt Mask Register" bitfld.long 0x04 1. "INTMSK1,OVC CPU1 Interrupt Mask" "0,1" bitfld.long 0x04 0. "INTMSK0,OVC CPU0 Interrupt Mask" "0,1" line.long 0x08 "BUSERRMSK,Overlay Bus Error Mask Register" bitfld.long 0x08 0. "BUSERRMSK,OVC Bus Error Mask Control" "0,1" tree.end tree "INTC" group.long ad:0xB0040000++0x03 line.long 0x00 "SEMAPEN,Semaphore Enable Register" bitfld.long 0x00 14.--15. "SEMFEN7,Semaphore 7 Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "SEMFEN6,Semaphore 6 Enable" "0,1,2,3" bitfld.long 0x00 10.--11. "SEMFEN5,Semaphore 5 Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "SEMFEN4,Semaphore 4 Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "SEMFEN3,Semaphore 3 Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "SEMFEN2,Semaphore 2 Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "SEMFEN1,Semaphore 1 Enable" "0,1,2,3" newline bitfld.long 0x00 0.--1. "SEMFEN0,Semaphore 0 Enable" "0,1,2,3" group.long ad:0xB0040040++0x1F line.long 0x00 "SEMAP0,Semaphore Register" hexmask.long.word 0x00 16.--31. 1. "SEMFPSW,Semaphore Control Key" bitfld.long 0x00 0.--1. "SEMF,The Occupied State of Semaphore" "0,1,2,3" line.long 0x04 "SEMAP1,Semaphore Register" hexmask.long.word 0x04 16.--31. 1. "SEMFPSW,Semaphore Control Key" bitfld.long 0x04 0.--1. "SEMF,The Occupied State of Semaphore" "0,1,2,3" line.long 0x08 "SEMAP2,Semaphore Register" hexmask.long.word 0x08 16.--31. 1. "SEMFPSW,Semaphore Control Key" bitfld.long 0x08 0.--1. "SEMF,The Occupied State of Semaphore" "0,1,2,3" line.long 0x0C "SEMAP3,Semaphore Register" hexmask.long.word 0x0C 16.--31. 1. "SEMFPSW,Semaphore Control Key" bitfld.long 0x0C 0.--1. "SEMF,The Occupied State of Semaphore" "0,1,2,3" line.long 0x10 "SEMAP4,Semaphore Register" hexmask.long.word 0x10 16.--31. 1. "SEMFPSW,Semaphore Control Key" bitfld.long 0x10 0.--1. "SEMF,The Occupied State of Semaphore" "0,1,2,3" line.long 0x14 "SEMAP5,Semaphore Register" hexmask.long.word 0x14 16.--31. 1. "SEMFPSW,Semaphore Control Key" bitfld.long 0x14 0.--1. "SEMF,The Occupied State of Semaphore" "0,1,2,3" line.long 0x18 "SEMAP6,Semaphore Register" hexmask.long.word 0x18 16.--31. 1. "SEMFPSW,Semaphore Control Key" bitfld.long 0x18 0.--1. "SEMF,The Occupied State of Semaphore" "0,1,2,3" line.long 0x1C "SEMAP7,Semaphore Register" hexmask.long.word 0x1C 16.--31. 1. "SEMFPSW,Semaphore Control Key" bitfld.long 0x1C 0.--1. "SEMF,The Occupied State of Semaphore" "0,1,2,3" group.long ad:0xB0040084++0x1F line.long 0x00 "SFINTCR0,Software Interrupt Control Register" hexmask.long.word 0x00 16.--31. 1. "SFINTPSW,Software interrupt control key" bitfld.long 0x00 0.--1. "SOFTINT,Set Software Interrupt" "0,1,2,3" line.long 0x04 "SFINTCR1,Software Interrupt Control Register" hexmask.long.word 0x04 16.--31. 1. "SFINTPSW,Software interrupt control key" bitfld.long 0x04 0.--1. "SOFTINT,Set Software Interrupt" "0,1,2,3" line.long 0x08 "SFINTCR2,Software Interrupt Control Register" hexmask.long.word 0x08 16.--31. 1. "SFINTPSW,Software interrupt control key" bitfld.long 0x08 0.--1. "SOFTINT,Set Software Interrupt" "0,1,2,3" line.long 0x0C "SFINTCR3,Software Interrupt Control Register" hexmask.long.word 0x0C 16.--31. 1. "SFINTPSW,Software interrupt control key" bitfld.long 0x0C 0.--1. "SOFTINT,Set Software Interrupt" "0,1,2,3" line.long 0x10 "SFINTCR4,Software Interrupt Control Register" hexmask.long.word 0x10 16.--31. 1. "SFINTPSW,Software interrupt control key" bitfld.long 0x10 0.--1. "SOFTINT,Set Software Interrupt" "0,1,2,3" line.long 0x14 "SFINTCR5,Software Interrupt Control Register" hexmask.long.word 0x14 16.--31. 1. "SFINTPSW,Software interrupt control key" bitfld.long 0x14 0.--1. "SOFTINT,Set Software Interrupt" "0,1,2,3" line.long 0x18 "SFINTCR6,Software Interrupt Control Register" hexmask.long.word 0x18 16.--31. 1. "SFINTPSW,Software interrupt control key" bitfld.long 0x18 0.--1. "SOFTINT,Set Software Interrupt" "0,1,2,3" line.long 0x1C "SFINTCR7,Software Interrupt Control Register" hexmask.long.word 0x1C 16.--31. 1. "SFINTPSW,Software interrupt control key" bitfld.long 0x1C 0.--1. "SOFTINT,Set Software Interrupt" "0,1,2,3" wgroup.long ad:0xB0040104++0x1F line.long 0x00 "CPUCLRCNT0,CPU Clear Count Register" hexmask.long.byte 0x00 16.--21. 1. "INTCNT1CL,CPUCLCNT0 [16]" hexmask.long.word 0x00 2.--15. 1. "INTCNT0CL,CPUCLCNT0 [2]" line.long 0x04 "CPUCLRCNT1,CPU Clear Count Register" line.long 0x08 "CPUCLRCNT2,CPU Clear Count Register" line.long 0x0C "CPUCLRCNT3,CPU Clear Count Register" line.long 0x10 "CPUCLRCNT4,CPU Clear Count Register" line.long 0x14 "CPUCLRCNT5,CPU Clear Count Register" line.long 0x18 "CPUCLRCNT6,CPU Clear Count Register" line.long 0x1C "CPUCLRCNT7,CPU Clear Count Register" bitfld.long 0x1C 16.--20. "INTCNT15CL,CPUCLCNT7 [16]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x1C 0.--15. 1. "INTCNT14CL,CPUCLCNT7 [0]" group.long ad:0xB0040180++0x3F line.long 0x00 "INTCNT0,Interrupt Count Register" line.long 0x04 "INTCNT1,Interrupt Count Register" line.long 0x08 "INTCNT2,Interrupt Count Register" line.long 0x0C "INTCNT3,Interrupt Count Register" line.long 0x10 "INTCNT4,Interrupt Count Register" line.long 0x14 "INTCNT5,Interrupt Count Register" line.long 0x18 "INTCNT6,Interrupt Count Register" line.long 0x1C "INTCNT7,Interrupt Count Register" line.long 0x20 "INTCNT8,Interrupt Count Register" line.long 0x24 "INTCNT9,Interrupt Count Register" line.long 0x28 "INTCNT10,Interrupt Count Register" line.long 0x2C "INTCNT11,Interrupt Count Register" line.long 0x30 "INTCNT12,Interrupt Count Register" line.long 0x34 "INTCNT13,Interrupt Count Register" line.long 0x38 "INTCNT14,Interrupt Count Register" line.long 0x3C "INTCNT15,Interrupt Count Register" group.long ad:0xB0040274++0x1F line.long 0x00 "INTCNTEN,Interrupt Count Enable Register" bitfld.long 0x00 0. "INTCNT_EN,Interrupt Count Enable Control" "0,1" line.long 0x04 "LEVEDGSEL0,Level and Edge Trigger Select Register" line.long 0x08 "LEVEDGSEL1,Level and Edge Trigger Select Register" line.long 0x0C "LEVEDGSEL2,Level and Edge Trigger Select Register" line.long 0x10 "LEVEDGSEL3,Level and Edge Trigger Select Register" line.long 0x14 "LEVEDGSEL4,Level and Edge Trigger Select Register" line.long 0x18 "LEVEDGSEL5,Level and Edge Trigger Select Register" line.long 0x1C "LEVEDGSEL6,Level and Edge Trigger Select Register" group.long ad:0xB0040298++0x7F line.long 0x00 "SETINT0,Software Set Interrupt Register" line.long 0x04 "SETINT1,Software Set Interrupt Register" line.long 0x08 "SETINT2,Software Set Interrupt Register" line.long 0x0C "SETINT3,Software Set Interrupt Register" line.long 0x10 "SETINT4,Software Set Interrupt Register" line.long 0x14 "SETINT5,Software Set Interrupt Register" line.long 0x18 "SETINT6,Software Set Interrupt Register" line.long 0x1C "SETINT7,Software Set Interrupt Register" line.long 0x20 "SETINT8,Software Set Interrupt Register" line.long 0x24 "SETINT9,Software Set Interrupt Register" line.long 0x28 "SETINT10,Software Set Interrupt Register" line.long 0x2C "SETINT11,Software Set Interrupt Register" line.long 0x30 "SETINT12,Software Set Interrupt Register" line.long 0x34 "SETINT13,Software Set Interrupt Register" line.long 0x38 "SETINT14,Software Set Interrupt Register" line.long 0x3C "SETINT15,Software Set Interrupt Register" line.long 0x40 "SETINT16,Software Set Interrupt Register" line.long 0x44 "SETINT17,Software Set Interrupt Register" line.long 0x48 "SETINT18,Software Set Interrupt Register" line.long 0x4C "SETINT19,Software Set Interrupt Register" line.long 0x50 "SETINT20,Software Set Interrupt Register" line.long 0x54 "SETINT21,Software Set Interrupt Register" line.long 0x58 "SETINT22,Software Set Interrupt Register" line.long 0x5C "SETINT23,Software Set Interrupt Register" line.long 0x60 "SETINT24,Software Set Interrupt Register" line.long 0x64 "SETINT25,Software Set Interrupt Register" line.long 0x68 "SETINT26,Software Set Interrupt Register" line.long 0x6C "SETINT27,Software Set Interrupt Register" line.long 0x70 "SETINT28,Software Set Interrupt Register" line.long 0x74 "SETINT29,Software Set Interrupt Register" line.long 0x78 "SETINT30,Software Set Interrupt Register" bitfld.long 0x78 1. "SETINT1,Software Sets System Error Interrupt 1 (SEI1)" "0,1" bitfld.long 0x78 0. "SETINT0,Software Sets System Error Interrupt 0 (SEI0)" "0,1" line.long 0x7C "SETPSW,Set Interrupt Password Register" hexmask.long.word 0x7C 16.--31. 1. "SETPSW,Software Sets Interrupt Key" bitfld.long 0x7C 0.--1. "SETINTEN,Enable Software Set Interrupt Signal" "0,1,2,3" rgroup.long ad:0xB0040318++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" hexmask.long.byte 0x00 18.--25. 1. "SEMFALM,Indicates the alarm status of the multi-bit redundancy for SEMAP.SEMF" bitfld.long 0x00 17. "PROTALM,Illegal access to the SE protection register alarm status" "0,1" bitfld.long 0x00 16. "SETINTALM,Indicates the alarm status of the multi-bit redundancy for SETINTEN" "0,1" hexmask.long.byte 0x00 8.--15. 1. "SFTINTALM,Indicates the alarm status of the multi-bit redundancy for SOFTINT7~ SOFTINT0" hexmask.long.byte 0x00 0.--7. 1. "SEMALM,Indicates the alarm status of the multi-bit redundancy for SEMFEN7~SEMFEN0" wgroup.long ad:0xB004031C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 3. "PROTALMCLR,Write Protect Alarm Clear" "0,1" bitfld.long 0x00 2. "SETINTALMCLR,SETINTEN Multi-bit Redundancy Alarm Clear" "0,1" bitfld.long 0x00 1. "SFTINTALMCLR,SOFTINT Multi-bit Redundancy Alarm Clear" "0,1" bitfld.long 0x00 0. "SEMALMCLR,SEMFEN Multi-bit Redundancy Alarm Clear" "0,1" group.long ad:0xB0040320++0x0F line.long 0x00 "ALMEN,Alarm Enable Register" bitfld.long 0x00 2. "ALMEN2,Alarm Enable" "0,1" bitfld.long 0x00 1. "ALMEN1,Alarm Enable" "0,1" bitfld.long 0x00 0. "ALMEN0,Alarm Enable" "0,1" line.long 0x04 "STINTMSK,Software Interrupt Mask Register" bitfld.long 0x04 7. "STINTMSK7,CPU1 Software Interrupt 3 Mask Control" "0,1" bitfld.long 0x04 6. "STINTMSK6,CPU1 Software Interrupt 2 Mask Control" "0,1" bitfld.long 0x04 5. "STINTMSK5,CPU1 Software Interrupt 1 Mask Control" "0,1" bitfld.long 0x04 4. "STINTMSK4,CPU1 Software Interrupt 0 Mask Control" "0,1" bitfld.long 0x04 3. "STINTMSK3,CPU0 Software interrupt 3 Mask Control" "0,1" bitfld.long 0x04 2. "STINTMSK2,CPU0 Software interrupt 2 Mask Control" "0,1" bitfld.long 0x04 1. "STINTMSK1,CPU0 Software interrupt 1 mask control" "0,1" newline bitfld.long 0x04 0. "STINTMSK0,CPU0 Software Interrupt 0 Mask Control" "0,1" line.long 0x08 "BUSERRMSK,Bus Error Mask Register" bitfld.long 0x08 0. "BUSERRMSK,Bus Error Mask Control" "0,1" line.long 0x0C "DCCINTMSK,Debug Communications Channel Interrupt Mask Register" hexmask.long.word 0x0C 16.--31. 1. "DCCPSW,DCC Interrupt Mask Control Key" bitfld.long 0x0C 3. "COMMTX1MSK,Debug Communications Channel TX1 Interrupt Mask Control" "0,1" bitfld.long 0x0C 2. "COMMRX1MSK,Debug Communications Channel RX1 Interrupt Mask Control" "0,1" bitfld.long 0x0C 1. "COMMTX0MSK,Debug Communications Channel TX0 Interrupt Mask Control" "0,1" bitfld.long 0x0C 0. "COMMRX0MSK,Debug Communications Channel RX0 Interrupt Mask Control" "0,1" tree.end tree "IST" group.long ad:0xC0020004++0x03 line.long 0x00 "FCTR,Flow Control Register" bitfld.long 0x00 0.--1. "PSKP,Power-On Self Test Skip" "0,1,2,3" rgroup.long ad:0xC0020008++0x03 line.long 0x00 "PCTR,POST Control Register" bitfld.long 0x00 2.--3. "PGRTN,Power-On Self Test Group Retry Number" "0,1,2,3" bitfld.long 0x00 0.--1. "PEN,Power-On Self Test Enable" "0,1,2,3" group.long ad:0xC002000C++0x0F line.long 0x00 "UCTR,UMST Control Register" bitfld.long 0x00 4.--5. "UESEL,User Mode Self Test Enable Select" "0,1,2,3" bitfld.long 0x00 2.--3. "UGRTN,User Mode Self Test Group Retry Number" "0,1,2,3" bitfld.long 0x00 0.--1. "UEN,User Mode Self Test Enable" "0,1,2,3" line.long 0x04 "MCTR,Memory Control Register" bitfld.long 0x04 8. "FSRBEM,SFR Bus Error Mask" "0,1" bitfld.long 0x04 4.--5. "MSPEN,Memory Sleep Enable" "0,1,2,3" bitfld.long 0x04 2.--3. "MCEN,Memory CRC Enable" "0,1,2,3" line.long 0x08 "TCTR,Timeout Counter Control Register" bitfld.long 0x08 0.--1. "TMCEN,Timeout Count Enable" "0,1,2,3" line.long 0x0C "TMR,Timeout Counter Threshold Register" rgroup.long ad:0xC002001C++0x03 line.long 0x00 "STS,Status Register" bitfld.long 0x00 11. "TDRAF,TDR signal monitors Alarm Flag" "0,1" bitfld.long 0x00 10. "TAPAF,ATP signal monitors Alarm Flag" "0,1" bitfld.long 0x00 9. "MSLP,ROM sleep state" "0,1" bitfld.long 0x00 8. "RCEF,ROM Data CRC Error Flag" "0,1" bitfld.long 0x00 7. "SEAF,SE Alarm Flag" "0,1" bitfld.long 0x00 6. "SFRAF,Special Functional Reg Alarm Flag" "0,1" bitfld.long 0x00 5. "PDF,Power-On Self Test Done Flag" "0,1" bitfld.long 0x00 4. "PFF,Power-On Self Test Fail Flag" "0,1" bitfld.long 0x00 3. "UDF,User Mode Self Test Done Flag" "0,1" bitfld.long 0x00 2. "UFF,User Mode Self Test Fail Flag" "0,1" bitfld.long 0x00 1. "PTOF,POST Timeout Flag" "0,1" bitfld.long 0x00 0. "UTOF,UMST Timeout Flag" "0,1" wgroup.long ad:0xC0020020++0x03 line.long 0x00 "STSC,Status Clear Register" bitfld.long 0x00 14.--15. "TERAFC,TDR Alarm Flag Clear" "0,1,2,3" bitfld.long 0x00 12.--13. "TAPAFC,TAP Alarm Flag Clear" "0,1,2,3" bitfld.long 0x00 10.--11. "RCEFC,Rom CRC Error Flag clear" "0,1,2,3" bitfld.long 0x00 8.--9. "SEAFC,SE Alarm Flag Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "SFRAFC,Special Functional Reg Alarm Flag Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "PSTSC,Power-On Self Test Status Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "USTSC,User Mode Self Test Status Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "TOFC,Test Timeout Flag Clear" "0,1,2,3" rgroup.long ad:0xC002002C++0x7F line.long 0x00 "PPID0,POST Program Index Register n (n=0~31)" bitfld.long 0x00 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x00 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "PPID1,POST Program Index Register n (n=0~31)" bitfld.long 0x04 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x04 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "PPID2,POST Program Index Register n (n=0~31)" bitfld.long 0x08 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x08 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "PPID3,POST Program Index Register n (n=0~31)" bitfld.long 0x0C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x0C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "PPID4,POST Program Index Register n (n=0~31)" bitfld.long 0x10 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x10 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "PPID5,POST Program Index Register n (n=0~31)" bitfld.long 0x14 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x14 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "PPID6,POST Program Index Register n (n=0~31)" bitfld.long 0x18 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x18 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "PPID7,POST Program Index Register n (n=0~31)" bitfld.long 0x1C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x1C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "PPID8,POST Program Index Register n (n=0~31)" bitfld.long 0x20 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x20 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x24 "PPID9,POST Program Index Register n (n=0~31)" bitfld.long 0x24 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x24 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x28 "PPID10,POST Program Index Register n (n=0~31)" bitfld.long 0x28 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x28 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "PPID11,POST Program Index Register n (n=0~31)" bitfld.long 0x2C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x2C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "PPID12,POST Program Index Register n (n=0~31)" bitfld.long 0x30 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x30 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "PPID13,POST Program Index Register n (n=0~31)" bitfld.long 0x34 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x34 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "PPID14,POST Program Index Register n (n=0~31)" bitfld.long 0x38 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x38 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "PPID15,POST Program Index Register n (n=0~31)" bitfld.long 0x3C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x3C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x40 "PPID16,POST Program Index Register n (n=0~31)" bitfld.long 0x40 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x40 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x44 "PPID17,POST Program Index Register n (n=0~31)" bitfld.long 0x44 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x44 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x48 "PPID18,POST Program Index Register n (n=0~31)" bitfld.long 0x48 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x48 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x4C "PPID19,POST Program Index Register n (n=0~31)" bitfld.long 0x4C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x4C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x50 "PPID20,POST Program Index Register n (n=0~31)" bitfld.long 0x50 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x50 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x54 "PPID21,POST Program Index Register n (n=0~31)" bitfld.long 0x54 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x54 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x58 "PPID22,POST Program Index Register n (n=0~31)" bitfld.long 0x58 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x58 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x5C "PPID23,POST Program Index Register n (n=0~31)" bitfld.long 0x5C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x5C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x5C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x60 "PPID24,POST Program Index Register n (n=0~31)" bitfld.long 0x60 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x60 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x60 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x64 "PPID25,POST Program Index Register n (n=0~31)" bitfld.long 0x64 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x64 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x64 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x68 "PPID26,POST Program Index Register n (n=0~31)" bitfld.long 0x68 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x68 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x68 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x6C "PPID27,POST Program Index Register n (n=0~31)" bitfld.long 0x6C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x6C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x6C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x70 "PPID28,POST Program Index Register n (n=0~31)" bitfld.long 0x70 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x70 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x70 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x74 "PPID29,POST Program Index Register n (n=0~31)" bitfld.long 0x74 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x74 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x74 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x78 "PPID30,POST Program Index Register n (n=0~31)" bitfld.long 0x78 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x78 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x78 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x7C "PPID31,POST Program Index Register n (n=0~31)" bitfld.long 0x7C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x7C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x7C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC00200AC++0x7F line.long 0x00 "UPID0,UMST Program Index Register m (m=0~31)" bitfld.long 0x00 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x00 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "UPID1,UMST Program Index Register m (m=0~31)" bitfld.long 0x04 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x04 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "UPID2,UMST Program Index Register m (m=0~31)" bitfld.long 0x08 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x08 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "UPID3,UMST Program Index Register m (m=0~31)" bitfld.long 0x0C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x0C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10 "UPID4,UMST Program Index Register m (m=0~31)" bitfld.long 0x10 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x10 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x14 "UPID5,UMST Program Index Register m (m=0~31)" bitfld.long 0x14 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x14 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "UPID6,UMST Program Index Register m (m=0~31)" bitfld.long 0x18 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x18 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "UPID7,UMST Program Index Register m (m=0~31)" bitfld.long 0x1C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x1C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "UPID8,UMST Program Index Register m (m=0~31)" bitfld.long 0x20 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x20 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x24 "UPID9,UMST Program Index Register m (m=0~31)" bitfld.long 0x24 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x24 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x28 "UPID10,UMST Program Index Register m (m=0~31)" bitfld.long 0x28 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x28 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "UPID11,UMST Program Index Register m (m=0~31)" bitfld.long 0x2C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x2C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "UPID12,UMST Program Index Register m (m=0~31)" bitfld.long 0x30 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x30 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "UPID13,UMST Program Index Register m (m=0~31)" bitfld.long 0x34 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x34 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "UPID14,UMST Program Index Register m (m=0~31)" bitfld.long 0x38 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x38 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "UPID15,UMST Program Index Register m (m=0~31)" bitfld.long 0x3C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x3C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x40 "UPID16,UMST Program Index Register m (m=0~31)" bitfld.long 0x40 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x40 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x44 "UPID17,UMST Program Index Register m (m=0~31)" bitfld.long 0x44 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x44 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x48 "UPID18,UMST Program Index Register m (m=0~31)" bitfld.long 0x48 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x48 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x4C "UPID19,UMST Program Index Register m (m=0~31)" bitfld.long 0x4C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x4C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x50 "UPID20,UMST Program Index Register m (m=0~31)" bitfld.long 0x50 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x50 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x54 "UPID21,UMST Program Index Register m (m=0~31)" bitfld.long 0x54 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x54 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x54 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x58 "UPID22,UMST Program Index Register m (m=0~31)" bitfld.long 0x58 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x58 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x58 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x5C "UPID23,UMST Program Index Register m (m=0~31)" bitfld.long 0x5C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x5C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x5C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x60 "UPID24,UMST Program Index Register m (m=0~31)" bitfld.long 0x60 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x60 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x60 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x64 "UPID25,UMST Program Index Register m (m=0~31)" bitfld.long 0x64 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x64 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x64 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x68 "UPID26,UMST Program Index Register m (m=0~31)" bitfld.long 0x68 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x68 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x68 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x6C "UPID27,UMST Program Index Register m (m=0~31)" bitfld.long 0x6C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x6C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x6C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x70 "UPID28,UMST Program Index Register m (m=0~31)" bitfld.long 0x70 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x70 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x70 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x74 "UPID29,UMST Program Index Register m (m=0~31)" bitfld.long 0x74 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x74 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x74 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x78 "UPID30,UMST Program Index Register m (m=0~31)" bitfld.long 0x78 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x78 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x78 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x7C "UPID31,UMST Program Index Register m (m=0~31)" bitfld.long 0x7C 10. "PVLDF,Program Valid Flag" "0,1" bitfld.long 0x7C 5.--9. "EDID,End Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x7C 0.--4. "STID,Start Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long ad:0xC002012C++0xFF line.long 0x00 "PSTS0,POST Status Register x (x=0~31)" bitfld.long 0x00 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x00 1. "DONE,Done" "0,1" bitfld.long 0x00 0. "FAIL,Fail" "0,1" line.long 0x04 "PSTS1,POST Status Register x (x=0~31)" bitfld.long 0x04 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x04 1. "DONE,Done" "0,1" bitfld.long 0x04 0. "FAIL,Fail" "0,1" line.long 0x08 "PSTS2,POST Status Register x (x=0~31)" bitfld.long 0x08 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x08 1. "DONE,Done" "0,1" bitfld.long 0x08 0. "FAIL,Fail" "0,1" line.long 0x0C "PSTS3,POST Status Register x (x=0~31)" bitfld.long 0x0C 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x0C 1. "DONE,Done" "0,1" bitfld.long 0x0C 0. "FAIL,Fail" "0,1" line.long 0x10 "PSTS4,POST Status Register x (x=0~31)" bitfld.long 0x10 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x10 1. "DONE,Done" "0,1" bitfld.long 0x10 0. "FAIL,Fail" "0,1" line.long 0x14 "PSTS5,POST Status Register x (x=0~31)" bitfld.long 0x14 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x14 1. "DONE,Done" "0,1" bitfld.long 0x14 0. "FAIL,Fail" "0,1" line.long 0x18 "PSTS6,POST Status Register x (x=0~31)" bitfld.long 0x18 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x18 1. "DONE,Done" "0,1" bitfld.long 0x18 0. "FAIL,Fail" "0,1" line.long 0x1C "PSTS7,POST Status Register x (x=0~31)" bitfld.long 0x1C 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x1C 1. "DONE,Done" "0,1" bitfld.long 0x1C 0. "FAIL,Fail" "0,1" line.long 0x20 "PSTS8,POST Status Register x (x=0~31)" bitfld.long 0x20 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x20 1. "DONE,Done" "0,1" bitfld.long 0x20 0. "FAIL,Fail" "0,1" line.long 0x24 "PSTS9,POST Status Register x (x=0~31)" bitfld.long 0x24 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x24 1. "DONE,Done" "0,1" bitfld.long 0x24 0. "FAIL,Fail" "0,1" line.long 0x28 "PSTS10,POST Status Register x (x=0~31)" bitfld.long 0x28 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x28 1. "DONE,Done" "0,1" bitfld.long 0x28 0. "FAIL,Fail" "0,1" line.long 0x2C "PSTS11,POST Status Register x (x=0~31)" bitfld.long 0x2C 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x2C 1. "DONE,Done" "0,1" bitfld.long 0x2C 0. "FAIL,Fail" "0,1" line.long 0x30 "PSTS12,POST Status Register x (x=0~31)" bitfld.long 0x30 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x30 1. "DONE,Done" "0,1" bitfld.long 0x30 0. "FAIL,Fail" "0,1" line.long 0x34 "PSTS13,POST Status Register x (x=0~31)" bitfld.long 0x34 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x34 1. "DONE,Done" "0,1" bitfld.long 0x34 0. "FAIL,Fail" "0,1" line.long 0x38 "PSTS14,POST Status Register x (x=0~31)" bitfld.long 0x38 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x38 1. "DONE,Done" "0,1" bitfld.long 0x38 0. "FAIL,Fail" "0,1" line.long 0x3C "PSTS15,POST Status Register x (x=0~31)" bitfld.long 0x3C 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x3C 1. "DONE,Done" "0,1" bitfld.long 0x3C 0. "FAIL,Fail" "0,1" line.long 0x40 "PSTS16,POST Status Register x (x=0~31)" bitfld.long 0x40 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x40 1. "DONE,Done" "0,1" bitfld.long 0x40 0. "FAIL,Fail" "0,1" line.long 0x44 "PSTS17,POST Status Register x (x=0~31)" bitfld.long 0x44 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x44 1. "DONE,Done" "0,1" bitfld.long 0x44 0. "FAIL,Fail" "0,1" line.long 0x48 "PSTS18,POST Status Register x (x=0~31)" bitfld.long 0x48 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x48 1. "DONE,Done" "0,1" bitfld.long 0x48 0. "FAIL,Fail" "0,1" line.long 0x4C "PSTS19,POST Status Register x (x=0~31)" bitfld.long 0x4C 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x4C 1. "DONE,Done" "0,1" bitfld.long 0x4C 0. "FAIL,Fail" "0,1" line.long 0x50 "PSTS20,POST Status Register x (x=0~31)" bitfld.long 0x50 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x50 1. "DONE,Done" "0,1" bitfld.long 0x50 0. "FAIL,Fail" "0,1" line.long 0x54 "PSTS21,POST Status Register x (x=0~31)" bitfld.long 0x54 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x54 1. "DONE,Done" "0,1" bitfld.long 0x54 0. "FAIL,Fail" "0,1" line.long 0x58 "PSTS22,POST Status Register x (x=0~31)" bitfld.long 0x58 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x58 1. "DONE,Done" "0,1" bitfld.long 0x58 0. "FAIL,Fail" "0,1" line.long 0x5C "PSTS23,POST Status Register x (x=0~31)" bitfld.long 0x5C 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x5C 1. "DONE,Done" "0,1" bitfld.long 0x5C 0. "FAIL,Fail" "0,1" line.long 0x60 "PSTS24,POST Status Register x (x=0~31)" bitfld.long 0x60 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x60 1. "DONE,Done" "0,1" bitfld.long 0x60 0. "FAIL,Fail" "0,1" line.long 0x64 "PSTS25,POST Status Register x (x=0~31)" bitfld.long 0x64 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x64 1. "DONE,Done" "0,1" bitfld.long 0x64 0. "FAIL,Fail" "0,1" line.long 0x68 "PSTS26,POST Status Register x (x=0~31)" bitfld.long 0x68 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x68 1. "DONE,Done" "0,1" bitfld.long 0x68 0. "FAIL,Fail" "0,1" line.long 0x6C "PSTS27,POST Status Register x (x=0~31)" bitfld.long 0x6C 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x6C 1. "DONE,Done" "0,1" bitfld.long 0x6C 0. "FAIL,Fail" "0,1" line.long 0x70 "PSTS28,POST Status Register x (x=0~31)" bitfld.long 0x70 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x70 1. "DONE,Done" "0,1" bitfld.long 0x70 0. "FAIL,Fail" "0,1" line.long 0x74 "PSTS29,POST Status Register x (x=0~31)" bitfld.long 0x74 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x74 1. "DONE,Done" "0,1" bitfld.long 0x74 0. "FAIL,Fail" "0,1" line.long 0x78 "PSTS30,POST Status Register x (x=0~31)" bitfld.long 0x78 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x78 1. "DONE,Done" "0,1" bitfld.long 0x78 0. "FAIL,Fail" "0,1" line.long 0x7C "PSTS31,POST Status Register x (x=0~31)" bitfld.long 0x7C 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x7C 1. "DONE,Done" "0,1" bitfld.long 0x7C 0. "FAIL,Fail" "0,1" line.long 0x80 "USTS0,UMST Status Register y (y=0~31)" bitfld.long 0x80 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x80 1. "DONE,Done" "0,1" bitfld.long 0x80 0. "FAIL,Fail" "0,1" line.long 0x84 "USTS1,UMST Status Register y (y=0~31)" bitfld.long 0x84 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x84 1. "DONE,Done" "0,1" bitfld.long 0x84 0. "FAIL,Fail" "0,1" line.long 0x88 "USTS2,UMST Status Register y (y=0~31)" bitfld.long 0x88 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x88 1. "DONE,Done" "0,1" bitfld.long 0x88 0. "FAIL,Fail" "0,1" line.long 0x8C "USTS3,UMST Status Register y (y=0~31)" bitfld.long 0x8C 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x8C 1. "DONE,Done" "0,1" bitfld.long 0x8C 0. "FAIL,Fail" "0,1" line.long 0x90 "USTS4,UMST Status Register y (y=0~31)" bitfld.long 0x90 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x90 1. "DONE,Done" "0,1" bitfld.long 0x90 0. "FAIL,Fail" "0,1" line.long 0x94 "USTS5,UMST Status Register y (y=0~31)" bitfld.long 0x94 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x94 1. "DONE,Done" "0,1" bitfld.long 0x94 0. "FAIL,Fail" "0,1" line.long 0x98 "USTS6,UMST Status Register y (y=0~31)" bitfld.long 0x98 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x98 1. "DONE,Done" "0,1" bitfld.long 0x98 0. "FAIL,Fail" "0,1" line.long 0x9C "USTS7,UMST Status Register y (y=0~31)" bitfld.long 0x9C 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0x9C 1. "DONE,Done" "0,1" bitfld.long 0x9C 0. "FAIL,Fail" "0,1" line.long 0xA0 "USTS8,UMST Status Register y (y=0~31)" bitfld.long 0xA0 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xA0 1. "DONE,Done" "0,1" bitfld.long 0xA0 0. "FAIL,Fail" "0,1" line.long 0xA4 "USTS9,UMST Status Register y (y=0~31)" bitfld.long 0xA4 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xA4 1. "DONE,Done" "0,1" bitfld.long 0xA4 0. "FAIL,Fail" "0,1" line.long 0xA8 "USTS10,UMST Status Register y (y=0~31)" bitfld.long 0xA8 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xA8 1. "DONE,Done" "0,1" bitfld.long 0xA8 0. "FAIL,Fail" "0,1" line.long 0xAC "USTS11,UMST Status Register y (y=0~31)" bitfld.long 0xAC 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xAC 1. "DONE,Done" "0,1" bitfld.long 0xAC 0. "FAIL,Fail" "0,1" line.long 0xB0 "USTS12,UMST Status Register y (y=0~31)" bitfld.long 0xB0 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xB0 1. "DONE,Done" "0,1" bitfld.long 0xB0 0. "FAIL,Fail" "0,1" line.long 0xB4 "USTS13,UMST Status Register y (y=0~31)" bitfld.long 0xB4 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xB4 1. "DONE,Done" "0,1" bitfld.long 0xB4 0. "FAIL,Fail" "0,1" line.long 0xB8 "USTS14,UMST Status Register y (y=0~31)" bitfld.long 0xB8 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xB8 1. "DONE,Done" "0,1" bitfld.long 0xB8 0. "FAIL,Fail" "0,1" line.long 0xBC "USTS15,UMST Status Register y (y=0~31)" bitfld.long 0xBC 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xBC 1. "DONE,Done" "0,1" bitfld.long 0xBC 0. "FAIL,Fail" "0,1" line.long 0xC0 "USTS16,UMST Status Register y (y=0~31)" bitfld.long 0xC0 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xC0 1. "DONE,Done" "0,1" bitfld.long 0xC0 0. "FAIL,Fail" "0,1" line.long 0xC4 "USTS17,UMST Status Register y (y=0~31)" bitfld.long 0xC4 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xC4 1. "DONE,Done" "0,1" bitfld.long 0xC4 0. "FAIL,Fail" "0,1" line.long 0xC8 "USTS18,UMST Status Register y (y=0~31)" bitfld.long 0xC8 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xC8 1. "DONE,Done" "0,1" bitfld.long 0xC8 0. "FAIL,Fail" "0,1" line.long 0xCC "USTS19,UMST Status Register y (y=0~31)" bitfld.long 0xCC 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xCC 1. "DONE,Done" "0,1" bitfld.long 0xCC 0. "FAIL,Fail" "0,1" line.long 0xD0 "USTS20,UMST Status Register y (y=0~31)" bitfld.long 0xD0 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xD0 1. "DONE,Done" "0,1" bitfld.long 0xD0 0. "FAIL,Fail" "0,1" line.long 0xD4 "USTS21,UMST Status Register y (y=0~31)" bitfld.long 0xD4 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xD4 1. "DONE,Done" "0,1" bitfld.long 0xD4 0. "FAIL,Fail" "0,1" line.long 0xD8 "USTS22,UMST Status Register y (y=0~31)" bitfld.long 0xD8 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xD8 1. "DONE,Done" "0,1" bitfld.long 0xD8 0. "FAIL,Fail" "0,1" line.long 0xDC "USTS23,UMST Status Register y (y=0~31)" bitfld.long 0xDC 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xDC 1. "DONE,Done" "0,1" bitfld.long 0xDC 0. "FAIL,Fail" "0,1" line.long 0xE0 "USTS24,UMST Status Register y (y=0~31)" bitfld.long 0xE0 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xE0 1. "DONE,Done" "0,1" bitfld.long 0xE0 0. "FAIL,Fail" "0,1" line.long 0xE4 "USTS25,UMST Status Register y (y=0~31)" bitfld.long 0xE4 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xE4 1. "DONE,Done" "0,1" bitfld.long 0xE4 0. "FAIL,Fail" "0,1" line.long 0xE8 "USTS26,UMST Status Register y (y=0~31)" bitfld.long 0xE8 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xE8 1. "DONE,Done" "0,1" bitfld.long 0xE8 0. "FAIL,Fail" "0,1" line.long 0xEC "USTS27,UMST Status Register y (y=0~31)" bitfld.long 0xEC 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xEC 1. "DONE,Done" "0,1" bitfld.long 0xEC 0. "FAIL,Fail" "0,1" line.long 0xF0 "USTS28,UMST Status Register y (y=0~31)" bitfld.long 0xF0 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xF0 1. "DONE,Done" "0,1" bitfld.long 0xF0 0. "FAIL,Fail" "0,1" line.long 0xF4 "USTS29,UMST Status Register y (y=0~31)" bitfld.long 0xF4 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xF4 1. "DONE,Done" "0,1" bitfld.long 0xF4 0. "FAIL,Fail" "0,1" line.long 0xF8 "USTS30,UMST Status Register y (y=0~31)" bitfld.long 0xF8 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xF8 1. "DONE,Done" "0,1" bitfld.long 0xF8 0. "FAIL,Fail" "0,1" line.long 0xFC "USTS31,UMST Status Register y (y=0~31)" bitfld.long 0xFC 2.--3. "ATRTN,Actual Retry Number" "0,1,2,3" bitfld.long 0xFC 1. "DONE,Done" "0,1" bitfld.long 0xFC 0. "FAIL,Fail" "0,1" tree.end tree "IWDT" group.long ad:0xD0060800++0x07 line.long 0x00 "CTRL,Control Register" rbitfld.long 0x00 31. "BUSY,Control Register Busy State" "0,1" bitfld.long 0x00 30. "STBAUTORUN,IWDT Counter Automatically Run after CPU Enter Standby Mode" "0,1" bitfld.long 0x00 29. "MODE,IWDT Operation Mode Select" "0,1" bitfld.long 0x00 25.--28. "DIV,Counter Clock Division" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24. "EN,IWDT Counter Control" "0,1" hexmask.long.tbyte 0x00 0.--23. 1. "RELOAD,Counter Reload Value" line.long 0x04 "STS,State Register" bitfld.long 0x04 1. "OVRFLAG,IWDT Counter Overflow Flag after ALARM Set" "0,1" bitfld.long 0x04 0. "ALARM,IWDT Counter Time out Flag" "0,1" rgroup.long ad:0xD0060808++0x03 line.long 0x00 "CNT,Count Register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,IWDT Counter Current Value" group.long ad:0xD006080C++0x03 line.long 0x00 "MASKER,Mask Register" bitfld.long 0x00 1. "MASKEN,Mask Enable for Bus Error" "0,1" rgroup.long ad:0xD0060810++0x03 line.long 0x00 "RST,Reset Register" bitfld.long 0x00 0. "RSTFLAG,Reset Flag" "0,1" group.long ad:0xD0060814++0x03 line.long 0x00 "HDBG,Halt on Debug Register" bitfld.long 0x00 0. "DBGEN,Halt Enable on Debug Mode" "0,1" wgroup.long ad:0xD0060818++0x03 line.long 0x00 "FLAGON,Flag Control Register" bitfld.long 0x00 0. "FLAGEN,Enable Flag for State Register" "0,1" tree.end tree "BASETIMER" tree "BASETIMER0" group.long ad:0xD0070000++0x03 line.long 0x00 "LOAD,Load Register" rgroup.long ad:0xD0070004++0x03 line.long 0x00 "VALUE,Value Register" group.long ad:0xD0070008++0x03 line.long 0x00 "CTRL,Control Register" bitfld.long 0x00 8.--9. "PULSEN,The Pulse to CAN Module Enable" "0,1,2,3" bitfld.long 0x00 7. "EN,Timer Count Enable/Disable" "0,1" bitfld.long 0x00 6. "MODE,Timer Working Mode" "0,1" bitfld.long 0x00 5. "INTEN,Timer Interrupt Enable/Disable" "0,1" bitfld.long 0x00 1. "SIZE,Timer Count Width Size" "0,1" bitfld.long 0x00 0. "ONESHOT,One-Shot Working Mode Enable" "0,1" wgroup.long ad:0xD007000C++0x03 line.long 0x00 "CLR,Status Clear Register" bitfld.long 0x00 0. "CLR,Interrupt Flag and Overflow Flag Clear" "0,1" rgroup.long ad:0xD0070010++0x07 line.long 0x00 "RIS,Raw Interrupt Status Register" bitfld.long 0x00 0. "RIS,Raw Interrupt Status" "0,1" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 0. "INTSTS,Interrupt Status" "0,1" group.long ad:0xD0070018++0x07 line.long 0x00 "BGLOAD,Background Load Register" line.long 0x04 "HALTTIMER,Halt Timer Register" bitfld.long 0x04 0.--1. "HALTEN,Halt Enable" "0,1,2,3" tree.end tree "BASETIMER1" group.long ad:0xD0070020++0x03 line.long 0x00 "LOAD,Load Register" rgroup.long ad:0xD0070024++0x03 line.long 0x00 "VALUE,Value Register" group.long ad:0xD0070028++0x03 line.long 0x00 "CTRL,Control Register" bitfld.long 0x00 8.--9. "PULSEN,The Pulse to CAN Module Enable" "0,1,2,3" bitfld.long 0x00 7. "EN,Timer Count Enable/Disable" "0,1" bitfld.long 0x00 6. "MODE,Timer Working Mode" "0,1" bitfld.long 0x00 5. "INTEN,Timer Interrupt Enable/Disable" "0,1" bitfld.long 0x00 1. "SIZE,Timer Count Width Size" "0,1" bitfld.long 0x00 0. "ONESHOT,One-Shot Working Mode Enable" "0,1" wgroup.long ad:0xD007002C++0x03 line.long 0x00 "CLR,Status Clear Register" bitfld.long 0x00 0. "CLR,Interrupt Flag and Overflow Flag Clear" "0,1" rgroup.long ad:0xD0070030++0x07 line.long 0x00 "RIS,Raw Interrupt Status Register" bitfld.long 0x00 0. "RIS,Raw Interrupt Status" "0,1" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 0. "INTSTS,Interrupt Status" "0,1" group.long ad:0xD0070038++0x07 line.long 0x00 "BGLOAD,Background Load Register" line.long 0x04 "HALTTIMER,Halt Timer Register" bitfld.long 0x04 0.--1. "HALTEN,Halt Enable" "0,1,2,3" tree.end tree "BASETIMER2" group.long ad:0xD0098000++0x03 line.long 0x00 "LOAD,Load Register" rgroup.long ad:0xD0098004++0x03 line.long 0x00 "VALUE,Value Register" group.long ad:0xD0098008++0x03 line.long 0x00 "CTRL,Control Register" bitfld.long 0x00 8.--9. "PULSEN,The Pulse to CAN Module Enable" "0,1,2,3" bitfld.long 0x00 7. "EN,Timer Count Enable/Disable" "0,1" bitfld.long 0x00 6. "MODE,Timer Working Mode" "0,1" bitfld.long 0x00 5. "INTEN,Timer Interrupt Enable/Disable" "0,1" bitfld.long 0x00 1. "SIZE,Timer Count Width Size" "0,1" bitfld.long 0x00 0. "ONESHOT,One-Shot Working Mode Enable" "0,1" wgroup.long ad:0xD009800C++0x03 line.long 0x00 "CLR,Status Clear Register" bitfld.long 0x00 0. "CLR,Interrupt Flag and Overflow Flag Clear" "0,1" rgroup.long ad:0xD0098010++0x07 line.long 0x00 "RIS,Raw Interrupt Status Register" bitfld.long 0x00 0. "RIS,Raw Interrupt Status" "0,1" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 0. "INTSTS,Interrupt Status" "0,1" group.long ad:0xD0098018++0x07 line.long 0x00 "BGLOAD,Background Load Register" line.long 0x04 "HALTTIMER,Halt Timer Register" bitfld.long 0x04 0.--1. "HALTEN,Halt Enable" "0,1,2,3" tree.end tree "BASETIMER3" group.long ad:0xD0098020++0x03 line.long 0x00 "LOAD,Load Register" rgroup.long ad:0xD0098024++0x03 line.long 0x00 "VALUE,Value Register" group.long ad:0xD0098028++0x03 line.long 0x00 "CTRL,Control Register" bitfld.long 0x00 8.--9. "PULSEN,The Pulse to CAN Module Enable" "0,1,2,3" bitfld.long 0x00 7. "EN,Timer Count Enable/Disable" "0,1" bitfld.long 0x00 6. "MODE,Timer Working Mode" "0,1" bitfld.long 0x00 5. "INTEN,Timer Interrupt Enable/Disable" "0,1" bitfld.long 0x00 1. "SIZE,Timer Count Width Size" "0,1" bitfld.long 0x00 0. "ONESHOT,One-Shot Working Mode Enable" "0,1" wgroup.long ad:0xD009802C++0x03 line.long 0x00 "CLR,Status Clear Register" bitfld.long 0x00 0. "CLR,Interrupt Flag and Overflow Flag Clear" "0,1" rgroup.long ad:0xD0098030++0x07 line.long 0x00 "RIS,Raw Interrupt Status Register" bitfld.long 0x00 0. "RIS,Raw Interrupt Status" "0,1" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 0. "INTSTS,Interrupt Status" "0,1" group.long ad:0xD0098038++0x07 line.long 0x00 "BGLOAD,Background Load Register" line.long 0x04 "HALTTIMER,Halt Timer Register" bitfld.long 0x04 0.--1. "HALTEN,Halt Enable" "0,1,2,3" tree.end tree "BASETIMER4" group.long ad:0xD00B8000++0x03 line.long 0x00 "LOAD,Load Register" rgroup.long ad:0xD00B8004++0x03 line.long 0x00 "VALUE,Value Register" group.long ad:0xD00B8008++0x03 line.long 0x00 "CTRL,Control Register" bitfld.long 0x00 8.--9. "PULSEN,The Pulse to CAN Module Enable" "0,1,2,3" bitfld.long 0x00 7. "EN,Timer Count Enable/Disable" "0,1" bitfld.long 0x00 6. "MODE,Timer Working Mode" "0,1" bitfld.long 0x00 5. "INTEN,Timer Interrupt Enable/Disable" "0,1" bitfld.long 0x00 1. "SIZE,Timer Count Width Size" "0,1" bitfld.long 0x00 0. "ONESHOT,One-Shot Working Mode Enable" "0,1" wgroup.long ad:0xD00B800C++0x03 line.long 0x00 "CLR,Status Clear Register" bitfld.long 0x00 0. "CLR,Interrupt Flag and Overflow Flag Clear" "0,1" rgroup.long ad:0xD00B8010++0x07 line.long 0x00 "RIS,Raw Interrupt Status Register" bitfld.long 0x00 0. "RIS,Raw Interrupt Status" "0,1" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 0. "INTSTS,Interrupt Status" "0,1" group.long ad:0xD00B8018++0x07 line.long 0x00 "BGLOAD,Background Load Register" line.long 0x04 "HALTTIMER,Halt Timer Register" bitfld.long 0x04 0.--1. "HALTEN,Halt Enable" "0,1,2,3" tree.end tree "BASETIMER5" group.long ad:0xD00B8020++0x03 line.long 0x00 "LOAD,Load Register" rgroup.long ad:0xD00B8024++0x03 line.long 0x00 "VALUE,Value Register" group.long ad:0xD00B8028++0x03 line.long 0x00 "CTRL,Control Register" bitfld.long 0x00 8.--9. "PULSEN,The Pulse to CAN Module Enable" "0,1,2,3" bitfld.long 0x00 7. "EN,Timer Count Enable/Disable" "0,1" bitfld.long 0x00 6. "MODE,Timer Working Mode" "0,1" bitfld.long 0x00 5. "INTEN,Timer Interrupt Enable/Disable" "0,1" bitfld.long 0x00 1. "SIZE,Timer Count Width Size" "0,1" bitfld.long 0x00 0. "ONESHOT,One-Shot Working Mode Enable" "0,1" wgroup.long ad:0xD00B802C++0x03 line.long 0x00 "CLR,Status Clear Register" bitfld.long 0x00 0. "CLR,Interrupt Flag and Overflow Flag Clear" "0,1" rgroup.long ad:0xD00B8030++0x07 line.long 0x00 "RIS,Raw Interrupt Status Register" bitfld.long 0x00 0. "RIS,Raw Interrupt Status" "0,1" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 0. "INTSTS,Interrupt Status" "0,1" group.long ad:0xD00B8038++0x07 line.long 0x00 "BGLOAD,Background Load Register" line.long 0x04 "HALTTIMER,Halt Timer Register" bitfld.long 0x04 0.--1. "HALTEN,Halt Enable" "0,1,2,3" tree.end tree.end tree "GTM_WRAPPER" group.long ad:0xC0005000++0x97 line.long 0x00 "TIM0INMUX,GTM TIM0 Input Multiplex Register" bitfld.long 0x00 28.--31. "CH7MUX,TIM0 Channel 7 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "CH6MUX,TIM0 Channel 6 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "CH5MUX,TIM0 Channel 5 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "CH4MUX,TIM0 Channel 4 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "CH3MUX,TIM0 Channel 3 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "CH2MUX,TIM0 Channel 2 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "CH1MUX,TIM0 Channel 1 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0.--3. "CH0MUX,TIM0 Channel 0 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "TIM1INMUX,GTM TIM1 Input Multiplex Register" bitfld.long 0x04 28.--31. "CH7MUX,TIM1 Channel 7 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24.--27. "CH6MUX,TIM1 Channel 6 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--23. "CH5MUX,TIM1 Channel 5 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. "CH4MUX,TIM1 Channel 4 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. "CH3MUX,TIM1 Channel 3 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. "CH2MUX,TIM1 Channel 2 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. "CH1MUX,TIM1 Channel 1 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 0.--3. "CH0MUX,TIM1 Channel 0 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "TIM2INMUX,GTM TIM2 Input Multiplex Register" bitfld.long 0x08 28.--31. "CH7MUX,TIM2 Channel 7 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. "CH6MUX,TIM2 Channel 6 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. "CH5MUX,TIM2 Channel 5 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. "CH4MUX,TIM2 Channel 4 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. "CH3MUX,TIM2 Channel 3 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. "CH2MUX,TIM2 Channel 2 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. "CH1MUX,TIM2 Channel 1 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 0.--3. "CH0MUX,TIM2 Channel 0 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "TOUTMUX0,GTM Timer Output Multiplex Register 0" bitfld.long 0x0C 28.--31. "MUX7,TOUT7 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. "MUX6,TOUT6 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 20.--23. "MUX5,TOUT5 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. "MUX4,TOUT4 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 12.--15. "MUX3,TOUT3 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. "MUX2,TOUT2 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 4.--7. "MUX1,TOUT1 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x0C 0.--3. "MUX0,TOUT0 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "TOUTMUX1,GTM Timer Output Multiplex Register 1" bitfld.long 0x10 28.--31. "MUX7,TOUT15 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 24.--27. "MUX6,TOUT14 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 20.--23. "MUX5,TOUT13 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--19. "MUX4,TOUT12 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 12.--15. "MUX3,TOUT11 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 8.--11. "MUX2,TOUT10 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 4.--7. "MUX1,TOUT9 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x10 0.--3. "MUX0,TOUT8 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "TOUTMUX2,GTM Timer Output Multiplex Register 2" bitfld.long 0x14 28.--31. "MUX7,TOUT23 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 24.--27. "MUX6,TOUT22 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 20.--23. "MUX5,TOUT21 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 16.--19. "MUX4,TOUT20 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 12.--15. "MUX3,TOUT19 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 8.--11. "MUX2,TOUT18 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 4.--7. "MUX1,TOUT17 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x14 0.--3. "MUX0,TOUT16 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x18 "TOUTMUX3,GTM Timer Output Multiplex Register 3" bitfld.long 0x18 28.--31. "MUX7,TOUT31 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 24.--27. "MUX6,TOUT30 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 20.--23. "MUX5,TOUT29 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 16.--19. "MUX4,TOUT28 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--15. "MUX3,TOUT27 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 8.--11. "MUX2,TOUT26 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 4.--7. "MUX1,TOUT25 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x18 0.--3. "MUX0,TOUT24 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TOUTMUX4,GTM Timer Output Multiplex Register 4" bitfld.long 0x1C 28.--31. "MUX7,TOUT39 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 24.--27. "MUX6,TOUT38 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 20.--23. "MUX5,TOUT37 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. "MUX4,TOUT36 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12.--15. "MUX3,TOUT35 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 8.--11. "MUX2,TOUT34 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 4.--7. "MUX1,TOUT33 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x1C 0.--3. "MUX0,TOUT32 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x20 "TOUTMUX5,GTM Timer Output Multiplex Register 5" bitfld.long 0x20 28.--31. "MUX7,TOUT47 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 24.--27. "MUX6,TOUT46 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 20.--23. "MUX5,TOUT45 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 16.--19. "MUX4,TOUT44 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 12.--15. "MUX3,TOUT43 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 8.--11. "MUX2,TOUT42 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 4.--7. "MUX1,TOUT41 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x20 0.--3. "MUX0,TOUT40 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "TOUTMUX6,GTM Timer Output Multiplex Register 6" bitfld.long 0x24 28.--31. "MUX7,TOUT55 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 24.--27. "MUX6,TOUT54 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 20.--23. "MUX5,TOUT53 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 16.--19. "MUX4,TOUT52 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 12.--15. "MUX3,TOUT51 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 8.--11. "MUX2,TOUT50 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 4.--7. "MUX1,TOUT49 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x24 0.--3. "MUX0,TOUT48 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "TOUTMUX7,GTM Timer Output Multiplex Register 7" bitfld.long 0x28 28.--31. "MUX7,TOUT63 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 24.--27. "MUX6,TOUT62 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 20.--23. "MUX5,TOUT61 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 16.--19. "MUX4,TOUT60 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 12.--15. "MUX3,TOUT59 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 8.--11. "MUX2,TOUT58 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 4.--7. "MUX1,TOUT57 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x28 0.--3. "MUX0,TOUT56 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "TOUTMUX8,GTM Timer Output Multiplex Register 8" bitfld.long 0x2C 28.--31. "MUX7,TOUT71 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 24.--27. "MUX6,TOUT70 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 20.--23. "MUX5,TOUT69 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 16.--19. "MUX4,TOUT68 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 12.--15. "MUX3,TOUT67 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 8.--11. "MUX2,TOUT66 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 4.--7. "MUX1,TOUT65 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x2C 0.--3. "MUX0,TOUT64 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x30 "TOUTMUX9,GTM Timer Output Multiplex Register 9" bitfld.long 0x30 28.--31. "MUX7,TOUT79 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 24.--27. "MUX6,TOUT78 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 20.--23. "MUX5,TOUT77 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 16.--19. "MUX4,TOUT76 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 12.--15. "MUX3,TOUT75 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 8.--11. "MUX2,TOUT74 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 4.--7. "MUX1,TOUT73 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x30 0.--3. "MUX0,TOUT72 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x34 "TOUTMUX10,GTM Timer Output Multiplex Register 10" bitfld.long 0x34 28.--31. "MUX7,TOUT87 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 24.--27. "MUX6,TOUT86 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 20.--23. "MUX5,TOUT85 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 16.--19. "MUX4,TOUT84 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 12.--15. "MUX3,TOUT83 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 8.--11. "MUX2,TOUT82 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 4.--7. "MUX1,TOUT81 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x34 0.--3. "MUX0,TOUT80 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x38 "TOUTMUX11,GTM Timer Output Multiplex Register 11" bitfld.long 0x38 28.--31. "MUX7,TOUT95 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 24.--27. "MUX6,TOUT94 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 20.--23. "MUX5,TOUT93 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 16.--19. "MUX4,TOUT92 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 12.--15. "MUX3,TOUT91 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 8.--11. "MUX2,TOUT90 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 4.--7. "MUX1,TOUT89 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x38 0.--3. "MUX0,TOUT88 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x3C "TOUTMUX12,GTM Timer Output Multiplex Register 12" bitfld.long 0x3C 28.--31. "MUX7,TOUT103 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 24.--27. "MUX6,TOUT102 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 20.--23. "MUX5,TOUT101 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 16.--19. "MUX4,TOUT100 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 12.--15. "MUX3,TOUT99 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 8.--11. "MUX2,TOUT98 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 4.--7. "MUX1,TOUT97 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x3C 0.--3. "MUX0,TOUT96 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x40 "TOUTMUX13,GTM Timer Output Multiplex Register 13" bitfld.long 0x40 28.--31. "MUX7,TOUT111 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x40 24.--27. "MUX6,TOUT110 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x40 20.--23. "MUX5,TOUT109 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x40 16.--19. "MUX4,TOUT108 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x40 12.--15. "MUX3,TOUT107 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x40 8.--11. "MUX2,TOUT106 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x40 4.--7. "MUX1,TOUT105 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x40 0.--3. "MUX0,TOUT104 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x44 "TOUTMUX14,GTM Timer Output Multiplex Register 14" bitfld.long 0x44 28.--31. "MUX7,TOUT119 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x44 24.--27. "MUX6,TOUT118 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x44 20.--23. "MUX5,TOUT117 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x44 16.--19. "MUX4,TOUT116 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x44 12.--15. "MUX3,TOUT115 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x44 8.--11. "MUX2,TOUT114 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x44 4.--7. "MUX1,TOUT113 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x44 0.--3. "MUX0,TOUT112 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x48 "TOUTMUX15,GTM Timer Output Multiplex Register 15" bitfld.long 0x48 28.--31. "MUX7,TOUT127 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 24.--27. "MUX6,TOUT126 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 20.--23. "MUX5,TOUT125 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 16.--19. "MUX4,TOUT124 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 12.--15. "MUX3,TOUT123 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 8.--11. "MUX2,TOUT122 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 4.--7. "MUX1,TOUT121 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x48 0.--3. "MUX0,TOUT120 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4C "TOUTMUX16,GTM Timer Output Multiplex 16 Register" bitfld.long 0x4C 4.--7. "MUX1,TOUT129 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 0.--3. "MUX0,TOUT128 Output Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x50 "DSADCINMUX0,DSADC Input Multiplex Register 0" bitfld.long 0x50 28.--31. "INMUX7,The Multiplexing Relationship Between DSADC and TIM0 Channel7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 24.--27. "INMUX6,The Multiplexing Relationship Between DSADC and TIM0 Channel6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 20.--23. "INMUX5,The Multiplexing Relationship Between DSADC and TIM0 Channel5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 16.--19. "INMUX4,The Multiplexing Relationship Between DSADC and TIM0 Channel4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 12.--15. "INMUX3,The Multiplexing Relationship Between DSADC and TIM0 Channel3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 8.--11. "INMUX2,The Multiplexing Relationship Between DSADC and TIM0 Channel2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 4.--7. "INMUX1,The Multiplexing Relationship Between DSADC and TIM0 Channel1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x50 0.--3. "INMUX0,The Multiplexing Relationship Between DSADC and TIM0 Channel0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x54 "DSADCINMUX1,DSADC Input Multiplex Register 1" bitfld.long 0x54 28.--31. "INMUX7,The Multiplexing Relationship Between DSADC and TIM1 Channel7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 24.--27. "INMUX6,The Multiplexing Relationship Between DSADC and TIM1 Channel6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 20.--23. "INMUX5,The Multiplexing Relationship Between DSADC and TIM1 Channel5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 16.--19. "INMUX4,The Multiplexing Relationship Between DSADC and TIM1 Channel4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 12.--15. "INMUX3,The Multiplexing Relationship Between DSADC and TIM1 Channel3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 8.--11. "INMUX2,The Multiplexing Relationship Between DSADC and TIM1 Channel2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 4.--7. "INMUX1,The Multiplexing Relationship Between DSADC and TIM1 Channel1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x54 0.--3. "INMUX0,The Multiplexing Relationship Between DSADC and TIM1 Channel0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x58 "DSADCINMUX2,DSADC Input Multiplex Register 2" bitfld.long 0x58 28.--31. "INMUX7,The Multiplexing Relationship Between DSADC and TIM2 Channel7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 24.--27. "INMUX6,The Multiplexing Relationship Between DSADC and TIM2 Channel6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 20.--23. "INMUX5,The Multiplexing Relationship Between DSADC and TIM2 Channel5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 16.--19. "INMUX4,The Multiplexing Relationship Between DSADC and TIM2 Channel4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 12.--15. "INMUX3,The Multiplexing Relationship Between DSADC and TIM2 Channel3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 8.--11. "INMUX2,The Multiplexing Relationship Between DSADC and TIM2 Channel2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 4.--7. "INMUX1,The Multiplexing Relationship Between DSADC and TIM2 Channel1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x58 0.--3. "INMUX0,The Multiplexing Relationship Between DSADC and TIM2 Channel0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x5C "DSADCOUTMUX0,DSADC Output Multiplex Register 0" bitfld.long 0x5C 12.--15. "MUX3,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 8.--11. "MUX2,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 4.--7. "MUX1,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 0.--3. "MUX0,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x60 "DSADCOUTMUX1,DSADC Output Multiplex Register 1" bitfld.long 0x60 12.--15. "MUX3,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 8.--11. "MUX2,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 4.--7. "MUX1,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 0.--3. "MUX0,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x64 "DSADCOUTMUX2,DSADC Output Multiplex Register 2" bitfld.long 0x64 12.--15. "MUX3,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 8.--11. "MUX2,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 4.--7. "MUX1,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 0.--3. "MUX0,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x68 "DSADCOUTMUX3,DSADC Output Multiplex Register 3" bitfld.long 0x68 12.--15. "MUX3,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 8.--11. "MUX2,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 4.--7. "MUX1,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 0.--3. "MUX0,Output Multiplexing for DSADCx GTM Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x6C "ADCTRIG0OUTMUX0,ADC Trigger 0 Output Multiplex Register 0" bitfld.long 0x6C 28.--31. "MUX7,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 24.--27. "MUX6,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 20.--23. "MUX5,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 16.--19. "MUX4,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 12.--15. "MUX3,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 8.--11. "MUX2,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 4.--7. "MUX1,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x6C 0.--3. "MUX0,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x70 "ADCTRIG0OUTMUX1,ADC Trigger 0 Output Multiplex Register 1" bitfld.long 0x70 12.--15. "MUX3,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 8.--11. "MUX2,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 4.--7. "MUX1,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 0.--3. "MUX0,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x74 "ADCTRIG1OUTMUX0,ADC Trigger 1 Output Multiplex Register 0" bitfld.long 0x74 28.--31. "MUX7,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 24.--27. "MUX6,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 20.--23. "MUX5,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 16.--19. "MUX4,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 12.--15. "MUX3,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 8.--11. "MUX2,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 4.--7. "MUX1,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x74 0.--3. "MUX0,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x78 "ADCTRIG1OUTMUX1,ADC Trigger 1 Output Multiplex Register 1" bitfld.long 0x78 12.--15. "MUX3,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x78 8.--11. "MUX2,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x78 4.--7. "MUX1,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x78 0.--3. "MUX0,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x7C "ADCTRIG2OUTMUX0,ADC Trigger 2 Output Multiplex Register 0" bitfld.long 0x7C 28.--31. "MUX7,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x7C 24.--27. "MUX6,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x7C 20.--23. "MUX5,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x7C 16.--19. "MUX4,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x7C 12.--15. "MUX3,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x7C 8.--11. "MUX2,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x7C 4.--7. "MUX1,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x7C 0.--3. "MUX0,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x80 "ADCTRIG2OUTMUX1,ADC Trigger 2 Output Multiplex Register 1" bitfld.long 0x80 12.--15. "MUX3,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x80 8.--11. "MUX2,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x80 4.--7. "MUX1,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x80 0.--3. "MUX0,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x84 "ADCTRIG3OUTMUX0,ADC Trigger 3 Output Multiplex Register 0" bitfld.long 0x84 28.--31. "MUX7,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x84 24.--27. "MUX6,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x84 20.--23. "MUX5,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x84 16.--19. "MUX4,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x84 12.--15. "MUX3,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x84 8.--11. "MUX2,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x84 4.--7. "MUX1,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x84 0.--3. "MUX0,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x88 "ADCTRIG3OUTMUX1,ADC Trigger3 Output Multiplex Register 1" bitfld.long 0x88 12.--15. "MUX3,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x88 8.--11. "MUX2,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x88 4.--7. "MUX1,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x88 0.--3. "MUX0,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x8C "ADCTRIG4OUTMUX0,ADC Trigger 4 Output Multiplex Register 0" bitfld.long 0x8C 28.--31. "MUX7,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8C 24.--27. "MUX6,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8C 20.--23. "MUX5,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8C 16.--19. "MUX4,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8C 12.--15. "MUX3,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8C 8.--11. "MUX2,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x8C 4.--7. "MUX1,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x8C 0.--3. "MUX0,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x90 "ADCTRIG4OUTMUX1,ADC Trigger 4 Output Multiplex Register 1" bitfld.long 0x90 12.--15. "MUX3,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x90 8.--11. "MUX2,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x90 4.--7. "MUX1,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x90 0.--3. "MUX0,Output Multiplexing for GTM to ADCx Connection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x94 "DEXOUTCON,Data Exchange Output Control Register" bitfld.long 0x94 3. "OUTCON3,Output Control 3" "0,1" bitfld.long 0x94 2. "OUTCON2,Output Control 2" "0,1" bitfld.long 0x94 1. "OUTCON1,Output Control 1" "0,1" bitfld.long 0x94 0. "OUTCON0,Output Control 0" "0,1" wgroup.long ad:0xC0005098++0x1F line.long 0x00 "TRIGOUTCON0,Trigger Output Control Register n (n=0~3)" bitfld.long 0x00 6.--7. "TRIG3,Trigger Output 3" "0,1,2,3" bitfld.long 0x00 4.--5. "TRIG2,Trigger Output 2" "0,1,2,3" bitfld.long 0x00 2.--3. "TRIG1,Trigger Output 1" "0,1,2,3" bitfld.long 0x00 0.--1. "TRIG0,Trigger Output 0" "0,1,2,3" line.long 0x04 "TRIGOUTCON1,Trigger Output Control Register n (n=0~3)" bitfld.long 0x04 6.--7. "TRIG3,Trigger Output 3" "0,1,2,3" bitfld.long 0x04 4.--5. "TRIG2,Trigger Output 2" "0,1,2,3" bitfld.long 0x04 2.--3. "TRIG1,Trigger Output 1" "0,1,2,3" bitfld.long 0x04 0.--1. "TRIG0,Trigger Output 0" "0,1,2,3" line.long 0x08 "TRIGOUTCON2,Trigger Output Control Register n (n=0~3)" bitfld.long 0x08 6.--7. "TRIG3,Trigger Output 3" "0,1,2,3" bitfld.long 0x08 4.--5. "TRIG2,Trigger Output 2" "0,1,2,3" bitfld.long 0x08 2.--3. "TRIG1,Trigger Output 1" "0,1,2,3" bitfld.long 0x08 0.--1. "TRIG0,Trigger Output 0" "0,1,2,3" line.long 0x0C "TRIGOUTCON3,Trigger Output Control Register n (n=0~3)" bitfld.long 0x0C 6.--7. "TRIG3,Trigger Output 3" "0,1,2,3" bitfld.long 0x0C 4.--5. "TRIG2,Trigger Output 2" "0,1,2,3" bitfld.long 0x0C 2.--3. "TRIG1,Trigger Output 1" "0,1,2,3" bitfld.long 0x0C 0.--1. "TRIG0,Trigger Output 0" "0,1,2,3" line.long 0x10 "INTOUTCON0,Interrupt Output Control Register n (n=0~3)" bitfld.long 0x10 0.--1. "INT0,Interrupt Output" "0,1,2,3" line.long 0x14 "INTOUTCON1,Interrupt Output Control Register n (n=0~3)" bitfld.long 0x14 0.--1. "INT0,Interrupt Output" "0,1,2,3" line.long 0x18 "INTOUTCON2,Interrupt Output Control Register n (n=0~3)" bitfld.long 0x18 0.--1. "INT0,Interrupt Output" "0,1,2,3" line.long 0x1C "INTOUTCON3,Interrupt Output Control Register n (n=0~3)" bitfld.long 0x1C 0.--1. "INT0,Interrupt Output" "0,1,2,3" group.long ad:0xC00050B8++0x03 line.long 0x00 "TRIGOUTMUX,Trigger Output Multiplex Register" bitfld.long 0x00 4.--7. "MUX1,Selects which MCS triggers go to FC1BFDAT/SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MUX0,Selects which MCS triggers go to FC0BFDAT/SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC00050BC++0x03 line.long 0x00 "INTSTS,MCS Interrupt Status Register" bitfld.long 0x00 3. "MCS3,MCS3 RAM0 Interrupt Status Flag" "0,1" bitfld.long 0x00 2. "MCS2,MCS2 RAM0 Interrupt Status Flag" "0,1" bitfld.long 0x00 1. "MCS1,MCS1 RAM0 Interrupt Status Flag" "0,1" bitfld.long 0x00 0. "MCS0,MCS0 RAM0 Interrupt Status Flag" "0,1" wgroup.long ad:0xC00050C0++0x03 line.long 0x00 "INTSTSCLR,MCS Interrupt Status Clear Register" bitfld.long 0x00 3. "MCS3,MCS3 RAM0 Interrupt 0 Status Clear Bit" "0,1" bitfld.long 0x00 2. "MCS2,MCS3 RAM0 Interrupt 0 Status Clear Bit" "0,1" bitfld.long 0x00 1. "MCS1,MCS3 RAM0 Interrupt 0 Status Clear Bit" "0,1" bitfld.long 0x00 0. "MCS0,MCS3 RAM0 Interrupt 0 Status Clear Bit" "0,1" group.long ad:0xC00050C4++0x137 line.long 0x00 "DEXINCON,Data Exchange Input Control Register" bitfld.long 0x00 19. "DSCON3,Data Source Control 3" "0,1" bitfld.long 0x00 18. "DSCON2,Data Source Control 2" "0,1" bitfld.long 0x00 17. "DSCON1,Data Source Control 1" "0,1" bitfld.long 0x00 16. "DSCON0,Data Source Control 0" "0,1" bitfld.long 0x00 3. "INCON3,Data Input Selection 3" "0,1" bitfld.long 0x00 2. "INCON2,Data Input Selection 2" "0,1" bitfld.long 0x00 1. "INCON1,Data Input Selection 1" "0,1" newline bitfld.long 0x00 0. "INCON0,Data Input Selection 0" "0,1" line.long 0x04 "DATAIN0,Data Input Register n (n=0~3)" line.long 0x08 "DATAIN1,Data Input Register n (n=0~3)" line.long 0x0C "DATAIN2,Data Input Register n (n=0~3)" line.long 0x10 "DATAIN3,Data Input Register n (n=0~3)" line.long 0x14 "MSCSET0MUX0,MSC Set 0 Multiplex Register 0" bitfld.long 0x14 24.--28. "MUX3,SET0[3] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 16.--20. "MUX2,SET0[2] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 8.--12. "MUX1,SET0[1] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x14 0.--4. "MUX0,SET0 [0] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x18 "MSCSET0MUX1,MSC Set 0 Multiplex Register 1" bitfld.long 0x18 24.--28. "MUX7,SET0[7] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 16.--20. "MUX6,SET0[6] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 8.--12. "MUX5,SET0[5] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 0.--4. "MUX4,SET0[4] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "MSCSET0MUX2,MSC Set 0 Multiplex Register 2" bitfld.long 0x1C 24.--28. "MUX11,SET0[11] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 16.--20. "MUX10,SET0[10] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 8.--12. "MUX9,SET0[9] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x1C 0.--4. "MUX8,SET0[8] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x20 "MSCSET0MUX3,MSC Set 0 Multiplex Register 3" bitfld.long 0x20 24.--28. "MUX15,SET0[15] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 16.--20. "MUX14,SET0[14] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 8.--12. "MUX13,SET0[13] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x20 0.--4. "MUX12,SET0[12] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x24 "MSCSET1MUX0,MSC Set 1 Multiplex Register 0" bitfld.long 0x24 24.--28. "MUX3,SET1[3] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 16.--20. "MUX2,SET1[2] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 8.--12. "MUX1,SET1[1] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x24 0.--4. "MUX0,SET1[0] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x28 "MSCSET1MUX1,MSC Set 1 Multiplex Register 1" bitfld.long 0x28 24.--28. "MUX7,SET1[7] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 16.--20. "MUX6,SET1[6] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 8.--12. "MUX5,SET1[5] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x28 0.--4. "MUX4,SET1[4] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "MSCSET1MUX2,MSC Set 1 Multiplex Register 2" bitfld.long 0x2C 24.--28. "MUX11,SET1[11] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 16.--20. "MUX10,SET1[10] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 8.--12. "MUX9,SET1[9] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x2C 0.--4. "MUX8,SET1[8] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "MSCSET1MUX3,MSC Set 1 Multiplex Register 3" bitfld.long 0x30 24.--28. "MUX15,SET1[15] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 16.--20. "MUX14,SET1[14] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 8.--12. "MUX13,SET1[13] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x30 0.--4. "MUX12,SET1[12] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "MSCSET2MUX0,MSC Set 2 Multiplex Register 0" bitfld.long 0x34 24.--28. "MUX3,Set 2[3] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 16.--20. "MUX2,Set 2[2] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 8.--12. "MUX1,Set 2[1] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x34 0.--4. "MUX0,Set 2[0] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "MSCSET2MUX1,MSC Set 2 Multiplex Register 1" bitfld.long 0x38 24.--28. "MUX7,Set 2[7] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 16.--20. "MUX6,Set 2[6] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 8.--12. "MUX5,Set 2[5] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x38 0.--4. "MUX4,Set 2[4] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "MSCSET2MUX2,MSC Set 2 Multiplex Register 2" bitfld.long 0x3C 24.--28. "MUX11,Set 2[11] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 16.--20. "MUX10,Set 2[10] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 8.--12. "MUX9,Set 2[9] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x3C 0.--4. "MUX8,Set 2[8] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x40 "MSCSET2MUX3,MSC Set 2 Multiplex Register 3" bitfld.long 0x40 24.--28. "MUX15,Set 2[15] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 16.--20. "MUX14,Set 2[14] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 8.--12. "MUX13,Set 2[13] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x40 0.--4. "MUX12,Set 2[12] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x44 "MSCSET3MUX0,MSC Set 3 Multiplex Register 0" bitfld.long 0x44 24.--28. "MUX3,Set 3[3] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 16.--20. "MUX2,Set 3[2] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 8.--12. "MUX1,Set 3[1] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x44 0.--4. "MUX0,Set 3[0] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x48 "MSCSET3MUX1,MSC Set 3 Multiplex Register 1" bitfld.long 0x48 24.--28. "MUX7,Set 3[7] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 16.--20. "MUX6,Set 3[6] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 8.--12. "MUX5,Set 3[5] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x48 0.--4. "MUX4,Set 3[4] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x4C "MSCSET3MUX2,MSC Set 3 Multiplex Register 2" bitfld.long 0x4C 24.--28. "MUX11,Set 3[11] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 16.--20. "MUX10,Set 3[10] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 8.--12. "MUX9,Set 3[9] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x4C 0.--4. "MUX8,Set 3[8] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x50 "MSCSET3MUX3,MSC Set 3 Multiplex Register 3" bitfld.long 0x50 24.--28. "MUX15,Set 3[15] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 16.--20. "MUX14,Set 3[14] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 8.--12. "MUX13,Set 3[13] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x50 0.--4. "MUX12,Set 3[12] Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x54 "MSC0INLMUX,MSC0 Input Low Multiplex Register" bitfld.long 0x54 30.--31. "MUX15,GTM MSC0 Low 15 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 28.--29. "MUX14,GTM MSC0 Low 14 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 26.--27. "MUX13,GTM MSC0 Low 13 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 24.--25. "MUX12,GTM MSC0 Low 12 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 22.--23. "MUX11,GTM MSC0 Low 11 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 20.--21. "MUX10,GTM MSC0 Low 10 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 18.--19. "MUX9,GTM MSC0 Low 9 Output Multiplexing" "0,1,2,3" newline bitfld.long 0x54 16.--17. "MUX8,GTM MSC0 Low 8 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 14.--15. "MUX7,GTM MSC0 Low 7 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 12.--13. "MUX6,GTM MSC0 Low 6 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 10.--11. "MUX5,GTM MSC0 Low 5 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 8.--9. "MUX4,GTM MSC0 Low 4 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 6.--7. "MUX3,GTM MSC0 Low 3 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 4.--5. "MUX2,GTM MSC0 Low 2 Output Multiplexing" "0,1,2,3" newline bitfld.long 0x54 2.--3. "MUX1,GTM MSC0 Low 1 Output Multiplexing" "0,1,2,3" bitfld.long 0x54 0.--1. "MUX0,GTM MSC0 Low 0 Output Multiplexing" "0,1,2,3" line.long 0x58 "MSC0HNLMUX,MSC0 Input High Multiplex Register" bitfld.long 0x58 30.--31. "MUX15,GTM MSC0 High 15 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 28.--29. "MUX14,GTM MSC0 High 14 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 26.--27. "MUX13,GTM MSC0 High 13 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 24.--25. "MUX12,GTM MSC0 High 12 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 22.--23. "MUX11,GTM MSC0 High 11 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 20.--21. "MUX10,GTM MSC0 High 10 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 18.--19. "MUX9,GTM MSC0 High 9 Output Multiplexing" "0,1,2,3" newline bitfld.long 0x58 16.--17. "MUX8,GTM MSC0 High 8 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 14.--15. "MUX7,GTM MSC0 High 7 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 12.--13. "MUX6,GTM MSC0 High 6 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 10.--11. "MUX5,GTM MSC0 High 5 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 8.--9. "MUX4,GTM MSC0 High 4 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 6.--7. "MUX3,GTM MSC0 High 3 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 4.--5. "MUX2,GTM MSC0 High 2 Output Multiplexing" "0,1,2,3" newline bitfld.long 0x58 2.--3. "MUX1,GTM MSC0 High 1 Output Multiplexing" "0,1,2,3" bitfld.long 0x58 0.--1. "MUX0,GTM MSC0 High 0 Output Multiplexing" "0,1,2,3" line.long 0x5C "MSC0INLEXTMUX,MSC0 Input Low Extended Multiplex Register" bitfld.long 0x5C 30.--31. "MUX15,GTM MSC0 Low Extended 15 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 28.--29. "MUX14,GTM MSC0 Low Extended 14 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 26.--27. "MUX13,GTM MSC0 Low Extended 13 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 24.--25. "MUX12,GTM MSC0 Low Extended 12 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 22.--23. "MUX11,GTM MSC0 Low Extended 11 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 20.--21. "MUX10,GTM MSC0 Low Extended 10 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 18.--19. "MUX9,GTM MSC0 Low Extended 9 Output Multiplexing" "0,1,2,3" newline bitfld.long 0x5C 16.--17. "MUX8,GTM MSC0 Low Extended 8 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 14.--15. "MUX7,GTM MSC0 Low Extended 7 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 12.--13. "MUX6,GTM MSC0 Low Extended 6 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 10.--11. "MUX5,GTM MSC0 Low Extended 5 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 8.--9. "MUX4,GTM MSC0 Low Extended 4 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 6.--7. "MUX3,GTM MSC0 Low Extended 3 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 4.--5. "MUX2,GTM MSC0 Low Extended 2 Output Multiplexing" "0,1,2,3" newline bitfld.long 0x5C 2.--3. "MUX1,GTM MSC0 Low Extended 1 Output Multiplexing" "0,1,2,3" bitfld.long 0x5C 0.--1. "MUX0,GTM MSC0 Low Extended 0 Output Multiplexing" "0,1,2,3" line.long 0x60 "DTMAUXINMUX,DTM_AUX Input Multiplex Register" bitfld.long 0x60 18.--19. "MUXT1,CDTMx_DTM0_AUX Input Multiplexing (TOMx_CH0...3)" "0,1,2,3" bitfld.long 0x60 16.--17. "MUXT0,CDTMx_DTM0_AUX Input Multiplexing (TOMx_CH0...3)" "0,1,2,3" bitfld.long 0x60 6.--7. "MUXA3,CDTMx_DTM4_AUX Input Multiplexing (ATOMx_CH0...3)" "0,1,2,3" bitfld.long 0x60 4.--5. "MUXA2,CDTMx_DTM4_AUX Input Multiplexing (ATOMx_CH0...3)" "0,1,2,3" bitfld.long 0x60 2.--3. "MUXA1,CDTMx_DTM4_AUX Input Multiplexing (ATOMx_CH0...3)" "0,1,2,3" bitfld.long 0x60 0.--1. "MUXA0,CDTMx_DTM4_AUX Input Multiplexing (ATOMx_CH0...3)" "0,1,2,3" line.long 0x64 "CANOUTMUX,CAN Output Multiplex Register" bitfld.long 0x64 28.--31. "MUX7,Output Multiplexing for GTM to CAN connection 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 24.--27. "MUX6,Output Multiplexing for GTM to CAN connection 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 20.--23. "MUX5,Output Multiplexing for GTM to CAN connection 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 16.--19. "MUX4,Output Multiplexing for GTM to CAN connection 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 12.--15. "MUX3,Output Multiplexing for GTM to CAN connection 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 8.--11. "MUX2,Output Multiplexing for GTM to CAN connection 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 4.--7. "MUX1,Output Multiplexing for GTM to CAN connection 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x64 0.--3. "MUX0,Output Multiplexing for GTM to CAN connection 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x68 "RDCOUTMUX,RDC Output Multiplex Register" bitfld.long 0x68 8.--12. "MUX1,Output Multiplexing for GTM to RDC connection 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x68 0.--4. "MUX0,Output Multiplexing for GTM to RDC connection 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x6C "IDRQEN,Interrupt Request and DMA Request Enable Register" bitfld.long 0x6C 2.--3. "EN1,DMA Request output enable signal" "0,1,2,3" bitfld.long 0x6C 0.--1. "EN0,Interrupt output enable signal" "0,1,2,3" line.long 0x70 "DMAL1MUX00,DMA Level 1 Multiplex Register 0n (n=0~7)" hexmask.long.byte 0x70 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0x74 "DMAL1MUX01,DMA Level 1 Multiplex Register 0n (n=0~7)" hexmask.long.byte 0x74 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0x78 "DMAL1MUX02,DMA Level 1 Multiplex Register 0n (n=0~7)" hexmask.long.byte 0x78 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0x7C "DMAL1MUX03,DMA Level 1 Multiplex Register 0n (n=0~7)" hexmask.long.byte 0x7C 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0x80 "DMAL1MUX04,DMA Level 1 Multiplex Register 0n (n=0~7)" hexmask.long.byte 0x80 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0x84 "DMAL1MUX05,DMA Level 1 Multiplex Register 0n (n=0~7)" hexmask.long.byte 0x84 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0x88 "DMAL1MUX06,DMA Level 1 Multiplex Register 0n (n=0~7)" hexmask.long.byte 0x88 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0x8C "DMAL1MUX07,DMA Level 1 Multiplex Register 0n (n=0~7)" hexmask.long.byte 0x8C 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0x90 "DMAL1MUX10,DMA Level 1 Multiplex Register 1n (n=0~7)" hexmask.long.byte 0x90 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0x94 "DMAL1MUX11,DMA Level 1 Multiplex Register 1n (n=0~7)" hexmask.long.byte 0x94 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0x98 "DMAL1MUX12,DMA Level 1 Multiplex Register 1n (n=0~7)" hexmask.long.byte 0x98 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0x9C "DMAL1MUX13,DMA Level 1 Multiplex Register 1n (n=0~7)" hexmask.long.byte 0x9C 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xA0 "DMAL1MUX14,DMA Level 1 Multiplex Register 1n (n=0~7)" hexmask.long.byte 0xA0 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xA4 "DMAL1MUX15,DMA Level 1 Multiplex Register 1n (n=0~7)" hexmask.long.byte 0xA4 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xA8 "DMAL1MUX16,DMA Level 1 Multiplex Register 1n (n=0~7)" hexmask.long.byte 0xA8 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xAC "DMAL1MUX17,DMA Level 1 Multiplex Register 1n (n=0~7)" hexmask.long.byte 0xAC 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xB0 "DMAL1MUX20,DMA Level 1 Multiplex Register 2n (n=0~7)" hexmask.long.byte 0xB0 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xB4 "DMAL1MUX21,DMA Level 1 Multiplex Register 2n (n=0~7)" hexmask.long.byte 0xB4 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xB8 "DMAL1MUX22,DMA Level 1 Multiplex Register 2n (n=0~7)" hexmask.long.byte 0xB8 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xBC "DMAL1MUX23,DMA Level 1 Multiplex Register 2n (n=0~7)" hexmask.long.byte 0xBC 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xC0 "DMAL1MUX24,DMA Level 1 Multiplex Register 2n (n=0~7)" hexmask.long.byte 0xC0 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xC4 "DMAL1MUX25,DMA Level 1 Multiplex Register 2n (n=0~7)" hexmask.long.byte 0xC4 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xC8 "DMAL1MUX26,DMA Level 1 Multiplex Register 2n (n=0~7)" hexmask.long.byte 0xC8 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xCC "DMAL1MUX27,DMA Level 1 Multiplex Register 2n (n=0~7)" hexmask.long.byte 0xCC 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xD0 "DMAL1MUX30,DMA Level 1 Multiplex Register 3n (n=0~7)" hexmask.long.byte 0xD0 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xD4 "DMAL1MUX31,DMA Level 1 Multiplex Register 3n (n=0~7)" hexmask.long.byte 0xD4 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xD8 "DMAL1MUX32,DMA Level 1 Multiplex Register 3n (n=0~7)" hexmask.long.byte 0xD8 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xDC "DMAL1MUX33,DMA Level 1 Multiplex Register 3n (n=0~7)" hexmask.long.byte 0xDC 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xE0 "DMAL1MUX34,DMA Level 1 Multiplex Register 3n (n=0~7)" hexmask.long.byte 0xE0 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xE4 "DMAL1MUX35,DMA Level 1 Multiplex Register 3n (n=0~7)" hexmask.long.byte 0xE4 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xE8 "DMAL1MUX36,DMA Level 1 Multiplex Register 3n (n=0~7)" hexmask.long.byte 0xE8 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xEC "DMAL1MUX37,DMA Level 1 Multiplex Register 3n (n=0~7)" hexmask.long.byte 0xEC 0.--5. 1. "MUX,DMA Request from ICM Outputs" line.long 0xF0 "DMAL1COMMUX0,DMA Level 1 Common Multiplex Register n (n=0~9)" hexmask.long.byte 0xF0 0.--5. 1. "MUX," line.long 0xF4 "DMAL1COMMUX1,DMA Level 1 Common Multiplex Register n (n=0~9)" hexmask.long.byte 0xF4 0.--5. 1. "MUX," line.long 0xF8 "DMAL1COMMUX2,DMA Level 1 Common Multiplex Register n (n=0~9)" hexmask.long.byte 0xF8 0.--5. 1. "MUX," line.long 0xFC "DMAL1COMMUX3,DMA Level 1 Common Multiplex Register n (n=0~9)" hexmask.long.byte 0xFC 0.--5. 1. "MUX," line.long 0x100 "DMAL1COMMUX4,DMA Level 1 Common Multiplex Register n (n=0~9)" hexmask.long.byte 0x100 0.--5. 1. "MUX," line.long 0x104 "DMAL1COMMUX5,DMA Level 1 Common Multiplex Register n (n=0~9)" hexmask.long.byte 0x104 0.--5. 1. "MUX," line.long 0x108 "DMAL1COMMUX6,DMA Level 1 Common Multiplex Register n (n=0~9)" hexmask.long.byte 0x108 0.--5. 1. "MUX," line.long 0x10C "DMAL1COMMUX7,DMA Level 1 Common Multiplex Register n (n=0~9)" hexmask.long.byte 0x10C 0.--5. 1. "MUX," line.long 0x110 "DMAL1COMMUX8,DMA Level 1 Common Multiplex Register n (n=0~9)" hexmask.long.byte 0x110 0.--5. 1. "MUX," line.long 0x114 "DMAL1COMMUX9,DMA Level 1 Common Multiplex Register n (n=0~9)" hexmask.long.byte 0x114 0.--5. 1. "MUX," line.long 0x118 "DMAL2MUX0,DMA Level 2 Multiplex Register n (n=0~7)" hexmask.long.byte 0x118 0.--5. 1. "MUX,Select the output of the level2 multiplexer" line.long 0x11C "DMAL2MUX1,DMA Level 2 Multiplex Register n (n=0~7)" hexmask.long.byte 0x11C 0.--5. 1. "MUX,Select the output of the level2 multiplexer" line.long 0x120 "DMAL2MUX2,DMA Level 2 Multiplex Register n (n=0~7)" hexmask.long.byte 0x120 0.--5. 1. "MUX,Select the output of the level2 multiplexer" line.long 0x124 "DMAL2MUX3,DMA Level 2 Multiplex Register n (n=0~7)" hexmask.long.byte 0x124 0.--5. 1. "MUX,Select the output of the level2 multiplexer" line.long 0x128 "DMAL2MUX4,DMA Level 2 Multiplex Register n (n=0~7)" hexmask.long.byte 0x128 0.--5. 1. "MUX,Select the output of the level2 multiplexer" line.long 0x12C "DMAL2MUX5,DMA Level 2 Multiplex Register n (n=0~7)" hexmask.long.byte 0x12C 0.--5. 1. "MUX,Select the output of the level2 multiplexer" line.long 0x130 "DMAL2MUX6,DMA Level 2 Multiplex Register n (n=0~7)" hexmask.long.byte 0x130 0.--5. 1. "MUX,Select the output of the level2 multiplexer" line.long 0x134 "DMAL2MUX7,DMA Level 2 Multiplex Register n (n=0~7)" hexmask.long.byte 0x134 0.--5. 1. "MUX,Select the output of the level2 multiplexer" rgroup.long ad:0xC00051FC++0x03 line.long 0x00 "DBGCTRL,GTM Debug Ctrl Register" bitfld.long 0x00 2. "HALTREQ,Request Signal to Stop GTM Functional Operation" "0,1" bitfld.long 0x00 1. "RESTORE,Indicates Memory Restore Phase after Leaving GTM Halt State" "0,1" bitfld.long 0x00 0. "HALTSTS,Indicates GTM Halt State" "0,1" group.long ad:0xC0005200++0x13 line.long 0x00 "TIO1INMUX,GTM TIO1 Input Multiplex Register" bitfld.long 0x00 28.--31. "CH7MUX,TIO0 Channel 7 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "CH6MUX,TIO0 Channel 6 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "CH5MUX,TIO0 Channel 5 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "CH4MUX,TIO0 Channel 4 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "CH3MUX,TIO0 Channel 3 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "CH2MUX,TIO0 Channel 2 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "CH1MUX,TIO0 Channel 1 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0.--3. "CH0MUX,TIO0 Channel 0 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "TIO2INMUX,GTM TIO2 Input Multiplex Register" bitfld.long 0x04 28.--31. "CH7MUX,TIO 2 Channel 7 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 24.--27. "CH6MUX,TIO 2 Channel 6 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 20.--23. "CH5MUX,TIO 2 Channel 5 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. "CH4MUX,TIO 2 Channel 4 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12.--15. "CH3MUX,TIO 2 Channel 3 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. "CH2MUX,TIO 2 Channel 2 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. "CH1MUX,TIO 2 Channel 1 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 0.--3. "CH0MUX,TIO 2 Channel 0 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "TIO3INMUX,GTM TIO3 Input Multiplex Register" bitfld.long 0x08 28.--31. "CH7MUX,TIO3 Channel 7 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. "CH6MUX,TIO3 Channel 6 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. "CH5MUX,TIO3 Channel 5 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. "CH4MUX,TIO3 Channel 4 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. "CH3MUX,TIO3 Channel 3 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. "CH2MUX,TIO3 Channel 2 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. "CH1MUX,TIO3 Channel 1 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 0.--3. "CH0MUX,TIO3 Channel 0 Input Multiplexing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "SPMCTRL0,Sleep Mode Control 0 Register" bitfld.long 0x0C 2.--3. "GRP1SPM,SRAM Group1 Sleep Mode" "0,1,2,3" line.long 0x10 "SPMCTRL1,Sleep Mode Control 1 Register" bitfld.long 0x10 2.--3. "GRP1SPMEN,SRAM Group1 Sleep Mode Enable" "0,1,2,3" rgroup.long ad:0xC0005214++0x03 line.long 0x00 "SPSTS,Sleep State Register" bitfld.long 0x00 1. "GRP1SPA,SRAM Group1 Sleep State" "0,1" bitfld.long 0x00 0. "GRP0SPA,SRAM Group0 Sleep State" "0,1" group.long ad:0xC0005300++0x0B line.long 0x00 "RAMECCEN,RAM Data ECC Check Enable Register" bitfld.long 0x00 0.--1. "EN,0b00: ECC disable" "0,1,2,3" line.long 0x04 "RAMREMAPEN,RAM Data Remap Function Enable Register" bitfld.long 0x04 10.--11. "EN5,DPLL2 REMAP Enable" "0,1,2,3" bitfld.long 0x04 8.--9. "EN4,DPLL 1B REMAP Enable" "0,1,2,3" bitfld.long 0x04 6.--7. "EN3,DPLL 1A REMAP Enable" "0,1,2,3" bitfld.long 0x04 4.--5. "EN2,FIFO2 REMAP Enable" "0,1,2,3" bitfld.long 0x04 2.--3. "EN1,FIFO1 REMAP Enable" "0,1,2,3" bitfld.long 0x04 0.--1. "EN0,FIFO0 REMAP Enable" "0,1,2,3" line.long 0x08 "RAMHWINJ,RAM Hardware Fault Injection Enable Register" bitfld.long 0x08 22.--23. "EN11,DPLL2 Multi-bit Hardware Fault Injection" "0,1,2,3" bitfld.long 0x08 20.--21. "EN10,DPLL1B Multi-bit Hardware Fault Injection" "0,1,2,3" bitfld.long 0x08 18.--19. "EN9,DPLL1A Multi-bit Hardware Fault Injection" "0,1,2,3" bitfld.long 0x08 16.--17. "EN8,FIFO2 Multi-bit Hardware Fault Injection" "0,1,2,3" bitfld.long 0x08 14.--15. "EN7,FIFO1 Multi-bit Hardware Fault Injection" "0,1,2,3" bitfld.long 0x08 12.--13. "EN6,FIFO0 Multi-bit Hardware Fault Injection" "0,1,2,3" bitfld.long 0x08 10.--11. "EN5,DPLL2 Single bit Hardware Fault Injection" "0,1,2,3" newline bitfld.long 0x08 8.--9. "EN4,DPLL1B Single bit Hardware Fault Injection" "0,1,2,3" bitfld.long 0x08 6.--7. "EN3,DPLL1A Single bit Hardware Fault Injection" "0,1,2,3" bitfld.long 0x08 4.--5. "EN2,FIFO2 Single bit Hardware Fault Injection" "0,1,2,3" bitfld.long 0x08 2.--3. "EN1,FIFO1 Single bit Hardware Fault Injection" "0,1,2,3" bitfld.long 0x08 0.--1. "EN0,FIFO0 Single bit Hardware Fault Injection" "0,1,2,3" wgroup.long ad:0xC000530C++0x07 line.long 0x00 "FIFO0RAMALARMCLR,FIFO0 RAM Alarm Clear Register" bitfld.long 0x00 4.--5. "CLR2,Single Bit Error Count Overflow Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "CLR1,Multi-bit Error Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "CLR0,Single Bit Error Alarm Clear" "0,1,2,3" line.long 0x04 "FIFO0ERRADDRVLDCLR,FIFO0 Error Address Valid Signal Clear Register" bitfld.long 0x04 5. "CLR5,Multi-Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 4. "CLR4,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 3. "CLR3,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 2. "CLR2,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 1. "CLR1,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 0. "CLR0,Single Bit Error Address Valid Clear" "0,1" rgroup.long ad:0xC0005314++0x17 line.long 0x00 "FIFO0SERRADDR0,FIFO0 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x00 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x04 "FIFO0SERRADDR1,FIFO0 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x04 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x08 "FIFO0SERRADDR2,FIFO0 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x08 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x0C "FIFO0SERRADDR3,FIFO0 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x0C 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x10 "FIFO0SERRADDR4,FIFO0 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x10 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x14 "FIFO0MERRADDR,FIFO0 Multi-Bit Error Address Recording Register" bitfld.long 0x14 31. "ADDR31,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 30. "ADDR30,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 29. "ADDR29,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 28. "ADDR28,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 27. "ADDR27,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 26. "ADDR26,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 25. "ADDR25,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 24. "ADDR24,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 23. "ADDR23,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 22. "ADDR22,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 21. "ADDR21,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 20. "ADDR20,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 19. "ADDR19,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 18. "ADDR18,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 17. "ADDR17,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 16. "ADDR16,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 15. "ADDR15,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 14. "ADDR14,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 13. "ADDR13,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 12. "ADDR12,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 11. "ADDR11,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 10. "ADDR10,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 9. "ADDR9,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 8. "ADDR8,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 7. "ADDR7,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 6. "ADDR6,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 5. "ADDR5,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 4. "ADDR4,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 3. "ADDR3,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 2. "ADDR2,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 1. "ADDR1,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 0. "ADDR0,Multi-Bit Error Address Reporting" "0,1" wgroup.long ad:0xC000532C++0x07 line.long 0x00 "FIFO1RAMALARMCLR,FIFO1 RAM Alarm Clear Register" bitfld.long 0x00 4.--5. "CLR2,Single Bit Error Count Overflow Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "CLR1,Multi-Bit Error Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "CLR0,Single Bit Error Alarm Clear" "0,1,2,3" line.long 0x04 "FIFO1ERRADDRVLDCLR,FIFO1 Error Address Valid Signal Clear Register" bitfld.long 0x04 5. "CLR5,Multi-Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 4. "CLR4,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 3. "CLR3,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 2. "CLR2,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 1. "CLR1,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 0. "CLR0,Single Bit Error Address Valid Clear" "0,1" rgroup.long ad:0xC0005334++0x17 line.long 0x00 "FIFO1SERRADDR0,FIFO1 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x00 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x04 "FIFO1SERRADDR1,FIFO1 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x04 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x08 "FIFO1SERRADDR2,FIFO1 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x08 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x0C "FIFO1SERRADDR3,FIFO1 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x0C 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x10 "FIFO1SERRADDR4,FIFO1 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x10 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x14 "FIFO1MERRADDR,FIFO1 Multi-Bit Error Address Recording Register" bitfld.long 0x14 31. "ADDR31,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 30. "ADDR30,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 29. "ADDR29,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 28. "ADDR28,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 27. "ADDR27,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 26. "ADDR26,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 25. "ADDR25,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 24. "ADDR24,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 23. "ADDR23,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 22. "ADDR22,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 21. "ADDR21,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 20. "ADDR20,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 19. "ADDR19,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 18. "ADDR18,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 17. "ADDR17,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 16. "ADDR16,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 15. "ADDR15,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 14. "ADDR14,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 13. "ADDR13,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 12. "ADDR12,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 11. "ADDR11,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 10. "ADDR10,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 9. "ADDR9,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 8. "ADDR8,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 7. "ADDR7,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 6. "ADDR6,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 5. "ADDR5,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 4. "ADDR4,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 3. "ADDR3,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 2. "ADDR2,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 1. "ADDR1,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 0. "ADDR0,Multi-Bit Error Address Reporting" "0,1" wgroup.long ad:0xC000534C++0x07 line.long 0x00 "FIFO2RAMALARMCLR,FIFO2 RAM Alarm Clear Register" bitfld.long 0x00 4.--5. "CLR2,Single Bit Error Count Overflow Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "CLR1,Multi-Bit Error Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "CLR0,Single Bit Error Alarm Clear" "0,1,2,3" line.long 0x04 "FIFO2ERRADDRVLDCLR,FIFO2 Error Address Valid Signal Clear Register" bitfld.long 0x04 5. "CLR5,Multi-Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 4. "CLR4,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 3. "CLR3,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 2. "CLR2,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 1. "CLR1,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 0. "CLR0,Single Bit Error Address Valid Clear" "0,1" rgroup.long ad:0xC0005354++0x17 line.long 0x00 "FIFO2SERRADDR0,FIFO2 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x00 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x04 "FIFO2SERRADDR1,FIFO2 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x04 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x08 "FIFO2SERRADDR2,FIFO2 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x08 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x0C "FIFO2SERRADDR3,FIFO2 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x0C 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x10 "FIFO2SERRADDR4,FIFO2 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x10 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x14 "FIFO2MERRADDR,FIFO2 Multi-Bit Error Address Recording Register" bitfld.long 0x14 31. "ADDR31,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 30. "ADDR30,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 29. "ADDR29,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 28. "ADDR28,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 27. "ADDR27,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 26. "ADDR26,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 25. "ADDR25,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 24. "ADDR24,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 23. "ADDR23,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 22. "ADDR22,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 21. "ADDR21,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 20. "ADDR20,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 19. "ADDR19,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 18. "ADDR18,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 17. "ADDR17,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 16. "ADDR16,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 15. "ADDR15,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 14. "ADDR14,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 13. "ADDR13,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 12. "ADDR12,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 11. "ADDR11,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 10. "ADDR10,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 9. "ADDR9,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 8. "ADDR8,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 7. "ADDR7,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 6. "ADDR6,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 5. "ADDR5,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 4. "ADDR4,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 3. "ADDR3,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 2. "ADDR2,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 1. "ADDR1,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 0. "ADDR0,Multi-Bit Error Address Reporting" "0,1" wgroup.long ad:0xC000536C++0x07 line.long 0x00 "DPLL1ARAMALARMCLR,DPLL 1A RAM Alarm Clear Register" bitfld.long 0x00 4.--5. "CLR2,Single Bit Error Count Overflow Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "CLR1,Multi-Bit Error Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "CLR0,Single Bit Error Alarm Clear" "0,1,2,3" line.long 0x04 "DPLL1AERRADDRVLDCLR,DPLL 1A Error Address Valid Signal Clear Register" bitfld.long 0x04 5. "CLR5,Multi-Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 4. "CLR4,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 3. "CLR3,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 2. "CLR2,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 1. "CLR1,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 0. "CLR0,Single Bit Error Address Valid Clear" "0,1" rgroup.long ad:0xC0005374++0x17 line.long 0x00 "DPLL1ASERRADDR0,DPLL 1A Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x00 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x04 "DPLL1ASERRADDR1,DPLL 1A Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x04 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x08 "DPLL1ASERRADDR2,DPLL 1A Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x08 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x0C "DPLL1ASERRADDR3,DPLL 1A Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x0C 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x10 "DPLL1ASERRADDR4,DPLL 1A Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x10 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x14 "DPLL1AMERRADDR,DPLL 1A Multi-Bit Error Address Recording Register" bitfld.long 0x14 31. "ADDR31,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 30. "ADDR30,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 29. "ADDR29,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 28. "ADDR28,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 27. "ADDR27,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 26. "ADDR26,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 25. "ADDR25,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 24. "ADDR24,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 23. "ADDR23,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 22. "ADDR22,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 21. "ADDR21,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 20. "ADDR20,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 19. "ADDR19,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 18. "ADDR18,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 17. "ADDR17,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 16. "ADDR16,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 15. "ADDR15,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 14. "ADDR14,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 13. "ADDR13,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 12. "ADDR12,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 11. "ADDR11,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 10. "ADDR10,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 9. "ADDR9,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 8. "ADDR8,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 7. "ADDR7,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 6. "ADDR6,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 5. "ADDR5,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 4. "ADDR4,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 3. "ADDR3,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 2. "ADDR2,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 1. "ADDR1,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 0. "ADDR0,Multi-Bit Error Address Reporting" "0,1" wgroup.long ad:0xC000538C++0x07 line.long 0x00 "DPLL1BRAMALARMCLR,DPLL 1B RAM Alarm Clear Register" bitfld.long 0x00 4.--5. "CLR2,Single Bit Error Count Overflow Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "CLR1,Multi-Bit Error Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "CLR0,Single Bit Error Alarm Clear" "0,1,2,3" line.long 0x04 "DPLL1BERRADDRVLDCLR,DPLL 1B Error Address Valid Signal Clear Register" bitfld.long 0x04 5. "CLR5,Multi-Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 4. "CLR4,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 3. "CLR3,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 2. "CLR2,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 1. "CLR1,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 0. "CLR0,Single Bit Error Address Valid Clear" "0,1" rgroup.long ad:0xC0005394++0x17 line.long 0x00 "DPLL1BSERRADDR0,DPLL 1B Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x00 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x04 "DPLL1BSERRADDR1,DPLL 1B Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x04 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x08 "DPLL1BSERRADDR2,DPLL 1B Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x08 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x0C "DPLL1BSERRADDR3,DPLL 1B Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x0C 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x10 "DPLL1BSERRADDR4,DPLL 1B Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x10 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x14 "DPLL1BMERRADDR,DPLL 1B Multi-Bit Error Address Recording Register" bitfld.long 0x14 31. "ADDR31,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 30. "ADDR30,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 29. "ADDR29,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 28. "ADDR28,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 27. "ADDR27,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 26. "ADDR26,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 25. "ADDR25,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 24. "ADDR24,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 23. "ADDR23,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 22. "ADDR22,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 21. "ADDR21,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 20. "ADDR20,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 19. "ADDR19,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 18. "ADDR18,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 17. "ADDR17,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 16. "ADDR16,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 15. "ADDR15,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 14. "ADDR14,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 13. "ADDR13,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 12. "ADDR12,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 11. "ADDR11,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 10. "ADDR10,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 9. "ADDR9,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 8. "ADDR8,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 7. "ADDR7,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 6. "ADDR6,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 5. "ADDR5,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 4. "ADDR4,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 3. "ADDR3,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 2. "ADDR2,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 1. "ADDR1,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 0. "ADDR0,Multi-Bit Error Address Reporting" "0,1" wgroup.long ad:0xC00053AC++0x07 line.long 0x00 "DPLL2RAMALARMCLR,DPLL 2 RAM Alarm Clear Register" bitfld.long 0x00 4.--5. "CLR2,Single Bit Error Count Overflow Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "CLR1,Multi-Bit Error Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "CLR0,Single Bit Error Alarm Clear" "0,1,2,3" line.long 0x04 "DPLL2ERRADDRVLDCLR,DPLL 2 Error Address Valid Signal Clear Register" bitfld.long 0x04 5. "CLR5,Multi-Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 4. "CLR4,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 3. "CLR3,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 2. "CLR2,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 1. "CLR1,Single Bit Error Address Valid Clear" "0,1" bitfld.long 0x04 0. "CLR0,Single Bit Error Address Valid Clear" "0,1" rgroup.long ad:0xC00053B4++0x23 line.long 0x00 "DPLL2SERRADDR0,DPLL 2 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x00 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x00 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x00 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x04 "DPLL2SERRADDR1,DPLL 2 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x04 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x04 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x04 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x08 "DPLL2SERRADDR2,DPLL 2 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x08 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x08 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x08 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x0C "DPLL2SERRADDR3,DPLL 2 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x0C 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x0C 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x0C 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x10 "DPLL2SERRADDR4,DPLL 2 Single Bit Error Address Recording Register n (n=0~4)" bitfld.long 0x10 31. "ADDR31,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 30. "ADDR30,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 29. "ADDR29,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 28. "ADDR28,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 27. "ADDR27,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 26. "ADDR26,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 25. "ADDR25,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 24. "ADDR24,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 23. "ADDR23,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 22. "ADDR22,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 21. "ADDR21,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 20. "ADDR20,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 19. "ADDR19,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 18. "ADDR18,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 17. "ADDR17,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 16. "ADDR16,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 15. "ADDR15,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 14. "ADDR14,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 13. "ADDR13,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 12. "ADDR12,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 11. "ADDR11,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 10. "ADDR10,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 9. "ADDR9,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 8. "ADDR8,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 7. "ADDR7,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 6. "ADDR6,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 5. "ADDR5,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 4. "ADDR4,Single Bit Error Address Reporting" "0,1" newline bitfld.long 0x10 3. "ADDR3,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 2. "ADDR2,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 1. "ADDR1,Single Bit Error Address Reporting" "0,1" bitfld.long 0x10 0. "ADDR0,Single Bit Error Address Reporting" "0,1" line.long 0x14 "DPLL2MERRADDR,DPLL 2 Multi-Bit Error Address Recording Register" bitfld.long 0x14 31. "ADDR31,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 30. "ADDR30,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 29. "ADDR29,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 28. "ADDR28,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 27. "ADDR27,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 26. "ADDR26,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 25. "ADDR25,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 24. "ADDR24,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 23. "ADDR23,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 22. "ADDR22,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 21. "ADDR21,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 20. "ADDR20,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 19. "ADDR19,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 18. "ADDR18,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 17. "ADDR17,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 16. "ADDR16,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 15. "ADDR15,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 14. "ADDR14,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 13. "ADDR13,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 12. "ADDR12,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 11. "ADDR11,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 10. "ADDR10,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 9. "ADDR9,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 8. "ADDR8,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 7. "ADDR7,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 6. "ADDR6,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 5. "ADDR5,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 4. "ADDR4,Multi-Bit Error Address Reporting" "0,1" newline bitfld.long 0x14 3. "ADDR3,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 2. "ADDR2,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 1. "ADDR1,Multi-Bit Error Address Reporting" "0,1" bitfld.long 0x14 0. "ADDR0,Multi-Bit Error Address Reporting" "0,1" line.long 0x18 "SBESTS,Single Bit Error Address State Valid Register" bitfld.long 0x18 5. "STS5,DPLL RAM2 Single-bit Error Alarm Status" "0,1" bitfld.long 0x18 4. "STS4,DPLL RAM1B Single-bit Error Alarm Status" "0,1" bitfld.long 0x18 3. "STS3,DPLL RAM1A Single-bit Error Alarm Status" "0,1" bitfld.long 0x18 2. "STS2,FIFO2 RAM Single-bit Error Alarm Status" "0,1" bitfld.long 0x18 1. "STS1,FIFO1 RAM Single-bit Error Alarm Status" "0,1" bitfld.long 0x18 0. "STS0,FIFO0 RAM Single-bit Error Alarm Status" "0,1" line.long 0x1C "MBESTS,Multi-Bit Error Address State Valid Register" bitfld.long 0x1C 5. "STS5,DPLL RAM2 Multi-Bit Error Alarm Status" "0,1" bitfld.long 0x1C 4. "STS4,DPLL RAM1B Multi-Bit Error Alarm Status" "0,1" bitfld.long 0x1C 3. "STS3,DPLL RAM1A Multi-Bit Error Alarm Status" "0,1" bitfld.long 0x1C 2. "STS2,FIFO2 RAM Multi-bit Error Alarm Status" "0,1" bitfld.long 0x1C 1. "STS1,FIFO1 RAM Multi-Bit Error Alarm Status" "0,1" bitfld.long 0x1C 0. "STS0,FIFO0 RAM Multi-Bit Error Alarm Status" "0,1" line.long 0x20 "SOSTS,Single Bit Error Address Record Overflow State Register" bitfld.long 0x20 5. "STS5,DPLL RAM2 Single bit error overflow alarm status indication" "0,1" bitfld.long 0x20 4. "STS4,DPLL RAM1B Single bit error overflow alarm status indication" "0,1" bitfld.long 0x20 3. "STS3,DPLL RAM1A Single bit error overflow alarm status indication" "0,1" bitfld.long 0x20 2. "STS2,FIFO2 RAM Single bit error overflow alarm status indication" "0,1" bitfld.long 0x20 1. "STS1,FIFO1 RAM Single bit error overflow alarm status indication" "0,1" bitfld.long 0x20 0. "STS0,FIFO0 RAM Single bit error overflow alarm status indication" "0,1" group.long ad:0xC00053D8++0x0B line.long 0x00 "DMATOCFG,DMA Timeout Configuration Register" line.long 0x04 "DMATOSAFETYEN,DMA Timeout Safety Mechanism Enable Register" bitfld.long 0x04 0.--1. "EN,DMA Timeout Safety Mechanism Enable" "0,1,2,3" line.long 0x08 "DMATOFAULTINJ,DMA Timeout Fault Injection Register" bitfld.long 0x08 0.--1. "EN,DMA Timeout Fault-In Enable" "0,1,2,3" wgroup.long ad:0xC00053E4++0x03 line.long 0x00 "DMATOALARMCLR,DMA Timeout Alarm Clear Register" bitfld.long 0x00 0.--1. "CLR0,DMA Timeout Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00053E8++0x03 line.long 0x00 "DMATOCHSTS,DMA Timeout Channel Status Register" bitfld.long 0x00 7. "STATUS7,DMA Ch7 Timeout Alarm Status" "0,1" bitfld.long 0x00 6. "STATUS6,DMA Ch6 Timeout Alarm Status" "0,1" bitfld.long 0x00 5. "STATUS5,DMA Ch5 Timeout Alarm Status" "0,1" bitfld.long 0x00 4. "STATUS4,DMA Ch4 Timeout Alarm Status" "0,1" bitfld.long 0x00 3. "STATUS3,DMA Ch3 Timeout Alarm Status" "0,1" bitfld.long 0x00 2. "STATUS2,DMA Ch2 Timeout Alarm Status" "0,1" bitfld.long 0x00 1. "STATUS1,DMA Ch1 Timeout Alarm Status" "0,1" newline bitfld.long 0x00 0. "STATUS0,DMA Ch0 Timeout Alarm Status" "0,1" group.long ad:0xC00053EC++0x03 line.long 0x00 "REGSAFETYEN,Register Safety Mechanism Enable" bitfld.long 0x00 0.--1. "EN,Register Safety Mechanism Enable" "0,1,2,3" wgroup.long ad:0xC00053F0++0x03 line.long 0x00 "REGALARMCLR,Register Alarm Clear" bitfld.long 0x00 0.--1. "CLR0,Clear Signal for the Register Alarm" "0,1,2,3" rgroup.long ad:0xC00053F4++0x03 line.long 0x00 "REGALARMSTS,Reporting Register for Register Alarm Status" bitfld.long 0x00 20. "STS20,ADC Data Alarm Clear (ADALARMCLR.CLR) Bit Redundant Status" "0,1" bitfld.long 0x00 19. "STS19,ADC Data Alarm Enable (ADALARMEN.EN) Bit Redundant Status" "0,1" bitfld.long 0x00 18. "STS18,DMA Enable (IDRQEN.EN1) Bit Redundant Status" "0,1" bitfld.long 0x00 17. "STS17,Interrupt Enable (IDRQEN.EN0) Bit Redundant Status" "0,1" bitfld.long 0x00 16. "STS16,Sleep Mode Control1 Register Bit Redundant Status" "0,1" bitfld.long 0x00 15. "STS15,Sleep Mode Control0 Register Bit Redundant Status" "0,1" bitfld.long 0x00 14. "STS14,Illegal Access Alarm Clear Signal Status" "0,1" newline bitfld.long 0x00 13. "STS13,Register Safety Enable Signal Status" "0,1" bitfld.long 0x00 12. "STS12,Register Alarm Clear Signal Status" "0,1" bitfld.long 0x00 11. "STS11,DMA Timeout Clear Signal Status" "0,1" bitfld.long 0x00 10. "STS10,DMA Timeout Fault-in Signal Status" "0,1" bitfld.long 0x00 9. "STS9,DMA Timeout Enable Signal Status" "0,1" bitfld.long 0x00 8. "STS8,DPLL2 Alarm Clear Signal Status" "0,1" bitfld.long 0x00 7. "STS7,DPLL1B Alarm Clear Signal Status" "0,1" newline bitfld.long 0x00 6. "STS6,DPLL1A Alarm Clear Signal Status" "0,1" bitfld.long 0x00 5. "STS5,FiFO2 Alarm Clear Signal Status" "0,1" bitfld.long 0x00 4. "STS4,FIFO1 Alarm Clear Signal Status" "0,1" bitfld.long 0x00 3. "STS3,FIFO0 Alarm Clear Signal Status" "0,1" bitfld.long 0x00 2. "STS2,RAM Hardware Fault-in Signal Status" "0,1" bitfld.long 0x00 1. "STS1,RAM Remap Enable Signal Status" "0,1" bitfld.long 0x00 0. "STS0,RAM ECC Enable Signal Status" "0,1" wgroup.long ad:0xC00053F8++0x03 line.long 0x00 "REGIACLR,SE Locked Illegal Access Alarm Clearing Register." bitfld.long 0x00 0.--1. "CLR0,Illegal Access Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00053FC++0x03 line.long 0x00 "REGIAALARMSTS,Illegal Access Alarm Status Register." bitfld.long 0x00 0. "STS,Illegal Access Alarm Status" "0,1" group.long ad:0xC0005400++0x03 line.long 0x00 "ADALARMEN,ADC Data ECC Alarm Enable Register" bitfld.long 0x00 0.--1. "EN,ADC Data ECC Alarm Enable" "0,1,2,3" wgroup.long ad:0xC0005404++0x03 line.long 0x00 "ADALARMCLR,ADC Data ECC Alarm Clear Register" bitfld.long 0x00 0. "CLR,ADC Data ECC Alarm Clear Register" "0,1" rgroup.long ad:0xC0005408++0x03 line.long 0x00 "ADALARMSTS,ADC Data ECC Alarm Status Register" bitfld.long 0x00 3. "STS3,MCS3 ADC Data Error" "0,1" bitfld.long 0x00 2. "STS2,MCS2 ADC Data Error" "0,1" bitfld.long 0x00 1. "STS1,MCS1 ADC Data Error" "0,1" bitfld.long 0x00 0. "STS0,MCS0 ADC Data Error" "0,1" group.long ad:0xC0005600++0x03 line.long 0x00 "GTMDGCR,GTM Debug Global Control Register" bitfld.long 0x00 1. "HLTTREN,GTM Halt Trigger Enable" "0,1" bitfld.long 0x00 0. "GEN,Global Debug Enable" "0,1" wgroup.long ad:0xC0005604++0x03 line.long 0x00 "GTMDHCR,GTM Debug Halt Control Register" bitfld.long 0x00 1. "HLTCLR,GTM Halt Clear" "0,1" bitfld.long 0x00 0. "HLTREQ,GTM Halt Request" "0,1" rgroup.long ad:0xC0005608++0x03 line.long 0x00 "GTMDHSR,GTM Debug Halt Status Register" bitfld.long 0x00 0. "HLT,GTM Halt Status" "0,1" group.long ad:0xC00057C0++0x03 line.long 0x00 "GTMDMCSBPEN,MCS Break Point Enable Register" bitfld.long 0x00 3. "MCS3_BP_EN,Enable Debug with Break Points in MCS3" "0,1" bitfld.long 0x00 2. "MCS2_BP_EN,Enable Debug with Break Points in MCS2" "0,1" bitfld.long 0x00 1. "MCS1_BP_EN,Enable Debug with Break Points in MCS1" "0,1" bitfld.long 0x00 0. "MCS0_BP_EN,Enable Debug with Break Points in MCS0" "0,1" tree.end tree "STM" group.long ad:0xC0060800++0x03 line.long 0x00 "CNTCR,Counter Control Register" bitfld.long 0x00 1. "HDBG,Halt on Debug" "0,1" bitfld.long 0x00 0. "EN,Counter Enable" "0,1" rgroup.long ad:0xC0060804++0x03 line.long 0x00 "CNTSR,Counter Halt Status Register" bitfld.long 0x00 1. "DBGH,Debug Halted" "0,1" group.long ad:0xC0060808++0x07 line.long 0x00 "CNTCVL,Current Counter Value Lower Register" line.long 0x04 "CNTCVH,Current Counter Value Higher Register" group.long ad:0xC0060820++0x07 line.long 0x00 "CNTSAFEFAULT,Functional Safety Fault Injection Register" bitfld.long 0x00 4.--5. "SMDFI,System Counter Clock Detection Functional Safety Fault Injection" "0,1,2,3" bitfld.long 0x00 2.--3. "SCFMFI,System Counter Frequency Monitor Function Safety Fault Injection" "0,1,2,3" bitfld.long 0x00 0.--1. "DRFI,SFF Redundancy Fault Injection" "0,1,2,3" line.long 0x04 "CNTSAFEEN,Functional Safety Mechanism Enable Register" bitfld.long 0x04 30.--31. "BEMASK,Bus Error Mask Control" "0,1,2,3" bitfld.long 0x04 4.--5. "SMDSE,STM Output Clock Detection Enable" "0,1,2,3" bitfld.long 0x04 2.--3. "SCFMSE,STM Frequency Detection Enable" "0,1,2,3" bitfld.long 0x04 0.--1. "DRSE,SFF Redundancy Enable" "0,1,2,3" rgroup.long ad:0xC0060828++0x03 line.long 0x00 "CNTALARM,Counter Alarm Register" bitfld.long 0x00 9. "ALARMCLRALM,CNTALARMCLR Redundancy Alarm" "0,1" bitfld.long 0x00 8. "SAFEENALM,CNTSAFEEN Redundancy Alarm" "0,1" bitfld.long 0x00 7. "FAULTINALM,CNTSAFEFAULT Redundancy Alarm" "0,1" bitfld.long 0x00 6. "CNTCVHALM,CNTCVH Redundancy Alarm" "0,1" bitfld.long 0x00 5. "CNTCVLALM,CNTCVL Redundancy Alarm" "0,1" bitfld.long 0x00 4. "CNTCRALM,CNTCR Redundancy Alarm" "0,1" bitfld.long 0x00 3. "SEALM,SE Alarm" "0,1" bitfld.long 0x00 2. "EALM,E Alarm" "0,1" newline bitfld.long 0x00 1. "SCDALM,System Counter Detection Alarm" "0,1" bitfld.long 0x00 0. "SCFMALM,System Counter Frequency Monitor Alarm" "0,1" wgroup.long ad:0xC006082C++0x03 line.long 0x00 "CNTALARMCLR,Counter Alarm Clear Register" bitfld.long 0x00 6.--7. "DRALMC,SFF Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "ESEALMC,E/SE Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SCDALMC,System Counter Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SCFMALMC,System Counter Frequency Monitor Alarm Clear" "0,1,2,3" group.long ad:0xC0060830++0x0F line.long 0x00 "CNTFREQCTRL,Frequency Detection Counter Control Register" bitfld.long 0x00 0.--2. "CNTFREQCTRL,Frequency Detection Counter Control" "0,1,2,3,4,5,6,7" line.long 0x04 "CNTFREQL,Frequency Detection Counter Lower Delta" line.long 0x08 "CNTFREQH,Frequency Detection Counter Higher Delta" line.long 0x0C "CNTPULSECNT,Counter Load Value for the Pulse Timeout" hexmask.long.word 0x0C 0.--15. 1. "CNTPULSECNT,Pulse Timeout Counter Load Value" tree.end tree "CPUWDT0" group.long ad:0xC0070000++0x03 line.long 0x00 "PW0,Password0 Register" hexmask.long.word 0x00 0.--13. 1. "PW0,Password0 Key" wgroup.long ad:0xC0070004++0x03 line.long 0x00 "PWLOCK,Password Lock Register" bitfld.long 0x00 2. "WDTPWLCK,WDTPW Locking Signal" "0,1" bitfld.long 0x00 1. "CEPWLCK,CEPW Locking Signal" "0,1" bitfld.long 0x00 0. "PW0LCK,PW0 Locking Signal" "0,1" group.long ad:0xC0070008++0x17 line.long 0x00 "PWMAI,Password Mode and Initialization Register" bitfld.long 0x00 30.--31. "CEPWM,CEPW Mode Selection" "0,1,2,3" hexmask.long.word 0x00 16.--29. 1. "CEPWINIT,CEPW Initial Password" bitfld.long 0x00 14.--15. "WDTPWM,WDTPWM Mode Selection" "0,1,2,3" hexmask.long.word 0x00 0.--13. 1. "WDTPWINIT,WDTPW Initialization Password" line.long 0x04 "PW0CNT,Password0 Counter Register" hexmask.long.word 0x04 0.--15. 1. "PW0CNT,PW0 Unlocked Counter Threshold" line.long 0x08 "CEPWCNT,CE Password Counter Register" hexmask.long.word 0x08 0.--15. 1. "CEPWCNT,CEPW Unlocked Counter Threshold" line.long 0x0C "CETHV,CE Threshold Value Register" hexmask.long.word 0x0C 0.--15. 1. "CETHV,CE Counter Threshold" line.long 0x10 "CEPW,CE Password Register" hexmask.long.word 0x10 0.--13. 1. "CEPW,CEPW Password" line.long 0x14 "CECNTEN,CE Counter Enable Register" bitfld.long 0x14 0.--1. "CECNTEN,CECNT Enable Signal" "0,1,2,3" wgroup.long ad:0xC0070020++0x03 line.long 0x00 "CECNTC,CE Counter Control Register" bitfld.long 0x00 2.--3. "CESTOP,CECNT Stop Counting Signal" "0,1,2,3" bitfld.long 0x00 0.--1. "CESTART,CECNT Start Counting Signal" "0,1,2,3" group.long ad:0xC0070024++0x1F line.long 0x00 "WDTPWCNT,WDT Password Counter Register" hexmask.long.word 0x00 0.--15. 1. "WDTPWCNT,WDTPW Unlocked Counter Threshold" line.long 0x04 "WDTLEN,WDT Low Enable Register" bitfld.long 0x04 1. "WDTLEN1,WDT LOW ENABLE1" "0,1" bitfld.long 0x04 0. "WDTLEN0,WDT LOW ENABLE0" "0,1" line.long 0x08 "WDTLTHV0,WDT Low Threshold Value Register 0" hexmask.long.tbyte 0x08 0.--16. 1. "WDTLTHV0,WDT Lower Threshold Value 0" line.long 0x0C "WDTHTHV0,WDT High Threshold Value Register 0" hexmask.long.tbyte 0x0C 0.--16. 1. "WDTHTHV0,WDT Higher Threshold Value 0" line.long 0x10 "WDTLTHV1,WDT Low Threshold Value Register 1" hexmask.long.tbyte 0x10 0.--16. 1. "WDTLTHV1,WDT Lower Threshold Value 1" line.long 0x14 "WDTHTHV1,WDT High Threshold Value Register 1" hexmask.long.tbyte 0x14 0.--16. 1. "WDTHTHV1,WDT Higher Threshold Value 1" line.long 0x18 "WDTPW,WDT Password Register" hexmask.long.word 0x18 0.--13. 1. "WDTPW,WDTPW Password" line.long 0x1C "WDTCNTEN,WDT Counter Enable Register" bitfld.long 0x1C 0.--1. "WDTCNTEN,WDT Counter Enable" "0,1,2,3" wgroup.long ad:0xC0070044++0x03 line.long 0x00 "WDTCNTC,WDT Counter Control Register" bitfld.long 0x00 0.--1. "WDTSERVICE,WDT Service Signal" "0,1,2,3" group.long ad:0xC0070048++0x07 line.long 0x00 "CLKMNG,Clock Manage Register" bitfld.long 0x00 6. "LPSEN,Low Power Signal Enable" "0,1" bitfld.long 0x00 3.--5. "CECKDIV,CE Clock Divisor" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "WDTCKDIV,WDT Clock Divisor" "0,1,2,3,4,5,6,7" line.long 0x04 "OUTM,Output Mode Register" bitfld.long 0x04 1. "WDTOUTM1,WDT Out Mode" "0,1" bitfld.long 0x04 0. "CEOUTM,CE Out Mode" "0,1" rgroup.long ad:0xC0070050++0x13 line.long 0x00 "CESTS,CE Status Register" bitfld.long 0x00 17. "CEGLBSTS,Global E Protection Status Indication" "0,1" bitfld.long 0x00 16. "CEOUTSTS,CE Output Status Signal" "0,1" hexmask.long.word 0x00 0.--15. 1. "CECNT,CE Unlock Counter" line.long 0x04 "WDTCNTSTS,WDT Counter Status Register" hexmask.long.tbyte 0x04 0.--17. 1. "CNTSTS,WDT Counter Status" line.long 0x08 "CWSTS,CPUWDT Status Register" bitfld.long 0x08 4. "WDTPWV,WDTPW Unlock Status" "0,1" bitfld.long 0x08 3. "CEPWV,CEPW Unlock Status" "0,1" bitfld.long 0x08 2. "PW0V,PW0 Unlock Status" "0,1" bitfld.long 0x08 1. "CWAPBLPI,CPUWDT Low Power Status Indication" "0,1" bitfld.long 0x08 0. "CWLPI,WDT Low Power Status Indication" "0,1" line.long 0x0C "CWALMSTS,CPUWDT Alarm Status Register" bitfld.long 0x0C 4. "CWREGALM,CPUWDT Register Alarm Status" "0,1" bitfld.long 0x0C 3. "CWALM,CPUWDT Alarm Status" "0,1" bitfld.long 0x0C 2. "WDTALM2,WDT Second Counter Overflow Alarm Status" "0,1" bitfld.long 0x0C 1. "WDTALM1,WDT First Counter Overflow Alarm Status" "0,1" bitfld.long 0x0C 0. "CEALM,CE Alarm Status" "0,1" line.long 0x10 "CWINTSTS,CPUWDT Interrupt Status Register" bitfld.long 0x10 1. "WDTINTR1,WDT First Counter Overflow Interrupt Status" "0,1" bitfld.long 0x10 0. "CEINTR,CE Interrupt Status" "0,1" group.long ad:0xC0070064++0x03 line.long 0x00 "CPUWDTEN,CPUWDT Alarm and Interrupt Enable Register" bitfld.long 0x00 16.--17. "REGALMEN,CPUWDT Register Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "PWALMEN,CPUWDT Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "WDTCLKLPIE,CPUWDT Low Power Status Report Enable" "0,1,2,3" bitfld.long 0x00 10.--11. "CLKLPIE,WDT Low Power Status Report Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "WDTALME2,WDT Second Counter Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "WDTINTE1,WDT First Counter Overflow Interrupt Report Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "WDTALME1,WDT First Counter Overflow Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "CEINTRE,CE Interrupt Report Enable" "0,1,2,3" newline bitfld.long 0x00 0.--1. "CEALME,CE Alarm Report Enable" "0,1,2,3" wgroup.long ad:0xC0070068++0x03 line.long 0x00 "CPUWDTCL,CPUWDT Clear Register" bitfld.long 0x00 16.--17. "REGALMC,CPUWDT Register Alarm Clear" "0,1,2,3" bitfld.long 0x00 14.--15. "PWALMC,CPUWDT Password Access Alarm Clear" "0,1,2,3" bitfld.long 0x00 12.--13. "WDTLPIC,CPUWDT Low Power Status Clear" "0,1,2,3" bitfld.long 0x00 10.--11. "CWLPIC,WDT Low Power Status Clear" "0,1,2,3" bitfld.long 0x00 8.--9. "WDTALMC2,WDT Second Counter Overflow Alarm Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "WDTINTC1,WDT First Counter Overflow Interrupt Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "WDTALMC1,WDT First Counter Overflow Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "CEINTRC,CE Interrupt Clear" "0,1,2,3" newline bitfld.long 0x00 0.--1. "CEALMC,CE Alarm Clear" "0,1,2,3" group.long ad:0xC007006C++0x0B line.long 0x00 "CWMASK,CPUWDT Alarm and Bus Error Mask Register" bitfld.long 0x00 12.--13. "BEMASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x00 10.--11. "MIDEMASK,MASTER ID Alarm Mask" "0,1,2,3" bitfld.long 0x00 8.--9. "REGALMMK,CPUWDT Register Alarm Mask" "0,1,2,3" bitfld.long 0x00 6.--7. "PWALMMK,CPUWDT Alarm Mask" "0,1,2,3" bitfld.long 0x00 4.--5. "WDTALM2MK,WDT Second Counter Overflow Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "WDTALM1MK,WDT First Counter Overflow Alarm Mask" "0,1,2,3" bitfld.long 0x00 0.--1. "CEALMMK,CE Alarm Mask" "0,1,2,3" line.long 0x04 "CWINTMASK,CPUWDT Interrupt Mask Register" bitfld.long 0x04 2.--3. "WDTINT1MK,WDT First Counter Overflow Interrupt Mask" "0,1,2,3" bitfld.long 0x04 0.--1. "CEINTMK,CE Interrupt Mask" "0,1,2,3" line.long 0x08 "DBGHWCKEN,Debug Hardware Clock Gating Enable Register" bitfld.long 0x08 0. "DBGHWEN,Debug Hardware Clock Enable" "0,1" tree.end tree "CPUWDT1" group.long ad:0xC0070400++0x03 line.long 0x00 "PW0,Password0 Register" hexmask.long.word 0x00 0.--13. 1. "PW0,Password0 Key" wgroup.long ad:0xC0070404++0x03 line.long 0x00 "PWLOCK,Password Lock Register" bitfld.long 0x00 2. "WDTPWLCK,WDTPW Locking Signal" "0,1" bitfld.long 0x00 1. "CEPWLCK,CEPW Locking Signal" "0,1" bitfld.long 0x00 0. "PW0LCK,PW0 Locking Signal" "0,1" group.long ad:0xC0070408++0x17 line.long 0x00 "PWMAI,Password Mode and Initialization Register" bitfld.long 0x00 30.--31. "CEPWM,CEPW Mode Selection" "0,1,2,3" hexmask.long.word 0x00 16.--29. 1. "CEPWINIT,CEPW Initial Password" bitfld.long 0x00 14.--15. "WDTPWM,WDTPWM Mode Selection" "0,1,2,3" hexmask.long.word 0x00 0.--13. 1. "WDTPWINIT,WDTPW Initialization Password" line.long 0x04 "PW0CNT,Password0 Counter Register" hexmask.long.word 0x04 0.--15. 1. "PW0CNT,PW0 Unlocked Counter Threshold" line.long 0x08 "CEPWCNT,CE Password Counter Register" hexmask.long.word 0x08 0.--15. 1. "CEPWCNT,CEPW Unlocked Counter Threshold" line.long 0x0C "CETHV,CE Threshold Value Register" hexmask.long.word 0x0C 0.--15. 1. "CETHV,CE Counter Threshold" line.long 0x10 "CEPW,CE Password Register" hexmask.long.word 0x10 0.--13. 1. "CEPW,CEPW Password" line.long 0x14 "CECNTEN,CE Counter Enable Register" bitfld.long 0x14 0.--1. "CECNTEN,CECNT Enable Signal" "0,1,2,3" wgroup.long ad:0xC0070420++0x03 line.long 0x00 "CECNTC,CE Counter Control Register" bitfld.long 0x00 2.--3. "CESTOP,CECNT Stop Counting Signal" "0,1,2,3" bitfld.long 0x00 0.--1. "CESTART,CECNT Start Counting Signal" "0,1,2,3" group.long ad:0xC0070424++0x1F line.long 0x00 "WDTPWCNT,WDT Password Counter Register" hexmask.long.word 0x00 0.--15. 1. "WDTPWCNT,WDTPW Unlocked Counter Threshold" line.long 0x04 "WDTLEN,WDT Low Enable Register" bitfld.long 0x04 1. "WDTLEN1,WDT LOW ENABLE1" "0,1" bitfld.long 0x04 0. "WDTLEN0,WDT LOW ENABLE0" "0,1" line.long 0x08 "WDTLTHV0,WDT Low Threshold Value Register 0" hexmask.long.tbyte 0x08 0.--16. 1. "WDTLTHV0,WDT Lower Threshold Value 0" line.long 0x0C "WDTHTHV0,WDT High Threshold Value Register 0" hexmask.long.tbyte 0x0C 0.--16. 1. "WDTHTHV0,WDT Higher Threshold Value 0" line.long 0x10 "WDTLTHV1,WDT Low Threshold Value Register 1" hexmask.long.tbyte 0x10 0.--16. 1. "WDTLTHV1,WDT Lower Threshold Value 1" line.long 0x14 "WDTHTHV1,WDT High Threshold Value Register 1" hexmask.long.tbyte 0x14 0.--16. 1. "WDTHTHV1,WDT Higher Threshold Value 1" line.long 0x18 "WDTPW,WDT Password Register" hexmask.long.word 0x18 0.--13. 1. "WDTPW,WDTPW Password" line.long 0x1C "WDTCNTEN,WDT Counter Enable Register" bitfld.long 0x1C 0.--1. "WDTCNTEN,WDT Counter Enable" "0,1,2,3" wgroup.long ad:0xC0070444++0x03 line.long 0x00 "WDTCNTC,WDT Counter Control Register" bitfld.long 0x00 0.--1. "WDTSERVICE,WDT Service Signal" "0,1,2,3" group.long ad:0xC0070448++0x07 line.long 0x00 "CLKMNG,Clock Manage Register" bitfld.long 0x00 6. "LPSEN,Low Power Signal Enable" "0,1" bitfld.long 0x00 3.--5. "CECKDIV,CE Clock Divisor" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "WDTCKDIV,WDT Clock Divisor" "0,1,2,3,4,5,6,7" line.long 0x04 "OUTM,Output Mode Register" bitfld.long 0x04 1. "WDTOUTM1,WDT Out Mode" "0,1" bitfld.long 0x04 0. "CEOUTM,CE Out Mode" "0,1" rgroup.long ad:0xC0070450++0x13 line.long 0x00 "CESTS,CE Status Register" bitfld.long 0x00 17. "CEGLBSTS,Global E Protection Status Indication" "0,1" bitfld.long 0x00 16. "CEOUTSTS,CE Output Status Signal" "0,1" hexmask.long.word 0x00 0.--15. 1. "CECNT,CE Unlock Counter" line.long 0x04 "WDTCNTSTS,WDT Counter Status Register" hexmask.long.tbyte 0x04 0.--17. 1. "CNTSTS,WDT Counter Status" line.long 0x08 "CWSTS,CPUWDT Status Register" bitfld.long 0x08 4. "WDTPWV,WDTPW Unlock Status" "0,1" bitfld.long 0x08 3. "CEPWV,CEPW Unlock Status" "0,1" bitfld.long 0x08 2. "PW0V,PW0 Unlock Status" "0,1" bitfld.long 0x08 1. "CWAPBLPI,CPUWDT Low Power Status Indication" "0,1" bitfld.long 0x08 0. "CWLPI,WDT Low Power Status Indication" "0,1" line.long 0x0C "CWALMSTS,CPUWDT Alarm Status Register" bitfld.long 0x0C 4. "CWREGALM,CPUWDT Register Alarm Status" "0,1" bitfld.long 0x0C 3. "CWALM,CPUWDT Alarm Status" "0,1" bitfld.long 0x0C 2. "WDTALM2,WDT Second Counter Overflow Alarm Status" "0,1" bitfld.long 0x0C 1. "WDTALM1,WDT First Counter Overflow Alarm Status" "0,1" bitfld.long 0x0C 0. "CEALM,CE Alarm Status" "0,1" line.long 0x10 "CWINTSTS,CPUWDT Interrupt Status Register" bitfld.long 0x10 1. "WDTINTR1,WDT First Counter Overflow Interrupt Status" "0,1" bitfld.long 0x10 0. "CEINTR,CE Interrupt Status" "0,1" group.long ad:0xC0070464++0x03 line.long 0x00 "CPUWDTEN,CPUWDT Alarm and Interrupt Enable Register" bitfld.long 0x00 16.--17. "REGALMEN,CPUWDT Register Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "PWALMEN,CPUWDT Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "WDTCLKLPIE,CPUWDT Low Power Status Report Enable" "0,1,2,3" bitfld.long 0x00 10.--11. "CLKLPIE,WDT Low Power Status Report Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "WDTALME2,WDT Second Counter Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "WDTINTE1,WDT First Counter Overflow Interrupt Report Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "WDTALME1,WDT First Counter Overflow Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "CEINTRE,CE Interrupt Report Enable" "0,1,2,3" newline bitfld.long 0x00 0.--1. "CEALME,CE Alarm Report Enable" "0,1,2,3" wgroup.long ad:0xC0070468++0x03 line.long 0x00 "CPUWDTCL,CPUWDT Clear Register" bitfld.long 0x00 16.--17. "REGALMC,CPUWDT Register Alarm Clear" "0,1,2,3" bitfld.long 0x00 14.--15. "PWALMC,CPUWDT Password Access Alarm Clear" "0,1,2,3" bitfld.long 0x00 12.--13. "WDTLPIC,CPUWDT Low Power Status Clear" "0,1,2,3" bitfld.long 0x00 10.--11. "CWLPIC,WDT Low Power Status Clear" "0,1,2,3" bitfld.long 0x00 8.--9. "WDTALMC2,WDT Second Counter Overflow Alarm Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "WDTINTC1,WDT First Counter Overflow Interrupt Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "WDTALMC1,WDT First Counter Overflow Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "CEINTRC,CE Interrupt Clear" "0,1,2,3" newline bitfld.long 0x00 0.--1. "CEALMC,CE Alarm Clear" "0,1,2,3" group.long ad:0xC007046C++0x0B line.long 0x00 "CWMASK,CPUWDT Alarm and Bus Error Mask Register" bitfld.long 0x00 12.--13. "BEMASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x00 10.--11. "MIDEMASK,MASTER ID Alarm Mask" "0,1,2,3" bitfld.long 0x00 8.--9. "REGALMMK,CPUWDT Register Alarm Mask" "0,1,2,3" bitfld.long 0x00 6.--7. "PWALMMK,CPUWDT Alarm Mask" "0,1,2,3" bitfld.long 0x00 4.--5. "WDTALM2MK,WDT Second Counter Overflow Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "WDTALM1MK,WDT First Counter Overflow Alarm Mask" "0,1,2,3" bitfld.long 0x00 0.--1. "CEALMMK,CE Alarm Mask" "0,1,2,3" line.long 0x04 "CWINTMASK,CPUWDT Interrupt Mask Register" bitfld.long 0x04 2.--3. "WDTINT1MK,WDT First Counter Overflow Interrupt Mask" "0,1,2,3" bitfld.long 0x04 0.--1. "CEINTMK,CE Interrupt Mask" "0,1,2,3" line.long 0x08 "DBGHWCKEN,Debug Hardware Clock Gating Enable Register" bitfld.long 0x08 0. "DBGHWEN,Debug Hardware Clock Enable" "0,1" tree.end tree "PORTS PXX" tree "P00" group.long ad:0xB0050000++0x03 line.long 0x00 "P00_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0050004++0x03 line.long 0x00 "P00_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050010++0x0F line.long 0x00 "P00_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P00_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P00_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P00_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0050024++0x03 line.long 0x00 "P00_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0050040++0x07 line.long 0x00 "P00_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P00_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0050050++0x03 line.long 0x00 "P00_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0050060++0x0B line.long 0x00 "P00_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P00_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P00_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0050070++0x27 line.long 0x00 "P00_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P00_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P00_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P00_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P00_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P00_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P00_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P00_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P00_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P00_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB00500A0++0x07 line.long 0x00 "P00_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P00_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB00500C0++0x07 line.long 0x00 "P00_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P00_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P01" group.long ad:0xB0050100++0x03 line.long 0x00 "P01_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0050104++0x03 line.long 0x00 "P01_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050110++0x0F line.long 0x00 "P01_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P01_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P01_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P01_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0050124++0x03 line.long 0x00 "P01_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0050140++0x07 line.long 0x00 "P01_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P01_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0050150++0x03 line.long 0x00 "P01_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0050160++0x0B line.long 0x00 "P01_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P01_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P01_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0050170++0x27 line.long 0x00 "P01_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P01_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P01_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P01_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P01_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P01_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P01_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P01_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P01_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P01_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB00501A0++0x07 line.long 0x00 "P01_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P01_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB00501C0++0x07 line.long 0x00 "P01_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P01_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P02" group.long ad:0xB0050200++0x03 line.long 0x00 "P02_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0050204++0x03 line.long 0x00 "P02_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050210++0x0F line.long 0x00 "P02_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P02_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P02_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P02_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0050224++0x03 line.long 0x00 "P02_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0050240++0x07 line.long 0x00 "P02_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P02_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0050250++0x03 line.long 0x00 "P02_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0050260++0x0B line.long 0x00 "P02_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P02_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P02_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0050270++0x27 line.long 0x00 "P02_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P02_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P02_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P02_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P02_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P02_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P02_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P02_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P02_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P02_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB00502A0++0x07 line.long 0x00 "P02_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P02_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB00502C0++0x07 line.long 0x00 "P02_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P02_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P10" group.long ad:0xB0050A00++0x03 line.long 0x00 "P10_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0050A04++0x03 line.long 0x00 "P10_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050A10++0x0F line.long 0x00 "P10_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P10_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P10_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P10_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0050A24++0x03 line.long 0x00 "P10_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0050A40++0x07 line.long 0x00 "P10_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P10_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0050A50++0x03 line.long 0x00 "P10_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0050A60++0x0B line.long 0x00 "P10_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P10_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P10_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0050A70++0x27 line.long 0x00 "P10_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P10_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P10_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P10_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P10_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P10_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P10_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P10_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P10_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P10_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050AA0++0x07 line.long 0x00 "P10_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P10_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB0050AC0++0x07 line.long 0x00 "P10_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P10_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P11" group.long ad:0xB0050B00++0x03 line.long 0x00 "P11_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0050B04++0x03 line.long 0x00 "P11_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050B10++0x0F line.long 0x00 "P11_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P11_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P11_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P11_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0050B24++0x03 line.long 0x00 "P11_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0050B40++0x07 line.long 0x00 "P11_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P11_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0050B50++0x03 line.long 0x00 "P11_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0050B60++0x0B line.long 0x00 "P11_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P11_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P11_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0050B70++0x27 line.long 0x00 "P11_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P11_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P11_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P11_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P11_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P11_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P11_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P11_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P11_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P11_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050BA0++0x07 line.long 0x00 "P11_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P11_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB0050BC0++0x07 line.long 0x00 "P11_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P11_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P12" group.long ad:0xB0050C00++0x03 line.long 0x00 "P12_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0050C04++0x03 line.long 0x00 "P12_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050C10++0x0F line.long 0x00 "P12_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P12_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P12_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P12_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0050C24++0x03 line.long 0x00 "P12_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0050C40++0x07 line.long 0x00 "P12_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P12_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0050C50++0x03 line.long 0x00 "P12_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0050C60++0x0B line.long 0x00 "P12_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P12_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P12_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0050C70++0x27 line.long 0x00 "P12_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P12_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P12_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P12_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P12_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P12_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P12_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P12_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P12_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P12_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050CA0++0x07 line.long 0x00 "P12_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P12_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB0050CC0++0x07 line.long 0x00 "P12_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P12_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P13" group.long ad:0xB0050D00++0x03 line.long 0x00 "P13_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0050D04++0x03 line.long 0x00 "P13_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050D10++0x0F line.long 0x00 "P13_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P13_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P13_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P13_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0050D24++0x03 line.long 0x00 "P13_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0050D40++0x07 line.long 0x00 "P13_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P13_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0050D50++0x03 line.long 0x00 "P13_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0050D60++0x0B line.long 0x00 "P13_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P13_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P13_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0050D70++0x27 line.long 0x00 "P13_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P13_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P13_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P13_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P13_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P13_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P13_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P13_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P13_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P13_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050DA0++0x07 line.long 0x00 "P13_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P13_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB0050DC0++0x07 line.long 0x00 "P13_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P13_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P14" group.long ad:0xB0050E00++0x03 line.long 0x00 "P14_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0050E04++0x03 line.long 0x00 "P14_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050E10++0x0F line.long 0x00 "P14_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P14_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P14_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P14_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0050E24++0x03 line.long 0x00 "P14_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0050E40++0x07 line.long 0x00 "P14_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P14_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0050E50++0x03 line.long 0x00 "P14_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0050E60++0x0B line.long 0x00 "P14_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P14_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P14_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0050E70++0x27 line.long 0x00 "P14_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P14_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P14_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P14_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P14_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P14_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P14_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P14_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P14_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P14_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050EA0++0x07 line.long 0x00 "P14_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P14_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB0050EC0++0x07 line.long 0x00 "P14_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P14_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P15" group.long ad:0xB0050F00++0x03 line.long 0x00 "P15_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0050F04++0x03 line.long 0x00 "P15_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050F10++0x0F line.long 0x00 "P15_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P15_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P15_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P15_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0050F24++0x03 line.long 0x00 "P15_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0050F40++0x07 line.long 0x00 "P15_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P15_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0050F50++0x03 line.long 0x00 "P15_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0050F60++0x0B line.long 0x00 "P15_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P15_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P15_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0050F70++0x27 line.long 0x00 "P15_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P15_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P15_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P15_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P15_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P15_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P15_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P15_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P15_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P15_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0050FA0++0x07 line.long 0x00 "P15_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P15_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB0050FC0++0x07 line.long 0x00 "P15_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P15_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P20" group.long ad:0xB0051400++0x03 line.long 0x00 "P20_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0051404++0x03 line.long 0x00 "P20_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0051410++0x0F line.long 0x00 "P20_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P20_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P20_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P20_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0051424++0x03 line.long 0x00 "P20_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0051440++0x07 line.long 0x00 "P20_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P20_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0051450++0x03 line.long 0x00 "P20_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0051460++0x0B line.long 0x00 "P20_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P20_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P20_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0051470++0x27 line.long 0x00 "P20_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P20_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P20_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P20_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P20_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P20_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P20_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P20_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P20_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P20_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB00514A0++0x07 line.long 0x00 "P20_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P20_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB00514C0++0x07 line.long 0x00 "P20_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P20_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P21" group.long ad:0xB0051500++0x03 line.long 0x00 "P21_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0051504++0x03 line.long 0x00 "P21_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0051510++0x0F line.long 0x00 "P21_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P21_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P21_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P21_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0051524++0x03 line.long 0x00 "P21_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0051540++0x07 line.long 0x00 "P21_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P21_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0051550++0x03 line.long 0x00 "P21_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0051560++0x0B line.long 0x00 "P21_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P21_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P21_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0051570++0x27 line.long 0x00 "P21_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P21_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P21_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P21_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P21_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P21_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P21_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P21_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P21_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P21_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB00515A0++0x07 line.long 0x00 "P21_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P21_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB00515C0++0x07 line.long 0x00 "P21_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P21_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P22" group.long ad:0xB0051600++0x03 line.long 0x00 "P22_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0051604++0x03 line.long 0x00 "P22_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0051610++0x0F line.long 0x00 "P22_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P22_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P22_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P22_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0051624++0x03 line.long 0x00 "P22_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0051640++0x07 line.long 0x00 "P22_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P22_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0051650++0x03 line.long 0x00 "P22_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0051660++0x0B line.long 0x00 "P22_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P22_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P22_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0051670++0x27 line.long 0x00 "P22_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P22_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P22_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P22_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P22_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P22_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P22_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P22_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P22_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P22_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB00516A0++0x07 line.long 0x00 "P22_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P22_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB00516C0++0x07 line.long 0x00 "P22_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P22_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P23" group.long ad:0xB0051700++0x03 line.long 0x00 "P23_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0051704++0x03 line.long 0x00 "P23_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0051710++0x0F line.long 0x00 "P23_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P23_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P23_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P23_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0051724++0x03 line.long 0x00 "P23_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0051740++0x07 line.long 0x00 "P23_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P23_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0051750++0x03 line.long 0x00 "P23_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0051760++0x0B line.long 0x00 "P23_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P23_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P23_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0051770++0x27 line.long 0x00 "P23_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P23_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P23_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P23_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P23_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P23_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P23_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P23_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P23_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P23_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB00517A0++0x07 line.long 0x00 "P23_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P23_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB00517C0++0x07 line.long 0x00 "P23_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P23_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P32" group.long ad:0xB0052000++0x03 line.long 0x00 "P32_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0052004++0x03 line.long 0x00 "P32_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0052010++0x0F line.long 0x00 "P32_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P32_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P32_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P32_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0052024++0x03 line.long 0x00 "P32_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0052040++0x07 line.long 0x00 "P32_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P32_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0052050++0x03 line.long 0x00 "P32_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0052060++0x0B line.long 0x00 "P32_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P32_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P32_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0052070++0x27 line.long 0x00 "P32_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P32_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P32_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P32_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P32_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P32_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P32_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P32_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P32_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P32_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB00520A0++0x07 line.long 0x00 "P32_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P32_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB00520C0++0x07 line.long 0x00 "P32_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P32_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P33" group.long ad:0xB0052100++0x03 line.long 0x00 "P33_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0052104++0x03 line.long 0x00 "P33_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0052110++0x0F line.long 0x00 "P33_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P33_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P33_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P33_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0052124++0x03 line.long 0x00 "P33_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0052140++0x07 line.long 0x00 "P33_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P33_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0052150++0x03 line.long 0x00 "P33_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0052160++0x0B line.long 0x00 "P33_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P33_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P33_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0052170++0x27 line.long 0x00 "P33_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P33_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P33_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P33_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P33_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P33_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P33_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P33_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P33_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P33_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB00521A0++0x07 line.long 0x00 "P33_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P33_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB00521C0++0x07 line.long 0x00 "P33_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P33_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P34" group.long ad:0xB0052200++0x03 line.long 0x00 "P34_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0052204++0x03 line.long 0x00 "P34_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0052210++0x0F line.long 0x00 "P34_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P34_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P34_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P34_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0052224++0x03 line.long 0x00 "P34_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0052240++0x07 line.long 0x00 "P34_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P34_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0052250++0x03 line.long 0x00 "P34_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0052260++0x0B line.long 0x00 "P34_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P34_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P34_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0052270++0x27 line.long 0x00 "P34_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P34_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P34_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P34_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P34_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P34_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P34_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P34_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P34_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P34_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB00522A0++0x07 line.long 0x00 "P34_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P34_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB00522C0++0x07 line.long 0x00 "P34_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P34_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree "P40" group.long ad:0xB0052800++0x03 line.long 0x00 "P40_ODR,Port n Output Data Bit Register" bitfld.long 0x00 15. "ODR15,IO15 Output Data" "0,1" bitfld.long 0x00 14. "ODR14,IO14 Output Data" "0,1" bitfld.long 0x00 13. "ODR13,IO13 Output Data" "0,1" bitfld.long 0x00 12. "ODR12,IO12 Output Data" "0,1" bitfld.long 0x00 11. "ODR11,IO11 Output Data" "0,1" bitfld.long 0x00 10. "ODR10,IO10 Output Data" "0,1" bitfld.long 0x00 9. "ODR9,IO9 Output Data" "0,1" bitfld.long 0x00 8. "ODR8,IO8 Output Data" "0,1" bitfld.long 0x00 7. "ODR7,IO7 Output Data" "0,1" bitfld.long 0x00 6. "ODR6,IO6 Output Data" "0,1" newline bitfld.long 0x00 5. "ODR5,IO5 Output Data" "0,1" bitfld.long 0x00 4. "ODR4,IO4 Output Data" "0,1" bitfld.long 0x00 3. "ODR3,IO3 Output Data" "0,1" bitfld.long 0x00 2. "ODR2,IO2 Output Data" "0,1" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0052804++0x03 line.long 0x00 "P40_BSRR,Port n Output Data Bit Set Reset Register" bitfld.long 0x00 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x00 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x00 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x00 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x00 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x00 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x00 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x00 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x00 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x00 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x00 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x00 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x00 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x00 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x00 12. "BR12,IO12 Output Data Reset" "0,1" newline bitfld.long 0x00 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x00 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x00 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x00 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x00 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x00 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x00 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x00 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x00 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x00 2. "BR2,IO2 Output Data Reset" "0,1" newline bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0052810++0x0F line.long 0x00 "P40_CTR0,Port n Control Register 0" bitfld.long 0x00 31. "DSI3,IO3 Input Disable" "0,1" bitfld.long 0x00 30. "ENO3,IO3 Output Enable" "0,1" bitfld.long 0x00 29. "OD3,IO3 Characteristic Select" "0,1" bitfld.long 0x00 24.--26. "SEL3,IO3 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "DSI2,IO2 Input Disable" "0,1" bitfld.long 0x00 22. "ENO2,IO2 Output Enable" "0,1" bitfld.long 0x00 21. "OD2,IO2 Characteristic Select" "0,1" bitfld.long 0x00 16.--18. "SEL2,IO2 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" newline bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x04 "P40_CTR4,Port n Control Register 4" bitfld.long 0x04 31. "DSI7,IO7 Input Disable" "0,1" bitfld.long 0x04 30. "ENO7,IO7 Output Enable" "0,1" bitfld.long 0x04 29. "OD7,IO7 Characteristic Select" "0,1" bitfld.long 0x04 24.--26. "SEL7,IO7 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 23. "DSI6,IO6 Input Disable" "0,1" bitfld.long 0x04 22. "ENO6,IO6 Output Enable" "0,1" bitfld.long 0x04 21. "OD6,IO6 Characteristic Select" "0,1" bitfld.long 0x04 16.--18. "SEL6,IO6 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 15. "DSI5,IO5 Input Disable" "0,1" bitfld.long 0x04 14. "ENO5,IO5 Output Enable" "0,1" newline bitfld.long 0x04 13. "OD5,IO5 Characteristic Select" "0,1" bitfld.long 0x04 8.--10. "SEL5,IO5 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 7. "DSI4,IO4 Input Disable" "0,1" bitfld.long 0x04 6. "ENO4,IO4 Output Enable" "0,1" bitfld.long 0x04 5. "OD4,IO4 Characteristic Select" "0,1" bitfld.long 0x04 0.--2. "SEL4,IO4 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x08 "P40_CTR8,Port n Control Register 8" bitfld.long 0x08 31. "DSI11,IO11 Input Disable" "0,1" bitfld.long 0x08 30. "ENO11,IO11 Output Enable" "0,1" bitfld.long 0x08 29. "OD11,IO11 Characteristic Select" "0,1" bitfld.long 0x08 24.--26. "SEL11,IO11 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 23. "DSI10,IO10 Input Disable" "0,1" bitfld.long 0x08 22. "ENO10,IO10 Output Enable" "0,1" bitfld.long 0x08 21. "OD10,IO10 Characteristic Select" "0,1" bitfld.long 0x08 16.--18. "SEL10,IO10 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 15. "DSI9,IO9 Input Disable" "0,1" bitfld.long 0x08 14. "ENO9,IO9 Output Enable" "0,1" newline bitfld.long 0x08 13. "OD9,IO9 Characteristic Select" "0,1" bitfld.long 0x08 8.--10. "SEL9,IO9 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7. "DSI8,IO8 Input Disable" "0,1" bitfld.long 0x08 6. "ENO8,IO8 Output Enable" "0,1" bitfld.long 0x08 5. "OD8,IO8 Characteristic Select" "0,1" bitfld.long 0x08 0.--2. "SEL8,IO8 Output Function Select" "0,1,2,3,4,5,6,7" line.long 0x0C "P40_CTR12,Port n Control Register 12" bitfld.long 0x0C 31. "DSI15,IO15 Input Disable" "0,1" bitfld.long 0x0C 30. "ENO15,IO15 Output Enable" "0,1" bitfld.long 0x0C 29. "OD15,IO15 Characteristic Select" "0,1" bitfld.long 0x0C 24.--26. "SEL15,IO15 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 23. "DSI14,IO14 Input Disable" "0,1" bitfld.long 0x0C 22. "ENO14,IO14 Output Enable" "0,1" bitfld.long 0x0C 21. "OD14,IO14 Characteristic Select" "0,1" bitfld.long 0x0C 16.--18. "SEL14,IO14 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 15. "DSI13,IO13 Input Disable" "0,1" bitfld.long 0x0C 14. "ENO13,IO13 Output Enable" "0,1" newline bitfld.long 0x0C 13. "OD13,IO13 Characteristic Select" "0,1" bitfld.long 0x0C 8.--10. "SEL13,IO13 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 7. "DSI12,IO12 Input Disable" "0,1" bitfld.long 0x0C 6. "ENO12,IO12 Output Enable" "0,1" bitfld.long 0x0C 5. "OD12,IO12 Characteristic Select" "0,1" bitfld.long 0x0C 0.--2. "SEL12,IO12 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0052824++0x03 line.long 0x00 "P40_IDR,Port n Input Data Register" bitfld.long 0x00 15. "IDR15,IO15 Input Data" "0,1" bitfld.long 0x00 14. "IDR14,IO14 Input Data" "0,1" bitfld.long 0x00 13. "IDR13,IO13 Input Data" "0,1" bitfld.long 0x00 12. "IDR12,IO12 Input Data" "0,1" bitfld.long 0x00 11. "IDR11,IO11 Input Data" "0,1" bitfld.long 0x00 10. "IDR10,IO10 Input Data" "0,1" bitfld.long 0x00 9. "IDR9,IO9 Input Data" "0,1" bitfld.long 0x00 8. "IDR8,IO8 Input Data" "0,1" bitfld.long 0x00 7. "IDR7,IO7 Input Data" "0,1" bitfld.long 0x00 6. "IDR6,IO6 Input Data" "0,1" newline bitfld.long 0x00 5. "IDR5,IO5 Input Data" "0,1" bitfld.long 0x00 4. "IDR4,IO4 Input Data" "0,1" bitfld.long 0x00 3. "IDR3,IO3 Input Data" "0,1" bitfld.long 0x00 2. "IDR2,IO2 Input Data" "0,1" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0052840++0x07 line.long 0x00 "P40_DSR0,Port n Pad Driver Mode Register 0" bitfld.long 0x00 31. "PL7,IO7 Pad Level Selection" "0,1" bitfld.long 0x00 30. "SR7,IO7 Output Slew-Rate" "0,1" bitfld.long 0x00 29. "IS7,IO7 Input Mode Selection" "0,1" bitfld.long 0x00 28. "DR7,IO7 Output Driver Strength" "0,1" bitfld.long 0x00 27. "PL6,IO6 Pad Level Selection" "0,1" bitfld.long 0x00 26. "SR6,IO6 Output Slew-Rate" "0,1" bitfld.long 0x00 25. "IS6,IO6 Input Mode Selection" "0,1" bitfld.long 0x00 24. "DR6,IO6 Output Driver Strength" "0,1" bitfld.long 0x00 23. "PL5,IO5 Pad Level Selection" "0,1" bitfld.long 0x00 22. "SR5,IO5 Output Driver Strength" "0,1" newline bitfld.long 0x00 21. "IS5,IO5 Input Mode Selection" "0,1" bitfld.long 0x00 20. "DR5,IO5 Output Driver Strength" "0,1" bitfld.long 0x00 19. "PL4,IO4 Pad Level Selection" "0,1" bitfld.long 0x00 18. "SR4,IO4 Output Slew-Rate" "0,1" bitfld.long 0x00 17. "IS4,IO4 Input Mode Selection" "0,1" bitfld.long 0x00 16. "DR4,IO4 Output Driver Strength" "0,1" bitfld.long 0x00 15. "PL3,IO3 Pad Level Selection" "0,1" bitfld.long 0x00 14. "SR3,IO3 Output Slew-Rate" "0,1" bitfld.long 0x00 13. "IS3,IO3 Input Mode Selection" "0,1" bitfld.long 0x00 12. "DR3,IO3 Output Driver Strength" "0,1" newline bitfld.long 0x00 11. "PL2,IO2 Pad Level Selection" "0,1" bitfld.long 0x00 10. "SR2,IO2 Output Slew-Rate" "0,1" bitfld.long 0x00 9. "IS2,IO2 Input Mode Selection" "0,1" bitfld.long 0x00 8. "DR2,IO2 Output Driver Strength" "0,1" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" newline bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" line.long 0x04 "P40_DSR8,Port n Pad Driver Mode Register 8" bitfld.long 0x04 31. "PL15,IO15 Pad Level Selection" "0,1" bitfld.long 0x04 30. "SR15,IO15 Output Slew-Rate" "0,1" bitfld.long 0x04 29. "IS15,IO15 Input Mode Selection" "0,1" bitfld.long 0x04 28. "DR15,IO15 Output Driver Strength" "0,1" bitfld.long 0x04 27. "PL14,IO14 Pad Level Selection" "0,1" bitfld.long 0x04 26. "SR14,IO14 Output Slew-Rate" "0,1" bitfld.long 0x04 25. "IS14,IO14 Input Mode Selection" "0,1" bitfld.long 0x04 24. "DR14,IO14 Output Driver Strength" "0,1" bitfld.long 0x04 23. "PL13,IO13 Pad Level Selection" "0,1" bitfld.long 0x04 22. "SR13,IO13 Output Driver Strength" "0,1" newline bitfld.long 0x04 21. "IS13,IO13 Input Mode Selection" "0,1" bitfld.long 0x04 20. "DR13,IO13 Output Driver Strength" "0,1" bitfld.long 0x04 19. "PL12,IO12 Pad Level Selection" "0,1" bitfld.long 0x04 18. "SR12,IO12 Output Slew-Rate" "0,1" bitfld.long 0x04 17. "IS12,IO12 Input Mode Selection" "0,1" bitfld.long 0x04 16. "DR12,IO12 Output Driver Strength" "0,1" bitfld.long 0x04 15. "PL11,IO11 Pad Level Selection" "0,1" bitfld.long 0x04 14. "SR11,IO11 Output Slew-Rate" "0,1" bitfld.long 0x04 13. "IS11,IO11 Input Mode Selection" "0,1" bitfld.long 0x04 12. "DR11,IO11 Output Driver Strength" "0,1" newline bitfld.long 0x04 11. "PL10,IO10 Pad Level Selection" "0,1" bitfld.long 0x04 10. "SR10,IO10 Output Slew-Rate" "0,1" bitfld.long 0x04 9. "IS10,IO10 Input Mode Selection" "0,1" bitfld.long 0x04 8. "DR10,IO10 Output Driver Strength" "0,1" bitfld.long 0x04 7. "PL9,IO9 Pad Level Selection" "0,1" bitfld.long 0x04 6. "SR9,IO9 Output Slew-Rate" "0,1" bitfld.long 0x04 5. "IS9,IO9 Input Mode Selection" "0,1" bitfld.long 0x04 4. "DR9,IO9 Output Driver Strength" "0,1" bitfld.long 0x04 3. "PL8,IO8 Pad Level Selection" "0,1" bitfld.long 0x04 2. "SR8,IO8 Output Slew-Rate" "0,1" newline bitfld.long 0x04 1. "IS8,IO8 Input Mode Selection" "0,1" bitfld.long 0x04 0. "DR8,IO8 Output Driver Strength" "0,1" group.long ad:0xB0052850++0x03 line.long 0x00 "P40_ESR,Port n Emergency Stop Register" bitfld.long 0x00 30.--31. "EN15,IO15 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 28.--29. "EN14,IO14 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 26.--27. "EN13,IO13 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 24.--25. "EN12,IO12 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 22.--23. "EN11,IO11 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 20.--21. "EN10,IO10 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "EN9,IO9 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "EN8,IO8 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "EN7,IO7 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "EN6,IO6 Emergency Stop Enable" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN5,IO5 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "EN4,IO4 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EN3,IO3 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "EN2,IO2 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "EN1,IO1 Emergency Stop Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EN0,IO0 Emergency Stop Enable" "0,1,2,3" group.long ad:0xB0052860++0x0B line.long 0x00 "P40_DFR,Port n Digital Function Register" bitfld.long 0x00 30.--31. "DFR15,IO15 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 28.--29. "DFR14,IO14 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 26.--27. "DFR13,IO13 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 24.--25. "DFR12,IO12 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 22.--23. "DFR11,IO11 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 20.--21. "DFR10,IO10 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 18.--19. "DFR9,IO9 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 16.--17. "DFR8,IO8 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 14.--15. "DFR7,IO7 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 12.--13. "DFR6,IO6 Digital Function Configure" "0,1,2,3" newline bitfld.long 0x00 10.--11. "DFR5,IO5 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 8.--9. "DFR4,IO4 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 6.--7. "DFR3,IO3 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 4.--5. "DFR2,IO2 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "P40_HWCR,Port n Hardware Control Register" bitfld.long 0x04 30.--31. "SEL15,IO15 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 28.--29. "SEL14,IO14 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 26.--27. "SEL13,IO13 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 24.--25. "SEL12,IO12 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 22.--23. "SEL11,IO11 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 20.--21. "SEL10,IO10 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 18.--19. "SEL9,IO9 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 16.--17. "SEL8,IO8 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 14.--15. "SEL7,IO7 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 12.--13. "SEL6,IO6 Hardware Control Select" "0,1,2,3" newline bitfld.long 0x04 10.--11. "SEL5,IO5 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 8.--9. "SEL4,IO4 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 6.--7. "SEL3,IO3 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 4.--5. "SEL2,IO2 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "P40_PSR,Port n Pull Select Register" bitfld.long 0x08 30.--31. "PS15,IO15 Pull Select" "0,1,2,3" bitfld.long 0x08 28.--29. "PS14,IO14 Pull Select" "0,1,2,3" bitfld.long 0x08 26.--27. "PS13,IO13 Pull Select" "0,1,2,3" bitfld.long 0x08 24.--25. "PS12,IO12 Pull Select" "0,1,2,3" bitfld.long 0x08 22.--23. "PS11,IO11 Pull Select" "0,1,2,3" bitfld.long 0x08 20.--21. "PS10,IO10 Pull Select" "0,1,2,3" bitfld.long 0x08 18.--19. "PS9,IO9 Pull Select" "0,1,2,3" bitfld.long 0x08 16.--17. "PS8,IO8 Pull Select" "0,1,2,3" bitfld.long 0x08 14.--15. "PS7,IO7 Pull Select" "0,1,2,3" bitfld.long 0x08 12.--13. "PS6,IO6 Pull Select" "0,1,2,3" newline bitfld.long 0x08 10.--11. "PS5,IO5 Pull Select" "0,1,2,3" bitfld.long 0x08 8.--9. "PS4,IO4 Pull Select" "0,1,2,3" bitfld.long 0x08 6.--7. "PS3,IO3 Pull Select" "0,1,2,3" bitfld.long 0x08 4.--5. "PS2,IO2 Pull Select" "0,1,2,3" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0052870++0x27 line.long 0x00 "P40_BSR0,Port n Output Data Bit Set Register 0" bitfld.long 0x00 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x00 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "P40_BSR4,Port n Output Data Bit Set Register 4" bitfld.long 0x04 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x04 22. "BS6,IO6 Output Data Bit Set" "0,1" bitfld.long 0x04 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x04 20. "BS4,IO4 Output Data Bit Set" "0,1" line.long 0x08 "P40_BSR8,Port n Output Data Bit Set Register 8" bitfld.long 0x08 27. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x08 26. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x08 25. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x08 24. "BS9,IO9 Output Data Bit Set" "0,1" line.long 0x0C "P40_BSR12,Port n Output Data Bit Set Register 12" bitfld.long 0x0C 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x0C 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x0C 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x0C 28. "BS12,IO12 Output Data Bit Set" "0,1" line.long 0x10 "P40_BRR0,Port n Output Data Bit Reset Register 0" bitfld.long 0x10 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x10 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x10 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x10 0. "BR0,IO0 Output Data Reset" "0,1" line.long 0x14 "P40_BRR4,Port n Output Data Bit Reset Register 4" bitfld.long 0x14 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x14 6. "BR6,IO6 Output Data Reset" "0,1" bitfld.long 0x14 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x14 4. "BR4,IO4 Output Data Reset" "0,1" line.long 0x18 "P40_BRR8,Port n Output Data Bit Reset Register 8" bitfld.long 0x18 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x18 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x18 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x18 8. "BR8,IO8 Output Data Reset" "0,1" line.long 0x1C "P40_BRR12,Port n Output Data Bit Reset Register 12" bitfld.long 0x1C 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x1C 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x1C 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x1C 12. "BR12,IO12 Output Data Reset" "0,1" line.long 0x20 "P40_BSR,Port n Output Data Bit Set Register" bitfld.long 0x20 31. "BS15,IO15 Output Data Bit Set" "0,1" bitfld.long 0x20 30. "BS14,IO14 Output Data Bit Set" "0,1" bitfld.long 0x20 29. "BS13,IO13 Output Data Bit Set" "0,1" bitfld.long 0x20 28. "BS12,IO12 Output Data Bit Set" "0,1" bitfld.long 0x20 27. "BS11,IO11 Output Data Bit Set" "0,1" bitfld.long 0x20 26. "BS10,IO10 Output Data Bit Set" "0,1" bitfld.long 0x20 25. "BS9,IO9 Output Data Bit Set" "0,1" bitfld.long 0x20 24. "BS8,IO8 Output Data Bit Set" "0,1" bitfld.long 0x20 23. "BS7,IO7 Output Data Bit Set" "0,1" bitfld.long 0x20 22. "BS6,IO6 Output Data Bit Set" "0,1" newline bitfld.long 0x20 21. "BS5,IO5 Output Data Bit Set" "0,1" bitfld.long 0x20 20. "BS4,IO4 Output Data Bit Set" "0,1" bitfld.long 0x20 19. "BS3,IO3 Output Data Bit Set" "0,1" bitfld.long 0x20 18. "BS2,IO2 Output Data Bit Set" "0,1" bitfld.long 0x20 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x20 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x24 "P40_BRR,Port n Output Data Bit Reset Register" bitfld.long 0x24 15. "BR15,IO15 Output Data Reset" "0,1" bitfld.long 0x24 14. "BR14,IO14 Output Data Reset" "0,1" bitfld.long 0x24 13. "BR13,IO13 Output Data Reset" "0,1" bitfld.long 0x24 12. "BR12,IO12 Output Data Reset" "0,1" bitfld.long 0x24 11. "BR11,IO11 Output Data Reset" "0,1" bitfld.long 0x24 10. "BR10,IO10 Output Data Reset" "0,1" bitfld.long 0x24 9. "BR9,IO9 Output Data Reset" "0,1" bitfld.long 0x24 8. "BR8,IO8 Output Data Reset" "0,1" bitfld.long 0x24 7. "BR7,IO7 Output Data Reset" "0,1" bitfld.long 0x24 6. "BR6,IO6 Output Data Reset" "0,1" newline bitfld.long 0x24 5. "BR5,IO5 Output Data Reset" "0,1" bitfld.long 0x24 4. "BR4,IO4 Output Data Reset" "0,1" bitfld.long 0x24 3. "BR3,IO3 Output Data Reset" "0,1" bitfld.long 0x24 2. "BR2,IO2 Output Data Reset" "0,1" bitfld.long 0x24 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x24 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB00528A0++0x07 line.long 0x00 "P40_LVDSR0,Port n LVDS Register x (x=0 1)" bitfld.long 0x00 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x00 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x00 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x00 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x00 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x00 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x00 0. "TXEN,LVDS Transmit Driver Enable" "0,1" line.long 0x04 "P40_LVDSR1,Port n LVDS Register x (x=0 1)" bitfld.long 0x04 11. "RTERMEN,Termination Resistor Enable/Disable" "0,1" bitfld.long 0x04 8.--10. "RTERMVAL,Set Termination Resistor Value" "0,1,2,3,4,5,6,7" bitfld.long 0x04 6.--7. "VOD,Drive Current and Differential Output Voltage Magnitude Select" "0,1,2,3" bitfld.long 0x04 4.--5. "IRATIO,Output Current Ratio Trim" "0,1,2,3" bitfld.long 0x04 3. "TXCM,Transmitter Common Voltage Select" "0,1" bitfld.long 0x04 2. "VBIASSEL,Select Bias Voltage Source" "0,1" bitfld.long 0x04 1. "BIASEN,Bias Circuit Enable" "0,1" bitfld.long 0x04 0. "TXEN,LVDS Transmit Driver Enable" "0,1" group.long ad:0xB00528C0++0x07 line.long 0x00 "P40_ERSTS,Port n Error Status Register" bitfld.long 0x00 4. "SFRACC,SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,SFR Redundant Error" "0,1" line.long 0x04 "P40_ERRMSK,Port n Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" tree.end tree.end tree "PESR" group.long ad:0xB0052A00++0x03 line.long 0x00 "PESR_ODR,Port ESR Output Data Register" bitfld.long 0x00 1. "ODR1,IO1 Output Data" "0,1" bitfld.long 0x00 0. "ODR0,IO0 Output Data" "0,1" wgroup.long ad:0xB0052A04++0x03 line.long 0x00 "PESR_BSRR,Port ESR Output Data Bit Set Reset Register" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0052A10++0x03 line.long 0x00 "PESR_CTR0,Port ESR Control Register 0" bitfld.long 0x00 15. "DSI1,IO1 Input Disable" "0,1" bitfld.long 0x00 14. "ENO1,IO1 Output Enable" "0,1" bitfld.long 0x00 13. "OD1,IO1 Characteristic Select" "0,1" bitfld.long 0x00 8.--10. "SEL1,IO1 Output Function Select" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "DSI0,IO0 Input Disable" "0,1" bitfld.long 0x00 6. "ENO0,IO0 Output Enable" "0,1" bitfld.long 0x00 5. "OD0,IO0 Characteristic Select" "0,1" bitfld.long 0x00 0.--2. "SEL0,IO0 Output Function Select" "0,1,2,3,4,5,6,7" rgroup.long ad:0xB0052A24++0x03 line.long 0x00 "PESR_IDR,Port ESR Input Data Register" bitfld.long 0x00 1. "IDR1,IO1 Input Data" "0,1" bitfld.long 0x00 0. "IDR0,IO0 Input data" "0,1" group.long ad:0xB0052A40++0x03 line.long 0x00 "PESR_DSR0,Port ESR Pad Driver Select Register 0" bitfld.long 0x00 7. "PL1,IO1 Pad Level Selection" "0,1" bitfld.long 0x00 6. "SR1,IO1 Output Slew-Rate" "0,1" bitfld.long 0x00 5. "IS1,IO1 Input Mode Selection" "0,1" bitfld.long 0x00 4. "DR1,IO1 Output Driver Strength" "0,1" bitfld.long 0x00 3. "PL0,IO0 Pad Level Selection" "0,1" bitfld.long 0x00 2. "SR0,IO0 Output Slew-Rate" "0,1" bitfld.long 0x00 1. "IS0,IO0 Input Mode Selection" "0,1" bitfld.long 0x00 0. "DR0,IO0 Output Driver Strength" "0,1" group.long ad:0xB0052A60++0x0B line.long 0x00 "PESR_DFR,ESR Digital Function Register" bitfld.long 0x00 2.--3. "DFR1,IO1 Digital Function Configure" "0,1,2,3" bitfld.long 0x00 0.--1. "DFR0,IO0 Digital Function Configure" "0,1,2,3" line.long 0x04 "PESR_HWCR,ESR Hardware Control Register" bitfld.long 0x04 2.--3. "SEL1,IO1 Hardware Control Select" "0,1,2,3" bitfld.long 0x04 0.--1. "SEL0,IO0 Hardware Control Select" "0,1,2,3" line.long 0x08 "PESR_PSR,Port ESR Pull Select Register" bitfld.long 0x08 2.--3. "PS1,IO1 Pull Select" "0,1,2,3" bitfld.long 0x08 0.--1. "PS0,IO0 Pull Select" "0,1,2,3" wgroup.long ad:0xB0052A70++0x03 line.long 0x00 "PESR_BSR0,Port ESR Output Data Bit Set Register 0" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" wgroup.long ad:0xB0052A80++0x03 line.long 0x00 "PESR_BRR0,Port ESR Output Data Reset Register 0" bitfld.long 0x00 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x00 0. "BR0,IO0 Output Data Reset" "0,1" wgroup.long ad:0xB0052A90++0x07 line.long 0x00 "PESR_BSR,Port ESR Output Data Bit Set Register" bitfld.long 0x00 17. "BS1,IO1 Output Data Bit Set" "0,1" bitfld.long 0x00 16. "BS0,IO0 Output Data Bit Set" "0,1" line.long 0x04 "PESR_BRR,Port ESR Output Data Reset Register" bitfld.long 0x04 1. "BR1,IO1 Output Data Reset" "0,1" bitfld.long 0x04 0. "BR0,IO0 Output Data Reset" "0,1" group.long ad:0xB0052AC0++0x07 line.long 0x00 "PESR_ERSTS,Port ESR Error Status Register" bitfld.long 0x00 4. "SFRACC,ESR SFR Invalid Access Error" "0,1" bitfld.long 0x00 0. "SFRRDN,ESR SFR Redundant Error" "0,1" line.long 0x04 "PESR_ERRMSK,Port ESR Error Mask Register" bitfld.long 0x04 4. "SFRACC,SFR Invalid Access Error Mask" "0,1" bitfld.long 0x04 0. "SFRRDN,SFR Redundant Error Mask" "0,1" group.long ad:0xB0052AD0++0x03 line.long 0x00 "PESR_OCFG,Port ESR Output Configure Register" bitfld.long 0x00 3. "MSKC,Reset Mask Indicator Clear" "0,1" rbitfld.long 0x00 2. "MSKI,Reset Mask Indicator" "0,1" bitfld.long 0x00 1. "ARC,Application Reset Indicator Clear" "0,1" rbitfld.long 0x00 0. "ARI,Application Reset Indicator" "0,1" tree.end tree "RXMUX" group.long ad:0xB0053000++0x5B line.long 0x00 "CAN0ISEL,CAN0 Input Signal Select Register" bitfld.long 0x00 8.--10. "CAN02RXSEL,Receive Select for Can02" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "CAN01RXSEL,Receive Select for Can01" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "CAN00RXSEL,Receive Select for Can00" "0,1,2,3,4,5,6,7" line.long 0x04 "CAN1ISEL,CAN1 Input Signal Select Register" bitfld.long 0x04 8.--10. "CAN12RXSEL,Receive Select for Can12" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4.--6. "CAN11RXSEL,Receive Select for Can11" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. "CAN10RXSEL,Receive Select for Can10" "0,1,2,3,4,5,6,7" line.long 0x08 "DSADCISEL,DSADC Input Signal Select Register" bitfld.long 0x08 12.--15. "TR3SEL,Trigger Select for TR3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. "TR2SEL,Trigger Select for TR2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. "TR1SEL,Trigger Select for TR1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. "TR0SEL,Trigger Select for TR0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "ETHISEL0,GETH Input Signal Select Register 0" bitfld.long 0x0C 20.--21. "RXERSEL,Receive Select for RXER" "0,1,2,3" bitfld.long 0x0C 16.--17. "DVSEL,Receive Select for RXDV/CRSDV/RCTL" "0,1,2,3" bitfld.long 0x0C 12.--13. "COLSEL,Receive Select for COL" "0,1,2,3" bitfld.long 0x0C 8.--9. "CRSSEL,Receive Select for CRS" "0,1,2,3" bitfld.long 0x0C 4.--5. "RXCKSEL,Receive Select for RXCLK REFCLK" "0,1,2,3" bitfld.long 0x0C 0.--1. "MDIOSEL,Receive Select for MDIO" "0,1,2,3" line.long 0x10 "ETHISEL1,GETH Input Signal Select Register 1" bitfld.long 0x10 16.--17. "TXCLKSEL,Receive Select for TXCLK" "0,1,2,3" bitfld.long 0x10 12.--13. "RXD3SEL,Receive Select for RXD3" "0,1,2,3" bitfld.long 0x10 8.--9. "RXD2SEL,Receive Select for RXD2" "0,1,2,3" bitfld.long 0x10 4.--5. "RXD1SEL,Receive Select for RXD1" "0,1,2,3" bitfld.long 0x10 0.--1. "RXD0SEL,Receive Select for RXD0" "0,1,2,3" line.long 0x14 "I2C0ISEL,I2C0 Input Signal Select Register" bitfld.long 0x14 4.--5. "SDASEL,Receive Select for SDA" "0,1,2,3" bitfld.long 0x14 0.--1. "SCLSEL,Receive Select for SCL" "0,1,2,3" line.long 0x18 "ASIISEL,ASI Input Signal Select Register" bitfld.long 0x18 28.--31. "ARXSEL7,Receive Select for ASI7 ARX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 24.--27. "ARXSEL6,Receive Select for ASI6 ARX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 20.--23. "ARXSEL5,Receive Select for ASI5 ARX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 16.--19. "ARXSEL4,Receive Select for ASI4 ARX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--15. "ARXSEL3,Receive Select for ASI3 ARX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 8.--11. "ARXSEL2,Receive Select for ASI2 ARX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 4.--7. "ARXSEL1,Receive Select for ASI1 ARX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. "ARXSEL0,Receive Select for ASI0 ARX" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "ESPI0ISEL,ESPIx Input Signal Select Register (x=0~8)" bitfld.long 0x1C 12.--14. "SLSISEL,Receive Select for SLSI" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 8.--10. "SCLKSEL,Receive Select for SCLK" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 4.--6. "MTSRSEL,Receive Select for MTSR" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0.--2. "MRSTSEL,Receive Select for MRST" "0,1,2,3,4,5,6,7" line.long 0x20 "ESPI1ISEL,ESPIx Input Signal Select Register (x=0~8)" bitfld.long 0x20 12.--14. "SLSISEL,Receive Select for SLSI" "0,1,2,3,4,5,6,7" bitfld.long 0x20 8.--10. "SCLKSEL,Receive Select for SCLK" "0,1,2,3,4,5,6,7" bitfld.long 0x20 4.--6. "MTSRSEL,Receive Select for MTSR" "0,1,2,3,4,5,6,7" bitfld.long 0x20 0.--2. "MRSTSEL,Receive Select for MRST" "0,1,2,3,4,5,6,7" line.long 0x24 "ESPI2ISEL,ESPIx Input Signal Select Register (x=0~8)" bitfld.long 0x24 12.--14. "SLSISEL,Receive Select for SLSI" "0,1,2,3,4,5,6,7" bitfld.long 0x24 8.--10. "SCLKSEL,Receive Select for SCLK" "0,1,2,3,4,5,6,7" bitfld.long 0x24 4.--6. "MTSRSEL,Receive Select for MTSR" "0,1,2,3,4,5,6,7" bitfld.long 0x24 0.--2. "MRSTSEL,Receive Select for MRST" "0,1,2,3,4,5,6,7" line.long 0x28 "ESPI3ISEL,ESPIx Input Signal Select Register (x=0~8)" bitfld.long 0x28 12.--14. "SLSISEL,Receive Select for SLSI" "0,1,2,3,4,5,6,7" bitfld.long 0x28 8.--10. "SCLKSEL,Receive Select for SCLK" "0,1,2,3,4,5,6,7" bitfld.long 0x28 4.--6. "MTSRSEL,Receive Select for MTSR" "0,1,2,3,4,5,6,7" bitfld.long 0x28 0.--2. "MRSTSEL,Receive Select for MRST" "0,1,2,3,4,5,6,7" line.long 0x2C "ESPI4ISEL,ESPIx Input Signal Select Register (x=0~8)" bitfld.long 0x2C 12.--14. "SLSISEL,Receive Select for SLSI" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 8.--10. "SCLKSEL,Receive Select for SCLK" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 4.--6. "MTSRSEL,Receive Select for MTSR" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 0.--2. "MRSTSEL,Receive Select for MRST" "0,1,2,3,4,5,6,7" line.long 0x30 "ESPI5ISEL,ESPIx Input Signal Select Register (x=0~8)" bitfld.long 0x30 12.--14. "SLSISEL,Receive Select for SLSI" "0,1,2,3,4,5,6,7" bitfld.long 0x30 8.--10. "SCLKSEL,Receive Select for SCLK" "0,1,2,3,4,5,6,7" bitfld.long 0x30 4.--6. "MTSRSEL,Receive Select for MTSR" "0,1,2,3,4,5,6,7" bitfld.long 0x30 0.--2. "MRSTSEL,Receive Select for MRST" "0,1,2,3,4,5,6,7" line.long 0x34 "ESPI6ISEL,ESPIx Input Signal Select Register (x=0~8)" bitfld.long 0x34 12.--14. "SLSISEL,Receive Select for SLSI" "0,1,2,3,4,5,6,7" bitfld.long 0x34 8.--10. "SCLKSEL,Receive Select for SCLK" "0,1,2,3,4,5,6,7" bitfld.long 0x34 4.--6. "MTSRSEL,Receive Select for MTSR" "0,1,2,3,4,5,6,7" bitfld.long 0x34 0.--2. "MRSTSEL,Receive Select for MRST" "0,1,2,3,4,5,6,7" line.long 0x38 "ESPI7ISEL,ESPIx Input Signal Select Register (x=0~8)" bitfld.long 0x38 12.--14. "SLSISEL,Receive Select for SLSI" "0,1,2,3,4,5,6,7" bitfld.long 0x38 8.--10. "SCLKSEL,Receive Select for SCLK" "0,1,2,3,4,5,6,7" bitfld.long 0x38 4.--6. "MTSRSEL,Receive Select for MTSR" "0,1,2,3,4,5,6,7" bitfld.long 0x38 0.--2. "MRSTSEL,Receive Select for MRST" "0,1,2,3,4,5,6,7" line.long 0x3C "ESPI8ISEL,ESPIx Input Signal Select Register (x=0~8)" bitfld.long 0x3C 12.--14. "SLSISEL,Receive Select for SLSI" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 8.--10. "SCLKSEL,Receive Select for SCLK" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 4.--6. "MTSRSEL,Receive Select for MTSR" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 0.--2. "MRSTSEL,Receive Select for MRST" "0,1,2,3,4,5,6,7" line.long 0x40 "SENTISEL0,SENT Input Signal Select Register 0" bitfld.long 0x40 28.--29. "SENT7SEL,Receive Select for SENT7" "0,1,2,3" bitfld.long 0x40 24.--25. "SENT6SEL,Receive Select for SENT6" "0,1,2,3" bitfld.long 0x40 20.--21. "SENT5SEL,Receive Select for SENT5" "0,1,2,3" bitfld.long 0x40 16.--17. "SENT4SEL,Receive Select for SENT4" "0,1,2,3" bitfld.long 0x40 12.--13. "SENT3SEL,Receive Select for SENT3" "0,1,2,3" bitfld.long 0x40 8.--9. "SENT2SEL,Receive Select for SENT2" "0,1,2,3" bitfld.long 0x40 4.--5. "SENT1SEL,Receive Select for SENT1" "0,1,2,3" bitfld.long 0x40 0.--1. "SENT0SEL,Receive Select for SENT0" "0,1,2,3" line.long 0x44 "SENTISEL8,SENT Input Signal Select Register 8" bitfld.long 0x44 4.--5. "SENT9SEL,Receive Select for SENT9" "0,1,2,3" bitfld.long 0x44 0.--1. "SENT8SEL,Receive Select for SENT8" "0,1,2,3" line.long 0x48 "IOMMON0SEL0,IOM0 Monitor Source Select Register 0" bitfld.long 0x48 28.--31. "MON0SEL7,IOM Monitor 0 Channel 7 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 24.--27. "MON0SEL6,IOM Monitor 0 Channel 6 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 20.--23. "MON0SEL5,IOM Monitor 0 Channel 5 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 16.--19. "MON0SEL4,IOM Monitor 0 Channel 4 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 12.--15. "MON0SEL3,IOM Monitor 0 Channel 3 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 8.--11. "MON0SEL2,IOM Monitor 0 Channel 2 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 4.--7. "MON0SEL1,IOM Monitor 0 Channel 1 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 0.--3. "MON0SEL0,IOM Monitor 0 Channel 0 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4C "IOMMON0SEL8,IOM0 Monitor Source Select Register 8" bitfld.long 0x4C 28.--31. "MON0SEL15,IOM Monitor 0 Channel 15 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 24.--27. "MON0SEL14,IOM Monitor 0 Channel 14 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 20.--23. "MON0SEL13,IOM Monitor 0 Channel 13 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 16.--19. "MON0SEL12,IOM Monitor 0 Channel 12 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 12.--15. "MON0SEL11,IOM Monitor 0 Channel 11 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 8.--11. "MON0SEL10,IOM Monitor 0 Channel 10 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 4.--7. "MON0SEL9,IOM Monitor 0 Channel 9 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 0.--3. "MON0SEL8,IOM Monitor 0 Channel 8 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x50 "IOMMON2SEL0,IOM2 Monitor Source Select Register 0" bitfld.long 0x50 28.--31. "MON2SEL7,IOM Monitor 2 Channel 7 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 24.--27. "MON2SEL6,IOM Monitor 2 Channel 6 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 20.--23. "MON2SEL5,IOM Monitor 2 Channel 5 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 16.--19. "MON2SEL4,IOM Monitor 2 Channel 4 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 12.--15. "MON2SEL3,IOM Monitor 2 Channel 3 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 8.--11. "MON2SEL2,IOM Monitor 2 Channel 2 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 4.--7. "MON2SEL1,IOM Monitor 2 Channel 1 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 0.--3. "MON2SEL0,IOM Monitor 2 Channel 0 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x54 "IOMMON2SEL8,IOM2 Monitor Source Select Register 8" bitfld.long 0x54 28.--31. "MON2SEL15,IOM Monitor 2 Channel 15 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 24.--27. "MON2SEL14,IOM Monitor 2 Channel 14 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 20.--23. "MON2SEL13,IOM Monitor 2 Channel 13 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 16.--19. "MON2SEL12,IOM Monitor 2 Channel 12 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 12.--15. "MON2SEL11,IOM Monitor 2 Channel 11 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 8.--11. "MON2SEL10,IOM Monitor 2 Channel 10 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 4.--7. "MON2SEL9,IOM Monitor 2 Channel 9 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 0.--3. "MON2SEL8,IOM Monitor 2 Channel 8 Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x58 "DBGTRIGSEL,DBGTRACE Trigger Input Signal Select Register" bitfld.long 0x58 0. "TRIGSEL,Input Select for DBGTRACE Trigger" "0,1" tree.end tree "ASI" tree "ASI0" group.long ad:0xD0080000++0x43 line.long 0x00 "LINCR1,LIN Control Register 1" bitfld.long 0x00 16. "NLSE,LIN State Capture Enable on Bit Error" "0,1" bitfld.long 0x00 15. "CCD,Checksum Calculation Disable" "0,1" bitfld.long 0x00 14. "CFD,Checksum Field Disable" "0,1" bitfld.long 0x00 13. "LASE,LIN Autosynchronization Enable" "0,1" bitfld.long 0x00 12. "AUTOWU,Automatic Wake-up" "0,1" bitfld.long 0x00 8.--11. "MBL,Master Break Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. "BF,Bypass Filter" "0,1" newline bitfld.long 0x00 5. "LBKM,Loop Back Mode" "0,1" bitfld.long 0x00 4. "MME,Master Mode Enable" "0,1" bitfld.long 0x00 3. "SSBL,Slave Mode Sync Break Length" "0,1" bitfld.long 0x00 2. "RBLM,Receiver Buffer Locked Mode" "0,1" bitfld.long 0x00 1. "SLEEP,Sleep Mode Request" "0,1" bitfld.long 0x00 0. "INIT,Initialization Mode Request" "0,1" line.long 0x04 "LINIER,LIN Interrupt Enable Register" bitfld.long 0x04 15. "SIZE,Stuck at Zero Interrupt Enable" "0,1" bitfld.long 0x04 14. "OCIE,Output Compare Interrupt Enable" "0,1" bitfld.long 0x04 13. "BEIE,Bit Error Interrupt Enable" "0,1" bitfld.long 0x04 12. "CEIE,Checksum Error Interrupt Enable" "0,1" bitfld.long 0x04 11. "HEIE,Header Error Interrupt Enable" "0,1" bitfld.long 0x04 8. "FEIE,Frame Error Interrupt Enable" "0,1" bitfld.long 0x04 7. "BOIE,Buffer Overrun Interrupt Enable" "0,1" newline bitfld.long 0x04 6. "LSIE,LIN State Interrupt Enable" "0,1" bitfld.long 0x04 5. "WUIE,Wakeup Interrupt Enable" "0,1" bitfld.long 0x04 3. "TOIE,Timeout Interrupt Enable" "0,1" bitfld.long 0x04 2. "DRIE,Data Reception Complete Interrupt Enable" "0,1" bitfld.long 0x04 1. "DTIE,Data Transmitted Interrupt Enable" "0,1" bitfld.long 0x04 0. "HRIE,Header Received Interrupt Enable" "0,1" line.long 0x08 "LINSR,LIN Status Register" bitfld.long 0x08 19. "AUTOSYNC_COMP,Autosynchronization Complete" "0,1" rbitfld.long 0x08 16.--18. "RDC,Receive Data Byte Count" "0,1,2,3,4,5,6,7" rbitfld.long 0x08 12.--15. "LINS,LIN State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x08 8. "DRBNE,Data Reception Buffer not Empty Flag" "0,1" rbitfld.long 0x08 7. "RXBUSY,Receiver Busy Flag" "0,1" rbitfld.long 0x08 6. "RDI,Receiver Data Input" "0,1" newline bitfld.long 0x08 5. "WUF,Wakeup Flag" "0,1" bitfld.long 0x08 2. "DRF,Data Reception Completed Flag" "0,1" bitfld.long 0x08 1. "DTF,Data transmission completed flag" "0,1" bitfld.long 0x08 0. "HRF,Header Received Flag" "0,1" line.long 0x0C "LINESR,LIN Error Status Register" bitfld.long 0x0C 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x0C 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x0C 13. "BEF,Bit Error Flag" "0,1" bitfld.long 0x0C 12. "CEF,Checksum Error Flag" "0,1" bitfld.long 0x0C 11. "SFEF,Sync Field Error Flag" "0,1" bitfld.long 0x0C 10. "SDEF,Break Delimiter Error Flag" "0,1" bitfld.long 0x0C 9. "IPDEF,ID Parity Error Flag" "0,1" newline bitfld.long 0x0C 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x0C 7. "BOF,Buffer Overrun Flag" "0,1" bitfld.long 0x0C 0. "NF,Noise Flag" "0,1" line.long 0x10 "UARTCR,UART Mode Control Register" bitfld.long 0x10 31. "MIS,Monitor Idle State" "0,1" bitfld.long 0x10 28.--30. "CSP,Configurable Sample Point (i)" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--27. "OSR,Oversampling Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 23. "ROSE,Reduced Oversampling Enable" "0,1" bitfld.long 0x10 20.--22. "NEF,Number of Expected Frames" "0,1,2,3,4,5,6,7" bitfld.long 0x10 19. "DTU,Disable Timeout in UART Mode" "0,1" bitfld.long 0x10 17.--18. "SBUR,Number of Stop Bits in UART Reception Mode" "0,1,2,3" newline bitfld.long 0x10 16. "WLS,Special Word Length in UART Mode" "0,1" bitfld.long 0x10 13.--15. "TDFL_TFC,Transmitter Data Field Length / Tx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 10.--12. "RDFL_RFC,Receiver Data Field Length/Rx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "RFBM,Rx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 8. "TFBM,Tx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 7. "WL1,Word Length in UART Mode" "0,1" bitfld.long 0x10 6. "PC1,Parity Control" "0,1" newline bitfld.long 0x10 5. "RxEn,Receiver Enable" "0,1" bitfld.long 0x10 4. "TxEn,Transmitter Enable" "0,1" bitfld.long 0x10 3. "PC0,Parity Control" "0,1" bitfld.long 0x10 2. "PCE,Parity Control Enable" "0,1" bitfld.long 0x10 1. "WL0,Word Length in UART Mode" "0,1" bitfld.long 0x10 0. "UART,UART Mode Enable" "0,1" line.long 0x14 "UARTSR,UART Mode Status Register" bitfld.long 0x14 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x14 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x14 10.--13. "PE[3:0],Parity Error Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x14 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x14 7. "BOF,FIFO/buffer Overrun Flag" "0,1" rbitfld.long 0x14 6. "RDI,Receiver data input" "0,1" newline bitfld.long 0x14 5. "WUF,Wakeup Flag" "0,1" rbitfld.long 0x14 4. "RFNE,Receive FIFO not Empty" "0,1" bitfld.long 0x14 3. "TO,Timeout" "0,1" bitfld.long 0x14 2. "DRF_RFE,Data Reception Completed flag / Rx FIFO Empty Flag" "0,1" bitfld.long 0x14 1. "DTF_TFF,Data Transmission Completed Flag / Tx FIFO Full Flag" "0,1" bitfld.long 0x14 0. "NF,Noise Flag" "0,1" line.long 0x18 "LINTCSR,LIN Timeout Control Status Register" bitfld.long 0x18 10. "MODE,Timeout Counter Mode" "0,1" bitfld.long 0x18 9. "IOT,Idle on Timeout" "0,1" bitfld.long 0x18 8. "TOCE,Timeout Counter Enable" "0,1" hexmask.long.byte 0x18 0.--7. 1. "CNT,Counter Value" line.long 0x1C "LINOCR,LIN Output Compare Register" hexmask.long.byte 0x1C 8.--15. 1. "OC2,Output Compare Value 2" hexmask.long.byte 0x1C 0.--7. 1. "OC1,Output Compare Value 1" line.long 0x20 "LINTOCR,LIN Timeout Control Register" bitfld.long 0x20 8.--11. "RTO,Response Timeout Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x20 0.--6. 1. "HTO,Header Timeout value" line.long 0x24 "LINFBRR,LIN Fractional Baud Rate Register" bitfld.long 0x24 0.--3. "FBR,Fractional Baud Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LINIBRR,LIN Integer Baud Rate Register" hexmask.long.tbyte 0x28 0.--19. 1. "IBR,Integer baud Rate" line.long 0x2C "LINCFR,LIN Checksum Field Register" hexmask.long.byte 0x2C 0.--7. 1. "CF,Checksum Bits" line.long 0x30 "LINCR2,LIN Control Register 2" bitfld.long 0x30 15. "TBDE,Two-bit Delimiter Enable" "0,1" bitfld.long 0x30 14. "IOBE,Idle on Bit Error" "0,1" bitfld.long 0x30 13. "IOPE,Idle on Identifier Parity Error" "0,1" bitfld.long 0x30 12. "WURQ,Wakeup Generate Request" "0,1" bitfld.long 0x30 11. "DDRQ,Data Discard Request" "0,1" bitfld.long 0x30 10. "DTRQ,Data Transmission Request" "0,1" bitfld.long 0x30 9. "ABRQ,Abort Request" "0,1" newline bitfld.long 0x30 8. "HTRQ,Header Transmission Request" "0,1" line.long 0x34 "BIDR,Buffer Identifier Register" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "BDRL,Buffer Data Register Least Significant" hexmask.long.byte 0x38 24.--31. 1. "DATA3,Data Byte 3" hexmask.long.byte 0x38 16.--23. 1. "DATA2,Data Byte 2" hexmask.long.byte 0x38 8.--15. 1. "DATA1,Data Byte 1" hexmask.long.byte 0x38 0.--7. 1. "DATA0,Data Byte 0" line.long 0x3C "BDRM,Buffer Data Register Most Significant" hexmask.long.byte 0x3C 24.--31. 1. "DATA7,Data Byte 7" hexmask.long.byte 0x3C 16.--23. 1. "DATA6,Data Byte 6" hexmask.long.byte 0x3C 8.--15. 1. "DATA5,Data Byte 5" hexmask.long.byte 0x3C 0.--7. 1. "DATA4,Data Byte 4" line.long 0x40 "IFER,Identifier Filter Enable Register" hexmask.long.word 0x40 0.--15. 1. "FACT[x],Filter Active ? one bit for each identifier filter" rgroup.long ad:0xD0080044++0x03 line.long 0x00 "IFMI,Identifier Filter Match Index" bitfld.long 0x00 0.--4. "IFMI,Filter Match Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD0080048++0x4B line.long 0x00 "IFMR,Identifier Filter Mode Register" hexmask.long.byte 0x00 0.--7. 1. "IFM[n],Filter Mode" line.long 0x04 "IFCR0,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x04 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x04 9. "DIR,Direction" "0,1" bitfld.long 0x04 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x04 0.--5. 1. "ID,Identifier" line.long 0x08 "IFCR1,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x08 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 9. "DIR,Direction" "0,1" bitfld.long 0x08 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x08 0.--5. 1. "ID,Identifier" line.long 0x0C "IFCR2,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x0C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 9. "DIR,Direction" "0,1" bitfld.long 0x0C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x0C 0.--5. 1. "ID,Identifier" line.long 0x10 "IFCR3,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x10 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "DIR,Direction" "0,1" bitfld.long 0x10 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x10 0.--5. 1. "ID,Identifier" line.long 0x14 "IFCR4,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x14 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9. "DIR,Direction" "0,1" bitfld.long 0x14 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x14 0.--5. 1. "ID,Identifier" line.long 0x18 "IFCR5,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x18 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9. "DIR,Direction" "0,1" bitfld.long 0x18 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x18 0.--5. 1. "ID,Identifier" line.long 0x1C "IFCR6,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x1C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 9. "DIR,Direction" "0,1" bitfld.long 0x1C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x1C 0.--5. 1. "ID,Identifier" line.long 0x20 "IFCR7,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x20 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x20 9. "DIR,Direction" "0,1" bitfld.long 0x20 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x20 0.--5. 1. "ID,Identifier" line.long 0x24 "IFCR8,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x24 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x24 9. "DIR,Direction" "0,1" bitfld.long 0x24 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x24 0.--5. 1. "ID,Identifier" line.long 0x28 "IFCR9,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x28 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x28 9. "DIR,Direction" "0,1" bitfld.long 0x28 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x28 0.--5. 1. "ID,Identifier" line.long 0x2C "IFCR10,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x2C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 9. "DIR,Direction" "0,1" bitfld.long 0x2C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x2C 0.--5. 1. "ID,Identifier" line.long 0x30 "IFCR11,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x30 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x30 9. "DIR,Direction" "0,1" bitfld.long 0x30 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x30 0.--5. 1. "ID,Identifier" line.long 0x34 "IFCR12,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "IFCR13,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x38 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x38 9. "DIR,Direction" "0,1" bitfld.long 0x38 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x38 0.--5. 1. "ID,Identifier" line.long 0x3C "IFCR14,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x3C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 9. "DIR,Direction" "0,1" bitfld.long 0x3C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x3C 0.--5. 1. "ID,Identifier" line.long 0x40 "IFCR15,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x40 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x40 9. "DIR,Direction" "0,1" bitfld.long 0x40 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x40 0.--5. 1. "ID,Identifier" line.long 0x44 "GCR,Global Control Register" bitfld.long 0x44 5. "TDFBM,Transmit Data First Bit MSB" "0,1" bitfld.long 0x44 4. "RDFBM,Receive Data First Bit MSB" "0,1" bitfld.long 0x44 3. "TDLIS,Transmit data level inversion selection" "0,1" bitfld.long 0x44 2. "RDLIS,Received Data Level Inversion Selection" "0,1" bitfld.long 0x44 1. "STOP,One or two Stop Bit Configuration" "0,1" bitfld.long 0x44 0. "SR,Soft Reset" "0,1" line.long 0x48 "UARTPTO,UART Preset Timeout Register" hexmask.long.word 0x48 0.--11. 1. "PTO,Preset Timeout" rgroup.long ad:0xD0080094++0x03 line.long 0x00 "UARTCTO,UART Current Timeout Register" hexmask.long.word 0x00 0.--11. 1. "CTO,Counter Timeout" group.long ad:0xD0080098++0x27 line.long 0x00 "DMATXE,DMA Tx Enable Register" bitfld.long 0x00 0. "DTE0,DMA Tx Channel 0 Enable" "0,1" line.long 0x04 "DMARXE,DMA Rx Enable Register" bitfld.long 0x04 0. "DRE0,DMA Rx Channel 0 Enable" "0,1" line.long 0x08 "SRR,Stop Request Register" bitfld.long 0x08 0. "STOPREQ,ASI Low-power Mode Enable" "0,1" line.long 0x0C "DRR,DMA_REQ Register" bitfld.long 0x0C 16. "DMATXREQ,DMA Tx Channels 0 Enable" "0,1" bitfld.long 0x0C 0. "DMARXREQ,DMA Rx Channels 0 Enable" "0,1" line.long 0x10 "TR,Trigger Register" bitfld.long 0x10 0. "TRIG,Header Transmission Trigger" "0,1" line.long 0x14 "CR0,Collision Register 0" hexmask.long.tbyte 0x14 9.--31. 1. "DCTH,Detection Collision Threshold" hexmask.long.byte 0x14 1.--8. 1. "DCS,Detection Collision Sample" bitfld.long 0x14 0. "DCENT,Detection Collision Enable" "0,1" line.long 0x18 "CR1,Collision Register 1" hexmask.long.byte 0x18 24.--31. 1. "CODCOTH,Collision Detection Comparison Threshold Value" hexmask.long.tbyte 0x18 0.--23. 1. "DFISJ,Data Frame Idle Sampling Judgment Interval" line.long 0x1C "ASTR,ASI Status Register" rbitfld.long 0x1C 6. "CDINT1CI,CDINT1 Clear Indication" "0,1" rbitfld.long 0x1C 5. "CDINT0CI,CDINT0 Clear Indication" "0,1" bitfld.long 0x1C 4. "STOPACK,Ipg Stop Ack" "0,1" bitfld.long 0x1C 3. "CDINT1,Collision Detection Interrupt 1" "0,1" bitfld.long 0x1C 2. "CDINT0,Collision Detection Interrupt 0" "0,1" bitfld.long 0x1C 1. "CDINT,Collision Detection Interrupt" "0,1" bitfld.long 0x1C 0. "AAINT,ASI All Interrupts" "0,1" line.long 0x20 "AINTENR,ASI Interrupt Enabled Register" bitfld.long 0x20 0. "AAINTEN,ASI all Interrupts Enabled" "0,1" line.long 0x24 "APBEMR,APB Bus Error Mask Register" bitfld.long 0x24 0. "APBEMP,APB Bus Error Mask Register" "0,1" tree.end tree "ASI1" group.long ad:0xD0080400++0x43 line.long 0x00 "LINCR1,LIN Control Register 1" bitfld.long 0x00 16. "NLSE,LIN State Capture Enable on Bit Error" "0,1" bitfld.long 0x00 15. "CCD,Checksum Calculation Disable" "0,1" bitfld.long 0x00 14. "CFD,Checksum Field Disable" "0,1" bitfld.long 0x00 13. "LASE,LIN Autosynchronization Enable" "0,1" bitfld.long 0x00 12. "AUTOWU,Automatic Wake-up" "0,1" bitfld.long 0x00 8.--11. "MBL,Master Break Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. "BF,Bypass Filter" "0,1" newline bitfld.long 0x00 5. "LBKM,Loop Back Mode" "0,1" bitfld.long 0x00 4. "MME,Master Mode Enable" "0,1" bitfld.long 0x00 3. "SSBL,Slave Mode Sync Break Length" "0,1" bitfld.long 0x00 2. "RBLM,Receiver Buffer Locked Mode" "0,1" bitfld.long 0x00 1. "SLEEP,Sleep Mode Request" "0,1" bitfld.long 0x00 0. "INIT,Initialization Mode Request" "0,1" line.long 0x04 "LINIER,LIN Interrupt Enable Register" bitfld.long 0x04 15. "SIZE,Stuck at Zero Interrupt Enable" "0,1" bitfld.long 0x04 14. "OCIE,Output Compare Interrupt Enable" "0,1" bitfld.long 0x04 13. "BEIE,Bit Error Interrupt Enable" "0,1" bitfld.long 0x04 12. "CEIE,Checksum Error Interrupt Enable" "0,1" bitfld.long 0x04 11. "HEIE,Header Error Interrupt Enable" "0,1" bitfld.long 0x04 8. "FEIE,Frame Error Interrupt Enable" "0,1" bitfld.long 0x04 7. "BOIE,Buffer Overrun Interrupt Enable" "0,1" newline bitfld.long 0x04 6. "LSIE,LIN State Interrupt Enable" "0,1" bitfld.long 0x04 5. "WUIE,Wakeup Interrupt Enable" "0,1" bitfld.long 0x04 3. "TOIE,Timeout Interrupt Enable" "0,1" bitfld.long 0x04 2. "DRIE,Data Reception Complete Interrupt Enable" "0,1" bitfld.long 0x04 1. "DTIE,Data Transmitted Interrupt Enable" "0,1" bitfld.long 0x04 0. "HRIE,Header Received Interrupt Enable" "0,1" line.long 0x08 "LINSR,LIN Status Register" bitfld.long 0x08 19. "AUTOSYNC_COMP,Autosynchronization Complete" "0,1" rbitfld.long 0x08 16.--18. "RDC,Receive Data Byte Count" "0,1,2,3,4,5,6,7" rbitfld.long 0x08 12.--15. "LINS,LIN State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x08 8. "DRBNE,Data Reception Buffer not Empty Flag" "0,1" rbitfld.long 0x08 7. "RXBUSY,Receiver Busy Flag" "0,1" rbitfld.long 0x08 6. "RDI,Receiver Data Input" "0,1" newline bitfld.long 0x08 5. "WUF,Wakeup Flag" "0,1" bitfld.long 0x08 2. "DRF,Data Reception Completed Flag" "0,1" bitfld.long 0x08 1. "DTF,Data transmission completed flag" "0,1" bitfld.long 0x08 0. "HRF,Header Received Flag" "0,1" line.long 0x0C "LINESR,LIN Error Status Register" bitfld.long 0x0C 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x0C 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x0C 13. "BEF,Bit Error Flag" "0,1" bitfld.long 0x0C 12. "CEF,Checksum Error Flag" "0,1" bitfld.long 0x0C 11. "SFEF,Sync Field Error Flag" "0,1" bitfld.long 0x0C 10. "SDEF,Break Delimiter Error Flag" "0,1" bitfld.long 0x0C 9. "IPDEF,ID Parity Error Flag" "0,1" newline bitfld.long 0x0C 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x0C 7. "BOF,Buffer Overrun Flag" "0,1" bitfld.long 0x0C 0. "NF,Noise Flag" "0,1" line.long 0x10 "UARTCR,UART Mode Control Register" bitfld.long 0x10 31. "MIS,Monitor Idle State" "0,1" bitfld.long 0x10 28.--30. "CSP,Configurable Sample Point (i)" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--27. "OSR,Oversampling Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 23. "ROSE,Reduced Oversampling Enable" "0,1" bitfld.long 0x10 20.--22. "NEF,Number of Expected Frames" "0,1,2,3,4,5,6,7" bitfld.long 0x10 19. "DTU,Disable Timeout in UART Mode" "0,1" bitfld.long 0x10 17.--18. "SBUR,Number of Stop Bits in UART Reception Mode" "0,1,2,3" newline bitfld.long 0x10 16. "WLS,Special Word Length in UART Mode" "0,1" bitfld.long 0x10 13.--15. "TDFL_TFC,Transmitter Data Field Length / Tx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 10.--12. "RDFL_RFC,Receiver Data Field Length/Rx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "RFBM,Rx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 8. "TFBM,Tx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 7. "WL1,Word Length in UART Mode" "0,1" bitfld.long 0x10 6. "PC1,Parity Control" "0,1" newline bitfld.long 0x10 5. "RxEn,Receiver Enable" "0,1" bitfld.long 0x10 4. "TxEn,Transmitter Enable" "0,1" bitfld.long 0x10 3. "PC0,Parity Control" "0,1" bitfld.long 0x10 2. "PCE,Parity Control Enable" "0,1" bitfld.long 0x10 1. "WL0,Word Length in UART Mode" "0,1" bitfld.long 0x10 0. "UART,UART Mode Enable" "0,1" line.long 0x14 "UARTSR,UART Mode Status Register" bitfld.long 0x14 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x14 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x14 10.--13. "PE[3:0],Parity Error Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x14 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x14 7. "BOF,FIFO/buffer Overrun Flag" "0,1" rbitfld.long 0x14 6. "RDI,Receiver data input" "0,1" newline bitfld.long 0x14 5. "WUF,Wakeup Flag" "0,1" rbitfld.long 0x14 4. "RFNE,Receive FIFO not Empty" "0,1" bitfld.long 0x14 3. "TO,Timeout" "0,1" bitfld.long 0x14 2. "DRF_RFE,Data Reception Completed flag / Rx FIFO Empty Flag" "0,1" bitfld.long 0x14 1. "DTF_TFF,Data Transmission Completed Flag / Tx FIFO Full Flag" "0,1" bitfld.long 0x14 0. "NF,Noise Flag" "0,1" line.long 0x18 "LINTCSR,LIN Timeout Control Status Register" bitfld.long 0x18 10. "MODE,Timeout Counter Mode" "0,1" bitfld.long 0x18 9. "IOT,Idle on Timeout" "0,1" bitfld.long 0x18 8. "TOCE,Timeout Counter Enable" "0,1" hexmask.long.byte 0x18 0.--7. 1. "CNT,Counter Value" line.long 0x1C "LINOCR,LIN Output Compare Register" hexmask.long.byte 0x1C 8.--15. 1. "OC2,Output Compare Value 2" hexmask.long.byte 0x1C 0.--7. 1. "OC1,Output Compare Value 1" line.long 0x20 "LINTOCR,LIN Timeout Control Register" bitfld.long 0x20 8.--11. "RTO,Response Timeout Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x20 0.--6. 1. "HTO,Header Timeout value" line.long 0x24 "LINFBRR,LIN Fractional Baud Rate Register" bitfld.long 0x24 0.--3. "FBR,Fractional Baud Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LINIBRR,LIN Integer Baud Rate Register" hexmask.long.tbyte 0x28 0.--19. 1. "IBR,Integer baud Rate" line.long 0x2C "LINCFR,LIN Checksum Field Register" hexmask.long.byte 0x2C 0.--7. 1. "CF,Checksum Bits" line.long 0x30 "LINCR2,LIN Control Register 2" bitfld.long 0x30 15. "TBDE,Two-bit Delimiter Enable" "0,1" bitfld.long 0x30 14. "IOBE,Idle on Bit Error" "0,1" bitfld.long 0x30 13. "IOPE,Idle on Identifier Parity Error" "0,1" bitfld.long 0x30 12. "WURQ,Wakeup Generate Request" "0,1" bitfld.long 0x30 11. "DDRQ,Data Discard Request" "0,1" bitfld.long 0x30 10. "DTRQ,Data Transmission Request" "0,1" bitfld.long 0x30 9. "ABRQ,Abort Request" "0,1" newline bitfld.long 0x30 8. "HTRQ,Header Transmission Request" "0,1" line.long 0x34 "BIDR,Buffer Identifier Register" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "BDRL,Buffer Data Register Least Significant" hexmask.long.byte 0x38 24.--31. 1. "DATA3,Data Byte 3" hexmask.long.byte 0x38 16.--23. 1. "DATA2,Data Byte 2" hexmask.long.byte 0x38 8.--15. 1. "DATA1,Data Byte 1" hexmask.long.byte 0x38 0.--7. 1. "DATA0,Data Byte 0" line.long 0x3C "BDRM,Buffer Data Register Most Significant" hexmask.long.byte 0x3C 24.--31. 1. "DATA7,Data Byte 7" hexmask.long.byte 0x3C 16.--23. 1. "DATA6,Data Byte 6" hexmask.long.byte 0x3C 8.--15. 1. "DATA5,Data Byte 5" hexmask.long.byte 0x3C 0.--7. 1. "DATA4,Data Byte 4" line.long 0x40 "IFER,Identifier Filter Enable Register" hexmask.long.word 0x40 0.--15. 1. "FACT[x],Filter Active ? one bit for each identifier filter" rgroup.long ad:0xD0080444++0x03 line.long 0x00 "IFMI,Identifier Filter Match Index" bitfld.long 0x00 0.--4. "IFMI,Filter Match Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD0080448++0x4B line.long 0x00 "IFMR,Identifier Filter Mode Register" hexmask.long.byte 0x00 0.--7. 1. "IFM[n],Filter Mode" line.long 0x04 "IFCR0,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x04 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x04 9. "DIR,Direction" "0,1" bitfld.long 0x04 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x04 0.--5. 1. "ID,Identifier" line.long 0x08 "IFCR1,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x08 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 9. "DIR,Direction" "0,1" bitfld.long 0x08 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x08 0.--5. 1. "ID,Identifier" line.long 0x0C "IFCR2,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x0C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 9. "DIR,Direction" "0,1" bitfld.long 0x0C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x0C 0.--5. 1. "ID,Identifier" line.long 0x10 "IFCR3,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x10 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "DIR,Direction" "0,1" bitfld.long 0x10 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x10 0.--5. 1. "ID,Identifier" line.long 0x14 "IFCR4,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x14 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9. "DIR,Direction" "0,1" bitfld.long 0x14 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x14 0.--5. 1. "ID,Identifier" line.long 0x18 "IFCR5,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x18 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9. "DIR,Direction" "0,1" bitfld.long 0x18 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x18 0.--5. 1. "ID,Identifier" line.long 0x1C "IFCR6,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x1C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 9. "DIR,Direction" "0,1" bitfld.long 0x1C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x1C 0.--5. 1. "ID,Identifier" line.long 0x20 "IFCR7,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x20 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x20 9. "DIR,Direction" "0,1" bitfld.long 0x20 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x20 0.--5. 1. "ID,Identifier" line.long 0x24 "IFCR8,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x24 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x24 9. "DIR,Direction" "0,1" bitfld.long 0x24 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x24 0.--5. 1. "ID,Identifier" line.long 0x28 "IFCR9,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x28 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x28 9. "DIR,Direction" "0,1" bitfld.long 0x28 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x28 0.--5. 1. "ID,Identifier" line.long 0x2C "IFCR10,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x2C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 9. "DIR,Direction" "0,1" bitfld.long 0x2C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x2C 0.--5. 1. "ID,Identifier" line.long 0x30 "IFCR11,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x30 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x30 9. "DIR,Direction" "0,1" bitfld.long 0x30 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x30 0.--5. 1. "ID,Identifier" line.long 0x34 "IFCR12,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "IFCR13,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x38 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x38 9. "DIR,Direction" "0,1" bitfld.long 0x38 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x38 0.--5. 1. "ID,Identifier" line.long 0x3C "IFCR14,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x3C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 9. "DIR,Direction" "0,1" bitfld.long 0x3C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x3C 0.--5. 1. "ID,Identifier" line.long 0x40 "IFCR15,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x40 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x40 9. "DIR,Direction" "0,1" bitfld.long 0x40 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x40 0.--5. 1. "ID,Identifier" line.long 0x44 "GCR,Global Control Register" bitfld.long 0x44 5. "TDFBM,Transmit Data First Bit MSB" "0,1" bitfld.long 0x44 4. "RDFBM,Receive Data First Bit MSB" "0,1" bitfld.long 0x44 3. "TDLIS,Transmit data level inversion selection" "0,1" bitfld.long 0x44 2. "RDLIS,Received Data Level Inversion Selection" "0,1" bitfld.long 0x44 1. "STOP,One or two Stop Bit Configuration" "0,1" bitfld.long 0x44 0. "SR,Soft Reset" "0,1" line.long 0x48 "UARTPTO,UART Preset Timeout Register" hexmask.long.word 0x48 0.--11. 1. "PTO,Preset Timeout" rgroup.long ad:0xD0080494++0x03 line.long 0x00 "UARTCTO,UART Current Timeout Register" hexmask.long.word 0x00 0.--11. 1. "CTO,Counter Timeout" group.long ad:0xD0080498++0x27 line.long 0x00 "DMATXE,DMA Tx Enable Register" bitfld.long 0x00 0. "DTE0,DMA Tx Channel 0 Enable" "0,1" line.long 0x04 "DMARXE,DMA Rx Enable Register" bitfld.long 0x04 0. "DRE0,DMA Rx Channel 0 Enable" "0,1" line.long 0x08 "SRR,Stop Request Register" bitfld.long 0x08 0. "STOPREQ,ASI Low-power Mode Enable" "0,1" line.long 0x0C "DRR,DMA_REQ Register" bitfld.long 0x0C 16. "DMATXREQ,DMA Tx Channels 0 Enable" "0,1" bitfld.long 0x0C 0. "DMARXREQ,DMA Rx Channels 0 Enable" "0,1" line.long 0x10 "TR,Trigger Register" bitfld.long 0x10 0. "TRIG,Header Transmission Trigger" "0,1" line.long 0x14 "CR0,Collision Register 0" hexmask.long.tbyte 0x14 9.--31. 1. "DCTH,Detection Collision Threshold" hexmask.long.byte 0x14 1.--8. 1. "DCS,Detection Collision Sample" bitfld.long 0x14 0. "DCENT,Detection Collision Enable" "0,1" line.long 0x18 "CR1,Collision Register 1" hexmask.long.byte 0x18 24.--31. 1. "CODCOTH,Collision Detection Comparison Threshold Value" hexmask.long.tbyte 0x18 0.--23. 1. "DFISJ,Data Frame Idle Sampling Judgment Interval" line.long 0x1C "ASTR,ASI Status Register" rbitfld.long 0x1C 6. "CDINT1CI,CDINT1 Clear Indication" "0,1" rbitfld.long 0x1C 5. "CDINT0CI,CDINT0 Clear Indication" "0,1" bitfld.long 0x1C 4. "STOPACK,Ipg Stop Ack" "0,1" bitfld.long 0x1C 3. "CDINT1,Collision Detection Interrupt 1" "0,1" bitfld.long 0x1C 2. "CDINT0,Collision Detection Interrupt 0" "0,1" bitfld.long 0x1C 1. "CDINT,Collision Detection Interrupt" "0,1" bitfld.long 0x1C 0. "AAINT,ASI All Interrupts" "0,1" line.long 0x20 "AINTENR,ASI Interrupt Enabled Register" bitfld.long 0x20 0. "AAINTEN,ASI all Interrupts Enabled" "0,1" line.long 0x24 "APBEMR,APB Bus Error Mask Register" bitfld.long 0x24 0. "APBEMP,APB Bus Error Mask Register" "0,1" tree.end tree "ASI2" group.long ad:0xD0080800++0x43 line.long 0x00 "LINCR1,LIN Control Register 1" bitfld.long 0x00 16. "NLSE,LIN State Capture Enable on Bit Error" "0,1" bitfld.long 0x00 15. "CCD,Checksum Calculation Disable" "0,1" bitfld.long 0x00 14. "CFD,Checksum Field Disable" "0,1" bitfld.long 0x00 13. "LASE,LIN Autosynchronization Enable" "0,1" bitfld.long 0x00 12. "AUTOWU,Automatic Wake-up" "0,1" bitfld.long 0x00 8.--11. "MBL,Master Break Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. "BF,Bypass Filter" "0,1" newline bitfld.long 0x00 5. "LBKM,Loop Back Mode" "0,1" bitfld.long 0x00 4. "MME,Master Mode Enable" "0,1" bitfld.long 0x00 3. "SSBL,Slave Mode Sync Break Length" "0,1" bitfld.long 0x00 2. "RBLM,Receiver Buffer Locked Mode" "0,1" bitfld.long 0x00 1. "SLEEP,Sleep Mode Request" "0,1" bitfld.long 0x00 0. "INIT,Initialization Mode Request" "0,1" line.long 0x04 "LINIER,LIN Interrupt Enable Register" bitfld.long 0x04 15. "SIZE,Stuck at Zero Interrupt Enable" "0,1" bitfld.long 0x04 14. "OCIE,Output Compare Interrupt Enable" "0,1" bitfld.long 0x04 13. "BEIE,Bit Error Interrupt Enable" "0,1" bitfld.long 0x04 12. "CEIE,Checksum Error Interrupt Enable" "0,1" bitfld.long 0x04 11. "HEIE,Header Error Interrupt Enable" "0,1" bitfld.long 0x04 8. "FEIE,Frame Error Interrupt Enable" "0,1" bitfld.long 0x04 7. "BOIE,Buffer Overrun Interrupt Enable" "0,1" newline bitfld.long 0x04 6. "LSIE,LIN State Interrupt Enable" "0,1" bitfld.long 0x04 5. "WUIE,Wakeup Interrupt Enable" "0,1" bitfld.long 0x04 3. "TOIE,Timeout Interrupt Enable" "0,1" bitfld.long 0x04 2. "DRIE,Data Reception Complete Interrupt Enable" "0,1" bitfld.long 0x04 1. "DTIE,Data Transmitted Interrupt Enable" "0,1" bitfld.long 0x04 0. "HRIE,Header Received Interrupt Enable" "0,1" line.long 0x08 "LINSR,LIN Status Register" bitfld.long 0x08 19. "AUTOSYNC_COMP,Autosynchronization Complete" "0,1" rbitfld.long 0x08 16.--18. "RDC,Receive Data Byte Count" "0,1,2,3,4,5,6,7" rbitfld.long 0x08 12.--15. "LINS,LIN State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x08 8. "DRBNE,Data Reception Buffer not Empty Flag" "0,1" rbitfld.long 0x08 7. "RXBUSY,Receiver Busy Flag" "0,1" rbitfld.long 0x08 6. "RDI,Receiver Data Input" "0,1" newline bitfld.long 0x08 5. "WUF,Wakeup Flag" "0,1" bitfld.long 0x08 2. "DRF,Data Reception Completed Flag" "0,1" bitfld.long 0x08 1. "DTF,Data transmission completed flag" "0,1" bitfld.long 0x08 0. "HRF,Header Received Flag" "0,1" line.long 0x0C "LINESR,LIN Error Status Register" bitfld.long 0x0C 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x0C 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x0C 13. "BEF,Bit Error Flag" "0,1" bitfld.long 0x0C 12. "CEF,Checksum Error Flag" "0,1" bitfld.long 0x0C 11. "SFEF,Sync Field Error Flag" "0,1" bitfld.long 0x0C 10. "SDEF,Break Delimiter Error Flag" "0,1" bitfld.long 0x0C 9. "IPDEF,ID Parity Error Flag" "0,1" newline bitfld.long 0x0C 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x0C 7. "BOF,Buffer Overrun Flag" "0,1" bitfld.long 0x0C 0. "NF,Noise Flag" "0,1" line.long 0x10 "UARTCR,UART Mode Control Register" bitfld.long 0x10 31. "MIS,Monitor Idle State" "0,1" bitfld.long 0x10 28.--30. "CSP,Configurable Sample Point (i)" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--27. "OSR,Oversampling Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 23. "ROSE,Reduced Oversampling Enable" "0,1" bitfld.long 0x10 20.--22. "NEF,Number of Expected Frames" "0,1,2,3,4,5,6,7" bitfld.long 0x10 19. "DTU,Disable Timeout in UART Mode" "0,1" bitfld.long 0x10 17.--18. "SBUR,Number of Stop Bits in UART Reception Mode" "0,1,2,3" newline bitfld.long 0x10 16. "WLS,Special Word Length in UART Mode" "0,1" bitfld.long 0x10 13.--15. "TDFL_TFC,Transmitter Data Field Length / Tx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 10.--12. "RDFL_RFC,Receiver Data Field Length/Rx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "RFBM,Rx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 8. "TFBM,Tx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 7. "WL1,Word Length in UART Mode" "0,1" bitfld.long 0x10 6. "PC1,Parity Control" "0,1" newline bitfld.long 0x10 5. "RxEn,Receiver Enable" "0,1" bitfld.long 0x10 4. "TxEn,Transmitter Enable" "0,1" bitfld.long 0x10 3. "PC0,Parity Control" "0,1" bitfld.long 0x10 2. "PCE,Parity Control Enable" "0,1" bitfld.long 0x10 1. "WL0,Word Length in UART Mode" "0,1" bitfld.long 0x10 0. "UART,UART Mode Enable" "0,1" line.long 0x14 "UARTSR,UART Mode Status Register" bitfld.long 0x14 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x14 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x14 10.--13. "PE[3:0],Parity Error Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x14 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x14 7. "BOF,FIFO/buffer Overrun Flag" "0,1" rbitfld.long 0x14 6. "RDI,Receiver data input" "0,1" newline bitfld.long 0x14 5. "WUF,Wakeup Flag" "0,1" rbitfld.long 0x14 4. "RFNE,Receive FIFO not Empty" "0,1" bitfld.long 0x14 3. "TO,Timeout" "0,1" bitfld.long 0x14 2. "DRF_RFE,Data Reception Completed flag / Rx FIFO Empty Flag" "0,1" bitfld.long 0x14 1. "DTF_TFF,Data Transmission Completed Flag / Tx FIFO Full Flag" "0,1" bitfld.long 0x14 0. "NF,Noise Flag" "0,1" line.long 0x18 "LINTCSR,LIN Timeout Control Status Register" bitfld.long 0x18 10. "MODE,Timeout Counter Mode" "0,1" bitfld.long 0x18 9. "IOT,Idle on Timeout" "0,1" bitfld.long 0x18 8. "TOCE,Timeout Counter Enable" "0,1" hexmask.long.byte 0x18 0.--7. 1. "CNT,Counter Value" line.long 0x1C "LINOCR,LIN Output Compare Register" hexmask.long.byte 0x1C 8.--15. 1. "OC2,Output Compare Value 2" hexmask.long.byte 0x1C 0.--7. 1. "OC1,Output Compare Value 1" line.long 0x20 "LINTOCR,LIN Timeout Control Register" bitfld.long 0x20 8.--11. "RTO,Response Timeout Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x20 0.--6. 1. "HTO,Header Timeout value" line.long 0x24 "LINFBRR,LIN Fractional Baud Rate Register" bitfld.long 0x24 0.--3. "FBR,Fractional Baud Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LINIBRR,LIN Integer Baud Rate Register" hexmask.long.tbyte 0x28 0.--19. 1. "IBR,Integer baud Rate" line.long 0x2C "LINCFR,LIN Checksum Field Register" hexmask.long.byte 0x2C 0.--7. 1. "CF,Checksum Bits" line.long 0x30 "LINCR2,LIN Control Register 2" bitfld.long 0x30 15. "TBDE,Two-bit Delimiter Enable" "0,1" bitfld.long 0x30 14. "IOBE,Idle on Bit Error" "0,1" bitfld.long 0x30 13. "IOPE,Idle on Identifier Parity Error" "0,1" bitfld.long 0x30 12. "WURQ,Wakeup Generate Request" "0,1" bitfld.long 0x30 11. "DDRQ,Data Discard Request" "0,1" bitfld.long 0x30 10. "DTRQ,Data Transmission Request" "0,1" bitfld.long 0x30 9. "ABRQ,Abort Request" "0,1" newline bitfld.long 0x30 8. "HTRQ,Header Transmission Request" "0,1" line.long 0x34 "BIDR,Buffer Identifier Register" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "BDRL,Buffer Data Register Least Significant" hexmask.long.byte 0x38 24.--31. 1. "DATA3,Data Byte 3" hexmask.long.byte 0x38 16.--23. 1. "DATA2,Data Byte 2" hexmask.long.byte 0x38 8.--15. 1. "DATA1,Data Byte 1" hexmask.long.byte 0x38 0.--7. 1. "DATA0,Data Byte 0" line.long 0x3C "BDRM,Buffer Data Register Most Significant" hexmask.long.byte 0x3C 24.--31. 1. "DATA7,Data Byte 7" hexmask.long.byte 0x3C 16.--23. 1. "DATA6,Data Byte 6" hexmask.long.byte 0x3C 8.--15. 1. "DATA5,Data Byte 5" hexmask.long.byte 0x3C 0.--7. 1. "DATA4,Data Byte 4" line.long 0x40 "IFER,Identifier Filter Enable Register" hexmask.long.word 0x40 0.--15. 1. "FACT[x],Filter Active ? one bit for each identifier filter" rgroup.long ad:0xD0080844++0x03 line.long 0x00 "IFMI,Identifier Filter Match Index" bitfld.long 0x00 0.--4. "IFMI,Filter Match Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD0080848++0x4B line.long 0x00 "IFMR,Identifier Filter Mode Register" hexmask.long.byte 0x00 0.--7. 1. "IFM[n],Filter Mode" line.long 0x04 "IFCR0,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x04 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x04 9. "DIR,Direction" "0,1" bitfld.long 0x04 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x04 0.--5. 1. "ID,Identifier" line.long 0x08 "IFCR1,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x08 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 9. "DIR,Direction" "0,1" bitfld.long 0x08 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x08 0.--5. 1. "ID,Identifier" line.long 0x0C "IFCR2,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x0C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 9. "DIR,Direction" "0,1" bitfld.long 0x0C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x0C 0.--5. 1. "ID,Identifier" line.long 0x10 "IFCR3,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x10 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "DIR,Direction" "0,1" bitfld.long 0x10 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x10 0.--5. 1. "ID,Identifier" line.long 0x14 "IFCR4,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x14 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9. "DIR,Direction" "0,1" bitfld.long 0x14 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x14 0.--5. 1. "ID,Identifier" line.long 0x18 "IFCR5,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x18 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9. "DIR,Direction" "0,1" bitfld.long 0x18 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x18 0.--5. 1. "ID,Identifier" line.long 0x1C "IFCR6,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x1C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 9. "DIR,Direction" "0,1" bitfld.long 0x1C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x1C 0.--5. 1. "ID,Identifier" line.long 0x20 "IFCR7,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x20 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x20 9. "DIR,Direction" "0,1" bitfld.long 0x20 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x20 0.--5. 1. "ID,Identifier" line.long 0x24 "IFCR8,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x24 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x24 9. "DIR,Direction" "0,1" bitfld.long 0x24 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x24 0.--5. 1. "ID,Identifier" line.long 0x28 "IFCR9,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x28 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x28 9. "DIR,Direction" "0,1" bitfld.long 0x28 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x28 0.--5. 1. "ID,Identifier" line.long 0x2C "IFCR10,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x2C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 9. "DIR,Direction" "0,1" bitfld.long 0x2C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x2C 0.--5. 1. "ID,Identifier" line.long 0x30 "IFCR11,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x30 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x30 9. "DIR,Direction" "0,1" bitfld.long 0x30 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x30 0.--5. 1. "ID,Identifier" line.long 0x34 "IFCR12,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "IFCR13,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x38 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x38 9. "DIR,Direction" "0,1" bitfld.long 0x38 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x38 0.--5. 1. "ID,Identifier" line.long 0x3C "IFCR14,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x3C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 9. "DIR,Direction" "0,1" bitfld.long 0x3C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x3C 0.--5. 1. "ID,Identifier" line.long 0x40 "IFCR15,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x40 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x40 9. "DIR,Direction" "0,1" bitfld.long 0x40 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x40 0.--5. 1. "ID,Identifier" line.long 0x44 "GCR,Global Control Register" bitfld.long 0x44 5. "TDFBM,Transmit Data First Bit MSB" "0,1" bitfld.long 0x44 4. "RDFBM,Receive Data First Bit MSB" "0,1" bitfld.long 0x44 3. "TDLIS,Transmit data level inversion selection" "0,1" bitfld.long 0x44 2. "RDLIS,Received Data Level Inversion Selection" "0,1" bitfld.long 0x44 1. "STOP,One or two Stop Bit Configuration" "0,1" bitfld.long 0x44 0. "SR,Soft Reset" "0,1" line.long 0x48 "UARTPTO,UART Preset Timeout Register" hexmask.long.word 0x48 0.--11. 1. "PTO,Preset Timeout" rgroup.long ad:0xD0080894++0x03 line.long 0x00 "UARTCTO,UART Current Timeout Register" hexmask.long.word 0x00 0.--11. 1. "CTO,Counter Timeout" group.long ad:0xD0080898++0x27 line.long 0x00 "DMATXE,DMA Tx Enable Register" bitfld.long 0x00 0. "DTE0,DMA Tx Channel 0 Enable" "0,1" line.long 0x04 "DMARXE,DMA Rx Enable Register" bitfld.long 0x04 0. "DRE0,DMA Rx Channel 0 Enable" "0,1" line.long 0x08 "SRR,Stop Request Register" bitfld.long 0x08 0. "STOPREQ,ASI Low-power Mode Enable" "0,1" line.long 0x0C "DRR,DMA_REQ Register" bitfld.long 0x0C 16. "DMATXREQ,DMA Tx Channels 0 Enable" "0,1" bitfld.long 0x0C 0. "DMARXREQ,DMA Rx Channels 0 Enable" "0,1" line.long 0x10 "TR,Trigger Register" bitfld.long 0x10 0. "TRIG,Header Transmission Trigger" "0,1" line.long 0x14 "CR0,Collision Register 0" hexmask.long.tbyte 0x14 9.--31. 1. "DCTH,Detection Collision Threshold" hexmask.long.byte 0x14 1.--8. 1. "DCS,Detection Collision Sample" bitfld.long 0x14 0. "DCENT,Detection Collision Enable" "0,1" line.long 0x18 "CR1,Collision Register 1" hexmask.long.byte 0x18 24.--31. 1. "CODCOTH,Collision Detection Comparison Threshold Value" hexmask.long.tbyte 0x18 0.--23. 1. "DFISJ,Data Frame Idle Sampling Judgment Interval" line.long 0x1C "ASTR,ASI Status Register" rbitfld.long 0x1C 6. "CDINT1CI,CDINT1 Clear Indication" "0,1" rbitfld.long 0x1C 5. "CDINT0CI,CDINT0 Clear Indication" "0,1" bitfld.long 0x1C 4. "STOPACK,Ipg Stop Ack" "0,1" bitfld.long 0x1C 3. "CDINT1,Collision Detection Interrupt 1" "0,1" bitfld.long 0x1C 2. "CDINT0,Collision Detection Interrupt 0" "0,1" bitfld.long 0x1C 1. "CDINT,Collision Detection Interrupt" "0,1" bitfld.long 0x1C 0. "AAINT,ASI All Interrupts" "0,1" line.long 0x20 "AINTENR,ASI Interrupt Enabled Register" bitfld.long 0x20 0. "AAINTEN,ASI all Interrupts Enabled" "0,1" line.long 0x24 "APBEMR,APB Bus Error Mask Register" bitfld.long 0x24 0. "APBEMP,APB Bus Error Mask Register" "0,1" tree.end tree "ASI3" group.long ad:0xD0080C00++0x43 line.long 0x00 "LINCR1,LIN Control Register 1" bitfld.long 0x00 16. "NLSE,LIN State Capture Enable on Bit Error" "0,1" bitfld.long 0x00 15. "CCD,Checksum Calculation Disable" "0,1" bitfld.long 0x00 14. "CFD,Checksum Field Disable" "0,1" bitfld.long 0x00 13. "LASE,LIN Autosynchronization Enable" "0,1" bitfld.long 0x00 12. "AUTOWU,Automatic Wake-up" "0,1" bitfld.long 0x00 8.--11. "MBL,Master Break Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. "BF,Bypass Filter" "0,1" newline bitfld.long 0x00 5. "LBKM,Loop Back Mode" "0,1" bitfld.long 0x00 4. "MME,Master Mode Enable" "0,1" bitfld.long 0x00 3. "SSBL,Slave Mode Sync Break Length" "0,1" bitfld.long 0x00 2. "RBLM,Receiver Buffer Locked Mode" "0,1" bitfld.long 0x00 1. "SLEEP,Sleep Mode Request" "0,1" bitfld.long 0x00 0. "INIT,Initialization Mode Request" "0,1" line.long 0x04 "LINIER,LIN Interrupt Enable Register" bitfld.long 0x04 15. "SIZE,Stuck at Zero Interrupt Enable" "0,1" bitfld.long 0x04 14. "OCIE,Output Compare Interrupt Enable" "0,1" bitfld.long 0x04 13. "BEIE,Bit Error Interrupt Enable" "0,1" bitfld.long 0x04 12. "CEIE,Checksum Error Interrupt Enable" "0,1" bitfld.long 0x04 11. "HEIE,Header Error Interrupt Enable" "0,1" bitfld.long 0x04 8. "FEIE,Frame Error Interrupt Enable" "0,1" bitfld.long 0x04 7. "BOIE,Buffer Overrun Interrupt Enable" "0,1" newline bitfld.long 0x04 6. "LSIE,LIN State Interrupt Enable" "0,1" bitfld.long 0x04 5. "WUIE,Wakeup Interrupt Enable" "0,1" bitfld.long 0x04 3. "TOIE,Timeout Interrupt Enable" "0,1" bitfld.long 0x04 2. "DRIE,Data Reception Complete Interrupt Enable" "0,1" bitfld.long 0x04 1. "DTIE,Data Transmitted Interrupt Enable" "0,1" bitfld.long 0x04 0. "HRIE,Header Received Interrupt Enable" "0,1" line.long 0x08 "LINSR,LIN Status Register" bitfld.long 0x08 19. "AUTOSYNC_COMP,Autosynchronization Complete" "0,1" rbitfld.long 0x08 16.--18. "RDC,Receive Data Byte Count" "0,1,2,3,4,5,6,7" rbitfld.long 0x08 12.--15. "LINS,LIN State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x08 8. "DRBNE,Data Reception Buffer not Empty Flag" "0,1" rbitfld.long 0x08 7. "RXBUSY,Receiver Busy Flag" "0,1" rbitfld.long 0x08 6. "RDI,Receiver Data Input" "0,1" newline bitfld.long 0x08 5. "WUF,Wakeup Flag" "0,1" bitfld.long 0x08 2. "DRF,Data Reception Completed Flag" "0,1" bitfld.long 0x08 1. "DTF,Data transmission completed flag" "0,1" bitfld.long 0x08 0. "HRF,Header Received Flag" "0,1" line.long 0x0C "LINESR,LIN Error Status Register" bitfld.long 0x0C 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x0C 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x0C 13. "BEF,Bit Error Flag" "0,1" bitfld.long 0x0C 12. "CEF,Checksum Error Flag" "0,1" bitfld.long 0x0C 11. "SFEF,Sync Field Error Flag" "0,1" bitfld.long 0x0C 10. "SDEF,Break Delimiter Error Flag" "0,1" bitfld.long 0x0C 9. "IPDEF,ID Parity Error Flag" "0,1" newline bitfld.long 0x0C 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x0C 7. "BOF,Buffer Overrun Flag" "0,1" bitfld.long 0x0C 0. "NF,Noise Flag" "0,1" line.long 0x10 "UARTCR,UART Mode Control Register" bitfld.long 0x10 31. "MIS,Monitor Idle State" "0,1" bitfld.long 0x10 28.--30. "CSP,Configurable Sample Point (i)" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--27. "OSR,Oversampling Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 23. "ROSE,Reduced Oversampling Enable" "0,1" bitfld.long 0x10 20.--22. "NEF,Number of Expected Frames" "0,1,2,3,4,5,6,7" bitfld.long 0x10 19. "DTU,Disable Timeout in UART Mode" "0,1" bitfld.long 0x10 17.--18. "SBUR,Number of Stop Bits in UART Reception Mode" "0,1,2,3" newline bitfld.long 0x10 16. "WLS,Special Word Length in UART Mode" "0,1" bitfld.long 0x10 13.--15. "TDFL_TFC,Transmitter Data Field Length / Tx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 10.--12. "RDFL_RFC,Receiver Data Field Length/Rx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "RFBM,Rx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 8. "TFBM,Tx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 7. "WL1,Word Length in UART Mode" "0,1" bitfld.long 0x10 6. "PC1,Parity Control" "0,1" newline bitfld.long 0x10 5. "RxEn,Receiver Enable" "0,1" bitfld.long 0x10 4. "TxEn,Transmitter Enable" "0,1" bitfld.long 0x10 3. "PC0,Parity Control" "0,1" bitfld.long 0x10 2. "PCE,Parity Control Enable" "0,1" bitfld.long 0x10 1. "WL0,Word Length in UART Mode" "0,1" bitfld.long 0x10 0. "UART,UART Mode Enable" "0,1" line.long 0x14 "UARTSR,UART Mode Status Register" bitfld.long 0x14 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x14 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x14 10.--13. "PE[3:0],Parity Error Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x14 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x14 7. "BOF,FIFO/buffer Overrun Flag" "0,1" rbitfld.long 0x14 6. "RDI,Receiver data input" "0,1" newline bitfld.long 0x14 5. "WUF,Wakeup Flag" "0,1" rbitfld.long 0x14 4. "RFNE,Receive FIFO not Empty" "0,1" bitfld.long 0x14 3. "TO,Timeout" "0,1" bitfld.long 0x14 2. "DRF_RFE,Data Reception Completed flag / Rx FIFO Empty Flag" "0,1" bitfld.long 0x14 1. "DTF_TFF,Data Transmission Completed Flag / Tx FIFO Full Flag" "0,1" bitfld.long 0x14 0. "NF,Noise Flag" "0,1" line.long 0x18 "LINTCSR,LIN Timeout Control Status Register" bitfld.long 0x18 10. "MODE,Timeout Counter Mode" "0,1" bitfld.long 0x18 9. "IOT,Idle on Timeout" "0,1" bitfld.long 0x18 8. "TOCE,Timeout Counter Enable" "0,1" hexmask.long.byte 0x18 0.--7. 1. "CNT,Counter Value" line.long 0x1C "LINOCR,LIN Output Compare Register" hexmask.long.byte 0x1C 8.--15. 1. "OC2,Output Compare Value 2" hexmask.long.byte 0x1C 0.--7. 1. "OC1,Output Compare Value 1" line.long 0x20 "LINTOCR,LIN Timeout Control Register" bitfld.long 0x20 8.--11. "RTO,Response Timeout Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x20 0.--6. 1. "HTO,Header Timeout value" line.long 0x24 "LINFBRR,LIN Fractional Baud Rate Register" bitfld.long 0x24 0.--3. "FBR,Fractional Baud Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LINIBRR,LIN Integer Baud Rate Register" hexmask.long.tbyte 0x28 0.--19. 1. "IBR,Integer baud Rate" line.long 0x2C "LINCFR,LIN Checksum Field Register" hexmask.long.byte 0x2C 0.--7. 1. "CF,Checksum Bits" line.long 0x30 "LINCR2,LIN Control Register 2" bitfld.long 0x30 15. "TBDE,Two-bit Delimiter Enable" "0,1" bitfld.long 0x30 14. "IOBE,Idle on Bit Error" "0,1" bitfld.long 0x30 13. "IOPE,Idle on Identifier Parity Error" "0,1" bitfld.long 0x30 12. "WURQ,Wakeup Generate Request" "0,1" bitfld.long 0x30 11. "DDRQ,Data Discard Request" "0,1" bitfld.long 0x30 10. "DTRQ,Data Transmission Request" "0,1" bitfld.long 0x30 9. "ABRQ,Abort Request" "0,1" newline bitfld.long 0x30 8. "HTRQ,Header Transmission Request" "0,1" line.long 0x34 "BIDR,Buffer Identifier Register" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "BDRL,Buffer Data Register Least Significant" hexmask.long.byte 0x38 24.--31. 1. "DATA3,Data Byte 3" hexmask.long.byte 0x38 16.--23. 1. "DATA2,Data Byte 2" hexmask.long.byte 0x38 8.--15. 1. "DATA1,Data Byte 1" hexmask.long.byte 0x38 0.--7. 1. "DATA0,Data Byte 0" line.long 0x3C "BDRM,Buffer Data Register Most Significant" hexmask.long.byte 0x3C 24.--31. 1. "DATA7,Data Byte 7" hexmask.long.byte 0x3C 16.--23. 1. "DATA6,Data Byte 6" hexmask.long.byte 0x3C 8.--15. 1. "DATA5,Data Byte 5" hexmask.long.byte 0x3C 0.--7. 1. "DATA4,Data Byte 4" line.long 0x40 "IFER,Identifier Filter Enable Register" hexmask.long.word 0x40 0.--15. 1. "FACT[x],Filter Active ? one bit for each identifier filter" rgroup.long ad:0xD0080C44++0x03 line.long 0x00 "IFMI,Identifier Filter Match Index" bitfld.long 0x00 0.--4. "IFMI,Filter Match Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD0080C48++0x4B line.long 0x00 "IFMR,Identifier Filter Mode Register" hexmask.long.byte 0x00 0.--7. 1. "IFM[n],Filter Mode" line.long 0x04 "IFCR0,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x04 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x04 9. "DIR,Direction" "0,1" bitfld.long 0x04 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x04 0.--5. 1. "ID,Identifier" line.long 0x08 "IFCR1,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x08 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 9. "DIR,Direction" "0,1" bitfld.long 0x08 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x08 0.--5. 1. "ID,Identifier" line.long 0x0C "IFCR2,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x0C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 9. "DIR,Direction" "0,1" bitfld.long 0x0C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x0C 0.--5. 1. "ID,Identifier" line.long 0x10 "IFCR3,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x10 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "DIR,Direction" "0,1" bitfld.long 0x10 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x10 0.--5. 1. "ID,Identifier" line.long 0x14 "IFCR4,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x14 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9. "DIR,Direction" "0,1" bitfld.long 0x14 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x14 0.--5. 1. "ID,Identifier" line.long 0x18 "IFCR5,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x18 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9. "DIR,Direction" "0,1" bitfld.long 0x18 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x18 0.--5. 1. "ID,Identifier" line.long 0x1C "IFCR6,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x1C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 9. "DIR,Direction" "0,1" bitfld.long 0x1C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x1C 0.--5. 1. "ID,Identifier" line.long 0x20 "IFCR7,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x20 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x20 9. "DIR,Direction" "0,1" bitfld.long 0x20 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x20 0.--5. 1. "ID,Identifier" line.long 0x24 "IFCR8,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x24 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x24 9. "DIR,Direction" "0,1" bitfld.long 0x24 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x24 0.--5. 1. "ID,Identifier" line.long 0x28 "IFCR9,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x28 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x28 9. "DIR,Direction" "0,1" bitfld.long 0x28 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x28 0.--5. 1. "ID,Identifier" line.long 0x2C "IFCR10,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x2C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 9. "DIR,Direction" "0,1" bitfld.long 0x2C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x2C 0.--5. 1. "ID,Identifier" line.long 0x30 "IFCR11,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x30 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x30 9. "DIR,Direction" "0,1" bitfld.long 0x30 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x30 0.--5. 1. "ID,Identifier" line.long 0x34 "IFCR12,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "IFCR13,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x38 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x38 9. "DIR,Direction" "0,1" bitfld.long 0x38 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x38 0.--5. 1. "ID,Identifier" line.long 0x3C "IFCR14,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x3C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 9. "DIR,Direction" "0,1" bitfld.long 0x3C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x3C 0.--5. 1. "ID,Identifier" line.long 0x40 "IFCR15,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x40 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x40 9. "DIR,Direction" "0,1" bitfld.long 0x40 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x40 0.--5. 1. "ID,Identifier" line.long 0x44 "GCR,Global Control Register" bitfld.long 0x44 5. "TDFBM,Transmit Data First Bit MSB" "0,1" bitfld.long 0x44 4. "RDFBM,Receive Data First Bit MSB" "0,1" bitfld.long 0x44 3. "TDLIS,Transmit data level inversion selection" "0,1" bitfld.long 0x44 2. "RDLIS,Received Data Level Inversion Selection" "0,1" bitfld.long 0x44 1. "STOP,One or two Stop Bit Configuration" "0,1" bitfld.long 0x44 0. "SR,Soft Reset" "0,1" line.long 0x48 "UARTPTO,UART Preset Timeout Register" hexmask.long.word 0x48 0.--11. 1. "PTO,Preset Timeout" rgroup.long ad:0xD0080C94++0x03 line.long 0x00 "UARTCTO,UART Current Timeout Register" hexmask.long.word 0x00 0.--11. 1. "CTO,Counter Timeout" group.long ad:0xD0080C98++0x27 line.long 0x00 "DMATXE,DMA Tx Enable Register" bitfld.long 0x00 0. "DTE0,DMA Tx Channel 0 Enable" "0,1" line.long 0x04 "DMARXE,DMA Rx Enable Register" bitfld.long 0x04 0. "DRE0,DMA Rx Channel 0 Enable" "0,1" line.long 0x08 "SRR,Stop Request Register" bitfld.long 0x08 0. "STOPREQ,ASI Low-power Mode Enable" "0,1" line.long 0x0C "DRR,DMA_REQ Register" bitfld.long 0x0C 16. "DMATXREQ,DMA Tx Channels 0 Enable" "0,1" bitfld.long 0x0C 0. "DMARXREQ,DMA Rx Channels 0 Enable" "0,1" line.long 0x10 "TR,Trigger Register" bitfld.long 0x10 0. "TRIG,Header Transmission Trigger" "0,1" line.long 0x14 "CR0,Collision Register 0" hexmask.long.tbyte 0x14 9.--31. 1. "DCTH,Detection Collision Threshold" hexmask.long.byte 0x14 1.--8. 1. "DCS,Detection Collision Sample" bitfld.long 0x14 0. "DCENT,Detection Collision Enable" "0,1" line.long 0x18 "CR1,Collision Register 1" hexmask.long.byte 0x18 24.--31. 1. "CODCOTH,Collision Detection Comparison Threshold Value" hexmask.long.tbyte 0x18 0.--23. 1. "DFISJ,Data Frame Idle Sampling Judgment Interval" line.long 0x1C "ASTR,ASI Status Register" rbitfld.long 0x1C 6. "CDINT1CI,CDINT1 Clear Indication" "0,1" rbitfld.long 0x1C 5. "CDINT0CI,CDINT0 Clear Indication" "0,1" bitfld.long 0x1C 4. "STOPACK,Ipg Stop Ack" "0,1" bitfld.long 0x1C 3. "CDINT1,Collision Detection Interrupt 1" "0,1" bitfld.long 0x1C 2. "CDINT0,Collision Detection Interrupt 0" "0,1" bitfld.long 0x1C 1. "CDINT,Collision Detection Interrupt" "0,1" bitfld.long 0x1C 0. "AAINT,ASI All Interrupts" "0,1" line.long 0x20 "AINTENR,ASI Interrupt Enabled Register" bitfld.long 0x20 0. "AAINTEN,ASI all Interrupts Enabled" "0,1" line.long 0x24 "APBEMR,APB Bus Error Mask Register" bitfld.long 0x24 0. "APBEMP,APB Bus Error Mask Register" "0,1" tree.end tree "ASI4" group.long ad:0xD00A0000++0x43 line.long 0x00 "LINCR1,LIN Control Register 1" bitfld.long 0x00 16. "NLSE,LIN State Capture Enable on Bit Error" "0,1" bitfld.long 0x00 15. "CCD,Checksum Calculation Disable" "0,1" bitfld.long 0x00 14. "CFD,Checksum Field Disable" "0,1" bitfld.long 0x00 13. "LASE,LIN Autosynchronization Enable" "0,1" bitfld.long 0x00 12. "AUTOWU,Automatic Wake-up" "0,1" bitfld.long 0x00 8.--11. "MBL,Master Break Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. "BF,Bypass Filter" "0,1" newline bitfld.long 0x00 5. "LBKM,Loop Back Mode" "0,1" bitfld.long 0x00 4. "MME,Master Mode Enable" "0,1" bitfld.long 0x00 3. "SSBL,Slave Mode Sync Break Length" "0,1" bitfld.long 0x00 2. "RBLM,Receiver Buffer Locked Mode" "0,1" bitfld.long 0x00 1. "SLEEP,Sleep Mode Request" "0,1" bitfld.long 0x00 0. "INIT,Initialization Mode Request" "0,1" line.long 0x04 "LINIER,LIN Interrupt Enable Register" bitfld.long 0x04 15. "SIZE,Stuck at Zero Interrupt Enable" "0,1" bitfld.long 0x04 14. "OCIE,Output Compare Interrupt Enable" "0,1" bitfld.long 0x04 13. "BEIE,Bit Error Interrupt Enable" "0,1" bitfld.long 0x04 12. "CEIE,Checksum Error Interrupt Enable" "0,1" bitfld.long 0x04 11. "HEIE,Header Error Interrupt Enable" "0,1" bitfld.long 0x04 8. "FEIE,Frame Error Interrupt Enable" "0,1" bitfld.long 0x04 7. "BOIE,Buffer Overrun Interrupt Enable" "0,1" newline bitfld.long 0x04 6. "LSIE,LIN State Interrupt Enable" "0,1" bitfld.long 0x04 5. "WUIE,Wakeup Interrupt Enable" "0,1" bitfld.long 0x04 3. "TOIE,Timeout Interrupt Enable" "0,1" bitfld.long 0x04 2. "DRIE,Data Reception Complete Interrupt Enable" "0,1" bitfld.long 0x04 1. "DTIE,Data Transmitted Interrupt Enable" "0,1" bitfld.long 0x04 0. "HRIE,Header Received Interrupt Enable" "0,1" line.long 0x08 "LINSR,LIN Status Register" bitfld.long 0x08 19. "AUTOSYNC_COMP,Autosynchronization Complete" "0,1" rbitfld.long 0x08 16.--18. "RDC,Receive Data Byte Count" "0,1,2,3,4,5,6,7" rbitfld.long 0x08 12.--15. "LINS,LIN State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x08 8. "DRBNE,Data Reception Buffer not Empty Flag" "0,1" rbitfld.long 0x08 7. "RXBUSY,Receiver Busy Flag" "0,1" rbitfld.long 0x08 6. "RDI,Receiver Data Input" "0,1" newline bitfld.long 0x08 5. "WUF,Wakeup Flag" "0,1" bitfld.long 0x08 2. "DRF,Data Reception Completed Flag" "0,1" bitfld.long 0x08 1. "DTF,Data transmission completed flag" "0,1" bitfld.long 0x08 0. "HRF,Header Received Flag" "0,1" line.long 0x0C "LINESR,LIN Error Status Register" bitfld.long 0x0C 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x0C 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x0C 13. "BEF,Bit Error Flag" "0,1" bitfld.long 0x0C 12. "CEF,Checksum Error Flag" "0,1" bitfld.long 0x0C 11. "SFEF,Sync Field Error Flag" "0,1" bitfld.long 0x0C 10. "SDEF,Break Delimiter Error Flag" "0,1" bitfld.long 0x0C 9. "IPDEF,ID Parity Error Flag" "0,1" newline bitfld.long 0x0C 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x0C 7. "BOF,Buffer Overrun Flag" "0,1" bitfld.long 0x0C 0. "NF,Noise Flag" "0,1" line.long 0x10 "UARTCR,UART Mode Control Register" bitfld.long 0x10 31. "MIS,Monitor Idle State" "0,1" bitfld.long 0x10 28.--30. "CSP,Configurable Sample Point (i)" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--27. "OSR,Oversampling Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 23. "ROSE,Reduced Oversampling Enable" "0,1" bitfld.long 0x10 20.--22. "NEF,Number of Expected Frames" "0,1,2,3,4,5,6,7" bitfld.long 0x10 19. "DTU,Disable Timeout in UART Mode" "0,1" bitfld.long 0x10 17.--18. "SBUR,Number of Stop Bits in UART Reception Mode" "0,1,2,3" newline bitfld.long 0x10 16. "WLS,Special Word Length in UART Mode" "0,1" bitfld.long 0x10 13.--15. "TDFL_TFC,Transmitter Data Field Length / Tx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 10.--12. "RDFL_RFC,Receiver Data Field Length/Rx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "RFBM,Rx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 8. "TFBM,Tx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 7. "WL1,Word Length in UART Mode" "0,1" bitfld.long 0x10 6. "PC1,Parity Control" "0,1" newline bitfld.long 0x10 5. "RxEn,Receiver Enable" "0,1" bitfld.long 0x10 4. "TxEn,Transmitter Enable" "0,1" bitfld.long 0x10 3. "PC0,Parity Control" "0,1" bitfld.long 0x10 2. "PCE,Parity Control Enable" "0,1" bitfld.long 0x10 1. "WL0,Word Length in UART Mode" "0,1" bitfld.long 0x10 0. "UART,UART Mode Enable" "0,1" line.long 0x14 "UARTSR,UART Mode Status Register" bitfld.long 0x14 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x14 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x14 10.--13. "PE[3:0],Parity Error Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x14 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x14 7. "BOF,FIFO/buffer Overrun Flag" "0,1" rbitfld.long 0x14 6. "RDI,Receiver data input" "0,1" newline bitfld.long 0x14 5. "WUF,Wakeup Flag" "0,1" rbitfld.long 0x14 4. "RFNE,Receive FIFO not Empty" "0,1" bitfld.long 0x14 3. "TO,Timeout" "0,1" bitfld.long 0x14 2. "DRF_RFE,Data Reception Completed flag / Rx FIFO Empty Flag" "0,1" bitfld.long 0x14 1. "DTF_TFF,Data Transmission Completed Flag / Tx FIFO Full Flag" "0,1" bitfld.long 0x14 0. "NF,Noise Flag" "0,1" line.long 0x18 "LINTCSR,LIN Timeout Control Status Register" bitfld.long 0x18 10. "MODE,Timeout Counter Mode" "0,1" bitfld.long 0x18 9. "IOT,Idle on Timeout" "0,1" bitfld.long 0x18 8. "TOCE,Timeout Counter Enable" "0,1" hexmask.long.byte 0x18 0.--7. 1. "CNT,Counter Value" line.long 0x1C "LINOCR,LIN Output Compare Register" hexmask.long.byte 0x1C 8.--15. 1. "OC2,Output Compare Value 2" hexmask.long.byte 0x1C 0.--7. 1. "OC1,Output Compare Value 1" line.long 0x20 "LINTOCR,LIN Timeout Control Register" bitfld.long 0x20 8.--11. "RTO,Response Timeout Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x20 0.--6. 1. "HTO,Header Timeout value" line.long 0x24 "LINFBRR,LIN Fractional Baud Rate Register" bitfld.long 0x24 0.--3. "FBR,Fractional Baud Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LINIBRR,LIN Integer Baud Rate Register" hexmask.long.tbyte 0x28 0.--19. 1. "IBR,Integer baud Rate" line.long 0x2C "LINCFR,LIN Checksum Field Register" hexmask.long.byte 0x2C 0.--7. 1. "CF,Checksum Bits" line.long 0x30 "LINCR2,LIN Control Register 2" bitfld.long 0x30 15. "TBDE,Two-bit Delimiter Enable" "0,1" bitfld.long 0x30 14. "IOBE,Idle on Bit Error" "0,1" bitfld.long 0x30 13. "IOPE,Idle on Identifier Parity Error" "0,1" bitfld.long 0x30 12. "WURQ,Wakeup Generate Request" "0,1" bitfld.long 0x30 11. "DDRQ,Data Discard Request" "0,1" bitfld.long 0x30 10. "DTRQ,Data Transmission Request" "0,1" bitfld.long 0x30 9. "ABRQ,Abort Request" "0,1" newline bitfld.long 0x30 8. "HTRQ,Header Transmission Request" "0,1" line.long 0x34 "BIDR,Buffer Identifier Register" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "BDRL,Buffer Data Register Least Significant" hexmask.long.byte 0x38 24.--31. 1. "DATA3,Data Byte 3" hexmask.long.byte 0x38 16.--23. 1. "DATA2,Data Byte 2" hexmask.long.byte 0x38 8.--15. 1. "DATA1,Data Byte 1" hexmask.long.byte 0x38 0.--7. 1. "DATA0,Data Byte 0" line.long 0x3C "BDRM,Buffer Data Register Most Significant" hexmask.long.byte 0x3C 24.--31. 1. "DATA7,Data Byte 7" hexmask.long.byte 0x3C 16.--23. 1. "DATA6,Data Byte 6" hexmask.long.byte 0x3C 8.--15. 1. "DATA5,Data Byte 5" hexmask.long.byte 0x3C 0.--7. 1. "DATA4,Data Byte 4" line.long 0x40 "IFER,Identifier Filter Enable Register" hexmask.long.word 0x40 0.--15. 1. "FACT[x],Filter Active ? one bit for each identifier filter" rgroup.long ad:0xD00A0044++0x03 line.long 0x00 "IFMI,Identifier Filter Match Index" bitfld.long 0x00 0.--4. "IFMI,Filter Match Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD00A0048++0x4B line.long 0x00 "IFMR,Identifier Filter Mode Register" hexmask.long.byte 0x00 0.--7. 1. "IFM[n],Filter Mode" line.long 0x04 "IFCR0,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x04 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x04 9. "DIR,Direction" "0,1" bitfld.long 0x04 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x04 0.--5. 1. "ID,Identifier" line.long 0x08 "IFCR1,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x08 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 9. "DIR,Direction" "0,1" bitfld.long 0x08 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x08 0.--5. 1. "ID,Identifier" line.long 0x0C "IFCR2,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x0C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 9. "DIR,Direction" "0,1" bitfld.long 0x0C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x0C 0.--5. 1. "ID,Identifier" line.long 0x10 "IFCR3,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x10 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "DIR,Direction" "0,1" bitfld.long 0x10 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x10 0.--5. 1. "ID,Identifier" line.long 0x14 "IFCR4,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x14 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9. "DIR,Direction" "0,1" bitfld.long 0x14 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x14 0.--5. 1. "ID,Identifier" line.long 0x18 "IFCR5,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x18 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9. "DIR,Direction" "0,1" bitfld.long 0x18 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x18 0.--5. 1. "ID,Identifier" line.long 0x1C "IFCR6,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x1C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 9. "DIR,Direction" "0,1" bitfld.long 0x1C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x1C 0.--5. 1. "ID,Identifier" line.long 0x20 "IFCR7,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x20 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x20 9. "DIR,Direction" "0,1" bitfld.long 0x20 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x20 0.--5. 1. "ID,Identifier" line.long 0x24 "IFCR8,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x24 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x24 9. "DIR,Direction" "0,1" bitfld.long 0x24 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x24 0.--5. 1. "ID,Identifier" line.long 0x28 "IFCR9,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x28 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x28 9. "DIR,Direction" "0,1" bitfld.long 0x28 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x28 0.--5. 1. "ID,Identifier" line.long 0x2C "IFCR10,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x2C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 9. "DIR,Direction" "0,1" bitfld.long 0x2C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x2C 0.--5. 1. "ID,Identifier" line.long 0x30 "IFCR11,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x30 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x30 9. "DIR,Direction" "0,1" bitfld.long 0x30 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x30 0.--5. 1. "ID,Identifier" line.long 0x34 "IFCR12,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "IFCR13,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x38 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x38 9. "DIR,Direction" "0,1" bitfld.long 0x38 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x38 0.--5. 1. "ID,Identifier" line.long 0x3C "IFCR14,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x3C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 9. "DIR,Direction" "0,1" bitfld.long 0x3C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x3C 0.--5. 1. "ID,Identifier" line.long 0x40 "IFCR15,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x40 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x40 9. "DIR,Direction" "0,1" bitfld.long 0x40 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x40 0.--5. 1. "ID,Identifier" line.long 0x44 "GCR,Global Control Register" bitfld.long 0x44 5. "TDFBM,Transmit Data First Bit MSB" "0,1" bitfld.long 0x44 4. "RDFBM,Receive Data First Bit MSB" "0,1" bitfld.long 0x44 3. "TDLIS,Transmit data level inversion selection" "0,1" bitfld.long 0x44 2. "RDLIS,Received Data Level Inversion Selection" "0,1" bitfld.long 0x44 1. "STOP,One or two Stop Bit Configuration" "0,1" bitfld.long 0x44 0. "SR,Soft Reset" "0,1" line.long 0x48 "UARTPTO,UART Preset Timeout Register" hexmask.long.word 0x48 0.--11. 1. "PTO,Preset Timeout" rgroup.long ad:0xD00A0094++0x03 line.long 0x00 "UARTCTO,UART Current Timeout Register" hexmask.long.word 0x00 0.--11. 1. "CTO,Counter Timeout" group.long ad:0xD00A0098++0x27 line.long 0x00 "DMATXE,DMA Tx Enable Register" bitfld.long 0x00 0. "DTE0,DMA Tx Channel 0 Enable" "0,1" line.long 0x04 "DMARXE,DMA Rx Enable Register" bitfld.long 0x04 0. "DRE0,DMA Rx Channel 0 Enable" "0,1" line.long 0x08 "SRR,Stop Request Register" bitfld.long 0x08 0. "STOPREQ,ASI Low-power Mode Enable" "0,1" line.long 0x0C "DRR,DMA_REQ Register" bitfld.long 0x0C 16. "DMATXREQ,DMA Tx Channels 0 Enable" "0,1" bitfld.long 0x0C 0. "DMARXREQ,DMA Rx Channels 0 Enable" "0,1" line.long 0x10 "TR,Trigger Register" bitfld.long 0x10 0. "TRIG,Header Transmission Trigger" "0,1" line.long 0x14 "CR0,Collision Register 0" hexmask.long.tbyte 0x14 9.--31. 1. "DCTH,Detection Collision Threshold" hexmask.long.byte 0x14 1.--8. 1. "DCS,Detection Collision Sample" bitfld.long 0x14 0. "DCENT,Detection Collision Enable" "0,1" line.long 0x18 "CR1,Collision Register 1" hexmask.long.byte 0x18 24.--31. 1. "CODCOTH,Collision Detection Comparison Threshold Value" hexmask.long.tbyte 0x18 0.--23. 1. "DFISJ,Data Frame Idle Sampling Judgment Interval" line.long 0x1C "ASTR,ASI Status Register" rbitfld.long 0x1C 6. "CDINT1CI,CDINT1 Clear Indication" "0,1" rbitfld.long 0x1C 5. "CDINT0CI,CDINT0 Clear Indication" "0,1" bitfld.long 0x1C 4. "STOPACK,Ipg Stop Ack" "0,1" bitfld.long 0x1C 3. "CDINT1,Collision Detection Interrupt 1" "0,1" bitfld.long 0x1C 2. "CDINT0,Collision Detection Interrupt 0" "0,1" bitfld.long 0x1C 1. "CDINT,Collision Detection Interrupt" "0,1" bitfld.long 0x1C 0. "AAINT,ASI All Interrupts" "0,1" line.long 0x20 "AINTENR,ASI Interrupt Enabled Register" bitfld.long 0x20 0. "AAINTEN,ASI all Interrupts Enabled" "0,1" line.long 0x24 "APBEMR,APB Bus Error Mask Register" bitfld.long 0x24 0. "APBEMP,APB Bus Error Mask Register" "0,1" tree.end tree "ASI5" group.long ad:0xD00A0400++0x43 line.long 0x00 "LINCR1,LIN Control Register 1" bitfld.long 0x00 16. "NLSE,LIN State Capture Enable on Bit Error" "0,1" bitfld.long 0x00 15. "CCD,Checksum Calculation Disable" "0,1" bitfld.long 0x00 14. "CFD,Checksum Field Disable" "0,1" bitfld.long 0x00 13. "LASE,LIN Autosynchronization Enable" "0,1" bitfld.long 0x00 12. "AUTOWU,Automatic Wake-up" "0,1" bitfld.long 0x00 8.--11. "MBL,Master Break Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. "BF,Bypass Filter" "0,1" newline bitfld.long 0x00 5. "LBKM,Loop Back Mode" "0,1" bitfld.long 0x00 4. "MME,Master Mode Enable" "0,1" bitfld.long 0x00 3. "SSBL,Slave Mode Sync Break Length" "0,1" bitfld.long 0x00 2. "RBLM,Receiver Buffer Locked Mode" "0,1" bitfld.long 0x00 1. "SLEEP,Sleep Mode Request" "0,1" bitfld.long 0x00 0. "INIT,Initialization Mode Request" "0,1" line.long 0x04 "LINIER,LIN Interrupt Enable Register" bitfld.long 0x04 15. "SIZE,Stuck at Zero Interrupt Enable" "0,1" bitfld.long 0x04 14. "OCIE,Output Compare Interrupt Enable" "0,1" bitfld.long 0x04 13. "BEIE,Bit Error Interrupt Enable" "0,1" bitfld.long 0x04 12. "CEIE,Checksum Error Interrupt Enable" "0,1" bitfld.long 0x04 11. "HEIE,Header Error Interrupt Enable" "0,1" bitfld.long 0x04 8. "FEIE,Frame Error Interrupt Enable" "0,1" bitfld.long 0x04 7. "BOIE,Buffer Overrun Interrupt Enable" "0,1" newline bitfld.long 0x04 6. "LSIE,LIN State Interrupt Enable" "0,1" bitfld.long 0x04 5. "WUIE,Wakeup Interrupt Enable" "0,1" bitfld.long 0x04 3. "TOIE,Timeout Interrupt Enable" "0,1" bitfld.long 0x04 2. "DRIE,Data Reception Complete Interrupt Enable" "0,1" bitfld.long 0x04 1. "DTIE,Data Transmitted Interrupt Enable" "0,1" bitfld.long 0x04 0. "HRIE,Header Received Interrupt Enable" "0,1" line.long 0x08 "LINSR,LIN Status Register" bitfld.long 0x08 19. "AUTOSYNC_COMP,Autosynchronization Complete" "0,1" rbitfld.long 0x08 16.--18. "RDC,Receive Data Byte Count" "0,1,2,3,4,5,6,7" rbitfld.long 0x08 12.--15. "LINS,LIN State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x08 8. "DRBNE,Data Reception Buffer not Empty Flag" "0,1" rbitfld.long 0x08 7. "RXBUSY,Receiver Busy Flag" "0,1" rbitfld.long 0x08 6. "RDI,Receiver Data Input" "0,1" newline bitfld.long 0x08 5. "WUF,Wakeup Flag" "0,1" bitfld.long 0x08 2. "DRF,Data Reception Completed Flag" "0,1" bitfld.long 0x08 1. "DTF,Data transmission completed flag" "0,1" bitfld.long 0x08 0. "HRF,Header Received Flag" "0,1" line.long 0x0C "LINESR,LIN Error Status Register" bitfld.long 0x0C 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x0C 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x0C 13. "BEF,Bit Error Flag" "0,1" bitfld.long 0x0C 12. "CEF,Checksum Error Flag" "0,1" bitfld.long 0x0C 11. "SFEF,Sync Field Error Flag" "0,1" bitfld.long 0x0C 10. "SDEF,Break Delimiter Error Flag" "0,1" bitfld.long 0x0C 9. "IPDEF,ID Parity Error Flag" "0,1" newline bitfld.long 0x0C 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x0C 7. "BOF,Buffer Overrun Flag" "0,1" bitfld.long 0x0C 0. "NF,Noise Flag" "0,1" line.long 0x10 "UARTCR,UART Mode Control Register" bitfld.long 0x10 31. "MIS,Monitor Idle State" "0,1" bitfld.long 0x10 28.--30. "CSP,Configurable Sample Point (i)" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--27. "OSR,Oversampling Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 23. "ROSE,Reduced Oversampling Enable" "0,1" bitfld.long 0x10 20.--22. "NEF,Number of Expected Frames" "0,1,2,3,4,5,6,7" bitfld.long 0x10 19. "DTU,Disable Timeout in UART Mode" "0,1" bitfld.long 0x10 17.--18. "SBUR,Number of Stop Bits in UART Reception Mode" "0,1,2,3" newline bitfld.long 0x10 16. "WLS,Special Word Length in UART Mode" "0,1" bitfld.long 0x10 13.--15. "TDFL_TFC,Transmitter Data Field Length / Tx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 10.--12. "RDFL_RFC,Receiver Data Field Length/Rx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "RFBM,Rx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 8. "TFBM,Tx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 7. "WL1,Word Length in UART Mode" "0,1" bitfld.long 0x10 6. "PC1,Parity Control" "0,1" newline bitfld.long 0x10 5. "RxEn,Receiver Enable" "0,1" bitfld.long 0x10 4. "TxEn,Transmitter Enable" "0,1" bitfld.long 0x10 3. "PC0,Parity Control" "0,1" bitfld.long 0x10 2. "PCE,Parity Control Enable" "0,1" bitfld.long 0x10 1. "WL0,Word Length in UART Mode" "0,1" bitfld.long 0x10 0. "UART,UART Mode Enable" "0,1" line.long 0x14 "UARTSR,UART Mode Status Register" bitfld.long 0x14 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x14 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x14 10.--13. "PE[3:0],Parity Error Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x14 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x14 7. "BOF,FIFO/buffer Overrun Flag" "0,1" rbitfld.long 0x14 6. "RDI,Receiver data input" "0,1" newline bitfld.long 0x14 5. "WUF,Wakeup Flag" "0,1" rbitfld.long 0x14 4. "RFNE,Receive FIFO not Empty" "0,1" bitfld.long 0x14 3. "TO,Timeout" "0,1" bitfld.long 0x14 2. "DRF_RFE,Data Reception Completed flag / Rx FIFO Empty Flag" "0,1" bitfld.long 0x14 1. "DTF_TFF,Data Transmission Completed Flag / Tx FIFO Full Flag" "0,1" bitfld.long 0x14 0. "NF,Noise Flag" "0,1" line.long 0x18 "LINTCSR,LIN Timeout Control Status Register" bitfld.long 0x18 10. "MODE,Timeout Counter Mode" "0,1" bitfld.long 0x18 9. "IOT,Idle on Timeout" "0,1" bitfld.long 0x18 8. "TOCE,Timeout Counter Enable" "0,1" hexmask.long.byte 0x18 0.--7. 1. "CNT,Counter Value" line.long 0x1C "LINOCR,LIN Output Compare Register" hexmask.long.byte 0x1C 8.--15. 1. "OC2,Output Compare Value 2" hexmask.long.byte 0x1C 0.--7. 1. "OC1,Output Compare Value 1" line.long 0x20 "LINTOCR,LIN Timeout Control Register" bitfld.long 0x20 8.--11. "RTO,Response Timeout Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x20 0.--6. 1. "HTO,Header Timeout value" line.long 0x24 "LINFBRR,LIN Fractional Baud Rate Register" bitfld.long 0x24 0.--3. "FBR,Fractional Baud Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LINIBRR,LIN Integer Baud Rate Register" hexmask.long.tbyte 0x28 0.--19. 1. "IBR,Integer baud Rate" line.long 0x2C "LINCFR,LIN Checksum Field Register" hexmask.long.byte 0x2C 0.--7. 1. "CF,Checksum Bits" line.long 0x30 "LINCR2,LIN Control Register 2" bitfld.long 0x30 15. "TBDE,Two-bit Delimiter Enable" "0,1" bitfld.long 0x30 14. "IOBE,Idle on Bit Error" "0,1" bitfld.long 0x30 13. "IOPE,Idle on Identifier Parity Error" "0,1" bitfld.long 0x30 12. "WURQ,Wakeup Generate Request" "0,1" bitfld.long 0x30 11. "DDRQ,Data Discard Request" "0,1" bitfld.long 0x30 10. "DTRQ,Data Transmission Request" "0,1" bitfld.long 0x30 9. "ABRQ,Abort Request" "0,1" newline bitfld.long 0x30 8. "HTRQ,Header Transmission Request" "0,1" line.long 0x34 "BIDR,Buffer Identifier Register" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "BDRL,Buffer Data Register Least Significant" hexmask.long.byte 0x38 24.--31. 1. "DATA3,Data Byte 3" hexmask.long.byte 0x38 16.--23. 1. "DATA2,Data Byte 2" hexmask.long.byte 0x38 8.--15. 1. "DATA1,Data Byte 1" hexmask.long.byte 0x38 0.--7. 1. "DATA0,Data Byte 0" line.long 0x3C "BDRM,Buffer Data Register Most Significant" hexmask.long.byte 0x3C 24.--31. 1. "DATA7,Data Byte 7" hexmask.long.byte 0x3C 16.--23. 1. "DATA6,Data Byte 6" hexmask.long.byte 0x3C 8.--15. 1. "DATA5,Data Byte 5" hexmask.long.byte 0x3C 0.--7. 1. "DATA4,Data Byte 4" line.long 0x40 "IFER,Identifier Filter Enable Register" hexmask.long.word 0x40 0.--15. 1. "FACT[x],Filter Active ? one bit for each identifier filter" rgroup.long ad:0xD00A0444++0x03 line.long 0x00 "IFMI,Identifier Filter Match Index" bitfld.long 0x00 0.--4. "IFMI,Filter Match Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD00A0448++0x4B line.long 0x00 "IFMR,Identifier Filter Mode Register" hexmask.long.byte 0x00 0.--7. 1. "IFM[n],Filter Mode" line.long 0x04 "IFCR0,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x04 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x04 9. "DIR,Direction" "0,1" bitfld.long 0x04 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x04 0.--5. 1. "ID,Identifier" line.long 0x08 "IFCR1,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x08 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 9. "DIR,Direction" "0,1" bitfld.long 0x08 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x08 0.--5. 1. "ID,Identifier" line.long 0x0C "IFCR2,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x0C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 9. "DIR,Direction" "0,1" bitfld.long 0x0C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x0C 0.--5. 1. "ID,Identifier" line.long 0x10 "IFCR3,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x10 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "DIR,Direction" "0,1" bitfld.long 0x10 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x10 0.--5. 1. "ID,Identifier" line.long 0x14 "IFCR4,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x14 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9. "DIR,Direction" "0,1" bitfld.long 0x14 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x14 0.--5. 1. "ID,Identifier" line.long 0x18 "IFCR5,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x18 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9. "DIR,Direction" "0,1" bitfld.long 0x18 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x18 0.--5. 1. "ID,Identifier" line.long 0x1C "IFCR6,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x1C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 9. "DIR,Direction" "0,1" bitfld.long 0x1C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x1C 0.--5. 1. "ID,Identifier" line.long 0x20 "IFCR7,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x20 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x20 9. "DIR,Direction" "0,1" bitfld.long 0x20 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x20 0.--5. 1. "ID,Identifier" line.long 0x24 "IFCR8,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x24 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x24 9. "DIR,Direction" "0,1" bitfld.long 0x24 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x24 0.--5. 1. "ID,Identifier" line.long 0x28 "IFCR9,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x28 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x28 9. "DIR,Direction" "0,1" bitfld.long 0x28 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x28 0.--5. 1. "ID,Identifier" line.long 0x2C "IFCR10,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x2C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 9. "DIR,Direction" "0,1" bitfld.long 0x2C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x2C 0.--5. 1. "ID,Identifier" line.long 0x30 "IFCR11,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x30 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x30 9. "DIR,Direction" "0,1" bitfld.long 0x30 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x30 0.--5. 1. "ID,Identifier" line.long 0x34 "IFCR12,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "IFCR13,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x38 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x38 9. "DIR,Direction" "0,1" bitfld.long 0x38 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x38 0.--5. 1. "ID,Identifier" line.long 0x3C "IFCR14,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x3C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 9. "DIR,Direction" "0,1" bitfld.long 0x3C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x3C 0.--5. 1. "ID,Identifier" line.long 0x40 "IFCR15,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x40 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x40 9. "DIR,Direction" "0,1" bitfld.long 0x40 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x40 0.--5. 1. "ID,Identifier" line.long 0x44 "GCR,Global Control Register" bitfld.long 0x44 5. "TDFBM,Transmit Data First Bit MSB" "0,1" bitfld.long 0x44 4. "RDFBM,Receive Data First Bit MSB" "0,1" bitfld.long 0x44 3. "TDLIS,Transmit data level inversion selection" "0,1" bitfld.long 0x44 2. "RDLIS,Received Data Level Inversion Selection" "0,1" bitfld.long 0x44 1. "STOP,One or two Stop Bit Configuration" "0,1" bitfld.long 0x44 0. "SR,Soft Reset" "0,1" line.long 0x48 "UARTPTO,UART Preset Timeout Register" hexmask.long.word 0x48 0.--11. 1. "PTO,Preset Timeout" rgroup.long ad:0xD00A0494++0x03 line.long 0x00 "UARTCTO,UART Current Timeout Register" hexmask.long.word 0x00 0.--11. 1. "CTO,Counter Timeout" group.long ad:0xD00A0498++0x27 line.long 0x00 "DMATXE,DMA Tx Enable Register" bitfld.long 0x00 0. "DTE0,DMA Tx Channel 0 Enable" "0,1" line.long 0x04 "DMARXE,DMA Rx Enable Register" bitfld.long 0x04 0. "DRE0,DMA Rx Channel 0 Enable" "0,1" line.long 0x08 "SRR,Stop Request Register" bitfld.long 0x08 0. "STOPREQ,ASI Low-power Mode Enable" "0,1" line.long 0x0C "DRR,DMA_REQ Register" bitfld.long 0x0C 16. "DMATXREQ,DMA Tx Channels 0 Enable" "0,1" bitfld.long 0x0C 0. "DMARXREQ,DMA Rx Channels 0 Enable" "0,1" line.long 0x10 "TR,Trigger Register" bitfld.long 0x10 0. "TRIG,Header Transmission Trigger" "0,1" line.long 0x14 "CR0,Collision Register 0" hexmask.long.tbyte 0x14 9.--31. 1. "DCTH,Detection Collision Threshold" hexmask.long.byte 0x14 1.--8. 1. "DCS,Detection Collision Sample" bitfld.long 0x14 0. "DCENT,Detection Collision Enable" "0,1" line.long 0x18 "CR1,Collision Register 1" hexmask.long.byte 0x18 24.--31. 1. "CODCOTH,Collision Detection Comparison Threshold Value" hexmask.long.tbyte 0x18 0.--23. 1. "DFISJ,Data Frame Idle Sampling Judgment Interval" line.long 0x1C "ASTR,ASI Status Register" rbitfld.long 0x1C 6. "CDINT1CI,CDINT1 Clear Indication" "0,1" rbitfld.long 0x1C 5. "CDINT0CI,CDINT0 Clear Indication" "0,1" bitfld.long 0x1C 4. "STOPACK,Ipg Stop Ack" "0,1" bitfld.long 0x1C 3. "CDINT1,Collision Detection Interrupt 1" "0,1" bitfld.long 0x1C 2. "CDINT0,Collision Detection Interrupt 0" "0,1" bitfld.long 0x1C 1. "CDINT,Collision Detection Interrupt" "0,1" bitfld.long 0x1C 0. "AAINT,ASI All Interrupts" "0,1" line.long 0x20 "AINTENR,ASI Interrupt Enabled Register" bitfld.long 0x20 0. "AAINTEN,ASI all Interrupts Enabled" "0,1" line.long 0x24 "APBEMR,APB Bus Error Mask Register" bitfld.long 0x24 0. "APBEMP,APB Bus Error Mask Register" "0,1" tree.end tree "ASI6" group.long ad:0xD00A0800++0x43 line.long 0x00 "LINCR1,LIN Control Register 1" bitfld.long 0x00 16. "NLSE,LIN State Capture Enable on Bit Error" "0,1" bitfld.long 0x00 15. "CCD,Checksum Calculation Disable" "0,1" bitfld.long 0x00 14. "CFD,Checksum Field Disable" "0,1" bitfld.long 0x00 13. "LASE,LIN Autosynchronization Enable" "0,1" bitfld.long 0x00 12. "AUTOWU,Automatic Wake-up" "0,1" bitfld.long 0x00 8.--11. "MBL,Master Break Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. "BF,Bypass Filter" "0,1" newline bitfld.long 0x00 5. "LBKM,Loop Back Mode" "0,1" bitfld.long 0x00 4. "MME,Master Mode Enable" "0,1" bitfld.long 0x00 3. "SSBL,Slave Mode Sync Break Length" "0,1" bitfld.long 0x00 2. "RBLM,Receiver Buffer Locked Mode" "0,1" bitfld.long 0x00 1. "SLEEP,Sleep Mode Request" "0,1" bitfld.long 0x00 0. "INIT,Initialization Mode Request" "0,1" line.long 0x04 "LINIER,LIN Interrupt Enable Register" bitfld.long 0x04 15. "SIZE,Stuck at Zero Interrupt Enable" "0,1" bitfld.long 0x04 14. "OCIE,Output Compare Interrupt Enable" "0,1" bitfld.long 0x04 13. "BEIE,Bit Error Interrupt Enable" "0,1" bitfld.long 0x04 12. "CEIE,Checksum Error Interrupt Enable" "0,1" bitfld.long 0x04 11. "HEIE,Header Error Interrupt Enable" "0,1" bitfld.long 0x04 8. "FEIE,Frame Error Interrupt Enable" "0,1" bitfld.long 0x04 7. "BOIE,Buffer Overrun Interrupt Enable" "0,1" newline bitfld.long 0x04 6. "LSIE,LIN State Interrupt Enable" "0,1" bitfld.long 0x04 5. "WUIE,Wakeup Interrupt Enable" "0,1" bitfld.long 0x04 3. "TOIE,Timeout Interrupt Enable" "0,1" bitfld.long 0x04 2. "DRIE,Data Reception Complete Interrupt Enable" "0,1" bitfld.long 0x04 1. "DTIE,Data Transmitted Interrupt Enable" "0,1" bitfld.long 0x04 0. "HRIE,Header Received Interrupt Enable" "0,1" line.long 0x08 "LINSR,LIN Status Register" bitfld.long 0x08 19. "AUTOSYNC_COMP,Autosynchronization Complete" "0,1" rbitfld.long 0x08 16.--18. "RDC,Receive Data Byte Count" "0,1,2,3,4,5,6,7" rbitfld.long 0x08 12.--15. "LINS,LIN State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x08 8. "DRBNE,Data Reception Buffer not Empty Flag" "0,1" rbitfld.long 0x08 7. "RXBUSY,Receiver Busy Flag" "0,1" rbitfld.long 0x08 6. "RDI,Receiver Data Input" "0,1" newline bitfld.long 0x08 5. "WUF,Wakeup Flag" "0,1" bitfld.long 0x08 2. "DRF,Data Reception Completed Flag" "0,1" bitfld.long 0x08 1. "DTF,Data transmission completed flag" "0,1" bitfld.long 0x08 0. "HRF,Header Received Flag" "0,1" line.long 0x0C "LINESR,LIN Error Status Register" bitfld.long 0x0C 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x0C 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x0C 13. "BEF,Bit Error Flag" "0,1" bitfld.long 0x0C 12. "CEF,Checksum Error Flag" "0,1" bitfld.long 0x0C 11. "SFEF,Sync Field Error Flag" "0,1" bitfld.long 0x0C 10. "SDEF,Break Delimiter Error Flag" "0,1" bitfld.long 0x0C 9. "IPDEF,ID Parity Error Flag" "0,1" newline bitfld.long 0x0C 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x0C 7. "BOF,Buffer Overrun Flag" "0,1" bitfld.long 0x0C 0. "NF,Noise Flag" "0,1" line.long 0x10 "UARTCR,UART Mode Control Register" bitfld.long 0x10 31. "MIS,Monitor Idle State" "0,1" bitfld.long 0x10 28.--30. "CSP,Configurable Sample Point (i)" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--27. "OSR,Oversampling Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 23. "ROSE,Reduced Oversampling Enable" "0,1" bitfld.long 0x10 20.--22. "NEF,Number of Expected Frames" "0,1,2,3,4,5,6,7" bitfld.long 0x10 19. "DTU,Disable Timeout in UART Mode" "0,1" bitfld.long 0x10 17.--18. "SBUR,Number of Stop Bits in UART Reception Mode" "0,1,2,3" newline bitfld.long 0x10 16. "WLS,Special Word Length in UART Mode" "0,1" bitfld.long 0x10 13.--15. "TDFL_TFC,Transmitter Data Field Length / Tx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 10.--12. "RDFL_RFC,Receiver Data Field Length/Rx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "RFBM,Rx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 8. "TFBM,Tx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 7. "WL1,Word Length in UART Mode" "0,1" bitfld.long 0x10 6. "PC1,Parity Control" "0,1" newline bitfld.long 0x10 5. "RxEn,Receiver Enable" "0,1" bitfld.long 0x10 4. "TxEn,Transmitter Enable" "0,1" bitfld.long 0x10 3. "PC0,Parity Control" "0,1" bitfld.long 0x10 2. "PCE,Parity Control Enable" "0,1" bitfld.long 0x10 1. "WL0,Word Length in UART Mode" "0,1" bitfld.long 0x10 0. "UART,UART Mode Enable" "0,1" line.long 0x14 "UARTSR,UART Mode Status Register" bitfld.long 0x14 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x14 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x14 10.--13. "PE[3:0],Parity Error Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x14 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x14 7. "BOF,FIFO/buffer Overrun Flag" "0,1" rbitfld.long 0x14 6. "RDI,Receiver data input" "0,1" newline bitfld.long 0x14 5. "WUF,Wakeup Flag" "0,1" rbitfld.long 0x14 4. "RFNE,Receive FIFO not Empty" "0,1" bitfld.long 0x14 3. "TO,Timeout" "0,1" bitfld.long 0x14 2. "DRF_RFE,Data Reception Completed flag / Rx FIFO Empty Flag" "0,1" bitfld.long 0x14 1. "DTF_TFF,Data Transmission Completed Flag / Tx FIFO Full Flag" "0,1" bitfld.long 0x14 0. "NF,Noise Flag" "0,1" line.long 0x18 "LINTCSR,LIN Timeout Control Status Register" bitfld.long 0x18 10. "MODE,Timeout Counter Mode" "0,1" bitfld.long 0x18 9. "IOT,Idle on Timeout" "0,1" bitfld.long 0x18 8. "TOCE,Timeout Counter Enable" "0,1" hexmask.long.byte 0x18 0.--7. 1. "CNT,Counter Value" line.long 0x1C "LINOCR,LIN Output Compare Register" hexmask.long.byte 0x1C 8.--15. 1. "OC2,Output Compare Value 2" hexmask.long.byte 0x1C 0.--7. 1. "OC1,Output Compare Value 1" line.long 0x20 "LINTOCR,LIN Timeout Control Register" bitfld.long 0x20 8.--11. "RTO,Response Timeout Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x20 0.--6. 1. "HTO,Header Timeout value" line.long 0x24 "LINFBRR,LIN Fractional Baud Rate Register" bitfld.long 0x24 0.--3. "FBR,Fractional Baud Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LINIBRR,LIN Integer Baud Rate Register" hexmask.long.tbyte 0x28 0.--19. 1. "IBR,Integer baud Rate" line.long 0x2C "LINCFR,LIN Checksum Field Register" hexmask.long.byte 0x2C 0.--7. 1. "CF,Checksum Bits" line.long 0x30 "LINCR2,LIN Control Register 2" bitfld.long 0x30 15. "TBDE,Two-bit Delimiter Enable" "0,1" bitfld.long 0x30 14. "IOBE,Idle on Bit Error" "0,1" bitfld.long 0x30 13. "IOPE,Idle on Identifier Parity Error" "0,1" bitfld.long 0x30 12. "WURQ,Wakeup Generate Request" "0,1" bitfld.long 0x30 11. "DDRQ,Data Discard Request" "0,1" bitfld.long 0x30 10. "DTRQ,Data Transmission Request" "0,1" bitfld.long 0x30 9. "ABRQ,Abort Request" "0,1" newline bitfld.long 0x30 8. "HTRQ,Header Transmission Request" "0,1" line.long 0x34 "BIDR,Buffer Identifier Register" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "BDRL,Buffer Data Register Least Significant" hexmask.long.byte 0x38 24.--31. 1. "DATA3,Data Byte 3" hexmask.long.byte 0x38 16.--23. 1. "DATA2,Data Byte 2" hexmask.long.byte 0x38 8.--15. 1. "DATA1,Data Byte 1" hexmask.long.byte 0x38 0.--7. 1. "DATA0,Data Byte 0" line.long 0x3C "BDRM,Buffer Data Register Most Significant" hexmask.long.byte 0x3C 24.--31. 1. "DATA7,Data Byte 7" hexmask.long.byte 0x3C 16.--23. 1. "DATA6,Data Byte 6" hexmask.long.byte 0x3C 8.--15. 1. "DATA5,Data Byte 5" hexmask.long.byte 0x3C 0.--7. 1. "DATA4,Data Byte 4" line.long 0x40 "IFER,Identifier Filter Enable Register" hexmask.long.word 0x40 0.--15. 1. "FACT[x],Filter Active ? one bit for each identifier filter" rgroup.long ad:0xD00A0844++0x03 line.long 0x00 "IFMI,Identifier Filter Match Index" bitfld.long 0x00 0.--4. "IFMI,Filter Match Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD00A0848++0x4B line.long 0x00 "IFMR,Identifier Filter Mode Register" hexmask.long.byte 0x00 0.--7. 1. "IFM[n],Filter Mode" line.long 0x04 "IFCR0,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x04 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x04 9. "DIR,Direction" "0,1" bitfld.long 0x04 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x04 0.--5. 1. "ID,Identifier" line.long 0x08 "IFCR1,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x08 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 9. "DIR,Direction" "0,1" bitfld.long 0x08 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x08 0.--5. 1. "ID,Identifier" line.long 0x0C "IFCR2,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x0C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 9. "DIR,Direction" "0,1" bitfld.long 0x0C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x0C 0.--5. 1. "ID,Identifier" line.long 0x10 "IFCR3,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x10 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "DIR,Direction" "0,1" bitfld.long 0x10 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x10 0.--5. 1. "ID,Identifier" line.long 0x14 "IFCR4,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x14 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9. "DIR,Direction" "0,1" bitfld.long 0x14 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x14 0.--5. 1. "ID,Identifier" line.long 0x18 "IFCR5,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x18 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9. "DIR,Direction" "0,1" bitfld.long 0x18 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x18 0.--5. 1. "ID,Identifier" line.long 0x1C "IFCR6,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x1C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 9. "DIR,Direction" "0,1" bitfld.long 0x1C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x1C 0.--5. 1. "ID,Identifier" line.long 0x20 "IFCR7,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x20 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x20 9. "DIR,Direction" "0,1" bitfld.long 0x20 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x20 0.--5. 1. "ID,Identifier" line.long 0x24 "IFCR8,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x24 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x24 9. "DIR,Direction" "0,1" bitfld.long 0x24 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x24 0.--5. 1. "ID,Identifier" line.long 0x28 "IFCR9,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x28 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x28 9. "DIR,Direction" "0,1" bitfld.long 0x28 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x28 0.--5. 1. "ID,Identifier" line.long 0x2C "IFCR10,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x2C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 9. "DIR,Direction" "0,1" bitfld.long 0x2C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x2C 0.--5. 1. "ID,Identifier" line.long 0x30 "IFCR11,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x30 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x30 9. "DIR,Direction" "0,1" bitfld.long 0x30 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x30 0.--5. 1. "ID,Identifier" line.long 0x34 "IFCR12,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "IFCR13,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x38 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x38 9. "DIR,Direction" "0,1" bitfld.long 0x38 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x38 0.--5. 1. "ID,Identifier" line.long 0x3C "IFCR14,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x3C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 9. "DIR,Direction" "0,1" bitfld.long 0x3C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x3C 0.--5. 1. "ID,Identifier" line.long 0x40 "IFCR15,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x40 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x40 9. "DIR,Direction" "0,1" bitfld.long 0x40 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x40 0.--5. 1. "ID,Identifier" line.long 0x44 "GCR,Global Control Register" bitfld.long 0x44 5. "TDFBM,Transmit Data First Bit MSB" "0,1" bitfld.long 0x44 4. "RDFBM,Receive Data First Bit MSB" "0,1" bitfld.long 0x44 3. "TDLIS,Transmit data level inversion selection" "0,1" bitfld.long 0x44 2. "RDLIS,Received Data Level Inversion Selection" "0,1" bitfld.long 0x44 1. "STOP,One or two Stop Bit Configuration" "0,1" bitfld.long 0x44 0. "SR,Soft Reset" "0,1" line.long 0x48 "UARTPTO,UART Preset Timeout Register" hexmask.long.word 0x48 0.--11. 1. "PTO,Preset Timeout" rgroup.long ad:0xD00A0894++0x03 line.long 0x00 "UARTCTO,UART Current Timeout Register" hexmask.long.word 0x00 0.--11. 1. "CTO,Counter Timeout" group.long ad:0xD00A0898++0x27 line.long 0x00 "DMATXE,DMA Tx Enable Register" bitfld.long 0x00 0. "DTE0,DMA Tx Channel 0 Enable" "0,1" line.long 0x04 "DMARXE,DMA Rx Enable Register" bitfld.long 0x04 0. "DRE0,DMA Rx Channel 0 Enable" "0,1" line.long 0x08 "SRR,Stop Request Register" bitfld.long 0x08 0. "STOPREQ,ASI Low-power Mode Enable" "0,1" line.long 0x0C "DRR,DMA_REQ Register" bitfld.long 0x0C 16. "DMATXREQ,DMA Tx Channels 0 Enable" "0,1" bitfld.long 0x0C 0. "DMARXREQ,DMA Rx Channels 0 Enable" "0,1" line.long 0x10 "TR,Trigger Register" bitfld.long 0x10 0. "TRIG,Header Transmission Trigger" "0,1" line.long 0x14 "CR0,Collision Register 0" hexmask.long.tbyte 0x14 9.--31. 1. "DCTH,Detection Collision Threshold" hexmask.long.byte 0x14 1.--8. 1. "DCS,Detection Collision Sample" bitfld.long 0x14 0. "DCENT,Detection Collision Enable" "0,1" line.long 0x18 "CR1,Collision Register 1" hexmask.long.byte 0x18 24.--31. 1. "CODCOTH,Collision Detection Comparison Threshold Value" hexmask.long.tbyte 0x18 0.--23. 1. "DFISJ,Data Frame Idle Sampling Judgment Interval" line.long 0x1C "ASTR,ASI Status Register" rbitfld.long 0x1C 6. "CDINT1CI,CDINT1 Clear Indication" "0,1" rbitfld.long 0x1C 5. "CDINT0CI,CDINT0 Clear Indication" "0,1" bitfld.long 0x1C 4. "STOPACK,Ipg Stop Ack" "0,1" bitfld.long 0x1C 3. "CDINT1,Collision Detection Interrupt 1" "0,1" bitfld.long 0x1C 2. "CDINT0,Collision Detection Interrupt 0" "0,1" bitfld.long 0x1C 1. "CDINT,Collision Detection Interrupt" "0,1" bitfld.long 0x1C 0. "AAINT,ASI All Interrupts" "0,1" line.long 0x20 "AINTENR,ASI Interrupt Enabled Register" bitfld.long 0x20 0. "AAINTEN,ASI all Interrupts Enabled" "0,1" line.long 0x24 "APBEMR,APB Bus Error Mask Register" bitfld.long 0x24 0. "APBEMP,APB Bus Error Mask Register" "0,1" tree.end tree "ASI7" group.long ad:0xD00A0C00++0x43 line.long 0x00 "LINCR1,LIN Control Register 1" bitfld.long 0x00 16. "NLSE,LIN State Capture Enable on Bit Error" "0,1" bitfld.long 0x00 15. "CCD,Checksum Calculation Disable" "0,1" bitfld.long 0x00 14. "CFD,Checksum Field Disable" "0,1" bitfld.long 0x00 13. "LASE,LIN Autosynchronization Enable" "0,1" bitfld.long 0x00 12. "AUTOWU,Automatic Wake-up" "0,1" bitfld.long 0x00 8.--11. "MBL,Master Break Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 7. "BF,Bypass Filter" "0,1" newline bitfld.long 0x00 5. "LBKM,Loop Back Mode" "0,1" bitfld.long 0x00 4. "MME,Master Mode Enable" "0,1" bitfld.long 0x00 3. "SSBL,Slave Mode Sync Break Length" "0,1" bitfld.long 0x00 2. "RBLM,Receiver Buffer Locked Mode" "0,1" bitfld.long 0x00 1. "SLEEP,Sleep Mode Request" "0,1" bitfld.long 0x00 0. "INIT,Initialization Mode Request" "0,1" line.long 0x04 "LINIER,LIN Interrupt Enable Register" bitfld.long 0x04 15. "SIZE,Stuck at Zero Interrupt Enable" "0,1" bitfld.long 0x04 14. "OCIE,Output Compare Interrupt Enable" "0,1" bitfld.long 0x04 13. "BEIE,Bit Error Interrupt Enable" "0,1" bitfld.long 0x04 12. "CEIE,Checksum Error Interrupt Enable" "0,1" bitfld.long 0x04 11. "HEIE,Header Error Interrupt Enable" "0,1" bitfld.long 0x04 8. "FEIE,Frame Error Interrupt Enable" "0,1" bitfld.long 0x04 7. "BOIE,Buffer Overrun Interrupt Enable" "0,1" newline bitfld.long 0x04 6. "LSIE,LIN State Interrupt Enable" "0,1" bitfld.long 0x04 5. "WUIE,Wakeup Interrupt Enable" "0,1" bitfld.long 0x04 3. "TOIE,Timeout Interrupt Enable" "0,1" bitfld.long 0x04 2. "DRIE,Data Reception Complete Interrupt Enable" "0,1" bitfld.long 0x04 1. "DTIE,Data Transmitted Interrupt Enable" "0,1" bitfld.long 0x04 0. "HRIE,Header Received Interrupt Enable" "0,1" line.long 0x08 "LINSR,LIN Status Register" bitfld.long 0x08 19. "AUTOSYNC_COMP,Autosynchronization Complete" "0,1" rbitfld.long 0x08 16.--18. "RDC,Receive Data Byte Count" "0,1,2,3,4,5,6,7" rbitfld.long 0x08 12.--15. "LINS,LIN State" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x08 8. "DRBNE,Data Reception Buffer not Empty Flag" "0,1" rbitfld.long 0x08 7. "RXBUSY,Receiver Busy Flag" "0,1" rbitfld.long 0x08 6. "RDI,Receiver Data Input" "0,1" newline bitfld.long 0x08 5. "WUF,Wakeup Flag" "0,1" bitfld.long 0x08 2. "DRF,Data Reception Completed Flag" "0,1" bitfld.long 0x08 1. "DTF,Data transmission completed flag" "0,1" bitfld.long 0x08 0. "HRF,Header Received Flag" "0,1" line.long 0x0C "LINESR,LIN Error Status Register" bitfld.long 0x0C 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x0C 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x0C 13. "BEF,Bit Error Flag" "0,1" bitfld.long 0x0C 12. "CEF,Checksum Error Flag" "0,1" bitfld.long 0x0C 11. "SFEF,Sync Field Error Flag" "0,1" bitfld.long 0x0C 10. "SDEF,Break Delimiter Error Flag" "0,1" bitfld.long 0x0C 9. "IPDEF,ID Parity Error Flag" "0,1" newline bitfld.long 0x0C 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x0C 7. "BOF,Buffer Overrun Flag" "0,1" bitfld.long 0x0C 0. "NF,Noise Flag" "0,1" line.long 0x10 "UARTCR,UART Mode Control Register" bitfld.long 0x10 31. "MIS,Monitor Idle State" "0,1" bitfld.long 0x10 28.--30. "CSP,Configurable Sample Point (i)" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--27. "OSR,Oversampling Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 23. "ROSE,Reduced Oversampling Enable" "0,1" bitfld.long 0x10 20.--22. "NEF,Number of Expected Frames" "0,1,2,3,4,5,6,7" bitfld.long 0x10 19. "DTU,Disable Timeout in UART Mode" "0,1" bitfld.long 0x10 17.--18. "SBUR,Number of Stop Bits in UART Reception Mode" "0,1,2,3" newline bitfld.long 0x10 16. "WLS,Special Word Length in UART Mode" "0,1" bitfld.long 0x10 13.--15. "TDFL_TFC,Transmitter Data Field Length / Tx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 10.--12. "RDFL_RFC,Receiver Data Field Length/Rx FIFO Counter" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "RFBM,Rx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 8. "TFBM,Tx FIFO / Buffer Mode" "0,1" bitfld.long 0x10 7. "WL1,Word Length in UART Mode" "0,1" bitfld.long 0x10 6. "PC1,Parity Control" "0,1" newline bitfld.long 0x10 5. "RxEn,Receiver Enable" "0,1" bitfld.long 0x10 4. "TxEn,Transmitter Enable" "0,1" bitfld.long 0x10 3. "PC0,Parity Control" "0,1" bitfld.long 0x10 2. "PCE,Parity Control Enable" "0,1" bitfld.long 0x10 1. "WL0,Word Length in UART Mode" "0,1" bitfld.long 0x10 0. "UART,UART Mode Enable" "0,1" line.long 0x14 "UARTSR,UART Mode Status Register" bitfld.long 0x14 15. "SZF,Stuck at Zero Flag" "0,1" bitfld.long 0x14 14. "OCF,Output Compare Flag" "0,1" bitfld.long 0x14 10.--13. "PE[3:0],Parity Error Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 9. "RMB,Release Message Buffer" "0,1" bitfld.long 0x14 8. "FEF,Framing Error Flag" "0,1" bitfld.long 0x14 7. "BOF,FIFO/buffer Overrun Flag" "0,1" rbitfld.long 0x14 6. "RDI,Receiver data input" "0,1" newline bitfld.long 0x14 5. "WUF,Wakeup Flag" "0,1" rbitfld.long 0x14 4. "RFNE,Receive FIFO not Empty" "0,1" bitfld.long 0x14 3. "TO,Timeout" "0,1" bitfld.long 0x14 2. "DRF_RFE,Data Reception Completed flag / Rx FIFO Empty Flag" "0,1" bitfld.long 0x14 1. "DTF_TFF,Data Transmission Completed Flag / Tx FIFO Full Flag" "0,1" bitfld.long 0x14 0. "NF,Noise Flag" "0,1" line.long 0x18 "LINTCSR,LIN Timeout Control Status Register" bitfld.long 0x18 10. "MODE,Timeout Counter Mode" "0,1" bitfld.long 0x18 9. "IOT,Idle on Timeout" "0,1" bitfld.long 0x18 8. "TOCE,Timeout Counter Enable" "0,1" hexmask.long.byte 0x18 0.--7. 1. "CNT,Counter Value" line.long 0x1C "LINOCR,LIN Output Compare Register" hexmask.long.byte 0x1C 8.--15. 1. "OC2,Output Compare Value 2" hexmask.long.byte 0x1C 0.--7. 1. "OC1,Output Compare Value 1" line.long 0x20 "LINTOCR,LIN Timeout Control Register" bitfld.long 0x20 8.--11. "RTO,Response Timeout Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x20 0.--6. 1. "HTO,Header Timeout value" line.long 0x24 "LINFBRR,LIN Fractional Baud Rate Register" bitfld.long 0x24 0.--3. "FBR,Fractional Baud Rate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x28 "LINIBRR,LIN Integer Baud Rate Register" hexmask.long.tbyte 0x28 0.--19. 1. "IBR,Integer baud Rate" line.long 0x2C "LINCFR,LIN Checksum Field Register" hexmask.long.byte 0x2C 0.--7. 1. "CF,Checksum Bits" line.long 0x30 "LINCR2,LIN Control Register 2" bitfld.long 0x30 15. "TBDE,Two-bit Delimiter Enable" "0,1" bitfld.long 0x30 14. "IOBE,Idle on Bit Error" "0,1" bitfld.long 0x30 13. "IOPE,Idle on Identifier Parity Error" "0,1" bitfld.long 0x30 12. "WURQ,Wakeup Generate Request" "0,1" bitfld.long 0x30 11. "DDRQ,Data Discard Request" "0,1" bitfld.long 0x30 10. "DTRQ,Data Transmission Request" "0,1" bitfld.long 0x30 9. "ABRQ,Abort Request" "0,1" newline bitfld.long 0x30 8. "HTRQ,Header Transmission Request" "0,1" line.long 0x34 "BIDR,Buffer Identifier Register" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "BDRL,Buffer Data Register Least Significant" hexmask.long.byte 0x38 24.--31. 1. "DATA3,Data Byte 3" hexmask.long.byte 0x38 16.--23. 1. "DATA2,Data Byte 2" hexmask.long.byte 0x38 8.--15. 1. "DATA1,Data Byte 1" hexmask.long.byte 0x38 0.--7. 1. "DATA0,Data Byte 0" line.long 0x3C "BDRM,Buffer Data Register Most Significant" hexmask.long.byte 0x3C 24.--31. 1. "DATA7,Data Byte 7" hexmask.long.byte 0x3C 16.--23. 1. "DATA6,Data Byte 6" hexmask.long.byte 0x3C 8.--15. 1. "DATA5,Data Byte 5" hexmask.long.byte 0x3C 0.--7. 1. "DATA4,Data Byte 4" line.long 0x40 "IFER,Identifier Filter Enable Register" hexmask.long.word 0x40 0.--15. 1. "FACT[x],Filter Active ? one bit for each identifier filter" rgroup.long ad:0xD00A0C44++0x03 line.long 0x00 "IFMI,Identifier Filter Match Index" bitfld.long 0x00 0.--4. "IFMI,Filter Match Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD00A0C48++0x4B line.long 0x00 "IFMR,Identifier Filter Mode Register" hexmask.long.byte 0x00 0.--7. 1. "IFM[n],Filter Mode" line.long 0x04 "IFCR0,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x04 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x04 9. "DIR,Direction" "0,1" bitfld.long 0x04 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x04 0.--5. 1. "ID,Identifier" line.long 0x08 "IFCR1,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x08 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 9. "DIR,Direction" "0,1" bitfld.long 0x08 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x08 0.--5. 1. "ID,Identifier" line.long 0x0C "IFCR2,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x0C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 9. "DIR,Direction" "0,1" bitfld.long 0x0C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x0C 0.--5. 1. "ID,Identifier" line.long 0x10 "IFCR3,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x10 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9. "DIR,Direction" "0,1" bitfld.long 0x10 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x10 0.--5. 1. "ID,Identifier" line.long 0x14 "IFCR4,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x14 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x14 9. "DIR,Direction" "0,1" bitfld.long 0x14 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x14 0.--5. 1. "ID,Identifier" line.long 0x18 "IFCR5,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x18 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x18 9. "DIR,Direction" "0,1" bitfld.long 0x18 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x18 0.--5. 1. "ID,Identifier" line.long 0x1C "IFCR6,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x1C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 9. "DIR,Direction" "0,1" bitfld.long 0x1C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x1C 0.--5. 1. "ID,Identifier" line.long 0x20 "IFCR7,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x20 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x20 9. "DIR,Direction" "0,1" bitfld.long 0x20 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x20 0.--5. 1. "ID,Identifier" line.long 0x24 "IFCR8,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x24 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x24 9. "DIR,Direction" "0,1" bitfld.long 0x24 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x24 0.--5. 1. "ID,Identifier" line.long 0x28 "IFCR9,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x28 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x28 9. "DIR,Direction" "0,1" bitfld.long 0x28 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x28 0.--5. 1. "ID,Identifier" line.long 0x2C "IFCR10,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x2C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 9. "DIR,Direction" "0,1" bitfld.long 0x2C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x2C 0.--5. 1. "ID,Identifier" line.long 0x30 "IFCR11,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x30 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x30 9. "DIR,Direction" "0,1" bitfld.long 0x30 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x30 0.--5. 1. "ID,Identifier" line.long 0x34 "IFCR12,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x34 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x34 9. "DIR,Direction" "0,1" bitfld.long 0x34 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x34 0.--5. 1. "ID,Identifier" line.long 0x38 "IFCR13,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x38 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x38 9. "DIR,Direction" "0,1" bitfld.long 0x38 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x38 0.--5. 1. "ID,Identifier" line.long 0x3C "IFCR14,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x3C 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 9. "DIR,Direction" "0,1" bitfld.long 0x3C 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x3C 0.--5. 1. "ID,Identifier" line.long 0x40 "IFCR15,Identifier Filter Control Register n (n=0~15)" bitfld.long 0x40 10.--12. "DFL,Data Field Length" "0,1,2,3,4,5,6,7" bitfld.long 0x40 9. "DIR,Direction" "0,1" bitfld.long 0x40 8. "CCS,Classic Checksum" "0,1" hexmask.long.byte 0x40 0.--5. 1. "ID,Identifier" line.long 0x44 "GCR,Global Control Register" bitfld.long 0x44 5. "TDFBM,Transmit Data First Bit MSB" "0,1" bitfld.long 0x44 4. "RDFBM,Receive Data First Bit MSB" "0,1" bitfld.long 0x44 3. "TDLIS,Transmit data level inversion selection" "0,1" bitfld.long 0x44 2. "RDLIS,Received Data Level Inversion Selection" "0,1" bitfld.long 0x44 1. "STOP,One or two Stop Bit Configuration" "0,1" bitfld.long 0x44 0. "SR,Soft Reset" "0,1" line.long 0x48 "UARTPTO,UART Preset Timeout Register" hexmask.long.word 0x48 0.--11. 1. "PTO,Preset Timeout" rgroup.long ad:0xD00A0C94++0x03 line.long 0x00 "UARTCTO,UART Current Timeout Register" hexmask.long.word 0x00 0.--11. 1. "CTO,Counter Timeout" group.long ad:0xD00A0C98++0x27 line.long 0x00 "DMATXE,DMA Tx Enable Register" bitfld.long 0x00 0. "DTE0,DMA Tx Channel 0 Enable" "0,1" line.long 0x04 "DMARXE,DMA Rx Enable Register" bitfld.long 0x04 0. "DRE0,DMA Rx Channel 0 Enable" "0,1" line.long 0x08 "SRR,Stop Request Register" bitfld.long 0x08 0. "STOPREQ,ASI Low-power Mode Enable" "0,1" line.long 0x0C "DRR,DMA_REQ Register" bitfld.long 0x0C 16. "DMATXREQ,DMA Tx Channels 0 Enable" "0,1" bitfld.long 0x0C 0. "DMARXREQ,DMA Rx Channels 0 Enable" "0,1" line.long 0x10 "TR,Trigger Register" bitfld.long 0x10 0. "TRIG,Header Transmission Trigger" "0,1" line.long 0x14 "CR0,Collision Register 0" hexmask.long.tbyte 0x14 9.--31. 1. "DCTH,Detection Collision Threshold" hexmask.long.byte 0x14 1.--8. 1. "DCS,Detection Collision Sample" bitfld.long 0x14 0. "DCENT,Detection Collision Enable" "0,1" line.long 0x18 "CR1,Collision Register 1" hexmask.long.byte 0x18 24.--31. 1. "CODCOTH,Collision Detection Comparison Threshold Value" hexmask.long.tbyte 0x18 0.--23. 1. "DFISJ,Data Frame Idle Sampling Judgment Interval" line.long 0x1C "ASTR,ASI Status Register" rbitfld.long 0x1C 6. "CDINT1CI,CDINT1 Clear Indication" "0,1" rbitfld.long 0x1C 5. "CDINT0CI,CDINT0 Clear Indication" "0,1" bitfld.long 0x1C 4. "STOPACK,Ipg Stop Ack" "0,1" bitfld.long 0x1C 3. "CDINT1,Collision Detection Interrupt 1" "0,1" bitfld.long 0x1C 2. "CDINT0,Collision Detection Interrupt 0" "0,1" bitfld.long 0x1C 1. "CDINT,Collision Detection Interrupt" "0,1" bitfld.long 0x1C 0. "AAINT,ASI All Interrupts" "0,1" line.long 0x20 "AINTENR,ASI Interrupt Enabled Register" bitfld.long 0x20 0. "AAINTEN,ASI all Interrupts Enabled" "0,1" line.long 0x24 "APBEMR,APB Bus Error Mask Register" bitfld.long 0x24 0. "APBEMP,APB Bus Error Mask Register" "0,1" tree.end tree.end tree "CAN0" rgroup.long ad:0xC0090000++0x03 line.long 0x00 "CREL0,Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Time Stamp Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Time Stamp Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Time Stamp Day" rgroup.long ad:0xC0091800++0x03 line.long 0x00 "CREL1,Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Time Stamp Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Time Stamp Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Time Stamp Day" rgroup.long ad:0xC0093000++0x03 line.long 0x00 "CREL2,Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Time Stamp Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Time Stamp Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Time Stamp Day" rgroup.long ad:0xC0090004++0x03 line.long 0x00 "ENDN0,Endian Register i (i=0~2)" rgroup.long ad:0xC0091804++0x03 line.long 0x00 "ENDN1,Endian Register i (i=0~2)" rgroup.long ad:0xC0093004++0x03 line.long 0x00 "ENDN2,Endian Register i (i=0~2)" group.long ad:0xC0090008++0x03 line.long 0x00 "CUST0,Customer Register i (i=0~2)" group.long ad:0xC0091808++0x03 line.long 0x00 "CUST1,Customer Register i (i=0~2)" group.long ad:0xC0093008++0x03 line.long 0x00 "CUST2,Customer Register i (i=0~2)" group.long ad:0xC009000C++0x03 line.long 0x00 "DBTP0,Data Bit Timing & Prescaler Register i (i=0~2)" bitfld.long 0x00 23. "TDC,Transmitter Delay Compensation" "0,1" bitfld.long 0x00 16.--20. "DBRP,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "DTSEG1,Data time segment before sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. "DTSEG2,Data time segment after sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "DSJW,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC009180C++0x03 line.long 0x00 "DBTP1,Data Bit Timing & Prescaler Register i (i=0~2)" bitfld.long 0x00 23. "TDC,Transmitter Delay Compensation" "0,1" bitfld.long 0x00 16.--20. "DBRP,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "DTSEG1,Data time segment before sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. "DTSEG2,Data time segment after sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "DSJW,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC009300C++0x03 line.long 0x00 "DBTP2,Data Bit Timing & Prescaler Register i (i=0~2)" bitfld.long 0x00 23. "TDC,Transmitter Delay Compensation" "0,1" bitfld.long 0x00 16.--20. "DBRP,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "DTSEG1,Data time segment before sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. "DTSEG2,Data time segment after sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "DSJW,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC0090010++0x03 line.long 0x00 "TEST0,Test Register i (i=0~2)" rbitfld.long 0x00 21. "SVAL,Started Valid" "0,1" rbitfld.long 0x00 16.--20. "TXBNS,Tx Buffer Number Started" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 13. "PVAL,Prepared Valid" "0,1" rbitfld.long 0x00 8.--12. "TXBNP,Tx Buffer Number Prepared" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 7. "RX,Receive Pin" "0,1" newline bitfld.long 0x00 5.--6. "TX,Control of Transmit Pin" "0,1,2,3" bitfld.long 0x00 4. "LBCK,Loop Back Mode" "0,1" group.long ad:0xC0091810++0x03 line.long 0x00 "TEST1,Test Register i (i=0~2)" rbitfld.long 0x00 21. "SVAL,Started Valid" "0,1" rbitfld.long 0x00 16.--20. "TXBNS,Tx Buffer Number Started" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 13. "PVAL,Prepared Valid" "0,1" rbitfld.long 0x00 8.--12. "TXBNP,Tx Buffer Number Prepared" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 7. "RX,Receive Pin" "0,1" newline bitfld.long 0x00 5.--6. "TX,Control of Transmit Pin" "0,1,2,3" bitfld.long 0x00 4. "LBCK,Loop Back Mode" "0,1" group.long ad:0xC0093010++0x03 line.long 0x00 "TEST2,Test Register i (i=0~2)" rbitfld.long 0x00 21. "SVAL,Started Valid" "0,1" rbitfld.long 0x00 16.--20. "TXBNS,Tx Buffer Number Started" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 13. "PVAL,Prepared Valid" "0,1" rbitfld.long 0x00 8.--12. "TXBNP,Tx Buffer Number Prepared" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 7. "RX,Receive Pin" "0,1" newline bitfld.long 0x00 5.--6. "TX,Control of Transmit Pin" "0,1,2,3" bitfld.long 0x00 4. "LBCK,Loop Back Mode" "0,1" rgroup.long ad:0xC0090014++0x03 line.long 0x00 "RWD0,RAM Watchdog Register i (i=0~2)" hexmask.long.byte 0x00 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0x00 0.--7. 1. "WDC,Watchdog Configuration" rgroup.long ad:0xC0091814++0x03 line.long 0x00 "RWD1,RAM Watchdog Register i (i=0~2)" hexmask.long.byte 0x00 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0x00 0.--7. 1. "WDC,Watchdog Configuration" rgroup.long ad:0xC0093014++0x03 line.long 0x00 "RWD2,RAM Watchdog Register i (i=0~2)" hexmask.long.byte 0x00 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0x00 0.--7. 1. "WDC,Watchdog Configuration" group.long ad:0xC0090018++0x03 line.long 0x00 "CCCR0,CC Control Register i (i=0~2)" bitfld.long 0x00 15. "NonISOOperation,Non ISO Operation" "0,1" bitfld.long 0x00 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x00 13. "EFBI,Edge Filtering during Bus Integration" "0,1" bitfld.long 0x00 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x00 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x00 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x00 7. "TEST,Test Mode Enable" "0,1" bitfld.long 0x00 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x00 5. "MON,Bus Monitoring Mode" "0,1" bitfld.long 0x00 4. "CSR,Clock Stop Request" "0,1" newline bitfld.long 0x00 3. "CSA,Clock Stop Acknowledge" "0,1" bitfld.long 0x00 2. "ASM,Restricted Operation Mode" "0,1" bitfld.long 0x00 1. "CCE,Configuration Change Enable" "0,1" bitfld.long 0x00 0. "INIT,Initialization" "0,1" group.long ad:0xC0091818++0x03 line.long 0x00 "CCCR1,CC Control Register i (i=0~2)" bitfld.long 0x00 15. "NonISOOperation,Non ISO Operation" "0,1" bitfld.long 0x00 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x00 13. "EFBI,Edge Filtering during Bus Integration" "0,1" bitfld.long 0x00 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x00 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x00 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x00 7. "TEST,Test Mode Enable" "0,1" bitfld.long 0x00 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x00 5. "MON,Bus Monitoring Mode" "0,1" bitfld.long 0x00 4. "CSR,Clock Stop Request" "0,1" newline bitfld.long 0x00 3. "CSA,Clock Stop Acknowledge" "0,1" bitfld.long 0x00 2. "ASM,Restricted Operation Mode" "0,1" bitfld.long 0x00 1. "CCE,Configuration Change Enable" "0,1" bitfld.long 0x00 0. "INIT,Initialization" "0,1" group.long ad:0xC0093018++0x03 line.long 0x00 "CCCR2,CC Control Register i (i=0~2)" bitfld.long 0x00 15. "NonISOOperation,Non ISO Operation" "0,1" bitfld.long 0x00 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x00 13. "EFBI,Edge Filtering during Bus Integration" "0,1" bitfld.long 0x00 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x00 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x00 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x00 7. "TEST,Test Mode Enable" "0,1" bitfld.long 0x00 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x00 5. "MON,Bus Monitoring Mode" "0,1" bitfld.long 0x00 4. "CSR,Clock Stop Request" "0,1" newline bitfld.long 0x00 3. "CSA,Clock Stop Acknowledge" "0,1" bitfld.long 0x00 2. "ASM,Restricted Operation Mode" "0,1" bitfld.long 0x00 1. "CCE,Configuration Change Enable" "0,1" bitfld.long 0x00 0. "INIT,Initialization" "0,1" group.long ad:0xC009001C++0x03 line.long 0x00 "NBTP0,Nominal Bit Timing & Prescaler Register i (i=0~2)" hexmask.long.byte 0x00 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x00 16.--24. 1. "NBRP,Nominal Bit Rate Prescaler" hexmask.long.byte 0x00 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x00 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" group.long ad:0xC009181C++0x03 line.long 0x00 "NBTP1,Nominal Bit Timing & Prescaler Register i (i=0~2)" hexmask.long.byte 0x00 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x00 16.--24. 1. "NBRP,Nominal Bit Rate Prescaler" hexmask.long.byte 0x00 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x00 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" group.long ad:0xC009301C++0x03 line.long 0x00 "NBTP2,Nominal Bit Timing & Prescaler Register i (i=0~2)" hexmask.long.byte 0x00 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x00 16.--24. 1. "NBRP,Nominal Bit Rate Prescaler" hexmask.long.byte 0x00 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x00 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" rgroup.long ad:0xC0090020++0x03 line.long 0x00 "TSCC0,Timestamp Counter Configuration Register i (i=0~2)" bitfld.long 0x00 16.--19. "TCP,Timestamp Counter Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. "TSS,Timestamp Select" "0,1,2,3" rgroup.long ad:0xC0091820++0x03 line.long 0x00 "TSCC1,Timestamp Counter Configuration Register i (i=0~2)" bitfld.long 0x00 16.--19. "TCP,Timestamp Counter Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. "TSS,Timestamp Select" "0,1,2,3" rgroup.long ad:0xC0093020++0x03 line.long 0x00 "TSCC2,Timestamp Counter Configuration Register i (i=0~2)" bitfld.long 0x00 16.--19. "TCP,Timestamp Counter Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. "TSS,Timestamp Select" "0,1,2,3" rgroup.long ad:0xC0090024++0x03 line.long 0x00 "TSCV0,Timestamp Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TSC,Timestamp Counter" rgroup.long ad:0xC0091824++0x03 line.long 0x00 "TSCV1,Timestamp Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TSC,Timestamp Counter" rgroup.long ad:0xC0093024++0x03 line.long 0x00 "TSCV2,Timestamp Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TSC,Timestamp Counter" group.long ad:0xC0090028++0x03 line.long 0x00 "TOCC0,Timeout Counter Configuration Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x00 1.--2. "TOS,Timeout Select" "0,1,2,3" bitfld.long 0x00 0. "ETOC,Enable Timeout Counter" "0,1" group.long ad:0xC0091828++0x03 line.long 0x00 "TOCC1,Timeout Counter Configuration Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x00 1.--2. "TOS,Timeout Select" "0,1,2,3" bitfld.long 0x00 0. "ETOC,Enable Timeout Counter" "0,1" group.long ad:0xC0093028++0x03 line.long 0x00 "TOCC2,Timeout Counter Configuration Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x00 1.--2. "TOS,Timeout Select" "0,1,2,3" bitfld.long 0x00 0. "ETOC,Enable Timeout Counter" "0,1" group.long ad:0xC009002C++0x03 line.long 0x00 "TOCV0,Timeout Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TOC,Timeout Counter" group.long ad:0xC009182C++0x03 line.long 0x00 "TOCV1,Timeout Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TOC,Timeout Counter" group.long ad:0xC009302C++0x03 line.long 0x00 "TOCV2,Timeout Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TOC,Timeout Counter" group.long ad:0xC0090040++0x03 line.long 0x00 "ECR0,Error Counter Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x00 15. "RP,Receive Error Passive" "0,1" hexmask.long.byte 0x00 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x00 0.--7. 1. "TEC,Transmit Error Counter" group.long ad:0xC0091840++0x03 line.long 0x00 "ECR1,Error Counter Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x00 15. "RP,Receive Error Passive" "0,1" hexmask.long.byte 0x00 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x00 0.--7. 1. "TEC,Transmit Error Counter" group.long ad:0xC0093040++0x03 line.long 0x00 "ECR2,Error Counter Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x00 15. "RP,Receive Error Passive" "0,1" hexmask.long.byte 0x00 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x00 0.--7. 1. "TEC,Transmit Error Counter" group.long ad:0xC0090044++0x03 line.long 0x00 "PSR0,Protocol Status Register i (i=0~2)" hexmask.long.byte 0x00 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x00 14. "PXE,Protocol Exception Event" "0,1" bitfld.long 0x00 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x00 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" bitfld.long 0x00 11. "RESI,ESI flag of last received CAN FD Message" "0,1" newline bitfld.long 0x00 8.--10. "DLEC,Data Phase Last Error Code" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "BO,Bus Off Status" "0,1" bitfld.long 0x00 6. "EW,Warning Status" "0,1" bitfld.long 0x00 5. "EP,Error Passive" "0,1" rbitfld.long 0x00 3.--4. "ACT,Activity" "0,1,2,3" newline bitfld.long 0x00 0.--2. "LEC,Last Error Code" "0,1,2,3,4,5,6,7" group.long ad:0xC0091844++0x03 line.long 0x00 "PSR1,Protocol Status Register i (i=0~2)" hexmask.long.byte 0x00 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x00 14. "PXE,Protocol Exception Event" "0,1" bitfld.long 0x00 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x00 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" bitfld.long 0x00 11. "RESI,ESI flag of last received CAN FD Message" "0,1" newline bitfld.long 0x00 8.--10. "DLEC,Data Phase Last Error Code" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "BO,Bus Off Status" "0,1" bitfld.long 0x00 6. "EW,Warning Status" "0,1" bitfld.long 0x00 5. "EP,Error Passive" "0,1" rbitfld.long 0x00 3.--4. "ACT,Activity" "0,1,2,3" newline bitfld.long 0x00 0.--2. "LEC,Last Error Code" "0,1,2,3,4,5,6,7" group.long ad:0xC0093044++0x03 line.long 0x00 "PSR2,Protocol Status Register i (i=0~2)" hexmask.long.byte 0x00 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x00 14. "PXE,Protocol Exception Event" "0,1" bitfld.long 0x00 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x00 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" bitfld.long 0x00 11. "RESI,ESI flag of last received CAN FD Message" "0,1" newline bitfld.long 0x00 8.--10. "DLEC,Data Phase Last Error Code" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "BO,Bus Off Status" "0,1" bitfld.long 0x00 6. "EW,Warning Status" "0,1" bitfld.long 0x00 5. "EP,Error Passive" "0,1" rbitfld.long 0x00 3.--4. "ACT,Activity" "0,1,2,3" newline bitfld.long 0x00 0.--2. "LEC,Last Error Code" "0,1,2,3,4,5,6,7" group.long ad:0xC0090048++0x03 line.long 0x00 "TDCR0,Transmitter Delay Compensation Register i (i=0~2)" hexmask.long.byte 0x00 8.--14. 1. "TDCO,Transmitter Delay Compensation SSP Offset" hexmask.long.byte 0x00 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Window Length" group.long ad:0xC0091848++0x03 line.long 0x00 "TDCR1,Transmitter Delay Compensation Register i (i=0~2)" hexmask.long.byte 0x00 8.--14. 1. "TDCO,Transmitter Delay Compensation SSP Offset" hexmask.long.byte 0x00 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Window Length" group.long ad:0xC0093048++0x03 line.long 0x00 "TDCR2,Transmitter Delay Compensation Register i (i=0~2)" hexmask.long.byte 0x00 8.--14. 1. "TDCO,Transmitter Delay Compensation SSP Offset" hexmask.long.byte 0x00 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Window Length" group.long ad:0xC009004C++0x03 line.long 0x00 "RESERVED0,Reserved" group.long ad:0xC009184C++0x03 line.long 0x00 "RESERVED1,Reserved" group.long ad:0xC009304C++0x03 line.long 0x00 "RESERVED2,Reserved" group.long ad:0xC0090050++0x03 line.long 0x00 "IR0,Interrupt Register i (i=0~2)" bitfld.long 0x00 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x00 28. "PED,Protocol Error in Data Phase (Data Bit Time is used)" "0,1" bitfld.long 0x00 27. "PEA,Protocol Error in Arbitration Phase (Nominal Bit Time is used)" "0,1" bitfld.long 0x00 26. "WDI,Watchdog Interrupt" "0,1" bitfld.long 0x00 25. "BO,Bus Off Status" "0,1" newline bitfld.long 0x00 24. "EW,Warning Status" "0,1" bitfld.long 0x00 23. "EP,Error Passive" "0,1" bitfld.long 0x00 22. "ELO,Error Logging Overflow" "0,1" bitfld.long 0x00 21. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 20. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x00 18. "TOO,Timeout Occurred" "0,1" bitfld.long 0x00 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x00 16. "TSW,Timestamp Wraparound" "0,1" bitfld.long 0x00 15. "TEFL,Tx Event FIFO Element Lost" "0,1" newline bitfld.long 0x00 14. "TEFF,Tx Event FIFO Full" "0,1" bitfld.long 0x00 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x00 12. "TEFN,Tx Event FIFO New Entry" "0,1" bitfld.long 0x00 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x00 10. "FCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x00 9. "TC,Transmission Completed" "0,1" bitfld.long 0x00 8. "HPM,High Priority Message" "0,1" bitfld.long 0x00 7. "FR1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 6. "RF1F,Rx FIFO 1 Full" "0,1" bitfld.long 0x00 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" newline bitfld.long 0x00 4. "RF1N,Rx FIFO 1 New Message" "0,1" bitfld.long 0x00 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 2. "RF0F,Rx FIFO 0 Full" "0,1" bitfld.long 0x00 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x00 0. "RF0N,Rx FIFO 0 New Message" "0,1" group.long ad:0xC0091850++0x03 line.long 0x00 "IR1,Interrupt Register i (i=0~2)" bitfld.long 0x00 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x00 28. "PED,Protocol Error in Data Phase (Data Bit Time is used)" "0,1" bitfld.long 0x00 27. "PEA,Protocol Error in Arbitration Phase (Nominal Bit Time is used)" "0,1" bitfld.long 0x00 26. "WDI,Watchdog Interrupt" "0,1" bitfld.long 0x00 25. "BO,Bus Off Status" "0,1" newline bitfld.long 0x00 24. "EW,Warning Status" "0,1" bitfld.long 0x00 23. "EP,Error Passive" "0,1" bitfld.long 0x00 22. "ELO,Error Logging Overflow" "0,1" bitfld.long 0x00 21. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 20. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x00 18. "TOO,Timeout Occurred" "0,1" bitfld.long 0x00 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x00 16. "TSW,Timestamp Wraparound" "0,1" bitfld.long 0x00 15. "TEFL,Tx Event FIFO Element Lost" "0,1" newline bitfld.long 0x00 14. "TEFF,Tx Event FIFO Full" "0,1" bitfld.long 0x00 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x00 12. "TEFN,Tx Event FIFO New Entry" "0,1" bitfld.long 0x00 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x00 10. "FCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x00 9. "TC,Transmission Completed" "0,1" bitfld.long 0x00 8. "HPM,High Priority Message" "0,1" bitfld.long 0x00 7. "FR1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 6. "RF1F,Rx FIFO 1 Full" "0,1" bitfld.long 0x00 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" newline bitfld.long 0x00 4. "RF1N,Rx FIFO 1 New Message" "0,1" bitfld.long 0x00 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 2. "RF0F,Rx FIFO 0 Full" "0,1" bitfld.long 0x00 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x00 0. "RF0N,Rx FIFO 0 New Message" "0,1" group.long ad:0xC0093050++0x03 line.long 0x00 "IR2,Interrupt Register i (i=0~2)" bitfld.long 0x00 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x00 28. "PED,Protocol Error in Data Phase (Data Bit Time is used)" "0,1" bitfld.long 0x00 27. "PEA,Protocol Error in Arbitration Phase (Nominal Bit Time is used)" "0,1" bitfld.long 0x00 26. "WDI,Watchdog Interrupt" "0,1" bitfld.long 0x00 25. "BO,Bus Off Status" "0,1" newline bitfld.long 0x00 24. "EW,Warning Status" "0,1" bitfld.long 0x00 23. "EP,Error Passive" "0,1" bitfld.long 0x00 22. "ELO,Error Logging Overflow" "0,1" bitfld.long 0x00 21. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 20. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x00 18. "TOO,Timeout Occurred" "0,1" bitfld.long 0x00 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x00 16. "TSW,Timestamp Wraparound" "0,1" bitfld.long 0x00 15. "TEFL,Tx Event FIFO Element Lost" "0,1" newline bitfld.long 0x00 14. "TEFF,Tx Event FIFO Full" "0,1" bitfld.long 0x00 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x00 12. "TEFN,Tx Event FIFO New Entry" "0,1" bitfld.long 0x00 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x00 10. "FCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x00 9. "TC,Transmission Completed" "0,1" bitfld.long 0x00 8. "HPM,High Priority Message" "0,1" bitfld.long 0x00 7. "FR1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 6. "RF1F,Rx FIFO 1 Full" "0,1" bitfld.long 0x00 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" newline bitfld.long 0x00 4. "RF1N,Rx FIFO 1 New Message" "0,1" bitfld.long 0x00 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 2. "RF0F,Rx FIFO 0 Full" "0,1" bitfld.long 0x00 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x00 0. "RF0N,Rx FIFO 0 New Message" "0,1" group.long ad:0xC0090054++0x03 line.long 0x00 "IE0,Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDE,Protocol Error in Data Phase (Data Bit Time is used) Enable" "0,1" bitfld.long 0x00 27. "PEAE,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Enable" "0,1" bitfld.long 0x00 26. "WDIE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BOE,Bus Off Status Enable" "0,1" newline bitfld.long 0x00 24. "EWE,Warning Status Enable" "0,1" bitfld.long 0x00 23. "EPE,Error Passive Enable" "0,1" bitfld.long 0x00 22. "ELOE,Error Logging Overflow Enable" "0,1" bitfld.long 0x00 21. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 20. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 19. "DRXE,Message stored to Dedicated Rx Buffer Enable" "0,1" bitfld.long 0x00 18. "TOOE,Timeout Occurred Enable" "0,1" bitfld.long 0x00 17. "MRAFE,Message RAM Access Failure Enable" "0,1" bitfld.long 0x00 16. "TSWE,Timestamp Wraparound Enable" "0,1" bitfld.long 0x00 15. "TEFLE,Tx Event FIFO Element Lost Enable" "0,1" newline bitfld.long 0x00 14. "TEFFE,Tx Event FIFO Full Enable" "0,1" bitfld.long 0x00 13. "TEFWE,Tx Event FIFO Watermark Reached Enable" "0,1" bitfld.long 0x00 12. "TEFNE,Tx Event FIFO New Entry Enable" "0,1" bitfld.long 0x00 11. "TFEE,Tx FIFO Empty Enable" "0,1" bitfld.long 0x00 10. "FCFE,Transmission Cancellation Finished Enable" "0,1" newline bitfld.long 0x00 9. "TCE,Transmission Completed Enable" "0,1" bitfld.long 0x00 8. "HPME,High Priority Message Enable" "0,1" bitfld.long 0x00 7. "FR1LE,Rx FIFO 1 Message Lost Enable" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WE,Rx FIFO 1 Watermark Reached Enable" "0,1" newline bitfld.long 0x00 4. "RF1NE,Rx FIFO 1 New Message Enable" "0,1" bitfld.long 0x00 3. "RF0LE,Rx FIFO 0 Message Lost Enable" "0,1" bitfld.long 0x00 2. "RF0FE,Rx FIFO 0 Full Enable" "0,1" bitfld.long 0x00 1. "RF0WE,Rx FIFO 0 Watermark Reached Enable" "0,1" bitfld.long 0x00 0. "RF0NE,Rx FIFO 0 New Message Enable" "0,1" group.long ad:0xC0091854++0x03 line.long 0x00 "IE1,Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDE,Protocol Error in Data Phase (Data Bit Time is used) Enable" "0,1" bitfld.long 0x00 27. "PEAE,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Enable" "0,1" bitfld.long 0x00 26. "WDIE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BOE,Bus Off Status Enable" "0,1" newline bitfld.long 0x00 24. "EWE,Warning Status Enable" "0,1" bitfld.long 0x00 23. "EPE,Error Passive Enable" "0,1" bitfld.long 0x00 22. "ELOE,Error Logging Overflow Enable" "0,1" bitfld.long 0x00 21. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 20. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 19. "DRXE,Message stored to Dedicated Rx Buffer Enable" "0,1" bitfld.long 0x00 18. "TOOE,Timeout Occurred Enable" "0,1" bitfld.long 0x00 17. "MRAFE,Message RAM Access Failure Enable" "0,1" bitfld.long 0x00 16. "TSWE,Timestamp Wraparound Enable" "0,1" bitfld.long 0x00 15. "TEFLE,Tx Event FIFO Element Lost Enable" "0,1" newline bitfld.long 0x00 14. "TEFFE,Tx Event FIFO Full Enable" "0,1" bitfld.long 0x00 13. "TEFWE,Tx Event FIFO Watermark Reached Enable" "0,1" bitfld.long 0x00 12. "TEFNE,Tx Event FIFO New Entry Enable" "0,1" bitfld.long 0x00 11. "TFEE,Tx FIFO Empty Enable" "0,1" bitfld.long 0x00 10. "FCFE,Transmission Cancellation Finished Enable" "0,1" newline bitfld.long 0x00 9. "TCE,Transmission Completed Enable" "0,1" bitfld.long 0x00 8. "HPME,High Priority Message Enable" "0,1" bitfld.long 0x00 7. "FR1LE,Rx FIFO 1 Message Lost Enable" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WE,Rx FIFO 1 Watermark Reached Enable" "0,1" newline bitfld.long 0x00 4. "RF1NE,Rx FIFO 1 New Message Enable" "0,1" bitfld.long 0x00 3. "RF0LE,Rx FIFO 0 Message Lost Enable" "0,1" bitfld.long 0x00 2. "RF0FE,Rx FIFO 0 Full Enable" "0,1" bitfld.long 0x00 1. "RF0WE,Rx FIFO 0 Watermark Reached Enable" "0,1" bitfld.long 0x00 0. "RF0NE,Rx FIFO 0 New Message Enable" "0,1" group.long ad:0xC0093054++0x03 line.long 0x00 "IE2,Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDE,Protocol Error in Data Phase (Data Bit Time is used) Enable" "0,1" bitfld.long 0x00 27. "PEAE,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Enable" "0,1" bitfld.long 0x00 26. "WDIE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BOE,Bus Off Status Enable" "0,1" newline bitfld.long 0x00 24. "EWE,Warning Status Enable" "0,1" bitfld.long 0x00 23. "EPE,Error Passive Enable" "0,1" bitfld.long 0x00 22. "ELOE,Error Logging Overflow Enable" "0,1" bitfld.long 0x00 21. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 20. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 19. "DRXE,Message stored to Dedicated Rx Buffer Enable" "0,1" bitfld.long 0x00 18. "TOOE,Timeout Occurred Enable" "0,1" bitfld.long 0x00 17. "MRAFE,Message RAM Access Failure Enable" "0,1" bitfld.long 0x00 16. "TSWE,Timestamp Wraparound Enable" "0,1" bitfld.long 0x00 15. "TEFLE,Tx Event FIFO Element Lost Enable" "0,1" newline bitfld.long 0x00 14. "TEFFE,Tx Event FIFO Full Enable" "0,1" bitfld.long 0x00 13. "TEFWE,Tx Event FIFO Watermark Reached Enable" "0,1" bitfld.long 0x00 12. "TEFNE,Tx Event FIFO New Entry Enable" "0,1" bitfld.long 0x00 11. "TFEE,Tx FIFO Empty Enable" "0,1" bitfld.long 0x00 10. "FCFE,Transmission Cancellation Finished Enable" "0,1" newline bitfld.long 0x00 9. "TCE,Transmission Completed Enable" "0,1" bitfld.long 0x00 8. "HPME,High Priority Message Enable" "0,1" bitfld.long 0x00 7. "FR1LE,Rx FIFO 1 Message Lost Enable" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WE,Rx FIFO 1 Watermark Reached Enable" "0,1" newline bitfld.long 0x00 4. "RF1NE,Rx FIFO 1 New Message Enable" "0,1" bitfld.long 0x00 3. "RF0LE,Rx FIFO 0 Message Lost Enable" "0,1" bitfld.long 0x00 2. "RF0FE,Rx FIFO 0 Full Enable" "0,1" bitfld.long 0x00 1. "RF0WE,Rx FIFO 0 Watermark Reached Enable" "0,1" bitfld.long 0x00 0. "RF0NE,Rx FIFO 0 New Message Enable" "0,1" group.long ad:0xC0090058++0x03 line.long 0x00 "ILS0,Interrupt Line Select Register i (i=0~2)" bitfld.long 0x00 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x00 28. "PEDL,Protocol Error in Data Phase (Data Bit Time is used) Line" "0,1" bitfld.long 0x00 27. "PEAL,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Line" "0,1" bitfld.long 0x00 26. "WDIL,Watchdog Interrupt Line" "0,1" bitfld.long 0x00 25. "BOL,Bus Off Status Line" "0,1" newline bitfld.long 0x00 24. "EWL,Warning Status Line" "0,1" bitfld.long 0x00 23. "EPL,Error Passive Line" "0,1" bitfld.long 0x00 22. "ELOL,Error Logging Overflow Line" "0,1" bitfld.long 0x00 21. "BEUL,Bit Error Uncorrected Line" "0,1" bitfld.long 0x00 20. "BECL,Bit Error Corrected Line" "0,1" newline bitfld.long 0x00 19. "DRXL,Message stored to Dedicated Rx Buffer Line" "0,1" bitfld.long 0x00 18. "TOOL,Timeout Occurred Line" "0,1" bitfld.long 0x00 17. "MRAFL,Message RAM Access Failure Line" "0,1" bitfld.long 0x00 16. "TSWL,Timestamp Wraparound Line" "0,1" bitfld.long 0x00 15. "TEFLL,Tx Event FIFO Element Lost Line" "0,1" newline bitfld.long 0x00 14. "TEFFL,Tx Event FIFO Full Line" "0,1" bitfld.long 0x00 13. "TEFWL,Tx Event FIFO Watermark Reached Line" "0,1" bitfld.long 0x00 12. "TEFNL,Tx Event FIFO New Entry Line" "0,1" bitfld.long 0x00 11. "TFEL,Tx FIFO Empty Line" "0,1" bitfld.long 0x00 10. "FCFL,Transmission Cancellation Finished Line" "0,1" newline bitfld.long 0x00 9. "TCL,Transmission Completed Line" "0,1" bitfld.long 0x00 8. "HPML,High Priority Message Line" "0,1" bitfld.long 0x00 7. "FR1LL,Rx FIFO 1 Message Lost Line" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WL,Rx FIFO 1 Watermark Reached Line" "0,1" newline bitfld.long 0x00 4. "RF1NL,Rx FIFO 1 New Message Line" "0,1" bitfld.long 0x00 3. "RF0LL,Rx FIFO 0 Message Lost Line" "0,1" bitfld.long 0x00 2. "RF0FL,Rx FIFO 0 Full Line" "0,1" bitfld.long 0x00 1. "RF0WL,Rx FIFO 0 Watermark Reached Line" "0,1" bitfld.long 0x00 0. "RF0NL,Rx FIFO 0 New Message Line" "0,1" group.long ad:0xC0091858++0x03 line.long 0x00 "ILS1,Interrupt Line Select Register i (i=0~2)" bitfld.long 0x00 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x00 28. "PEDL,Protocol Error in Data Phase (Data Bit Time is used) Line" "0,1" bitfld.long 0x00 27. "PEAL,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Line" "0,1" bitfld.long 0x00 26. "WDIL,Watchdog Interrupt Line" "0,1" bitfld.long 0x00 25. "BOL,Bus Off Status Line" "0,1" newline bitfld.long 0x00 24. "EWL,Warning Status Line" "0,1" bitfld.long 0x00 23. "EPL,Error Passive Line" "0,1" bitfld.long 0x00 22. "ELOL,Error Logging Overflow Line" "0,1" bitfld.long 0x00 21. "BEUL,Bit Error Uncorrected Line" "0,1" bitfld.long 0x00 20. "BECL,Bit Error Corrected Line" "0,1" newline bitfld.long 0x00 19. "DRXL,Message stored to Dedicated Rx Buffer Line" "0,1" bitfld.long 0x00 18. "TOOL,Timeout Occurred Line" "0,1" bitfld.long 0x00 17. "MRAFL,Message RAM Access Failure Line" "0,1" bitfld.long 0x00 16. "TSWL,Timestamp Wraparound Line" "0,1" bitfld.long 0x00 15. "TEFLL,Tx Event FIFO Element Lost Line" "0,1" newline bitfld.long 0x00 14. "TEFFL,Tx Event FIFO Full Line" "0,1" bitfld.long 0x00 13. "TEFWL,Tx Event FIFO Watermark Reached Line" "0,1" bitfld.long 0x00 12. "TEFNL,Tx Event FIFO New Entry Line" "0,1" bitfld.long 0x00 11. "TFEL,Tx FIFO Empty Line" "0,1" bitfld.long 0x00 10. "FCFL,Transmission Cancellation Finished Line" "0,1" newline bitfld.long 0x00 9. "TCL,Transmission Completed Line" "0,1" bitfld.long 0x00 8. "HPML,High Priority Message Line" "0,1" bitfld.long 0x00 7. "FR1LL,Rx FIFO 1 Message Lost Line" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WL,Rx FIFO 1 Watermark Reached Line" "0,1" newline bitfld.long 0x00 4. "RF1NL,Rx FIFO 1 New Message Line" "0,1" bitfld.long 0x00 3. "RF0LL,Rx FIFO 0 Message Lost Line" "0,1" bitfld.long 0x00 2. "RF0FL,Rx FIFO 0 Full Line" "0,1" bitfld.long 0x00 1. "RF0WL,Rx FIFO 0 Watermark Reached Line" "0,1" bitfld.long 0x00 0. "RF0NL,Rx FIFO 0 New Message Line" "0,1" group.long ad:0xC0093058++0x03 line.long 0x00 "ILS2,Interrupt Line Select Register i (i=0~2)" bitfld.long 0x00 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x00 28. "PEDL,Protocol Error in Data Phase (Data Bit Time is used) Line" "0,1" bitfld.long 0x00 27. "PEAL,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Line" "0,1" bitfld.long 0x00 26. "WDIL,Watchdog Interrupt Line" "0,1" bitfld.long 0x00 25. "BOL,Bus Off Status Line" "0,1" newline bitfld.long 0x00 24. "EWL,Warning Status Line" "0,1" bitfld.long 0x00 23. "EPL,Error Passive Line" "0,1" bitfld.long 0x00 22. "ELOL,Error Logging Overflow Line" "0,1" bitfld.long 0x00 21. "BEUL,Bit Error Uncorrected Line" "0,1" bitfld.long 0x00 20. "BECL,Bit Error Corrected Line" "0,1" newline bitfld.long 0x00 19. "DRXL,Message stored to Dedicated Rx Buffer Line" "0,1" bitfld.long 0x00 18. "TOOL,Timeout Occurred Line" "0,1" bitfld.long 0x00 17. "MRAFL,Message RAM Access Failure Line" "0,1" bitfld.long 0x00 16. "TSWL,Timestamp Wraparound Line" "0,1" bitfld.long 0x00 15. "TEFLL,Tx Event FIFO Element Lost Line" "0,1" newline bitfld.long 0x00 14. "TEFFL,Tx Event FIFO Full Line" "0,1" bitfld.long 0x00 13. "TEFWL,Tx Event FIFO Watermark Reached Line" "0,1" bitfld.long 0x00 12. "TEFNL,Tx Event FIFO New Entry Line" "0,1" bitfld.long 0x00 11. "TFEL,Tx FIFO Empty Line" "0,1" bitfld.long 0x00 10. "FCFL,Transmission Cancellation Finished Line" "0,1" newline bitfld.long 0x00 9. "TCL,Transmission Completed Line" "0,1" bitfld.long 0x00 8. "HPML,High Priority Message Line" "0,1" bitfld.long 0x00 7. "FR1LL,Rx FIFO 1 Message Lost Line" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WL,Rx FIFO 1 Watermark Reached Line" "0,1" newline bitfld.long 0x00 4. "RF1NL,Rx FIFO 1 New Message Line" "0,1" bitfld.long 0x00 3. "RF0LL,Rx FIFO 0 Message Lost Line" "0,1" bitfld.long 0x00 2. "RF0FL,Rx FIFO 0 Full Line" "0,1" bitfld.long 0x00 1. "RF0WL,Rx FIFO 0 Watermark Reached Line" "0,1" bitfld.long 0x00 0. "RF0NL,Rx FIFO 0 New Message Line" "0,1" group.long ad:0xC009005C++0x03 line.long 0x00 "ILE0,Interrupt Line Enable Register i (i=0~2)" bitfld.long 0x00 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0x00 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long ad:0xC009185C++0x03 line.long 0x00 "ILE1,Interrupt Line Enable Register i (i=0~2)" bitfld.long 0x00 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0x00 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long ad:0xC009305C++0x03 line.long 0x00 "ILE2,Interrupt Line Enable Register i (i=0~2)" bitfld.long 0x00 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0x00 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long ad:0xC0090080++0x03 line.long 0x00 "GFC0,Global Filter Configuration Register i (i=0~2)" bitfld.long 0x00 4.--5. "ANFS,Accept Non-matching Frames Standard" "0,1,2,3" bitfld.long 0x00 2.--3. "ANFE,Accept Non-matching Frames Extended" "0,1,2,3" bitfld.long 0x00 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x00 0. "RRFE,Reject Remote Frames Extended" "0,1" group.long ad:0xC0091880++0x03 line.long 0x00 "GFC1,Global Filter Configuration Register i (i=0~2)" bitfld.long 0x00 4.--5. "ANFS,Accept Non-matching Frames Standard" "0,1,2,3" bitfld.long 0x00 2.--3. "ANFE,Accept Non-matching Frames Extended" "0,1,2,3" bitfld.long 0x00 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x00 0. "RRFE,Reject Remote Frames Extended" "0,1" group.long ad:0xC0093080++0x03 line.long 0x00 "GFC2,Global Filter Configuration Register i (i=0~2)" bitfld.long 0x00 4.--5. "ANFS,Accept Non-matching Frames Standard" "0,1,2,3" bitfld.long 0x00 2.--3. "ANFE,Accept Non-matching Frames Extended" "0,1,2,3" bitfld.long 0x00 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x00 0. "RRFE,Reject Remote Frames Extended" "0,1" group.long ad:0xC0090084++0x03 line.long 0x00 "SIDFC0,Standard ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x00 2.--15. 1. "FLSSA,Filter List Standard Start Address" group.long ad:0xC0091884++0x03 line.long 0x00 "SIDFC1,Standard ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x00 2.--15. 1. "FLSSA,Filter List Standard Start Address" group.long ad:0xC0093084++0x03 line.long 0x00 "SIDFC2,Standard ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x00 2.--15. 1. "FLSSA,Filter List Standard Start Address" group.long ad:0xC0090088++0x03 line.long 0x00 "XIDFC0,Extended ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSE,List Size Extended" hexmask.long.word 0x00 2.--15. 1. "FLESA,Filter List Extended Start Address" group.long ad:0xC0091888++0x03 line.long 0x00 "XIDFC1,Extended ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSE,List Size Extended" hexmask.long.word 0x00 2.--15. 1. "FLESA,Filter List Extended Start Address" group.long ad:0xC0093088++0x03 line.long 0x00 "XIDFC2,Extended ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSE,List Size Extended" hexmask.long.word 0x00 2.--15. 1. "FLESA,Filter List Extended Start Address" group.long ad:0xC0090090++0x03 line.long 0x00 "XIDAM0,Extended ID AND Mask Register i (i=0~2)" hexmask.long 0x00 0.--28. 1. "EIDM,Extended ID Mask" group.long ad:0xC0091890++0x03 line.long 0x00 "XIDAM1,Extended ID AND Mask Register i (i=0~2)" hexmask.long 0x00 0.--28. 1. "EIDM,Extended ID Mask" group.long ad:0xC0093090++0x03 line.long 0x00 "XIDAM2,Extended ID AND Mask Register i (i=0~2)" hexmask.long 0x00 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long ad:0xC0090094++0x03 line.long 0x00 "HPMS0,High Priority Message Status Register i (i=0~2)" bitfld.long 0x00 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x00 8.--14. 1. "FIDX,Filter Index" bitfld.long 0x00 6.--7. "MSI,Message Storage Indicator" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "BIDX,Buffer Index" rgroup.long ad:0xC0091894++0x03 line.long 0x00 "HPMS1,High Priority Message Status Register i (i=0~2)" bitfld.long 0x00 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x00 8.--14. 1. "FIDX,Filter Index" bitfld.long 0x00 6.--7. "MSI,Message Storage Indicator" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "BIDX,Buffer Index" rgroup.long ad:0xC0093094++0x03 line.long 0x00 "HPMS2,High Priority Message Status Register i (i=0~2)" bitfld.long 0x00 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x00 8.--14. 1. "FIDX,Filter Index" bitfld.long 0x00 6.--7. "MSI,Message Storage Indicator" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "BIDX,Buffer Index" group.long ad:0xC0090098++0x03 line.long 0x00 "NDAT10,New Data 1 Register i (i=0~2)" bitfld.long 0x00 31. "ND31,New Data 31" "0,1" bitfld.long 0x00 30. "ND30,New Data 30" "0,1" bitfld.long 0x00 29. "ND29,New Data 29" "0,1" bitfld.long 0x00 28. "ND28,New Data 28" "0,1" bitfld.long 0x00 27. "ND27,New Data 27" "0,1" newline bitfld.long 0x00 26. "ND26,New Data 26" "0,1" bitfld.long 0x00 25. "ND25,New Data 25" "0,1" bitfld.long 0x00 24. "ND24,New Data 24" "0,1" bitfld.long 0x00 23. "ND23,New Data 23" "0,1" bitfld.long 0x00 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x00 21. "ND21,New Data 21" "0,1" bitfld.long 0x00 20. "ND20,New Data 20" "0,1" bitfld.long 0x00 19. "ND19,New Data 19" "0,1" bitfld.long 0x00 18. "ND18,New Data 18" "0,1" bitfld.long 0x00 17. "ND17,New Data 17" "0,1" newline bitfld.long 0x00 16. "ND16,New Data 16" "0,1" bitfld.long 0x00 15. "ND15,New Data 15" "0,1" bitfld.long 0x00 14. "ND14,New Data 14" "0,1" bitfld.long 0x00 13. "ND13,New Data 13" "0,1" bitfld.long 0x00 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x00 11. "ND11,New Data 11" "0,1" bitfld.long 0x00 10. "ND10,New Data 10" "0,1" bitfld.long 0x00 9. "ND9,New Data 9" "0,1" bitfld.long 0x00 8. "ND8,New Data 8" "0,1" bitfld.long 0x00 7. "ND7,New Data 7" "0,1" newline bitfld.long 0x00 6. "ND6,New Data 6" "0,1" bitfld.long 0x00 5. "ND5,New Data 5" "0,1" bitfld.long 0x00 4. "ND4,New Data 4" "0,1" bitfld.long 0x00 3. "ND3,New Data 3" "0,1" bitfld.long 0x00 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x00 1. "ND1,New Data 1" "0,1" bitfld.long 0x00 0. "ND0,New Data 0" "0,1" group.long ad:0xC0091898++0x03 line.long 0x00 "NDAT11,New Data 1 Register i (i=0~2)" bitfld.long 0x00 31. "ND31,New Data 31" "0,1" bitfld.long 0x00 30. "ND30,New Data 30" "0,1" bitfld.long 0x00 29. "ND29,New Data 29" "0,1" bitfld.long 0x00 28. "ND28,New Data 28" "0,1" bitfld.long 0x00 27. "ND27,New Data 27" "0,1" newline bitfld.long 0x00 26. "ND26,New Data 26" "0,1" bitfld.long 0x00 25. "ND25,New Data 25" "0,1" bitfld.long 0x00 24. "ND24,New Data 24" "0,1" bitfld.long 0x00 23. "ND23,New Data 23" "0,1" bitfld.long 0x00 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x00 21. "ND21,New Data 21" "0,1" bitfld.long 0x00 20. "ND20,New Data 20" "0,1" bitfld.long 0x00 19. "ND19,New Data 19" "0,1" bitfld.long 0x00 18. "ND18,New Data 18" "0,1" bitfld.long 0x00 17. "ND17,New Data 17" "0,1" newline bitfld.long 0x00 16. "ND16,New Data 16" "0,1" bitfld.long 0x00 15. "ND15,New Data 15" "0,1" bitfld.long 0x00 14. "ND14,New Data 14" "0,1" bitfld.long 0x00 13. "ND13,New Data 13" "0,1" bitfld.long 0x00 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x00 11. "ND11,New Data 11" "0,1" bitfld.long 0x00 10. "ND10,New Data 10" "0,1" bitfld.long 0x00 9. "ND9,New Data 9" "0,1" bitfld.long 0x00 8. "ND8,New Data 8" "0,1" bitfld.long 0x00 7. "ND7,New Data 7" "0,1" newline bitfld.long 0x00 6. "ND6,New Data 6" "0,1" bitfld.long 0x00 5. "ND5,New Data 5" "0,1" bitfld.long 0x00 4. "ND4,New Data 4" "0,1" bitfld.long 0x00 3. "ND3,New Data 3" "0,1" bitfld.long 0x00 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x00 1. "ND1,New Data 1" "0,1" bitfld.long 0x00 0. "ND0,New Data 0" "0,1" group.long ad:0xC0093098++0x03 line.long 0x00 "NDAT12,New Data 1 Register i (i=0~2)" bitfld.long 0x00 31. "ND31,New Data 31" "0,1" bitfld.long 0x00 30. "ND30,New Data 30" "0,1" bitfld.long 0x00 29. "ND29,New Data 29" "0,1" bitfld.long 0x00 28. "ND28,New Data 28" "0,1" bitfld.long 0x00 27. "ND27,New Data 27" "0,1" newline bitfld.long 0x00 26. "ND26,New Data 26" "0,1" bitfld.long 0x00 25. "ND25,New Data 25" "0,1" bitfld.long 0x00 24. "ND24,New Data 24" "0,1" bitfld.long 0x00 23. "ND23,New Data 23" "0,1" bitfld.long 0x00 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x00 21. "ND21,New Data 21" "0,1" bitfld.long 0x00 20. "ND20,New Data 20" "0,1" bitfld.long 0x00 19. "ND19,New Data 19" "0,1" bitfld.long 0x00 18. "ND18,New Data 18" "0,1" bitfld.long 0x00 17. "ND17,New Data 17" "0,1" newline bitfld.long 0x00 16. "ND16,New Data 16" "0,1" bitfld.long 0x00 15. "ND15,New Data 15" "0,1" bitfld.long 0x00 14. "ND14,New Data 14" "0,1" bitfld.long 0x00 13. "ND13,New Data 13" "0,1" bitfld.long 0x00 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x00 11. "ND11,New Data 11" "0,1" bitfld.long 0x00 10. "ND10,New Data 10" "0,1" bitfld.long 0x00 9. "ND9,New Data 9" "0,1" bitfld.long 0x00 8. "ND8,New Data 8" "0,1" bitfld.long 0x00 7. "ND7,New Data 7" "0,1" newline bitfld.long 0x00 6. "ND6,New Data 6" "0,1" bitfld.long 0x00 5. "ND5,New Data 5" "0,1" bitfld.long 0x00 4. "ND4,New Data 4" "0,1" bitfld.long 0x00 3. "ND3,New Data 3" "0,1" bitfld.long 0x00 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x00 1. "ND1,New Data 1" "0,1" bitfld.long 0x00 0. "ND0,New Data 0" "0,1" group.long ad:0xC009009C++0x03 line.long 0x00 "NDAT20,New Data 2 Register i (i=0~2)" bitfld.long 0x00 31. "ND63,New Data 63" "0,1" bitfld.long 0x00 30. "ND62,New Data 62" "0,1" bitfld.long 0x00 29. "ND61,New Data 61" "0,1" bitfld.long 0x00 28. "ND60,New Data 60" "0,1" bitfld.long 0x00 27. "ND59,New Data 59" "0,1" newline bitfld.long 0x00 26. "ND58,New Data 58" "0,1" bitfld.long 0x00 25. "ND57,New Data 57" "0,1" bitfld.long 0x00 24. "ND56,New Data 56" "0,1" bitfld.long 0x00 23. "ND55,New Data 55" "0,1" bitfld.long 0x00 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x00 21. "ND53,New Data 53" "0,1" bitfld.long 0x00 20. "ND52,New Data 52" "0,1" bitfld.long 0x00 19. "ND51,New Data 51" "0,1" bitfld.long 0x00 18. "ND50,New Data 50" "0,1" bitfld.long 0x00 17. "ND49,New Data 49" "0,1" newline bitfld.long 0x00 16. "ND48,New Data 48" "0,1" bitfld.long 0x00 15. "ND47,New Data 47" "0,1" bitfld.long 0x00 14. "ND46,New Data 46" "0,1" bitfld.long 0x00 13. "ND45,New Data 45" "0,1" bitfld.long 0x00 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x00 11. "ND43,New Data 43" "0,1" bitfld.long 0x00 10. "ND42,New Data 42" "0,1" bitfld.long 0x00 9. "ND41,New Data 41" "0,1" bitfld.long 0x00 8. "ND40,New Data 40" "0,1" bitfld.long 0x00 7. "ND39,New Data 39" "0,1" newline bitfld.long 0x00 6. "ND38,New Data 38" "0,1" bitfld.long 0x00 5. "ND37,New Data 37" "0,1" bitfld.long 0x00 4. "ND36,New Data 36" "0,1" bitfld.long 0x00 3. "ND35,New Data 35" "0,1" bitfld.long 0x00 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x00 1. "ND33,New Data 33" "0,1" bitfld.long 0x00 0. "ND32,New Data 32" "0,1" group.long ad:0xC009189C++0x03 line.long 0x00 "NDAT21,New Data 2 Register i (i=0~2)" bitfld.long 0x00 31. "ND63,New Data 63" "0,1" bitfld.long 0x00 30. "ND62,New Data 62" "0,1" bitfld.long 0x00 29. "ND61,New Data 61" "0,1" bitfld.long 0x00 28. "ND60,New Data 60" "0,1" bitfld.long 0x00 27. "ND59,New Data 59" "0,1" newline bitfld.long 0x00 26. "ND58,New Data 58" "0,1" bitfld.long 0x00 25. "ND57,New Data 57" "0,1" bitfld.long 0x00 24. "ND56,New Data 56" "0,1" bitfld.long 0x00 23. "ND55,New Data 55" "0,1" bitfld.long 0x00 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x00 21. "ND53,New Data 53" "0,1" bitfld.long 0x00 20. "ND52,New Data 52" "0,1" bitfld.long 0x00 19. "ND51,New Data 51" "0,1" bitfld.long 0x00 18. "ND50,New Data 50" "0,1" bitfld.long 0x00 17. "ND49,New Data 49" "0,1" newline bitfld.long 0x00 16. "ND48,New Data 48" "0,1" bitfld.long 0x00 15. "ND47,New Data 47" "0,1" bitfld.long 0x00 14. "ND46,New Data 46" "0,1" bitfld.long 0x00 13. "ND45,New Data 45" "0,1" bitfld.long 0x00 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x00 11. "ND43,New Data 43" "0,1" bitfld.long 0x00 10. "ND42,New Data 42" "0,1" bitfld.long 0x00 9. "ND41,New Data 41" "0,1" bitfld.long 0x00 8. "ND40,New Data 40" "0,1" bitfld.long 0x00 7. "ND39,New Data 39" "0,1" newline bitfld.long 0x00 6. "ND38,New Data 38" "0,1" bitfld.long 0x00 5. "ND37,New Data 37" "0,1" bitfld.long 0x00 4. "ND36,New Data 36" "0,1" bitfld.long 0x00 3. "ND35,New Data 35" "0,1" bitfld.long 0x00 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x00 1. "ND33,New Data 33" "0,1" bitfld.long 0x00 0. "ND32,New Data 32" "0,1" group.long ad:0xC009309C++0x03 line.long 0x00 "NDAT22,New Data 2 Register i (i=0~2)" bitfld.long 0x00 31. "ND63,New Data 63" "0,1" bitfld.long 0x00 30. "ND62,New Data 62" "0,1" bitfld.long 0x00 29. "ND61,New Data 61" "0,1" bitfld.long 0x00 28. "ND60,New Data 60" "0,1" bitfld.long 0x00 27. "ND59,New Data 59" "0,1" newline bitfld.long 0x00 26. "ND58,New Data 58" "0,1" bitfld.long 0x00 25. "ND57,New Data 57" "0,1" bitfld.long 0x00 24. "ND56,New Data 56" "0,1" bitfld.long 0x00 23. "ND55,New Data 55" "0,1" bitfld.long 0x00 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x00 21. "ND53,New Data 53" "0,1" bitfld.long 0x00 20. "ND52,New Data 52" "0,1" bitfld.long 0x00 19. "ND51,New Data 51" "0,1" bitfld.long 0x00 18. "ND50,New Data 50" "0,1" bitfld.long 0x00 17. "ND49,New Data 49" "0,1" newline bitfld.long 0x00 16. "ND48,New Data 48" "0,1" bitfld.long 0x00 15. "ND47,New Data 47" "0,1" bitfld.long 0x00 14. "ND46,New Data 46" "0,1" bitfld.long 0x00 13. "ND45,New Data 45" "0,1" bitfld.long 0x00 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x00 11. "ND43,New Data 43" "0,1" bitfld.long 0x00 10. "ND42,New Data 42" "0,1" bitfld.long 0x00 9. "ND41,New Data 41" "0,1" bitfld.long 0x00 8. "ND40,New Data 40" "0,1" bitfld.long 0x00 7. "ND39,New Data 39" "0,1" newline bitfld.long 0x00 6. "ND38,New Data 38" "0,1" bitfld.long 0x00 5. "ND37,New Data 37" "0,1" bitfld.long 0x00 4. "ND36,New Data 36" "0,1" bitfld.long 0x00 3. "ND35,New Data 35" "0,1" bitfld.long 0x00 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x00 1. "ND33,New Data 33" "0,1" bitfld.long 0x00 0. "ND32,New Data 32" "0,1" group.long ad:0xC00900A0++0x03 line.long 0x00 "RXF0C0,Rx FIFO 0 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x00 2.--15. 1. "F0SA,Rx FIFO 0 Start Address" group.long ad:0xC00918A0++0x03 line.long 0x00 "RXF0C1,Rx FIFO 0 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x00 2.--15. 1. "F0SA,Rx FIFO 0 Start Address" group.long ad:0xC00930A0++0x03 line.long 0x00 "RXF0C2,Rx FIFO 0 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x00 2.--15. 1. "F0SA,Rx FIFO 0 Start Address" rgroup.long ad:0xC00900A4++0x03 line.long 0x00 "RXF0S0,Rx FIFO 0 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 24. "F0F,Rx FIFO 0 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" rgroup.long ad:0xC00918A4++0x03 line.long 0x00 "RXF0S1,Rx FIFO 0 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 24. "F0F,Rx FIFO 0 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" rgroup.long ad:0xC00930A4++0x03 line.long 0x00 "RXF0S2,Rx FIFO 0 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 24. "F0F,Rx FIFO 0 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" group.long ad:0xC00900A8++0x03 line.long 0x00 "RXF0A0,Rx FIFO 0 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" group.long ad:0xC00918A8++0x03 line.long 0x00 "RXF0A1,Rx FIFO 0 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" group.long ad:0xC00930A8++0x03 line.long 0x00 "RXF0A2,Rx FIFO 0 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" group.long ad:0xC00900AC++0x03 line.long 0x00 "RXBC0,Rx Buffer Configuration Register i (i=0~2)" hexmask.long.word 0x00 2.--15. 1. "RBSA,Rx Buffer Start Address" group.long ad:0xC00918AC++0x03 line.long 0x00 "RXBC1,Rx Buffer Configuration Register i (i=0~2)" hexmask.long.word 0x00 2.--15. 1. "RBSA,Rx Buffer Start Address" group.long ad:0xC00930AC++0x03 line.long 0x00 "RXBC2,Rx Buffer Configuration Register i (i=0~2)" hexmask.long.word 0x00 2.--15. 1. "RBSA,Rx Buffer Start Address" group.long ad:0xC00900B0++0x03 line.long 0x00 "RXF1C0,Rx FIFO 1 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x00 2.--15. 1. "F1SA,Rx FIFO 1 Start Address" group.long ad:0xC00918B0++0x03 line.long 0x00 "RXF1C1,Rx FIFO 1 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x00 2.--15. 1. "F1SA,Rx FIFO 1 Start Address" group.long ad:0xC00930B0++0x03 line.long 0x00 "RXF1C2,Rx FIFO 1 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x00 2.--15. 1. "F1SA,Rx FIFO 1 Start Address" rgroup.long ad:0xC00900B4++0x03 line.long 0x00 "RXF1S0,Rx FIFO 1 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" rgroup.long ad:0xC00918B4++0x03 line.long 0x00 "RXF1S1,Rx FIFO 1 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" rgroup.long ad:0xC00930B4++0x03 line.long 0x00 "RXF1S2,Rx FIFO 1 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" group.long ad:0xC00900B8++0x03 line.long 0x00 "RXF1A0,Rx FIFO 1 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" group.long ad:0xC00918B8++0x03 line.long 0x00 "RXF1A1,Rx FIFO 1 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" group.long ad:0xC00930B8++0x03 line.long 0x00 "RXF1A2,Rx FIFO 1 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" group.long ad:0xC00900BC++0x03 line.long 0x00 "RXESC0,Rx Buffer / FIFO Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 8.--10. "RBDS,Rx Buffer Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0,1,2,3,4,5,6,7" group.long ad:0xC00918BC++0x03 line.long 0x00 "RXESC1,Rx Buffer / FIFO Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 8.--10. "RBDS,Rx Buffer Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0,1,2,3,4,5,6,7" group.long ad:0xC00930BC++0x03 line.long 0x00 "RXESC2,Rx Buffer / FIFO Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 8.--10. "RBDS,Rx Buffer Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0,1,2,3,4,5,6,7" group.long ad:0xC00900C0++0x03 line.long 0x00 "TXBC0,Tx Buffer Configuration Register i (i=0~2)" bitfld.long 0x00 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x00 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" hexmask.long.byte 0x00 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x00 2.--15. 1. "TBSA,Tx Buffers Start Address" group.long ad:0xC00918C0++0x03 line.long 0x00 "TXBC1,Tx Buffer Configuration Register i (i=0~2)" bitfld.long 0x00 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x00 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" hexmask.long.byte 0x00 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x00 2.--15. 1. "TBSA,Tx Buffers Start Address" group.long ad:0xC00930C0++0x03 line.long 0x00 "TXBC2,Tx Buffer Configuration Register i (i=0~2)" bitfld.long 0x00 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x00 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" hexmask.long.byte 0x00 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x00 2.--15. 1. "TBSA,Tx Buffers Start Address" rgroup.long ad:0xC00900C4++0x03 line.long 0x00 "TXFQS0,Tx FIFO/Queue Status Register i (i=0~2)" bitfld.long 0x00 21. "TFQF,Tx FIFO/Queue Full" "0,1" bitfld.long 0x00 16.--20. "TFQPI,Tx FIFO/Queue Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "TFGI,Tx FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "TFFL,Tx FIFO Free Level" rgroup.long ad:0xC00918C4++0x03 line.long 0x00 "TXFQS1,Tx FIFO/Queue Status Register i (i=0~2)" bitfld.long 0x00 21. "TFQF,Tx FIFO/Queue Full" "0,1" bitfld.long 0x00 16.--20. "TFQPI,Tx FIFO/Queue Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "TFGI,Tx FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "TFFL,Tx FIFO Free Level" rgroup.long ad:0xC00930C4++0x03 line.long 0x00 "TXFQS2,Tx FIFO/Queue Status Register i (i=0~2)" bitfld.long 0x00 21. "TFQF,Tx FIFO/Queue Full" "0,1" bitfld.long 0x00 16.--20. "TFQPI,Tx FIFO/Queue Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "TFGI,Tx FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "TFFL,Tx FIFO Free Level" group.long ad:0xC00900C8++0x03 line.long 0x00 "TXESC0,Tx Buffer Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 0.--2. "TBDS,Tx Buffer Data Field Size" "0,1,2,3,4,5,6,7" group.long ad:0xC00918C8++0x03 line.long 0x00 "TXESC1,Tx Buffer Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 0.--2. "TBDS,Tx Buffer Data Field Size" "0,1,2,3,4,5,6,7" group.long ad:0xC00930C8++0x03 line.long 0x00 "TXESC2,Tx Buffer Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 0.--2. "TBDS,Tx Buffer Data Field Size" "0,1,2,3,4,5,6,7" rgroup.long ad:0xC00900CC++0x03 line.long 0x00 "TXBRP0,Tx Buffer Request Pending Register i (i=0~2)" bitfld.long 0x00 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x00 30. "TRP30,Transmission Request Pending 30" "0,1" bitfld.long 0x00 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x00 28. "TRP28,Transmission Request Pending 28" "0,1" bitfld.long 0x00 27. "TRP27,Transmission Request Pending 27" "0,1" newline bitfld.long 0x00 26. "TRP26,Transmission Request Pending 26" "0,1" bitfld.long 0x00 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x00 24. "TRP24,Transmission Request Pending 24" "0,1" bitfld.long 0x00 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x00 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x00 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x00 20. "TRP20,Transmission Request Pending 20" "0,1" bitfld.long 0x00 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x00 18. "TRP18,Transmission Request Pending 18" "0,1" bitfld.long 0x00 17. "TRP17,Transmission Request Pending 17" "0,1" newline bitfld.long 0x00 16. "TRP16,Transmission Request Pending 16" "0,1" bitfld.long 0x00 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x00 14. "TRP14,Transmission Request Pending 14" "0,1" bitfld.long 0x00 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x00 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x00 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x00 10. "TRP10,Transmission Request Pending 10" "0,1" bitfld.long 0x00 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x00 8. "TRP8,Transmission Request Pending 8" "0,1" bitfld.long 0x00 7. "TRP7,Transmission Request Pending 7" "0,1" newline bitfld.long 0x00 6. "TRP6,Transmission Request Pending 6" "0,1" bitfld.long 0x00 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x00 4. "TRP4,Transmission Request Pending 4" "0,1" bitfld.long 0x00 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x00 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x00 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x00 0. "TRP0,Transmission Request Pending 0" "0,1" rgroup.long ad:0xC00918CC++0x03 line.long 0x00 "TXBRP1,Tx Buffer Request Pending Register i (i=0~2)" bitfld.long 0x00 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x00 30. "TRP30,Transmission Request Pending 30" "0,1" bitfld.long 0x00 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x00 28. "TRP28,Transmission Request Pending 28" "0,1" bitfld.long 0x00 27. "TRP27,Transmission Request Pending 27" "0,1" newline bitfld.long 0x00 26. "TRP26,Transmission Request Pending 26" "0,1" bitfld.long 0x00 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x00 24. "TRP24,Transmission Request Pending 24" "0,1" bitfld.long 0x00 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x00 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x00 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x00 20. "TRP20,Transmission Request Pending 20" "0,1" bitfld.long 0x00 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x00 18. "TRP18,Transmission Request Pending 18" "0,1" bitfld.long 0x00 17. "TRP17,Transmission Request Pending 17" "0,1" newline bitfld.long 0x00 16. "TRP16,Transmission Request Pending 16" "0,1" bitfld.long 0x00 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x00 14. "TRP14,Transmission Request Pending 14" "0,1" bitfld.long 0x00 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x00 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x00 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x00 10. "TRP10,Transmission Request Pending 10" "0,1" bitfld.long 0x00 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x00 8. "TRP8,Transmission Request Pending 8" "0,1" bitfld.long 0x00 7. "TRP7,Transmission Request Pending 7" "0,1" newline bitfld.long 0x00 6. "TRP6,Transmission Request Pending 6" "0,1" bitfld.long 0x00 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x00 4. "TRP4,Transmission Request Pending 4" "0,1" bitfld.long 0x00 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x00 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x00 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x00 0. "TRP0,Transmission Request Pending 0" "0,1" rgroup.long ad:0xC00930CC++0x03 line.long 0x00 "TXBRP2,Tx Buffer Request Pending Register i (i=0~2)" bitfld.long 0x00 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x00 30. "TRP30,Transmission Request Pending 30" "0,1" bitfld.long 0x00 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x00 28. "TRP28,Transmission Request Pending 28" "0,1" bitfld.long 0x00 27. "TRP27,Transmission Request Pending 27" "0,1" newline bitfld.long 0x00 26. "TRP26,Transmission Request Pending 26" "0,1" bitfld.long 0x00 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x00 24. "TRP24,Transmission Request Pending 24" "0,1" bitfld.long 0x00 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x00 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x00 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x00 20. "TRP20,Transmission Request Pending 20" "0,1" bitfld.long 0x00 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x00 18. "TRP18,Transmission Request Pending 18" "0,1" bitfld.long 0x00 17. "TRP17,Transmission Request Pending 17" "0,1" newline bitfld.long 0x00 16. "TRP16,Transmission Request Pending 16" "0,1" bitfld.long 0x00 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x00 14. "TRP14,Transmission Request Pending 14" "0,1" bitfld.long 0x00 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x00 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x00 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x00 10. "TRP10,Transmission Request Pending 10" "0,1" bitfld.long 0x00 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x00 8. "TRP8,Transmission Request Pending 8" "0,1" bitfld.long 0x00 7. "TRP7,Transmission Request Pending 7" "0,1" newline bitfld.long 0x00 6. "TRP6,Transmission Request Pending 6" "0,1" bitfld.long 0x00 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x00 4. "TRP4,Transmission Request Pending 4" "0,1" bitfld.long 0x00 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x00 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x00 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x00 0. "TRP0,Transmission Request Pending 0" "0,1" group.long ad:0xC00900D0++0x03 line.long 0x00 "TXBAR0,Tx Buffer Add Request Register i (i=0~2)" bitfld.long 0x00 31. "AR31,Add Request 31" "0,1" bitfld.long 0x00 30. "AR30,Add Request 30" "0,1" bitfld.long 0x00 29. "AR29,Add Request 29" "0,1" bitfld.long 0x00 28. "AR28,Add Request 28" "0,1" bitfld.long 0x00 27. "AR27,Add Request 27" "0,1" newline bitfld.long 0x00 26. "AR26,Add Request 26" "0,1" bitfld.long 0x00 25. "AR25,Add Request 25" "0,1" bitfld.long 0x00 24. "AR24,Add Request 24" "0,1" bitfld.long 0x00 23. "AR23,Add Request 23" "0,1" bitfld.long 0x00 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x00 21. "AR21,Add Request 21" "0,1" bitfld.long 0x00 20. "TRP20,Add Request 20" "0,1" bitfld.long 0x00 19. "AR19,Add Request 19" "0,1" bitfld.long 0x00 18. "AR18,Add Request 18" "0,1" bitfld.long 0x00 17. "AR17,Add Request 17" "0,1" newline bitfld.long 0x00 16. "AR16,Add Request 16" "0,1" bitfld.long 0x00 15. "AR15,Add Request 15" "0,1" bitfld.long 0x00 14. "AR14,Add Request 14" "0,1" bitfld.long 0x00 13. "AR13,Add Request 13" "0,1" bitfld.long 0x00 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x00 11. "AR11,Add Request 11" "0,1" bitfld.long 0x00 10. "AR10,Add Request 10" "0,1" bitfld.long 0x00 9. "AR9,Add Request 9" "0,1" bitfld.long 0x00 8. "AR8,Add Request 8" "0,1" bitfld.long 0x00 7. "AR7,Add Request 7" "0,1" newline bitfld.long 0x00 6. "AR6,Add Request 6" "0,1" bitfld.long 0x00 5. "AR5,Add Request 5" "0,1" bitfld.long 0x00 4. "AR4,Add Request 4" "0,1" bitfld.long 0x00 3. "AR3,Add Request 3" "0,1" bitfld.long 0x00 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x00 1. "AR1,Add Request 1" "0,1" bitfld.long 0x00 0. "AR0,Add Request 0" "0,1" group.long ad:0xC00918D0++0x03 line.long 0x00 "TXBAR1,Tx Buffer Add Request Register i (i=0~2)" bitfld.long 0x00 31. "AR31,Add Request 31" "0,1" bitfld.long 0x00 30. "AR30,Add Request 30" "0,1" bitfld.long 0x00 29. "AR29,Add Request 29" "0,1" bitfld.long 0x00 28. "AR28,Add Request 28" "0,1" bitfld.long 0x00 27. "AR27,Add Request 27" "0,1" newline bitfld.long 0x00 26. "AR26,Add Request 26" "0,1" bitfld.long 0x00 25. "AR25,Add Request 25" "0,1" bitfld.long 0x00 24. "AR24,Add Request 24" "0,1" bitfld.long 0x00 23. "AR23,Add Request 23" "0,1" bitfld.long 0x00 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x00 21. "AR21,Add Request 21" "0,1" bitfld.long 0x00 20. "TRP20,Add Request 20" "0,1" bitfld.long 0x00 19. "AR19,Add Request 19" "0,1" bitfld.long 0x00 18. "AR18,Add Request 18" "0,1" bitfld.long 0x00 17. "AR17,Add Request 17" "0,1" newline bitfld.long 0x00 16. "AR16,Add Request 16" "0,1" bitfld.long 0x00 15. "AR15,Add Request 15" "0,1" bitfld.long 0x00 14. "AR14,Add Request 14" "0,1" bitfld.long 0x00 13. "AR13,Add Request 13" "0,1" bitfld.long 0x00 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x00 11. "AR11,Add Request 11" "0,1" bitfld.long 0x00 10. "AR10,Add Request 10" "0,1" bitfld.long 0x00 9. "AR9,Add Request 9" "0,1" bitfld.long 0x00 8. "AR8,Add Request 8" "0,1" bitfld.long 0x00 7. "AR7,Add Request 7" "0,1" newline bitfld.long 0x00 6. "AR6,Add Request 6" "0,1" bitfld.long 0x00 5. "AR5,Add Request 5" "0,1" bitfld.long 0x00 4. "AR4,Add Request 4" "0,1" bitfld.long 0x00 3. "AR3,Add Request 3" "0,1" bitfld.long 0x00 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x00 1. "AR1,Add Request 1" "0,1" bitfld.long 0x00 0. "AR0,Add Request 0" "0,1" group.long ad:0xC00930D0++0x03 line.long 0x00 "TXBAR2,Tx Buffer Add Request Register i (i=0~2)" bitfld.long 0x00 31. "AR31,Add Request 31" "0,1" bitfld.long 0x00 30. "AR30,Add Request 30" "0,1" bitfld.long 0x00 29. "AR29,Add Request 29" "0,1" bitfld.long 0x00 28. "AR28,Add Request 28" "0,1" bitfld.long 0x00 27. "AR27,Add Request 27" "0,1" newline bitfld.long 0x00 26. "AR26,Add Request 26" "0,1" bitfld.long 0x00 25. "AR25,Add Request 25" "0,1" bitfld.long 0x00 24. "AR24,Add Request 24" "0,1" bitfld.long 0x00 23. "AR23,Add Request 23" "0,1" bitfld.long 0x00 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x00 21. "AR21,Add Request 21" "0,1" bitfld.long 0x00 20. "TRP20,Add Request 20" "0,1" bitfld.long 0x00 19. "AR19,Add Request 19" "0,1" bitfld.long 0x00 18. "AR18,Add Request 18" "0,1" bitfld.long 0x00 17. "AR17,Add Request 17" "0,1" newline bitfld.long 0x00 16. "AR16,Add Request 16" "0,1" bitfld.long 0x00 15. "AR15,Add Request 15" "0,1" bitfld.long 0x00 14. "AR14,Add Request 14" "0,1" bitfld.long 0x00 13. "AR13,Add Request 13" "0,1" bitfld.long 0x00 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x00 11. "AR11,Add Request 11" "0,1" bitfld.long 0x00 10. "AR10,Add Request 10" "0,1" bitfld.long 0x00 9. "AR9,Add Request 9" "0,1" bitfld.long 0x00 8. "AR8,Add Request 8" "0,1" bitfld.long 0x00 7. "AR7,Add Request 7" "0,1" newline bitfld.long 0x00 6. "AR6,Add Request 6" "0,1" bitfld.long 0x00 5. "AR5,Add Request 5" "0,1" bitfld.long 0x00 4. "AR4,Add Request 4" "0,1" bitfld.long 0x00 3. "AR3,Add Request 3" "0,1" bitfld.long 0x00 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x00 1. "AR1,Add Request 1" "0,1" bitfld.long 0x00 0. "AR0,Add Request 0" "0,1" group.long ad:0xC00900D4++0x03 line.long 0x00 "TXBCR0,Tx Buffer Cancellation Request i (i=0~2)" bitfld.long 0x00 31. "CR31,Cancellation Request" "0,1" bitfld.long 0x00 30. "CR30,Cancellation Request" "0,1" bitfld.long 0x00 29. "CR29,Cancellation Request" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Request" "0,1" bitfld.long 0x00 27. "CR27,Cancellation Request" "0,1" newline bitfld.long 0x00 26. "CR26,Cancellation Request" "0,1" bitfld.long 0x00 25. "CR25,Cancellation Request" "0,1" bitfld.long 0x00 24. "CR24,Cancellation Request" "0,1" bitfld.long 0x00 23. "CR23,Cancellation Request" "0,1" bitfld.long 0x00 22. "CR22,Cancellation Request" "0,1" newline bitfld.long 0x00 21. "CR21,Cancellation Request" "0,1" bitfld.long 0x00 20. "CR20,Cancellation Request" "0,1" bitfld.long 0x00 19. "CR19,Cancellation Request" "0,1" bitfld.long 0x00 18. "CR18,Cancellation Request" "0,1" bitfld.long 0x00 17. "CR17,Cancellation Request" "0,1" newline bitfld.long 0x00 16. "CR16,Cancellation Request" "0,1" bitfld.long 0x00 15. "CR15,Cancellation Request" "0,1" bitfld.long 0x00 14. "CR14,Cancellation Request" "0,1" bitfld.long 0x00 13. "CR13,Cancellation Request" "0,1" bitfld.long 0x00 12. "CR12,Cancellation Request" "0,1" newline bitfld.long 0x00 11. "CR11,Cancellation Request" "0,1" bitfld.long 0x00 10. "CR10,Cancellation Request" "0,1" bitfld.long 0x00 9. "CR9,Cancellation Request" "0,1" bitfld.long 0x00 8. "CR8,Cancellation Request" "0,1" bitfld.long 0x00 7. "CR7,Cancellation Request" "0,1" newline bitfld.long 0x00 6. "CR6,Cancellation Request" "0,1" bitfld.long 0x00 5. "CR5,Cancellation Request" "0,1" bitfld.long 0x00 4. "CR4,Cancellation Request" "0,1" bitfld.long 0x00 3. "CR3,Cancellation Request" "0,1" bitfld.long 0x00 2. "CR2,Cancellation Request" "0,1" newline bitfld.long 0x00 1. "CR1,Cancellation Request" "0,1" bitfld.long 0x00 0. "CR0,Cancellation Request" "0,1" group.long ad:0xC00918D4++0x03 line.long 0x00 "TXBCR1,Tx Buffer Cancellation Request i (i=0~2)" bitfld.long 0x00 31. "CR31,Cancellation Request" "0,1" bitfld.long 0x00 30. "CR30,Cancellation Request" "0,1" bitfld.long 0x00 29. "CR29,Cancellation Request" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Request" "0,1" bitfld.long 0x00 27. "CR27,Cancellation Request" "0,1" newline bitfld.long 0x00 26. "CR26,Cancellation Request" "0,1" bitfld.long 0x00 25. "CR25,Cancellation Request" "0,1" bitfld.long 0x00 24. "CR24,Cancellation Request" "0,1" bitfld.long 0x00 23. "CR23,Cancellation Request" "0,1" bitfld.long 0x00 22. "CR22,Cancellation Request" "0,1" newline bitfld.long 0x00 21. "CR21,Cancellation Request" "0,1" bitfld.long 0x00 20. "CR20,Cancellation Request" "0,1" bitfld.long 0x00 19. "CR19,Cancellation Request" "0,1" bitfld.long 0x00 18. "CR18,Cancellation Request" "0,1" bitfld.long 0x00 17. "CR17,Cancellation Request" "0,1" newline bitfld.long 0x00 16. "CR16,Cancellation Request" "0,1" bitfld.long 0x00 15. "CR15,Cancellation Request" "0,1" bitfld.long 0x00 14. "CR14,Cancellation Request" "0,1" bitfld.long 0x00 13. "CR13,Cancellation Request" "0,1" bitfld.long 0x00 12. "CR12,Cancellation Request" "0,1" newline bitfld.long 0x00 11. "CR11,Cancellation Request" "0,1" bitfld.long 0x00 10. "CR10,Cancellation Request" "0,1" bitfld.long 0x00 9. "CR9,Cancellation Request" "0,1" bitfld.long 0x00 8. "CR8,Cancellation Request" "0,1" bitfld.long 0x00 7. "CR7,Cancellation Request" "0,1" newline bitfld.long 0x00 6. "CR6,Cancellation Request" "0,1" bitfld.long 0x00 5. "CR5,Cancellation Request" "0,1" bitfld.long 0x00 4. "CR4,Cancellation Request" "0,1" bitfld.long 0x00 3. "CR3,Cancellation Request" "0,1" bitfld.long 0x00 2. "CR2,Cancellation Request" "0,1" newline bitfld.long 0x00 1. "CR1,Cancellation Request" "0,1" bitfld.long 0x00 0. "CR0,Cancellation Request" "0,1" group.long ad:0xC00930D4++0x03 line.long 0x00 "TXBCR2,Tx Buffer Cancellation Request i (i=0~2)" bitfld.long 0x00 31. "CR31,Cancellation Request" "0,1" bitfld.long 0x00 30. "CR30,Cancellation Request" "0,1" bitfld.long 0x00 29. "CR29,Cancellation Request" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Request" "0,1" bitfld.long 0x00 27. "CR27,Cancellation Request" "0,1" newline bitfld.long 0x00 26. "CR26,Cancellation Request" "0,1" bitfld.long 0x00 25. "CR25,Cancellation Request" "0,1" bitfld.long 0x00 24. "CR24,Cancellation Request" "0,1" bitfld.long 0x00 23. "CR23,Cancellation Request" "0,1" bitfld.long 0x00 22. "CR22,Cancellation Request" "0,1" newline bitfld.long 0x00 21. "CR21,Cancellation Request" "0,1" bitfld.long 0x00 20. "CR20,Cancellation Request" "0,1" bitfld.long 0x00 19. "CR19,Cancellation Request" "0,1" bitfld.long 0x00 18. "CR18,Cancellation Request" "0,1" bitfld.long 0x00 17. "CR17,Cancellation Request" "0,1" newline bitfld.long 0x00 16. "CR16,Cancellation Request" "0,1" bitfld.long 0x00 15. "CR15,Cancellation Request" "0,1" bitfld.long 0x00 14. "CR14,Cancellation Request" "0,1" bitfld.long 0x00 13. "CR13,Cancellation Request" "0,1" bitfld.long 0x00 12. "CR12,Cancellation Request" "0,1" newline bitfld.long 0x00 11. "CR11,Cancellation Request" "0,1" bitfld.long 0x00 10. "CR10,Cancellation Request" "0,1" bitfld.long 0x00 9. "CR9,Cancellation Request" "0,1" bitfld.long 0x00 8. "CR8,Cancellation Request" "0,1" bitfld.long 0x00 7. "CR7,Cancellation Request" "0,1" newline bitfld.long 0x00 6. "CR6,Cancellation Request" "0,1" bitfld.long 0x00 5. "CR5,Cancellation Request" "0,1" bitfld.long 0x00 4. "CR4,Cancellation Request" "0,1" bitfld.long 0x00 3. "CR3,Cancellation Request" "0,1" bitfld.long 0x00 2. "CR2,Cancellation Request" "0,1" newline bitfld.long 0x00 1. "CR1,Cancellation Request" "0,1" bitfld.long 0x00 0. "CR0,Cancellation Request" "0,1" rgroup.long ad:0xC00900D8++0x03 line.long 0x00 "TXBTO0,Tx Buffer Transmission Occurred Register i (i=0~2)" bitfld.long 0x00 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x00 30. "TO30,Transmission Occurred 30" "0,1" bitfld.long 0x00 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x00 28. "TO28,Transmission Occurred 28" "0,1" bitfld.long 0x00 27. "TO27,Transmission Occurred 27" "0,1" newline bitfld.long 0x00 26. "TO26,Transmission Occurred 26" "0,1" bitfld.long 0x00 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x00 24. "TO24,Transmission Occurred 24" "0,1" bitfld.long 0x00 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x00 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x00 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x00 20. "TO20,Transmission Occurred 20" "0,1" bitfld.long 0x00 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x00 18. "TO18,Transmission Occurred 18" "0,1" bitfld.long 0x00 17. "TO17,Transmission Occurred 17" "0,1" newline bitfld.long 0x00 16. "TO16,Transmission Occurred 16" "0,1" bitfld.long 0x00 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x00 14. "TO14,Transmission Occurred 14" "0,1" bitfld.long 0x00 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x00 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x00 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x00 10. "TO10,Transmission Occurred 10" "0,1" bitfld.long 0x00 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x00 8. "TO8,Transmission Occurred 8" "0,1" bitfld.long 0x00 7. "TO7,Transmission Occurred 7" "0,1" newline bitfld.long 0x00 6. "TO6,Transmission Occurred 6" "0,1" bitfld.long 0x00 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x00 4. "TO4,Transmission Occurred 4" "0,1" bitfld.long 0x00 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x00 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x00 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x00 0. "TO0,Transmission Occurred 0" "0,1" rgroup.long ad:0xC00918D8++0x03 line.long 0x00 "TXBTO1,Tx Buffer Transmission Occurred Register i (i=0~2)" bitfld.long 0x00 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x00 30. "TO30,Transmission Occurred 30" "0,1" bitfld.long 0x00 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x00 28. "TO28,Transmission Occurred 28" "0,1" bitfld.long 0x00 27. "TO27,Transmission Occurred 27" "0,1" newline bitfld.long 0x00 26. "TO26,Transmission Occurred 26" "0,1" bitfld.long 0x00 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x00 24. "TO24,Transmission Occurred 24" "0,1" bitfld.long 0x00 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x00 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x00 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x00 20. "TO20,Transmission Occurred 20" "0,1" bitfld.long 0x00 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x00 18. "TO18,Transmission Occurred 18" "0,1" bitfld.long 0x00 17. "TO17,Transmission Occurred 17" "0,1" newline bitfld.long 0x00 16. "TO16,Transmission Occurred 16" "0,1" bitfld.long 0x00 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x00 14. "TO14,Transmission Occurred 14" "0,1" bitfld.long 0x00 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x00 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x00 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x00 10. "TO10,Transmission Occurred 10" "0,1" bitfld.long 0x00 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x00 8. "TO8,Transmission Occurred 8" "0,1" bitfld.long 0x00 7. "TO7,Transmission Occurred 7" "0,1" newline bitfld.long 0x00 6. "TO6,Transmission Occurred 6" "0,1" bitfld.long 0x00 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x00 4. "TO4,Transmission Occurred 4" "0,1" bitfld.long 0x00 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x00 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x00 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x00 0. "TO0,Transmission Occurred 0" "0,1" rgroup.long ad:0xC00930D8++0x03 line.long 0x00 "TXBTO2,Tx Buffer Transmission Occurred Register i (i=0~2)" bitfld.long 0x00 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x00 30. "TO30,Transmission Occurred 30" "0,1" bitfld.long 0x00 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x00 28. "TO28,Transmission Occurred 28" "0,1" bitfld.long 0x00 27. "TO27,Transmission Occurred 27" "0,1" newline bitfld.long 0x00 26. "TO26,Transmission Occurred 26" "0,1" bitfld.long 0x00 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x00 24. "TO24,Transmission Occurred 24" "0,1" bitfld.long 0x00 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x00 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x00 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x00 20. "TO20,Transmission Occurred 20" "0,1" bitfld.long 0x00 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x00 18. "TO18,Transmission Occurred 18" "0,1" bitfld.long 0x00 17. "TO17,Transmission Occurred 17" "0,1" newline bitfld.long 0x00 16. "TO16,Transmission Occurred 16" "0,1" bitfld.long 0x00 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x00 14. "TO14,Transmission Occurred 14" "0,1" bitfld.long 0x00 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x00 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x00 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x00 10. "TO10,Transmission Occurred 10" "0,1" bitfld.long 0x00 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x00 8. "TO8,Transmission Occurred 8" "0,1" bitfld.long 0x00 7. "TO7,Transmission Occurred 7" "0,1" newline bitfld.long 0x00 6. "TO6,Transmission Occurred 6" "0,1" bitfld.long 0x00 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x00 4. "TO4,Transmission Occurred 4" "0,1" bitfld.long 0x00 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x00 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x00 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x00 0. "TO0,Transmission Occurred 0" "0,1" group.long ad:0xC00900DC++0x03 line.long 0x00 "TXBCF0,Tx Buffer Cancellation Finished Register i (i=0~2)" rbitfld.long 0x00 31. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 30. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 29. "CF31,Cancellation Finished" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Finished" "0,1" rbitfld.long 0x00 27. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 26. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 25. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 24. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 23. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 22. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 21. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 20. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 19. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 18. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 17. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 16. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 15. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 14. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 13. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 12. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 11. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 10. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 9. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 8. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 7. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 6. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 5. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 4. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 3. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 2. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 1. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 0. "CF31,Cancellation Finished" "0,1" group.long ad:0xC00918DC++0x03 line.long 0x00 "TXBCF1,Tx Buffer Cancellation Finished Register i (i=0~2)" rbitfld.long 0x00 31. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 30. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 29. "CF31,Cancellation Finished" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Finished" "0,1" rbitfld.long 0x00 27. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 26. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 25. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 24. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 23. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 22. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 21. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 20. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 19. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 18. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 17. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 16. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 15. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 14. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 13. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 12. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 11. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 10. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 9. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 8. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 7. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 6. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 5. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 4. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 3. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 2. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 1. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 0. "CF31,Cancellation Finished" "0,1" group.long ad:0xC00930DC++0x03 line.long 0x00 "TXBCF2,Tx Buffer Cancellation Finished Register i (i=0~2)" rbitfld.long 0x00 31. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 30. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 29. "CF31,Cancellation Finished" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Finished" "0,1" rbitfld.long 0x00 27. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 26. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 25. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 24. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 23. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 22. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 21. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 20. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 19. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 18. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 17. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 16. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 15. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 14. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 13. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 12. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 11. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 10. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 9. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 8. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 7. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 6. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 5. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 4. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 3. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 2. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 1. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 0. "CF31,Cancellation Finished" "0,1" group.long ad:0xC00900E0++0x03 line.long 0x00 "TXBTIE0,Tx Buffer Transmission Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "TIE31,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 30. "TIE30,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 29. "TIE29,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 28. "TIE28,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 27. "TIE27,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "TIE26,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 25. "TIE25,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 24. "TIE24,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 23. "TIE23,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 22. "TIE22,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "TIE21,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 20. "TIE20,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 19. "TIE19,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 18. "TIE18,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 17. "TIE17,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "TIE16,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 15. "TIE15,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 14. "TIE14,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 13. "TIE13,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 12. "TIE12,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "TIE11,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 10. "TIE10,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 9. "TIE9,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 8. "TIE8,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 7. "TIE7,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "TIE6,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 5. "TIE5,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 4. "TIE4,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 3. "TIE3,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 2. "TIE2,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "TIE1,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 0. "TIE0,Transmission Interrupt Enable" "0,1" group.long ad:0xC00918E0++0x03 line.long 0x00 "TXBTIE1,Tx Buffer Transmission Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "TIE31,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 30. "TIE30,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 29. "TIE29,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 28. "TIE28,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 27. "TIE27,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "TIE26,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 25. "TIE25,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 24. "TIE24,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 23. "TIE23,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 22. "TIE22,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "TIE21,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 20. "TIE20,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 19. "TIE19,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 18. "TIE18,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 17. "TIE17,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "TIE16,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 15. "TIE15,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 14. "TIE14,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 13. "TIE13,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 12. "TIE12,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "TIE11,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 10. "TIE10,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 9. "TIE9,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 8. "TIE8,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 7. "TIE7,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "TIE6,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 5. "TIE5,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 4. "TIE4,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 3. "TIE3,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 2. "TIE2,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "TIE1,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 0. "TIE0,Transmission Interrupt Enable" "0,1" group.long ad:0xC00930E0++0x03 line.long 0x00 "TXBTIE2,Tx Buffer Transmission Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "TIE31,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 30. "TIE30,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 29. "TIE29,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 28. "TIE28,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 27. "TIE27,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "TIE26,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 25. "TIE25,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 24. "TIE24,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 23. "TIE23,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 22. "TIE22,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "TIE21,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 20. "TIE20,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 19. "TIE19,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 18. "TIE18,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 17. "TIE17,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "TIE16,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 15. "TIE15,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 14. "TIE14,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 13. "TIE13,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 12. "TIE12,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "TIE11,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 10. "TIE10,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 9. "TIE9,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 8. "TIE8,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 7. "TIE7,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "TIE6,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 5. "TIE5,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 4. "TIE4,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 3. "TIE3,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 2. "TIE2,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "TIE1,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 0. "TIE0,Transmission Interrupt Enable" "0,1" group.long ad:0xC00900E4++0x03 line.long 0x00 "TXBCIE0,Tx Buffer Cancellation Finished Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "CFIE31,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 30. "CFIE30,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 29. "CFIE29,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 28. "CFIE28,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 27. "CFIE27,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "CFIE26,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 25. "CFIE25,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 24. "CFIE24,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 23. "CFIE23,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 22. "CFIE22,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "CFIE21,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 20. "CFIE20,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 19. "CFIE19,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 18. "CFIE18,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 17. "CFIE17,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "CFIE16,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 15. "CFIE15,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 14. "CFIE14,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 13. "CFIE13,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 12. "CFIE12,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "CFIE11,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 10. "CFIE10,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 9. "CFIE9,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 8. "CFIE8,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 7. "CFIE7,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "CFIE6,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 5. "CFIE5,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 4. "CFIE4,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 3. "CFIE3,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 2. "CFIE2,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "CFIE1,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 0. "CFIE0,Cancellation Finished Interrupt Enable" "0,1" group.long ad:0xC00918E4++0x03 line.long 0x00 "TXBCIE1,Tx Buffer Cancellation Finished Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "CFIE31,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 30. "CFIE30,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 29. "CFIE29,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 28. "CFIE28,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 27. "CFIE27,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "CFIE26,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 25. "CFIE25,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 24. "CFIE24,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 23. "CFIE23,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 22. "CFIE22,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "CFIE21,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 20. "CFIE20,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 19. "CFIE19,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 18. "CFIE18,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 17. "CFIE17,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "CFIE16,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 15. "CFIE15,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 14. "CFIE14,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 13. "CFIE13,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 12. "CFIE12,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "CFIE11,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 10. "CFIE10,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 9. "CFIE9,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 8. "CFIE8,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 7. "CFIE7,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "CFIE6,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 5. "CFIE5,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 4. "CFIE4,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 3. "CFIE3,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 2. "CFIE2,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "CFIE1,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 0. "CFIE0,Cancellation Finished Interrupt Enable" "0,1" group.long ad:0xC00930E4++0x03 line.long 0x00 "TXBCIE2,Tx Buffer Cancellation Finished Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "CFIE31,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 30. "CFIE30,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 29. "CFIE29,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 28. "CFIE28,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 27. "CFIE27,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "CFIE26,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 25. "CFIE25,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 24. "CFIE24,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 23. "CFIE23,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 22. "CFIE22,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "CFIE21,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 20. "CFIE20,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 19. "CFIE19,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 18. "CFIE18,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 17. "CFIE17,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "CFIE16,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 15. "CFIE15,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 14. "CFIE14,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 13. "CFIE13,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 12. "CFIE12,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "CFIE11,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 10. "CFIE10,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 9. "CFIE9,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 8. "CFIE8,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 7. "CFIE7,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "CFIE6,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 5. "CFIE5,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 4. "CFIE4,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 3. "CFIE3,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 2. "CFIE2,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "CFIE1,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 0. "CFIE0,Cancellation Finished Interrupt Enable" "0,1" group.long ad:0xC00900F0++0x03 line.long 0x00 "TXEFC0,Tx Event FIFO Configuration Register i (i=0~2)" hexmask.long.byte 0x00 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x00 16.--21. 1. "EFS,Event FIFO Size" hexmask.long.word 0x00 2.--15. 1. "EFSA,Event FIFO Start Address" group.long ad:0xC00918F0++0x03 line.long 0x00 "TXEFC1,Tx Event FIFO Configuration Register i (i=0~2)" hexmask.long.byte 0x00 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x00 16.--21. 1. "EFS,Event FIFO Size" hexmask.long.word 0x00 2.--15. 1. "EFSA,Event FIFO Start Address" group.long ad:0xC00930F0++0x03 line.long 0x00 "TXEFC2,Tx Event FIFO Configuration Register i (i=0~2)" hexmask.long.byte 0x00 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x00 16.--21. 1. "EFS,Event FIFO Size" hexmask.long.word 0x00 2.--15. 1. "EFSA,Event FIFO Start Address" rgroup.long ad:0xC00900F4++0x03 line.long 0x00 "TXEFS0,Tx Event FIFO Status Register i (i=0~2)" bitfld.long 0x00 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x00 24. "EFF,Event FIFO Full" "0,1" bitfld.long 0x00 16.--20. "EFPI,Event FIFO Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "EFGI,Event FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "EFFL,Rx FIFO 1 Fill Level" rgroup.long ad:0xC00918F4++0x03 line.long 0x00 "TXEFS1,Tx Event FIFO Status Register i (i=0~2)" bitfld.long 0x00 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x00 24. "EFF,Event FIFO Full" "0,1" bitfld.long 0x00 16.--20. "EFPI,Event FIFO Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "EFGI,Event FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "EFFL,Rx FIFO 1 Fill Level" rgroup.long ad:0xC00930F4++0x03 line.long 0x00 "TXEFS2,Tx Event FIFO Status Register i (i=0~2)" bitfld.long 0x00 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x00 24. "EFF,Event FIFO Full" "0,1" bitfld.long 0x00 16.--20. "EFPI,Event FIFO Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "EFGI,Event FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "EFFL,Rx FIFO 1 Fill Level" group.long ad:0xC00900F8++0x03 line.long 0x00 "TXEFA0,Tx Event FIFO Acknowledge Register i (i=0~2)" bitfld.long 0x00 0.--4. "EFAI,Event FIFO Acknowledge Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC00918F8++0x03 line.long 0x00 "TXEFA1,Tx Event FIFO Acknowledge Register i (i=0~2)" bitfld.long 0x00 0.--4. "EFAI,Event FIFO Acknowledge Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC00930F8++0x03 line.long 0x00 "TXEFA2,Tx Event FIFO Acknowledge Register i (i=0~2)" bitfld.long 0x00 0.--4. "EFAI,Event FIFO Acknowledge Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long ad:0xC0090100++0x03 line.long 0x00 "TTTMC,TT Trigger Memory Configuration Register" hexmask.long.byte 0x00 16.--22. 1. "TME,Trigger Memory Elements" hexmask.long.word 0x00 2.--15. 1. "TMSA,Trigger Memory Start Address" group.long ad:0xC0090104++0x27 line.long 0x00 "TTRMC,TT Reference Message Configuration Register" bitfld.long 0x00 31. "RMPS,Reference Message Payload Select" "0,1" bitfld.long 0x00 30. "XTD,Extended Identifier" "0,1" hexmask.long 0x00 0.--28. 1. "RID,Reference Identifier" line.long 0x04 "TTOCF,TT Operation Configuration Register" bitfld.long 0x04 26. "EVTP,Event Trigger Polarity" "0,1" bitfld.long 0x04 25. "ECC,Enable Clock Calibration" "0,1" bitfld.long 0x04 24. "EGTF,Enable Global Time Filtering" "0,1" hexmask.long.byte 0x04 16.--23. 1. "AWL,Application Watchdog Limit" bitfld.long 0x04 15. "EECS,Enable External Clock Synchronization" "0,1" newline hexmask.long.byte 0x04 8.--14. 1. "IRTO,Initial Reference Trigger Offset" bitfld.long 0x04 5.--7. "LDSDL,LD of Synchronization Deviation Limit" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4. "TM,Time Master" "0,1" bitfld.long 0x04 3. "GEN,Gap Enable" "0,1" bitfld.long 0x04 0.--1. "OM,Operation Mode" "0,1,2,3" line.long 0x08 "TTMLM,TT Matrix Limits Register" hexmask.long.word 0x08 16.--27. 1. "ENTT,Expected Number of Tx Triggers" bitfld.long 0x08 8.--11. "TXEW,Tx Enable Window" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 6.--7. "CSS,Cycle Start Synchronization" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "CCM,Cycle Count Max" line.long 0x0C "TURCF,TUR Configuration Register" bitfld.long 0x0C 31. "ELT,Enable Local Time" "0,1" hexmask.long.word 0x0C 16.--29. 1. "DC,Denominator Configuration" hexmask.long.word 0x0C 0.--15. 1. "NCL,Numerator Configuration Low" line.long 0x10 "TTOCN,TT Operation Control Register" bitfld.long 0x10 15. "LCKC,TT Operation Control Register Locked" "0,1" bitfld.long 0x10 13. "ESCN,External Synchronization Control" "0,1" bitfld.long 0x10 12. "NIG,Next is Gap" "0,1" bitfld.long 0x10 11. "TMG,Time Mark Gap" "0,1" bitfld.long 0x10 10. "FGP,Finish Gap" "0,1" newline bitfld.long 0x10 9. "GCS,Gap Control Select" "0,1" bitfld.long 0x10 8. "TTIE,Trigger Time Mark Interrupt Pulse Enable" "0,1" bitfld.long 0x10 6.--7. "TMC,Register Time Mark Compare" "0,1,2,3" bitfld.long 0x10 5. "RTIE,Register Time Mark Interrupt Pulse Enable" "0,1" bitfld.long 0x10 3.--4. "SWS,Stop Watch Source" "0,1,2,3" newline bitfld.long 0x10 2. "SWP,Stop Watch Polarity" "0,1" bitfld.long 0x10 1. "ECS,External Clock Synchronization" "0,1" bitfld.long 0x10 0. "SGT,Set Global time" "0,1" line.long 0x14 "TTGTP,TT Global Time Preset Register" hexmask.long.word 0x14 16.--31. 1. "CTP,Cycle Time Target Phase" hexmask.long.word 0x14 0.--15. 1. "TP,Time Preset" line.long 0x18 "TTTMK,TT Time Mark Register" rbitfld.long 0x18 31. "LCKM,TT Time Mark Register Locked" "0,1" hexmask.long.byte 0x18 16.--22. 1. "TICC,Time Mark Cycle Code" hexmask.long.word 0x18 0.--15. 1. "TM,Time Mark" line.long 0x1C "TTIR,TT Interrupt Register" bitfld.long 0x1C 18. "CER,Configuration Error" "0,1" bitfld.long 0x1C 17. "AW,Application Watchdog" "0,1" bitfld.long 0x1C 16. "WT,Watch Trigger" "0,1" bitfld.long 0x1C 15. "IWT,Initialization Watch Trigger" "0,1" bitfld.long 0x1C 14. "ELC,Error Level Changed" "0,1" newline bitfld.long 0x1C 13. "SE2,Scheduling Error 2" "0,1" bitfld.long 0x1C 12. "SE1,Scheduling Error 1" "0,1" bitfld.long 0x1C 11. "TXO,Tx Count Overflow" "0,1" bitfld.long 0x1C 10. "TXU,Tx Count Underflow" "0,1" bitfld.long 0x1C 9. "GTE,Global Time Error" "0,1" newline bitfld.long 0x1C 8. "GTD,Global Time Discontinuity" "0,1" bitfld.long 0x1C 7. "GTW,Global Time Wrap" "0,1" bitfld.long 0x1C 6. "SWE,Stop Watch Event" "0,1" bitfld.long 0x1C 5. "TTMI,Trigger Time Mark Event Internal" "0,1" bitfld.long 0x1C 4. "RTMI,Register Time Mark Interrupt" "0,1" newline bitfld.long 0x1C 3. "SOG,Start of Gap" "0,1" bitfld.long 0x1C 2. "CSM,Change of Synchronization Mode" "0,1" bitfld.long 0x1C 1. "SMC,Start of Matrix Cycle" "0,1" bitfld.long 0x1C 0. "SBC,Start of Basic Cycle" "0,1" line.long 0x20 "TTIE,TT Interrupt Enable Register" bitfld.long 0x20 18. "CERE,Configuration Error Enable" "0,1" bitfld.long 0x20 17. "AWE,Application Watchdog Enable" "0,1" bitfld.long 0x20 16. "WTE,Watch Trigger Enable" "0,1" bitfld.long 0x20 15. "IWTE,Initialization Watch Trigger Enable" "0,1" bitfld.long 0x20 14. "ELCE,Error Level Changed Enable" "0,1" newline bitfld.long 0x20 13. "SE2E,Scheduling Error 2 Enable" "0,1" bitfld.long 0x20 12. "SE1E,Scheduling Error 1 Enable" "0,1" bitfld.long 0x20 11. "TXOE,Tx Count Overflow Enable" "0,1" bitfld.long 0x20 10. "TXUE,Tx Count Underflow Enable" "0,1" bitfld.long 0x20 9. "GTEE,Global Time Error Enable" "0,1" newline bitfld.long 0x20 8. "GTDE,Global Time Discontinuity Enable" "0,1" bitfld.long 0x20 7. "GTWE,Global Time Wrap Enable" "0,1" bitfld.long 0x20 6. "SWEE,Stop Watch Event Enable" "0,1" bitfld.long 0x20 5. "TTMIE,Trigger Time Mark Event Internal Enable" "0,1" bitfld.long 0x20 4. "RTMIE,Register Time Mark Interrupt Enable" "0,1" newline bitfld.long 0x20 3. "SOGE,Start of Gap Enable" "0,1" bitfld.long 0x20 2. "CSME,Change of Synchronization Mode Enable" "0,1" bitfld.long 0x20 1. "SMCE,Start of Matrix Cycle Enable" "0,1" bitfld.long 0x20 0. "SBCE,Start of Basic Cycle Enable" "0,1" line.long 0x24 "TTILS,TT Interrupt Line Select Register" bitfld.long 0x24 18. "CERL,Configuration Error Line" "0,1" bitfld.long 0x24 17. "AWL,Application Watchdog Line" "0,1" bitfld.long 0x24 16. "WTL,Watch Trigger Line" "0,1" bitfld.long 0x24 15. "IWTL,Initialization Watch Trigger Line" "0,1" bitfld.long 0x24 14. "ELCL,Error Level Changed Line" "0,1" newline bitfld.long 0x24 13. "SE2L,Scheduling Error 2 Line" "0,1" bitfld.long 0x24 12. "SE1L,Scheduling Error 1 Line" "0,1" bitfld.long 0x24 11. "TXOL,Tx Count Overflow Line" "0,1" bitfld.long 0x24 10. "TXUL,Tx Count Underflow Line" "0,1" bitfld.long 0x24 9. "GTEL,Global Time Error Line" "0,1" newline bitfld.long 0x24 8. "GTDL,Global Time Discontinuity Line" "0,1" bitfld.long 0x24 7. "GTWL,Global Time Wrap Line" "0,1" bitfld.long 0x24 6. "SWEL,Stop Watch Event Line" "0,1" bitfld.long 0x24 5. "TTMIL,Trigger Time Mark Event Internal Line" "0,1" bitfld.long 0x24 4. "RTMIL,Register Time Mark Interrupt Line" "0,1" newline bitfld.long 0x24 3. "SOGL,Start of Gap Line" "0,1" bitfld.long 0x24 2. "CSML,Change of Synchronization Mode Line" "0,1" bitfld.long 0x24 1. "SMCL,Start of Matrix Cycle Line" "0,1" bitfld.long 0x24 0. "SBCL,Start of Basic Cycle Line" "0,1" rgroup.long ad:0xC009012C++0x17 line.long 0x00 "TTOST,TT Operation Status Register" bitfld.long 0x00 31. "SPL,Schedule Phase Lock" "0,1" bitfld.long 0x00 30. "WECS,Wait for External Clock Synchronization" "0,1" bitfld.long 0x00 29. "AWE,Application Watchdog Event" "0,1" bitfld.long 0x00 28. "WFE,Wait for Event" "0,1" bitfld.long 0x00 27. "GSI,Gap Started Indicator" "0,1" newline bitfld.long 0x00 24.--26. "TMP,Time Master Priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "GFI,Gap Finished Indicator" "0,1" bitfld.long 0x00 22. "WGTD,Wait for Global Time Discontinuity" "0,1" hexmask.long.byte 0x00 8.--15. 1. "RTO,Reference Trigger Offset" bitfld.long 0x00 7. "QCS,Quality of Clock Speed" "0,1" newline bitfld.long 0x00 6. "QGTP,Quality of Global Time Phase" "0,1" bitfld.long 0x00 4.--5. "SYS,Synchronization State" "0,1,2,3" bitfld.long 0x00 2.--3. "MS,Master State" "0,1,2,3" bitfld.long 0x00 0.--1. "EL,Error Level" "0,1,2,3" line.long 0x04 "TURNA,TUR Numerator Actual Register" hexmask.long.tbyte 0x04 0.--17. 1. "LT,Numerator Actual Value" line.long 0x08 "TTLGT,TT Local & Global Time Register" hexmask.long.word 0x08 16.--31. 1. "GT,Global Time" hexmask.long.word 0x08 0.--15. 1. "LT,Local Time" line.long 0x0C "TTCTC,TT Cycle Time & Count Register" hexmask.long.byte 0x0C 16.--21. 1. "CC,Cycle Count" hexmask.long.word 0x0C 0.--15. 1. "CT,Cycle Time" line.long 0x10 "TTCPT,TT Capture Time Register" hexmask.long.word 0x10 16.--31. 1. "SWV,Stop Watch Value" hexmask.long.byte 0x10 0.--5. 1. "CCV,Cycle Count Value" line.long 0x14 "TTCSM,TT Cycle Sync Mark Register" hexmask.long.word 0x14 0.--15. 1. "CSM,Cycle Sync Mark" rgroup.long ad:0xC00903C0++0x03 line.long 0x00 "DMUCR0,DMU Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Day" rgroup.long ad:0xC0091BC0++0x03 line.long 0x00 "DMUCR1,DMU Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Day" rgroup.long ad:0xC00933C0++0x03 line.long 0x00 "DMUCR2,DMU Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Day" group.long ad:0xC00903C4++0x03 line.long 0x00 "DMUI0,DMU Internals Register i (i=0~2)" rbitfld.long 0x00 31. "TXE,Actual DMU Element Service" "0,1" rbitfld.long 0x00 30. "RX1,Actual DMU Element Service" "0,1" rbitfld.long 0x00 29. "RX0,Actual DMU Element Service" "0,1" rbitfld.long 0x00 28. "TX,Actual DMU Element Service" "0,1" rbitfld.long 0x00 24.--26. "EHS,Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 23. "DTXE,Detect DMU Element Service" "0,1" rbitfld.long 0x00 22. "DRX1,Detect DMU Element Service" "0,1" rbitfld.long 0x00 21. "DRX0,Detect DMU Element Service" "0,1" rbitfld.long 0x00 20. "DTX,Detect DMU Element Service" "0,1" bitfld.long 0x00 16.--18. "DEHS,Detect Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 15. "ENA,DMU is enabled" "0,1" rbitfld.long 0x00 8.--12. "TFQPIP,TX FIFO/Queue Put Index Previous" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 3. "TXER,TX Event Service Request line of DMU" "0,1" rbitfld.long 0x00 2. "RX1R,RX1 Service Request line of DMU" "0,1" rbitfld.long 0x00 1. "RX0R,RX0 Service Request line of DMU" "0,1" newline rbitfld.long 0x00 0. "ND0,TX Service Request line of DMU" "0,1" group.long ad:0xC0091BC4++0x03 line.long 0x00 "DMUI1,DMU Internals Register i (i=0~2)" rbitfld.long 0x00 31. "TXE,Actual DMU Element Service" "0,1" rbitfld.long 0x00 30. "RX1,Actual DMU Element Service" "0,1" rbitfld.long 0x00 29. "RX0,Actual DMU Element Service" "0,1" rbitfld.long 0x00 28. "TX,Actual DMU Element Service" "0,1" rbitfld.long 0x00 24.--26. "EHS,Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 23. "DTXE,Detect DMU Element Service" "0,1" rbitfld.long 0x00 22. "DRX1,Detect DMU Element Service" "0,1" rbitfld.long 0x00 21. "DRX0,Detect DMU Element Service" "0,1" rbitfld.long 0x00 20. "DTX,Detect DMU Element Service" "0,1" bitfld.long 0x00 16.--18. "DEHS,Detect Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 15. "ENA,DMU is enabled" "0,1" rbitfld.long 0x00 8.--12. "TFQPIP,TX FIFO/Queue Put Index Previous" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 3. "TXER,TX Event Service Request line of DMU" "0,1" rbitfld.long 0x00 2. "RX1R,RX1 Service Request line of DMU" "0,1" rbitfld.long 0x00 1. "RX0R,RX0 Service Request line of DMU" "0,1" newline rbitfld.long 0x00 0. "ND0,TX Service Request line of DMU" "0,1" group.long ad:0xC00933C4++0x03 line.long 0x00 "DMUI2,DMU Internals Register i (i=0~2)" rbitfld.long 0x00 31. "TXE,Actual DMU Element Service" "0,1" rbitfld.long 0x00 30. "RX1,Actual DMU Element Service" "0,1" rbitfld.long 0x00 29. "RX0,Actual DMU Element Service" "0,1" rbitfld.long 0x00 28. "TX,Actual DMU Element Service" "0,1" rbitfld.long 0x00 24.--26. "EHS,Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 23. "DTXE,Detect DMU Element Service" "0,1" rbitfld.long 0x00 22. "DRX1,Detect DMU Element Service" "0,1" rbitfld.long 0x00 21. "DRX0,Detect DMU Element Service" "0,1" rbitfld.long 0x00 20. "DTX,Detect DMU Element Service" "0,1" bitfld.long 0x00 16.--18. "DEHS,Detect Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 15. "ENA,DMU is enabled" "0,1" rbitfld.long 0x00 8.--12. "TFQPIP,TX FIFO/Queue Put Index Previous" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 3. "TXER,TX Event Service Request line of DMU" "0,1" rbitfld.long 0x00 2. "RX1R,RX1 Service Request line of DMU" "0,1" rbitfld.long 0x00 1. "RX0R,RX0 Service Request line of DMU" "0,1" newline rbitfld.long 0x00 0. "ND0,TX Service Request line of DMU" "0,1" rgroup.long ad:0xC00903C8++0x03 line.long 0x00 "DMUQC0,DMU Queueing Counter Register i (i=0~2)" hexmask.long.byte 0x00 24.--31. 1. "TXEEDC,TX Event Element Dequeueing Counter" hexmask.long.byte 0x00 16.--23. 1. "RX1EDC,RX1 Element Dequeueing Counter" hexmask.long.byte 0x00 8.--15. 1. "RX0EDC,RX0 Element Dequeueing Counter" hexmask.long.byte 0x00 0.--7. 1. "TXEEC,TX Element Enqueueing Counter" rgroup.long ad:0xC0091BC8++0x03 line.long 0x00 "DMUQC1,DMU Queueing Counter Register i (i=0~2)" hexmask.long.byte 0x00 24.--31. 1. "TXEEDC,TX Event Element Dequeueing Counter" hexmask.long.byte 0x00 16.--23. 1. "RX1EDC,RX1 Element Dequeueing Counter" hexmask.long.byte 0x00 8.--15. 1. "RX0EDC,RX0 Element Dequeueing Counter" hexmask.long.byte 0x00 0.--7. 1. "TXEEC,TX Element Enqueueing Counter" rgroup.long ad:0xC00933C8++0x03 line.long 0x00 "DMUQC2,DMU Queueing Counter Register i (i=0~2)" hexmask.long.byte 0x00 24.--31. 1. "TXEEDC,TX Event Element Dequeueing Counter" hexmask.long.byte 0x00 16.--23. 1. "RX1EDC,RX1 Element Dequeueing Counter" hexmask.long.byte 0x00 8.--15. 1. "RX0EDC,RX0 Element Dequeueing Counter" hexmask.long.byte 0x00 0.--7. 1. "TXEEC,TX Element Enqueueing Counter" rgroup.long ad:0xC00903CC++0x03 line.long 0x00 "DMUIR0,DMU Interrupt Register i (i=0~2)" bitfld.long 0x00 30. "IAC,Illegal Access while in Configuration mode" "0,1" bitfld.long 0x00 29. "DT,Debug Trigger" "0,1" bitfld.long 0x00 28. "TXEED,TX Event Element Dequeued" "0,1" bitfld.long 0x00 27. "TXEEIW,TX Event Element Illegal" "0,1" bitfld.long 0x00 26. "TXEEIAS,TX Event Element Illegal Access Sequence" "0,1" newline bitfld.long 0x00 25. "TXEEID,TX Event Element Illegal Dequeueing" "0,1" bitfld.long 0x00 24. "TXEENSA,TX Event Element Not Start Address" "0,1" bitfld.long 0x00 21. "RX1EIO,RX1 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 20. "RX1ED,RX1 Element Dequeued" "0,1" bitfld.long 0x00 19. "RX1EIW,RX1 Element Illegal" "0,1" newline bitfld.long 0x00 18. "RX1EIAS,RX1 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 17. "RX1EID,RX1 Element Illegal Dequeueing" "0,1" bitfld.long 0x00 16. "RX1ENSA,RX1 Element Not Start Address" "0,1" bitfld.long 0x00 15. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 14. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 13. "RX0EIO,RX0 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 12. "RX0ED,RX0 Element Dequeued" "0,1" bitfld.long 0x00 11. "RX0EIW,RX0 Element Illegal" "0,1" bitfld.long 0x00 10. "RX0EIAS,RX0 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 9. "RX0EID,RX0 Element Illegal Dequeueing" "0,1" newline bitfld.long 0x00 8. "RX0ENSA,RX0 Element Not Start Address" "0,1" bitfld.long 0x00 6. "TXEE,TX Element Enqueued" "0,1" bitfld.long 0x00 5. "TXEIR,TX Element Illegal" "0,1" bitfld.long 0x00 4. "TXEWATA,TX Element Write After Trigger Address" "0,1" bitfld.long 0x00 3. "TXEIDLC,TX Element Illegal DLC" "0,1" newline bitfld.long 0x00 2. "TXEIAS,TX Element Illegal Access Sequence" "0,1" bitfld.long 0x00 1. "TXEIE,TX Element Illegal Enqueueing" "0,1" bitfld.long 0x00 0. "TXENSA,TX Element Not Start Address" "0,1" rgroup.long ad:0xC0091BCC++0x03 line.long 0x00 "DMUIR1,DMU Interrupt Register i (i=0~2)" bitfld.long 0x00 30. "IAC,Illegal Access while in Configuration mode" "0,1" bitfld.long 0x00 29. "DT,Debug Trigger" "0,1" bitfld.long 0x00 28. "TXEED,TX Event Element Dequeued" "0,1" bitfld.long 0x00 27. "TXEEIW,TX Event Element Illegal" "0,1" bitfld.long 0x00 26. "TXEEIAS,TX Event Element Illegal Access Sequence" "0,1" newline bitfld.long 0x00 25. "TXEEID,TX Event Element Illegal Dequeueing" "0,1" bitfld.long 0x00 24. "TXEENSA,TX Event Element Not Start Address" "0,1" bitfld.long 0x00 21. "RX1EIO,RX1 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 20. "RX1ED,RX1 Element Dequeued" "0,1" bitfld.long 0x00 19. "RX1EIW,RX1 Element Illegal" "0,1" newline bitfld.long 0x00 18. "RX1EIAS,RX1 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 17. "RX1EID,RX1 Element Illegal Dequeueing" "0,1" bitfld.long 0x00 16. "RX1ENSA,RX1 Element Not Start Address" "0,1" bitfld.long 0x00 15. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 14. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 13. "RX0EIO,RX0 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 12. "RX0ED,RX0 Element Dequeued" "0,1" bitfld.long 0x00 11. "RX0EIW,RX0 Element Illegal" "0,1" bitfld.long 0x00 10. "RX0EIAS,RX0 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 9. "RX0EID,RX0 Element Illegal Dequeueing" "0,1" newline bitfld.long 0x00 8. "RX0ENSA,RX0 Element Not Start Address" "0,1" bitfld.long 0x00 6. "TXEE,TX Element Enqueued" "0,1" bitfld.long 0x00 5. "TXEIR,TX Element Illegal" "0,1" bitfld.long 0x00 4. "TXEWATA,TX Element Write After Trigger Address" "0,1" bitfld.long 0x00 3. "TXEIDLC,TX Element Illegal DLC" "0,1" newline bitfld.long 0x00 2. "TXEIAS,TX Element Illegal Access Sequence" "0,1" bitfld.long 0x00 1. "TXEIE,TX Element Illegal Enqueueing" "0,1" bitfld.long 0x00 0. "TXENSA,TX Element Not Start Address" "0,1" rgroup.long ad:0xC00933CC++0x03 line.long 0x00 "DMUIR2,DMU Interrupt Register i (i=0~2)" bitfld.long 0x00 30. "IAC,Illegal Access while in Configuration mode" "0,1" bitfld.long 0x00 29. "DT,Debug Trigger" "0,1" bitfld.long 0x00 28. "TXEED,TX Event Element Dequeued" "0,1" bitfld.long 0x00 27. "TXEEIW,TX Event Element Illegal" "0,1" bitfld.long 0x00 26. "TXEEIAS,TX Event Element Illegal Access Sequence" "0,1" newline bitfld.long 0x00 25. "TXEEID,TX Event Element Illegal Dequeueing" "0,1" bitfld.long 0x00 24. "TXEENSA,TX Event Element Not Start Address" "0,1" bitfld.long 0x00 21. "RX1EIO,RX1 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 20. "RX1ED,RX1 Element Dequeued" "0,1" bitfld.long 0x00 19. "RX1EIW,RX1 Element Illegal" "0,1" newline bitfld.long 0x00 18. "RX1EIAS,RX1 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 17. "RX1EID,RX1 Element Illegal Dequeueing" "0,1" bitfld.long 0x00 16. "RX1ENSA,RX1 Element Not Start Address" "0,1" bitfld.long 0x00 15. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 14. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 13. "RX0EIO,RX0 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 12. "RX0ED,RX0 Element Dequeued" "0,1" bitfld.long 0x00 11. "RX0EIW,RX0 Element Illegal" "0,1" bitfld.long 0x00 10. "RX0EIAS,RX0 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 9. "RX0EID,RX0 Element Illegal Dequeueing" "0,1" newline bitfld.long 0x00 8. "RX0ENSA,RX0 Element Not Start Address" "0,1" bitfld.long 0x00 6. "TXEE,TX Element Enqueued" "0,1" bitfld.long 0x00 5. "TXEIR,TX Element Illegal" "0,1" bitfld.long 0x00 4. "TXEWATA,TX Element Write After Trigger Address" "0,1" bitfld.long 0x00 3. "TXEIDLC,TX Element Illegal DLC" "0,1" newline bitfld.long 0x00 2. "TXEIAS,TX Element Illegal Access Sequence" "0,1" bitfld.long 0x00 1. "TXEIE,TX Element Illegal Enqueueing" "0,1" bitfld.long 0x00 0. "TXENSA,TX Element Not Start Address" "0,1" group.long ad:0xC00903D0++0x03 line.long 0x00 "DMUIE0,DMU Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 30. "IACE,Illegal Access while in Configuration mode Enable" "0,1" bitfld.long 0x00 29. "DTE,Debug Trigger Enable" "0,1" bitfld.long 0x00 28. "TXEEDE,TX Event Element Dequeued Enable" "0,1" bitfld.long 0x00 27. "TXEEIWE,TX Event Element Illegal Write Enable" "0,1" bitfld.long 0x00 26. "TXEEIASE,TX Event Element Illegal Access Sequence Enable" "0,1" newline bitfld.long 0x00 25. "TXEEIDE,TX Event Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 24. "TXEENSAE,TX Event Element Not Start Address Enable" "0,1" bitfld.long 0x00 21. "RX1EIOE,RX1 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 20. "RX1EDE,RX1 Element Dequeued Enable" "0,1" bitfld.long 0x00 19. "RX1EIWE,RX1 Element Illegal Write Enable" "0,1" newline bitfld.long 0x00 18. "RX1EIASE,RX1 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 17. "RX1EIDE,RX1 Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 16. "RX1ENSAE,RX1 Element Not Start Address Enable" "0,1" bitfld.long 0x00 15. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 14. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 13. "RX0EIOE,RX0 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 12. "RX0EDE,RX0 Element Dequeued Enable" "0,1" bitfld.long 0x00 11. "RX0EIWE,RX0 Element Illegal Write Enable" "0,1" bitfld.long 0x00 10. "RX0EIASE,RX0 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 9. "RX0EIDE,RX0 Element Illegal Dequeueing Enable" "0,1" newline bitfld.long 0x00 8. "RX0ENSAE,RX0 Element Not Start Address Enable" "0,1" bitfld.long 0x00 6. "TXEEE,TX Element Enqueued Enable" "0,1" bitfld.long 0x00 5. "TXEIRE,TX Element Illegal Read Enable" "0,1" bitfld.long 0x00 4. "TXEWATAE,TX Element Write After Trigger Address Enable" "0,1" bitfld.long 0x00 3. "TXEIDLCE,TX Element Illegal DLC Enable" "0,1" newline bitfld.long 0x00 2. "TXEIASE,TX Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 1. "TXEIEE,TX Element Illegal Enqueueing Enable" "0,1" bitfld.long 0x00 0. "TXENSAE,TX Element Not Start Address Enable" "0,1" group.long ad:0xC0091BD0++0x03 line.long 0x00 "DMUIE1,DMU Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 30. "IACE,Illegal Access while in Configuration mode Enable" "0,1" bitfld.long 0x00 29. "DTE,Debug Trigger Enable" "0,1" bitfld.long 0x00 28. "TXEEDE,TX Event Element Dequeued Enable" "0,1" bitfld.long 0x00 27. "TXEEIWE,TX Event Element Illegal Write Enable" "0,1" bitfld.long 0x00 26. "TXEEIASE,TX Event Element Illegal Access Sequence Enable" "0,1" newline bitfld.long 0x00 25. "TXEEIDE,TX Event Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 24. "TXEENSAE,TX Event Element Not Start Address Enable" "0,1" bitfld.long 0x00 21. "RX1EIOE,RX1 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 20. "RX1EDE,RX1 Element Dequeued Enable" "0,1" bitfld.long 0x00 19. "RX1EIWE,RX1 Element Illegal Write Enable" "0,1" newline bitfld.long 0x00 18. "RX1EIASE,RX1 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 17. "RX1EIDE,RX1 Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 16. "RX1ENSAE,RX1 Element Not Start Address Enable" "0,1" bitfld.long 0x00 15. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 14. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 13. "RX0EIOE,RX0 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 12. "RX0EDE,RX0 Element Dequeued Enable" "0,1" bitfld.long 0x00 11. "RX0EIWE,RX0 Element Illegal Write Enable" "0,1" bitfld.long 0x00 10. "RX0EIASE,RX0 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 9. "RX0EIDE,RX0 Element Illegal Dequeueing Enable" "0,1" newline bitfld.long 0x00 8. "RX0ENSAE,RX0 Element Not Start Address Enable" "0,1" bitfld.long 0x00 6. "TXEEE,TX Element Enqueued Enable" "0,1" bitfld.long 0x00 5. "TXEIRE,TX Element Illegal Read Enable" "0,1" bitfld.long 0x00 4. "TXEWATAE,TX Element Write After Trigger Address Enable" "0,1" bitfld.long 0x00 3. "TXEIDLCE,TX Element Illegal DLC Enable" "0,1" newline bitfld.long 0x00 2. "TXEIASE,TX Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 1. "TXEIEE,TX Element Illegal Enqueueing Enable" "0,1" bitfld.long 0x00 0. "TXENSAE,TX Element Not Start Address Enable" "0,1" group.long ad:0xC00933D0++0x03 line.long 0x00 "DMUIE2,DMU Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 30. "IACE,Illegal Access while in Configuration mode Enable" "0,1" bitfld.long 0x00 29. "DTE,Debug Trigger Enable" "0,1" bitfld.long 0x00 28. "TXEEDE,TX Event Element Dequeued Enable" "0,1" bitfld.long 0x00 27. "TXEEIWE,TX Event Element Illegal Write Enable" "0,1" bitfld.long 0x00 26. "TXEEIASE,TX Event Element Illegal Access Sequence Enable" "0,1" newline bitfld.long 0x00 25. "TXEEIDE,TX Event Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 24. "TXEENSAE,TX Event Element Not Start Address Enable" "0,1" bitfld.long 0x00 21. "RX1EIOE,RX1 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 20. "RX1EDE,RX1 Element Dequeued Enable" "0,1" bitfld.long 0x00 19. "RX1EIWE,RX1 Element Illegal Write Enable" "0,1" newline bitfld.long 0x00 18. "RX1EIASE,RX1 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 17. "RX1EIDE,RX1 Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 16. "RX1ENSAE,RX1 Element Not Start Address Enable" "0,1" bitfld.long 0x00 15. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 14. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 13. "RX0EIOE,RX0 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 12. "RX0EDE,RX0 Element Dequeued Enable" "0,1" bitfld.long 0x00 11. "RX0EIWE,RX0 Element Illegal Write Enable" "0,1" bitfld.long 0x00 10. "RX0EIASE,RX0 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 9. "RX0EIDE,RX0 Element Illegal Dequeueing Enable" "0,1" newline bitfld.long 0x00 8. "RX0ENSAE,RX0 Element Not Start Address Enable" "0,1" bitfld.long 0x00 6. "TXEEE,TX Element Enqueued Enable" "0,1" bitfld.long 0x00 5. "TXEIRE,TX Element Illegal Read Enable" "0,1" bitfld.long 0x00 4. "TXEWATAE,TX Element Write After Trigger Address Enable" "0,1" bitfld.long 0x00 3. "TXEIDLCE,TX Element Illegal DLC Enable" "0,1" newline bitfld.long 0x00 2. "TXEIASE,TX Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 1. "TXEIEE,TX Element Illegal Enqueueing Enable" "0,1" bitfld.long 0x00 0. "TXENSAE,TX Element Not Start Address Enable" "0,1" group.long ad:0xC00903D4++0x03 line.long 0x00 "DMUC0,DMU Configuration i (i=0~2)" group.long ad:0xC0091BD4++0x03 line.long 0x00 "DMUC1,DMU Configuration i (i=0~2)" group.long ad:0xC00933D4++0x03 line.long 0x00 "DMUC2,DMU Configuration i (i=0~2)" group.long ad:0xC0090804++0x03 line.long 0x00 "RIE0,Routing Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARARE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDRE,Protocol Error in Data Phase Enable" "0,1" bitfld.long 0x00 27. "PEARE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x00 26. "WDIRE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BORE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x00 24. "EWRE,Warning Status Interrupt Enable" "0,1" bitfld.long 0x00 23. "EPRE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x00 22. "ELORE,Error Logging Overflow Interrupt Enable" "0,1" bitfld.long 0x00 21. "BEURE,Bit Error Uncorrected Interrupt Enable" "0,1" bitfld.long 0x00 20. "BECRE,Bit Error Corrected Interrupt Enable" "0,1" newline bitfld.long 0x00 19. "DRXRE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x00 18. "TOORE,Timeout Occurred Interrupt Enable" "0,1" bitfld.long 0x00 17. "MRAFRE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x00 16. "TSWRE,Timestamp Wraparound Interrupt Enable" "0,1" bitfld.long 0x00 15. "TEFLRE,Tx Event FIFO Event Lost Interrupt Enable" "0,1" newline bitfld.long 0x00 14. "TEFFRE,Tx Event FIFO Full Interrupt Enable" "0,1" bitfld.long 0x00 13. "TEFWRE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 12. "TEFNRE,Tx Event FIDO New Entry Interrupt Enable" "0,1" bitfld.long 0x00 11. "TFERE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x00 10. "FCFRE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 9. "TCRE,Transmission Completed Interrupt Enable" "0,1" bitfld.long 0x00 8. "HPMRE,High Priority Message Interrupt Enable" "0,1" bitfld.long 0x00 7. "FR1LRE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 6. "RF1FRE,Rx FIFO 1 Full Interrupt Enable" "0,1" bitfld.long 0x00 5. "RF1WRE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" newline bitfld.long 0x00 4. "RF1NRE,Rx FIFO 1 New Message Interrupt Enable" "0,1" bitfld.long 0x00 3. "RF0LRE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 2. "RF0FRE,Rx FIFO 0 Full Interrupt Enable" "0,1" bitfld.long 0x00 1. "RF0WRE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 0. "RF0NRE,Rx FIFO 0 New Message Interrupt Enable" "0,1" group.long ad:0xC0092004++0x03 line.long 0x00 "RIE1,Routing Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARARE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDRE,Protocol Error in Data Phase Enable" "0,1" bitfld.long 0x00 27. "PEARE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x00 26. "WDIRE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BORE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x00 24. "EWRE,Warning Status Interrupt Enable" "0,1" bitfld.long 0x00 23. "EPRE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x00 22. "ELORE,Error Logging Overflow Interrupt Enable" "0,1" bitfld.long 0x00 21. "BEURE,Bit Error Uncorrected Interrupt Enable" "0,1" bitfld.long 0x00 20. "BECRE,Bit Error Corrected Interrupt Enable" "0,1" newline bitfld.long 0x00 19. "DRXRE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x00 18. "TOORE,Timeout Occurred Interrupt Enable" "0,1" bitfld.long 0x00 17. "MRAFRE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x00 16. "TSWRE,Timestamp Wraparound Interrupt Enable" "0,1" bitfld.long 0x00 15. "TEFLRE,Tx Event FIFO Event Lost Interrupt Enable" "0,1" newline bitfld.long 0x00 14. "TEFFRE,Tx Event FIFO Full Interrupt Enable" "0,1" bitfld.long 0x00 13. "TEFWRE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 12. "TEFNRE,Tx Event FIDO New Entry Interrupt Enable" "0,1" bitfld.long 0x00 11. "TFERE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x00 10. "FCFRE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 9. "TCRE,Transmission Completed Interrupt Enable" "0,1" bitfld.long 0x00 8. "HPMRE,High Priority Message Interrupt Enable" "0,1" bitfld.long 0x00 7. "FR1LRE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 6. "RF1FRE,Rx FIFO 1 Full Interrupt Enable" "0,1" bitfld.long 0x00 5. "RF1WRE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" newline bitfld.long 0x00 4. "RF1NRE,Rx FIFO 1 New Message Interrupt Enable" "0,1" bitfld.long 0x00 3. "RF0LRE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 2. "RF0FRE,Rx FIFO 0 Full Interrupt Enable" "0,1" bitfld.long 0x00 1. "RF0WRE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 0. "RF0NRE,Rx FIFO 0 New Message Interrupt Enable" "0,1" group.long ad:0xC0093804++0x03 line.long 0x00 "RIE2,Routing Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARARE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDRE,Protocol Error in Data Phase Enable" "0,1" bitfld.long 0x00 27. "PEARE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x00 26. "WDIRE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BORE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x00 24. "EWRE,Warning Status Interrupt Enable" "0,1" bitfld.long 0x00 23. "EPRE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x00 22. "ELORE,Error Logging Overflow Interrupt Enable" "0,1" bitfld.long 0x00 21. "BEURE,Bit Error Uncorrected Interrupt Enable" "0,1" bitfld.long 0x00 20. "BECRE,Bit Error Corrected Interrupt Enable" "0,1" newline bitfld.long 0x00 19. "DRXRE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x00 18. "TOORE,Timeout Occurred Interrupt Enable" "0,1" bitfld.long 0x00 17. "MRAFRE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x00 16. "TSWRE,Timestamp Wraparound Interrupt Enable" "0,1" bitfld.long 0x00 15. "TEFLRE,Tx Event FIFO Event Lost Interrupt Enable" "0,1" newline bitfld.long 0x00 14. "TEFFRE,Tx Event FIFO Full Interrupt Enable" "0,1" bitfld.long 0x00 13. "TEFWRE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 12. "TEFNRE,Tx Event FIDO New Entry Interrupt Enable" "0,1" bitfld.long 0x00 11. "TFERE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x00 10. "FCFRE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 9. "TCRE,Transmission Completed Interrupt Enable" "0,1" bitfld.long 0x00 8. "HPMRE,High Priority Message Interrupt Enable" "0,1" bitfld.long 0x00 7. "FR1LRE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 6. "RF1FRE,Rx FIFO 1 Full Interrupt Enable" "0,1" bitfld.long 0x00 5. "RF1WRE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" newline bitfld.long 0x00 4. "RF1NRE,Rx FIFO 1 New Message Interrupt Enable" "0,1" bitfld.long 0x00 3. "RF0LRE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 2. "RF0FRE,Rx FIFO 0 Full Interrupt Enable" "0,1" bitfld.long 0x00 1. "RF0WRE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 0. "RF0NRE,Rx FIFO 0 New Message Interrupt Enable" "0,1" group.long ad:0xC0090808++0x03 line.long 0x00 "RTTIE,Routing TT Interrupt Enable Register" bitfld.long 0x00 18. "CERRE,Configuration Error Interrupt Routing Enable" "0,1" bitfld.long 0x00 17. "AWRE,Application Watchdog Interrupt Routing Enable" "0,1" bitfld.long 0x00 16. "WTRE,Watch Trigger Interrupt Routing Enable" "0,1" bitfld.long 0x00 15. "IWTRE,Initialization Watch Trigger Interrupt Routing Enable" "0,1" bitfld.long 0x00 14. "ELCRE,Error Level Change Interrupt Routing Enable" "0,1" newline bitfld.long 0x00 13. "SE2RE,Scheduling Error 2 Interrupt Routing Enable" "0,1" bitfld.long 0x00 12. "SE1RE,Scheduling Error 1 Interrupt Routing Enable" "0,1" bitfld.long 0x00 11. "TXORE,Tx Count Overflow Interrupt Routing Enable" "0,1" bitfld.long 0x00 10. "TXURE,Tx Count Underflow Interrupt Routing Enable" "0,1" bitfld.long 0x00 9. "GTERE,Global Time Error Interrupt Routing Enable" "0,1" newline bitfld.long 0x00 8. "GTDRE,Global Time Discontinuity Interrupt Routing Enable" "0,1" bitfld.long 0x00 7. "GTWRE,Global Time Wrap Interrupt Routing Enable" "0,1" bitfld.long 0x00 6. "SWERE,Stop Watch Event interrupt routing enable" "0,1" bitfld.long 0x00 5. "TTMIRE,Trigger Time Mark Event Internal Interrupt Routing Enable" "0,1" bitfld.long 0x00 4. "RTMIRE,Register Time Mark Interrupt Routing Enable" "0,1" newline bitfld.long 0x00 3. "SOGRE,Start of Gap Interrupt Routing Enable" "0,1" bitfld.long 0x00 2. "CSMRE,Change of Synchronization Mode Interrupt Routing Enable" "0,1" bitfld.long 0x00 1. "SMCRE,Start of Matrix Cycle Interrupt Routing Enable" "0,1" bitfld.long 0x00 0. "SBCRE,Start of Basic Cycle Interrupt Routing Enable" "0,1" group.long ad:0xC0090810++0x03 line.long 0x00 "ISRG0,Interrupt Signal Routing Group Register i (i=0~2)" group.long ad:0xC0092010++0x03 line.long 0x00 "ISRG1,Interrupt Signal Routing Group Register i (i=0~2)" group.long ad:0xC0093810++0x03 line.long 0x00 "ISRG2,Interrupt Signal Routing Group Register i (i=0~2)" group.long ad:0xC0090814++0x03 line.long 0x00 "ISRGE0,Interrupt Signal Routing Group Enable Register i (i=0~2)" group.long ad:0xC0092014++0x03 line.long 0x00 "ISRGE1,Interrupt Signal Routing Group Enable Register i (i=0~2)" group.long ad:0xC0093814++0x03 line.long 0x00 "ISRGE2,Interrupt Signal Routing Group Enable Register i (i=0~2)" group.long ad:0xC0090818++0x03 line.long 0x00 "GRINT10,Interrupt Routing for Group1 Register i (i=0~2)" bitfld.long 0x00 28.--31. "LOI,Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "BOFF,Bus Off Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SAFE,Security Count Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "MOER,Module Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "ALRT,Alarm Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "WATI,Watermark line Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "HPE,High Priority Event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TEFIFO,Transfer Event FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC0092018++0x03 line.long 0x00 "GRINT11,Interrupt Routing for Group1 Register i (i=0~2)" bitfld.long 0x00 28.--31. "LOI,Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "BOFF,Bus Off Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SAFE,Security Count Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "MOER,Module Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "ALRT,Alarm Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "WATI,Watermark line Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "HPE,High Priority Event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TEFIFO,Transfer Event FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC0093818++0x03 line.long 0x00 "GRINT12,Interrupt Routing for Group1 Register i (i=0~2)" bitfld.long 0x00 28.--31. "LOI,Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "BOFF,Bus Off Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SAFE,Security Count Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "MOER,Module Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "ALRT,Alarm Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "WATI,Watermark line Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "HPE,High Priority Event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TEFIFO,Transfer Event FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC009081C++0x03 line.long 0x00 "GRINT20,Interrupt Routing for Group2 Register i (i=0~2)" bitfld.long 0x00 28.--31. "TRACO,Transmission Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "TRAQ,Transmission Queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "RETI,Receive Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "RxF0N,Receive FIFO 0 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "RxF1N,Receive FIFO1 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "RxF0F,Receive FIFO 0 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "RxF1F,Receive FIFO1 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "REINT,Message Stored in Buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC009201C++0x03 line.long 0x00 "GRINT21,Interrupt Routing for Group2 Register i (i=0~2)" bitfld.long 0x00 28.--31. "TRACO,Transmission Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "TRAQ,Transmission Queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "RETI,Receive Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "RxF0N,Receive FIFO 0 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "RxF1N,Receive FIFO1 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "RxF0F,Receive FIFO 0 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "RxF1F,Receive FIFO1 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "REINT,Message Stored in Buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC009381C++0x03 line.long 0x00 "GRINT22,Interrupt Routing for Group2 Register i (i=0~2)" bitfld.long 0x00 28.--31. "TRACO,Transmission Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "TRAQ,Transmission Queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "RETI,Receive Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "RxF0N,Receive FIFO 0 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "RxF1N,Receive FIFO1 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "RxF0F,Receive FIFO 0 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "RxF1F,Receive FIFO1 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "REINT,Message Stored in Buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC0090820++0x03 line.long 0x00 "TTCR,Time Trigger Control Register" bitfld.long 0x00 8.--10. "TTCTSS,TTCAN Time Capture Trigger" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "ETSSEL,External Event Triggers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC0090844++0x03 line.long 0x00 "DREN0,DMU Request Enable Register i (i=0~2)" bitfld.long 0x00 3. "TXERE,TX Event FIFO Enable" "0,1" bitfld.long 0x00 2. "RX1RE,Rx FIFO 1 Enable" "0,1" bitfld.long 0x00 1. "RX0RE,Rx FIFO 0 Enable" "0,1" bitfld.long 0x00 0. "TXRE,Tx FIFO/Queue Enable" "0,1" group.long ad:0xC0092044++0x03 line.long 0x00 "DREN1,DMU Request Enable Register i (i=0~2)" bitfld.long 0x00 3. "TXERE,TX Event FIFO Enable" "0,1" bitfld.long 0x00 2. "RX1RE,Rx FIFO 1 Enable" "0,1" bitfld.long 0x00 1. "RX0RE,Rx FIFO 0 Enable" "0,1" bitfld.long 0x00 0. "TXRE,Tx FIFO/Queue Enable" "0,1" group.long ad:0xC0093844++0x03 line.long 0x00 "DREN2,DMU Request Enable Register i (i=0~2)" bitfld.long 0x00 3. "TXERE,TX Event FIFO Enable" "0,1" bitfld.long 0x00 2. "RX1RE,Rx FIFO 1 Enable" "0,1" bitfld.long 0x00 1. "RX0RE,Rx FIFO 0 Enable" "0,1" bitfld.long 0x00 0. "TXRE,Tx FIFO/Queue Enable" "0,1" group.long ad:0xC0090848++0x03 line.long 0x00 "DGC10,DMU Gate counter 1 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "RX0RCNT,Rx FIFO 0 Request Count" hexmask.long.word 0x00 0.--15. 1. "TXRCNT,Tx FIFO/Queue Request Count" group.long ad:0xC0092048++0x03 line.long 0x00 "DGC11,DMU Gate counter 1 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "RX0RCNT,Rx FIFO 0 Request Count" hexmask.long.word 0x00 0.--15. 1. "TXRCNT,Tx FIFO/Queue Request Count" group.long ad:0xC0093848++0x03 line.long 0x00 "DGC12,DMU Gate counter 1 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "RX0RCNT,Rx FIFO 0 Request Count" hexmask.long.word 0x00 0.--15. 1. "TXRCNT,Tx FIFO/Queue Request Count" group.long ad:0xC009084C++0x03 line.long 0x00 "DGC20,DMU Gate counter 2 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TXERCNT,TX Event FIFO Request Count" hexmask.long.word 0x00 0.--15. 1. "RX1RCNT,Rx FIFO 1 Request Count" group.long ad:0xC009204C++0x03 line.long 0x00 "DGC21,DMU Gate counter 2 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TXERCNT,TX Event FIFO Request Count" hexmask.long.word 0x00 0.--15. 1. "RX1RCNT,Rx FIFO 1 Request Count" group.long ad:0xC009384C++0x03 line.long 0x00 "DGC22,DMU Gate counter 2 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TXERCNT,TX Event FIFO Request Count" hexmask.long.word 0x00 0.--15. 1. "RX1RCNT,Rx FIFO 1 Request Count" group.long ad:0xC0090860++0x03 line.long 0x00 "EXTMSPCFG0,External Time Stamp Configuration Register i (i=0~2)" group.long ad:0xC0092060++0x03 line.long 0x00 "EXTMSPCFG1,External Time Stamp Configuration Register i (i=0~2)" group.long ad:0xC0093860++0x03 line.long 0x00 "EXTMSPCFG2,External Time Stamp Configuration Register i (i=0~2)" group.long ad:0xC0090868++0x0B line.long 0x00 "LOCTMCFG,Local Timer Configuration Register" bitfld.long 0x00 0. "LOCTMEN,Local timer Trigger Enable" "0,1" line.long 0x04 "LOCTMCNT0,Local Timer Count0 Register" line.long 0x08 "LOCTMCNT1,Local Timer Count1 Register" group.long ad:0xC0090B1C++0x03 line.long 0x00 "DQTMOT0,DMA Request Timeout Register i (i=0~2)" group.long ad:0xC009231C++0x03 line.long 0x00 "DQTMOT1,DMA Request Timeout Register i (i=0~2)" group.long ad:0xC0093B1C++0x03 line.long 0x00 "DQTMOT2,DMA Request Timeout Register i (i=0~2)" wgroup.long ad:0xC0090B20++0x03 line.long 0x00 "DTMOC0,DMA Timeout Clear Register i (i=0~2)" bitfld.long 0x00 0.--1. "DTMOC,DMA Request Timeout Configure" "0,1,2,3" wgroup.long ad:0xC0092320++0x03 line.long 0x00 "DTMOC1,DMA Timeout Clear Register i (i=0~2)" bitfld.long 0x00 0.--1. "DTMOC,DMA Request Timeout Configure" "0,1,2,3" wgroup.long ad:0xC0093B20++0x03 line.long 0x00 "DTMOC2,DMA Timeout Clear Register i (i=0~2)" bitfld.long 0x00 0.--1. "DTMOC,DMA Request Timeout Configure" "0,1,2,3" group.long ad:0xC0090B24++0x03 line.long 0x00 "DTMOE0,DMA Timeout Enable Register i (i=0~2)" group.long ad:0xC0092324++0x03 line.long 0x00 "DTMOE1,DMA Timeout Enable Register i (i=0~2)" group.long ad:0xC0093B24++0x03 line.long 0x00 "DTMOE2,DMA Timeout Enable Register i (i=0~2)" rgroup.long ad:0xC0094800++0x03 line.long 0x00 "ID,Identification Register" hexmask.long.byte 0x00 24.--31. 1. "YEAR,Year" hexmask.long.byte 0x00 16.--23. 1. "MON,Month" hexmask.long.byte 0x00 8.--15. 1. "DAY,Day" hexmask.long.byte 0x00 0.--7. 1. "MOD,Module" group.long ad:0xC0094864++0x03 line.long 0x00 "ABEE,AHB Bus Error Enable Register" bitfld.long 0x00 0. "ABEE,AHB Bus Error Enable" "0,1" group.long ad:0xC0094B00++0x07 line.long 0x00 "EEIG,ECC Check Error Injection Register" bitfld.long 0x00 16.--17. "EN,Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "ERRINJ,Error Inject" "0,1,2,3" line.long 0x04 "RIEI,Interrupt Error Injection Register" bitfld.long 0x04 16.--17. "EN,Enable" "0,1,2,3" hexmask.long.word 0x04 0.--15. 1. "INTERR,Interrupt Error" rgroup.long ad:0xC0094B08++0x0B line.long 0x00 "EEAR0,ECC Single Bit Error Address Record Register i(i=0-4)" line.long 0x04 "EEAR1,ECC Single Bit Error Address Record Register i(i=0-4)" line.long 0x08 "EEAR2,ECC Single Bit Error Address Record Register i(i=0-4)" wgroup.long ad:0xC0094B28++0x03 line.long 0x00 "EAC,ECC Error Alarm Clear Register" bitfld.long 0x00 16.--17. "DBEAC,Double Bit ECC Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SBEAC,Single Bit ECC Alarm Clear" "0,1,2,3" group.long ad:0xC0094B2C++0x03 line.long 0x00 "EAEN,ECC Error Alarm Enable Register" bitfld.long 0x00 0.--1. "EAEN,ECC Alarm Enable" "0,1,2,3" wgroup.long ad:0xC0094B30++0x0B line.long 0x00 "RAC,Multi-Bit Redundancy Error Alarm Clear Register" bitfld.long 0x00 0.--1. "RAC,Redundant Alarm Clear" "0,1,2,3" line.long 0x04 "PAC,SE Protection Illegal Access Alarm Clear" bitfld.long 0x04 0.--1. "PAC,Protection Alarm Clear" "0,1,2,3" line.long 0x08 "OAC,Single-Bit Error Address Overflow Alarm Clear Register" bitfld.long 0x08 0.--1. "OAC,Overflow alarm clear" "0,1,2,3" rgroup.long ad:0xC0094B3C++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 7. "SEALM,SE Alarm" "0,1" bitfld.long 0x00 6. "OVFLOW,Overflow" "0,1" bitfld.long 0x00 5. "REDU,Redundancy" "0,1" bitfld.long 0x00 2.--4. "DMATMO,DMA TimeOut" "0,1,2,3,4,5,6,7" bitfld.long 0x00 1. "DBER,Double Bit Error" "0,1" newline bitfld.long 0x00 0. "SBER,Single Bit Error" "0,1" group.long ad:0xC0094B40++0x03 line.long 0x00 "ECCEN,ECC Enable Register" bitfld.long 0x00 0.--1. "EN,ECC Enable" "0,1,2,3" rgroup.long ad:0xC0094B44++0x03 line.long 0x00 "EDBE,Multi-Bit Error Address Record Register" group.long ad:0xC0094B48++0x0B line.long 0x00 "ESBEAV,Single-Bit Error Address Valid Register" bitfld.long 0x00 0.--4. "ESBEAV,ECC Single Bit Error Address Valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "EDBEAV,Double-Bit Error Address Valid Register" bitfld.long 0x04 0. "EDBEAV,ECC Double Bit Error Address Valid" "0,1" line.long 0x08 "ALMEN,Alarm Enable Register" bitfld.long 0x08 1. "ALMEN1,Alarm Enable 1" "0,1" bitfld.long 0x08 0. "ALMEN0,Alarm Enable 0" "0,1" tree.end tree "CAN1" rgroup.long ad:0xD0000000++0x03 line.long 0x00 "CREL0,Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Time Stamp Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Time Stamp Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Time Stamp Day" rgroup.long ad:0xD0001800++0x03 line.long 0x00 "CREL1,Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Time Stamp Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Time Stamp Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Time Stamp Day" rgroup.long ad:0xD0003000++0x03 line.long 0x00 "CREL2,Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step of Core Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Time Stamp Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Time Stamp Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Time Stamp Day" rgroup.long ad:0xD0000004++0x03 line.long 0x00 "ENDN0,Endian Register i (i=0~2)" rgroup.long ad:0xD0001804++0x03 line.long 0x00 "ENDN1,Endian Register i (i=0~2)" rgroup.long ad:0xD0003004++0x03 line.long 0x00 "ENDN2,Endian Register i (i=0~2)" group.long ad:0xD0000008++0x03 line.long 0x00 "CUST0,Customer Register i (i=0~2)" group.long ad:0xD0001808++0x03 line.long 0x00 "CUST1,Customer Register i (i=0~2)" group.long ad:0xD0003008++0x03 line.long 0x00 "CUST2,Customer Register i (i=0~2)" group.long ad:0xD000000C++0x03 line.long 0x00 "DBTP0,Data Bit Timing & Prescaler Register i (i=0~2)" bitfld.long 0x00 23. "TDC,Transmitter Delay Compensation" "0,1" bitfld.long 0x00 16.--20. "DBRP,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "DTSEG1,Data time segment before sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. "DTSEG2,Data time segment after sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "DSJW,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xD000180C++0x03 line.long 0x00 "DBTP1,Data Bit Timing & Prescaler Register i (i=0~2)" bitfld.long 0x00 23. "TDC,Transmitter Delay Compensation" "0,1" bitfld.long 0x00 16.--20. "DBRP,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "DTSEG1,Data time segment before sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. "DTSEG2,Data time segment after sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "DSJW,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xD000300C++0x03 line.long 0x00 "DBTP2,Data Bit Timing & Prescaler Register i (i=0~2)" bitfld.long 0x00 23. "TDC,Transmitter Delay Compensation" "0,1" bitfld.long 0x00 16.--20. "DBRP,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "DTSEG1,Data time segment before sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--7. "DTSEG2,Data time segment after sample point" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "DSJW,Data (Re)Synchronization Jump Width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xD0000010++0x03 line.long 0x00 "TEST0,Test Register i (i=0~2)" rbitfld.long 0x00 21. "SVAL,Started Valid" "0,1" rbitfld.long 0x00 16.--20. "TXBNS,Tx Buffer Number Started" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 13. "PVAL,Prepared Valid" "0,1" rbitfld.long 0x00 8.--12. "TXBNP,Tx Buffer Number Prepared" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 7. "RX,Receive Pin" "0,1" newline bitfld.long 0x00 5.--6. "TX,Control of Transmit Pin" "0,1,2,3" bitfld.long 0x00 4. "LBCK,Loop Back Mode" "0,1" group.long ad:0xD0001810++0x03 line.long 0x00 "TEST1,Test Register i (i=0~2)" rbitfld.long 0x00 21. "SVAL,Started Valid" "0,1" rbitfld.long 0x00 16.--20. "TXBNS,Tx Buffer Number Started" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 13. "PVAL,Prepared Valid" "0,1" rbitfld.long 0x00 8.--12. "TXBNP,Tx Buffer Number Prepared" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 7. "RX,Receive Pin" "0,1" newline bitfld.long 0x00 5.--6. "TX,Control of Transmit Pin" "0,1,2,3" bitfld.long 0x00 4. "LBCK,Loop Back Mode" "0,1" group.long ad:0xD0003010++0x03 line.long 0x00 "TEST2,Test Register i (i=0~2)" rbitfld.long 0x00 21. "SVAL,Started Valid" "0,1" rbitfld.long 0x00 16.--20. "TXBNS,Tx Buffer Number Started" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 13. "PVAL,Prepared Valid" "0,1" rbitfld.long 0x00 8.--12. "TXBNP,Tx Buffer Number Prepared" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 7. "RX,Receive Pin" "0,1" newline bitfld.long 0x00 5.--6. "TX,Control of Transmit Pin" "0,1,2,3" bitfld.long 0x00 4. "LBCK,Loop Back Mode" "0,1" rgroup.long ad:0xD0000014++0x03 line.long 0x00 "RWD0,RAM Watchdog Register i (i=0~2)" hexmask.long.byte 0x00 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0x00 0.--7. 1. "WDC,Watchdog Configuration" rgroup.long ad:0xD0001814++0x03 line.long 0x00 "RWD1,RAM Watchdog Register i (i=0~2)" hexmask.long.byte 0x00 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0x00 0.--7. 1. "WDC,Watchdog Configuration" rgroup.long ad:0xD0003014++0x03 line.long 0x00 "RWD2,RAM Watchdog Register i (i=0~2)" hexmask.long.byte 0x00 8.--15. 1. "WDV,Watchdog Value" hexmask.long.byte 0x00 0.--7. 1. "WDC,Watchdog Configuration" group.long ad:0xD0000018++0x03 line.long 0x00 "CCCR0,CC Control Register i (i=0~2)" bitfld.long 0x00 15. "NonISOOperation,Non ISO Operation" "0,1" bitfld.long 0x00 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x00 13. "EFBI,Edge Filtering during Bus Integration" "0,1" bitfld.long 0x00 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x00 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x00 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x00 7. "TEST,Test Mode Enable" "0,1" bitfld.long 0x00 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x00 5. "MON,Bus Monitoring Mode" "0,1" bitfld.long 0x00 4. "CSR,Clock Stop Request" "0,1" newline bitfld.long 0x00 3. "CSA,Clock Stop Acknowledge" "0,1" bitfld.long 0x00 2. "ASM,Restricted Operation Mode" "0,1" bitfld.long 0x00 1. "CCE,Configuration Change Enable" "0,1" bitfld.long 0x00 0. "INIT,Initialization" "0,1" group.long ad:0xD0001818++0x03 line.long 0x00 "CCCR1,CC Control Register i (i=0~2)" bitfld.long 0x00 15. "NonISOOperation,Non ISO Operation" "0,1" bitfld.long 0x00 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x00 13. "EFBI,Edge Filtering during Bus Integration" "0,1" bitfld.long 0x00 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x00 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x00 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x00 7. "TEST,Test Mode Enable" "0,1" bitfld.long 0x00 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x00 5. "MON,Bus Monitoring Mode" "0,1" bitfld.long 0x00 4. "CSR,Clock Stop Request" "0,1" newline bitfld.long 0x00 3. "CSA,Clock Stop Acknowledge" "0,1" bitfld.long 0x00 2. "ASM,Restricted Operation Mode" "0,1" bitfld.long 0x00 1. "CCE,Configuration Change Enable" "0,1" bitfld.long 0x00 0. "INIT,Initialization" "0,1" group.long ad:0xD0003018++0x03 line.long 0x00 "CCCR2,CC Control Register i (i=0~2)" bitfld.long 0x00 15. "NonISOOperation,Non ISO Operation" "0,1" bitfld.long 0x00 14. "TXP,Transmit Pause" "0,1" bitfld.long 0x00 13. "EFBI,Edge Filtering during Bus Integration" "0,1" bitfld.long 0x00 12. "PXHD,Protocol Exception Handling Disable" "0,1" bitfld.long 0x00 9. "BRSE,Bit Rate Switch Enable" "0,1" newline bitfld.long 0x00 8. "FDOE,FD Operation Enable" "0,1" bitfld.long 0x00 7. "TEST,Test Mode Enable" "0,1" bitfld.long 0x00 6. "DAR,Disable Automatic Retransmission" "0,1" bitfld.long 0x00 5. "MON,Bus Monitoring Mode" "0,1" bitfld.long 0x00 4. "CSR,Clock Stop Request" "0,1" newline bitfld.long 0x00 3. "CSA,Clock Stop Acknowledge" "0,1" bitfld.long 0x00 2. "ASM,Restricted Operation Mode" "0,1" bitfld.long 0x00 1. "CCE,Configuration Change Enable" "0,1" bitfld.long 0x00 0. "INIT,Initialization" "0,1" group.long ad:0xD000001C++0x03 line.long 0x00 "NBTP0,Nominal Bit Timing & Prescaler Register i (i=0~2)" hexmask.long.byte 0x00 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x00 16.--24. 1. "NBRP,Nominal Bit Rate Prescaler" hexmask.long.byte 0x00 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x00 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" group.long ad:0xD000181C++0x03 line.long 0x00 "NBTP1,Nominal Bit Timing & Prescaler Register i (i=0~2)" hexmask.long.byte 0x00 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x00 16.--24. 1. "NBRP,Nominal Bit Rate Prescaler" hexmask.long.byte 0x00 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x00 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" group.long ad:0xD000301C++0x03 line.long 0x00 "NBTP2,Nominal Bit Timing & Prescaler Register i (i=0~2)" hexmask.long.byte 0x00 25.--31. 1. "NSJW,Nominal (Re)Synchronization Jump Width" hexmask.long.word 0x00 16.--24. 1. "NBRP,Nominal Bit Rate Prescaler" hexmask.long.byte 0x00 8.--15. 1. "NTSEG1,Nominal Time segment before sample point" hexmask.long.byte 0x00 0.--6. 1. "NTSEG2,Nominal Time segment after sample point" rgroup.long ad:0xD0000020++0x03 line.long 0x00 "TSCC0,Timestamp Counter Configuration Register i (i=0~2)" bitfld.long 0x00 16.--19. "TCP,Timestamp Counter Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. "TSS,Timestamp Select" "0,1,2,3" rgroup.long ad:0xD0001820++0x03 line.long 0x00 "TSCC1,Timestamp Counter Configuration Register i (i=0~2)" bitfld.long 0x00 16.--19. "TCP,Timestamp Counter Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. "TSS,Timestamp Select" "0,1,2,3" rgroup.long ad:0xD0003020++0x03 line.long 0x00 "TSCC2,Timestamp Counter Configuration Register i (i=0~2)" bitfld.long 0x00 16.--19. "TCP,Timestamp Counter Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. "TSS,Timestamp Select" "0,1,2,3" rgroup.long ad:0xD0000024++0x03 line.long 0x00 "TSCV0,Timestamp Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TSC,Timestamp Counter" rgroup.long ad:0xD0001824++0x03 line.long 0x00 "TSCV1,Timestamp Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TSC,Timestamp Counter" rgroup.long ad:0xD0003024++0x03 line.long 0x00 "TSCV2,Timestamp Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TSC,Timestamp Counter" group.long ad:0xD0000028++0x03 line.long 0x00 "TOCC0,Timeout Counter Configuration Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x00 1.--2. "TOS,Timeout Select" "0,1,2,3" bitfld.long 0x00 0. "ETOC,Enable Timeout Counter" "0,1" group.long ad:0xD0001828++0x03 line.long 0x00 "TOCC1,Timeout Counter Configuration Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x00 1.--2. "TOS,Timeout Select" "0,1,2,3" bitfld.long 0x00 0. "ETOC,Enable Timeout Counter" "0,1" group.long ad:0xD0003028++0x03 line.long 0x00 "TOCC2,Timeout Counter Configuration Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TOP,Timeout Period" bitfld.long 0x00 1.--2. "TOS,Timeout Select" "0,1,2,3" bitfld.long 0x00 0. "ETOC,Enable Timeout Counter" "0,1" group.long ad:0xD000002C++0x03 line.long 0x00 "TOCV0,Timeout Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TOC,Timeout Counter" group.long ad:0xD000182C++0x03 line.long 0x00 "TOCV1,Timeout Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TOC,Timeout Counter" group.long ad:0xD000302C++0x03 line.long 0x00 "TOCV2,Timeout Counter Value Register i (i=0~2)" hexmask.long.word 0x00 0.--15. 1. "TOC,Timeout Counter" group.long ad:0xD0000040++0x03 line.long 0x00 "ECR0,Error Counter Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x00 15. "RP,Receive Error Passive" "0,1" hexmask.long.byte 0x00 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x00 0.--7. 1. "TEC,Transmit Error Counter" group.long ad:0xD0001840++0x03 line.long 0x00 "ECR1,Error Counter Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x00 15. "RP,Receive Error Passive" "0,1" hexmask.long.byte 0x00 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x00 0.--7. 1. "TEC,Transmit Error Counter" group.long ad:0xD0003040++0x03 line.long 0x00 "ECR2,Error Counter Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "CEL,CAN Error Logging" bitfld.long 0x00 15. "RP,Receive Error Passive" "0,1" hexmask.long.byte 0x00 8.--14. 1. "REC,Receive Error Counter" hexmask.long.byte 0x00 0.--7. 1. "TEC,Transmit Error Counter" group.long ad:0xD0000044++0x03 line.long 0x00 "PSR0,Protocol Status Register i (i=0~2)" hexmask.long.byte 0x00 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x00 14. "PXE,Protocol Exception Event" "0,1" bitfld.long 0x00 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x00 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" bitfld.long 0x00 11. "RESI,ESI flag of last received CAN FD Message" "0,1" newline bitfld.long 0x00 8.--10. "DLEC,Data Phase Last Error Code" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "BO,Bus Off Status" "0,1" bitfld.long 0x00 6. "EW,Warning Status" "0,1" bitfld.long 0x00 5. "EP,Error Passive" "0,1" rbitfld.long 0x00 3.--4. "ACT,Activity" "0,1,2,3" newline bitfld.long 0x00 0.--2. "LEC,Last Error Code" "0,1,2,3,4,5,6,7" group.long ad:0xD0001844++0x03 line.long 0x00 "PSR1,Protocol Status Register i (i=0~2)" hexmask.long.byte 0x00 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x00 14. "PXE,Protocol Exception Event" "0,1" bitfld.long 0x00 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x00 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" bitfld.long 0x00 11. "RESI,ESI flag of last received CAN FD Message" "0,1" newline bitfld.long 0x00 8.--10. "DLEC,Data Phase Last Error Code" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "BO,Bus Off Status" "0,1" bitfld.long 0x00 6. "EW,Warning Status" "0,1" bitfld.long 0x00 5. "EP,Error Passive" "0,1" rbitfld.long 0x00 3.--4. "ACT,Activity" "0,1,2,3" newline bitfld.long 0x00 0.--2. "LEC,Last Error Code" "0,1,2,3,4,5,6,7" group.long ad:0xD0003044++0x03 line.long 0x00 "PSR2,Protocol Status Register i (i=0~2)" hexmask.long.byte 0x00 16.--22. 1. "TDCV,Transmitter Delay Compensation Value" bitfld.long 0x00 14. "PXE,Protocol Exception Event" "0,1" bitfld.long 0x00 13. "RFDF,Received a CAN FD Message" "0,1" bitfld.long 0x00 12. "RBRS,BRS flag of last received CAN FD Message" "0,1" bitfld.long 0x00 11. "RESI,ESI flag of last received CAN FD Message" "0,1" newline bitfld.long 0x00 8.--10. "DLEC,Data Phase Last Error Code" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "BO,Bus Off Status" "0,1" bitfld.long 0x00 6. "EW,Warning Status" "0,1" bitfld.long 0x00 5. "EP,Error Passive" "0,1" rbitfld.long 0x00 3.--4. "ACT,Activity" "0,1,2,3" newline bitfld.long 0x00 0.--2. "LEC,Last Error Code" "0,1,2,3,4,5,6,7" group.long ad:0xD0000048++0x03 line.long 0x00 "TDCR0,Transmitter Delay Compensation Register i (i=0~2)" hexmask.long.byte 0x00 8.--14. 1. "TDCO,Transmitter Delay Compensation SSP Offset" hexmask.long.byte 0x00 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Window Length" group.long ad:0xD0001848++0x03 line.long 0x00 "TDCR1,Transmitter Delay Compensation Register i (i=0~2)" hexmask.long.byte 0x00 8.--14. 1. "TDCO,Transmitter Delay Compensation SSP Offset" hexmask.long.byte 0x00 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Window Length" group.long ad:0xD0003048++0x03 line.long 0x00 "TDCR2,Transmitter Delay Compensation Register i (i=0~2)" hexmask.long.byte 0x00 8.--14. 1. "TDCO,Transmitter Delay Compensation SSP Offset" hexmask.long.byte 0x00 0.--6. 1. "TDCF,Transmitter Delay Compensation Filter Window Length" group.long ad:0xD000004C++0x03 line.long 0x00 "RESERVED0,Reserved" group.long ad:0xD000184C++0x03 line.long 0x00 "RESERVED1,Reserved" group.long ad:0xD000304C++0x03 line.long 0x00 "RESERVED2,Reserved" group.long ad:0xD0000050++0x03 line.long 0x00 "IR0,Interrupt Register i (i=0~2)" bitfld.long 0x00 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x00 28. "PED,Protocol Error in Data Phase (Data Bit Time is used)" "0,1" bitfld.long 0x00 27. "PEA,Protocol Error in Arbitration Phase (Nominal Bit Time is used)" "0,1" bitfld.long 0x00 26. "WDI,Watchdog Interrupt" "0,1" bitfld.long 0x00 25. "BO,Bus Off Status" "0,1" newline bitfld.long 0x00 24. "EW,Warning Status" "0,1" bitfld.long 0x00 23. "EP,Error Passive" "0,1" bitfld.long 0x00 22. "ELO,Error Logging Overflow" "0,1" bitfld.long 0x00 21. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 20. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x00 18. "TOO,Timeout Occurred" "0,1" bitfld.long 0x00 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x00 16. "TSW,Timestamp Wraparound" "0,1" bitfld.long 0x00 15. "TEFL,Tx Event FIFO Element Lost" "0,1" newline bitfld.long 0x00 14. "TEFF,Tx Event FIFO Full" "0,1" bitfld.long 0x00 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x00 12. "TEFN,Tx Event FIFO New Entry" "0,1" bitfld.long 0x00 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x00 10. "FCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x00 9. "TC,Transmission Completed" "0,1" bitfld.long 0x00 8. "HPM,High Priority Message" "0,1" bitfld.long 0x00 7. "FR1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 6. "RF1F,Rx FIFO 1 Full" "0,1" bitfld.long 0x00 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" newline bitfld.long 0x00 4. "RF1N,Rx FIFO 1 New Message" "0,1" bitfld.long 0x00 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 2. "RF0F,Rx FIFO 0 Full" "0,1" bitfld.long 0x00 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x00 0. "RF0N,Rx FIFO 0 New Message" "0,1" group.long ad:0xD0001850++0x03 line.long 0x00 "IR1,Interrupt Register i (i=0~2)" bitfld.long 0x00 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x00 28. "PED,Protocol Error in Data Phase (Data Bit Time is used)" "0,1" bitfld.long 0x00 27. "PEA,Protocol Error in Arbitration Phase (Nominal Bit Time is used)" "0,1" bitfld.long 0x00 26. "WDI,Watchdog Interrupt" "0,1" bitfld.long 0x00 25. "BO,Bus Off Status" "0,1" newline bitfld.long 0x00 24. "EW,Warning Status" "0,1" bitfld.long 0x00 23. "EP,Error Passive" "0,1" bitfld.long 0x00 22. "ELO,Error Logging Overflow" "0,1" bitfld.long 0x00 21. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 20. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x00 18. "TOO,Timeout Occurred" "0,1" bitfld.long 0x00 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x00 16. "TSW,Timestamp Wraparound" "0,1" bitfld.long 0x00 15. "TEFL,Tx Event FIFO Element Lost" "0,1" newline bitfld.long 0x00 14. "TEFF,Tx Event FIFO Full" "0,1" bitfld.long 0x00 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x00 12. "TEFN,Tx Event FIFO New Entry" "0,1" bitfld.long 0x00 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x00 10. "FCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x00 9. "TC,Transmission Completed" "0,1" bitfld.long 0x00 8. "HPM,High Priority Message" "0,1" bitfld.long 0x00 7. "FR1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 6. "RF1F,Rx FIFO 1 Full" "0,1" bitfld.long 0x00 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" newline bitfld.long 0x00 4. "RF1N,Rx FIFO 1 New Message" "0,1" bitfld.long 0x00 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 2. "RF0F,Rx FIFO 0 Full" "0,1" bitfld.long 0x00 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x00 0. "RF0N,Rx FIFO 0 New Message" "0,1" group.long ad:0xD0003050++0x03 line.long 0x00 "IR2,Interrupt Register i (i=0~2)" bitfld.long 0x00 29. "ARA,Access to Reserved Address" "0,1" bitfld.long 0x00 28. "PED,Protocol Error in Data Phase (Data Bit Time is used)" "0,1" bitfld.long 0x00 27. "PEA,Protocol Error in Arbitration Phase (Nominal Bit Time is used)" "0,1" bitfld.long 0x00 26. "WDI,Watchdog Interrupt" "0,1" bitfld.long 0x00 25. "BO,Bus Off Status" "0,1" newline bitfld.long 0x00 24. "EW,Warning Status" "0,1" bitfld.long 0x00 23. "EP,Error Passive" "0,1" bitfld.long 0x00 22. "ELO,Error Logging Overflow" "0,1" bitfld.long 0x00 21. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 20. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 19. "DRX,Message stored to Dedicated Rx Buffer" "0,1" bitfld.long 0x00 18. "TOO,Timeout Occurred" "0,1" bitfld.long 0x00 17. "MRAF,Message RAM Access Failure" "0,1" bitfld.long 0x00 16. "TSW,Timestamp Wraparound" "0,1" bitfld.long 0x00 15. "TEFL,Tx Event FIFO Element Lost" "0,1" newline bitfld.long 0x00 14. "TEFF,Tx Event FIFO Full" "0,1" bitfld.long 0x00 13. "TEFW,Tx Event FIFO Watermark Reached" "0,1" bitfld.long 0x00 12. "TEFN,Tx Event FIFO New Entry" "0,1" bitfld.long 0x00 11. "TFE,Tx FIFO Empty" "0,1" bitfld.long 0x00 10. "FCF,Transmission Cancellation Finished" "0,1" newline bitfld.long 0x00 9. "TC,Transmission Completed" "0,1" bitfld.long 0x00 8. "HPM,High Priority Message" "0,1" bitfld.long 0x00 7. "FR1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 6. "RF1F,Rx FIFO 1 Full" "0,1" bitfld.long 0x00 5. "RF1W,Rx FIFO 1 Watermark Reached" "0,1" newline bitfld.long 0x00 4. "RF1N,Rx FIFO 1 New Message" "0,1" bitfld.long 0x00 3. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 2. "RF0F,Rx FIFO 0 Full" "0,1" bitfld.long 0x00 1. "RF0W,Rx FIFO 0 Watermark Reached" "0,1" bitfld.long 0x00 0. "RF0N,Rx FIFO 0 New Message" "0,1" group.long ad:0xD0000054++0x03 line.long 0x00 "IE0,Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDE,Protocol Error in Data Phase (Data Bit Time is used) Enable" "0,1" bitfld.long 0x00 27. "PEAE,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Enable" "0,1" bitfld.long 0x00 26. "WDIE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BOE,Bus Off Status Enable" "0,1" newline bitfld.long 0x00 24. "EWE,Warning Status Enable" "0,1" bitfld.long 0x00 23. "EPE,Error Passive Enable" "0,1" bitfld.long 0x00 22. "ELOE,Error Logging Overflow Enable" "0,1" bitfld.long 0x00 21. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 20. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 19. "DRXE,Message stored to Dedicated Rx Buffer Enable" "0,1" bitfld.long 0x00 18. "TOOE,Timeout Occurred Enable" "0,1" bitfld.long 0x00 17. "MRAFE,Message RAM Access Failure Enable" "0,1" bitfld.long 0x00 16. "TSWE,Timestamp Wraparound Enable" "0,1" bitfld.long 0x00 15. "TEFLE,Tx Event FIFO Element Lost Enable" "0,1" newline bitfld.long 0x00 14. "TEFFE,Tx Event FIFO Full Enable" "0,1" bitfld.long 0x00 13. "TEFWE,Tx Event FIFO Watermark Reached Enable" "0,1" bitfld.long 0x00 12. "TEFNE,Tx Event FIFO New Entry Enable" "0,1" bitfld.long 0x00 11. "TFEE,Tx FIFO Empty Enable" "0,1" bitfld.long 0x00 10. "FCFE,Transmission Cancellation Finished Enable" "0,1" newline bitfld.long 0x00 9. "TCE,Transmission Completed Enable" "0,1" bitfld.long 0x00 8. "HPME,High Priority Message Enable" "0,1" bitfld.long 0x00 7. "FR1LE,Rx FIFO 1 Message Lost Enable" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WE,Rx FIFO 1 Watermark Reached Enable" "0,1" newline bitfld.long 0x00 4. "RF1NE,Rx FIFO 1 New Message Enable" "0,1" bitfld.long 0x00 3. "RF0LE,Rx FIFO 0 Message Lost Enable" "0,1" bitfld.long 0x00 2. "RF0FE,Rx FIFO 0 Full Enable" "0,1" bitfld.long 0x00 1. "RF0WE,Rx FIFO 0 Watermark Reached Enable" "0,1" bitfld.long 0x00 0. "RF0NE,Rx FIFO 0 New Message Enable" "0,1" group.long ad:0xD0001854++0x03 line.long 0x00 "IE1,Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDE,Protocol Error in Data Phase (Data Bit Time is used) Enable" "0,1" bitfld.long 0x00 27. "PEAE,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Enable" "0,1" bitfld.long 0x00 26. "WDIE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BOE,Bus Off Status Enable" "0,1" newline bitfld.long 0x00 24. "EWE,Warning Status Enable" "0,1" bitfld.long 0x00 23. "EPE,Error Passive Enable" "0,1" bitfld.long 0x00 22. "ELOE,Error Logging Overflow Enable" "0,1" bitfld.long 0x00 21. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 20. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 19. "DRXE,Message stored to Dedicated Rx Buffer Enable" "0,1" bitfld.long 0x00 18. "TOOE,Timeout Occurred Enable" "0,1" bitfld.long 0x00 17. "MRAFE,Message RAM Access Failure Enable" "0,1" bitfld.long 0x00 16. "TSWE,Timestamp Wraparound Enable" "0,1" bitfld.long 0x00 15. "TEFLE,Tx Event FIFO Element Lost Enable" "0,1" newline bitfld.long 0x00 14. "TEFFE,Tx Event FIFO Full Enable" "0,1" bitfld.long 0x00 13. "TEFWE,Tx Event FIFO Watermark Reached Enable" "0,1" bitfld.long 0x00 12. "TEFNE,Tx Event FIFO New Entry Enable" "0,1" bitfld.long 0x00 11. "TFEE,Tx FIFO Empty Enable" "0,1" bitfld.long 0x00 10. "FCFE,Transmission Cancellation Finished Enable" "0,1" newline bitfld.long 0x00 9. "TCE,Transmission Completed Enable" "0,1" bitfld.long 0x00 8. "HPME,High Priority Message Enable" "0,1" bitfld.long 0x00 7. "FR1LE,Rx FIFO 1 Message Lost Enable" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WE,Rx FIFO 1 Watermark Reached Enable" "0,1" newline bitfld.long 0x00 4. "RF1NE,Rx FIFO 1 New Message Enable" "0,1" bitfld.long 0x00 3. "RF0LE,Rx FIFO 0 Message Lost Enable" "0,1" bitfld.long 0x00 2. "RF0FE,Rx FIFO 0 Full Enable" "0,1" bitfld.long 0x00 1. "RF0WE,Rx FIFO 0 Watermark Reached Enable" "0,1" bitfld.long 0x00 0. "RF0NE,Rx FIFO 0 New Message Enable" "0,1" group.long ad:0xD0003054++0x03 line.long 0x00 "IE2,Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARAE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDE,Protocol Error in Data Phase (Data Bit Time is used) Enable" "0,1" bitfld.long 0x00 27. "PEAE,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Enable" "0,1" bitfld.long 0x00 26. "WDIE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BOE,Bus Off Status Enable" "0,1" newline bitfld.long 0x00 24. "EWE,Warning Status Enable" "0,1" bitfld.long 0x00 23. "EPE,Error Passive Enable" "0,1" bitfld.long 0x00 22. "ELOE,Error Logging Overflow Enable" "0,1" bitfld.long 0x00 21. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 20. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 19. "DRXE,Message stored to Dedicated Rx Buffer Enable" "0,1" bitfld.long 0x00 18. "TOOE,Timeout Occurred Enable" "0,1" bitfld.long 0x00 17. "MRAFE,Message RAM Access Failure Enable" "0,1" bitfld.long 0x00 16. "TSWE,Timestamp Wraparound Enable" "0,1" bitfld.long 0x00 15. "TEFLE,Tx Event FIFO Element Lost Enable" "0,1" newline bitfld.long 0x00 14. "TEFFE,Tx Event FIFO Full Enable" "0,1" bitfld.long 0x00 13. "TEFWE,Tx Event FIFO Watermark Reached Enable" "0,1" bitfld.long 0x00 12. "TEFNE,Tx Event FIFO New Entry Enable" "0,1" bitfld.long 0x00 11. "TFEE,Tx FIFO Empty Enable" "0,1" bitfld.long 0x00 10. "FCFE,Transmission Cancellation Finished Enable" "0,1" newline bitfld.long 0x00 9. "TCE,Transmission Completed Enable" "0,1" bitfld.long 0x00 8. "HPME,High Priority Message Enable" "0,1" bitfld.long 0x00 7. "FR1LE,Rx FIFO 1 Message Lost Enable" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WE,Rx FIFO 1 Watermark Reached Enable" "0,1" newline bitfld.long 0x00 4. "RF1NE,Rx FIFO 1 New Message Enable" "0,1" bitfld.long 0x00 3. "RF0LE,Rx FIFO 0 Message Lost Enable" "0,1" bitfld.long 0x00 2. "RF0FE,Rx FIFO 0 Full Enable" "0,1" bitfld.long 0x00 1. "RF0WE,Rx FIFO 0 Watermark Reached Enable" "0,1" bitfld.long 0x00 0. "RF0NE,Rx FIFO 0 New Message Enable" "0,1" group.long ad:0xD0000058++0x03 line.long 0x00 "ILS0,Interrupt Line Select Register i (i=0~2)" bitfld.long 0x00 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x00 28. "PEDL,Protocol Error in Data Phase (Data Bit Time is used) Line" "0,1" bitfld.long 0x00 27. "PEAL,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Line" "0,1" bitfld.long 0x00 26. "WDIL,Watchdog Interrupt Line" "0,1" bitfld.long 0x00 25. "BOL,Bus Off Status Line" "0,1" newline bitfld.long 0x00 24. "EWL,Warning Status Line" "0,1" bitfld.long 0x00 23. "EPL,Error Passive Line" "0,1" bitfld.long 0x00 22. "ELOL,Error Logging Overflow Line" "0,1" bitfld.long 0x00 21. "BEUL,Bit Error Uncorrected Line" "0,1" bitfld.long 0x00 20. "BECL,Bit Error Corrected Line" "0,1" newline bitfld.long 0x00 19. "DRXL,Message stored to Dedicated Rx Buffer Line" "0,1" bitfld.long 0x00 18. "TOOL,Timeout Occurred Line" "0,1" bitfld.long 0x00 17. "MRAFL,Message RAM Access Failure Line" "0,1" bitfld.long 0x00 16. "TSWL,Timestamp Wraparound Line" "0,1" bitfld.long 0x00 15. "TEFLL,Tx Event FIFO Element Lost Line" "0,1" newline bitfld.long 0x00 14. "TEFFL,Tx Event FIFO Full Line" "0,1" bitfld.long 0x00 13. "TEFWL,Tx Event FIFO Watermark Reached Line" "0,1" bitfld.long 0x00 12. "TEFNL,Tx Event FIFO New Entry Line" "0,1" bitfld.long 0x00 11. "TFEL,Tx FIFO Empty Line" "0,1" bitfld.long 0x00 10. "FCFL,Transmission Cancellation Finished Line" "0,1" newline bitfld.long 0x00 9. "TCL,Transmission Completed Line" "0,1" bitfld.long 0x00 8. "HPML,High Priority Message Line" "0,1" bitfld.long 0x00 7. "FR1LL,Rx FIFO 1 Message Lost Line" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WL,Rx FIFO 1 Watermark Reached Line" "0,1" newline bitfld.long 0x00 4. "RF1NL,Rx FIFO 1 New Message Line" "0,1" bitfld.long 0x00 3. "RF0LL,Rx FIFO 0 Message Lost Line" "0,1" bitfld.long 0x00 2. "RF0FL,Rx FIFO 0 Full Line" "0,1" bitfld.long 0x00 1. "RF0WL,Rx FIFO 0 Watermark Reached Line" "0,1" bitfld.long 0x00 0. "RF0NL,Rx FIFO 0 New Message Line" "0,1" group.long ad:0xD0001858++0x03 line.long 0x00 "ILS1,Interrupt Line Select Register i (i=0~2)" bitfld.long 0x00 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x00 28. "PEDL,Protocol Error in Data Phase (Data Bit Time is used) Line" "0,1" bitfld.long 0x00 27. "PEAL,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Line" "0,1" bitfld.long 0x00 26. "WDIL,Watchdog Interrupt Line" "0,1" bitfld.long 0x00 25. "BOL,Bus Off Status Line" "0,1" newline bitfld.long 0x00 24. "EWL,Warning Status Line" "0,1" bitfld.long 0x00 23. "EPL,Error Passive Line" "0,1" bitfld.long 0x00 22. "ELOL,Error Logging Overflow Line" "0,1" bitfld.long 0x00 21. "BEUL,Bit Error Uncorrected Line" "0,1" bitfld.long 0x00 20. "BECL,Bit Error Corrected Line" "0,1" newline bitfld.long 0x00 19. "DRXL,Message stored to Dedicated Rx Buffer Line" "0,1" bitfld.long 0x00 18. "TOOL,Timeout Occurred Line" "0,1" bitfld.long 0x00 17. "MRAFL,Message RAM Access Failure Line" "0,1" bitfld.long 0x00 16. "TSWL,Timestamp Wraparound Line" "0,1" bitfld.long 0x00 15. "TEFLL,Tx Event FIFO Element Lost Line" "0,1" newline bitfld.long 0x00 14. "TEFFL,Tx Event FIFO Full Line" "0,1" bitfld.long 0x00 13. "TEFWL,Tx Event FIFO Watermark Reached Line" "0,1" bitfld.long 0x00 12. "TEFNL,Tx Event FIFO New Entry Line" "0,1" bitfld.long 0x00 11. "TFEL,Tx FIFO Empty Line" "0,1" bitfld.long 0x00 10. "FCFL,Transmission Cancellation Finished Line" "0,1" newline bitfld.long 0x00 9. "TCL,Transmission Completed Line" "0,1" bitfld.long 0x00 8. "HPML,High Priority Message Line" "0,1" bitfld.long 0x00 7. "FR1LL,Rx FIFO 1 Message Lost Line" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WL,Rx FIFO 1 Watermark Reached Line" "0,1" newline bitfld.long 0x00 4. "RF1NL,Rx FIFO 1 New Message Line" "0,1" bitfld.long 0x00 3. "RF0LL,Rx FIFO 0 Message Lost Line" "0,1" bitfld.long 0x00 2. "RF0FL,Rx FIFO 0 Full Line" "0,1" bitfld.long 0x00 1. "RF0WL,Rx FIFO 0 Watermark Reached Line" "0,1" bitfld.long 0x00 0. "RF0NL,Rx FIFO 0 New Message Line" "0,1" group.long ad:0xD0003058++0x03 line.long 0x00 "ILS2,Interrupt Line Select Register i (i=0~2)" bitfld.long 0x00 29. "ARAL,Access to Reserved Address Line" "0,1" bitfld.long 0x00 28. "PEDL,Protocol Error in Data Phase (Data Bit Time is used) Line" "0,1" bitfld.long 0x00 27. "PEAL,Protocol Error in Arbitration Phase (Nominal Bit Time is used) Line" "0,1" bitfld.long 0x00 26. "WDIL,Watchdog Interrupt Line" "0,1" bitfld.long 0x00 25. "BOL,Bus Off Status Line" "0,1" newline bitfld.long 0x00 24. "EWL,Warning Status Line" "0,1" bitfld.long 0x00 23. "EPL,Error Passive Line" "0,1" bitfld.long 0x00 22. "ELOL,Error Logging Overflow Line" "0,1" bitfld.long 0x00 21. "BEUL,Bit Error Uncorrected Line" "0,1" bitfld.long 0x00 20. "BECL,Bit Error Corrected Line" "0,1" newline bitfld.long 0x00 19. "DRXL,Message stored to Dedicated Rx Buffer Line" "0,1" bitfld.long 0x00 18. "TOOL,Timeout Occurred Line" "0,1" bitfld.long 0x00 17. "MRAFL,Message RAM Access Failure Line" "0,1" bitfld.long 0x00 16. "TSWL,Timestamp Wraparound Line" "0,1" bitfld.long 0x00 15. "TEFLL,Tx Event FIFO Element Lost Line" "0,1" newline bitfld.long 0x00 14. "TEFFL,Tx Event FIFO Full Line" "0,1" bitfld.long 0x00 13. "TEFWL,Tx Event FIFO Watermark Reached Line" "0,1" bitfld.long 0x00 12. "TEFNL,Tx Event FIFO New Entry Line" "0,1" bitfld.long 0x00 11. "TFEL,Tx FIFO Empty Line" "0,1" bitfld.long 0x00 10. "FCFL,Transmission Cancellation Finished Line" "0,1" newline bitfld.long 0x00 9. "TCL,Transmission Completed Line" "0,1" bitfld.long 0x00 8. "HPML,High Priority Message Line" "0,1" bitfld.long 0x00 7. "FR1LL,Rx FIFO 1 Message Lost Line" "0,1" bitfld.long 0x00 6. "RF1FE,Rx FIFO 1 Full Enable" "0,1" bitfld.long 0x00 5. "RF1WL,Rx FIFO 1 Watermark Reached Line" "0,1" newline bitfld.long 0x00 4. "RF1NL,Rx FIFO 1 New Message Line" "0,1" bitfld.long 0x00 3. "RF0LL,Rx FIFO 0 Message Lost Line" "0,1" bitfld.long 0x00 2. "RF0FL,Rx FIFO 0 Full Line" "0,1" bitfld.long 0x00 1. "RF0WL,Rx FIFO 0 Watermark Reached Line" "0,1" bitfld.long 0x00 0. "RF0NL,Rx FIFO 0 New Message Line" "0,1" group.long ad:0xD000005C++0x03 line.long 0x00 "ILE0,Interrupt Line Enable Register i (i=0~2)" bitfld.long 0x00 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0x00 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long ad:0xD000185C++0x03 line.long 0x00 "ILE1,Interrupt Line Enable Register i (i=0~2)" bitfld.long 0x00 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0x00 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long ad:0xD000305C++0x03 line.long 0x00 "ILE2,Interrupt Line Enable Register i (i=0~2)" bitfld.long 0x00 1. "EINT1,Enable Interrupt Line 1" "0,1" bitfld.long 0x00 0. "EINT0,Enable Interrupt Line 0" "0,1" group.long ad:0xD0000080++0x03 line.long 0x00 "GFC0,Global Filter Configuration Register i (i=0~2)" bitfld.long 0x00 4.--5. "ANFS,Accept Non-matching Frames Standard" "0,1,2,3" bitfld.long 0x00 2.--3. "ANFE,Accept Non-matching Frames Extended" "0,1,2,3" bitfld.long 0x00 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x00 0. "RRFE,Reject Remote Frames Extended" "0,1" group.long ad:0xD0001880++0x03 line.long 0x00 "GFC1,Global Filter Configuration Register i (i=0~2)" bitfld.long 0x00 4.--5. "ANFS,Accept Non-matching Frames Standard" "0,1,2,3" bitfld.long 0x00 2.--3. "ANFE,Accept Non-matching Frames Extended" "0,1,2,3" bitfld.long 0x00 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x00 0. "RRFE,Reject Remote Frames Extended" "0,1" group.long ad:0xD0003080++0x03 line.long 0x00 "GFC2,Global Filter Configuration Register i (i=0~2)" bitfld.long 0x00 4.--5. "ANFS,Accept Non-matching Frames Standard" "0,1,2,3" bitfld.long 0x00 2.--3. "ANFE,Accept Non-matching Frames Extended" "0,1,2,3" bitfld.long 0x00 1. "RRFS,Reject Remote Frames Standard" "0,1" bitfld.long 0x00 0. "RRFE,Reject Remote Frames Extended" "0,1" group.long ad:0xD0000084++0x03 line.long 0x00 "SIDFC0,Standard ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x00 2.--15. 1. "FLSSA,Filter List Standard Start Address" group.long ad:0xD0001884++0x03 line.long 0x00 "SIDFC1,Standard ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x00 2.--15. 1. "FLSSA,Filter List Standard Start Address" group.long ad:0xD0003084++0x03 line.long 0x00 "SIDFC2,Standard ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSS,List Size Standard" hexmask.long.word 0x00 2.--15. 1. "FLSSA,Filter List Standard Start Address" group.long ad:0xD0000088++0x03 line.long 0x00 "XIDFC0,Extended ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSE,List Size Extended" hexmask.long.word 0x00 2.--15. 1. "FLESA,Filter List Extended Start Address" group.long ad:0xD0001888++0x03 line.long 0x00 "XIDFC1,Extended ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSE,List Size Extended" hexmask.long.word 0x00 2.--15. 1. "FLESA,Filter List Extended Start Address" group.long ad:0xD0003088++0x03 line.long 0x00 "XIDFC2,Extended ID Filter Configuration Register i (i=0~2)" hexmask.long.byte 0x00 16.--23. 1. "LSE,List Size Extended" hexmask.long.word 0x00 2.--15. 1. "FLESA,Filter List Extended Start Address" group.long ad:0xD0000090++0x03 line.long 0x00 "XIDAM0,Extended ID AND Mask Register i (i=0~2)" hexmask.long 0x00 0.--28. 1. "EIDM,Extended ID Mask" group.long ad:0xD0001890++0x03 line.long 0x00 "XIDAM1,Extended ID AND Mask Register i (i=0~2)" hexmask.long 0x00 0.--28. 1. "EIDM,Extended ID Mask" group.long ad:0xD0003090++0x03 line.long 0x00 "XIDAM2,Extended ID AND Mask Register i (i=0~2)" hexmask.long 0x00 0.--28. 1. "EIDM,Extended ID Mask" rgroup.long ad:0xD0000094++0x03 line.long 0x00 "HPMS0,High Priority Message Status Register i (i=0~2)" bitfld.long 0x00 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x00 8.--14. 1. "FIDX,Filter Index" bitfld.long 0x00 6.--7. "MSI,Message Storage Indicator" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "BIDX,Buffer Index" rgroup.long ad:0xD0001894++0x03 line.long 0x00 "HPMS1,High Priority Message Status Register i (i=0~2)" bitfld.long 0x00 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x00 8.--14. 1. "FIDX,Filter Index" bitfld.long 0x00 6.--7. "MSI,Message Storage Indicator" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "BIDX,Buffer Index" rgroup.long ad:0xD0003094++0x03 line.long 0x00 "HPMS2,High Priority Message Status Register i (i=0~2)" bitfld.long 0x00 15. "FLST,Filter List" "0,1" hexmask.long.byte 0x00 8.--14. 1. "FIDX,Filter Index" bitfld.long 0x00 6.--7. "MSI,Message Storage Indicator" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "BIDX,Buffer Index" group.long ad:0xD0000098++0x03 line.long 0x00 "NDAT10,New Data 1 Register i (i=0~2)" bitfld.long 0x00 31. "ND31,New Data 31" "0,1" bitfld.long 0x00 30. "ND30,New Data 30" "0,1" bitfld.long 0x00 29. "ND29,New Data 29" "0,1" bitfld.long 0x00 28. "ND28,New Data 28" "0,1" bitfld.long 0x00 27. "ND27,New Data 27" "0,1" newline bitfld.long 0x00 26. "ND26,New Data 26" "0,1" bitfld.long 0x00 25. "ND25,New Data 25" "0,1" bitfld.long 0x00 24. "ND24,New Data 24" "0,1" bitfld.long 0x00 23. "ND23,New Data 23" "0,1" bitfld.long 0x00 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x00 21. "ND21,New Data 21" "0,1" bitfld.long 0x00 20. "ND20,New Data 20" "0,1" bitfld.long 0x00 19. "ND19,New Data 19" "0,1" bitfld.long 0x00 18. "ND18,New Data 18" "0,1" bitfld.long 0x00 17. "ND17,New Data 17" "0,1" newline bitfld.long 0x00 16. "ND16,New Data 16" "0,1" bitfld.long 0x00 15. "ND15,New Data 15" "0,1" bitfld.long 0x00 14. "ND14,New Data 14" "0,1" bitfld.long 0x00 13. "ND13,New Data 13" "0,1" bitfld.long 0x00 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x00 11. "ND11,New Data 11" "0,1" bitfld.long 0x00 10. "ND10,New Data 10" "0,1" bitfld.long 0x00 9. "ND9,New Data 9" "0,1" bitfld.long 0x00 8. "ND8,New Data 8" "0,1" bitfld.long 0x00 7. "ND7,New Data 7" "0,1" newline bitfld.long 0x00 6. "ND6,New Data 6" "0,1" bitfld.long 0x00 5. "ND5,New Data 5" "0,1" bitfld.long 0x00 4. "ND4,New Data 4" "0,1" bitfld.long 0x00 3. "ND3,New Data 3" "0,1" bitfld.long 0x00 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x00 1. "ND1,New Data 1" "0,1" bitfld.long 0x00 0. "ND0,New Data 0" "0,1" group.long ad:0xD0001898++0x03 line.long 0x00 "NDAT11,New Data 1 Register i (i=0~2)" bitfld.long 0x00 31. "ND31,New Data 31" "0,1" bitfld.long 0x00 30. "ND30,New Data 30" "0,1" bitfld.long 0x00 29. "ND29,New Data 29" "0,1" bitfld.long 0x00 28. "ND28,New Data 28" "0,1" bitfld.long 0x00 27. "ND27,New Data 27" "0,1" newline bitfld.long 0x00 26. "ND26,New Data 26" "0,1" bitfld.long 0x00 25. "ND25,New Data 25" "0,1" bitfld.long 0x00 24. "ND24,New Data 24" "0,1" bitfld.long 0x00 23. "ND23,New Data 23" "0,1" bitfld.long 0x00 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x00 21. "ND21,New Data 21" "0,1" bitfld.long 0x00 20. "ND20,New Data 20" "0,1" bitfld.long 0x00 19. "ND19,New Data 19" "0,1" bitfld.long 0x00 18. "ND18,New Data 18" "0,1" bitfld.long 0x00 17. "ND17,New Data 17" "0,1" newline bitfld.long 0x00 16. "ND16,New Data 16" "0,1" bitfld.long 0x00 15. "ND15,New Data 15" "0,1" bitfld.long 0x00 14. "ND14,New Data 14" "0,1" bitfld.long 0x00 13. "ND13,New Data 13" "0,1" bitfld.long 0x00 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x00 11. "ND11,New Data 11" "0,1" bitfld.long 0x00 10. "ND10,New Data 10" "0,1" bitfld.long 0x00 9. "ND9,New Data 9" "0,1" bitfld.long 0x00 8. "ND8,New Data 8" "0,1" bitfld.long 0x00 7. "ND7,New Data 7" "0,1" newline bitfld.long 0x00 6. "ND6,New Data 6" "0,1" bitfld.long 0x00 5. "ND5,New Data 5" "0,1" bitfld.long 0x00 4. "ND4,New Data 4" "0,1" bitfld.long 0x00 3. "ND3,New Data 3" "0,1" bitfld.long 0x00 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x00 1. "ND1,New Data 1" "0,1" bitfld.long 0x00 0. "ND0,New Data 0" "0,1" group.long ad:0xD0003098++0x03 line.long 0x00 "NDAT12,New Data 1 Register i (i=0~2)" bitfld.long 0x00 31. "ND31,New Data 31" "0,1" bitfld.long 0x00 30. "ND30,New Data 30" "0,1" bitfld.long 0x00 29. "ND29,New Data 29" "0,1" bitfld.long 0x00 28. "ND28,New Data 28" "0,1" bitfld.long 0x00 27. "ND27,New Data 27" "0,1" newline bitfld.long 0x00 26. "ND26,New Data 26" "0,1" bitfld.long 0x00 25. "ND25,New Data 25" "0,1" bitfld.long 0x00 24. "ND24,New Data 24" "0,1" bitfld.long 0x00 23. "ND23,New Data 23" "0,1" bitfld.long 0x00 22. "ND22,New Data 22" "0,1" newline bitfld.long 0x00 21. "ND21,New Data 21" "0,1" bitfld.long 0x00 20. "ND20,New Data 20" "0,1" bitfld.long 0x00 19. "ND19,New Data 19" "0,1" bitfld.long 0x00 18. "ND18,New Data 18" "0,1" bitfld.long 0x00 17. "ND17,New Data 17" "0,1" newline bitfld.long 0x00 16. "ND16,New Data 16" "0,1" bitfld.long 0x00 15. "ND15,New Data 15" "0,1" bitfld.long 0x00 14. "ND14,New Data 14" "0,1" bitfld.long 0x00 13. "ND13,New Data 13" "0,1" bitfld.long 0x00 12. "ND12,New Data 12" "0,1" newline bitfld.long 0x00 11. "ND11,New Data 11" "0,1" bitfld.long 0x00 10. "ND10,New Data 10" "0,1" bitfld.long 0x00 9. "ND9,New Data 9" "0,1" bitfld.long 0x00 8. "ND8,New Data 8" "0,1" bitfld.long 0x00 7. "ND7,New Data 7" "0,1" newline bitfld.long 0x00 6. "ND6,New Data 6" "0,1" bitfld.long 0x00 5. "ND5,New Data 5" "0,1" bitfld.long 0x00 4. "ND4,New Data 4" "0,1" bitfld.long 0x00 3. "ND3,New Data 3" "0,1" bitfld.long 0x00 2. "ND2,New Data 2" "0,1" newline bitfld.long 0x00 1. "ND1,New Data 1" "0,1" bitfld.long 0x00 0. "ND0,New Data 0" "0,1" group.long ad:0xD000009C++0x03 line.long 0x00 "NDAT20,New Data 2 Register i (i=0~2)" bitfld.long 0x00 31. "ND63,New Data 63" "0,1" bitfld.long 0x00 30. "ND62,New Data 62" "0,1" bitfld.long 0x00 29. "ND61,New Data 61" "0,1" bitfld.long 0x00 28. "ND60,New Data 60" "0,1" bitfld.long 0x00 27. "ND59,New Data 59" "0,1" newline bitfld.long 0x00 26. "ND58,New Data 58" "0,1" bitfld.long 0x00 25. "ND57,New Data 57" "0,1" bitfld.long 0x00 24. "ND56,New Data 56" "0,1" bitfld.long 0x00 23. "ND55,New Data 55" "0,1" bitfld.long 0x00 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x00 21. "ND53,New Data 53" "0,1" bitfld.long 0x00 20. "ND52,New Data 52" "0,1" bitfld.long 0x00 19. "ND51,New Data 51" "0,1" bitfld.long 0x00 18. "ND50,New Data 50" "0,1" bitfld.long 0x00 17. "ND49,New Data 49" "0,1" newline bitfld.long 0x00 16. "ND48,New Data 48" "0,1" bitfld.long 0x00 15. "ND47,New Data 47" "0,1" bitfld.long 0x00 14. "ND46,New Data 46" "0,1" bitfld.long 0x00 13. "ND45,New Data 45" "0,1" bitfld.long 0x00 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x00 11. "ND43,New Data 43" "0,1" bitfld.long 0x00 10. "ND42,New Data 42" "0,1" bitfld.long 0x00 9. "ND41,New Data 41" "0,1" bitfld.long 0x00 8. "ND40,New Data 40" "0,1" bitfld.long 0x00 7. "ND39,New Data 39" "0,1" newline bitfld.long 0x00 6. "ND38,New Data 38" "0,1" bitfld.long 0x00 5. "ND37,New Data 37" "0,1" bitfld.long 0x00 4. "ND36,New Data 36" "0,1" bitfld.long 0x00 3. "ND35,New Data 35" "0,1" bitfld.long 0x00 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x00 1. "ND33,New Data 33" "0,1" bitfld.long 0x00 0. "ND32,New Data 32" "0,1" group.long ad:0xD000189C++0x03 line.long 0x00 "NDAT21,New Data 2 Register i (i=0~2)" bitfld.long 0x00 31. "ND63,New Data 63" "0,1" bitfld.long 0x00 30. "ND62,New Data 62" "0,1" bitfld.long 0x00 29. "ND61,New Data 61" "0,1" bitfld.long 0x00 28. "ND60,New Data 60" "0,1" bitfld.long 0x00 27. "ND59,New Data 59" "0,1" newline bitfld.long 0x00 26. "ND58,New Data 58" "0,1" bitfld.long 0x00 25. "ND57,New Data 57" "0,1" bitfld.long 0x00 24. "ND56,New Data 56" "0,1" bitfld.long 0x00 23. "ND55,New Data 55" "0,1" bitfld.long 0x00 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x00 21. "ND53,New Data 53" "0,1" bitfld.long 0x00 20. "ND52,New Data 52" "0,1" bitfld.long 0x00 19. "ND51,New Data 51" "0,1" bitfld.long 0x00 18. "ND50,New Data 50" "0,1" bitfld.long 0x00 17. "ND49,New Data 49" "0,1" newline bitfld.long 0x00 16. "ND48,New Data 48" "0,1" bitfld.long 0x00 15. "ND47,New Data 47" "0,1" bitfld.long 0x00 14. "ND46,New Data 46" "0,1" bitfld.long 0x00 13. "ND45,New Data 45" "0,1" bitfld.long 0x00 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x00 11. "ND43,New Data 43" "0,1" bitfld.long 0x00 10. "ND42,New Data 42" "0,1" bitfld.long 0x00 9. "ND41,New Data 41" "0,1" bitfld.long 0x00 8. "ND40,New Data 40" "0,1" bitfld.long 0x00 7. "ND39,New Data 39" "0,1" newline bitfld.long 0x00 6. "ND38,New Data 38" "0,1" bitfld.long 0x00 5. "ND37,New Data 37" "0,1" bitfld.long 0x00 4. "ND36,New Data 36" "0,1" bitfld.long 0x00 3. "ND35,New Data 35" "0,1" bitfld.long 0x00 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x00 1. "ND33,New Data 33" "0,1" bitfld.long 0x00 0. "ND32,New Data 32" "0,1" group.long ad:0xD000309C++0x03 line.long 0x00 "NDAT22,New Data 2 Register i (i=0~2)" bitfld.long 0x00 31. "ND63,New Data 63" "0,1" bitfld.long 0x00 30. "ND62,New Data 62" "0,1" bitfld.long 0x00 29. "ND61,New Data 61" "0,1" bitfld.long 0x00 28. "ND60,New Data 60" "0,1" bitfld.long 0x00 27. "ND59,New Data 59" "0,1" newline bitfld.long 0x00 26. "ND58,New Data 58" "0,1" bitfld.long 0x00 25. "ND57,New Data 57" "0,1" bitfld.long 0x00 24. "ND56,New Data 56" "0,1" bitfld.long 0x00 23. "ND55,New Data 55" "0,1" bitfld.long 0x00 22. "ND54,New Data 54" "0,1" newline bitfld.long 0x00 21. "ND53,New Data 53" "0,1" bitfld.long 0x00 20. "ND52,New Data 52" "0,1" bitfld.long 0x00 19. "ND51,New Data 51" "0,1" bitfld.long 0x00 18. "ND50,New Data 50" "0,1" bitfld.long 0x00 17. "ND49,New Data 49" "0,1" newline bitfld.long 0x00 16. "ND48,New Data 48" "0,1" bitfld.long 0x00 15. "ND47,New Data 47" "0,1" bitfld.long 0x00 14. "ND46,New Data 46" "0,1" bitfld.long 0x00 13. "ND45,New Data 45" "0,1" bitfld.long 0x00 12. "ND44,New Data 44" "0,1" newline bitfld.long 0x00 11. "ND43,New Data 43" "0,1" bitfld.long 0x00 10. "ND42,New Data 42" "0,1" bitfld.long 0x00 9. "ND41,New Data 41" "0,1" bitfld.long 0x00 8. "ND40,New Data 40" "0,1" bitfld.long 0x00 7. "ND39,New Data 39" "0,1" newline bitfld.long 0x00 6. "ND38,New Data 38" "0,1" bitfld.long 0x00 5. "ND37,New Data 37" "0,1" bitfld.long 0x00 4. "ND36,New Data 36" "0,1" bitfld.long 0x00 3. "ND35,New Data 35" "0,1" bitfld.long 0x00 2. "ND34,New Data 34" "0,1" newline bitfld.long 0x00 1. "ND33,New Data 33" "0,1" bitfld.long 0x00 0. "ND32,New Data 32" "0,1" group.long ad:0xD00000A0++0x03 line.long 0x00 "RXF0C0,Rx FIFO 0 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x00 2.--15. 1. "F0SA,Rx FIFO 0 Start Address" group.long ad:0xD00018A0++0x03 line.long 0x00 "RXF0C1,Rx FIFO 0 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x00 2.--15. 1. "F0SA,Rx FIFO 0 Start Address" group.long ad:0xD00030A0++0x03 line.long 0x00 "RXF0C2,Rx FIFO 0 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F0OM,FIFO 0 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F0WM,Rx FIFO 0 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F0S,Rx FIFO 0 Size" hexmask.long.word 0x00 2.--15. 1. "F0SA,Rx FIFO 0 Start Address" rgroup.long ad:0xD00000A4++0x03 line.long 0x00 "RXF0S0,Rx FIFO 0 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 24. "F0F,Rx FIFO 0 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" rgroup.long ad:0xD00018A4++0x03 line.long 0x00 "RXF0S1,Rx FIFO 0 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 24. "F0F,Rx FIFO 0 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" rgroup.long ad:0xD00030A4++0x03 line.long 0x00 "RXF0S2,Rx FIFO 0 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF0L,Rx FIFO 0 Message Lost" "0,1" bitfld.long 0x00 24. "F0F,Rx FIFO 0 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F0PI,Rx FIFO 0 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F0GI,Rx FIFO 0 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F0FL,Rx FIFO 0 Fill Level" group.long ad:0xD00000A8++0x03 line.long 0x00 "RXF0A0,Rx FIFO 0 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" group.long ad:0xD00018A8++0x03 line.long 0x00 "RXF0A1,Rx FIFO 0 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" group.long ad:0xD00030A8++0x03 line.long 0x00 "RXF0A2,Rx FIFO 0 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F0AI,Rx FIFO 0 Acknowledge Index" group.long ad:0xD00000AC++0x03 line.long 0x00 "RXBC0,Rx Buffer Configuration Register i (i=0~2)" hexmask.long.word 0x00 2.--15. 1. "RBSA,Rx Buffer Start Address" group.long ad:0xD00018AC++0x03 line.long 0x00 "RXBC1,Rx Buffer Configuration Register i (i=0~2)" hexmask.long.word 0x00 2.--15. 1. "RBSA,Rx Buffer Start Address" group.long ad:0xD00030AC++0x03 line.long 0x00 "RXBC2,Rx Buffer Configuration Register i (i=0~2)" hexmask.long.word 0x00 2.--15. 1. "RBSA,Rx Buffer Start Address" group.long ad:0xD00000B0++0x03 line.long 0x00 "RXF1C0,Rx FIFO 1 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x00 2.--15. 1. "F1SA,Rx FIFO 1 Start Address" group.long ad:0xD00018B0++0x03 line.long 0x00 "RXF1C1,Rx FIFO 1 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x00 2.--15. 1. "F1SA,Rx FIFO 1 Start Address" group.long ad:0xD00030B0++0x03 line.long 0x00 "RXF1C2,Rx FIFO 1 Configuration Register i (i=0~2)" bitfld.long 0x00 31. "F1OM,FIFO 1 Operation Mode" "0,1" hexmask.long.byte 0x00 24.--30. 1. "F1WM,Rx FIFO 1 Watermark" hexmask.long.byte 0x00 16.--22. 1. "F1S,Rx FIFO 1 Size" hexmask.long.word 0x00 2.--15. 1. "F1SA,Rx FIFO 1 Start Address" rgroup.long ad:0xD00000B4++0x03 line.long 0x00 "RXF1S0,Rx FIFO 1 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" rgroup.long ad:0xD00018B4++0x03 line.long 0x00 "RXF1S1,Rx FIFO 1 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" rgroup.long ad:0xD00030B4++0x03 line.long 0x00 "RXF1S2,Rx FIFO 1 Status Register i (i=0~2)" bitfld.long 0x00 25. "RF1L,Rx FIFO 1 Message Lost" "0,1" bitfld.long 0x00 24. "F1F,Rx FIFO 1 Full" "0,1" hexmask.long.byte 0x00 16.--21. 1. "F1PI,Rx FIFO 1 Put Index" hexmask.long.byte 0x00 8.--13. 1. "F1GI,Rx FIFO 1 Get Index" hexmask.long.byte 0x00 0.--6. 1. "F1FL,Rx FIFO 1 Fill Level" group.long ad:0xD00000B8++0x03 line.long 0x00 "RXF1A0,Rx FIFO 1 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" group.long ad:0xD00018B8++0x03 line.long 0x00 "RXF1A1,Rx FIFO 1 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" group.long ad:0xD00030B8++0x03 line.long 0x00 "RXF1A2,Rx FIFO 1 Acknowledge Register i (i=0~2)" hexmask.long.byte 0x00 0.--5. 1. "F1AI,Rx FIFO 1 Acknowledge Index" group.long ad:0xD00000BC++0x03 line.long 0x00 "RXESC0,Rx Buffer / FIFO Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 8.--10. "RBDS,Rx Buffer Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0,1,2,3,4,5,6,7" group.long ad:0xD00018BC++0x03 line.long 0x00 "RXESC1,Rx Buffer / FIFO Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 8.--10. "RBDS,Rx Buffer Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0,1,2,3,4,5,6,7" group.long ad:0xD00030BC++0x03 line.long 0x00 "RXESC2,Rx Buffer / FIFO Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 8.--10. "RBDS,Rx Buffer Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "F1DS,Rx FIFO 1 Data Field Size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "F0DS,Rx FIFO 0 Data Field Size" "0,1,2,3,4,5,6,7" group.long ad:0xD00000C0++0x03 line.long 0x00 "TXBC0,Tx Buffer Configuration Register i (i=0~2)" bitfld.long 0x00 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x00 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" hexmask.long.byte 0x00 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x00 2.--15. 1. "TBSA,Tx Buffers Start Address" group.long ad:0xD00018C0++0x03 line.long 0x00 "TXBC1,Tx Buffer Configuration Register i (i=0~2)" bitfld.long 0x00 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x00 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" hexmask.long.byte 0x00 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x00 2.--15. 1. "TBSA,Tx Buffers Start Address" group.long ad:0xD00030C0++0x03 line.long 0x00 "TXBC2,Tx Buffer Configuration Register i (i=0~2)" bitfld.long 0x00 30. "TFQM,Tx FIFO/Queue Mode" "0,1" hexmask.long.byte 0x00 24.--29. 1. "TFQS,Transmit FIFO/Queue Size" hexmask.long.byte 0x00 16.--21. 1. "NDTB,Number of Dedicated Transmit Buffers" hexmask.long.word 0x00 2.--15. 1. "TBSA,Tx Buffers Start Address" rgroup.long ad:0xD00000C4++0x03 line.long 0x00 "TXFQS0,Tx FIFO/Queue Status Register i (i=0~2)" bitfld.long 0x00 21. "TFQF,Tx FIFO/Queue Full" "0,1" bitfld.long 0x00 16.--20. "TFQPI,Tx FIFO/Queue Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "TFGI,Tx FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "TFFL,Tx FIFO Free Level" rgroup.long ad:0xD00018C4++0x03 line.long 0x00 "TXFQS1,Tx FIFO/Queue Status Register i (i=0~2)" bitfld.long 0x00 21. "TFQF,Tx FIFO/Queue Full" "0,1" bitfld.long 0x00 16.--20. "TFQPI,Tx FIFO/Queue Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "TFGI,Tx FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "TFFL,Tx FIFO Free Level" rgroup.long ad:0xD00030C4++0x03 line.long 0x00 "TXFQS2,Tx FIFO/Queue Status Register i (i=0~2)" bitfld.long 0x00 21. "TFQF,Tx FIFO/Queue Full" "0,1" bitfld.long 0x00 16.--20. "TFQPI,Tx FIFO/Queue Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "TFGI,Tx FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "TFFL,Tx FIFO Free Level" group.long ad:0xD00000C8++0x03 line.long 0x00 "TXESC0,Tx Buffer Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 0.--2. "TBDS,Tx Buffer Data Field Size" "0,1,2,3,4,5,6,7" group.long ad:0xD00018C8++0x03 line.long 0x00 "TXESC1,Tx Buffer Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 0.--2. "TBDS,Tx Buffer Data Field Size" "0,1,2,3,4,5,6,7" group.long ad:0xD00030C8++0x03 line.long 0x00 "TXESC2,Tx Buffer Element Size Configuration Register i (i=0~2)" bitfld.long 0x00 0.--2. "TBDS,Tx Buffer Data Field Size" "0,1,2,3,4,5,6,7" rgroup.long ad:0xD00000CC++0x03 line.long 0x00 "TXBRP0,Tx Buffer Request Pending Register i (i=0~2)" bitfld.long 0x00 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x00 30. "TRP30,Transmission Request Pending 30" "0,1" bitfld.long 0x00 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x00 28. "TRP28,Transmission Request Pending 28" "0,1" bitfld.long 0x00 27. "TRP27,Transmission Request Pending 27" "0,1" newline bitfld.long 0x00 26. "TRP26,Transmission Request Pending 26" "0,1" bitfld.long 0x00 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x00 24. "TRP24,Transmission Request Pending 24" "0,1" bitfld.long 0x00 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x00 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x00 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x00 20. "TRP20,Transmission Request Pending 20" "0,1" bitfld.long 0x00 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x00 18. "TRP18,Transmission Request Pending 18" "0,1" bitfld.long 0x00 17. "TRP17,Transmission Request Pending 17" "0,1" newline bitfld.long 0x00 16. "TRP16,Transmission Request Pending 16" "0,1" bitfld.long 0x00 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x00 14. "TRP14,Transmission Request Pending 14" "0,1" bitfld.long 0x00 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x00 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x00 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x00 10. "TRP10,Transmission Request Pending 10" "0,1" bitfld.long 0x00 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x00 8. "TRP8,Transmission Request Pending 8" "0,1" bitfld.long 0x00 7. "TRP7,Transmission Request Pending 7" "0,1" newline bitfld.long 0x00 6. "TRP6,Transmission Request Pending 6" "0,1" bitfld.long 0x00 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x00 4. "TRP4,Transmission Request Pending 4" "0,1" bitfld.long 0x00 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x00 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x00 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x00 0. "TRP0,Transmission Request Pending 0" "0,1" rgroup.long ad:0xD00018CC++0x03 line.long 0x00 "TXBRP1,Tx Buffer Request Pending Register i (i=0~2)" bitfld.long 0x00 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x00 30. "TRP30,Transmission Request Pending 30" "0,1" bitfld.long 0x00 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x00 28. "TRP28,Transmission Request Pending 28" "0,1" bitfld.long 0x00 27. "TRP27,Transmission Request Pending 27" "0,1" newline bitfld.long 0x00 26. "TRP26,Transmission Request Pending 26" "0,1" bitfld.long 0x00 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x00 24. "TRP24,Transmission Request Pending 24" "0,1" bitfld.long 0x00 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x00 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x00 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x00 20. "TRP20,Transmission Request Pending 20" "0,1" bitfld.long 0x00 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x00 18. "TRP18,Transmission Request Pending 18" "0,1" bitfld.long 0x00 17. "TRP17,Transmission Request Pending 17" "0,1" newline bitfld.long 0x00 16. "TRP16,Transmission Request Pending 16" "0,1" bitfld.long 0x00 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x00 14. "TRP14,Transmission Request Pending 14" "0,1" bitfld.long 0x00 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x00 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x00 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x00 10. "TRP10,Transmission Request Pending 10" "0,1" bitfld.long 0x00 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x00 8. "TRP8,Transmission Request Pending 8" "0,1" bitfld.long 0x00 7. "TRP7,Transmission Request Pending 7" "0,1" newline bitfld.long 0x00 6. "TRP6,Transmission Request Pending 6" "0,1" bitfld.long 0x00 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x00 4. "TRP4,Transmission Request Pending 4" "0,1" bitfld.long 0x00 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x00 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x00 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x00 0. "TRP0,Transmission Request Pending 0" "0,1" rgroup.long ad:0xD00030CC++0x03 line.long 0x00 "TXBRP2,Tx Buffer Request Pending Register i (i=0~2)" bitfld.long 0x00 31. "TRP31,Transmission Request Pending 31" "0,1" bitfld.long 0x00 30. "TRP30,Transmission Request Pending 30" "0,1" bitfld.long 0x00 29. "TRP29,Transmission Request Pending 29" "0,1" bitfld.long 0x00 28. "TRP28,Transmission Request Pending 28" "0,1" bitfld.long 0x00 27. "TRP27,Transmission Request Pending 27" "0,1" newline bitfld.long 0x00 26. "TRP26,Transmission Request Pending 26" "0,1" bitfld.long 0x00 25. "TRP25,Transmission Request Pending 25" "0,1" bitfld.long 0x00 24. "TRP24,Transmission Request Pending 24" "0,1" bitfld.long 0x00 23. "TRP23,Transmission Request Pending 23" "0,1" bitfld.long 0x00 22. "TRP22,Transmission Request Pending 22" "0,1" newline bitfld.long 0x00 21. "TRP21,Transmission Request Pending 21" "0,1" bitfld.long 0x00 20. "TRP20,Transmission Request Pending 20" "0,1" bitfld.long 0x00 19. "TRP19,Transmission Request Pending 19" "0,1" bitfld.long 0x00 18. "TRP18,Transmission Request Pending 18" "0,1" bitfld.long 0x00 17. "TRP17,Transmission Request Pending 17" "0,1" newline bitfld.long 0x00 16. "TRP16,Transmission Request Pending 16" "0,1" bitfld.long 0x00 15. "TRP15,Transmission Request Pending 15" "0,1" bitfld.long 0x00 14. "TRP14,Transmission Request Pending 14" "0,1" bitfld.long 0x00 13. "TRP13,Transmission Request Pending 13" "0,1" bitfld.long 0x00 12. "TRP12,Transmission Request Pending 12" "0,1" newline bitfld.long 0x00 11. "TRP11,Transmission Request Pending 11" "0,1" bitfld.long 0x00 10. "TRP10,Transmission Request Pending 10" "0,1" bitfld.long 0x00 9. "TRP9,Transmission Request Pending 9" "0,1" bitfld.long 0x00 8. "TRP8,Transmission Request Pending 8" "0,1" bitfld.long 0x00 7. "TRP7,Transmission Request Pending 7" "0,1" newline bitfld.long 0x00 6. "TRP6,Transmission Request Pending 6" "0,1" bitfld.long 0x00 5. "TRP5,Transmission Request Pending 5" "0,1" bitfld.long 0x00 4. "TRP4,Transmission Request Pending 4" "0,1" bitfld.long 0x00 3. "TRP3,Transmission Request Pending 3" "0,1" bitfld.long 0x00 2. "TRP2,Transmission Request Pending 2" "0,1" newline bitfld.long 0x00 1. "TRP1,Transmission Request Pending 1" "0,1" bitfld.long 0x00 0. "TRP0,Transmission Request Pending 0" "0,1" group.long ad:0xD00000D0++0x03 line.long 0x00 "TXBAR0,Tx Buffer Add Request Register i (i=0~2)" bitfld.long 0x00 31. "AR31,Add Request 31" "0,1" bitfld.long 0x00 30. "AR30,Add Request 30" "0,1" bitfld.long 0x00 29. "AR29,Add Request 29" "0,1" bitfld.long 0x00 28. "AR28,Add Request 28" "0,1" bitfld.long 0x00 27. "AR27,Add Request 27" "0,1" newline bitfld.long 0x00 26. "AR26,Add Request 26" "0,1" bitfld.long 0x00 25. "AR25,Add Request 25" "0,1" bitfld.long 0x00 24. "AR24,Add Request 24" "0,1" bitfld.long 0x00 23. "AR23,Add Request 23" "0,1" bitfld.long 0x00 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x00 21. "AR21,Add Request 21" "0,1" bitfld.long 0x00 20. "TRP20,Add Request 20" "0,1" bitfld.long 0x00 19. "AR19,Add Request 19" "0,1" bitfld.long 0x00 18. "AR18,Add Request 18" "0,1" bitfld.long 0x00 17. "AR17,Add Request 17" "0,1" newline bitfld.long 0x00 16. "AR16,Add Request 16" "0,1" bitfld.long 0x00 15. "AR15,Add Request 15" "0,1" bitfld.long 0x00 14. "AR14,Add Request 14" "0,1" bitfld.long 0x00 13. "AR13,Add Request 13" "0,1" bitfld.long 0x00 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x00 11. "AR11,Add Request 11" "0,1" bitfld.long 0x00 10. "AR10,Add Request 10" "0,1" bitfld.long 0x00 9. "AR9,Add Request 9" "0,1" bitfld.long 0x00 8. "AR8,Add Request 8" "0,1" bitfld.long 0x00 7. "AR7,Add Request 7" "0,1" newline bitfld.long 0x00 6. "AR6,Add Request 6" "0,1" bitfld.long 0x00 5. "AR5,Add Request 5" "0,1" bitfld.long 0x00 4. "AR4,Add Request 4" "0,1" bitfld.long 0x00 3. "AR3,Add Request 3" "0,1" bitfld.long 0x00 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x00 1. "AR1,Add Request 1" "0,1" bitfld.long 0x00 0. "AR0,Add Request 0" "0,1" group.long ad:0xD00018D0++0x03 line.long 0x00 "TXBAR1,Tx Buffer Add Request Register i (i=0~2)" bitfld.long 0x00 31. "AR31,Add Request 31" "0,1" bitfld.long 0x00 30. "AR30,Add Request 30" "0,1" bitfld.long 0x00 29. "AR29,Add Request 29" "0,1" bitfld.long 0x00 28. "AR28,Add Request 28" "0,1" bitfld.long 0x00 27. "AR27,Add Request 27" "0,1" newline bitfld.long 0x00 26. "AR26,Add Request 26" "0,1" bitfld.long 0x00 25. "AR25,Add Request 25" "0,1" bitfld.long 0x00 24. "AR24,Add Request 24" "0,1" bitfld.long 0x00 23. "AR23,Add Request 23" "0,1" bitfld.long 0x00 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x00 21. "AR21,Add Request 21" "0,1" bitfld.long 0x00 20. "TRP20,Add Request 20" "0,1" bitfld.long 0x00 19. "AR19,Add Request 19" "0,1" bitfld.long 0x00 18. "AR18,Add Request 18" "0,1" bitfld.long 0x00 17. "AR17,Add Request 17" "0,1" newline bitfld.long 0x00 16. "AR16,Add Request 16" "0,1" bitfld.long 0x00 15. "AR15,Add Request 15" "0,1" bitfld.long 0x00 14. "AR14,Add Request 14" "0,1" bitfld.long 0x00 13. "AR13,Add Request 13" "0,1" bitfld.long 0x00 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x00 11. "AR11,Add Request 11" "0,1" bitfld.long 0x00 10. "AR10,Add Request 10" "0,1" bitfld.long 0x00 9. "AR9,Add Request 9" "0,1" bitfld.long 0x00 8. "AR8,Add Request 8" "0,1" bitfld.long 0x00 7. "AR7,Add Request 7" "0,1" newline bitfld.long 0x00 6. "AR6,Add Request 6" "0,1" bitfld.long 0x00 5. "AR5,Add Request 5" "0,1" bitfld.long 0x00 4. "AR4,Add Request 4" "0,1" bitfld.long 0x00 3. "AR3,Add Request 3" "0,1" bitfld.long 0x00 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x00 1. "AR1,Add Request 1" "0,1" bitfld.long 0x00 0. "AR0,Add Request 0" "0,1" group.long ad:0xD00030D0++0x03 line.long 0x00 "TXBAR2,Tx Buffer Add Request Register i (i=0~2)" bitfld.long 0x00 31. "AR31,Add Request 31" "0,1" bitfld.long 0x00 30. "AR30,Add Request 30" "0,1" bitfld.long 0x00 29. "AR29,Add Request 29" "0,1" bitfld.long 0x00 28. "AR28,Add Request 28" "0,1" bitfld.long 0x00 27. "AR27,Add Request 27" "0,1" newline bitfld.long 0x00 26. "AR26,Add Request 26" "0,1" bitfld.long 0x00 25. "AR25,Add Request 25" "0,1" bitfld.long 0x00 24. "AR24,Add Request 24" "0,1" bitfld.long 0x00 23. "AR23,Add Request 23" "0,1" bitfld.long 0x00 22. "AR22,Add Request 22" "0,1" newline bitfld.long 0x00 21. "AR21,Add Request 21" "0,1" bitfld.long 0x00 20. "TRP20,Add Request 20" "0,1" bitfld.long 0x00 19. "AR19,Add Request 19" "0,1" bitfld.long 0x00 18. "AR18,Add Request 18" "0,1" bitfld.long 0x00 17. "AR17,Add Request 17" "0,1" newline bitfld.long 0x00 16. "AR16,Add Request 16" "0,1" bitfld.long 0x00 15. "AR15,Add Request 15" "0,1" bitfld.long 0x00 14. "AR14,Add Request 14" "0,1" bitfld.long 0x00 13. "AR13,Add Request 13" "0,1" bitfld.long 0x00 12. "AR12,Add Request 12" "0,1" newline bitfld.long 0x00 11. "AR11,Add Request 11" "0,1" bitfld.long 0x00 10. "AR10,Add Request 10" "0,1" bitfld.long 0x00 9. "AR9,Add Request 9" "0,1" bitfld.long 0x00 8. "AR8,Add Request 8" "0,1" bitfld.long 0x00 7. "AR7,Add Request 7" "0,1" newline bitfld.long 0x00 6. "AR6,Add Request 6" "0,1" bitfld.long 0x00 5. "AR5,Add Request 5" "0,1" bitfld.long 0x00 4. "AR4,Add Request 4" "0,1" bitfld.long 0x00 3. "AR3,Add Request 3" "0,1" bitfld.long 0x00 2. "AR2,Add Request 2" "0,1" newline bitfld.long 0x00 1. "AR1,Add Request 1" "0,1" bitfld.long 0x00 0. "AR0,Add Request 0" "0,1" group.long ad:0xD00000D4++0x03 line.long 0x00 "TXBCR0,Tx Buffer Cancellation Request i (i=0~2)" bitfld.long 0x00 31. "CR31,Cancellation Request" "0,1" bitfld.long 0x00 30. "CR30,Cancellation Request" "0,1" bitfld.long 0x00 29. "CR29,Cancellation Request" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Request" "0,1" bitfld.long 0x00 27. "CR27,Cancellation Request" "0,1" newline bitfld.long 0x00 26. "CR26,Cancellation Request" "0,1" bitfld.long 0x00 25. "CR25,Cancellation Request" "0,1" bitfld.long 0x00 24. "CR24,Cancellation Request" "0,1" bitfld.long 0x00 23. "CR23,Cancellation Request" "0,1" bitfld.long 0x00 22. "CR22,Cancellation Request" "0,1" newline bitfld.long 0x00 21. "CR21,Cancellation Request" "0,1" bitfld.long 0x00 20. "CR20,Cancellation Request" "0,1" bitfld.long 0x00 19. "CR19,Cancellation Request" "0,1" bitfld.long 0x00 18. "CR18,Cancellation Request" "0,1" bitfld.long 0x00 17. "CR17,Cancellation Request" "0,1" newline bitfld.long 0x00 16. "CR16,Cancellation Request" "0,1" bitfld.long 0x00 15. "CR15,Cancellation Request" "0,1" bitfld.long 0x00 14. "CR14,Cancellation Request" "0,1" bitfld.long 0x00 13. "CR13,Cancellation Request" "0,1" bitfld.long 0x00 12. "CR12,Cancellation Request" "0,1" newline bitfld.long 0x00 11. "CR11,Cancellation Request" "0,1" bitfld.long 0x00 10. "CR10,Cancellation Request" "0,1" bitfld.long 0x00 9. "CR9,Cancellation Request" "0,1" bitfld.long 0x00 8. "CR8,Cancellation Request" "0,1" bitfld.long 0x00 7. "CR7,Cancellation Request" "0,1" newline bitfld.long 0x00 6. "CR6,Cancellation Request" "0,1" bitfld.long 0x00 5. "CR5,Cancellation Request" "0,1" bitfld.long 0x00 4. "CR4,Cancellation Request" "0,1" bitfld.long 0x00 3. "CR3,Cancellation Request" "0,1" bitfld.long 0x00 2. "CR2,Cancellation Request" "0,1" newline bitfld.long 0x00 1. "CR1,Cancellation Request" "0,1" bitfld.long 0x00 0. "CR0,Cancellation Request" "0,1" group.long ad:0xD00018D4++0x03 line.long 0x00 "TXBCR1,Tx Buffer Cancellation Request i (i=0~2)" bitfld.long 0x00 31. "CR31,Cancellation Request" "0,1" bitfld.long 0x00 30. "CR30,Cancellation Request" "0,1" bitfld.long 0x00 29. "CR29,Cancellation Request" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Request" "0,1" bitfld.long 0x00 27. "CR27,Cancellation Request" "0,1" newline bitfld.long 0x00 26. "CR26,Cancellation Request" "0,1" bitfld.long 0x00 25. "CR25,Cancellation Request" "0,1" bitfld.long 0x00 24. "CR24,Cancellation Request" "0,1" bitfld.long 0x00 23. "CR23,Cancellation Request" "0,1" bitfld.long 0x00 22. "CR22,Cancellation Request" "0,1" newline bitfld.long 0x00 21. "CR21,Cancellation Request" "0,1" bitfld.long 0x00 20. "CR20,Cancellation Request" "0,1" bitfld.long 0x00 19. "CR19,Cancellation Request" "0,1" bitfld.long 0x00 18. "CR18,Cancellation Request" "0,1" bitfld.long 0x00 17. "CR17,Cancellation Request" "0,1" newline bitfld.long 0x00 16. "CR16,Cancellation Request" "0,1" bitfld.long 0x00 15. "CR15,Cancellation Request" "0,1" bitfld.long 0x00 14. "CR14,Cancellation Request" "0,1" bitfld.long 0x00 13. "CR13,Cancellation Request" "0,1" bitfld.long 0x00 12. "CR12,Cancellation Request" "0,1" newline bitfld.long 0x00 11. "CR11,Cancellation Request" "0,1" bitfld.long 0x00 10. "CR10,Cancellation Request" "0,1" bitfld.long 0x00 9. "CR9,Cancellation Request" "0,1" bitfld.long 0x00 8. "CR8,Cancellation Request" "0,1" bitfld.long 0x00 7. "CR7,Cancellation Request" "0,1" newline bitfld.long 0x00 6. "CR6,Cancellation Request" "0,1" bitfld.long 0x00 5. "CR5,Cancellation Request" "0,1" bitfld.long 0x00 4. "CR4,Cancellation Request" "0,1" bitfld.long 0x00 3. "CR3,Cancellation Request" "0,1" bitfld.long 0x00 2. "CR2,Cancellation Request" "0,1" newline bitfld.long 0x00 1. "CR1,Cancellation Request" "0,1" bitfld.long 0x00 0. "CR0,Cancellation Request" "0,1" group.long ad:0xD00030D4++0x03 line.long 0x00 "TXBCR2,Tx Buffer Cancellation Request i (i=0~2)" bitfld.long 0x00 31. "CR31,Cancellation Request" "0,1" bitfld.long 0x00 30. "CR30,Cancellation Request" "0,1" bitfld.long 0x00 29. "CR29,Cancellation Request" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Request" "0,1" bitfld.long 0x00 27. "CR27,Cancellation Request" "0,1" newline bitfld.long 0x00 26. "CR26,Cancellation Request" "0,1" bitfld.long 0x00 25. "CR25,Cancellation Request" "0,1" bitfld.long 0x00 24. "CR24,Cancellation Request" "0,1" bitfld.long 0x00 23. "CR23,Cancellation Request" "0,1" bitfld.long 0x00 22. "CR22,Cancellation Request" "0,1" newline bitfld.long 0x00 21. "CR21,Cancellation Request" "0,1" bitfld.long 0x00 20. "CR20,Cancellation Request" "0,1" bitfld.long 0x00 19. "CR19,Cancellation Request" "0,1" bitfld.long 0x00 18. "CR18,Cancellation Request" "0,1" bitfld.long 0x00 17. "CR17,Cancellation Request" "0,1" newline bitfld.long 0x00 16. "CR16,Cancellation Request" "0,1" bitfld.long 0x00 15. "CR15,Cancellation Request" "0,1" bitfld.long 0x00 14. "CR14,Cancellation Request" "0,1" bitfld.long 0x00 13. "CR13,Cancellation Request" "0,1" bitfld.long 0x00 12. "CR12,Cancellation Request" "0,1" newline bitfld.long 0x00 11. "CR11,Cancellation Request" "0,1" bitfld.long 0x00 10. "CR10,Cancellation Request" "0,1" bitfld.long 0x00 9. "CR9,Cancellation Request" "0,1" bitfld.long 0x00 8. "CR8,Cancellation Request" "0,1" bitfld.long 0x00 7. "CR7,Cancellation Request" "0,1" newline bitfld.long 0x00 6. "CR6,Cancellation Request" "0,1" bitfld.long 0x00 5. "CR5,Cancellation Request" "0,1" bitfld.long 0x00 4. "CR4,Cancellation Request" "0,1" bitfld.long 0x00 3. "CR3,Cancellation Request" "0,1" bitfld.long 0x00 2. "CR2,Cancellation Request" "0,1" newline bitfld.long 0x00 1. "CR1,Cancellation Request" "0,1" bitfld.long 0x00 0. "CR0,Cancellation Request" "0,1" rgroup.long ad:0xD00000D8++0x03 line.long 0x00 "TXBTO0,Tx Buffer Transmission Occurred Register i (i=0~2)" bitfld.long 0x00 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x00 30. "TO30,Transmission Occurred 30" "0,1" bitfld.long 0x00 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x00 28. "TO28,Transmission Occurred 28" "0,1" bitfld.long 0x00 27. "TO27,Transmission Occurred 27" "0,1" newline bitfld.long 0x00 26. "TO26,Transmission Occurred 26" "0,1" bitfld.long 0x00 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x00 24. "TO24,Transmission Occurred 24" "0,1" bitfld.long 0x00 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x00 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x00 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x00 20. "TO20,Transmission Occurred 20" "0,1" bitfld.long 0x00 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x00 18. "TO18,Transmission Occurred 18" "0,1" bitfld.long 0x00 17. "TO17,Transmission Occurred 17" "0,1" newline bitfld.long 0x00 16. "TO16,Transmission Occurred 16" "0,1" bitfld.long 0x00 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x00 14. "TO14,Transmission Occurred 14" "0,1" bitfld.long 0x00 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x00 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x00 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x00 10. "TO10,Transmission Occurred 10" "0,1" bitfld.long 0x00 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x00 8. "TO8,Transmission Occurred 8" "0,1" bitfld.long 0x00 7. "TO7,Transmission Occurred 7" "0,1" newline bitfld.long 0x00 6. "TO6,Transmission Occurred 6" "0,1" bitfld.long 0x00 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x00 4. "TO4,Transmission Occurred 4" "0,1" bitfld.long 0x00 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x00 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x00 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x00 0. "TO0,Transmission Occurred 0" "0,1" rgroup.long ad:0xD00018D8++0x03 line.long 0x00 "TXBTO1,Tx Buffer Transmission Occurred Register i (i=0~2)" bitfld.long 0x00 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x00 30. "TO30,Transmission Occurred 30" "0,1" bitfld.long 0x00 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x00 28. "TO28,Transmission Occurred 28" "0,1" bitfld.long 0x00 27. "TO27,Transmission Occurred 27" "0,1" newline bitfld.long 0x00 26. "TO26,Transmission Occurred 26" "0,1" bitfld.long 0x00 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x00 24. "TO24,Transmission Occurred 24" "0,1" bitfld.long 0x00 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x00 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x00 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x00 20. "TO20,Transmission Occurred 20" "0,1" bitfld.long 0x00 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x00 18. "TO18,Transmission Occurred 18" "0,1" bitfld.long 0x00 17. "TO17,Transmission Occurred 17" "0,1" newline bitfld.long 0x00 16. "TO16,Transmission Occurred 16" "0,1" bitfld.long 0x00 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x00 14. "TO14,Transmission Occurred 14" "0,1" bitfld.long 0x00 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x00 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x00 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x00 10. "TO10,Transmission Occurred 10" "0,1" bitfld.long 0x00 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x00 8. "TO8,Transmission Occurred 8" "0,1" bitfld.long 0x00 7. "TO7,Transmission Occurred 7" "0,1" newline bitfld.long 0x00 6. "TO6,Transmission Occurred 6" "0,1" bitfld.long 0x00 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x00 4. "TO4,Transmission Occurred 4" "0,1" bitfld.long 0x00 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x00 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x00 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x00 0. "TO0,Transmission Occurred 0" "0,1" rgroup.long ad:0xD00030D8++0x03 line.long 0x00 "TXBTO2,Tx Buffer Transmission Occurred Register i (i=0~2)" bitfld.long 0x00 31. "TO31,Transmission Occurred 31" "0,1" bitfld.long 0x00 30. "TO30,Transmission Occurred 30" "0,1" bitfld.long 0x00 29. "TO29,Transmission Occurred 29" "0,1" bitfld.long 0x00 28. "TO28,Transmission Occurred 28" "0,1" bitfld.long 0x00 27. "TO27,Transmission Occurred 27" "0,1" newline bitfld.long 0x00 26. "TO26,Transmission Occurred 26" "0,1" bitfld.long 0x00 25. "TO25,Transmission Occurred 25" "0,1" bitfld.long 0x00 24. "TO24,Transmission Occurred 24" "0,1" bitfld.long 0x00 23. "TO23,Transmission Occurred 23" "0,1" bitfld.long 0x00 22. "TO22,Transmission Occurred 22" "0,1" newline bitfld.long 0x00 21. "TO21,Transmission Occurred 21" "0,1" bitfld.long 0x00 20. "TO20,Transmission Occurred 20" "0,1" bitfld.long 0x00 19. "TO19,Transmission Occurred 19" "0,1" bitfld.long 0x00 18. "TO18,Transmission Occurred 18" "0,1" bitfld.long 0x00 17. "TO17,Transmission Occurred 17" "0,1" newline bitfld.long 0x00 16. "TO16,Transmission Occurred 16" "0,1" bitfld.long 0x00 15. "TO15,Transmission Occurred 15" "0,1" bitfld.long 0x00 14. "TO14,Transmission Occurred 14" "0,1" bitfld.long 0x00 13. "TO13,Transmission Occurred 13" "0,1" bitfld.long 0x00 12. "TO12,Transmission Occurred 12" "0,1" newline bitfld.long 0x00 11. "TO11,Transmission Occurred 11" "0,1" bitfld.long 0x00 10. "TO10,Transmission Occurred 10" "0,1" bitfld.long 0x00 9. "TO9,Transmission Occurred 9" "0,1" bitfld.long 0x00 8. "TO8,Transmission Occurred 8" "0,1" bitfld.long 0x00 7. "TO7,Transmission Occurred 7" "0,1" newline bitfld.long 0x00 6. "TO6,Transmission Occurred 6" "0,1" bitfld.long 0x00 5. "TO5,Transmission Occurred 5" "0,1" bitfld.long 0x00 4. "TO4,Transmission Occurred 4" "0,1" bitfld.long 0x00 3. "TO3,Transmission Occurred 3" "0,1" bitfld.long 0x00 2. "TO2,Transmission Occurred 2" "0,1" newline bitfld.long 0x00 1. "TO1,Transmission Occurred 1" "0,1" bitfld.long 0x00 0. "TO0,Transmission Occurred 0" "0,1" group.long ad:0xD00000DC++0x03 line.long 0x00 "TXBCF0,Tx Buffer Cancellation Finished Register i (i=0~2)" rbitfld.long 0x00 31. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 30. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 29. "CF31,Cancellation Finished" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Finished" "0,1" rbitfld.long 0x00 27. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 26. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 25. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 24. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 23. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 22. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 21. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 20. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 19. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 18. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 17. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 16. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 15. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 14. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 13. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 12. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 11. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 10. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 9. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 8. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 7. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 6. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 5. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 4. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 3. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 2. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 1. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 0. "CF31,Cancellation Finished" "0,1" group.long ad:0xD00018DC++0x03 line.long 0x00 "TXBCF1,Tx Buffer Cancellation Finished Register i (i=0~2)" rbitfld.long 0x00 31. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 30. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 29. "CF31,Cancellation Finished" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Finished" "0,1" rbitfld.long 0x00 27. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 26. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 25. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 24. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 23. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 22. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 21. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 20. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 19. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 18. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 17. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 16. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 15. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 14. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 13. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 12. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 11. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 10. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 9. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 8. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 7. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 6. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 5. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 4. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 3. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 2. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 1. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 0. "CF31,Cancellation Finished" "0,1" group.long ad:0xD00030DC++0x03 line.long 0x00 "TXBCF2,Tx Buffer Cancellation Finished Register i (i=0~2)" rbitfld.long 0x00 31. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 30. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 29. "CF31,Cancellation Finished" "0,1" bitfld.long 0x00 28. "CR28,Cancellation Finished" "0,1" rbitfld.long 0x00 27. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 26. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 25. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 24. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 23. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 22. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 21. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 20. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 19. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 18. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 17. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 16. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 15. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 14. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 13. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 12. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 11. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 10. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 9. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 8. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 7. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 6. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 5. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 4. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 3. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 2. "CF31,Cancellation Finished" "0,1" newline rbitfld.long 0x00 1. "CF31,Cancellation Finished" "0,1" rbitfld.long 0x00 0. "CF31,Cancellation Finished" "0,1" group.long ad:0xD00000E0++0x03 line.long 0x00 "TXBTIE0,Tx Buffer Transmission Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "TIE31,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 30. "TIE30,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 29. "TIE29,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 28. "TIE28,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 27. "TIE27,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "TIE26,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 25. "TIE25,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 24. "TIE24,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 23. "TIE23,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 22. "TIE22,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "TIE21,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 20. "TIE20,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 19. "TIE19,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 18. "TIE18,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 17. "TIE17,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "TIE16,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 15. "TIE15,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 14. "TIE14,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 13. "TIE13,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 12. "TIE12,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "TIE11,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 10. "TIE10,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 9. "TIE9,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 8. "TIE8,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 7. "TIE7,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "TIE6,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 5. "TIE5,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 4. "TIE4,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 3. "TIE3,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 2. "TIE2,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "TIE1,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 0. "TIE0,Transmission Interrupt Enable" "0,1" group.long ad:0xD00018E0++0x03 line.long 0x00 "TXBTIE1,Tx Buffer Transmission Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "TIE31,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 30. "TIE30,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 29. "TIE29,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 28. "TIE28,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 27. "TIE27,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "TIE26,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 25. "TIE25,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 24. "TIE24,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 23. "TIE23,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 22. "TIE22,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "TIE21,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 20. "TIE20,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 19. "TIE19,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 18. "TIE18,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 17. "TIE17,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "TIE16,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 15. "TIE15,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 14. "TIE14,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 13. "TIE13,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 12. "TIE12,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "TIE11,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 10. "TIE10,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 9. "TIE9,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 8. "TIE8,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 7. "TIE7,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "TIE6,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 5. "TIE5,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 4. "TIE4,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 3. "TIE3,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 2. "TIE2,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "TIE1,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 0. "TIE0,Transmission Interrupt Enable" "0,1" group.long ad:0xD00030E0++0x03 line.long 0x00 "TXBTIE2,Tx Buffer Transmission Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "TIE31,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 30. "TIE30,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 29. "TIE29,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 28. "TIE28,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 27. "TIE27,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "TIE26,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 25. "TIE25,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 24. "TIE24,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 23. "TIE23,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 22. "TIE22,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "TIE21,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 20. "TIE20,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 19. "TIE19,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 18. "TIE18,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 17. "TIE17,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "TIE16,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 15. "TIE15,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 14. "TIE14,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 13. "TIE13,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 12. "TIE12,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "TIE11,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 10. "TIE10,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 9. "TIE9,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 8. "TIE8,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 7. "TIE7,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "TIE6,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 5. "TIE5,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 4. "TIE4,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 3. "TIE3,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 2. "TIE2,Transmission Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "TIE1,Transmission Interrupt Enable" "0,1" bitfld.long 0x00 0. "TIE0,Transmission Interrupt Enable" "0,1" group.long ad:0xD00000E4++0x03 line.long 0x00 "TXBCIE0,Tx Buffer Cancellation Finished Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "CFIE31,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 30. "CFIE30,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 29. "CFIE29,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 28. "CFIE28,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 27. "CFIE27,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "CFIE26,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 25. "CFIE25,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 24. "CFIE24,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 23. "CFIE23,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 22. "CFIE22,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "CFIE21,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 20. "CFIE20,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 19. "CFIE19,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 18. "CFIE18,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 17. "CFIE17,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "CFIE16,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 15. "CFIE15,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 14. "CFIE14,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 13. "CFIE13,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 12. "CFIE12,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "CFIE11,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 10. "CFIE10,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 9. "CFIE9,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 8. "CFIE8,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 7. "CFIE7,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "CFIE6,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 5. "CFIE5,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 4. "CFIE4,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 3. "CFIE3,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 2. "CFIE2,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "CFIE1,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 0. "CFIE0,Cancellation Finished Interrupt Enable" "0,1" group.long ad:0xD00018E4++0x03 line.long 0x00 "TXBCIE1,Tx Buffer Cancellation Finished Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "CFIE31,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 30. "CFIE30,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 29. "CFIE29,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 28. "CFIE28,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 27. "CFIE27,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "CFIE26,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 25. "CFIE25,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 24. "CFIE24,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 23. "CFIE23,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 22. "CFIE22,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "CFIE21,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 20. "CFIE20,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 19. "CFIE19,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 18. "CFIE18,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 17. "CFIE17,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "CFIE16,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 15. "CFIE15,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 14. "CFIE14,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 13. "CFIE13,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 12. "CFIE12,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "CFIE11,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 10. "CFIE10,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 9. "CFIE9,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 8. "CFIE8,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 7. "CFIE7,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "CFIE6,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 5. "CFIE5,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 4. "CFIE4,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 3. "CFIE3,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 2. "CFIE2,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "CFIE1,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 0. "CFIE0,Cancellation Finished Interrupt Enable" "0,1" group.long ad:0xD00030E4++0x03 line.long 0x00 "TXBCIE2,Tx Buffer Cancellation Finished Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 31. "CFIE31,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 30. "CFIE30,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 29. "CFIE29,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 28. "CFIE28,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 27. "CFIE27,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 26. "CFIE26,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 25. "CFIE25,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 24. "CFIE24,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 23. "CFIE23,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 22. "CFIE22,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 21. "CFIE21,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 20. "CFIE20,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 19. "CFIE19,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 18. "CFIE18,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 17. "CFIE17,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 16. "CFIE16,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 15. "CFIE15,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 14. "CFIE14,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 13. "CFIE13,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 12. "CFIE12,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 11. "CFIE11,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 10. "CFIE10,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 9. "CFIE9,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 8. "CFIE8,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 7. "CFIE7,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 6. "CFIE6,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 5. "CFIE5,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 4. "CFIE4,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 3. "CFIE3,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 2. "CFIE2,Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 1. "CFIE1,Cancellation Finished Interrupt Enable" "0,1" bitfld.long 0x00 0. "CFIE0,Cancellation Finished Interrupt Enable" "0,1" group.long ad:0xD00000F0++0x03 line.long 0x00 "TXEFC0,Tx Event FIFO Configuration Register i (i=0~2)" hexmask.long.byte 0x00 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x00 16.--21. 1. "EFS,Event FIFO Size" hexmask.long.word 0x00 2.--15. 1. "EFSA,Event FIFO Start Address" group.long ad:0xD00018F0++0x03 line.long 0x00 "TXEFC1,Tx Event FIFO Configuration Register i (i=0~2)" hexmask.long.byte 0x00 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x00 16.--21. 1. "EFS,Event FIFO Size" hexmask.long.word 0x00 2.--15. 1. "EFSA,Event FIFO Start Address" group.long ad:0xD00030F0++0x03 line.long 0x00 "TXEFC2,Tx Event FIFO Configuration Register i (i=0~2)" hexmask.long.byte 0x00 24.--29. 1. "EFWM,Event FIFO Watermark" hexmask.long.byte 0x00 16.--21. 1. "EFS,Event FIFO Size" hexmask.long.word 0x00 2.--15. 1. "EFSA,Event FIFO Start Address" rgroup.long ad:0xD00000F4++0x03 line.long 0x00 "TXEFS0,Tx Event FIFO Status Register i (i=0~2)" bitfld.long 0x00 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x00 24. "EFF,Event FIFO Full" "0,1" bitfld.long 0x00 16.--20. "EFPI,Event FIFO Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "EFGI,Event FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "EFFL,Rx FIFO 1 Fill Level" rgroup.long ad:0xD00018F4++0x03 line.long 0x00 "TXEFS1,Tx Event FIFO Status Register i (i=0~2)" bitfld.long 0x00 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x00 24. "EFF,Event FIFO Full" "0,1" bitfld.long 0x00 16.--20. "EFPI,Event FIFO Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "EFGI,Event FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "EFFL,Rx FIFO 1 Fill Level" rgroup.long ad:0xD00030F4++0x03 line.long 0x00 "TXEFS2,Tx Event FIFO Status Register i (i=0~2)" bitfld.long 0x00 25. "TEFL,Tx Event FIFO Element Lost" "0,1" bitfld.long 0x00 24. "EFF,Event FIFO Full" "0,1" bitfld.long 0x00 16.--20. "EFPI,Event FIFO Put Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--12. "EFGI,Event FIFO Get Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x00 0.--5. 1. "EFFL,Rx FIFO 1 Fill Level" group.long ad:0xD00000F8++0x03 line.long 0x00 "TXEFA0,Tx Event FIFO Acknowledge Register i (i=0~2)" bitfld.long 0x00 0.--4. "EFAI,Event FIFO Acknowledge Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD00018F8++0x03 line.long 0x00 "TXEFA1,Tx Event FIFO Acknowledge Register i (i=0~2)" bitfld.long 0x00 0.--4. "EFAI,Event FIFO Acknowledge Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD00030F8++0x03 line.long 0x00 "TXEFA2,Tx Event FIFO Acknowledge Register i (i=0~2)" bitfld.long 0x00 0.--4. "EFAI,Event FIFO Acknowledge Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long ad:0xD0000100++0x03 line.long 0x00 "TTTMC,TT Trigger Memory Configuration Register" hexmask.long.byte 0x00 16.--22. 1. "TME,Trigger Memory Elements" hexmask.long.word 0x00 2.--15. 1. "TMSA,Trigger Memory Start Address" group.long ad:0xD0000104++0x27 line.long 0x00 "TTRMC,TT Reference Message Configuration Register" bitfld.long 0x00 31. "RMPS,Reference Message Payload Select" "0,1" bitfld.long 0x00 30. "XTD,Extended Identifier" "0,1" hexmask.long 0x00 0.--28. 1. "RID,Reference Identifier" line.long 0x04 "TTOCF,TT Operation Configuration Register" bitfld.long 0x04 26. "EVTP,Event Trigger Polarity" "0,1" bitfld.long 0x04 25. "ECC,Enable Clock Calibration" "0,1" bitfld.long 0x04 24. "EGTF,Enable Global Time Filtering" "0,1" hexmask.long.byte 0x04 16.--23. 1. "AWL,Application Watchdog Limit" bitfld.long 0x04 15. "EECS,Enable External Clock Synchronization" "0,1" newline hexmask.long.byte 0x04 8.--14. 1. "IRTO,Initial Reference Trigger Offset" bitfld.long 0x04 5.--7. "LDSDL,LD of Synchronization Deviation Limit" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4. "TM,Time Master" "0,1" bitfld.long 0x04 3. "GEN,Gap Enable" "0,1" bitfld.long 0x04 0.--1. "OM,Operation Mode" "0,1,2,3" line.long 0x08 "TTMLM,TT Matrix Limits Register" hexmask.long.word 0x08 16.--27. 1. "ENTT,Expected Number of Tx Triggers" bitfld.long 0x08 8.--11. "TXEW,Tx Enable Window" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 6.--7. "CSS,Cycle Start Synchronization" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "CCM,Cycle Count Max" line.long 0x0C "TURCF,TUR Configuration Register" bitfld.long 0x0C 31. "ELT,Enable Local Time" "0,1" hexmask.long.word 0x0C 16.--29. 1. "DC,Denominator Configuration" hexmask.long.word 0x0C 0.--15. 1. "NCL,Numerator Configuration Low" line.long 0x10 "TTOCN,TT Operation Control Register" bitfld.long 0x10 15. "LCKC,TT Operation Control Register Locked" "0,1" bitfld.long 0x10 13. "ESCN,External Synchronization Control" "0,1" bitfld.long 0x10 12. "NIG,Next is Gap" "0,1" bitfld.long 0x10 11. "TMG,Time Mark Gap" "0,1" bitfld.long 0x10 10. "FGP,Finish Gap" "0,1" newline bitfld.long 0x10 9. "GCS,Gap Control Select" "0,1" bitfld.long 0x10 8. "TTIE,Trigger Time Mark Interrupt Pulse Enable" "0,1" bitfld.long 0x10 6.--7. "TMC,Register Time Mark Compare" "0,1,2,3" bitfld.long 0x10 5. "RTIE,Register Time Mark Interrupt Pulse Enable" "0,1" bitfld.long 0x10 3.--4. "SWS,Stop Watch Source" "0,1,2,3" newline bitfld.long 0x10 2. "SWP,Stop Watch Polarity" "0,1" bitfld.long 0x10 1. "ECS,External Clock Synchronization" "0,1" bitfld.long 0x10 0. "SGT,Set Global time" "0,1" line.long 0x14 "TTGTP,TT Global Time Preset Register" hexmask.long.word 0x14 16.--31. 1. "CTP,Cycle Time Target Phase" hexmask.long.word 0x14 0.--15. 1. "TP,Time Preset" line.long 0x18 "TTTMK,TT Time Mark Register" rbitfld.long 0x18 31. "LCKM,TT Time Mark Register Locked" "0,1" hexmask.long.byte 0x18 16.--22. 1. "TICC,Time Mark Cycle Code" hexmask.long.word 0x18 0.--15. 1. "TM,Time Mark" line.long 0x1C "TTIR,TT Interrupt Register" bitfld.long 0x1C 18. "CER,Configuration Error" "0,1" bitfld.long 0x1C 17. "AW,Application Watchdog" "0,1" bitfld.long 0x1C 16. "WT,Watch Trigger" "0,1" bitfld.long 0x1C 15. "IWT,Initialization Watch Trigger" "0,1" bitfld.long 0x1C 14. "ELC,Error Level Changed" "0,1" newline bitfld.long 0x1C 13. "SE2,Scheduling Error 2" "0,1" bitfld.long 0x1C 12. "SE1,Scheduling Error 1" "0,1" bitfld.long 0x1C 11. "TXO,Tx Count Overflow" "0,1" bitfld.long 0x1C 10. "TXU,Tx Count Underflow" "0,1" bitfld.long 0x1C 9. "GTE,Global Time Error" "0,1" newline bitfld.long 0x1C 8. "GTD,Global Time Discontinuity" "0,1" bitfld.long 0x1C 7. "GTW,Global Time Wrap" "0,1" bitfld.long 0x1C 6. "SWE,Stop Watch Event" "0,1" bitfld.long 0x1C 5. "TTMI,Trigger Time Mark Event Internal" "0,1" bitfld.long 0x1C 4. "RTMI,Register Time Mark Interrupt" "0,1" newline bitfld.long 0x1C 3. "SOG,Start of Gap" "0,1" bitfld.long 0x1C 2. "CSM,Change of Synchronization Mode" "0,1" bitfld.long 0x1C 1. "SMC,Start of Matrix Cycle" "0,1" bitfld.long 0x1C 0. "SBC,Start of Basic Cycle" "0,1" line.long 0x20 "TTIE,TT Interrupt Enable Register" bitfld.long 0x20 18. "CERE,Configuration Error Enable" "0,1" bitfld.long 0x20 17. "AWE,Application Watchdog Enable" "0,1" bitfld.long 0x20 16. "WTE,Watch Trigger Enable" "0,1" bitfld.long 0x20 15. "IWTE,Initialization Watch Trigger Enable" "0,1" bitfld.long 0x20 14. "ELCE,Error Level Changed Enable" "0,1" newline bitfld.long 0x20 13. "SE2E,Scheduling Error 2 Enable" "0,1" bitfld.long 0x20 12. "SE1E,Scheduling Error 1 Enable" "0,1" bitfld.long 0x20 11. "TXOE,Tx Count Overflow Enable" "0,1" bitfld.long 0x20 10. "TXUE,Tx Count Underflow Enable" "0,1" bitfld.long 0x20 9. "GTEE,Global Time Error Enable" "0,1" newline bitfld.long 0x20 8. "GTDE,Global Time Discontinuity Enable" "0,1" bitfld.long 0x20 7. "GTWE,Global Time Wrap Enable" "0,1" bitfld.long 0x20 6. "SWEE,Stop Watch Event Enable" "0,1" bitfld.long 0x20 5. "TTMIE,Trigger Time Mark Event Internal Enable" "0,1" bitfld.long 0x20 4. "RTMIE,Register Time Mark Interrupt Enable" "0,1" newline bitfld.long 0x20 3. "SOGE,Start of Gap Enable" "0,1" bitfld.long 0x20 2. "CSME,Change of Synchronization Mode Enable" "0,1" bitfld.long 0x20 1. "SMCE,Start of Matrix Cycle Enable" "0,1" bitfld.long 0x20 0. "SBCE,Start of Basic Cycle Enable" "0,1" line.long 0x24 "TTILS,TT Interrupt Line Select Register" bitfld.long 0x24 18. "CERL,Configuration Error Line" "0,1" bitfld.long 0x24 17. "AWL,Application Watchdog Line" "0,1" bitfld.long 0x24 16. "WTL,Watch Trigger Line" "0,1" bitfld.long 0x24 15. "IWTL,Initialization Watch Trigger Line" "0,1" bitfld.long 0x24 14. "ELCL,Error Level Changed Line" "0,1" newline bitfld.long 0x24 13. "SE2L,Scheduling Error 2 Line" "0,1" bitfld.long 0x24 12. "SE1L,Scheduling Error 1 Line" "0,1" bitfld.long 0x24 11. "TXOL,Tx Count Overflow Line" "0,1" bitfld.long 0x24 10. "TXUL,Tx Count Underflow Line" "0,1" bitfld.long 0x24 9. "GTEL,Global Time Error Line" "0,1" newline bitfld.long 0x24 8. "GTDL,Global Time Discontinuity Line" "0,1" bitfld.long 0x24 7. "GTWL,Global Time Wrap Line" "0,1" bitfld.long 0x24 6. "SWEL,Stop Watch Event Line" "0,1" bitfld.long 0x24 5. "TTMIL,Trigger Time Mark Event Internal Line" "0,1" bitfld.long 0x24 4. "RTMIL,Register Time Mark Interrupt Line" "0,1" newline bitfld.long 0x24 3. "SOGL,Start of Gap Line" "0,1" bitfld.long 0x24 2. "CSML,Change of Synchronization Mode Line" "0,1" bitfld.long 0x24 1. "SMCL,Start of Matrix Cycle Line" "0,1" bitfld.long 0x24 0. "SBCL,Start of Basic Cycle Line" "0,1" rgroup.long ad:0xD000012C++0x17 line.long 0x00 "TTOST,TT Operation Status Register" bitfld.long 0x00 31. "SPL,Schedule Phase Lock" "0,1" bitfld.long 0x00 30. "WECS,Wait for External Clock Synchronization" "0,1" bitfld.long 0x00 29. "AWE,Application Watchdog Event" "0,1" bitfld.long 0x00 28. "WFE,Wait for Event" "0,1" bitfld.long 0x00 27. "GSI,Gap Started Indicator" "0,1" newline bitfld.long 0x00 24.--26. "TMP,Time Master Priority" "0,1,2,3,4,5,6,7" bitfld.long 0x00 23. "GFI,Gap Finished Indicator" "0,1" bitfld.long 0x00 22. "WGTD,Wait for Global Time Discontinuity" "0,1" hexmask.long.byte 0x00 8.--15. 1. "RTO,Reference Trigger Offset" bitfld.long 0x00 7. "QCS,Quality of Clock Speed" "0,1" newline bitfld.long 0x00 6. "QGTP,Quality of Global Time Phase" "0,1" bitfld.long 0x00 4.--5. "SYS,Synchronization State" "0,1,2,3" bitfld.long 0x00 2.--3. "MS,Master State" "0,1,2,3" bitfld.long 0x00 0.--1. "EL,Error Level" "0,1,2,3" line.long 0x04 "TURNA,TUR Numerator Actual Register" hexmask.long.tbyte 0x04 0.--17. 1. "LT,Numerator Actual Value" line.long 0x08 "TTLGT,TT Local & Global Time Register" hexmask.long.word 0x08 16.--31. 1. "GT,Global Time" hexmask.long.word 0x08 0.--15. 1. "LT,Local Time" line.long 0x0C "TTCTC,TT Cycle Time & Count Register" hexmask.long.byte 0x0C 16.--21. 1. "CC,Cycle Count" hexmask.long.word 0x0C 0.--15. 1. "CT,Cycle Time" line.long 0x10 "TTCPT,TT Capture Time Register" hexmask.long.word 0x10 16.--31. 1. "SWV,Stop Watch Value" hexmask.long.byte 0x10 0.--5. 1. "CCV,Cycle Count Value" line.long 0x14 "TTCSM,TT Cycle Sync Mark Register" hexmask.long.word 0x14 0.--15. 1. "CSM,Cycle Sync Mark" rgroup.long ad:0xD00003C0++0x03 line.long 0x00 "DMUCR0,DMU Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Day" rgroup.long ad:0xD0001BC0++0x03 line.long 0x00 "DMUCR1,DMU Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Day" rgroup.long ad:0xD00033C0++0x03 line.long 0x00 "DMUCR2,DMU Core Release Register i (i=0~2)" bitfld.long 0x00 28.--31. "REL,Release" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "STEP,Step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SUBSTEP,Sub-step" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "YEAR,Year" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 8.--15. 1. "MON,Month" newline hexmask.long.byte 0x00 0.--7. 1. "DAY,Day" group.long ad:0xD00003C4++0x03 line.long 0x00 "DMUI0,DMU Internals Register i (i=0~2)" rbitfld.long 0x00 31. "TXE,Actual DMU Element Service" "0,1" rbitfld.long 0x00 30. "RX1,Actual DMU Element Service" "0,1" rbitfld.long 0x00 29. "RX0,Actual DMU Element Service" "0,1" rbitfld.long 0x00 28. "TX,Actual DMU Element Service" "0,1" rbitfld.long 0x00 24.--26. "EHS,Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 23. "DTXE,Detect DMU Element Service" "0,1" rbitfld.long 0x00 22. "DRX1,Detect DMU Element Service" "0,1" rbitfld.long 0x00 21. "DRX0,Detect DMU Element Service" "0,1" rbitfld.long 0x00 20. "DTX,Detect DMU Element Service" "0,1" bitfld.long 0x00 16.--18. "DEHS,Detect Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 15. "ENA,DMU is enabled" "0,1" rbitfld.long 0x00 8.--12. "TFQPIP,TX FIFO/Queue Put Index Previous" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 3. "TXER,TX Event Service Request line of DMU" "0,1" rbitfld.long 0x00 2. "RX1R,RX1 Service Request line of DMU" "0,1" rbitfld.long 0x00 1. "RX0R,RX0 Service Request line of DMU" "0,1" newline rbitfld.long 0x00 0. "ND0,TX Service Request line of DMU" "0,1" group.long ad:0xD0001BC4++0x03 line.long 0x00 "DMUI1,DMU Internals Register i (i=0~2)" rbitfld.long 0x00 31. "TXE,Actual DMU Element Service" "0,1" rbitfld.long 0x00 30. "RX1,Actual DMU Element Service" "0,1" rbitfld.long 0x00 29. "RX0,Actual DMU Element Service" "0,1" rbitfld.long 0x00 28. "TX,Actual DMU Element Service" "0,1" rbitfld.long 0x00 24.--26. "EHS,Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 23. "DTXE,Detect DMU Element Service" "0,1" rbitfld.long 0x00 22. "DRX1,Detect DMU Element Service" "0,1" rbitfld.long 0x00 21. "DRX0,Detect DMU Element Service" "0,1" rbitfld.long 0x00 20. "DTX,Detect DMU Element Service" "0,1" bitfld.long 0x00 16.--18. "DEHS,Detect Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 15. "ENA,DMU is enabled" "0,1" rbitfld.long 0x00 8.--12. "TFQPIP,TX FIFO/Queue Put Index Previous" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 3. "TXER,TX Event Service Request line of DMU" "0,1" rbitfld.long 0x00 2. "RX1R,RX1 Service Request line of DMU" "0,1" rbitfld.long 0x00 1. "RX0R,RX0 Service Request line of DMU" "0,1" newline rbitfld.long 0x00 0. "ND0,TX Service Request line of DMU" "0,1" group.long ad:0xD00033C4++0x03 line.long 0x00 "DMUI2,DMU Internals Register i (i=0~2)" rbitfld.long 0x00 31. "TXE,Actual DMU Element Service" "0,1" rbitfld.long 0x00 30. "RX1,Actual DMU Element Service" "0,1" rbitfld.long 0x00 29. "RX0,Actual DMU Element Service" "0,1" rbitfld.long 0x00 28. "TX,Actual DMU Element Service" "0,1" rbitfld.long 0x00 24.--26. "EHS,Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 23. "DTXE,Detect DMU Element Service" "0,1" rbitfld.long 0x00 22. "DRX1,Detect DMU Element Service" "0,1" rbitfld.long 0x00 21. "DRX0,Detect DMU Element Service" "0,1" rbitfld.long 0x00 20. "DTX,Detect DMU Element Service" "0,1" bitfld.long 0x00 16.--18. "DEHS,Detect Element Handler State" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 15. "ENA,DMU is enabled" "0,1" rbitfld.long 0x00 8.--12. "TFQPIP,TX FIFO/Queue Put Index Previous" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x00 3. "TXER,TX Event Service Request line of DMU" "0,1" rbitfld.long 0x00 2. "RX1R,RX1 Service Request line of DMU" "0,1" rbitfld.long 0x00 1. "RX0R,RX0 Service Request line of DMU" "0,1" newline rbitfld.long 0x00 0. "ND0,TX Service Request line of DMU" "0,1" rgroup.long ad:0xD00003C8++0x03 line.long 0x00 "DMUQC0,DMU Queueing Counter Register i (i=0~2)" hexmask.long.byte 0x00 24.--31. 1. "TXEEDC,TX Event Element Dequeueing Counter" hexmask.long.byte 0x00 16.--23. 1. "RX1EDC,RX1 Element Dequeueing Counter" hexmask.long.byte 0x00 8.--15. 1. "RX0EDC,RX0 Element Dequeueing Counter" hexmask.long.byte 0x00 0.--7. 1. "TXEEC,TX Element Enqueueing Counter" rgroup.long ad:0xD0001BC8++0x03 line.long 0x00 "DMUQC1,DMU Queueing Counter Register i (i=0~2)" hexmask.long.byte 0x00 24.--31. 1. "TXEEDC,TX Event Element Dequeueing Counter" hexmask.long.byte 0x00 16.--23. 1. "RX1EDC,RX1 Element Dequeueing Counter" hexmask.long.byte 0x00 8.--15. 1. "RX0EDC,RX0 Element Dequeueing Counter" hexmask.long.byte 0x00 0.--7. 1. "TXEEC,TX Element Enqueueing Counter" rgroup.long ad:0xD00033C8++0x03 line.long 0x00 "DMUQC2,DMU Queueing Counter Register i (i=0~2)" hexmask.long.byte 0x00 24.--31. 1. "TXEEDC,TX Event Element Dequeueing Counter" hexmask.long.byte 0x00 16.--23. 1. "RX1EDC,RX1 Element Dequeueing Counter" hexmask.long.byte 0x00 8.--15. 1. "RX0EDC,RX0 Element Dequeueing Counter" hexmask.long.byte 0x00 0.--7. 1. "TXEEC,TX Element Enqueueing Counter" rgroup.long ad:0xD00003CC++0x03 line.long 0x00 "DMUIR0,DMU Interrupt Register i (i=0~2)" bitfld.long 0x00 30. "IAC,Illegal Access while in Configuration mode" "0,1" bitfld.long 0x00 29. "DT,Debug Trigger" "0,1" bitfld.long 0x00 28. "TXEED,TX Event Element Dequeued" "0,1" bitfld.long 0x00 27. "TXEEIW,TX Event Element Illegal" "0,1" bitfld.long 0x00 26. "TXEEIAS,TX Event Element Illegal Access Sequence" "0,1" newline bitfld.long 0x00 25. "TXEEID,TX Event Element Illegal Dequeueing" "0,1" bitfld.long 0x00 24. "TXEENSA,TX Event Element Not Start Address" "0,1" bitfld.long 0x00 21. "RX1EIO,RX1 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 20. "RX1ED,RX1 Element Dequeued" "0,1" bitfld.long 0x00 19. "RX1EIW,RX1 Element Illegal" "0,1" newline bitfld.long 0x00 18. "RX1EIAS,RX1 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 17. "RX1EID,RX1 Element Illegal Dequeueing" "0,1" bitfld.long 0x00 16. "RX1ENSA,RX1 Element Not Start Address" "0,1" bitfld.long 0x00 15. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 14. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 13. "RX0EIO,RX0 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 12. "RX0ED,RX0 Element Dequeued" "0,1" bitfld.long 0x00 11. "RX0EIW,RX0 Element Illegal" "0,1" bitfld.long 0x00 10. "RX0EIAS,RX0 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 9. "RX0EID,RX0 Element Illegal Dequeueing" "0,1" newline bitfld.long 0x00 8. "RX0ENSA,RX0 Element Not Start Address" "0,1" bitfld.long 0x00 6. "TXEE,TX Element Enqueued" "0,1" bitfld.long 0x00 5. "TXEIR,TX Element Illegal" "0,1" bitfld.long 0x00 4. "TXEWATA,TX Element Write After Trigger Address" "0,1" bitfld.long 0x00 3. "TXEIDLC,TX Element Illegal DLC" "0,1" newline bitfld.long 0x00 2. "TXEIAS,TX Element Illegal Access Sequence" "0,1" bitfld.long 0x00 1. "TXEIE,TX Element Illegal Enqueueing" "0,1" bitfld.long 0x00 0. "TXENSA,TX Element Not Start Address" "0,1" rgroup.long ad:0xD0001BCC++0x03 line.long 0x00 "DMUIR1,DMU Interrupt Register i (i=0~2)" bitfld.long 0x00 30. "IAC,Illegal Access while in Configuration mode" "0,1" bitfld.long 0x00 29. "DT,Debug Trigger" "0,1" bitfld.long 0x00 28. "TXEED,TX Event Element Dequeued" "0,1" bitfld.long 0x00 27. "TXEEIW,TX Event Element Illegal" "0,1" bitfld.long 0x00 26. "TXEEIAS,TX Event Element Illegal Access Sequence" "0,1" newline bitfld.long 0x00 25. "TXEEID,TX Event Element Illegal Dequeueing" "0,1" bitfld.long 0x00 24. "TXEENSA,TX Event Element Not Start Address" "0,1" bitfld.long 0x00 21. "RX1EIO,RX1 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 20. "RX1ED,RX1 Element Dequeued" "0,1" bitfld.long 0x00 19. "RX1EIW,RX1 Element Illegal" "0,1" newline bitfld.long 0x00 18. "RX1EIAS,RX1 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 17. "RX1EID,RX1 Element Illegal Dequeueing" "0,1" bitfld.long 0x00 16. "RX1ENSA,RX1 Element Not Start Address" "0,1" bitfld.long 0x00 15. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 14. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 13. "RX0EIO,RX0 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 12. "RX0ED,RX0 Element Dequeued" "0,1" bitfld.long 0x00 11. "RX0EIW,RX0 Element Illegal" "0,1" bitfld.long 0x00 10. "RX0EIAS,RX0 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 9. "RX0EID,RX0 Element Illegal Dequeueing" "0,1" newline bitfld.long 0x00 8. "RX0ENSA,RX0 Element Not Start Address" "0,1" bitfld.long 0x00 6. "TXEE,TX Element Enqueued" "0,1" bitfld.long 0x00 5. "TXEIR,TX Element Illegal" "0,1" bitfld.long 0x00 4. "TXEWATA,TX Element Write After Trigger Address" "0,1" bitfld.long 0x00 3. "TXEIDLC,TX Element Illegal DLC" "0,1" newline bitfld.long 0x00 2. "TXEIAS,TX Element Illegal Access Sequence" "0,1" bitfld.long 0x00 1. "TXEIE,TX Element Illegal Enqueueing" "0,1" bitfld.long 0x00 0. "TXENSA,TX Element Not Start Address" "0,1" rgroup.long ad:0xD00033CC++0x03 line.long 0x00 "DMUIR2,DMU Interrupt Register i (i=0~2)" bitfld.long 0x00 30. "IAC,Illegal Access while in Configuration mode" "0,1" bitfld.long 0x00 29. "DT,Debug Trigger" "0,1" bitfld.long 0x00 28. "TXEED,TX Event Element Dequeued" "0,1" bitfld.long 0x00 27. "TXEEIW,TX Event Element Illegal" "0,1" bitfld.long 0x00 26. "TXEEIAS,TX Event Element Illegal Access Sequence" "0,1" newline bitfld.long 0x00 25. "TXEEID,TX Event Element Illegal Dequeueing" "0,1" bitfld.long 0x00 24. "TXEENSA,TX Event Element Not Start Address" "0,1" bitfld.long 0x00 21. "RX1EIO,RX1 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 20. "RX1ED,RX1 Element Dequeued" "0,1" bitfld.long 0x00 19. "RX1EIW,RX1 Element Illegal" "0,1" newline bitfld.long 0x00 18. "RX1EIAS,RX1 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 17. "RX1EID,RX1 Element Illegal Dequeueing" "0,1" bitfld.long 0x00 16. "RX1ENSA,RX1 Element Not Start Address" "0,1" bitfld.long 0x00 15. "BEU,Bit Error Uncorrected" "0,1" bitfld.long 0x00 14. "BEC,Bit Error Corrected" "0,1" newline bitfld.long 0x00 13. "RX0EIO,RX0 Element Illegal Overwrite by timestamp" "0,1" bitfld.long 0x00 12. "RX0ED,RX0 Element Dequeued" "0,1" bitfld.long 0x00 11. "RX0EIW,RX0 Element Illegal" "0,1" bitfld.long 0x00 10. "RX0EIAS,RX0 Element Illegal Access Sequence" "0,1" bitfld.long 0x00 9. "RX0EID,RX0 Element Illegal Dequeueing" "0,1" newline bitfld.long 0x00 8. "RX0ENSA,RX0 Element Not Start Address" "0,1" bitfld.long 0x00 6. "TXEE,TX Element Enqueued" "0,1" bitfld.long 0x00 5. "TXEIR,TX Element Illegal" "0,1" bitfld.long 0x00 4. "TXEWATA,TX Element Write After Trigger Address" "0,1" bitfld.long 0x00 3. "TXEIDLC,TX Element Illegal DLC" "0,1" newline bitfld.long 0x00 2. "TXEIAS,TX Element Illegal Access Sequence" "0,1" bitfld.long 0x00 1. "TXEIE,TX Element Illegal Enqueueing" "0,1" bitfld.long 0x00 0. "TXENSA,TX Element Not Start Address" "0,1" group.long ad:0xD00003D0++0x03 line.long 0x00 "DMUIE0,DMU Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 30. "IACE,Illegal Access while in Configuration mode Enable" "0,1" bitfld.long 0x00 29. "DTE,Debug Trigger Enable" "0,1" bitfld.long 0x00 28. "TXEEDE,TX Event Element Dequeued Enable" "0,1" bitfld.long 0x00 27. "TXEEIWE,TX Event Element Illegal Write Enable" "0,1" bitfld.long 0x00 26. "TXEEIASE,TX Event Element Illegal Access Sequence Enable" "0,1" newline bitfld.long 0x00 25. "TXEEIDE,TX Event Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 24. "TXEENSAE,TX Event Element Not Start Address Enable" "0,1" bitfld.long 0x00 21. "RX1EIOE,RX1 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 20. "RX1EDE,RX1 Element Dequeued Enable" "0,1" bitfld.long 0x00 19. "RX1EIWE,RX1 Element Illegal Write Enable" "0,1" newline bitfld.long 0x00 18. "RX1EIASE,RX1 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 17. "RX1EIDE,RX1 Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 16. "RX1ENSAE,RX1 Element Not Start Address Enable" "0,1" bitfld.long 0x00 15. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 14. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 13. "RX0EIOE,RX0 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 12. "RX0EDE,RX0 Element Dequeued Enable" "0,1" bitfld.long 0x00 11. "RX0EIWE,RX0 Element Illegal Write Enable" "0,1" bitfld.long 0x00 10. "RX0EIASE,RX0 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 9. "RX0EIDE,RX0 Element Illegal Dequeueing Enable" "0,1" newline bitfld.long 0x00 8. "RX0ENSAE,RX0 Element Not Start Address Enable" "0,1" bitfld.long 0x00 6. "TXEEE,TX Element Enqueued Enable" "0,1" bitfld.long 0x00 5. "TXEIRE,TX Element Illegal Read Enable" "0,1" bitfld.long 0x00 4. "TXEWATAE,TX Element Write After Trigger Address Enable" "0,1" bitfld.long 0x00 3. "TXEIDLCE,TX Element Illegal DLC Enable" "0,1" newline bitfld.long 0x00 2. "TXEIASE,TX Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 1. "TXEIEE,TX Element Illegal Enqueueing Enable" "0,1" bitfld.long 0x00 0. "TXENSAE,TX Element Not Start Address Enable" "0,1" group.long ad:0xD0001BD0++0x03 line.long 0x00 "DMUIE1,DMU Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 30. "IACE,Illegal Access while in Configuration mode Enable" "0,1" bitfld.long 0x00 29. "DTE,Debug Trigger Enable" "0,1" bitfld.long 0x00 28. "TXEEDE,TX Event Element Dequeued Enable" "0,1" bitfld.long 0x00 27. "TXEEIWE,TX Event Element Illegal Write Enable" "0,1" bitfld.long 0x00 26. "TXEEIASE,TX Event Element Illegal Access Sequence Enable" "0,1" newline bitfld.long 0x00 25. "TXEEIDE,TX Event Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 24. "TXEENSAE,TX Event Element Not Start Address Enable" "0,1" bitfld.long 0x00 21. "RX1EIOE,RX1 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 20. "RX1EDE,RX1 Element Dequeued Enable" "0,1" bitfld.long 0x00 19. "RX1EIWE,RX1 Element Illegal Write Enable" "0,1" newline bitfld.long 0x00 18. "RX1EIASE,RX1 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 17. "RX1EIDE,RX1 Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 16. "RX1ENSAE,RX1 Element Not Start Address Enable" "0,1" bitfld.long 0x00 15. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 14. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 13. "RX0EIOE,RX0 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 12. "RX0EDE,RX0 Element Dequeued Enable" "0,1" bitfld.long 0x00 11. "RX0EIWE,RX0 Element Illegal Write Enable" "0,1" bitfld.long 0x00 10. "RX0EIASE,RX0 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 9. "RX0EIDE,RX0 Element Illegal Dequeueing Enable" "0,1" newline bitfld.long 0x00 8. "RX0ENSAE,RX0 Element Not Start Address Enable" "0,1" bitfld.long 0x00 6. "TXEEE,TX Element Enqueued Enable" "0,1" bitfld.long 0x00 5. "TXEIRE,TX Element Illegal Read Enable" "0,1" bitfld.long 0x00 4. "TXEWATAE,TX Element Write After Trigger Address Enable" "0,1" bitfld.long 0x00 3. "TXEIDLCE,TX Element Illegal DLC Enable" "0,1" newline bitfld.long 0x00 2. "TXEIASE,TX Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 1. "TXEIEE,TX Element Illegal Enqueueing Enable" "0,1" bitfld.long 0x00 0. "TXENSAE,TX Element Not Start Address Enable" "0,1" group.long ad:0xD00033D0++0x03 line.long 0x00 "DMUIE2,DMU Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 30. "IACE,Illegal Access while in Configuration mode Enable" "0,1" bitfld.long 0x00 29. "DTE,Debug Trigger Enable" "0,1" bitfld.long 0x00 28. "TXEEDE,TX Event Element Dequeued Enable" "0,1" bitfld.long 0x00 27. "TXEEIWE,TX Event Element Illegal Write Enable" "0,1" bitfld.long 0x00 26. "TXEEIASE,TX Event Element Illegal Access Sequence Enable" "0,1" newline bitfld.long 0x00 25. "TXEEIDE,TX Event Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 24. "TXEENSAE,TX Event Element Not Start Address Enable" "0,1" bitfld.long 0x00 21. "RX1EIOE,RX1 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 20. "RX1EDE,RX1 Element Dequeued Enable" "0,1" bitfld.long 0x00 19. "RX1EIWE,RX1 Element Illegal Write Enable" "0,1" newline bitfld.long 0x00 18. "RX1EIASE,RX1 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 17. "RX1EIDE,RX1 Element Illegal Dequeueing Enable" "0,1" bitfld.long 0x00 16. "RX1ENSAE,RX1 Element Not Start Address Enable" "0,1" bitfld.long 0x00 15. "BEUE,Bit Error Uncorrected Enable" "0,1" bitfld.long 0x00 14. "BECE,Bit Error Corrected Enable" "0,1" newline bitfld.long 0x00 13. "RX0EIOE,RX0 Element Illegal Overwrite by timestamp Enable" "0,1" bitfld.long 0x00 12. "RX0EDE,RX0 Element Dequeued Enable" "0,1" bitfld.long 0x00 11. "RX0EIWE,RX0 Element Illegal Write Enable" "0,1" bitfld.long 0x00 10. "RX0EIASE,RX0 Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 9. "RX0EIDE,RX0 Element Illegal Dequeueing Enable" "0,1" newline bitfld.long 0x00 8. "RX0ENSAE,RX0 Element Not Start Address Enable" "0,1" bitfld.long 0x00 6. "TXEEE,TX Element Enqueued Enable" "0,1" bitfld.long 0x00 5. "TXEIRE,TX Element Illegal Read Enable" "0,1" bitfld.long 0x00 4. "TXEWATAE,TX Element Write After Trigger Address Enable" "0,1" bitfld.long 0x00 3. "TXEIDLCE,TX Element Illegal DLC Enable" "0,1" newline bitfld.long 0x00 2. "TXEIASE,TX Element Illegal Access Sequence Enable" "0,1" bitfld.long 0x00 1. "TXEIEE,TX Element Illegal Enqueueing Enable" "0,1" bitfld.long 0x00 0. "TXENSAE,TX Element Not Start Address Enable" "0,1" group.long ad:0xD00003D4++0x03 line.long 0x00 "DMUC0,DMU Configuration i (i=0~2)" group.long ad:0xD0001BD4++0x03 line.long 0x00 "DMUC1,DMU Configuration i (i=0~2)" group.long ad:0xD00033D4++0x03 line.long 0x00 "DMUC2,DMU Configuration i (i=0~2)" group.long ad:0xD0000804++0x03 line.long 0x00 "RIE0,Routing Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARARE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDRE,Protocol Error in Data Phase Enable" "0,1" bitfld.long 0x00 27. "PEARE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x00 26. "WDIRE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BORE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x00 24. "EWRE,Warning Status Interrupt Enable" "0,1" bitfld.long 0x00 23. "EPRE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x00 22. "ELORE,Error Logging Overflow Interrupt Enable" "0,1" bitfld.long 0x00 21. "BEURE,Bit Error Uncorrected Interrupt Enable" "0,1" bitfld.long 0x00 20. "BECRE,Bit Error Corrected Interrupt Enable" "0,1" newline bitfld.long 0x00 19. "DRXRE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x00 18. "TOORE,Timeout Occurred Interrupt Enable" "0,1" bitfld.long 0x00 17. "MRAFRE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x00 16. "TSWRE,Timestamp Wraparound Interrupt Enable" "0,1" bitfld.long 0x00 15. "TEFLRE,Tx Event FIFO Event Lost Interrupt Enable" "0,1" newline bitfld.long 0x00 14. "TEFFRE,Tx Event FIFO Full Interrupt Enable" "0,1" bitfld.long 0x00 13. "TEFWRE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 12. "TEFNRE,Tx Event FIDO New Entry Interrupt Enable" "0,1" bitfld.long 0x00 11. "TFERE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x00 10. "FCFRE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 9. "TCRE,Transmission Completed Interrupt Enable" "0,1" bitfld.long 0x00 8. "HPMRE,High Priority Message Interrupt Enable" "0,1" bitfld.long 0x00 7. "FR1LRE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 6. "RF1FRE,Rx FIFO 1 Full Interrupt Enable" "0,1" bitfld.long 0x00 5. "RF1WRE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" newline bitfld.long 0x00 4. "RF1NRE,Rx FIFO 1 New Message Interrupt Enable" "0,1" bitfld.long 0x00 3. "RF0LRE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 2. "RF0FRE,Rx FIFO 0 Full Interrupt Enable" "0,1" bitfld.long 0x00 1. "RF0WRE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 0. "RF0NRE,Rx FIFO 0 New Message Interrupt Enable" "0,1" group.long ad:0xD0002004++0x03 line.long 0x00 "RIE1,Routing Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARARE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDRE,Protocol Error in Data Phase Enable" "0,1" bitfld.long 0x00 27. "PEARE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x00 26. "WDIRE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BORE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x00 24. "EWRE,Warning Status Interrupt Enable" "0,1" bitfld.long 0x00 23. "EPRE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x00 22. "ELORE,Error Logging Overflow Interrupt Enable" "0,1" bitfld.long 0x00 21. "BEURE,Bit Error Uncorrected Interrupt Enable" "0,1" bitfld.long 0x00 20. "BECRE,Bit Error Corrected Interrupt Enable" "0,1" newline bitfld.long 0x00 19. "DRXRE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x00 18. "TOORE,Timeout Occurred Interrupt Enable" "0,1" bitfld.long 0x00 17. "MRAFRE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x00 16. "TSWRE,Timestamp Wraparound Interrupt Enable" "0,1" bitfld.long 0x00 15. "TEFLRE,Tx Event FIFO Event Lost Interrupt Enable" "0,1" newline bitfld.long 0x00 14. "TEFFRE,Tx Event FIFO Full Interrupt Enable" "0,1" bitfld.long 0x00 13. "TEFWRE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 12. "TEFNRE,Tx Event FIDO New Entry Interrupt Enable" "0,1" bitfld.long 0x00 11. "TFERE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x00 10. "FCFRE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 9. "TCRE,Transmission Completed Interrupt Enable" "0,1" bitfld.long 0x00 8. "HPMRE,High Priority Message Interrupt Enable" "0,1" bitfld.long 0x00 7. "FR1LRE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 6. "RF1FRE,Rx FIFO 1 Full Interrupt Enable" "0,1" bitfld.long 0x00 5. "RF1WRE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" newline bitfld.long 0x00 4. "RF1NRE,Rx FIFO 1 New Message Interrupt Enable" "0,1" bitfld.long 0x00 3. "RF0LRE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 2. "RF0FRE,Rx FIFO 0 Full Interrupt Enable" "0,1" bitfld.long 0x00 1. "RF0WRE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 0. "RF0NRE,Rx FIFO 0 New Message Interrupt Enable" "0,1" group.long ad:0xD0003804++0x03 line.long 0x00 "RIE2,Routing Interrupt Enable Register i (i=0~2)" bitfld.long 0x00 29. "ARARE,Access to Reserved Address Enable" "0,1" bitfld.long 0x00 28. "PEDRE,Protocol Error in Data Phase Enable" "0,1" bitfld.long 0x00 27. "PEARE,Protocol Error in Arbitration Phase Enable" "0,1" bitfld.long 0x00 26. "WDIRE,Watchdog Interrupt Enable" "0,1" bitfld.long 0x00 25. "BORE,Warning Status Interrupt Enable" "0,1" newline bitfld.long 0x00 24. "EWRE,Warning Status Interrupt Enable" "0,1" bitfld.long 0x00 23. "EPRE,Error Passive Interrupt Enable" "0,1" bitfld.long 0x00 22. "ELORE,Error Logging Overflow Interrupt Enable" "0,1" bitfld.long 0x00 21. "BEURE,Bit Error Uncorrected Interrupt Enable" "0,1" bitfld.long 0x00 20. "BECRE,Bit Error Corrected Interrupt Enable" "0,1" newline bitfld.long 0x00 19. "DRXRE,Message stored to Dedicated Rx Buffer Interrupt Enable" "0,1" bitfld.long 0x00 18. "TOORE,Timeout Occurred Interrupt Enable" "0,1" bitfld.long 0x00 17. "MRAFRE,Message RAM Access Failure Interrupt Enable" "0,1" bitfld.long 0x00 16. "TSWRE,Timestamp Wraparound Interrupt Enable" "0,1" bitfld.long 0x00 15. "TEFLRE,Tx Event FIFO Event Lost Interrupt Enable" "0,1" newline bitfld.long 0x00 14. "TEFFRE,Tx Event FIFO Full Interrupt Enable" "0,1" bitfld.long 0x00 13. "TEFWRE,Tx Event FIFO Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 12. "TEFNRE,Tx Event FIDO New Entry Interrupt Enable" "0,1" bitfld.long 0x00 11. "TFERE,Tx FIFO Empty Interrupt Enable" "0,1" bitfld.long 0x00 10. "FCFRE,Transmission Cancellation Finished Interrupt Enable" "0,1" newline bitfld.long 0x00 9. "TCRE,Transmission Completed Interrupt Enable" "0,1" bitfld.long 0x00 8. "HPMRE,High Priority Message Interrupt Enable" "0,1" bitfld.long 0x00 7. "FR1LRE,Rx FIFO 1 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 6. "RF1FRE,Rx FIFO 1 Full Interrupt Enable" "0,1" bitfld.long 0x00 5. "RF1WRE,Rx FIFO 1 Watermark Reached Interrupt Enable" "0,1" newline bitfld.long 0x00 4. "RF1NRE,Rx FIFO 1 New Message Interrupt Enable" "0,1" bitfld.long 0x00 3. "RF0LRE,Rx FIFO 0 Message Lost Interrupt Enable" "0,1" bitfld.long 0x00 2. "RF0FRE,Rx FIFO 0 Full Interrupt Enable" "0,1" bitfld.long 0x00 1. "RF0WRE,Rx FIFO 0 Watermark Reached Interrupt Enable" "0,1" bitfld.long 0x00 0. "RF0NRE,Rx FIFO 0 New Message Interrupt Enable" "0,1" group.long ad:0xD0000808++0x03 line.long 0x00 "RTTIE,Routing TT Interrupt Enable Register" bitfld.long 0x00 18. "CERRE,Configuration Error Interrupt Routing Enable" "0,1" bitfld.long 0x00 17. "AWRE,Application Watchdog Interrupt Routing Enable" "0,1" bitfld.long 0x00 16. "WTRE,Watch Trigger Interrupt Routing Enable" "0,1" bitfld.long 0x00 15. "IWTRE,Initialization Watch Trigger Interrupt Routing Enable" "0,1" bitfld.long 0x00 14. "ELCRE,Error Level Change Interrupt Routing Enable" "0,1" newline bitfld.long 0x00 13. "SE2RE,Scheduling Error 2 Interrupt Routing Enable" "0,1" bitfld.long 0x00 12. "SE1RE,Scheduling Error 1 Interrupt Routing Enable" "0,1" bitfld.long 0x00 11. "TXORE,Tx Count Overflow Interrupt Routing Enable" "0,1" bitfld.long 0x00 10. "TXURE,Tx Count Underflow Interrupt Routing Enable" "0,1" bitfld.long 0x00 9. "GTERE,Global Time Error Interrupt Routing Enable" "0,1" newline bitfld.long 0x00 8. "GTDRE,Global Time Discontinuity Interrupt Routing Enable" "0,1" bitfld.long 0x00 7. "GTWRE,Global Time Wrap Interrupt Routing Enable" "0,1" bitfld.long 0x00 6. "SWERE,Stop Watch Event interrupt routing enable" "0,1" bitfld.long 0x00 5. "TTMIRE,Trigger Time Mark Event Internal Interrupt Routing Enable" "0,1" bitfld.long 0x00 4. "RTMIRE,Register Time Mark Interrupt Routing Enable" "0,1" newline bitfld.long 0x00 3. "SOGRE,Start of Gap Interrupt Routing Enable" "0,1" bitfld.long 0x00 2. "CSMRE,Change of Synchronization Mode Interrupt Routing Enable" "0,1" bitfld.long 0x00 1. "SMCRE,Start of Matrix Cycle Interrupt Routing Enable" "0,1" bitfld.long 0x00 0. "SBCRE,Start of Basic Cycle Interrupt Routing Enable" "0,1" group.long ad:0xD0000810++0x03 line.long 0x00 "ISRG0,Interrupt Signal Routing Group Register i (i=0~2)" group.long ad:0xD0002010++0x03 line.long 0x00 "ISRG1,Interrupt Signal Routing Group Register i (i=0~2)" group.long ad:0xD0003810++0x03 line.long 0x00 "ISRG2,Interrupt Signal Routing Group Register i (i=0~2)" group.long ad:0xD0000814++0x03 line.long 0x00 "ISRGE0,Interrupt Signal Routing Group Enable Register i (i=0~2)" group.long ad:0xD0002014++0x03 line.long 0x00 "ISRGE1,Interrupt Signal Routing Group Enable Register i (i=0~2)" group.long ad:0xD0003814++0x03 line.long 0x00 "ISRGE2,Interrupt Signal Routing Group Enable Register i (i=0~2)" group.long ad:0xD0000818++0x03 line.long 0x00 "GRINT10,Interrupt Routing for Group1 Register i (i=0~2)" bitfld.long 0x00 28.--31. "LOI,Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "BOFF,Bus Off Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SAFE,Security Count Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "MOER,Module Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "ALRT,Alarm Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "WATI,Watermark line Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "HPE,High Priority Event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TEFIFO,Transfer Event FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xD0002018++0x03 line.long 0x00 "GRINT11,Interrupt Routing for Group1 Register i (i=0~2)" bitfld.long 0x00 28.--31. "LOI,Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "BOFF,Bus Off Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SAFE,Security Count Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "MOER,Module Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "ALRT,Alarm Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "WATI,Watermark line Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "HPE,High Priority Event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TEFIFO,Transfer Event FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xD0003818++0x03 line.long 0x00 "GRINT12,Interrupt Routing for Group1 Register i (i=0~2)" bitfld.long 0x00 28.--31. "LOI,Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "BOFF,Bus Off Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "SAFE,Security Count Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "MOER,Module Error Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "ALRT,Alarm Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "WATI,Watermark line Interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "HPE,High Priority Event" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TEFIFO,Transfer Event FIFO" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xD000081C++0x03 line.long 0x00 "GRINT20,Interrupt Routing for Group2 Register i (i=0~2)" bitfld.long 0x00 28.--31. "TRACO,Transmission Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "TRAQ,Transmission Queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "RETI,Receive Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "RxF0N,Receive FIFO 0 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "RxF1N,Receive FIFO1 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "RxF0F,Receive FIFO 0 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "RxF1F,Receive FIFO1 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "REINT,Message Stored in Buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xD000201C++0x03 line.long 0x00 "GRINT21,Interrupt Routing for Group2 Register i (i=0~2)" bitfld.long 0x00 28.--31. "TRACO,Transmission Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "TRAQ,Transmission Queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "RETI,Receive Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "RxF0N,Receive FIFO 0 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "RxF1N,Receive FIFO1 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "RxF0F,Receive FIFO 0 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "RxF1F,Receive FIFO1 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "REINT,Message Stored in Buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xD000381C++0x03 line.long 0x00 "GRINT22,Interrupt Routing for Group2 Register i (i=0~2)" bitfld.long 0x00 28.--31. "TRACO,Transmission Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "TRAQ,Transmission Queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "RETI,Receive Timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "RxF0N,Receive FIFO 0 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "RxF1N,Receive FIFO1 New" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "RxF0F,Receive FIFO 0 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "RxF1F,Receive FIFO1 Full" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "REINT,Message Stored in Buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xD0000820++0x03 line.long 0x00 "TTCR,Time Trigger Control Register" bitfld.long 0x00 8.--10. "TTCTSS,TTCAN Time Capture Trigger" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "ETSSEL,External Event Triggers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xD0000844++0x03 line.long 0x00 "DREN0,DMU Request Enable Register i (i=0~2)" bitfld.long 0x00 3. "TXERE,TX Event FIFO Enable" "0,1" bitfld.long 0x00 2. "RX1RE,Rx FIFO 1 Enable" "0,1" bitfld.long 0x00 1. "RX0RE,Rx FIFO 0 Enable" "0,1" bitfld.long 0x00 0. "TXRE,Tx FIFO/Queue Enable" "0,1" group.long ad:0xD0002044++0x03 line.long 0x00 "DREN1,DMU Request Enable Register i (i=0~2)" bitfld.long 0x00 3. "TXERE,TX Event FIFO Enable" "0,1" bitfld.long 0x00 2. "RX1RE,Rx FIFO 1 Enable" "0,1" bitfld.long 0x00 1. "RX0RE,Rx FIFO 0 Enable" "0,1" bitfld.long 0x00 0. "TXRE,Tx FIFO/Queue Enable" "0,1" group.long ad:0xD0003844++0x03 line.long 0x00 "DREN2,DMU Request Enable Register i (i=0~2)" bitfld.long 0x00 3. "TXERE,TX Event FIFO Enable" "0,1" bitfld.long 0x00 2. "RX1RE,Rx FIFO 1 Enable" "0,1" bitfld.long 0x00 1. "RX0RE,Rx FIFO 0 Enable" "0,1" bitfld.long 0x00 0. "TXRE,Tx FIFO/Queue Enable" "0,1" group.long ad:0xD0000848++0x03 line.long 0x00 "DGC10,DMU Gate counter 1 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "RX0RCNT,Rx FIFO 0 Request Count" hexmask.long.word 0x00 0.--15. 1. "TXRCNT,Tx FIFO/Queue Request Count" group.long ad:0xD0002048++0x03 line.long 0x00 "DGC11,DMU Gate counter 1 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "RX0RCNT,Rx FIFO 0 Request Count" hexmask.long.word 0x00 0.--15. 1. "TXRCNT,Tx FIFO/Queue Request Count" group.long ad:0xD0003848++0x03 line.long 0x00 "DGC12,DMU Gate counter 1 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "RX0RCNT,Rx FIFO 0 Request Count" hexmask.long.word 0x00 0.--15. 1. "TXRCNT,Tx FIFO/Queue Request Count" group.long ad:0xD000084C++0x03 line.long 0x00 "DGC20,DMU Gate counter 2 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TXERCNT,TX Event FIFO Request Count" hexmask.long.word 0x00 0.--15. 1. "RX1RCNT,Rx FIFO 1 Request Count" group.long ad:0xD000204C++0x03 line.long 0x00 "DGC21,DMU Gate counter 2 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TXERCNT,TX Event FIFO Request Count" hexmask.long.word 0x00 0.--15. 1. "RX1RCNT,Rx FIFO 1 Request Count" group.long ad:0xD000384C++0x03 line.long 0x00 "DGC22,DMU Gate counter 2 Register i (i=0~2)" hexmask.long.word 0x00 16.--31. 1. "TXERCNT,TX Event FIFO Request Count" hexmask.long.word 0x00 0.--15. 1. "RX1RCNT,Rx FIFO 1 Request Count" group.long ad:0xD0000860++0x03 line.long 0x00 "EXTMSPCFG0,External Time Stamp Configuration Register i (i=0~2)" group.long ad:0xD0002060++0x03 line.long 0x00 "EXTMSPCFG1,External Time Stamp Configuration Register i (i=0~2)" group.long ad:0xD0003860++0x03 line.long 0x00 "EXTMSPCFG2,External Time Stamp Configuration Register i (i=0~2)" group.long ad:0xD0000868++0x0B line.long 0x00 "LOCTMCFG,Local Timer Configuration Register" bitfld.long 0x00 0. "LOCTMEN,Local timer Trigger Enable" "0,1" line.long 0x04 "LOCTMCNT0,Local Timer Count0 Register" line.long 0x08 "LOCTMCNT1,Local Timer Count1 Register" group.long ad:0xD0000B1C++0x03 line.long 0x00 "DQTMOT0,DMA Request Timeout Register i (i=0~2)" group.long ad:0xD000231C++0x03 line.long 0x00 "DQTMOT1,DMA Request Timeout Register i (i=0~2)" group.long ad:0xD0003B1C++0x03 line.long 0x00 "DQTMOT2,DMA Request Timeout Register i (i=0~2)" wgroup.long ad:0xD0000B20++0x03 line.long 0x00 "DTMOC0,DMA Timeout Clear Register i (i=0~2)" bitfld.long 0x00 0.--1. "DTMOC,DMA Request Timeout Configure" "0,1,2,3" wgroup.long ad:0xD0002320++0x03 line.long 0x00 "DTMOC1,DMA Timeout Clear Register i (i=0~2)" bitfld.long 0x00 0.--1. "DTMOC,DMA Request Timeout Configure" "0,1,2,3" wgroup.long ad:0xD0003B20++0x03 line.long 0x00 "DTMOC2,DMA Timeout Clear Register i (i=0~2)" bitfld.long 0x00 0.--1. "DTMOC,DMA Request Timeout Configure" "0,1,2,3" group.long ad:0xD0000B24++0x03 line.long 0x00 "DTMOE0,DMA Timeout Enable Register i (i=0~2)" group.long ad:0xD0002324++0x03 line.long 0x00 "DTMOE1,DMA Timeout Enable Register i (i=0~2)" group.long ad:0xD0003B24++0x03 line.long 0x00 "DTMOE2,DMA Timeout Enable Register i (i=0~2)" rgroup.long ad:0xD0004800++0x03 line.long 0x00 "ID,Identification Register" hexmask.long.byte 0x00 24.--31. 1. "YEAR,Year" hexmask.long.byte 0x00 16.--23. 1. "MON,Month" hexmask.long.byte 0x00 8.--15. 1. "DAY,Day" hexmask.long.byte 0x00 0.--7. 1. "MOD,Module" group.long ad:0xD0004864++0x03 line.long 0x00 "ABEE,AHB Bus Error Enable Register" bitfld.long 0x00 0. "ABEE,AHB Bus Error Enable" "0,1" group.long ad:0xD0004B00++0x07 line.long 0x00 "EEIG,ECC Check Error Injection Register" bitfld.long 0x00 16.--17. "EN,Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "ERRINJ,Error Inject" "0,1,2,3" line.long 0x04 "RIEI,Interrupt Error Injection Register" bitfld.long 0x04 16.--17. "EN,Enable" "0,1,2,3" hexmask.long.word 0x04 0.--15. 1. "INTERR,Interrupt Error" rgroup.long ad:0xD0004B08++0x0B line.long 0x00 "EEAR0,ECC Single Bit Error Address Record Register i(i=0-4)" line.long 0x04 "EEAR1,ECC Single Bit Error Address Record Register i(i=0-4)" line.long 0x08 "EEAR2,ECC Single Bit Error Address Record Register i(i=0-4)" wgroup.long ad:0xD0004B28++0x03 line.long 0x00 "EAC,ECC Error Alarm Clear Register" bitfld.long 0x00 16.--17. "DBEAC,Double Bit ECC Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SBEAC,Single Bit ECC Alarm Clear" "0,1,2,3" group.long ad:0xD0004B2C++0x03 line.long 0x00 "EAEN,ECC Error Alarm Enable Register" bitfld.long 0x00 0.--1. "EAEN,ECC Alarm Enable" "0,1,2,3" wgroup.long ad:0xD0004B30++0x0B line.long 0x00 "RAC,Multi-Bit Redundancy Error Alarm Clear Register" bitfld.long 0x00 0.--1. "RAC,Redundant Alarm Clear" "0,1,2,3" line.long 0x04 "PAC,SE Protection Illegal Access Alarm Clear" bitfld.long 0x04 0.--1. "PAC,Protection Alarm Clear" "0,1,2,3" line.long 0x08 "OAC,Single-Bit Error Address Overflow Alarm Clear Register" bitfld.long 0x08 0.--1. "OAC,Overflow alarm clear" "0,1,2,3" rgroup.long ad:0xD0004B3C++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 7. "SEALM,SE Alarm" "0,1" bitfld.long 0x00 6. "OVFLOW,Overflow" "0,1" bitfld.long 0x00 5. "REDU,Redundancy" "0,1" bitfld.long 0x00 2.--4. "DMATMO,DMA TimeOut" "0,1,2,3,4,5,6,7" bitfld.long 0x00 1. "DBER,Double Bit Error" "0,1" newline bitfld.long 0x00 0. "SBER,Single Bit Error" "0,1" group.long ad:0xD0004B40++0x03 line.long 0x00 "ECCEN,ECC Enable Register" bitfld.long 0x00 0.--1. "EN,ECC Enable" "0,1,2,3" rgroup.long ad:0xD0004B44++0x03 line.long 0x00 "EDBE,Multi-Bit Error Address Record Register" group.long ad:0xD0004B48++0x0B line.long 0x00 "ESBEAV,Single-Bit Error Address Valid Register" bitfld.long 0x00 0.--4. "ESBEAV,ECC Single Bit Error Address Valid" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "EDBEAV,Double-Bit Error Address Valid Register" bitfld.long 0x04 0. "EDBEAV,ECC Double Bit Error Address Valid" "0,1" line.long 0x08 "ALMEN,Alarm Enable Register" bitfld.long 0x08 1. "ALMEN1,Alarm Enable 1" "0,1" bitfld.long 0x08 0. "ALMEN0,Alarm Enable 0" "0,1" tree.end tree "ETH" rgroup.long ad:0xC00BE004++0x03 line.long 0x00 "MIR,Module Identification Register" group.long ad:0xC00BE008++0x03 line.long 0x00 "GPCTL,General Purpose Control Register" bitfld.long 0x00 22.--24. "PHYSEL,Physic Select" "0,1,2,3,4,5,6,7" group.long ad:0xC00BE040++0x0F line.long 0x00 "SKEWCTL,Skew Control" hexmask.long.word 0x00 11.--21. 1. "SKEWRXCL,Skew Rx Control" hexmask.long.word 0x00 0.--10. 1. "SKEWTXCL,Skew Tx Control" line.long 0x04 "PTR,Physic Transmission Register" bitfld.long 0x04 0. "PHYTXCLO,Physics Tx Control Output" "0,1" line.long 0x08 "EPR,ETH PPS Register" bitfld.long 0x08 0.--1. "ETHPPSO,ETH PPS Out" "0,1,2,3" line.long 0x0C "LPMR,Low Power Mode Register" bitfld.long 0x0C 0.--1. "ETHLPI,ETH Low Power Mode" "0,1,2,3" rgroup.long ad:0xC00BE050++0x03 line.long 0x00 "EAR,ETH Alarm Register" bitfld.long 0x00 10. "SAERE,Status Alarm ETH Register E" "0,1" bitfld.long 0x00 9. "SAERSE,Status Alarm ETH Register SE" "0,1" bitfld.long 0x00 8. "SAERRR,Status Alarm ETH Register Redundant Register" "0,1" bitfld.long 0x00 7. "SAERERR,Status Alarm ETH Register Enable Redundant Register" "0,1" bitfld.long 0x00 6. "SAERCRR,Status Alarm ETH Register Clear Redundant Register" "0,1" bitfld.long 0x00 5. "SAERRW,Status Alarm ETH Register RAM Wrapper" "0,1" bitfld.long 0x00 4. "SAERD,Status Alarm ETH Register Detect" "0,1" bitfld.long 0x00 3. "SAERGL,Status Alarm ETH Register Gap Logic" "0,1" bitfld.long 0x00 2. "SAER,Status Alarm ETH Register" "0,1" bitfld.long 0x00 1. "SAERW,Status Alarm ETH Register Wrapper" "0,1" newline bitfld.long 0x00 0. "SAERI,Status Alarm ETH Register IP" "0,1" group.long ad:0xC00BE054++0x0B line.long 0x00 "EAER,ETH Alarm Enable Register" bitfld.long 0x00 20.--21. "SAEREE,Status Alarm ETH Register E Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "SAERSEE,Status Alarm ETH Register SE Enable" "0,1,2,3" bitfld.long 0x00 16.--17. "SAERRRE,Status Alarm ETH Register Redundant Register Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "SAERERRE,Status Alarm ETH Register Enable Redundant Register Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "SAERCRRE,Status Alarm ETH Register Clear Redundant Register Enable" "0,1,2,3" bitfld.long 0x00 10.--11. "SAERRWE,Status Alarm ETH Register RAM Wrapper Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "SAERDE,Status Alarm ETH Register Detect Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "SAERGLE,Status Alarm ETH Register Gap Logic Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "SAERE,Status Alarm ETH Register Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "SAERWE,Status Alarm ETH Register Wrapper Enable" "0,1,2,3" newline bitfld.long 0x00 0.--1. "SAERIE,Status Alarm ETH Register IP Enable" "0,1,2,3" line.long 0x04 "EACR,ETH Alarm Clear Register" bitfld.long 0x04 20.--21. "SAEREC,Status Alarm ETH Register E Clear" "0,1,2,3" bitfld.long 0x04 18.--19. "SAERSEC,Status Alarm ETH Register SE Clear" "0,1,2,3" bitfld.long 0x04 16.--17. "SAERRRC,Status Alarm ETH Register Redundant Register Clear" "0,1,2,3" bitfld.long 0x04 14.--15. "SAERERRC,Status Alarm ETH Register Enable Redundant Register Clear" "0,1,2,3" bitfld.long 0x04 12.--13. "SAERCRRC,Status Alarm ETH Register Clear Redundant Register Clear" "0,1,2,3" bitfld.long 0x04 10.--11. "SAERRWC,Status Alarm ETH Register RAM Wrapper Clear" "0,1,2,3" bitfld.long 0x04 8.--9. "SAERDC,Status Alarm ETH Register Detect Clear" "0,1,2,3" bitfld.long 0x04 6.--7. "SAERGLC,Status Alarm ETH Register Gap Logic Clear" "0,1,2,3" bitfld.long 0x04 4.--5. "SAERC,Status Alarm ETH Register Clear" "0,1,2,3" bitfld.long 0x04 2.--3. "SAERWC,Status Alarm ETH Register Wrapper Clear" "0,1,2,3" newline bitfld.long 0x04 0.--1. "SAERIC,Status Alarm ETH Register IP Clear" "0,1,2,3" line.long 0x08 "EFSIMDR,ETH Function Safety Injection Mechanism Register" bitfld.long 0x08 3. "SAERWII,State fault injection of SAERWI register" "0,1" bitfld.long 0x08 2. "SAEDII,State fault injection of SAEDI register" "0,1" bitfld.long 0x08 1. "SAGLII,State fault injection of SAGLI register" "0,1" bitfld.long 0x08 0. "SAWII,State fault injection of SAWI register" "0,1" rgroup.long ad:0xC00BE060++0x03 line.long 0x00 "EIR,ETH Interrupt Register" bitfld.long 0x00 1. "SALPI,Status Low Power Interrupt" "0,1" bitfld.long 0x00 0. "SALPAI,Status Low Power Awake Interrupt" "0,1" group.long ad:0xC00BE064++0x0B line.long 0x00 "EIER,ETH Interrupt Enable Register" bitfld.long 0x00 0.--1. "SALPIE,Status Low Power Interrupt Enable" "0,1,2,3" line.long 0x04 "EICR,ETH Interrupt Clear Register" bitfld.long 0x04 0.--1. "SALPIC,Status Low Power Interrupt Clear" "0,1,2,3" line.long 0x08 "AHBEMR,AHB Bus Error Mask Register" bitfld.long 0x08 0. "APBEMR,AHB Error Mask Register" "0,1" tree.end tree "ESPI" tree "ESPI0" group.long ad:0xC0080004++0x03 line.long 0x00 "SISW,Slave Input Switch Register" bitfld.long 0x00 0.--2. "SMISS,Slave Mode Input Selection Switch" "0,1,2,3,4,5,6,7" rgroup.long ad:0xC0080008++0x03 line.long 0x00 "MDID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. "MDNB,Module Number" hexmask.long.byte 0x00 8.--15. 1. "MDTP,Module Type" hexmask.long.byte 0x00 0.--7. 1. "MDRV,Module Revision Value" group.long ad:0xC0080010++0x0B line.long 0x00 "GNRCON,General Configuration Register" bitfld.long 0x00 30.--31. "SRSTB,Software Reset Bits" "0,1,2,3" bitfld.long 0x00 29. "CLKMUX,Clock Multiplexer" "0,1" bitfld.long 0x00 28. "HDMEN,Half-Duplex Mode Enable" "0,1" bitfld.long 0x00 27. "SATREN,Slave Automatic Reset Enable" "0,1" bitfld.long 0x00 25.--26. "MS,Mode Select" "0,1,2,3" bitfld.long 0x00 24. "EN,Enable Running" "0,1" newline bitfld.long 0x00 23. "HDTRM,Half-Duplex Transmit Receive Mode" "0,1" bitfld.long 0x00 22. "SODP,Slave Output Default Polarity" "0,1" bitfld.long 0x00 21. "TPRF,TXFIFO Pause on RXFIFO Full" "0,1" rbitfld.long 0x00 15. "DLMS,SLSO Delayed Mode Switch for SLSO0" "0,1" bitfld.long 0x00 14. "OLBC,Output Loop-Back Control" "0,1" bitfld.long 0x00 10.--13. "TOV,Time-Out Value for the Expect Phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. "STSI,Status Injection" "0,1" bitfld.long 0x00 8. "SFRBEM,SFR BUS Error Mask" "0,1" hexmask.long.byte 0x00 0.--7. 1. "GTQ,General Time Quantum Length" line.long 0x04 "GNRCON1,General Configuration Register 1" bitfld.long 0x04 31. "RXDREN,RXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 30. "TXDREN,TXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 28.--29. "RXFM,RXFIFO Mode" "0,1,2,3" bitfld.long 0x04 26.--27. "TXFM,TXFIFO Mode" "0,1,2,3" bitfld.long 0x04 23.--25. "TSE2,Transition Stage Event 2" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. "TSE1,Transition Stage Event 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 16. "LTEIEN,Interrupt on Large Transmission End Event Enable" "0,1" bitfld.long 0x04 15. "UEIEN,Interrupt on User Event Enable" "0,1" bitfld.long 0x04 14. "SEFEN,Slave End Flag Enable" "0,1" bitfld.long 0x04 13. "DAIGEN,Data Ignore Enable" "0,1" bitfld.long 0x04 12. "TSE2EN,Interrupt on TSE2 Event Enable" "0,1" bitfld.long 0x04 11. "TSE1EN,Interrupt on TSE1 Event Enable" "0,1" newline bitfld.long 0x04 10. "RXFIEN,Interrupt on RXFIFO Event Enable" "0,1" bitfld.long 0x04 9. "TXFIEN,Interrupt on TXFIFO Event Enable" "0,1" hexmask.long.word 0x04 0.--8. 1. "ERRIENS,Errors Event Interrupt Enable" line.long 0x08 "EMCON,Elementary Configuration Register" bitfld.long 0x08 28.--31. "SCM,Selection Channel Multiplexer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 23.--27. "DL,Data Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 22. "DLU,Data Length Unit" "0,1" bitfld.long 0x08 21. "MSB,Shift MSB or LSB First" "0,1" bitfld.long 0x08 20. "UIOT1,User Interrupt at the TSE1 Event Enable" "0,1" bitfld.long 0x08 19. "PARTYP,Parity Type" "0,1" newline bitfld.long 0x08 16.--18. "TDL,Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 13.--15. "TPSC,Prescaler for the Trailing Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 10.--12. "LDL,Leading Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7.--9. "LPSC,Prescaler for the Leading Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4.--6. "IDL,IDLE Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 1.--3. "IPSC,Prescaler for the IDLE Delay" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "LDB,Last Data Block" "0,1" group.long ad:0xC0080020++0x2B line.long 0x00 "DCON0,Development Configuration Register x (x = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCON1,Development Configuration Register x (x = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCON2,Development Configuration Register x (x = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCON3,Development Configuration Register x (x = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCON4,Development Configuration Register x (x = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCON5,Development Configuration Register x (x = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCON6,Development Configuration Register x (x = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCON7,Development Configuration Register x (x = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" line.long 0x20 "STS,Status Register" rbitfld.long 0x20 28.--31. "FS,Flag Stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 27. "TPV,Transmit Parity Value" "0,1" rbitfld.long 0x20 26. "RPV,Receive Parity Value" "0,1" rbitfld.long 0x20 22.--25. "CSF,Current Chip Slave Select Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 19. "LTEF,Large Transmission End Flag" "0,1" rbitfld.long 0x20 18. "SEAF,SE Protection Alarm Flag" "0,1" newline bitfld.long 0x20 17. "STOAF,Slave Timeout Alarm Flag" "0,1" bitfld.long 0x20 16. "SFRAF,Special Function Register Alarm Flag" "0,1" bitfld.long 0x20 15. "USRF,User Interrupt Flag" "0,1" bitfld.long 0x20 14. "SEF,Slave End Flag" "0,1" bitfld.long 0x20 13. "DAIG,Data Ignore Flag" "0,1" bitfld.long 0x20 12. "TSE2F,Transition Stage Event2 Flag" "0,1" newline bitfld.long 0x20 11. "TSE1F,Transition Stage Event1 Flag" "0,1" bitfld.long 0x20 10. "RXF,RXFIFO Request Flag" "0,1" bitfld.long 0x20 9. "TXF,TXFIFO Request Flag" "0,1" hexmask.long.word 0x20 0.--8. 1. "ERRIFS,Interrupt on Errors Event Flags" line.long 0x24 "ESTS,Extended Status Register" bitfld.long 0x24 31. "CSEF,Clock Spike Error Flag" "0,1" bitfld.long 0x24 30. "CSDEN,Clock Spike Detection Enable" "0,1" bitfld.long 0x24 29. "CBDF,Clock Baud Rate Deviation Error Flag" "0,1" bitfld.long 0x24 28. "CBDEN,Clock Baud Rate Detection Enable" "0,1" hexmask.long.byte 0x24 0.--7. 1. "TBCNT,Bit Counter of Transmission" line.long 0x28 "SSCON,Slave Select Configuration Register" hexmask.long.word 0x28 16.--31. 1. "OEB,Enable Bits for the SLSO Outputs" hexmask.long.word 0x28 0.--15. 1. "OAP,Active Polarity for the SLSO Outputs" wgroup.long ad:0xC0080054++0x03 line.long 0x00 "STSC,Status Clear Register" bitfld.long 0x00 19. "LTEFC,Large Transmission End Flag Clear" "0,1" bitfld.long 0x00 18. "SEAC,SE Protection Alarm Flag Clear" "0,1" bitfld.long 0x00 17. "STOAC,Slave Timeout Alarm Flag Clear" "0,1" bitfld.long 0x00 16. "SFRAC,Special Function Register Alarm Flag Clear" "0,1" bitfld.long 0x00 15. "USRC,User Event Flag Clear" "0,1" bitfld.long 0x00 14. "SEFC,Slave End Flag Clear" "0,1" newline bitfld.long 0x00 13. "DAIGC,Data Ignore Flag Clear" "0,1" bitfld.long 0x00 12. "TSE2FC,Transition Stage Event 2 Flag Clear" "0,1" bitfld.long 0x00 11. "TSE1FC,Transition Stage Event 1 Flag Clear" "0,1" bitfld.long 0x00 10. "RXC,Receive Event Flag Clear" "0,1" bitfld.long 0x00 9. "TXC,Transmit Event Flag Clear" "0,1" hexmask.long.word 0x00 0.--8. 1. "ERRFSC,Errors Event Flags Clear" group.long ad:0xC0080058++0x03 line.long 0x00 "LTCON,Large Transmission Configuration Register" hexmask.long.word 0x00 16.--31. 1. "DCNT,Data Counter for Large Transmission" hexmask.long.word 0x00 0.--15. 1. "DLT,Data length of Large Transmission: Number of data bytes to be transmitted in XXL mode (when EMCON.DLU=1 and EMCON.DL = 0)" wgroup.long ad:0xC008005C++0x27 line.long 0x00 "HBRENTRY,HBR_ENTRY Register" line.long 0x04 "EMCONENTRY,EMCON_ENTRY Register" line.long 0x08 "DATAENTRY0,DATA_ENTRY Register n (n = 0~7)" line.long 0x0C "DATAENTRY1,DATA_ENTRY Register n (n = 0~7)" line.long 0x10 "DATAENTRY2,DATA_ENTRY Register n (n = 0~7)" line.long 0x14 "DATAENTRY3,DATA_ENTRY Register n (n = 0~7)" line.long 0x18 "DATAENTRY4,DATA_ENTRY Register n (n = 0~7)" line.long 0x1C "DATAENTRY5,DATA_ENTRY Register n (n = 0~7)" line.long 0x20 "DATAENTRY6,DATA_ENTRY Register n (n = 0~7)" line.long 0x24 "DATAENTRY7,DATA_ENTRY Register n (n = 0~7)" rgroup.long ad:0xC0080090++0x1F line.long 0x00 "RDR0,RXFIFO Data Read Register m (m = 0~7)" line.long 0x04 "RDR1,RXFIFO Data Read Register m (m = 0~7)" line.long 0x08 "RDR2,RXFIFO Data Read Register m (m = 0~7)" line.long 0x0C "RDR3,RXFIFO Data Read Register m (m = 0~7)" line.long 0x10 "RDR4,RXFIFO Data Read Register m (m = 0~7)" line.long 0x14 "RDR5,RXFIFO Data Read Register m (m = 0~7)" line.long 0x18 "RDR6,RXFIFO Data Read Register m (m = 0~7)" line.long 0x1C "RDR7,RXFIFO Data Read Register m (m = 0~7)" group.long ad:0xC00800A0++0x13 line.long 0x00 "ISPCON,Input Sample Register" bitfld.long 0x00 31. "ISEIEN,Input Sample Event Interrupt Enable" "0,1" rbitfld.long 0x00 30. "ISEF,Input Sample Event Flag" "0,1" bitfld.long 0x00 29. "ISEFS,Input Sample Event Flag Set" "0,1" bitfld.long 0x00 28. "ISEFC,Input Sample Event Flag Clear" "0,1" bitfld.long 0x00 20. "ISTEN,Input Sample Timer Enable" "0,1" bitfld.long 0x00 18.--19. "IPS,Input Ports Selection" "0,1,2,3" newline bitfld.long 0x00 16.--17. "SEMD,Sample Edge Mode" "0,1,2,3" rbitfld.long 0x00 15. "STOF,Sample Time-out Event Flag" "0,1" hexmask.long.word 0x00 0.--14. 1. "SREL,Sample Result" line.long 0x04 "MC,Move Counter Register" hexmask.long.word 0x04 16.--28. 1. "RMN,Remaining move Number" hexmask.long.word 0x04 0.--12. 1. "TOMS,Target of Move Step" line.long 0x08 "MCCON,Move Counter Control Register" bitfld.long 0x08 31. "MCEN,Move Counter Enable" "0,1" bitfld.long 0x08 30. "ETEN,Extended Trailing Delay Enable" "0,1" bitfld.long 0x08 23. "AFIS,Set Bit for AFIF" "0,1" bitfld.long 0x08 22. "AFIC,Clear Bit for AFIF" "0,1" rbitfld.long 0x08 21. "AFIF,Interrupt Flag of After Final Data" "0,1" bitfld.long 0x08 20. "AFIEN,Enable Interrupt of After Final Data" "0,1" newline bitfld.long 0x08 19. "BFIS,Set Bit for BFIF" "0,1" bitfld.long 0x08 18. "BFIC,Clear Bit for BFIF" "0,1" rbitfld.long 0x08 17. "BFIF,Interrupt Flag of Before Final Data" "0,1" bitfld.long 0x08 16. "BFIEN,Enable Interrupt of Before Final Data" "0,1" bitfld.long 0x08 3.--5. "ETDL,Extended Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "ETPSC,Prescaler for the Extended Trailing Delay" "0,1,2,3,4,5,6,7" line.long 0x0C "DELAY,Delay Register" hexmask.long.byte 0x0C 0.--5. 1. "DELAYTIME,Delay Time" line.long 0x10 "DATAMODE,Data Mode Register" bitfld.long 0x10 17.--18. "DATASEL,Data-Out Select" "0,1,2,3" hexmask.long.tbyte 0x10 0.--16. 1. "SLAVEDATACNT,Slave Data-Out Delay Count" rgroup.long ad:0xC00800B4++0x03 line.long 0x00 "RDRD,RXFIFO Data Read Debug Register" group.long ad:0xC00800B8++0x03 line.long 0x00 "FIFOTHRESHOLD,FIFO Threshold Register" bitfld.long 0x00 26. "STOEN,Slave Timeout Enable" "0,1" hexmask.long.tbyte 0x00 8.--25. 1. "STORT,Slave Timeout Recovery Time" bitfld.long 0x00 4.--7. "RXTHRESHOLD,Receive FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TXTHRESHOLD,Transmit FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC00800BC++0x03 line.long 0x00 "FIFOLEVEL,FIFO Level Register" bitfld.long 0x00 8.--12. "RXLEVEL,RXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "TXLEVEL,TXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC00800C0++0x1F line.long 0x00 "DCONEG0,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCONEG1,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCONEG2,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCONEG3,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCONEG4,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCONEG5,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCONEG6,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCONEG7,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" tree.end tree "ESPI1" group.long ad:0xC0080404++0x03 line.long 0x00 "SISW,Slave Input Switch Register" bitfld.long 0x00 0.--2. "SMISS,Slave Mode Input Selection Switch" "0,1,2,3,4,5,6,7" rgroup.long ad:0xC0080408++0x03 line.long 0x00 "MDID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. "MDNB,Module Number" hexmask.long.byte 0x00 8.--15. 1. "MDTP,Module Type" hexmask.long.byte 0x00 0.--7. 1. "MDRV,Module Revision Value" group.long ad:0xC0080410++0x0B line.long 0x00 "GNRCON,General Configuration Register" bitfld.long 0x00 30.--31. "SRSTB,Software Reset Bits" "0,1,2,3" bitfld.long 0x00 29. "CLKMUX,Clock Multiplexer" "0,1" bitfld.long 0x00 28. "HDMEN,Half-Duplex Mode Enable" "0,1" bitfld.long 0x00 27. "SATREN,Slave Automatic Reset Enable" "0,1" bitfld.long 0x00 25.--26. "MS,Mode Select" "0,1,2,3" bitfld.long 0x00 24. "EN,Enable Running" "0,1" newline bitfld.long 0x00 23. "HDTRM,Half-Duplex Transmit Receive Mode" "0,1" bitfld.long 0x00 22. "SODP,Slave Output Default Polarity" "0,1" bitfld.long 0x00 21. "TPRF,TXFIFO Pause on RXFIFO Full" "0,1" rbitfld.long 0x00 15. "DLMS,SLSO Delayed Mode Switch for SLSO0" "0,1" bitfld.long 0x00 14. "OLBC,Output Loop-Back Control" "0,1" bitfld.long 0x00 10.--13. "TOV,Time-Out Value for the Expect Phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. "STSI,Status Injection" "0,1" bitfld.long 0x00 8. "SFRBEM,SFR BUS Error Mask" "0,1" hexmask.long.byte 0x00 0.--7. 1. "GTQ,General Time Quantum Length" line.long 0x04 "GNRCON1,General Configuration Register 1" bitfld.long 0x04 31. "RXDREN,RXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 30. "TXDREN,TXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 28.--29. "RXFM,RXFIFO Mode" "0,1,2,3" bitfld.long 0x04 26.--27. "TXFM,TXFIFO Mode" "0,1,2,3" bitfld.long 0x04 23.--25. "TSE2,Transition Stage Event 2" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. "TSE1,Transition Stage Event 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 16. "LTEIEN,Interrupt on Large Transmission End Event Enable" "0,1" bitfld.long 0x04 15. "UEIEN,Interrupt on User Event Enable" "0,1" bitfld.long 0x04 14. "SEFEN,Slave End Flag Enable" "0,1" bitfld.long 0x04 13. "DAIGEN,Data Ignore Enable" "0,1" bitfld.long 0x04 12. "TSE2EN,Interrupt on TSE2 Event Enable" "0,1" bitfld.long 0x04 11. "TSE1EN,Interrupt on TSE1 Event Enable" "0,1" newline bitfld.long 0x04 10. "RXFIEN,Interrupt on RXFIFO Event Enable" "0,1" bitfld.long 0x04 9. "TXFIEN,Interrupt on TXFIFO Event Enable" "0,1" hexmask.long.word 0x04 0.--8. 1. "ERRIENS,Errors Event Interrupt Enable" line.long 0x08 "EMCON,Elementary Configuration Register" bitfld.long 0x08 28.--31. "SCM,Selection Channel Multiplexer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 23.--27. "DL,Data Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 22. "DLU,Data Length Unit" "0,1" bitfld.long 0x08 21. "MSB,Shift MSB or LSB First" "0,1" bitfld.long 0x08 20. "UIOT1,User Interrupt at the TSE1 Event Enable" "0,1" bitfld.long 0x08 19. "PARTYP,Parity Type" "0,1" newline bitfld.long 0x08 16.--18. "TDL,Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 13.--15. "TPSC,Prescaler for the Trailing Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 10.--12. "LDL,Leading Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7.--9. "LPSC,Prescaler for the Leading Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4.--6. "IDL,IDLE Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 1.--3. "IPSC,Prescaler for the IDLE Delay" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "LDB,Last Data Block" "0,1" group.long ad:0xC0080420++0x2B line.long 0x00 "DCON0,Development Configuration Register x (x = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCON1,Development Configuration Register x (x = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCON2,Development Configuration Register x (x = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCON3,Development Configuration Register x (x = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCON4,Development Configuration Register x (x = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCON5,Development Configuration Register x (x = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCON6,Development Configuration Register x (x = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCON7,Development Configuration Register x (x = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" line.long 0x20 "STS,Status Register" rbitfld.long 0x20 28.--31. "FS,Flag Stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 27. "TPV,Transmit Parity Value" "0,1" rbitfld.long 0x20 26. "RPV,Receive Parity Value" "0,1" rbitfld.long 0x20 22.--25. "CSF,Current Chip Slave Select Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 19. "LTEF,Large Transmission End Flag" "0,1" rbitfld.long 0x20 18. "SEAF,SE Protection Alarm Flag" "0,1" newline bitfld.long 0x20 17. "STOAF,Slave Timeout Alarm Flag" "0,1" bitfld.long 0x20 16. "SFRAF,Special Function Register Alarm Flag" "0,1" bitfld.long 0x20 15. "USRF,User Interrupt Flag" "0,1" bitfld.long 0x20 14. "SEF,Slave End Flag" "0,1" bitfld.long 0x20 13. "DAIG,Data Ignore Flag" "0,1" bitfld.long 0x20 12. "TSE2F,Transition Stage Event2 Flag" "0,1" newline bitfld.long 0x20 11. "TSE1F,Transition Stage Event1 Flag" "0,1" bitfld.long 0x20 10. "RXF,RXFIFO Request Flag" "0,1" bitfld.long 0x20 9. "TXF,TXFIFO Request Flag" "0,1" hexmask.long.word 0x20 0.--8. 1. "ERRIFS,Interrupt on Errors Event Flags" line.long 0x24 "ESTS,Extended Status Register" bitfld.long 0x24 31. "CSEF,Clock Spike Error Flag" "0,1" bitfld.long 0x24 30. "CSDEN,Clock Spike Detection Enable" "0,1" bitfld.long 0x24 29. "CBDF,Clock Baud Rate Deviation Error Flag" "0,1" bitfld.long 0x24 28. "CBDEN,Clock Baud Rate Detection Enable" "0,1" hexmask.long.byte 0x24 0.--7. 1. "TBCNT,Bit Counter of Transmission" line.long 0x28 "SSCON,Slave Select Configuration Register" hexmask.long.word 0x28 16.--31. 1. "OEB,Enable Bits for the SLSO Outputs" hexmask.long.word 0x28 0.--15. 1. "OAP,Active Polarity for the SLSO Outputs" wgroup.long ad:0xC0080454++0x03 line.long 0x00 "STSC,Status Clear Register" bitfld.long 0x00 19. "LTEFC,Large Transmission End Flag Clear" "0,1" bitfld.long 0x00 18. "SEAC,SE Protection Alarm Flag Clear" "0,1" bitfld.long 0x00 17. "STOAC,Slave Timeout Alarm Flag Clear" "0,1" bitfld.long 0x00 16. "SFRAC,Special Function Register Alarm Flag Clear" "0,1" bitfld.long 0x00 15. "USRC,User Event Flag Clear" "0,1" bitfld.long 0x00 14. "SEFC,Slave End Flag Clear" "0,1" newline bitfld.long 0x00 13. "DAIGC,Data Ignore Flag Clear" "0,1" bitfld.long 0x00 12. "TSE2FC,Transition Stage Event 2 Flag Clear" "0,1" bitfld.long 0x00 11. "TSE1FC,Transition Stage Event 1 Flag Clear" "0,1" bitfld.long 0x00 10. "RXC,Receive Event Flag Clear" "0,1" bitfld.long 0x00 9. "TXC,Transmit Event Flag Clear" "0,1" hexmask.long.word 0x00 0.--8. 1. "ERRFSC,Errors Event Flags Clear" group.long ad:0xC0080458++0x03 line.long 0x00 "LTCON,Large Transmission Configuration Register" hexmask.long.word 0x00 16.--31. 1. "DCNT,Data Counter for Large Transmission" hexmask.long.word 0x00 0.--15. 1. "DLT,Data length of Large Transmission: Number of data bytes to be transmitted in XXL mode (when EMCON.DLU=1 and EMCON.DL = 0)" wgroup.long ad:0xC008045C++0x27 line.long 0x00 "HBRENTRY,HBR_ENTRY Register" line.long 0x04 "EMCONENTRY,EMCON_ENTRY Register" line.long 0x08 "DATAENTRY0,DATA_ENTRY Register n (n = 0~7)" line.long 0x0C "DATAENTRY1,DATA_ENTRY Register n (n = 0~7)" line.long 0x10 "DATAENTRY2,DATA_ENTRY Register n (n = 0~7)" line.long 0x14 "DATAENTRY3,DATA_ENTRY Register n (n = 0~7)" line.long 0x18 "DATAENTRY4,DATA_ENTRY Register n (n = 0~7)" line.long 0x1C "DATAENTRY5,DATA_ENTRY Register n (n = 0~7)" line.long 0x20 "DATAENTRY6,DATA_ENTRY Register n (n = 0~7)" line.long 0x24 "DATAENTRY7,DATA_ENTRY Register n (n = 0~7)" rgroup.long ad:0xC0080490++0x1F line.long 0x00 "RDR0,RXFIFO Data Read Register m (m = 0~7)" line.long 0x04 "RDR1,RXFIFO Data Read Register m (m = 0~7)" line.long 0x08 "RDR2,RXFIFO Data Read Register m (m = 0~7)" line.long 0x0C "RDR3,RXFIFO Data Read Register m (m = 0~7)" line.long 0x10 "RDR4,RXFIFO Data Read Register m (m = 0~7)" line.long 0x14 "RDR5,RXFIFO Data Read Register m (m = 0~7)" line.long 0x18 "RDR6,RXFIFO Data Read Register m (m = 0~7)" line.long 0x1C "RDR7,RXFIFO Data Read Register m (m = 0~7)" group.long ad:0xC00804A0++0x13 line.long 0x00 "ISPCON,Input Sample Register" bitfld.long 0x00 31. "ISEIEN,Input Sample Event Interrupt Enable" "0,1" rbitfld.long 0x00 30. "ISEF,Input Sample Event Flag" "0,1" bitfld.long 0x00 29. "ISEFS,Input Sample Event Flag Set" "0,1" bitfld.long 0x00 28. "ISEFC,Input Sample Event Flag Clear" "0,1" bitfld.long 0x00 20. "ISTEN,Input Sample Timer Enable" "0,1" bitfld.long 0x00 18.--19. "IPS,Input Ports Selection" "0,1,2,3" newline bitfld.long 0x00 16.--17. "SEMD,Sample Edge Mode" "0,1,2,3" rbitfld.long 0x00 15. "STOF,Sample Time-out Event Flag" "0,1" hexmask.long.word 0x00 0.--14. 1. "SREL,Sample Result" line.long 0x04 "MC,Move Counter Register" hexmask.long.word 0x04 16.--28. 1. "RMN,Remaining move Number" hexmask.long.word 0x04 0.--12. 1. "TOMS,Target of Move Step" line.long 0x08 "MCCON,Move Counter Control Register" bitfld.long 0x08 31. "MCEN,Move Counter Enable" "0,1" bitfld.long 0x08 30. "ETEN,Extended Trailing Delay Enable" "0,1" bitfld.long 0x08 23. "AFIS,Set Bit for AFIF" "0,1" bitfld.long 0x08 22. "AFIC,Clear Bit for AFIF" "0,1" rbitfld.long 0x08 21. "AFIF,Interrupt Flag of After Final Data" "0,1" bitfld.long 0x08 20. "AFIEN,Enable Interrupt of After Final Data" "0,1" newline bitfld.long 0x08 19. "BFIS,Set Bit for BFIF" "0,1" bitfld.long 0x08 18. "BFIC,Clear Bit for BFIF" "0,1" rbitfld.long 0x08 17. "BFIF,Interrupt Flag of Before Final Data" "0,1" bitfld.long 0x08 16. "BFIEN,Enable Interrupt of Before Final Data" "0,1" bitfld.long 0x08 3.--5. "ETDL,Extended Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "ETPSC,Prescaler for the Extended Trailing Delay" "0,1,2,3,4,5,6,7" line.long 0x0C "DELAY,Delay Register" hexmask.long.byte 0x0C 0.--5. 1. "DELAYTIME,Delay Time" line.long 0x10 "DATAMODE,Data Mode Register" bitfld.long 0x10 17.--18. "DATASEL,Data-Out Select" "0,1,2,3" hexmask.long.tbyte 0x10 0.--16. 1. "SLAVEDATACNT,Slave Data-Out Delay Count" rgroup.long ad:0xC00804B4++0x03 line.long 0x00 "RDRD,RXFIFO Data Read Debug Register" group.long ad:0xC00804B8++0x03 line.long 0x00 "FIFOTHRESHOLD,FIFO Threshold Register" bitfld.long 0x00 26. "STOEN,Slave Timeout Enable" "0,1" hexmask.long.tbyte 0x00 8.--25. 1. "STORT,Slave Timeout Recovery Time" bitfld.long 0x00 4.--7. "RXTHRESHOLD,Receive FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TXTHRESHOLD,Transmit FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC00804BC++0x03 line.long 0x00 "FIFOLEVEL,FIFO Level Register" bitfld.long 0x00 8.--12. "RXLEVEL,RXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "TXLEVEL,TXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC00804C0++0x1F line.long 0x00 "DCONEG0,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCONEG1,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCONEG2,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCONEG3,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCONEG4,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCONEG5,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCONEG6,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCONEG7,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" tree.end tree "ESPI2" group.long ad:0xC0080804++0x03 line.long 0x00 "SISW,Slave Input Switch Register" bitfld.long 0x00 0.--2. "SMISS,Slave Mode Input Selection Switch" "0,1,2,3,4,5,6,7" rgroup.long ad:0xC0080808++0x03 line.long 0x00 "MDID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. "MDNB,Module Number" hexmask.long.byte 0x00 8.--15. 1. "MDTP,Module Type" hexmask.long.byte 0x00 0.--7. 1. "MDRV,Module Revision Value" group.long ad:0xC0080810++0x0B line.long 0x00 "GNRCON,General Configuration Register" bitfld.long 0x00 30.--31. "SRSTB,Software Reset Bits" "0,1,2,3" bitfld.long 0x00 29. "CLKMUX,Clock Multiplexer" "0,1" bitfld.long 0x00 28. "HDMEN,Half-Duplex Mode Enable" "0,1" bitfld.long 0x00 27. "SATREN,Slave Automatic Reset Enable" "0,1" bitfld.long 0x00 25.--26. "MS,Mode Select" "0,1,2,3" bitfld.long 0x00 24. "EN,Enable Running" "0,1" newline bitfld.long 0x00 23. "HDTRM,Half-Duplex Transmit Receive Mode" "0,1" bitfld.long 0x00 22. "SODP,Slave Output Default Polarity" "0,1" bitfld.long 0x00 21. "TPRF,TXFIFO Pause on RXFIFO Full" "0,1" rbitfld.long 0x00 15. "DLMS,SLSO Delayed Mode Switch for SLSO0" "0,1" bitfld.long 0x00 14. "OLBC,Output Loop-Back Control" "0,1" bitfld.long 0x00 10.--13. "TOV,Time-Out Value for the Expect Phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. "STSI,Status Injection" "0,1" bitfld.long 0x00 8. "SFRBEM,SFR BUS Error Mask" "0,1" hexmask.long.byte 0x00 0.--7. 1. "GTQ,General Time Quantum Length" line.long 0x04 "GNRCON1,General Configuration Register 1" bitfld.long 0x04 31. "RXDREN,RXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 30. "TXDREN,TXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 28.--29. "RXFM,RXFIFO Mode" "0,1,2,3" bitfld.long 0x04 26.--27. "TXFM,TXFIFO Mode" "0,1,2,3" bitfld.long 0x04 23.--25. "TSE2,Transition Stage Event 2" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. "TSE1,Transition Stage Event 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 16. "LTEIEN,Interrupt on Large Transmission End Event Enable" "0,1" bitfld.long 0x04 15. "UEIEN,Interrupt on User Event Enable" "0,1" bitfld.long 0x04 14. "SEFEN,Slave End Flag Enable" "0,1" bitfld.long 0x04 13. "DAIGEN,Data Ignore Enable" "0,1" bitfld.long 0x04 12. "TSE2EN,Interrupt on TSE2 Event Enable" "0,1" bitfld.long 0x04 11. "TSE1EN,Interrupt on TSE1 Event Enable" "0,1" newline bitfld.long 0x04 10. "RXFIEN,Interrupt on RXFIFO Event Enable" "0,1" bitfld.long 0x04 9. "TXFIEN,Interrupt on TXFIFO Event Enable" "0,1" hexmask.long.word 0x04 0.--8. 1. "ERRIENS,Errors Event Interrupt Enable" line.long 0x08 "EMCON,Elementary Configuration Register" bitfld.long 0x08 28.--31. "SCM,Selection Channel Multiplexer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 23.--27. "DL,Data Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 22. "DLU,Data Length Unit" "0,1" bitfld.long 0x08 21. "MSB,Shift MSB or LSB First" "0,1" bitfld.long 0x08 20. "UIOT1,User Interrupt at the TSE1 Event Enable" "0,1" bitfld.long 0x08 19. "PARTYP,Parity Type" "0,1" newline bitfld.long 0x08 16.--18. "TDL,Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 13.--15. "TPSC,Prescaler for the Trailing Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 10.--12. "LDL,Leading Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7.--9. "LPSC,Prescaler for the Leading Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4.--6. "IDL,IDLE Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 1.--3. "IPSC,Prescaler for the IDLE Delay" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "LDB,Last Data Block" "0,1" group.long ad:0xC0080820++0x2B line.long 0x00 "DCON0,Development Configuration Register x (x = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCON1,Development Configuration Register x (x = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCON2,Development Configuration Register x (x = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCON3,Development Configuration Register x (x = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCON4,Development Configuration Register x (x = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCON5,Development Configuration Register x (x = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCON6,Development Configuration Register x (x = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCON7,Development Configuration Register x (x = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" line.long 0x20 "STS,Status Register" rbitfld.long 0x20 28.--31. "FS,Flag Stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 27. "TPV,Transmit Parity Value" "0,1" rbitfld.long 0x20 26. "RPV,Receive Parity Value" "0,1" rbitfld.long 0x20 22.--25. "CSF,Current Chip Slave Select Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 19. "LTEF,Large Transmission End Flag" "0,1" rbitfld.long 0x20 18. "SEAF,SE Protection Alarm Flag" "0,1" newline bitfld.long 0x20 17. "STOAF,Slave Timeout Alarm Flag" "0,1" bitfld.long 0x20 16. "SFRAF,Special Function Register Alarm Flag" "0,1" bitfld.long 0x20 15. "USRF,User Interrupt Flag" "0,1" bitfld.long 0x20 14. "SEF,Slave End Flag" "0,1" bitfld.long 0x20 13. "DAIG,Data Ignore Flag" "0,1" bitfld.long 0x20 12. "TSE2F,Transition Stage Event2 Flag" "0,1" newline bitfld.long 0x20 11. "TSE1F,Transition Stage Event1 Flag" "0,1" bitfld.long 0x20 10. "RXF,RXFIFO Request Flag" "0,1" bitfld.long 0x20 9. "TXF,TXFIFO Request Flag" "0,1" hexmask.long.word 0x20 0.--8. 1. "ERRIFS,Interrupt on Errors Event Flags" line.long 0x24 "ESTS,Extended Status Register" bitfld.long 0x24 31. "CSEF,Clock Spike Error Flag" "0,1" bitfld.long 0x24 30. "CSDEN,Clock Spike Detection Enable" "0,1" bitfld.long 0x24 29. "CBDF,Clock Baud Rate Deviation Error Flag" "0,1" bitfld.long 0x24 28. "CBDEN,Clock Baud Rate Detection Enable" "0,1" hexmask.long.byte 0x24 0.--7. 1. "TBCNT,Bit Counter of Transmission" line.long 0x28 "SSCON,Slave Select Configuration Register" hexmask.long.word 0x28 16.--31. 1. "OEB,Enable Bits for the SLSO Outputs" hexmask.long.word 0x28 0.--15. 1. "OAP,Active Polarity for the SLSO Outputs" wgroup.long ad:0xC0080854++0x03 line.long 0x00 "STSC,Status Clear Register" bitfld.long 0x00 19. "LTEFC,Large Transmission End Flag Clear" "0,1" bitfld.long 0x00 18. "SEAC,SE Protection Alarm Flag Clear" "0,1" bitfld.long 0x00 17. "STOAC,Slave Timeout Alarm Flag Clear" "0,1" bitfld.long 0x00 16. "SFRAC,Special Function Register Alarm Flag Clear" "0,1" bitfld.long 0x00 15. "USRC,User Event Flag Clear" "0,1" bitfld.long 0x00 14. "SEFC,Slave End Flag Clear" "0,1" newline bitfld.long 0x00 13. "DAIGC,Data Ignore Flag Clear" "0,1" bitfld.long 0x00 12. "TSE2FC,Transition Stage Event 2 Flag Clear" "0,1" bitfld.long 0x00 11. "TSE1FC,Transition Stage Event 1 Flag Clear" "0,1" bitfld.long 0x00 10. "RXC,Receive Event Flag Clear" "0,1" bitfld.long 0x00 9. "TXC,Transmit Event Flag Clear" "0,1" hexmask.long.word 0x00 0.--8. 1. "ERRFSC,Errors Event Flags Clear" group.long ad:0xC0080858++0x03 line.long 0x00 "LTCON,Large Transmission Configuration Register" hexmask.long.word 0x00 16.--31. 1. "DCNT,Data Counter for Large Transmission" hexmask.long.word 0x00 0.--15. 1. "DLT,Data length of Large Transmission: Number of data bytes to be transmitted in XXL mode (when EMCON.DLU=1 and EMCON.DL = 0)" wgroup.long ad:0xC008085C++0x27 line.long 0x00 "HBRENTRY,HBR_ENTRY Register" line.long 0x04 "EMCONENTRY,EMCON_ENTRY Register" line.long 0x08 "DATAENTRY0,DATA_ENTRY Register n (n = 0~7)" line.long 0x0C "DATAENTRY1,DATA_ENTRY Register n (n = 0~7)" line.long 0x10 "DATAENTRY2,DATA_ENTRY Register n (n = 0~7)" line.long 0x14 "DATAENTRY3,DATA_ENTRY Register n (n = 0~7)" line.long 0x18 "DATAENTRY4,DATA_ENTRY Register n (n = 0~7)" line.long 0x1C "DATAENTRY5,DATA_ENTRY Register n (n = 0~7)" line.long 0x20 "DATAENTRY6,DATA_ENTRY Register n (n = 0~7)" line.long 0x24 "DATAENTRY7,DATA_ENTRY Register n (n = 0~7)" rgroup.long ad:0xC0080890++0x1F line.long 0x00 "RDR0,RXFIFO Data Read Register m (m = 0~7)" line.long 0x04 "RDR1,RXFIFO Data Read Register m (m = 0~7)" line.long 0x08 "RDR2,RXFIFO Data Read Register m (m = 0~7)" line.long 0x0C "RDR3,RXFIFO Data Read Register m (m = 0~7)" line.long 0x10 "RDR4,RXFIFO Data Read Register m (m = 0~7)" line.long 0x14 "RDR5,RXFIFO Data Read Register m (m = 0~7)" line.long 0x18 "RDR6,RXFIFO Data Read Register m (m = 0~7)" line.long 0x1C "RDR7,RXFIFO Data Read Register m (m = 0~7)" group.long ad:0xC00808A0++0x13 line.long 0x00 "ISPCON,Input Sample Register" bitfld.long 0x00 31. "ISEIEN,Input Sample Event Interrupt Enable" "0,1" rbitfld.long 0x00 30. "ISEF,Input Sample Event Flag" "0,1" bitfld.long 0x00 29. "ISEFS,Input Sample Event Flag Set" "0,1" bitfld.long 0x00 28. "ISEFC,Input Sample Event Flag Clear" "0,1" bitfld.long 0x00 20. "ISTEN,Input Sample Timer Enable" "0,1" bitfld.long 0x00 18.--19. "IPS,Input Ports Selection" "0,1,2,3" newline bitfld.long 0x00 16.--17. "SEMD,Sample Edge Mode" "0,1,2,3" rbitfld.long 0x00 15. "STOF,Sample Time-out Event Flag" "0,1" hexmask.long.word 0x00 0.--14. 1. "SREL,Sample Result" line.long 0x04 "MC,Move Counter Register" hexmask.long.word 0x04 16.--28. 1. "RMN,Remaining move Number" hexmask.long.word 0x04 0.--12. 1. "TOMS,Target of Move Step" line.long 0x08 "MCCON,Move Counter Control Register" bitfld.long 0x08 31. "MCEN,Move Counter Enable" "0,1" bitfld.long 0x08 30. "ETEN,Extended Trailing Delay Enable" "0,1" bitfld.long 0x08 23. "AFIS,Set Bit for AFIF" "0,1" bitfld.long 0x08 22. "AFIC,Clear Bit for AFIF" "0,1" rbitfld.long 0x08 21. "AFIF,Interrupt Flag of After Final Data" "0,1" bitfld.long 0x08 20. "AFIEN,Enable Interrupt of After Final Data" "0,1" newline bitfld.long 0x08 19. "BFIS,Set Bit for BFIF" "0,1" bitfld.long 0x08 18. "BFIC,Clear Bit for BFIF" "0,1" rbitfld.long 0x08 17. "BFIF,Interrupt Flag of Before Final Data" "0,1" bitfld.long 0x08 16. "BFIEN,Enable Interrupt of Before Final Data" "0,1" bitfld.long 0x08 3.--5. "ETDL,Extended Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "ETPSC,Prescaler for the Extended Trailing Delay" "0,1,2,3,4,5,6,7" line.long 0x0C "DELAY,Delay Register" hexmask.long.byte 0x0C 0.--5. 1. "DELAYTIME,Delay Time" line.long 0x10 "DATAMODE,Data Mode Register" bitfld.long 0x10 17.--18. "DATASEL,Data-Out Select" "0,1,2,3" hexmask.long.tbyte 0x10 0.--16. 1. "SLAVEDATACNT,Slave Data-Out Delay Count" rgroup.long ad:0xC00808B4++0x03 line.long 0x00 "RDRD,RXFIFO Data Read Debug Register" group.long ad:0xC00808B8++0x03 line.long 0x00 "FIFOTHRESHOLD,FIFO Threshold Register" bitfld.long 0x00 26. "STOEN,Slave Timeout Enable" "0,1" hexmask.long.tbyte 0x00 8.--25. 1. "STORT,Slave Timeout Recovery Time" bitfld.long 0x00 4.--7. "RXTHRESHOLD,Receive FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TXTHRESHOLD,Transmit FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC00808BC++0x03 line.long 0x00 "FIFOLEVEL,FIFO Level Register" bitfld.long 0x00 8.--12. "RXLEVEL,RXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "TXLEVEL,TXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC00808C0++0x1F line.long 0x00 "DCONEG0,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCONEG1,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCONEG2,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCONEG3,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCONEG4,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCONEG5,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCONEG6,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCONEG7,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" tree.end tree "ESPI3" group.long ad:0xD0020004++0x03 line.long 0x00 "SISW,Slave Input Switch Register" bitfld.long 0x00 0.--2. "SMISS,Slave Mode Input Selection Switch" "0,1,2,3,4,5,6,7" rgroup.long ad:0xD0020008++0x03 line.long 0x00 "MDID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. "MDNB,Module Number" hexmask.long.byte 0x00 8.--15. 1. "MDTP,Module Type" hexmask.long.byte 0x00 0.--7. 1. "MDRV,Module Revision Value" group.long ad:0xD0020010++0x0B line.long 0x00 "GNRCON,General Configuration Register" bitfld.long 0x00 30.--31. "SRSTB,Software Reset Bits" "0,1,2,3" bitfld.long 0x00 29. "CLKMUX,Clock Multiplexer" "0,1" bitfld.long 0x00 28. "HDMEN,Half-Duplex Mode Enable" "0,1" bitfld.long 0x00 27. "SATREN,Slave Automatic Reset Enable" "0,1" bitfld.long 0x00 25.--26. "MS,Mode Select" "0,1,2,3" bitfld.long 0x00 24. "EN,Enable Running" "0,1" newline bitfld.long 0x00 23. "HDTRM,Half-Duplex Transmit Receive Mode" "0,1" bitfld.long 0x00 22. "SODP,Slave Output Default Polarity" "0,1" bitfld.long 0x00 21. "TPRF,TXFIFO Pause on RXFIFO Full" "0,1" rbitfld.long 0x00 15. "DLMS,SLSO Delayed Mode Switch for SLSO0" "0,1" bitfld.long 0x00 14. "OLBC,Output Loop-Back Control" "0,1" bitfld.long 0x00 10.--13. "TOV,Time-Out Value for the Expect Phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. "STSI,Status Injection" "0,1" bitfld.long 0x00 8. "SFRBEM,SFR BUS Error Mask" "0,1" hexmask.long.byte 0x00 0.--7. 1. "GTQ,General Time Quantum Length" line.long 0x04 "GNRCON1,General Configuration Register 1" bitfld.long 0x04 31. "RXDREN,RXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 30. "TXDREN,TXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 28.--29. "RXFM,RXFIFO Mode" "0,1,2,3" bitfld.long 0x04 26.--27. "TXFM,TXFIFO Mode" "0,1,2,3" bitfld.long 0x04 23.--25. "TSE2,Transition Stage Event 2" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. "TSE1,Transition Stage Event 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 16. "LTEIEN,Interrupt on Large Transmission End Event Enable" "0,1" bitfld.long 0x04 15. "UEIEN,Interrupt on User Event Enable" "0,1" bitfld.long 0x04 14. "SEFEN,Slave End Flag Enable" "0,1" bitfld.long 0x04 13. "DAIGEN,Data Ignore Enable" "0,1" bitfld.long 0x04 12. "TSE2EN,Interrupt on TSE2 Event Enable" "0,1" bitfld.long 0x04 11. "TSE1EN,Interrupt on TSE1 Event Enable" "0,1" newline bitfld.long 0x04 10. "RXFIEN,Interrupt on RXFIFO Event Enable" "0,1" bitfld.long 0x04 9. "TXFIEN,Interrupt on TXFIFO Event Enable" "0,1" hexmask.long.word 0x04 0.--8. 1. "ERRIENS,Errors Event Interrupt Enable" line.long 0x08 "EMCON,Elementary Configuration Register" bitfld.long 0x08 28.--31. "SCM,Selection Channel Multiplexer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 23.--27. "DL,Data Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 22. "DLU,Data Length Unit" "0,1" bitfld.long 0x08 21. "MSB,Shift MSB or LSB First" "0,1" bitfld.long 0x08 20. "UIOT1,User Interrupt at the TSE1 Event Enable" "0,1" bitfld.long 0x08 19. "PARTYP,Parity Type" "0,1" newline bitfld.long 0x08 16.--18. "TDL,Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 13.--15. "TPSC,Prescaler for the Trailing Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 10.--12. "LDL,Leading Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7.--9. "LPSC,Prescaler for the Leading Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4.--6. "IDL,IDLE Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 1.--3. "IPSC,Prescaler for the IDLE Delay" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "LDB,Last Data Block" "0,1" group.long ad:0xD0020020++0x2B line.long 0x00 "DCON0,Development Configuration Register x (x = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCON1,Development Configuration Register x (x = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCON2,Development Configuration Register x (x = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCON3,Development Configuration Register x (x = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCON4,Development Configuration Register x (x = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCON5,Development Configuration Register x (x = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCON6,Development Configuration Register x (x = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCON7,Development Configuration Register x (x = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" line.long 0x20 "STS,Status Register" rbitfld.long 0x20 28.--31. "FS,Flag Stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 27. "TPV,Transmit Parity Value" "0,1" rbitfld.long 0x20 26. "RPV,Receive Parity Value" "0,1" rbitfld.long 0x20 22.--25. "CSF,Current Chip Slave Select Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 19. "LTEF,Large Transmission End Flag" "0,1" rbitfld.long 0x20 18. "SEAF,SE Protection Alarm Flag" "0,1" newline bitfld.long 0x20 17. "STOAF,Slave Timeout Alarm Flag" "0,1" bitfld.long 0x20 16. "SFRAF,Special Function Register Alarm Flag" "0,1" bitfld.long 0x20 15. "USRF,User Interrupt Flag" "0,1" bitfld.long 0x20 14. "SEF,Slave End Flag" "0,1" bitfld.long 0x20 13. "DAIG,Data Ignore Flag" "0,1" bitfld.long 0x20 12. "TSE2F,Transition Stage Event2 Flag" "0,1" newline bitfld.long 0x20 11. "TSE1F,Transition Stage Event1 Flag" "0,1" bitfld.long 0x20 10. "RXF,RXFIFO Request Flag" "0,1" bitfld.long 0x20 9. "TXF,TXFIFO Request Flag" "0,1" hexmask.long.word 0x20 0.--8. 1. "ERRIFS,Interrupt on Errors Event Flags" line.long 0x24 "ESTS,Extended Status Register" bitfld.long 0x24 31. "CSEF,Clock Spike Error Flag" "0,1" bitfld.long 0x24 30. "CSDEN,Clock Spike Detection Enable" "0,1" bitfld.long 0x24 29. "CBDF,Clock Baud Rate Deviation Error Flag" "0,1" bitfld.long 0x24 28. "CBDEN,Clock Baud Rate Detection Enable" "0,1" hexmask.long.byte 0x24 0.--7. 1. "TBCNT,Bit Counter of Transmission" line.long 0x28 "SSCON,Slave Select Configuration Register" hexmask.long.word 0x28 16.--31. 1. "OEB,Enable Bits for the SLSO Outputs" hexmask.long.word 0x28 0.--15. 1. "OAP,Active Polarity for the SLSO Outputs" wgroup.long ad:0xD0020054++0x03 line.long 0x00 "STSC,Status Clear Register" bitfld.long 0x00 19. "LTEFC,Large Transmission End Flag Clear" "0,1" bitfld.long 0x00 18. "SEAC,SE Protection Alarm Flag Clear" "0,1" bitfld.long 0x00 17. "STOAC,Slave Timeout Alarm Flag Clear" "0,1" bitfld.long 0x00 16. "SFRAC,Special Function Register Alarm Flag Clear" "0,1" bitfld.long 0x00 15. "USRC,User Event Flag Clear" "0,1" bitfld.long 0x00 14. "SEFC,Slave End Flag Clear" "0,1" newline bitfld.long 0x00 13. "DAIGC,Data Ignore Flag Clear" "0,1" bitfld.long 0x00 12. "TSE2FC,Transition Stage Event 2 Flag Clear" "0,1" bitfld.long 0x00 11. "TSE1FC,Transition Stage Event 1 Flag Clear" "0,1" bitfld.long 0x00 10. "RXC,Receive Event Flag Clear" "0,1" bitfld.long 0x00 9. "TXC,Transmit Event Flag Clear" "0,1" hexmask.long.word 0x00 0.--8. 1. "ERRFSC,Errors Event Flags Clear" group.long ad:0xD0020058++0x03 line.long 0x00 "LTCON,Large Transmission Configuration Register" hexmask.long.word 0x00 16.--31. 1. "DCNT,Data Counter for Large Transmission" hexmask.long.word 0x00 0.--15. 1. "DLT,Data length of Large Transmission: Number of data bytes to be transmitted in XXL mode (when EMCON.DLU=1 and EMCON.DL = 0)" wgroup.long ad:0xD002005C++0x27 line.long 0x00 "HBRENTRY,HBR_ENTRY Register" line.long 0x04 "EMCONENTRY,EMCON_ENTRY Register" line.long 0x08 "DATAENTRY0,DATA_ENTRY Register n (n = 0~7)" line.long 0x0C "DATAENTRY1,DATA_ENTRY Register n (n = 0~7)" line.long 0x10 "DATAENTRY2,DATA_ENTRY Register n (n = 0~7)" line.long 0x14 "DATAENTRY3,DATA_ENTRY Register n (n = 0~7)" line.long 0x18 "DATAENTRY4,DATA_ENTRY Register n (n = 0~7)" line.long 0x1C "DATAENTRY5,DATA_ENTRY Register n (n = 0~7)" line.long 0x20 "DATAENTRY6,DATA_ENTRY Register n (n = 0~7)" line.long 0x24 "DATAENTRY7,DATA_ENTRY Register n (n = 0~7)" rgroup.long ad:0xD0020090++0x1F line.long 0x00 "RDR0,RXFIFO Data Read Register m (m = 0~7)" line.long 0x04 "RDR1,RXFIFO Data Read Register m (m = 0~7)" line.long 0x08 "RDR2,RXFIFO Data Read Register m (m = 0~7)" line.long 0x0C "RDR3,RXFIFO Data Read Register m (m = 0~7)" line.long 0x10 "RDR4,RXFIFO Data Read Register m (m = 0~7)" line.long 0x14 "RDR5,RXFIFO Data Read Register m (m = 0~7)" line.long 0x18 "RDR6,RXFIFO Data Read Register m (m = 0~7)" line.long 0x1C "RDR7,RXFIFO Data Read Register m (m = 0~7)" group.long ad:0xD00200A0++0x13 line.long 0x00 "ISPCON,Input Sample Register" bitfld.long 0x00 31. "ISEIEN,Input Sample Event Interrupt Enable" "0,1" rbitfld.long 0x00 30. "ISEF,Input Sample Event Flag" "0,1" bitfld.long 0x00 29. "ISEFS,Input Sample Event Flag Set" "0,1" bitfld.long 0x00 28. "ISEFC,Input Sample Event Flag Clear" "0,1" bitfld.long 0x00 20. "ISTEN,Input Sample Timer Enable" "0,1" bitfld.long 0x00 18.--19. "IPS,Input Ports Selection" "0,1,2,3" newline bitfld.long 0x00 16.--17. "SEMD,Sample Edge Mode" "0,1,2,3" rbitfld.long 0x00 15. "STOF,Sample Time-out Event Flag" "0,1" hexmask.long.word 0x00 0.--14. 1. "SREL,Sample Result" line.long 0x04 "MC,Move Counter Register" hexmask.long.word 0x04 16.--28. 1. "RMN,Remaining move Number" hexmask.long.word 0x04 0.--12. 1. "TOMS,Target of Move Step" line.long 0x08 "MCCON,Move Counter Control Register" bitfld.long 0x08 31. "MCEN,Move Counter Enable" "0,1" bitfld.long 0x08 30. "ETEN,Extended Trailing Delay Enable" "0,1" bitfld.long 0x08 23. "AFIS,Set Bit for AFIF" "0,1" bitfld.long 0x08 22. "AFIC,Clear Bit for AFIF" "0,1" rbitfld.long 0x08 21. "AFIF,Interrupt Flag of After Final Data" "0,1" bitfld.long 0x08 20. "AFIEN,Enable Interrupt of After Final Data" "0,1" newline bitfld.long 0x08 19. "BFIS,Set Bit for BFIF" "0,1" bitfld.long 0x08 18. "BFIC,Clear Bit for BFIF" "0,1" rbitfld.long 0x08 17. "BFIF,Interrupt Flag of Before Final Data" "0,1" bitfld.long 0x08 16. "BFIEN,Enable Interrupt of Before Final Data" "0,1" bitfld.long 0x08 3.--5. "ETDL,Extended Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "ETPSC,Prescaler for the Extended Trailing Delay" "0,1,2,3,4,5,6,7" line.long 0x0C "DELAY,Delay Register" hexmask.long.byte 0x0C 0.--5. 1. "DELAYTIME,Delay Time" line.long 0x10 "DATAMODE,Data Mode Register" bitfld.long 0x10 17.--18. "DATASEL,Data-Out Select" "0,1,2,3" hexmask.long.tbyte 0x10 0.--16. 1. "SLAVEDATACNT,Slave Data-Out Delay Count" rgroup.long ad:0xD00200B4++0x03 line.long 0x00 "RDRD,RXFIFO Data Read Debug Register" group.long ad:0xD00200B8++0x03 line.long 0x00 "FIFOTHRESHOLD,FIFO Threshold Register" bitfld.long 0x00 26. "STOEN,Slave Timeout Enable" "0,1" hexmask.long.tbyte 0x00 8.--25. 1. "STORT,Slave Timeout Recovery Time" bitfld.long 0x00 4.--7. "RXTHRESHOLD,Receive FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TXTHRESHOLD,Transmit FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xD00200BC++0x03 line.long 0x00 "FIFOLEVEL,FIFO Level Register" bitfld.long 0x00 8.--12. "RXLEVEL,RXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "TXLEVEL,TXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD00200C0++0x1F line.long 0x00 "DCONEG0,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCONEG1,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCONEG2,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCONEG3,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCONEG4,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCONEG5,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCONEG6,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCONEG7,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" tree.end tree "ESPI4" group.long ad:0xD0020404++0x03 line.long 0x00 "SISW,Slave Input Switch Register" bitfld.long 0x00 0.--2. "SMISS,Slave Mode Input Selection Switch" "0,1,2,3,4,5,6,7" rgroup.long ad:0xD0020408++0x03 line.long 0x00 "MDID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. "MDNB,Module Number" hexmask.long.byte 0x00 8.--15. 1. "MDTP,Module Type" hexmask.long.byte 0x00 0.--7. 1. "MDRV,Module Revision Value" group.long ad:0xD0020410++0x0B line.long 0x00 "GNRCON,General Configuration Register" bitfld.long 0x00 30.--31. "SRSTB,Software Reset Bits" "0,1,2,3" bitfld.long 0x00 29. "CLKMUX,Clock Multiplexer" "0,1" bitfld.long 0x00 28. "HDMEN,Half-Duplex Mode Enable" "0,1" bitfld.long 0x00 27. "SATREN,Slave Automatic Reset Enable" "0,1" bitfld.long 0x00 25.--26. "MS,Mode Select" "0,1,2,3" bitfld.long 0x00 24. "EN,Enable Running" "0,1" newline bitfld.long 0x00 23. "HDTRM,Half-Duplex Transmit Receive Mode" "0,1" bitfld.long 0x00 22. "SODP,Slave Output Default Polarity" "0,1" bitfld.long 0x00 21. "TPRF,TXFIFO Pause on RXFIFO Full" "0,1" rbitfld.long 0x00 15. "DLMS,SLSO Delayed Mode Switch for SLSO0" "0,1" bitfld.long 0x00 14. "OLBC,Output Loop-Back Control" "0,1" bitfld.long 0x00 10.--13. "TOV,Time-Out Value for the Expect Phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. "STSI,Status Injection" "0,1" bitfld.long 0x00 8. "SFRBEM,SFR BUS Error Mask" "0,1" hexmask.long.byte 0x00 0.--7. 1. "GTQ,General Time Quantum Length" line.long 0x04 "GNRCON1,General Configuration Register 1" bitfld.long 0x04 31. "RXDREN,RXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 30. "TXDREN,TXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 28.--29. "RXFM,RXFIFO Mode" "0,1,2,3" bitfld.long 0x04 26.--27. "TXFM,TXFIFO Mode" "0,1,2,3" bitfld.long 0x04 23.--25. "TSE2,Transition Stage Event 2" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. "TSE1,Transition Stage Event 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 16. "LTEIEN,Interrupt on Large Transmission End Event Enable" "0,1" bitfld.long 0x04 15. "UEIEN,Interrupt on User Event Enable" "0,1" bitfld.long 0x04 14. "SEFEN,Slave End Flag Enable" "0,1" bitfld.long 0x04 13. "DAIGEN,Data Ignore Enable" "0,1" bitfld.long 0x04 12. "TSE2EN,Interrupt on TSE2 Event Enable" "0,1" bitfld.long 0x04 11. "TSE1EN,Interrupt on TSE1 Event Enable" "0,1" newline bitfld.long 0x04 10. "RXFIEN,Interrupt on RXFIFO Event Enable" "0,1" bitfld.long 0x04 9. "TXFIEN,Interrupt on TXFIFO Event Enable" "0,1" hexmask.long.word 0x04 0.--8. 1. "ERRIENS,Errors Event Interrupt Enable" line.long 0x08 "EMCON,Elementary Configuration Register" bitfld.long 0x08 28.--31. "SCM,Selection Channel Multiplexer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 23.--27. "DL,Data Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 22. "DLU,Data Length Unit" "0,1" bitfld.long 0x08 21. "MSB,Shift MSB or LSB First" "0,1" bitfld.long 0x08 20. "UIOT1,User Interrupt at the TSE1 Event Enable" "0,1" bitfld.long 0x08 19. "PARTYP,Parity Type" "0,1" newline bitfld.long 0x08 16.--18. "TDL,Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 13.--15. "TPSC,Prescaler for the Trailing Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 10.--12. "LDL,Leading Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7.--9. "LPSC,Prescaler for the Leading Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4.--6. "IDL,IDLE Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 1.--3. "IPSC,Prescaler for the IDLE Delay" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "LDB,Last Data Block" "0,1" group.long ad:0xD0020420++0x2B line.long 0x00 "DCON0,Development Configuration Register x (x = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCON1,Development Configuration Register x (x = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCON2,Development Configuration Register x (x = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCON3,Development Configuration Register x (x = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCON4,Development Configuration Register x (x = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCON5,Development Configuration Register x (x = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCON6,Development Configuration Register x (x = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCON7,Development Configuration Register x (x = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" line.long 0x20 "STS,Status Register" rbitfld.long 0x20 28.--31. "FS,Flag Stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 27. "TPV,Transmit Parity Value" "0,1" rbitfld.long 0x20 26. "RPV,Receive Parity Value" "0,1" rbitfld.long 0x20 22.--25. "CSF,Current Chip Slave Select Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 19. "LTEF,Large Transmission End Flag" "0,1" rbitfld.long 0x20 18. "SEAF,SE Protection Alarm Flag" "0,1" newline bitfld.long 0x20 17. "STOAF,Slave Timeout Alarm Flag" "0,1" bitfld.long 0x20 16. "SFRAF,Special Function Register Alarm Flag" "0,1" bitfld.long 0x20 15. "USRF,User Interrupt Flag" "0,1" bitfld.long 0x20 14. "SEF,Slave End Flag" "0,1" bitfld.long 0x20 13. "DAIG,Data Ignore Flag" "0,1" bitfld.long 0x20 12. "TSE2F,Transition Stage Event2 Flag" "0,1" newline bitfld.long 0x20 11. "TSE1F,Transition Stage Event1 Flag" "0,1" bitfld.long 0x20 10. "RXF,RXFIFO Request Flag" "0,1" bitfld.long 0x20 9. "TXF,TXFIFO Request Flag" "0,1" hexmask.long.word 0x20 0.--8. 1. "ERRIFS,Interrupt on Errors Event Flags" line.long 0x24 "ESTS,Extended Status Register" bitfld.long 0x24 31. "CSEF,Clock Spike Error Flag" "0,1" bitfld.long 0x24 30. "CSDEN,Clock Spike Detection Enable" "0,1" bitfld.long 0x24 29. "CBDF,Clock Baud Rate Deviation Error Flag" "0,1" bitfld.long 0x24 28. "CBDEN,Clock Baud Rate Detection Enable" "0,1" hexmask.long.byte 0x24 0.--7. 1. "TBCNT,Bit Counter of Transmission" line.long 0x28 "SSCON,Slave Select Configuration Register" hexmask.long.word 0x28 16.--31. 1. "OEB,Enable Bits for the SLSO Outputs" hexmask.long.word 0x28 0.--15. 1. "OAP,Active Polarity for the SLSO Outputs" wgroup.long ad:0xD0020454++0x03 line.long 0x00 "STSC,Status Clear Register" bitfld.long 0x00 19. "LTEFC,Large Transmission End Flag Clear" "0,1" bitfld.long 0x00 18. "SEAC,SE Protection Alarm Flag Clear" "0,1" bitfld.long 0x00 17. "STOAC,Slave Timeout Alarm Flag Clear" "0,1" bitfld.long 0x00 16. "SFRAC,Special Function Register Alarm Flag Clear" "0,1" bitfld.long 0x00 15. "USRC,User Event Flag Clear" "0,1" bitfld.long 0x00 14. "SEFC,Slave End Flag Clear" "0,1" newline bitfld.long 0x00 13. "DAIGC,Data Ignore Flag Clear" "0,1" bitfld.long 0x00 12. "TSE2FC,Transition Stage Event 2 Flag Clear" "0,1" bitfld.long 0x00 11. "TSE1FC,Transition Stage Event 1 Flag Clear" "0,1" bitfld.long 0x00 10. "RXC,Receive Event Flag Clear" "0,1" bitfld.long 0x00 9. "TXC,Transmit Event Flag Clear" "0,1" hexmask.long.word 0x00 0.--8. 1. "ERRFSC,Errors Event Flags Clear" group.long ad:0xD0020458++0x03 line.long 0x00 "LTCON,Large Transmission Configuration Register" hexmask.long.word 0x00 16.--31. 1. "DCNT,Data Counter for Large Transmission" hexmask.long.word 0x00 0.--15. 1. "DLT,Data length of Large Transmission: Number of data bytes to be transmitted in XXL mode (when EMCON.DLU=1 and EMCON.DL = 0)" wgroup.long ad:0xD002045C++0x27 line.long 0x00 "HBRENTRY,HBR_ENTRY Register" line.long 0x04 "EMCONENTRY,EMCON_ENTRY Register" line.long 0x08 "DATAENTRY0,DATA_ENTRY Register n (n = 0~7)" line.long 0x0C "DATAENTRY1,DATA_ENTRY Register n (n = 0~7)" line.long 0x10 "DATAENTRY2,DATA_ENTRY Register n (n = 0~7)" line.long 0x14 "DATAENTRY3,DATA_ENTRY Register n (n = 0~7)" line.long 0x18 "DATAENTRY4,DATA_ENTRY Register n (n = 0~7)" line.long 0x1C "DATAENTRY5,DATA_ENTRY Register n (n = 0~7)" line.long 0x20 "DATAENTRY6,DATA_ENTRY Register n (n = 0~7)" line.long 0x24 "DATAENTRY7,DATA_ENTRY Register n (n = 0~7)" rgroup.long ad:0xD0020490++0x1F line.long 0x00 "RDR0,RXFIFO Data Read Register m (m = 0~7)" line.long 0x04 "RDR1,RXFIFO Data Read Register m (m = 0~7)" line.long 0x08 "RDR2,RXFIFO Data Read Register m (m = 0~7)" line.long 0x0C "RDR3,RXFIFO Data Read Register m (m = 0~7)" line.long 0x10 "RDR4,RXFIFO Data Read Register m (m = 0~7)" line.long 0x14 "RDR5,RXFIFO Data Read Register m (m = 0~7)" line.long 0x18 "RDR6,RXFIFO Data Read Register m (m = 0~7)" line.long 0x1C "RDR7,RXFIFO Data Read Register m (m = 0~7)" group.long ad:0xD00204A0++0x13 line.long 0x00 "ISPCON,Input Sample Register" bitfld.long 0x00 31. "ISEIEN,Input Sample Event Interrupt Enable" "0,1" rbitfld.long 0x00 30. "ISEF,Input Sample Event Flag" "0,1" bitfld.long 0x00 29. "ISEFS,Input Sample Event Flag Set" "0,1" bitfld.long 0x00 28. "ISEFC,Input Sample Event Flag Clear" "0,1" bitfld.long 0x00 20. "ISTEN,Input Sample Timer Enable" "0,1" bitfld.long 0x00 18.--19. "IPS,Input Ports Selection" "0,1,2,3" newline bitfld.long 0x00 16.--17. "SEMD,Sample Edge Mode" "0,1,2,3" rbitfld.long 0x00 15. "STOF,Sample Time-out Event Flag" "0,1" hexmask.long.word 0x00 0.--14. 1. "SREL,Sample Result" line.long 0x04 "MC,Move Counter Register" hexmask.long.word 0x04 16.--28. 1. "RMN,Remaining move Number" hexmask.long.word 0x04 0.--12. 1. "TOMS,Target of Move Step" line.long 0x08 "MCCON,Move Counter Control Register" bitfld.long 0x08 31. "MCEN,Move Counter Enable" "0,1" bitfld.long 0x08 30. "ETEN,Extended Trailing Delay Enable" "0,1" bitfld.long 0x08 23. "AFIS,Set Bit for AFIF" "0,1" bitfld.long 0x08 22. "AFIC,Clear Bit for AFIF" "0,1" rbitfld.long 0x08 21. "AFIF,Interrupt Flag of After Final Data" "0,1" bitfld.long 0x08 20. "AFIEN,Enable Interrupt of After Final Data" "0,1" newline bitfld.long 0x08 19. "BFIS,Set Bit for BFIF" "0,1" bitfld.long 0x08 18. "BFIC,Clear Bit for BFIF" "0,1" rbitfld.long 0x08 17. "BFIF,Interrupt Flag of Before Final Data" "0,1" bitfld.long 0x08 16. "BFIEN,Enable Interrupt of Before Final Data" "0,1" bitfld.long 0x08 3.--5. "ETDL,Extended Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "ETPSC,Prescaler for the Extended Trailing Delay" "0,1,2,3,4,5,6,7" line.long 0x0C "DELAY,Delay Register" hexmask.long.byte 0x0C 0.--5. 1. "DELAYTIME,Delay Time" line.long 0x10 "DATAMODE,Data Mode Register" bitfld.long 0x10 17.--18. "DATASEL,Data-Out Select" "0,1,2,3" hexmask.long.tbyte 0x10 0.--16. 1. "SLAVEDATACNT,Slave Data-Out Delay Count" rgroup.long ad:0xD00204B4++0x03 line.long 0x00 "RDRD,RXFIFO Data Read Debug Register" group.long ad:0xD00204B8++0x03 line.long 0x00 "FIFOTHRESHOLD,FIFO Threshold Register" bitfld.long 0x00 26. "STOEN,Slave Timeout Enable" "0,1" hexmask.long.tbyte 0x00 8.--25. 1. "STORT,Slave Timeout Recovery Time" bitfld.long 0x00 4.--7. "RXTHRESHOLD,Receive FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TXTHRESHOLD,Transmit FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xD00204BC++0x03 line.long 0x00 "FIFOLEVEL,FIFO Level Register" bitfld.long 0x00 8.--12. "RXLEVEL,RXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "TXLEVEL,TXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xD00204C0++0x1F line.long 0x00 "DCONEG0,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCONEG1,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCONEG2,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCONEG3,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCONEG4,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCONEG5,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCONEG6,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCONEG7,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" tree.end tree "ESPI5" group.long ad:0xC0600004++0x03 line.long 0x00 "SISW,Slave Input Switch Register" bitfld.long 0x00 0.--2. "SMISS,Slave Mode Input Selection Switch" "0,1,2,3,4,5,6,7" rgroup.long ad:0xC0600008++0x03 line.long 0x00 "MDID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. "MDNB,Module Number" hexmask.long.byte 0x00 8.--15. 1. "MDTP,Module Type" hexmask.long.byte 0x00 0.--7. 1. "MDRV,Module Revision Value" group.long ad:0xC0600010++0x0B line.long 0x00 "GNRCON,General Configuration Register" bitfld.long 0x00 30.--31. "SRSTB,Software Reset Bits" "0,1,2,3" bitfld.long 0x00 29. "CLKMUX,Clock Multiplexer" "0,1" bitfld.long 0x00 28. "HDMEN,Half-Duplex Mode Enable" "0,1" bitfld.long 0x00 27. "SATREN,Slave Automatic Reset Enable" "0,1" bitfld.long 0x00 25.--26. "MS,Mode Select" "0,1,2,3" bitfld.long 0x00 24. "EN,Enable Running" "0,1" newline bitfld.long 0x00 23. "HDTRM,Half-Duplex Transmit Receive Mode" "0,1" bitfld.long 0x00 22. "SODP,Slave Output Default Polarity" "0,1" bitfld.long 0x00 21. "TPRF,TXFIFO Pause on RXFIFO Full" "0,1" rbitfld.long 0x00 15. "DLMS,SLSO Delayed Mode Switch for SLSO0" "0,1" bitfld.long 0x00 14. "OLBC,Output Loop-Back Control" "0,1" bitfld.long 0x00 10.--13. "TOV,Time-Out Value for the Expect Phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. "STSI,Status Injection" "0,1" bitfld.long 0x00 8. "SFRBEM,SFR BUS Error Mask" "0,1" hexmask.long.byte 0x00 0.--7. 1. "GTQ,General Time Quantum Length" line.long 0x04 "GNRCON1,General Configuration Register 1" bitfld.long 0x04 31. "RXDREN,RXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 30. "TXDREN,TXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 28.--29. "RXFM,RXFIFO Mode" "0,1,2,3" bitfld.long 0x04 26.--27. "TXFM,TXFIFO Mode" "0,1,2,3" bitfld.long 0x04 23.--25. "TSE2,Transition Stage Event 2" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. "TSE1,Transition Stage Event 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 16. "LTEIEN,Interrupt on Large Transmission End Event Enable" "0,1" bitfld.long 0x04 15. "UEIEN,Interrupt on User Event Enable" "0,1" bitfld.long 0x04 14. "SEFEN,Slave End Flag Enable" "0,1" bitfld.long 0x04 13. "DAIGEN,Data Ignore Enable" "0,1" bitfld.long 0x04 12. "TSE2EN,Interrupt on TSE2 Event Enable" "0,1" bitfld.long 0x04 11. "TSE1EN,Interrupt on TSE1 Event Enable" "0,1" newline bitfld.long 0x04 10. "RXFIEN,Interrupt on RXFIFO Event Enable" "0,1" bitfld.long 0x04 9. "TXFIEN,Interrupt on TXFIFO Event Enable" "0,1" hexmask.long.word 0x04 0.--8. 1. "ERRIENS,Errors Event Interrupt Enable" line.long 0x08 "EMCON,Elementary Configuration Register" bitfld.long 0x08 28.--31. "SCM,Selection Channel Multiplexer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 23.--27. "DL,Data Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 22. "DLU,Data Length Unit" "0,1" bitfld.long 0x08 21. "MSB,Shift MSB or LSB First" "0,1" bitfld.long 0x08 20. "UIOT1,User Interrupt at the TSE1 Event Enable" "0,1" bitfld.long 0x08 19. "PARTYP,Parity Type" "0,1" newline bitfld.long 0x08 16.--18. "TDL,Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 13.--15. "TPSC,Prescaler for the Trailing Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 10.--12. "LDL,Leading Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7.--9. "LPSC,Prescaler for the Leading Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4.--6. "IDL,IDLE Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 1.--3. "IPSC,Prescaler for the IDLE Delay" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "LDB,Last Data Block" "0,1" group.long ad:0xC0600020++0x2B line.long 0x00 "DCON0,Development Configuration Register x (x = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCON1,Development Configuration Register x (x = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCON2,Development Configuration Register x (x = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCON3,Development Configuration Register x (x = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCON4,Development Configuration Register x (x = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCON5,Development Configuration Register x (x = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCON6,Development Configuration Register x (x = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCON7,Development Configuration Register x (x = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" line.long 0x20 "STS,Status Register" rbitfld.long 0x20 28.--31. "FS,Flag Stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 27. "TPV,Transmit Parity Value" "0,1" rbitfld.long 0x20 26. "RPV,Receive Parity Value" "0,1" rbitfld.long 0x20 22.--25. "CSF,Current Chip Slave Select Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 19. "LTEF,Large Transmission End Flag" "0,1" rbitfld.long 0x20 18. "SEAF,SE Protection Alarm Flag" "0,1" newline bitfld.long 0x20 17. "STOAF,Slave Timeout Alarm Flag" "0,1" bitfld.long 0x20 16. "SFRAF,Special Function Register Alarm Flag" "0,1" bitfld.long 0x20 15. "USRF,User Interrupt Flag" "0,1" bitfld.long 0x20 14. "SEF,Slave End Flag" "0,1" bitfld.long 0x20 13. "DAIG,Data Ignore Flag" "0,1" bitfld.long 0x20 12. "TSE2F,Transition Stage Event2 Flag" "0,1" newline bitfld.long 0x20 11. "TSE1F,Transition Stage Event1 Flag" "0,1" bitfld.long 0x20 10. "RXF,RXFIFO Request Flag" "0,1" bitfld.long 0x20 9. "TXF,TXFIFO Request Flag" "0,1" hexmask.long.word 0x20 0.--8. 1. "ERRIFS,Interrupt on Errors Event Flags" line.long 0x24 "ESTS,Extended Status Register" bitfld.long 0x24 31. "CSEF,Clock Spike Error Flag" "0,1" bitfld.long 0x24 30. "CSDEN,Clock Spike Detection Enable" "0,1" bitfld.long 0x24 29. "CBDF,Clock Baud Rate Deviation Error Flag" "0,1" bitfld.long 0x24 28. "CBDEN,Clock Baud Rate Detection Enable" "0,1" hexmask.long.byte 0x24 0.--7. 1. "TBCNT,Bit Counter of Transmission" line.long 0x28 "SSCON,Slave Select Configuration Register" hexmask.long.word 0x28 16.--31. 1. "OEB,Enable Bits for the SLSO Outputs" hexmask.long.word 0x28 0.--15. 1. "OAP,Active Polarity for the SLSO Outputs" wgroup.long ad:0xC0600054++0x03 line.long 0x00 "STSC,Status Clear Register" bitfld.long 0x00 19. "LTEFC,Large Transmission End Flag Clear" "0,1" bitfld.long 0x00 18. "SEAC,SE Protection Alarm Flag Clear" "0,1" bitfld.long 0x00 17. "STOAC,Slave Timeout Alarm Flag Clear" "0,1" bitfld.long 0x00 16. "SFRAC,Special Function Register Alarm Flag Clear" "0,1" bitfld.long 0x00 15. "USRC,User Event Flag Clear" "0,1" bitfld.long 0x00 14. "SEFC,Slave End Flag Clear" "0,1" newline bitfld.long 0x00 13. "DAIGC,Data Ignore Flag Clear" "0,1" bitfld.long 0x00 12. "TSE2FC,Transition Stage Event 2 Flag Clear" "0,1" bitfld.long 0x00 11. "TSE1FC,Transition Stage Event 1 Flag Clear" "0,1" bitfld.long 0x00 10. "RXC,Receive Event Flag Clear" "0,1" bitfld.long 0x00 9. "TXC,Transmit Event Flag Clear" "0,1" hexmask.long.word 0x00 0.--8. 1. "ERRFSC,Errors Event Flags Clear" group.long ad:0xC0600058++0x03 line.long 0x00 "LTCON,Large Transmission Configuration Register" hexmask.long.word 0x00 16.--31. 1. "DCNT,Data Counter for Large Transmission" hexmask.long.word 0x00 0.--15. 1. "DLT,Data length of Large Transmission: Number of data bytes to be transmitted in XXL mode (when EMCON.DLU=1 and EMCON.DL = 0)" wgroup.long ad:0xC060005C++0x27 line.long 0x00 "HBRENTRY,HBR_ENTRY Register" line.long 0x04 "EMCONENTRY,EMCON_ENTRY Register" line.long 0x08 "DATAENTRY0,DATA_ENTRY Register n (n = 0~7)" line.long 0x0C "DATAENTRY1,DATA_ENTRY Register n (n = 0~7)" line.long 0x10 "DATAENTRY2,DATA_ENTRY Register n (n = 0~7)" line.long 0x14 "DATAENTRY3,DATA_ENTRY Register n (n = 0~7)" line.long 0x18 "DATAENTRY4,DATA_ENTRY Register n (n = 0~7)" line.long 0x1C "DATAENTRY5,DATA_ENTRY Register n (n = 0~7)" line.long 0x20 "DATAENTRY6,DATA_ENTRY Register n (n = 0~7)" line.long 0x24 "DATAENTRY7,DATA_ENTRY Register n (n = 0~7)" rgroup.long ad:0xC0600090++0x1F line.long 0x00 "RDR0,RXFIFO Data Read Register m (m = 0~7)" line.long 0x04 "RDR1,RXFIFO Data Read Register m (m = 0~7)" line.long 0x08 "RDR2,RXFIFO Data Read Register m (m = 0~7)" line.long 0x0C "RDR3,RXFIFO Data Read Register m (m = 0~7)" line.long 0x10 "RDR4,RXFIFO Data Read Register m (m = 0~7)" line.long 0x14 "RDR5,RXFIFO Data Read Register m (m = 0~7)" line.long 0x18 "RDR6,RXFIFO Data Read Register m (m = 0~7)" line.long 0x1C "RDR7,RXFIFO Data Read Register m (m = 0~7)" group.long ad:0xC06000A0++0x13 line.long 0x00 "ISPCON,Input Sample Register" bitfld.long 0x00 31. "ISEIEN,Input Sample Event Interrupt Enable" "0,1" rbitfld.long 0x00 30. "ISEF,Input Sample Event Flag" "0,1" bitfld.long 0x00 29. "ISEFS,Input Sample Event Flag Set" "0,1" bitfld.long 0x00 28. "ISEFC,Input Sample Event Flag Clear" "0,1" bitfld.long 0x00 20. "ISTEN,Input Sample Timer Enable" "0,1" bitfld.long 0x00 18.--19. "IPS,Input Ports Selection" "0,1,2,3" newline bitfld.long 0x00 16.--17. "SEMD,Sample Edge Mode" "0,1,2,3" rbitfld.long 0x00 15. "STOF,Sample Time-out Event Flag" "0,1" hexmask.long.word 0x00 0.--14. 1. "SREL,Sample Result" line.long 0x04 "MC,Move Counter Register" hexmask.long.word 0x04 16.--28. 1. "RMN,Remaining move Number" hexmask.long.word 0x04 0.--12. 1. "TOMS,Target of Move Step" line.long 0x08 "MCCON,Move Counter Control Register" bitfld.long 0x08 31. "MCEN,Move Counter Enable" "0,1" bitfld.long 0x08 30. "ETEN,Extended Trailing Delay Enable" "0,1" bitfld.long 0x08 23. "AFIS,Set Bit for AFIF" "0,1" bitfld.long 0x08 22. "AFIC,Clear Bit for AFIF" "0,1" rbitfld.long 0x08 21. "AFIF,Interrupt Flag of After Final Data" "0,1" bitfld.long 0x08 20. "AFIEN,Enable Interrupt of After Final Data" "0,1" newline bitfld.long 0x08 19. "BFIS,Set Bit for BFIF" "0,1" bitfld.long 0x08 18. "BFIC,Clear Bit for BFIF" "0,1" rbitfld.long 0x08 17. "BFIF,Interrupt Flag of Before Final Data" "0,1" bitfld.long 0x08 16. "BFIEN,Enable Interrupt of Before Final Data" "0,1" bitfld.long 0x08 3.--5. "ETDL,Extended Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "ETPSC,Prescaler for the Extended Trailing Delay" "0,1,2,3,4,5,6,7" line.long 0x0C "DELAY,Delay Register" hexmask.long.byte 0x0C 0.--5. 1. "DELAYTIME,Delay Time" line.long 0x10 "DATAMODE,Data Mode Register" bitfld.long 0x10 17.--18. "DATASEL,Data-Out Select" "0,1,2,3" hexmask.long.tbyte 0x10 0.--16. 1. "SLAVEDATACNT,Slave Data-Out Delay Count" rgroup.long ad:0xC06000B4++0x03 line.long 0x00 "RDRD,RXFIFO Data Read Debug Register" group.long ad:0xC06000B8++0x03 line.long 0x00 "FIFOTHRESHOLD,FIFO Threshold Register" bitfld.long 0x00 26. "STOEN,Slave Timeout Enable" "0,1" hexmask.long.tbyte 0x00 8.--25. 1. "STORT,Slave Timeout Recovery Time" bitfld.long 0x00 4.--7. "RXTHRESHOLD,Receive FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TXTHRESHOLD,Transmit FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC06000BC++0x03 line.long 0x00 "FIFOLEVEL,FIFO Level Register" bitfld.long 0x00 8.--12. "RXLEVEL,RXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "TXLEVEL,TXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC06000C0++0x1F line.long 0x00 "DCONEG0,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCONEG1,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCONEG2,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCONEG3,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCONEG4,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCONEG5,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCONEG6,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCONEG7,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" tree.end tree "ESPI6" group.long ad:0xC0600404++0x03 line.long 0x00 "SISW,Slave Input Switch Register" bitfld.long 0x00 0.--2. "SMISS,Slave Mode Input Selection Switch" "0,1,2,3,4,5,6,7" rgroup.long ad:0xC0600408++0x03 line.long 0x00 "MDID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. "MDNB,Module Number" hexmask.long.byte 0x00 8.--15. 1. "MDTP,Module Type" hexmask.long.byte 0x00 0.--7. 1. "MDRV,Module Revision Value" group.long ad:0xC0600410++0x0B line.long 0x00 "GNRCON,General Configuration Register" bitfld.long 0x00 30.--31. "SRSTB,Software Reset Bits" "0,1,2,3" bitfld.long 0x00 29. "CLKMUX,Clock Multiplexer" "0,1" bitfld.long 0x00 28. "HDMEN,Half-Duplex Mode Enable" "0,1" bitfld.long 0x00 27. "SATREN,Slave Automatic Reset Enable" "0,1" bitfld.long 0x00 25.--26. "MS,Mode Select" "0,1,2,3" bitfld.long 0x00 24. "EN,Enable Running" "0,1" newline bitfld.long 0x00 23. "HDTRM,Half-Duplex Transmit Receive Mode" "0,1" bitfld.long 0x00 22. "SODP,Slave Output Default Polarity" "0,1" bitfld.long 0x00 21. "TPRF,TXFIFO Pause on RXFIFO Full" "0,1" rbitfld.long 0x00 15. "DLMS,SLSO Delayed Mode Switch for SLSO0" "0,1" bitfld.long 0x00 14. "OLBC,Output Loop-Back Control" "0,1" bitfld.long 0x00 10.--13. "TOV,Time-Out Value for the Expect Phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. "STSI,Status Injection" "0,1" bitfld.long 0x00 8. "SFRBEM,SFR BUS Error Mask" "0,1" hexmask.long.byte 0x00 0.--7. 1. "GTQ,General Time Quantum Length" line.long 0x04 "GNRCON1,General Configuration Register 1" bitfld.long 0x04 31. "RXDREN,RXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 30. "TXDREN,TXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 28.--29. "RXFM,RXFIFO Mode" "0,1,2,3" bitfld.long 0x04 26.--27. "TXFM,TXFIFO Mode" "0,1,2,3" bitfld.long 0x04 23.--25. "TSE2,Transition Stage Event 2" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. "TSE1,Transition Stage Event 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 16. "LTEIEN,Interrupt on Large Transmission End Event Enable" "0,1" bitfld.long 0x04 15. "UEIEN,Interrupt on User Event Enable" "0,1" bitfld.long 0x04 14. "SEFEN,Slave End Flag Enable" "0,1" bitfld.long 0x04 13. "DAIGEN,Data Ignore Enable" "0,1" bitfld.long 0x04 12. "TSE2EN,Interrupt on TSE2 Event Enable" "0,1" bitfld.long 0x04 11. "TSE1EN,Interrupt on TSE1 Event Enable" "0,1" newline bitfld.long 0x04 10. "RXFIEN,Interrupt on RXFIFO Event Enable" "0,1" bitfld.long 0x04 9. "TXFIEN,Interrupt on TXFIFO Event Enable" "0,1" hexmask.long.word 0x04 0.--8. 1. "ERRIENS,Errors Event Interrupt Enable" line.long 0x08 "EMCON,Elementary Configuration Register" bitfld.long 0x08 28.--31. "SCM,Selection Channel Multiplexer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 23.--27. "DL,Data Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 22. "DLU,Data Length Unit" "0,1" bitfld.long 0x08 21. "MSB,Shift MSB or LSB First" "0,1" bitfld.long 0x08 20. "UIOT1,User Interrupt at the TSE1 Event Enable" "0,1" bitfld.long 0x08 19. "PARTYP,Parity Type" "0,1" newline bitfld.long 0x08 16.--18. "TDL,Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 13.--15. "TPSC,Prescaler for the Trailing Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 10.--12. "LDL,Leading Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7.--9. "LPSC,Prescaler for the Leading Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4.--6. "IDL,IDLE Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 1.--3. "IPSC,Prescaler for the IDLE Delay" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "LDB,Last Data Block" "0,1" group.long ad:0xC0600420++0x2B line.long 0x00 "DCON0,Development Configuration Register x (x = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCON1,Development Configuration Register x (x = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCON2,Development Configuration Register x (x = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCON3,Development Configuration Register x (x = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCON4,Development Configuration Register x (x = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCON5,Development Configuration Register x (x = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCON6,Development Configuration Register x (x = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCON7,Development Configuration Register x (x = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" line.long 0x20 "STS,Status Register" rbitfld.long 0x20 28.--31. "FS,Flag Stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 27. "TPV,Transmit Parity Value" "0,1" rbitfld.long 0x20 26. "RPV,Receive Parity Value" "0,1" rbitfld.long 0x20 22.--25. "CSF,Current Chip Slave Select Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 19. "LTEF,Large Transmission End Flag" "0,1" rbitfld.long 0x20 18. "SEAF,SE Protection Alarm Flag" "0,1" newline bitfld.long 0x20 17. "STOAF,Slave Timeout Alarm Flag" "0,1" bitfld.long 0x20 16. "SFRAF,Special Function Register Alarm Flag" "0,1" bitfld.long 0x20 15. "USRF,User Interrupt Flag" "0,1" bitfld.long 0x20 14. "SEF,Slave End Flag" "0,1" bitfld.long 0x20 13. "DAIG,Data Ignore Flag" "0,1" bitfld.long 0x20 12. "TSE2F,Transition Stage Event2 Flag" "0,1" newline bitfld.long 0x20 11. "TSE1F,Transition Stage Event1 Flag" "0,1" bitfld.long 0x20 10. "RXF,RXFIFO Request Flag" "0,1" bitfld.long 0x20 9. "TXF,TXFIFO Request Flag" "0,1" hexmask.long.word 0x20 0.--8. 1. "ERRIFS,Interrupt on Errors Event Flags" line.long 0x24 "ESTS,Extended Status Register" bitfld.long 0x24 31. "CSEF,Clock Spike Error Flag" "0,1" bitfld.long 0x24 30. "CSDEN,Clock Spike Detection Enable" "0,1" bitfld.long 0x24 29. "CBDF,Clock Baud Rate Deviation Error Flag" "0,1" bitfld.long 0x24 28. "CBDEN,Clock Baud Rate Detection Enable" "0,1" hexmask.long.byte 0x24 0.--7. 1. "TBCNT,Bit Counter of Transmission" line.long 0x28 "SSCON,Slave Select Configuration Register" hexmask.long.word 0x28 16.--31. 1. "OEB,Enable Bits for the SLSO Outputs" hexmask.long.word 0x28 0.--15. 1. "OAP,Active Polarity for the SLSO Outputs" wgroup.long ad:0xC0600454++0x03 line.long 0x00 "STSC,Status Clear Register" bitfld.long 0x00 19. "LTEFC,Large Transmission End Flag Clear" "0,1" bitfld.long 0x00 18. "SEAC,SE Protection Alarm Flag Clear" "0,1" bitfld.long 0x00 17. "STOAC,Slave Timeout Alarm Flag Clear" "0,1" bitfld.long 0x00 16. "SFRAC,Special Function Register Alarm Flag Clear" "0,1" bitfld.long 0x00 15. "USRC,User Event Flag Clear" "0,1" bitfld.long 0x00 14. "SEFC,Slave End Flag Clear" "0,1" newline bitfld.long 0x00 13. "DAIGC,Data Ignore Flag Clear" "0,1" bitfld.long 0x00 12. "TSE2FC,Transition Stage Event 2 Flag Clear" "0,1" bitfld.long 0x00 11. "TSE1FC,Transition Stage Event 1 Flag Clear" "0,1" bitfld.long 0x00 10. "RXC,Receive Event Flag Clear" "0,1" bitfld.long 0x00 9. "TXC,Transmit Event Flag Clear" "0,1" hexmask.long.word 0x00 0.--8. 1. "ERRFSC,Errors Event Flags Clear" group.long ad:0xC0600458++0x03 line.long 0x00 "LTCON,Large Transmission Configuration Register" hexmask.long.word 0x00 16.--31. 1. "DCNT,Data Counter for Large Transmission" hexmask.long.word 0x00 0.--15. 1. "DLT,Data length of Large Transmission: Number of data bytes to be transmitted in XXL mode (when EMCON.DLU=1 and EMCON.DL = 0)" wgroup.long ad:0xC060045C++0x27 line.long 0x00 "HBRENTRY,HBR_ENTRY Register" line.long 0x04 "EMCONENTRY,EMCON_ENTRY Register" line.long 0x08 "DATAENTRY0,DATA_ENTRY Register n (n = 0~7)" line.long 0x0C "DATAENTRY1,DATA_ENTRY Register n (n = 0~7)" line.long 0x10 "DATAENTRY2,DATA_ENTRY Register n (n = 0~7)" line.long 0x14 "DATAENTRY3,DATA_ENTRY Register n (n = 0~7)" line.long 0x18 "DATAENTRY4,DATA_ENTRY Register n (n = 0~7)" line.long 0x1C "DATAENTRY5,DATA_ENTRY Register n (n = 0~7)" line.long 0x20 "DATAENTRY6,DATA_ENTRY Register n (n = 0~7)" line.long 0x24 "DATAENTRY7,DATA_ENTRY Register n (n = 0~7)" rgroup.long ad:0xC0600490++0x1F line.long 0x00 "RDR0,RXFIFO Data Read Register m (m = 0~7)" line.long 0x04 "RDR1,RXFIFO Data Read Register m (m = 0~7)" line.long 0x08 "RDR2,RXFIFO Data Read Register m (m = 0~7)" line.long 0x0C "RDR3,RXFIFO Data Read Register m (m = 0~7)" line.long 0x10 "RDR4,RXFIFO Data Read Register m (m = 0~7)" line.long 0x14 "RDR5,RXFIFO Data Read Register m (m = 0~7)" line.long 0x18 "RDR6,RXFIFO Data Read Register m (m = 0~7)" line.long 0x1C "RDR7,RXFIFO Data Read Register m (m = 0~7)" group.long ad:0xC06004A0++0x13 line.long 0x00 "ISPCON,Input Sample Register" bitfld.long 0x00 31. "ISEIEN,Input Sample Event Interrupt Enable" "0,1" rbitfld.long 0x00 30. "ISEF,Input Sample Event Flag" "0,1" bitfld.long 0x00 29. "ISEFS,Input Sample Event Flag Set" "0,1" bitfld.long 0x00 28. "ISEFC,Input Sample Event Flag Clear" "0,1" bitfld.long 0x00 20. "ISTEN,Input Sample Timer Enable" "0,1" bitfld.long 0x00 18.--19. "IPS,Input Ports Selection" "0,1,2,3" newline bitfld.long 0x00 16.--17. "SEMD,Sample Edge Mode" "0,1,2,3" rbitfld.long 0x00 15. "STOF,Sample Time-out Event Flag" "0,1" hexmask.long.word 0x00 0.--14. 1. "SREL,Sample Result" line.long 0x04 "MC,Move Counter Register" hexmask.long.word 0x04 16.--28. 1. "RMN,Remaining move Number" hexmask.long.word 0x04 0.--12. 1. "TOMS,Target of Move Step" line.long 0x08 "MCCON,Move Counter Control Register" bitfld.long 0x08 31. "MCEN,Move Counter Enable" "0,1" bitfld.long 0x08 30. "ETEN,Extended Trailing Delay Enable" "0,1" bitfld.long 0x08 23. "AFIS,Set Bit for AFIF" "0,1" bitfld.long 0x08 22. "AFIC,Clear Bit for AFIF" "0,1" rbitfld.long 0x08 21. "AFIF,Interrupt Flag of After Final Data" "0,1" bitfld.long 0x08 20. "AFIEN,Enable Interrupt of After Final Data" "0,1" newline bitfld.long 0x08 19. "BFIS,Set Bit for BFIF" "0,1" bitfld.long 0x08 18. "BFIC,Clear Bit for BFIF" "0,1" rbitfld.long 0x08 17. "BFIF,Interrupt Flag of Before Final Data" "0,1" bitfld.long 0x08 16. "BFIEN,Enable Interrupt of Before Final Data" "0,1" bitfld.long 0x08 3.--5. "ETDL,Extended Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "ETPSC,Prescaler for the Extended Trailing Delay" "0,1,2,3,4,5,6,7" line.long 0x0C "DELAY,Delay Register" hexmask.long.byte 0x0C 0.--5. 1. "DELAYTIME,Delay Time" line.long 0x10 "DATAMODE,Data Mode Register" bitfld.long 0x10 17.--18. "DATASEL,Data-Out Select" "0,1,2,3" hexmask.long.tbyte 0x10 0.--16. 1. "SLAVEDATACNT,Slave Data-Out Delay Count" rgroup.long ad:0xC06004B4++0x03 line.long 0x00 "RDRD,RXFIFO Data Read Debug Register" group.long ad:0xC06004B8++0x03 line.long 0x00 "FIFOTHRESHOLD,FIFO Threshold Register" bitfld.long 0x00 26. "STOEN,Slave Timeout Enable" "0,1" hexmask.long.tbyte 0x00 8.--25. 1. "STORT,Slave Timeout Recovery Time" bitfld.long 0x00 4.--7. "RXTHRESHOLD,Receive FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TXTHRESHOLD,Transmit FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC06004BC++0x03 line.long 0x00 "FIFOLEVEL,FIFO Level Register" bitfld.long 0x00 8.--12. "RXLEVEL,RXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "TXLEVEL,TXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC06004C0++0x1F line.long 0x00 "DCONEG0,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCONEG1,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCONEG2,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCONEG3,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCONEG4,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCONEG5,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCONEG6,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCONEG7,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" tree.end tree "ESPI7" group.long ad:0xC0600804++0x03 line.long 0x00 "SISW,Slave Input Switch Register" bitfld.long 0x00 0.--2. "SMISS,Slave Mode Input Selection Switch" "0,1,2,3,4,5,6,7" rgroup.long ad:0xC0600808++0x03 line.long 0x00 "MDID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. "MDNB,Module Number" hexmask.long.byte 0x00 8.--15. 1. "MDTP,Module Type" hexmask.long.byte 0x00 0.--7. 1. "MDRV,Module Revision Value" group.long ad:0xC0600810++0x0B line.long 0x00 "GNRCON,General Configuration Register" bitfld.long 0x00 30.--31. "SRSTB,Software Reset Bits" "0,1,2,3" bitfld.long 0x00 29. "CLKMUX,Clock Multiplexer" "0,1" bitfld.long 0x00 28. "HDMEN,Half-Duplex Mode Enable" "0,1" bitfld.long 0x00 27. "SATREN,Slave Automatic Reset Enable" "0,1" bitfld.long 0x00 25.--26. "MS,Mode Select" "0,1,2,3" bitfld.long 0x00 24. "EN,Enable Running" "0,1" newline bitfld.long 0x00 23. "HDTRM,Half-Duplex Transmit Receive Mode" "0,1" bitfld.long 0x00 22. "SODP,Slave Output Default Polarity" "0,1" bitfld.long 0x00 21. "TPRF,TXFIFO Pause on RXFIFO Full" "0,1" rbitfld.long 0x00 15. "DLMS,SLSO Delayed Mode Switch for SLSO0" "0,1" bitfld.long 0x00 14. "OLBC,Output Loop-Back Control" "0,1" bitfld.long 0x00 10.--13. "TOV,Time-Out Value for the Expect Phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. "STSI,Status Injection" "0,1" bitfld.long 0x00 8. "SFRBEM,SFR BUS Error Mask" "0,1" hexmask.long.byte 0x00 0.--7. 1. "GTQ,General Time Quantum Length" line.long 0x04 "GNRCON1,General Configuration Register 1" bitfld.long 0x04 31. "RXDREN,RXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 30. "TXDREN,TXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 28.--29. "RXFM,RXFIFO Mode" "0,1,2,3" bitfld.long 0x04 26.--27. "TXFM,TXFIFO Mode" "0,1,2,3" bitfld.long 0x04 23.--25. "TSE2,Transition Stage Event 2" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. "TSE1,Transition Stage Event 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 16. "LTEIEN,Interrupt on Large Transmission End Event Enable" "0,1" bitfld.long 0x04 15. "UEIEN,Interrupt on User Event Enable" "0,1" bitfld.long 0x04 14. "SEFEN,Slave End Flag Enable" "0,1" bitfld.long 0x04 13. "DAIGEN,Data Ignore Enable" "0,1" bitfld.long 0x04 12. "TSE2EN,Interrupt on TSE2 Event Enable" "0,1" bitfld.long 0x04 11. "TSE1EN,Interrupt on TSE1 Event Enable" "0,1" newline bitfld.long 0x04 10. "RXFIEN,Interrupt on RXFIFO Event Enable" "0,1" bitfld.long 0x04 9. "TXFIEN,Interrupt on TXFIFO Event Enable" "0,1" hexmask.long.word 0x04 0.--8. 1. "ERRIENS,Errors Event Interrupt Enable" line.long 0x08 "EMCON,Elementary Configuration Register" bitfld.long 0x08 28.--31. "SCM,Selection Channel Multiplexer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 23.--27. "DL,Data Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 22. "DLU,Data Length Unit" "0,1" bitfld.long 0x08 21. "MSB,Shift MSB or LSB First" "0,1" bitfld.long 0x08 20. "UIOT1,User Interrupt at the TSE1 Event Enable" "0,1" bitfld.long 0x08 19. "PARTYP,Parity Type" "0,1" newline bitfld.long 0x08 16.--18. "TDL,Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 13.--15. "TPSC,Prescaler for the Trailing Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 10.--12. "LDL,Leading Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7.--9. "LPSC,Prescaler for the Leading Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4.--6. "IDL,IDLE Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 1.--3. "IPSC,Prescaler for the IDLE Delay" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "LDB,Last Data Block" "0,1" group.long ad:0xC0600820++0x2B line.long 0x00 "DCON0,Development Configuration Register x (x = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCON1,Development Configuration Register x (x = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCON2,Development Configuration Register x (x = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCON3,Development Configuration Register x (x = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCON4,Development Configuration Register x (x = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCON5,Development Configuration Register x (x = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCON6,Development Configuration Register x (x = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCON7,Development Configuration Register x (x = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" line.long 0x20 "STS,Status Register" rbitfld.long 0x20 28.--31. "FS,Flag Stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 27. "TPV,Transmit Parity Value" "0,1" rbitfld.long 0x20 26. "RPV,Receive Parity Value" "0,1" rbitfld.long 0x20 22.--25. "CSF,Current Chip Slave Select Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 19. "LTEF,Large Transmission End Flag" "0,1" rbitfld.long 0x20 18. "SEAF,SE Protection Alarm Flag" "0,1" newline bitfld.long 0x20 17. "STOAF,Slave Timeout Alarm Flag" "0,1" bitfld.long 0x20 16. "SFRAF,Special Function Register Alarm Flag" "0,1" bitfld.long 0x20 15. "USRF,User Interrupt Flag" "0,1" bitfld.long 0x20 14. "SEF,Slave End Flag" "0,1" bitfld.long 0x20 13. "DAIG,Data Ignore Flag" "0,1" bitfld.long 0x20 12. "TSE2F,Transition Stage Event2 Flag" "0,1" newline bitfld.long 0x20 11. "TSE1F,Transition Stage Event1 Flag" "0,1" bitfld.long 0x20 10. "RXF,RXFIFO Request Flag" "0,1" bitfld.long 0x20 9. "TXF,TXFIFO Request Flag" "0,1" hexmask.long.word 0x20 0.--8. 1. "ERRIFS,Interrupt on Errors Event Flags" line.long 0x24 "ESTS,Extended Status Register" bitfld.long 0x24 31. "CSEF,Clock Spike Error Flag" "0,1" bitfld.long 0x24 30. "CSDEN,Clock Spike Detection Enable" "0,1" bitfld.long 0x24 29. "CBDF,Clock Baud Rate Deviation Error Flag" "0,1" bitfld.long 0x24 28. "CBDEN,Clock Baud Rate Detection Enable" "0,1" hexmask.long.byte 0x24 0.--7. 1. "TBCNT,Bit Counter of Transmission" line.long 0x28 "SSCON,Slave Select Configuration Register" hexmask.long.word 0x28 16.--31. 1. "OEB,Enable Bits for the SLSO Outputs" hexmask.long.word 0x28 0.--15. 1. "OAP,Active Polarity for the SLSO Outputs" wgroup.long ad:0xC0600854++0x03 line.long 0x00 "STSC,Status Clear Register" bitfld.long 0x00 19. "LTEFC,Large Transmission End Flag Clear" "0,1" bitfld.long 0x00 18. "SEAC,SE Protection Alarm Flag Clear" "0,1" bitfld.long 0x00 17. "STOAC,Slave Timeout Alarm Flag Clear" "0,1" bitfld.long 0x00 16. "SFRAC,Special Function Register Alarm Flag Clear" "0,1" bitfld.long 0x00 15. "USRC,User Event Flag Clear" "0,1" bitfld.long 0x00 14. "SEFC,Slave End Flag Clear" "0,1" newline bitfld.long 0x00 13. "DAIGC,Data Ignore Flag Clear" "0,1" bitfld.long 0x00 12. "TSE2FC,Transition Stage Event 2 Flag Clear" "0,1" bitfld.long 0x00 11. "TSE1FC,Transition Stage Event 1 Flag Clear" "0,1" bitfld.long 0x00 10. "RXC,Receive Event Flag Clear" "0,1" bitfld.long 0x00 9. "TXC,Transmit Event Flag Clear" "0,1" hexmask.long.word 0x00 0.--8. 1. "ERRFSC,Errors Event Flags Clear" group.long ad:0xC0600858++0x03 line.long 0x00 "LTCON,Large Transmission Configuration Register" hexmask.long.word 0x00 16.--31. 1. "DCNT,Data Counter for Large Transmission" hexmask.long.word 0x00 0.--15. 1. "DLT,Data length of Large Transmission: Number of data bytes to be transmitted in XXL mode (when EMCON.DLU=1 and EMCON.DL = 0)" wgroup.long ad:0xC060085C++0x27 line.long 0x00 "HBRENTRY,HBR_ENTRY Register" line.long 0x04 "EMCONENTRY,EMCON_ENTRY Register" line.long 0x08 "DATAENTRY0,DATA_ENTRY Register n (n = 0~7)" line.long 0x0C "DATAENTRY1,DATA_ENTRY Register n (n = 0~7)" line.long 0x10 "DATAENTRY2,DATA_ENTRY Register n (n = 0~7)" line.long 0x14 "DATAENTRY3,DATA_ENTRY Register n (n = 0~7)" line.long 0x18 "DATAENTRY4,DATA_ENTRY Register n (n = 0~7)" line.long 0x1C "DATAENTRY5,DATA_ENTRY Register n (n = 0~7)" line.long 0x20 "DATAENTRY6,DATA_ENTRY Register n (n = 0~7)" line.long 0x24 "DATAENTRY7,DATA_ENTRY Register n (n = 0~7)" rgroup.long ad:0xC0600890++0x1F line.long 0x00 "RDR0,RXFIFO Data Read Register m (m = 0~7)" line.long 0x04 "RDR1,RXFIFO Data Read Register m (m = 0~7)" line.long 0x08 "RDR2,RXFIFO Data Read Register m (m = 0~7)" line.long 0x0C "RDR3,RXFIFO Data Read Register m (m = 0~7)" line.long 0x10 "RDR4,RXFIFO Data Read Register m (m = 0~7)" line.long 0x14 "RDR5,RXFIFO Data Read Register m (m = 0~7)" line.long 0x18 "RDR6,RXFIFO Data Read Register m (m = 0~7)" line.long 0x1C "RDR7,RXFIFO Data Read Register m (m = 0~7)" group.long ad:0xC06008A0++0x13 line.long 0x00 "ISPCON,Input Sample Register" bitfld.long 0x00 31. "ISEIEN,Input Sample Event Interrupt Enable" "0,1" rbitfld.long 0x00 30. "ISEF,Input Sample Event Flag" "0,1" bitfld.long 0x00 29. "ISEFS,Input Sample Event Flag Set" "0,1" bitfld.long 0x00 28. "ISEFC,Input Sample Event Flag Clear" "0,1" bitfld.long 0x00 20. "ISTEN,Input Sample Timer Enable" "0,1" bitfld.long 0x00 18.--19. "IPS,Input Ports Selection" "0,1,2,3" newline bitfld.long 0x00 16.--17. "SEMD,Sample Edge Mode" "0,1,2,3" rbitfld.long 0x00 15. "STOF,Sample Time-out Event Flag" "0,1" hexmask.long.word 0x00 0.--14. 1. "SREL,Sample Result" line.long 0x04 "MC,Move Counter Register" hexmask.long.word 0x04 16.--28. 1. "RMN,Remaining move Number" hexmask.long.word 0x04 0.--12. 1. "TOMS,Target of Move Step" line.long 0x08 "MCCON,Move Counter Control Register" bitfld.long 0x08 31. "MCEN,Move Counter Enable" "0,1" bitfld.long 0x08 30. "ETEN,Extended Trailing Delay Enable" "0,1" bitfld.long 0x08 23. "AFIS,Set Bit for AFIF" "0,1" bitfld.long 0x08 22. "AFIC,Clear Bit for AFIF" "0,1" rbitfld.long 0x08 21. "AFIF,Interrupt Flag of After Final Data" "0,1" bitfld.long 0x08 20. "AFIEN,Enable Interrupt of After Final Data" "0,1" newline bitfld.long 0x08 19. "BFIS,Set Bit for BFIF" "0,1" bitfld.long 0x08 18. "BFIC,Clear Bit for BFIF" "0,1" rbitfld.long 0x08 17. "BFIF,Interrupt Flag of Before Final Data" "0,1" bitfld.long 0x08 16. "BFIEN,Enable Interrupt of Before Final Data" "0,1" bitfld.long 0x08 3.--5. "ETDL,Extended Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "ETPSC,Prescaler for the Extended Trailing Delay" "0,1,2,3,4,5,6,7" line.long 0x0C "DELAY,Delay Register" hexmask.long.byte 0x0C 0.--5. 1. "DELAYTIME,Delay Time" line.long 0x10 "DATAMODE,Data Mode Register" bitfld.long 0x10 17.--18. "DATASEL,Data-Out Select" "0,1,2,3" hexmask.long.tbyte 0x10 0.--16. 1. "SLAVEDATACNT,Slave Data-Out Delay Count" rgroup.long ad:0xC06008B4++0x03 line.long 0x00 "RDRD,RXFIFO Data Read Debug Register" group.long ad:0xC06008B8++0x03 line.long 0x00 "FIFOTHRESHOLD,FIFO Threshold Register" bitfld.long 0x00 26. "STOEN,Slave Timeout Enable" "0,1" hexmask.long.tbyte 0x00 8.--25. 1. "STORT,Slave Timeout Recovery Time" bitfld.long 0x00 4.--7. "RXTHRESHOLD,Receive FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TXTHRESHOLD,Transmit FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC06008BC++0x03 line.long 0x00 "FIFOLEVEL,FIFO Level Register" bitfld.long 0x00 8.--12. "RXLEVEL,RXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "TXLEVEL,TXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC06008C0++0x1F line.long 0x00 "DCONEG0,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCONEG1,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCONEG2,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCONEG3,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCONEG4,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCONEG5,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCONEG6,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCONEG7,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" tree.end tree "ESPI8" group.long ad:0xC0600C04++0x03 line.long 0x00 "SISW,Slave Input Switch Register" bitfld.long 0x00 0.--2. "SMISS,Slave Mode Input Selection Switch" "0,1,2,3,4,5,6,7" rgroup.long ad:0xC0600C08++0x03 line.long 0x00 "MDID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. "MDNB,Module Number" hexmask.long.byte 0x00 8.--15. 1. "MDTP,Module Type" hexmask.long.byte 0x00 0.--7. 1. "MDRV,Module Revision Value" group.long ad:0xC0600C10++0x0B line.long 0x00 "GNRCON,General Configuration Register" bitfld.long 0x00 30.--31. "SRSTB,Software Reset Bits" "0,1,2,3" bitfld.long 0x00 29. "CLKMUX,Clock Multiplexer" "0,1" bitfld.long 0x00 28. "HDMEN,Half-Duplex Mode Enable" "0,1" bitfld.long 0x00 27. "SATREN,Slave Automatic Reset Enable" "0,1" bitfld.long 0x00 25.--26. "MS,Mode Select" "0,1,2,3" bitfld.long 0x00 24. "EN,Enable Running" "0,1" newline bitfld.long 0x00 23. "HDTRM,Half-Duplex Transmit Receive Mode" "0,1" bitfld.long 0x00 22. "SODP,Slave Output Default Polarity" "0,1" bitfld.long 0x00 21. "TPRF,TXFIFO Pause on RXFIFO Full" "0,1" rbitfld.long 0x00 15. "DLMS,SLSO Delayed Mode Switch for SLSO0" "0,1" bitfld.long 0x00 14. "OLBC,Output Loop-Back Control" "0,1" bitfld.long 0x00 10.--13. "TOV,Time-Out Value for the Expect Phase" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. "STSI,Status Injection" "0,1" bitfld.long 0x00 8. "SFRBEM,SFR BUS Error Mask" "0,1" hexmask.long.byte 0x00 0.--7. 1. "GTQ,General Time Quantum Length" line.long 0x04 "GNRCON1,General Configuration Register 1" bitfld.long 0x04 31. "RXDREN,RXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 30. "TXDREN,TXFIFO DMA Request Enable" "0,1" bitfld.long 0x04 28.--29. "RXFM,RXFIFO Mode" "0,1,2,3" bitfld.long 0x04 26.--27. "TXFM,TXFIFO Mode" "0,1,2,3" bitfld.long 0x04 23.--25. "TSE2,Transition Stage Event 2" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. "TSE1,Transition Stage Event 1" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 16. "LTEIEN,Interrupt on Large Transmission End Event Enable" "0,1" bitfld.long 0x04 15. "UEIEN,Interrupt on User Event Enable" "0,1" bitfld.long 0x04 14. "SEFEN,Slave End Flag Enable" "0,1" bitfld.long 0x04 13. "DAIGEN,Data Ignore Enable" "0,1" bitfld.long 0x04 12. "TSE2EN,Interrupt on TSE2 Event Enable" "0,1" bitfld.long 0x04 11. "TSE1EN,Interrupt on TSE1 Event Enable" "0,1" newline bitfld.long 0x04 10. "RXFIEN,Interrupt on RXFIFO Event Enable" "0,1" bitfld.long 0x04 9. "TXFIEN,Interrupt on TXFIFO Event Enable" "0,1" hexmask.long.word 0x04 0.--8. 1. "ERRIENS,Errors Event Interrupt Enable" line.long 0x08 "EMCON,Elementary Configuration Register" bitfld.long 0x08 28.--31. "SCM,Selection Channel Multiplexer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 23.--27. "DL,Data Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 22. "DLU,Data Length Unit" "0,1" bitfld.long 0x08 21. "MSB,Shift MSB or LSB First" "0,1" bitfld.long 0x08 20. "UIOT1,User Interrupt at the TSE1 Event Enable" "0,1" bitfld.long 0x08 19. "PARTYP,Parity Type" "0,1" newline bitfld.long 0x08 16.--18. "TDL,Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 13.--15. "TPSC,Prescaler for the Trailing Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 10.--12. "LDL,Leading Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 7.--9. "LPSC,Prescaler for the Leading Delay" "0,1,2,3,4,5,6,7" bitfld.long 0x08 4.--6. "IDL,IDLE Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 1.--3. "IPSC,Prescaler for the IDLE Delay" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "LDB,Last Data Block" "0,1" group.long ad:0xC0600C20++0x2B line.long 0x00 "DCON0,Development Configuration Register x (x = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCON1,Development Configuration Register x (x = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCON2,Development Configuration Register x (x = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCON3,Development Configuration Register x (x = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCON4,Development Configuration Register x (x = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCON5,Development Configuration Register x (x = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCON6,Development Configuration Register x (x = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCON7,Development Configuration Register x (x = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" line.long 0x20 "STS,Status Register" rbitfld.long 0x20 28.--31. "FS,Flag Stage" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 27. "TPV,Transmit Parity Value" "0,1" rbitfld.long 0x20 26. "RPV,Receive Parity Value" "0,1" rbitfld.long 0x20 22.--25. "CSF,Current Chip Slave Select Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x20 19. "LTEF,Large Transmission End Flag" "0,1" rbitfld.long 0x20 18. "SEAF,SE Protection Alarm Flag" "0,1" newline bitfld.long 0x20 17. "STOAF,Slave Timeout Alarm Flag" "0,1" bitfld.long 0x20 16. "SFRAF,Special Function Register Alarm Flag" "0,1" bitfld.long 0x20 15. "USRF,User Interrupt Flag" "0,1" bitfld.long 0x20 14. "SEF,Slave End Flag" "0,1" bitfld.long 0x20 13. "DAIG,Data Ignore Flag" "0,1" bitfld.long 0x20 12. "TSE2F,Transition Stage Event2 Flag" "0,1" newline bitfld.long 0x20 11. "TSE1F,Transition Stage Event1 Flag" "0,1" bitfld.long 0x20 10. "RXF,RXFIFO Request Flag" "0,1" bitfld.long 0x20 9. "TXF,TXFIFO Request Flag" "0,1" hexmask.long.word 0x20 0.--8. 1. "ERRIFS,Interrupt on Errors Event Flags" line.long 0x24 "ESTS,Extended Status Register" bitfld.long 0x24 31. "CSEF,Clock Spike Error Flag" "0,1" bitfld.long 0x24 30. "CSDEN,Clock Spike Detection Enable" "0,1" bitfld.long 0x24 29. "CBDF,Clock Baud Rate Deviation Error Flag" "0,1" bitfld.long 0x24 28. "CBDEN,Clock Baud Rate Detection Enable" "0,1" hexmask.long.byte 0x24 0.--7. 1. "TBCNT,Bit Counter of Transmission" line.long 0x28 "SSCON,Slave Select Configuration Register" hexmask.long.word 0x28 16.--31. 1. "OEB,Enable Bits for the SLSO Outputs" hexmask.long.word 0x28 0.--15. 1. "OAP,Active Polarity for the SLSO Outputs" wgroup.long ad:0xC0600C54++0x03 line.long 0x00 "STSC,Status Clear Register" bitfld.long 0x00 19. "LTEFC,Large Transmission End Flag Clear" "0,1" bitfld.long 0x00 18. "SEAC,SE Protection Alarm Flag Clear" "0,1" bitfld.long 0x00 17. "STOAC,Slave Timeout Alarm Flag Clear" "0,1" bitfld.long 0x00 16. "SFRAC,Special Function Register Alarm Flag Clear" "0,1" bitfld.long 0x00 15. "USRC,User Event Flag Clear" "0,1" bitfld.long 0x00 14. "SEFC,Slave End Flag Clear" "0,1" newline bitfld.long 0x00 13. "DAIGC,Data Ignore Flag Clear" "0,1" bitfld.long 0x00 12. "TSE2FC,Transition Stage Event 2 Flag Clear" "0,1" bitfld.long 0x00 11. "TSE1FC,Transition Stage Event 1 Flag Clear" "0,1" bitfld.long 0x00 10. "RXC,Receive Event Flag Clear" "0,1" bitfld.long 0x00 9. "TXC,Transmit Event Flag Clear" "0,1" hexmask.long.word 0x00 0.--8. 1. "ERRFSC,Errors Event Flags Clear" group.long ad:0xC0600C58++0x03 line.long 0x00 "LTCON,Large Transmission Configuration Register" hexmask.long.word 0x00 16.--31. 1. "DCNT,Data Counter for Large Transmission" hexmask.long.word 0x00 0.--15. 1. "DLT,Data length of Large Transmission: Number of data bytes to be transmitted in XXL mode (when EMCON.DLU=1 and EMCON.DL = 0)" wgroup.long ad:0xC0600C5C++0x27 line.long 0x00 "HBRENTRY,HBR_ENTRY Register" line.long 0x04 "EMCONENTRY,EMCON_ENTRY Register" line.long 0x08 "DATAENTRY0,DATA_ENTRY Register n (n = 0~7)" line.long 0x0C "DATAENTRY1,DATA_ENTRY Register n (n = 0~7)" line.long 0x10 "DATAENTRY2,DATA_ENTRY Register n (n = 0~7)" line.long 0x14 "DATAENTRY3,DATA_ENTRY Register n (n = 0~7)" line.long 0x18 "DATAENTRY4,DATA_ENTRY Register n (n = 0~7)" line.long 0x1C "DATAENTRY5,DATA_ENTRY Register n (n = 0~7)" line.long 0x20 "DATAENTRY6,DATA_ENTRY Register n (n = 0~7)" line.long 0x24 "DATAENTRY7,DATA_ENTRY Register n (n = 0~7)" rgroup.long ad:0xC0600C90++0x1F line.long 0x00 "RDR0,RXFIFO Data Read Register m (m = 0~7)" line.long 0x04 "RDR1,RXFIFO Data Read Register m (m = 0~7)" line.long 0x08 "RDR2,RXFIFO Data Read Register m (m = 0~7)" line.long 0x0C "RDR3,RXFIFO Data Read Register m (m = 0~7)" line.long 0x10 "RDR4,RXFIFO Data Read Register m (m = 0~7)" line.long 0x14 "RDR5,RXFIFO Data Read Register m (m = 0~7)" line.long 0x18 "RDR6,RXFIFO Data Read Register m (m = 0~7)" line.long 0x1C "RDR7,RXFIFO Data Read Register m (m = 0~7)" group.long ad:0xC0600CA0++0x13 line.long 0x00 "ISPCON,Input Sample Register" bitfld.long 0x00 31. "ISEIEN,Input Sample Event Interrupt Enable" "0,1" rbitfld.long 0x00 30. "ISEF,Input Sample Event Flag" "0,1" bitfld.long 0x00 29. "ISEFS,Input Sample Event Flag Set" "0,1" bitfld.long 0x00 28. "ISEFC,Input Sample Event Flag Clear" "0,1" bitfld.long 0x00 20. "ISTEN,Input Sample Timer Enable" "0,1" bitfld.long 0x00 18.--19. "IPS,Input Ports Selection" "0,1,2,3" newline bitfld.long 0x00 16.--17. "SEMD,Sample Edge Mode" "0,1,2,3" rbitfld.long 0x00 15. "STOF,Sample Time-out Event Flag" "0,1" hexmask.long.word 0x00 0.--14. 1. "SREL,Sample Result" line.long 0x04 "MC,Move Counter Register" hexmask.long.word 0x04 16.--28. 1. "RMN,Remaining move Number" hexmask.long.word 0x04 0.--12. 1. "TOMS,Target of Move Step" line.long 0x08 "MCCON,Move Counter Control Register" bitfld.long 0x08 31. "MCEN,Move Counter Enable" "0,1" bitfld.long 0x08 30. "ETEN,Extended Trailing Delay Enable" "0,1" bitfld.long 0x08 23. "AFIS,Set Bit for AFIF" "0,1" bitfld.long 0x08 22. "AFIC,Clear Bit for AFIF" "0,1" rbitfld.long 0x08 21. "AFIF,Interrupt Flag of After Final Data" "0,1" bitfld.long 0x08 20. "AFIEN,Enable Interrupt of After Final Data" "0,1" newline bitfld.long 0x08 19. "BFIS,Set Bit for BFIF" "0,1" bitfld.long 0x08 18. "BFIC,Clear Bit for BFIF" "0,1" rbitfld.long 0x08 17. "BFIF,Interrupt Flag of Before Final Data" "0,1" bitfld.long 0x08 16. "BFIEN,Enable Interrupt of Before Final Data" "0,1" bitfld.long 0x08 3.--5. "ETDL,Extended Trailing Delay Length" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. "ETPSC,Prescaler for the Extended Trailing Delay" "0,1,2,3,4,5,6,7" line.long 0x0C "DELAY,Delay Register" hexmask.long.byte 0x0C 0.--5. 1. "DELAYTIME,Delay Time" line.long 0x10 "DATAMODE,Data Mode Register" bitfld.long 0x10 17.--18. "DATASEL,Data-Out Select" "0,1,2,3" hexmask.long.tbyte 0x10 0.--16. 1. "SLAVEDATACNT,Slave Data-Out Delay Count" rgroup.long ad:0xC0600CB4++0x03 line.long 0x00 "RDRD,RXFIFO Data Read Debug Register" group.long ad:0xC0600CB8++0x03 line.long 0x00 "FIFOTHRESHOLD,FIFO Threshold Register" bitfld.long 0x00 26. "STOEN,Slave Timeout Enable" "0,1" hexmask.long.tbyte 0x00 8.--25. 1. "STORT,Slave Timeout Recovery Time" bitfld.long 0x00 4.--7. "RXTHRESHOLD,Receive FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "TXTHRESHOLD,Transmit FIFO Interrupt Threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC0600CBC++0x03 line.long 0x00 "FIFOLEVEL,FIFO Level Register" bitfld.long 0x00 8.--12. "RXLEVEL,RXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "TXLEVEL,TXFIFO Filling Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC0600CC0++0x1F line.long 0x00 "DCONEG0,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x00 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x00 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x00 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x00 12. "CPH,Clock Phase" "0,1" bitfld.long 0x00 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x00 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x00 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x00 0.--5. 1. "TQ,Time Quantum" line.long 0x04 "DCONEG1,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x04 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x04 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x04 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x04 12. "CPH,Clock Phase" "0,1" bitfld.long 0x04 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x04 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x04 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x04 0.--5. 1. "TQ,Time Quantum" line.long 0x08 "DCONEG2,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x08 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x08 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x08 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x08 12. "CPH,Clock Phase" "0,1" bitfld.long 0x08 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x08 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x08 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x08 0.--5. 1. "TQ,Time Quantum" line.long 0x0C "DCONEG3,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x0C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x0C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x0C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x0C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x0C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x0C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x0C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x0C 0.--5. 1. "TQ,Time Quantum" line.long 0x10 "DCONEG4,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x10 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x10 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x10 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x10 12. "CPH,Clock Phase" "0,1" bitfld.long 0x10 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x10 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x10 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x10 0.--5. 1. "TQ,Time Quantum" line.long 0x14 "DCONEG5,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x14 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x14 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x14 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x14 12. "CPH,Clock Phase" "0,1" bitfld.long 0x14 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x14 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x14 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x14 0.--5. 1. "TQ,Time Quantum" line.long 0x18 "DCONEG6,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x18 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x18 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x18 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x18 12. "CPH,Clock Phase" "0,1" bitfld.long 0x18 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x18 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x18 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x18 0.--5. 1. "TQ,Time Quantum" line.long 0x1C "DCONEG7,Development Configuration Extended Group Register y (y = 0~7)" bitfld.long 0x1C 30.--31. "DFBEN,Data Format for Big Endian" "0,1,2,3" bitfld.long 0x1C 14. "PRTEN,Enable Parity Check" "0,1" bitfld.long 0x1C 13. "CPOL,Clock Polarity" "0,1" bitfld.long 0x1C 12. "CPH,Clock Phase" "0,1" bitfld.long 0x1C 10.--11. "CSC,Clock Cycle Segment C" "0,1,2,3" bitfld.long 0x1C 8.--9. "CSB,Clock Cycle Segment B" "0,1,2,3" newline bitfld.long 0x1C 6.--7. "CSA,Clock Cycle Segment A" "0,1,2,3" hexmask.long.byte 0x1C 0.--5. 1. "TQ,Time Quantum" tree.end tree.end tree "QSPI" group.long ad:0x95000000++0x17 line.long 0x00 "CMDW0,Command Queue Word 0" line.long 0x04 "CMDW1,Command Queue Word 1" bitfld.long 0x04 28. "CREADEN,Continuous Read Mode Enable" "0,1" bitfld.long 0x04 24.--25. "INSLEN,Instruction length" "0,1,2,3" hexmask.long.byte 0x04 16.--23. 1. "DUMCYC,Second Dummy State Cycle" bitfld.long 0x04 0.--2. "ADDRLEN,Address Length" "0,1,2,3,4,5,6,7" line.long 0x08 "CMDW2,Command Queue Word 2" line.long 0x0C "CMDW3,Command Queue Word 3" hexmask.long.byte 0x0C 24.--31. 1. "INSCODE,Instruction Code" hexmask.long.byte 0x0C 16.--23. 1. "CREADCODE,Continuous Read Mode Code" bitfld.long 0x0C 8.--9. "CSSELECT,CS Select" "0,1,2,3" bitfld.long 0x0C 5.--7. "OPRMODE,Operate Mode" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 3. "RSTS,Read Status" "0,1" bitfld.long 0x0C 2. "RSTSEN,Read Status Enable" "0,1" bitfld.long 0x0C 1. "WEN,Write Enable SPI" "0,1" line.long 0x10 "CR,Control Register" bitfld.long 0x10 20. "XIPSEL,XIP Port Selection" "0,1" bitfld.long 0x10 16.--18. "READY,Ready Bit of the SPI Flash Status" "0,1,2,3,4,5,6,7" bitfld.long 0x10 8. "ABORT,Flush All Commands/FIFOs and Reset The State Machine" "0,1" rbitfld.long 0x10 7. "XIP_PORT_IDLE,XIP Port Idle Status" "0,1" bitfld.long 0x10 4. "CLKMODE,SPI CLK Mode at The Idle Status" "0,1" bitfld.long 0x10 0.--1. "DIV,SPI CLK Divider" "0,1,2,3" line.long 0x14 "ACTR,AC Timing Register" bitfld.long 0x14 0.--3. "CSDLY,CS Delay" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0x95000018++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 1. "RXF,RxFIFO Ready Status" "0,1" bitfld.long 0x00 0. "TXE,TxFIFO Ready Status" "0,1" group.long ad:0x95000020++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 12.--13. "RXFIFO_THOD,RXFIFO THOD" "0,1,2,3" bitfld.long 0x00 8.--9. "TXFIFO_THOD,TXFIFO THOD" "0,1,2,3" bitfld.long 0x00 1. "CMDOVEREN,Command Complete Interrupt Enable" "0,1" bitfld.long 0x00 0. "DMAEN,DMA Enable" "0,1" line.long 0x04 "ISR,Interrupt Status Register" bitfld.long 0x04 0. "CMDCPESTS,Command Complete Status" "0,1" rgroup.long ad:0x95000028++0x03 line.long 0x00 "SPISR,SPI Read Status Register" hexmask.long.byte 0x00 0.--7. 1. "RSTS,Read Status" group.long ad:0x9500002C++0x07 line.long 0x00 "SPIFSR,SPI Flash Size Register" hexmask.long.byte 0x00 0.--7. 1. "FLASE,SPI Flash Size" line.long 0x04 "XIPCMD,XIP Command Word" bitfld.long 0x04 29.--30. "CSSEL,CS Select" "0,1,2,3" bitfld.long 0x04 28. "IOMODEEN,Quad/Dual IO Mode Enable" "0,1" hexmask.long.byte 0x04 20.--27. 1. "IOMODECODE,Quad/Dual IO Mode Code for The XIP Port" hexmask.long.byte 0x04 12.--19. 1. "ISNCODE,Instruction Code" bitfld.long 0x04 11. "ADDRLEN,Address Length" "0,1" bitfld.long 0x04 8.--10. "OPRMODE,Operate Mode" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 0.--7. 1. "DUMCYC,Second Dummy State Cycle for XIP Port" group.long ad:0x95000058++0x07 line.long 0x00 "SCKDLYCON,SCK Delay Control Register" bitfld.long 0x00 8. "SCKIOMOD,SPI Clock IO Mode" "0,1" hexmask.long.byte 0x00 0.--7. 1. "SCKDLYSEL,SPI Clock Delay Select" line.long 0x04 "XIPADLENCON,XIP Address Length Control Register" bitfld.long 0x04 0.--1. "INSTRUC_LEN,Instruction Length for XIP Port" "0,1,2,3" group.long ad:0x95000100++0x03 line.long 0x00 "DR,Data Register" tree.end tree "I2C" group.long ad:0xD009A000++0x17 line.long 0x00 "CR1,Control Register 1" bitfld.long 0x00 15. "SWRST,Software Reset" "0,1" bitfld.long 0x00 12. "PEC,Packet Error Check" "0,1" bitfld.long 0x00 11. "POS,ACK/PEC Position (in Data Reception)" "0,1" bitfld.long 0x00 10. "ACK,Acknowledge Enable" "0,1" bitfld.long 0x00 9. "STOP,Stop Generation" "0,1" bitfld.long 0x00 8. "START,Start Generation" "0,1" bitfld.long 0x00 7. "NOSTRETCH,Clock Stretch Disable (Slave Mode)" "0,1" bitfld.long 0x00 6. "ENGC,Enable General Call" "0,1" bitfld.long 0x00 5. "ENPEC,Enable PEC" "0,1" newline bitfld.long 0x00 0. "PE,Peripheral Enable" "0,1" line.long 0x04 "CR2,Control Register 2" bitfld.long 0x04 15. "ADDMREV,10-Bit Address Master Mode Reception" "0,1" bitfld.long 0x04 14. "IRQ,Interface Request" "0,1" bitfld.long 0x04 11. "DMAEN,DMA Enable" "0,1" bitfld.long 0x04 10. "ITBUFEN,Buffer Interrupt Enable" "0,1" bitfld.long 0x04 9. "ITEVTEN,Event Interrupt Enable" "0,1" bitfld.long 0x04 8. "ITERREN,Error Interrupt Enable" "0,1" hexmask.long.byte 0x04 0.--6. 1. "FREQ,Peripheral Clock Frequency" line.long 0x08 "OAR1,Own Address Register 1" bitfld.long 0x08 15. "ADDMODE,Addressing Mode (Slave Mode)" "0,1" bitfld.long 0x08 8.--9. "ADD[9:8],Interface Address" "0,1,2,3" hexmask.long.byte 0x08 1.--7. 1. "ADD[7:1],Interface Address" bitfld.long 0x08 0. "ADD0,Interface Address" "0,1" line.long 0x0C "OAR2,Own Address Register 2" hexmask.long.byte 0x0C 1.--7. 1. "ADD2[7:1],Interface Address" bitfld.long 0x0C 0. "ENDUAL,Dual Addressing Mode Enable" "0,1" line.long 0x10 "DR,Data Registers" hexmask.long.byte 0x10 0.--7. 1. "DR,8-bit Data Register" line.long 0x14 "SR1,Status Register 1" bitfld.long 0x14 12. "PECERR,PEC Error in Reception" "0,1" bitfld.long 0x14 11. "OVR,Overload/Underload" "0,1" bitfld.long 0x14 10. "AF,ACK Failure" "0,1" bitfld.long 0x14 9. "ARLO,Arbitration Lost (master mode)" "0,1" bitfld.long 0x14 8. "BERR,Bus Error" "0,1" rbitfld.long 0x14 7. "TxE,Data Register Empty (Transmitter)" "0,1" rbitfld.long 0x14 6. "RxNE,Data Register Not Empty (Receiver)" "0,1" bitfld.long 0x14 5. "BREQ,FIFO Burst Request" "0,1" rbitfld.long 0x14 4. "STOPF,Stop Detection (Slave Mode)" "0,1" newline rbitfld.long 0x14 3. "ADD10,10-bit Header Sent (Master Mode)" "0,1" rbitfld.long 0x14 2. "BTF,Byte Transfer Finished" "0,1" rbitfld.long 0x14 1. "ADDR,Address Sent (Master Mode)/Address Match (Slave Mode)" "0,1" rbitfld.long 0x14 0. "SB,Start Bit (Master Mode)" "0,1" rgroup.long ad:0xD009A018++0x03 line.long 0x00 "SR2,Status Register 2" hexmask.long.byte 0x00 8.--15. 1. "PEC,Pack Error Check" bitfld.long 0x00 7. "DUALF,Dual Flags (Slave Mode)" "0,1" bitfld.long 0x00 4. "GENCALL,General Call Address (Slave Mode)" "0,1" bitfld.long 0x00 2. "TRA,Transmit/Receive" "0,1" bitfld.long 0x00 1. "BUSY,Bus Busy" "0,1" bitfld.long 0x00 0. "MSL,Master/Slave" "0,1" group.long ad:0xD009A01C++0x07 line.long 0x00 "CCR,Clock Control Register" bitfld.long 0x00 15. "FS,I2C Master Mode Selection" "0,1" bitfld.long 0x00 14. "DUTY,Duty Cycle" "0,1" hexmask.long.word 0x00 0.--11. 1. "CCR,Clock Control Register in Standard/Fast/Fast plus Mode (Master Mode)" line.long 0x04 "TRISE,TRISE Register" hexmask.long.byte 0x04 0.--6. 1. "TRISE,Maximum Rise Time in Standard/Fast/Fast plus Mode (Master Mode)" rgroup.long ad:0xD009A024++0x03 line.long 0x00 "OAR3,Own Address Register 3" bitfld.long 0x00 0.--2. "SHS_CMD,High-speed Master Code Received in Slave Mode" "0,1,2,3,4,5,6,7" group.long ad:0xD009A028++0x1B line.long 0x00 "CCR1,Clock Control Register 1" bitfld.long 0x00 15. "MHS_START,High-speed Mode Start Generation" "0,1" hexmask.long.byte 0x00 0.--7. 1. "MHS_CCR,Clock Control Division Factor in High-speed mode (Master Mode)" line.long 0x04 "SR3,Status Register 3" bitfld.long 0x04 14. "SREQ,FIFO Single Request" "0,1" rbitfld.long 0x04 13. "FS_HS,Master Mode" "0,1" rbitfld.long 0x04 12. "S_HS,Slave Mode" "0,1" bitfld.long 0x04 11. "CMD_MATCH,High-speed Mode 00001 Match (Slave Mode)" "0,1" line.long 0x08 "TX_CNT,Tx Byte CNT Register" hexmask.long.word 0x08 0.--14. 1. "TX_CNT,Total Number of I2C Transmit Bytes" line.long 0x0C "CR3,Control Register 3" bitfld.long 0x0C 15. "MASK_IRQ,Software Set Mask" "0,1" bitfld.long 0x0C 14. "BS,Burst Size" "0,1" bitfld.long 0x0C 12.--13. "ALIGN,FIFO Alignment" "0,1,2,3" bitfld.long 0x0C 11. "ITFREQEN,FIFO Request Interrupt Enable" "0,1" bitfld.long 0x0C 9. "FC,Flow Controller" "0,1" bitfld.long 0x0C 6.--8. "TF_ALEMPTY,TxFIFO Threshold" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 3.--5. "RF_ALFULL,RxFIFO Threshold" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 2. "FFLS,FIFO Refresh" "0,1" bitfld.long 0x0C 1. "FIFOEN,FIFO Mode Enable" "0,1" line.long 0x10 "CR4,Control Register 4" hexmask.long.word 0x10 0.--13. 1. "TBL,Total Number of Bytes Transferred (without PEC)" line.long 0x14 "SR4,Status Register 4" bitfld.long 0x14 3. "TFOFL,TxFIFO Overflow Flag" "0,1" bitfld.long 0x14 0. "RFUFL,RxFIFO Underflow Flag" "0,1" line.long 0x18 "RX_CNT,Rx Byte CNT Register" hexmask.long.word 0x18 0.--14. 1. "RX_CNT,Total Number of Received Bytes" wgroup.long ad:0xD009A044++0x03 line.long 0x00 "FTxD,FIFO Tx Data Register" rgroup.long ad:0xD009A048++0x03 line.long 0x00 "FRxD,FIFO Rx Data Register" tree.end tree "MSC" rgroup.long ad:0xD0044008++0x03 line.long 0x00 "MID,Module Identification Register" hexmask.long.word 0x00 16.--31. 1. "MNUM,Module Number Value" hexmask.long.byte 0x00 8.--15. 1. "MTYPE,Module Type" hexmask.long.byte 0x00 0.--7. 1. "MREV,Module Revision Number" group.long ad:0xD004400C++0x37 line.long 0x00 "FDIV,Fractional Divider Register" bitfld.long 0x00 31. "CLKDIS,Clock Disable" "0,1" bitfld.long 0x00 30. "ENHCC,Enable Hardware Clock Control" "0,1" hexmask.long.word 0x00 16.--25. 1. "RESULT,Result Value" bitfld.long 0x00 14.--15. "DIVM,Divider Mode" "0,1,2,3" bitfld.long 0x00 10. "ECEN,Enable Active Signal" "0,1" hexmask.long.word 0x00 0.--9. 1. "STEP,Step Value" line.long 0x04 "UPSTS,Upstream Status Register" rbitfld.long 0x04 16.--20. "UCNT,Upstream Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 5. "SRDCON,Service Request Delay Control" "0,1" bitfld.long 0x04 4. "PCON,Parity Control" "0,1" bitfld.long 0x04 1.--3. "UCRR,Upstream Channel Receiving Rate" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. "UCFT,Upstream Channel Frame Type" "0,1" line.long 0x08 "DCON,Downstream Control Register" bitfld.long 0x08 24.--28. "PPLD,Passive Phase Length at Data Frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.byte 0x08 16.--21. 1. "NBCF,Number of Bits Shifted at Command Frames" rbitfld.long 0x08 15. "DDIS,Downstream Disable" "0,1" bitfld.long 0x08 14. "SELSRH,Enable SRH Active Phase Selection Bit" "0,1" bitfld.long 0x08 13. "SELSRL,Enable SRL Active Phase Selection Bit" "0,1" bitfld.long 0x08 8.--12. "NBDFH,Number of SRH Bits Shifted at Data Frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 3.--7. "NBDFL,Number of SRL Bits Shifted at Data Frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x08 2. "DATP,Data Pending" "0,1" newline rbitfld.long 0x08 1. "COMP,Command Pending" "0,1" bitfld.long 0x08 0. "TRM,Transmission Mode" "0,1" line.long 0x0C "DSTS,Downstream Status Register" rbitfld.long 0x0C 25. "COMFA,Command Frame Active" "0,1" rbitfld.long 0x0C 24. "DATFA,Data Frame Active" "0,1" hexmask.long.byte 0x0C 16.--23. 1. "DCNT,Downstream Counter" bitfld.long 0x0C 8.--11. "NUMPT,Number of Passive Time Frames" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x0C 0.--3. "PTCNT,Passive Time Frame Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "DD,Downstream Data Register" hexmask.long.word 0x10 16.--31. 1. "DDH,Downstream Data for SRH Shift Register" hexmask.long.word 0x10 0.--15. 1. "DDL,Downstream Data for SRL Shift Register" line.long 0x14 "DC,Downstream Command Register" hexmask.long.word 0x14 16.--31. 1. "DCH,Downstream Command for SRH Shift Register" hexmask.long.word 0x14 0.--15. 1. "DCL,Downstream Command for SRL Shift Register" line.long 0x18 "DDSL,Downstream Select Data Source Low Register" bitfld.long 0x18 30.--31. "SSL15,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 28.--29. "SSL14,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 26.--27. "SSL13,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 24.--25. "SSL12,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 22.--23. "SSL11,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 20.--21. "SSL10,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 18.--19. "SSL9,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 16.--17. "SSL8,Select Source for SRL" "0,1,2,3" newline bitfld.long 0x18 14.--15. "SSL7,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 12.--13. "SSL6,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 10.--11. "SSL5,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 8.--9. "SSL4,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 6.--7. "SSL3,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 4.--5. "SSL2,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 2.--3. "SSL1,Select Source for SRL" "0,1,2,3" bitfld.long 0x18 0.--1. "SSL0,Select Source for SRL" "0,1,2,3" line.long 0x1C "DDSH,Downstream Select Data Source High Register" bitfld.long 0x1C 30.--31. "SSH15,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 28.--29. "SSH14,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 26.--27. "SSH13,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 24.--25. "SSH12,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 22.--23. "SSH11,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 20.--21. "SSH10,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 18.--19. "SSH9,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 16.--17. "SSH8,Select Source for SRH" "0,1,2,3" newline bitfld.long 0x1C 14.--15. "SSH7,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 12.--13. "SSH6,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 10.--11. "SSH5,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 8.--9. "SSH4,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 6.--7. "SSH3,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 4.--5. "SSH2,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 2.--3. "SSH1,Select Source for SRH" "0,1,2,3" bitfld.long 0x1C 0.--1. "SSH0,Select Source for SRH" "0,1,2,3" line.long 0x20 "EMSR,Emergency Stop Register" bitfld.long 0x20 31. "ENH15,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 30. "ENH14,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 29. "ENH13,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 28. "ENH12,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 27. "ENH11,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 26. "ENH10,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 25. "ENH9,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 24. "ENH8,Emergency Stop Enable for Bit x in SRH" "0,1" newline bitfld.long 0x20 23. "ENH7,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 22. "ENH6,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 21. "ENH5,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 20. "ENH4,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 19. "ENH3,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 18. "ENH2,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 17. "ENH1,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x20 16. "ENH0,Emergency Stop Enable for Bit x in SRH" "0,1" newline bitfld.long 0x20 15. "ENL15,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 14. "ENL14,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 13. "ENL13,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 12. "ENL12,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 11. "ENL11,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 10. "ENL10,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 9. "ENL9,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 8. "ENL8,Emergency Stop Enable for Bit x in SRL" "0,1" newline bitfld.long 0x20 7. "ENL7,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 6. "ENL6,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 5. "ENL5,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 4. "ENL4,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 3. "ENL3,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 2. "ENL2,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 1. "ENL1,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x20 0. "ENL0,Emergency Stop Enable for Bit x in SRL" "0,1" line.long 0x24 "UDR0,Upstream Data Register n (n=0~3)" bitfld.long 0x24 22. "PE,Parity Error" "0,1" rbitfld.long 0x24 21. "IPF,Internal Parity Flag" "0,1" rbitfld.long 0x24 19.--20. "LBF,Lower Address Bit Field" "0,1,2,3" bitfld.long 0x24 18. "CB,Clear Bit" "0,1" rbitfld.long 0x24 17. "PB,Parity Bit" "0,1" rbitfld.long 0x24 16. "VB,Valid Bit" "0,1" bitfld.long 0x24 9. "OVEN,Overflow Enable" "0,1" rbitfld.long 0x24 8. "OVF,Overflow Flag" "0,1" newline hexmask.long.byte 0x24 0.--7. 1. "RDAT,Received Data" line.long 0x28 "UDR1,Upstream Data Register n (n=0~3)" bitfld.long 0x28 22. "PE,Parity Error" "0,1" rbitfld.long 0x28 21. "IPF,Internal Parity Flag" "0,1" rbitfld.long 0x28 19.--20. "LBF,Lower Address Bit Field" "0,1,2,3" bitfld.long 0x28 18. "CB,Clear Bit" "0,1" rbitfld.long 0x28 17. "PB,Parity Bit" "0,1" rbitfld.long 0x28 16. "VB,Valid Bit" "0,1" bitfld.long 0x28 9. "OVEN,Overflow Enable" "0,1" rbitfld.long 0x28 8. "OVF,Overflow Flag" "0,1" newline hexmask.long.byte 0x28 0.--7. 1. "RDAT,Received Data" line.long 0x2C "UDR2,Upstream Data Register n (n=0~3)" bitfld.long 0x2C 22. "PE,Parity Error" "0,1" rbitfld.long 0x2C 21. "IPF,Internal Parity Flag" "0,1" rbitfld.long 0x2C 19.--20. "LBF,Lower Address Bit Field" "0,1,2,3" bitfld.long 0x2C 18. "CB,Clear Bit" "0,1" rbitfld.long 0x2C 17. "PB,Parity Bit" "0,1" rbitfld.long 0x2C 16. "VB,Valid Bit" "0,1" bitfld.long 0x2C 9. "OVEN,Overflow Enable" "0,1" rbitfld.long 0x2C 8. "OVF,Overflow Flag" "0,1" newline hexmask.long.byte 0x2C 0.--7. 1. "RDAT,Received Data" line.long 0x30 "UDR3,Upstream Data Register n (n=0~3)" bitfld.long 0x30 22. "PE,Parity Error" "0,1" rbitfld.long 0x30 21. "IPF,Internal Parity Flag" "0,1" rbitfld.long 0x30 19.--20. "LBF,Lower Address Bit Field" "0,1,2,3" bitfld.long 0x30 18. "CB,Clear Bit" "0,1" rbitfld.long 0x30 17. "PB,Parity Bit" "0,1" rbitfld.long 0x30 16. "VB,Valid Bit" "0,1" bitfld.long 0x30 9. "OVEN,Overflow Enable" "0,1" rbitfld.long 0x30 8. "OVF,Overflow Flag" "0,1" newline hexmask.long.byte 0x30 0.--7. 1. "RDAT,Received Data" line.long 0x34 "INTCON,Interrupt Control Register" bitfld.long 0x34 22. "RDILOSTE,Receive Data DMA Interrupt LOST Enable" "0,1" bitfld.long 0x34 21. "TFILOSTE,Time Frame DMA Interrupt LOST Enable" "0,1" bitfld.long 0x34 20. "CFILOSTE,Command Frame Interrupt LOST Enable" "0,1" bitfld.long 0x34 19. "DFILOSTE,Data Frame DMA Interrupt LOST Enable" "0,1" bitfld.long 0x34 18. "RDIE,Upstream Channel Receive Data Interrupt Enable" "0,1" bitfld.long 0x34 17. "SELMIR,Select Mirror Register Enable" "0,1" bitfld.long 0x34 16. "SELDMA,Select DMA Dispose INTR" "0,1" bitfld.long 0x34 14.--15. "RDII,Receive Data Interrupt Enable" "0,1,2,3" newline bitfld.long 0x34 12.--13. "RDIP,Receive Data Interrupt Pointer" "0,1,2,3" bitfld.long 0x34 11. "TFINTE,Time Frame Interrupt Enable" "0,1" bitfld.long 0x34 8.--9. "TFINTP,Time Frame Interrupt Pointer" "0,1,2,3" bitfld.long 0x34 7. "CFIE,Command Frame Interrupt Enable" "0,1" bitfld.long 0x34 4.--5. "CFIP,Command Frame Interrupt Node Pointer" "0,1,2,3" bitfld.long 0x34 3. "DFIE,Downstream Channel Data Frame Interrupt Enable" "0,1" bitfld.long 0x34 2. "EDII,Data Frame Interrupt Source" "0,1" bitfld.long 0x34 0.--1. "DFIP,Data Frame Interrupt Node Pointer" "0,1,2,3" rgroup.long ad:0xD0044044++0x03 line.long 0x00 "INTSTS,Interrupt Status Register" bitfld.long 0x00 7. "RDILOST,Receive Data Interrupt Lost" "0,1" bitfld.long 0x00 6. "TFILOST,Time Frame Interrupt Lost" "0,1" bitfld.long 0x00 5. "CFILOST,Command Frame Interrupt Lost" "0,1" bitfld.long 0x00 4. "DFILOST,Data Frame Interrupt Lost" "0,1" bitfld.long 0x00 3. "RDIF,Receive Data Interrupt Flag" "0,1" bitfld.long 0x00 2. "TFIF,Time Frame Interrupt Flag" "0,1" bitfld.long 0x00 1. "CFIF,Command Frame Interrupt Flag" "0,1" bitfld.long 0x00 0. "DFIF,Data Frame Interrupt Flag" "0,1" wgroup.long ad:0xD0044048++0x03 line.long 0x00 "INTSC,Interrupt Set Clear Register" bitfld.long 0x00 22. "SDDIS,Set DDIS Flag" "0,1" bitfld.long 0x00 21. "SCOMP,Set COMP Flag" "0,1" bitfld.long 0x00 20. "SDATP,Set DATP Flag" "0,1" bitfld.long 0x00 19. "SRDIF,Set RDIF Flag" "0,1" bitfld.long 0x00 18. "STFIF,Set TFIF Flag" "0,1" bitfld.long 0x00 17. "SCFIF,Set CFIF Flag" "0,1" bitfld.long 0x00 16. "SDFIF,Set DFIF Flag" "0,1" bitfld.long 0x00 10. "CRDILOST,Clear RDILOST Flag" "0,1" newline bitfld.long 0x00 9. "CTFILOST,Clear TFILOST Flag" "0,1" bitfld.long 0x00 8. "CCFILOST,Clear CFILOST Flag" "0,1" bitfld.long 0x00 7. "CDFILOST,Clear DFILOST Flag" "0,1" bitfld.long 0x00 6. "CDDIS,Clear DDIS Flag" "0,1" bitfld.long 0x00 5. "CCOMP,Clear COMP Flag" "0,1" bitfld.long 0x00 4. "CDATP,Clear DATP Flag" "0,1" bitfld.long 0x00 3. "CRDIF,Clear RDIF Flag" "0,1" bitfld.long 0x00 2. "CTFIF,Clear TFIF Flag" "0,1" newline bitfld.long 0x00 1. "CCFIF,Clear CFIF Flag" "0,1" bitfld.long 0x00 0. "CDFIF,Clear DFIF Flag" "0,1" group.long ad:0xD004404C++0x03 line.long 0x00 "OCON,Output Control Registers" hexmask.long.word 0x00 19.--31. 1. "HRESPMASK,Hresp Signal Mask" bitfld.long 0x00 16.--18. "SDIS,Serial Data Input Selection" "0,1,2,3,4,5,6,7" bitfld.long 0x00 13.--14. "CSENC,Chip Enable Selection for ENC" "0,1,2,3" bitfld.long 0x00 11.--12. "CSENH,Chip Enable Selection for ENH" "0,1,2,3" bitfld.long 0x00 9.--10. "CSENL,Chip Enable Selection for ENL" "0,1,2,3" bitfld.long 0x00 8. "CLKCON,Clock Control" "0,1" bitfld.long 0x00 3. "SDILP,SDI Line Polarity" "0,1" bitfld.long 0x00 2. "CSP,Chip Selection Lines Polarity" "0,1" group.long ad:0xD0044058++0x17 line.long 0x00 "DCONE,Downstream Control Enhanced Register" bitfld.long 0x00 31. "CDCM,Command-Data-Command in Data Repetition Mode" "0,1" hexmask.long.byte 0x00 25.--30. 1. "IPP1,Injection Position of the Pin 1 Signal" bitfld.long 0x00 24. "IEP1,Injection Enable of the Pin 1 Signal" "0,1" hexmask.long.byte 0x00 17.--22. 1. "IPP0,Injection Position of the Pin 0 Signal" bitfld.long 0x00 16. "IEP0,Injection Enable of the Pin 0 Signal" "0,1" rbitfld.long 0x00 15. "CCF,Command-Command Flag" "0,1" bitfld.long 0x00 14. "EXEN,Extension Enable" "0,1" bitfld.long 0x00 1. "NBDFLE,Number of SRL Bits Shifted at Data Frames Extension" "0,1" newline bitfld.long 0x00 0. "NBDFHE,Number of SRH Bits Shifted at Data Frames Extension" "0,1" line.long 0x04 "UCONE,Upstream Control Enhanced Register" bitfld.long 0x04 14.--15. "UTIP,Upstream Time-out Interrupt Node Pointer" "0,1,2,3" bitfld.long 0x04 13. "UTASR,Upstream Time-out Alternate Service Request" "0,1" bitfld.long 0x04 11. "UTS,Upstream Time-out Set" "0,1" bitfld.long 0x04 10. "UTC,Upstream Time-out Clear" "0,1" rbitfld.long 0x04 9. "UTF,Upstream Time-out Flag" "0,1" bitfld.long 0x04 8. "UTIE,Upstream Time-out Interrupt Enable" "0,1" bitfld.long 0x04 4.--7. "UTV,Upstream Time-out Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. "UTP,Upstream Time-out Prescaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "DDSLE,Downstream Select Data Source Low Extension Register" bitfld.long 0x08 30.--31. "SSL31,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 28.--29. "SSL30,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 26.--27. "SSL29,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 24.--25. "SSL28,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 22.--23. "SSL27,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 20.--21. "SSL26,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 18.--19. "SSL25,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 16.--17. "SSL24,Select Source for SRL" "0,1,2,3" newline bitfld.long 0x08 14.--15. "SSL23,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 12.--13. "SSL22,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 10.--11. "SSL21,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 8.--9. "SSL20,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 6.--7. "SSL19,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 4.--5. "SSL18,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 2.--3. "SSL17,Select Source for SRL" "0,1,2,3" bitfld.long 0x08 0.--1. "SSL16,Select Source for SRL" "0,1,2,3" line.long 0x0C "DDSHE,Downstream Select Data Source High Extension Register" bitfld.long 0x0C 30.--31. "SSH31,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 28.--29. "SSH30,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 26.--27. "SSH29,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 24.--25. "SSH28,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 22.--23. "SSH27,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 20.--21. "SSH26,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 18.--19. "SSH25,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 16.--17. "SSH24,Select Source for SRH" "0,1,2,3" newline bitfld.long 0x0C 14.--15. "SSH23,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 12.--13. "SSH22,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 10.--11. "SSH21,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 8.--9. "SSH20,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 6.--7. "SSH19,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 4.--5. "SSH18,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 2.--3. "SSH17,Select Source for SRH" "0,1,2,3" bitfld.long 0x0C 0.--1. "SSH16,Select Source for SRH" "0,1,2,3" line.long 0x10 "EMSRE,Emergency Stop Extension Register" bitfld.long 0x10 31. "ENH31,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 30. "ENH30,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 29. "ENH29,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 28. "ENH28,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 27. "ENH27,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 26. "ENH26,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 25. "ENH25,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 24. "ENH24,Emergency Stop Enable for Bit x in SRH" "0,1" newline bitfld.long 0x10 23. "ENH23,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 22. "ENH22,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 21. "ENH21,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 20. "ENH20,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 19. "ENH19,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 18. "ENH18,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 17. "ENH17,Emergency Stop Enable for Bit x in SRH" "0,1" bitfld.long 0x10 16. "ENH16,Emergency Stop Enable for Bit x in SRH" "0,1" newline bitfld.long 0x10 15. "ENL31,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 14. "ENL30,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 13. "ENL29,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 12. "ENL28,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 11. "ENL27,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 10. "ENL26,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 9. "ENL25,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 8. "ENL24,Emergency Stop Enable for Bit x in SRL" "0,1" newline bitfld.long 0x10 7. "ENL23,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 6. "ENL22,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 5. "ENL21,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 4. "ENL20,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 3. "ENL19,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 2. "ENL18,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 1. "ENL17,Emergency Stop Enable for Bit x in SRL" "0,1" bitfld.long 0x10 0. "ENL16,Emergency Stop Enable for Bit x in SRL" "0,1" line.long 0x14 "DTE,Downstream Timing Extension Register" bitfld.long 0x14 31. "UNL1,Unlock CX and FM for One Write Access" "0,1" bitfld.long 0x14 28. "CX,Command Extension Mode" "0,1" bitfld.long 0x14 16. "FM,Fast Mode" "0,1" bitfld.long 0x14 12. "PPLCEM,PPLCE Extension Bit on the MSB Side" "0,1" bitfld.long 0x14 8.--11. "NDIVD,N Divider Downstream" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x14 2.--7. 1. "PPLCE,Passive Phase Length at Control Frames Extension" bitfld.long 0x14 0.--1. "PPLDE,Passive Phase Length at Data Frames Extension" "0,1,2,3" wgroup.long ad:0xD0044070++0x03 line.long 0x00 "DDRM,Downstream Data Mirror Register" hexmask.long.word 0x00 16.--31. 1. "DDHM,Downstream Data Mirror for SRH Shift Register" hexmask.long.word 0x00 0.--15. 1. "DDLM,Downstream Data Mirror for SRL Shift Register" group.long ad:0xD0044074++0x03 line.long 0x00 "DDRE,Downstream Data Extension Register" hexmask.long.word 0x00 16.--31. 1. "DDHE,Downstream Data Extension for SRH Shift Register" hexmask.long.word 0x00 0.--15. 1. "DDLE,Downstream Data Extension for SRL Shift Register" wgroup.long ad:0xD0044078++0x03 line.long 0x00 "DCRM,Downstream Command Mirror Register" hexmask.long.word 0x00 16.--31. 1. "DCHM,Downstream Command Mirror for DC.DCH" hexmask.long.word 0x00 0.--15. 1. "DCLM,Downstream Command Mirror for DC.DCL" group.long ad:0xD004407C++0x0B line.long 0x00 "DCRE,Downstream Command Extension Register" line.long 0x04 "ABCR,Asynchronous Block Configuration Register" bitfld.long 0x04 31. "ABB,Asynchronous Block Bypass" "0,1" bitfld.long 0x04 27.--29. "CLKSEL,Clock Select" "0,1,2,3,4,5,6,7" bitfld.long 0x04 26. "UINTE,Underflow Interrupt Enable" "0,1" rbitfld.long 0x04 24.--25. "UNFM,Underflow Flag Modify" "0,1,2,3" rbitfld.long 0x04 23. "UNF,Underflow Flag" "0,1" bitfld.long 0x04 21. "UASREQ,Underflow Alternate Service Request" "0,1" bitfld.long 0x04 19.--20. "UINTP,Underflow Interrupt Node Pointer" "0,1,2,3" bitfld.long 0x04 16.--18. "NDIVA,N Divider ABRA" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 15. "OINTE,Overflow Interrupt Enable" "0,1" bitfld.long 0x04 13.--14. "OVFM,Overflow Flag Modify" "0,1,2,3" rbitfld.long 0x04 12. "OVF,Overflow Flag" "0,1" bitfld.long 0x04 10. "OASREQ,Overflow Alternate Service Request" "0,1" bitfld.long 0x04 8.--9. "OINTP,Overflow Interrupt Node Pointer" "0,1,2,3" bitfld.long 0x04 4.--7. "DHC,Duration of the High Phase of the Shift Clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. "DLC,Duration of the Low Phase of the Shift Clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "ABCER,Asynchronous Block Configuration Extension Register" bitfld.long 0x08 0.--4. "PPA,Length of The Passive Phase of the Downstream Frame Output by ABRA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" tree.end tree "SENT" tree "SENT0" group.long ad:0xD0090020++0x03 line.long 0x00 "RCFG,Receiver Configuration Register" hexmask.long.word 0x00 20.--31. 1. "TTCLK_SPC,Tick Time for SPC Configuration" bitfld.long 0x00 19. "RX_SYNC_RST,SYNCTT Count Reset Configuration" "0,1" bitfld.long 0x00 18. "RX_CRCTYPE,CRC Type Select Configuration" "0,1" bitfld.long 0x00 17. "RX_CRC_WITH_STATUS,CRC Checksum Calculation Range Configuration" "0,1" bitfld.long 0x00 16. "SPC_MODE,SPC Mode Select Configuration" "0,1" newline hexmask.long.byte 0x00 8.--15. 1. "RX_SPCMTP,SPC Master Trigger Pulse Width Configuration" bitfld.long 0x00 5.--7. "RX_DNIB,Data Nibbles Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. "RX_SPCENB,SPC Mode Enable Configuration" "0,1" bitfld.long 0x00 3. "RX_PPENB,Pause Pulse Enable Configuration" "0,1" bitfld.long 0x00 2. "RX_IDLEPOL,Idle Polarity of Received Data" "0,1" newline bitfld.long 0x00 1. "RX_CRCENB,CRC Checksum Calculation Enable Configuration" "0,1" bitfld.long 0x00 0. "RX_ENB,SENT Module Enable Configuration" "0,1" rgroup.long ad:0xD0090024++0x0B line.long 0x00 "RFDATA,Receiver Fast Channel Data Register/FIFO" bitfld.long 0x00 28.--31. "STAT,Status and Communication Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "DATA1,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "DATA2,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "DATA3,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "DATA4,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "DATA5,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DATA6,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSDATA,Receiver Slow Channel Data Register" bitfld.long 0x04 24.--27. "MessageID,Short Serial Message ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 8.--15. 1. "DATA,Data" bitfld.long 0x04 7. "C=0,Enhanced Serial Message Type Flag" "0,1" bitfld.long 0x04 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RSTAT,Receiver Status Register" hexmask.long.word 0x08 16.--31. 1. "RX_TTCLK,The Most Recent Synchronization Tick Time Calculation in Clocks" bitfld.long 0x08 15. "RX_SYNC,SENT Received Valid Synchronization Period Flag" "0,1" bitfld.long 0x08 14. "RXFAST_DN,Fast Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 13. "RXSLOW_DN,Slow Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 8.--12. "RXSLOW_ST,Receiving Status of Slow Channel Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "RXSLOW_FORMATERR,Slow Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 6. "RXSLOW_CRCERR,Slow Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 5. "RX_FRMERR,Fast Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 4. "RX_CRCERR,Fast Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 3. "PP,Pause Pulse Flag" "0,1" newline bitfld.long 0x08 0.--2. "RXNIB,Number of Received Nibbles" "0,1,2,3,4,5,6,7" group.long ad:0xD0090030++0x0F line.long 0x00 "RSYNC,Receiver Sync Register" hexmask.long.word 0x00 16.--31. 1. "RSYNC_MAX,Maximum Number of Clocks" hexmask.long.word 0x00 0.--15. 1. "RSYNC_MIN,Minimum Number of Clocks" line.long 0x04 "MSEL,Mode Select Register" bitfld.long 0x04 16. "EXTERGBYPASS,External Register Bypass Control" "0,1" bitfld.long 0x04 0. "MODE,Internal\External Mode Select" "0,1" line.long 0x08 "ETCFG,External Trigger Configuration Register" hexmask.long.word 0x08 0.--14. 1. "EXTTR,The corresponding external gtm_trigger_i[14:0] is enable" line.long 0x0C "TTMOUT,Trigger Timeout Register" hexmask.long 0x0C 0.--25. 1. "TB,Timeout Boundary" rgroup.long ad:0xD009001C++0x03 line.long 0x00 "EXTSTAT,External State Register" bitfld.long 0x00 1. "DATARCV,Received Data Flag" "0,1" bitfld.long 0x00 0. "DATAMIS,Data Miss Flag" "0,1" tree.end tree "SENT1" group.long ad:0xD0090420++0x03 line.long 0x00 "RCFG,Receiver Configuration Register" hexmask.long.word 0x00 20.--31. 1. "TTCLK_SPC,Tick Time for SPC Configuration" bitfld.long 0x00 19. "RX_SYNC_RST,SYNCTT Count Reset Configuration" "0,1" bitfld.long 0x00 18. "RX_CRCTYPE,CRC Type Select Configuration" "0,1" bitfld.long 0x00 17. "RX_CRC_WITH_STATUS,CRC Checksum Calculation Range Configuration" "0,1" bitfld.long 0x00 16. "SPC_MODE,SPC Mode Select Configuration" "0,1" newline hexmask.long.byte 0x00 8.--15. 1. "RX_SPCMTP,SPC Master Trigger Pulse Width Configuration" bitfld.long 0x00 5.--7. "RX_DNIB,Data Nibbles Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. "RX_SPCENB,SPC Mode Enable Configuration" "0,1" bitfld.long 0x00 3. "RX_PPENB,Pause Pulse Enable Configuration" "0,1" bitfld.long 0x00 2. "RX_IDLEPOL,Idle Polarity of Received Data" "0,1" newline bitfld.long 0x00 1. "RX_CRCENB,CRC Checksum Calculation Enable Configuration" "0,1" bitfld.long 0x00 0. "RX_ENB,SENT Module Enable Configuration" "0,1" rgroup.long ad:0xD0090424++0x0B line.long 0x00 "RFDATA,Receiver Fast Channel Data Register/FIFO" bitfld.long 0x00 28.--31. "STAT,Status and Communication Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "DATA1,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "DATA2,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "DATA3,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "DATA4,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "DATA5,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DATA6,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSDATA,Receiver Slow Channel Data Register" bitfld.long 0x04 24.--27. "MessageID,Short Serial Message ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 8.--15. 1. "DATA,Data" bitfld.long 0x04 7. "C=0,Enhanced Serial Message Type Flag" "0,1" bitfld.long 0x04 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RSTAT,Receiver Status Register" hexmask.long.word 0x08 16.--31. 1. "RX_TTCLK,The Most Recent Synchronization Tick Time Calculation in Clocks" bitfld.long 0x08 15. "RX_SYNC,SENT Received Valid Synchronization Period Flag" "0,1" bitfld.long 0x08 14. "RXFAST_DN,Fast Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 13. "RXSLOW_DN,Slow Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 8.--12. "RXSLOW_ST,Receiving Status of Slow Channel Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "RXSLOW_FORMATERR,Slow Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 6. "RXSLOW_CRCERR,Slow Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 5. "RX_FRMERR,Fast Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 4. "RX_CRCERR,Fast Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 3. "PP,Pause Pulse Flag" "0,1" newline bitfld.long 0x08 0.--2. "RXNIB,Number of Received Nibbles" "0,1,2,3,4,5,6,7" group.long ad:0xD0090430++0x0F line.long 0x00 "RSYNC,Receiver Sync Register" hexmask.long.word 0x00 16.--31. 1. "RSYNC_MAX,Maximum Number of Clocks" hexmask.long.word 0x00 0.--15. 1. "RSYNC_MIN,Minimum Number of Clocks" line.long 0x04 "MSEL,Mode Select Register" bitfld.long 0x04 16. "EXTERGBYPASS,External Register Bypass Control" "0,1" bitfld.long 0x04 0. "MODE,Internal\External Mode Select" "0,1" line.long 0x08 "ETCFG,External Trigger Configuration Register" hexmask.long.word 0x08 0.--14. 1. "EXTTR,The corresponding external gtm_trigger_i[14:0] is enable" line.long 0x0C "TTMOUT,Trigger Timeout Register" hexmask.long 0x0C 0.--25. 1. "TB,Timeout Boundary" rgroup.long ad:0xD009041C++0x03 line.long 0x00 "EXTSTAT,External State Register" bitfld.long 0x00 1. "DATARCV,Received Data Flag" "0,1" bitfld.long 0x00 0. "DATAMIS,Data Miss Flag" "0,1" tree.end tree "SENT2" group.long ad:0xD0090820++0x03 line.long 0x00 "RCFG,Receiver Configuration Register" hexmask.long.word 0x00 20.--31. 1. "TTCLK_SPC,Tick Time for SPC Configuration" bitfld.long 0x00 19. "RX_SYNC_RST,SYNCTT Count Reset Configuration" "0,1" bitfld.long 0x00 18. "RX_CRCTYPE,CRC Type Select Configuration" "0,1" bitfld.long 0x00 17. "RX_CRC_WITH_STATUS,CRC Checksum Calculation Range Configuration" "0,1" bitfld.long 0x00 16. "SPC_MODE,SPC Mode Select Configuration" "0,1" newline hexmask.long.byte 0x00 8.--15. 1. "RX_SPCMTP,SPC Master Trigger Pulse Width Configuration" bitfld.long 0x00 5.--7. "RX_DNIB,Data Nibbles Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. "RX_SPCENB,SPC Mode Enable Configuration" "0,1" bitfld.long 0x00 3. "RX_PPENB,Pause Pulse Enable Configuration" "0,1" bitfld.long 0x00 2. "RX_IDLEPOL,Idle Polarity of Received Data" "0,1" newline bitfld.long 0x00 1. "RX_CRCENB,CRC Checksum Calculation Enable Configuration" "0,1" bitfld.long 0x00 0. "RX_ENB,SENT Module Enable Configuration" "0,1" rgroup.long ad:0xD0090824++0x0B line.long 0x00 "RFDATA,Receiver Fast Channel Data Register/FIFO" bitfld.long 0x00 28.--31. "STAT,Status and Communication Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "DATA1,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "DATA2,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "DATA3,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "DATA4,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "DATA5,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DATA6,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSDATA,Receiver Slow Channel Data Register" bitfld.long 0x04 24.--27. "MessageID,Short Serial Message ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 8.--15. 1. "DATA,Data" bitfld.long 0x04 7. "C=0,Enhanced Serial Message Type Flag" "0,1" bitfld.long 0x04 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RSTAT,Receiver Status Register" hexmask.long.word 0x08 16.--31. 1. "RX_TTCLK,The Most Recent Synchronization Tick Time Calculation in Clocks" bitfld.long 0x08 15. "RX_SYNC,SENT Received Valid Synchronization Period Flag" "0,1" bitfld.long 0x08 14. "RXFAST_DN,Fast Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 13. "RXSLOW_DN,Slow Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 8.--12. "RXSLOW_ST,Receiving Status of Slow Channel Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "RXSLOW_FORMATERR,Slow Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 6. "RXSLOW_CRCERR,Slow Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 5. "RX_FRMERR,Fast Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 4. "RX_CRCERR,Fast Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 3. "PP,Pause Pulse Flag" "0,1" newline bitfld.long 0x08 0.--2. "RXNIB,Number of Received Nibbles" "0,1,2,3,4,5,6,7" group.long ad:0xD0090830++0x0F line.long 0x00 "RSYNC,Receiver Sync Register" hexmask.long.word 0x00 16.--31. 1. "RSYNC_MAX,Maximum Number of Clocks" hexmask.long.word 0x00 0.--15. 1. "RSYNC_MIN,Minimum Number of Clocks" line.long 0x04 "MSEL,Mode Select Register" bitfld.long 0x04 16. "EXTERGBYPASS,External Register Bypass Control" "0,1" bitfld.long 0x04 0. "MODE,Internal\External Mode Select" "0,1" line.long 0x08 "ETCFG,External Trigger Configuration Register" hexmask.long.word 0x08 0.--14. 1. "EXTTR,The corresponding external gtm_trigger_i[14:0] is enable" line.long 0x0C "TTMOUT,Trigger Timeout Register" hexmask.long 0x0C 0.--25. 1. "TB,Timeout Boundary" rgroup.long ad:0xD009081C++0x03 line.long 0x00 "EXTSTAT,External State Register" bitfld.long 0x00 1. "DATARCV,Received Data Flag" "0,1" bitfld.long 0x00 0. "DATAMIS,Data Miss Flag" "0,1" tree.end tree "SENT3" group.long ad:0xD0090C20++0x03 line.long 0x00 "RCFG,Receiver Configuration Register" hexmask.long.word 0x00 20.--31. 1. "TTCLK_SPC,Tick Time for SPC Configuration" bitfld.long 0x00 19. "RX_SYNC_RST,SYNCTT Count Reset Configuration" "0,1" bitfld.long 0x00 18. "RX_CRCTYPE,CRC Type Select Configuration" "0,1" bitfld.long 0x00 17. "RX_CRC_WITH_STATUS,CRC Checksum Calculation Range Configuration" "0,1" bitfld.long 0x00 16. "SPC_MODE,SPC Mode Select Configuration" "0,1" newline hexmask.long.byte 0x00 8.--15. 1. "RX_SPCMTP,SPC Master Trigger Pulse Width Configuration" bitfld.long 0x00 5.--7. "RX_DNIB,Data Nibbles Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. "RX_SPCENB,SPC Mode Enable Configuration" "0,1" bitfld.long 0x00 3. "RX_PPENB,Pause Pulse Enable Configuration" "0,1" bitfld.long 0x00 2. "RX_IDLEPOL,Idle Polarity of Received Data" "0,1" newline bitfld.long 0x00 1. "RX_CRCENB,CRC Checksum Calculation Enable Configuration" "0,1" bitfld.long 0x00 0. "RX_ENB,SENT Module Enable Configuration" "0,1" rgroup.long ad:0xD0090C24++0x0B line.long 0x00 "RFDATA,Receiver Fast Channel Data Register/FIFO" bitfld.long 0x00 28.--31. "STAT,Status and Communication Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "DATA1,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "DATA2,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "DATA3,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "DATA4,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "DATA5,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DATA6,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSDATA,Receiver Slow Channel Data Register" bitfld.long 0x04 24.--27. "MessageID,Short Serial Message ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 8.--15. 1. "DATA,Data" bitfld.long 0x04 7. "C=0,Enhanced Serial Message Type Flag" "0,1" bitfld.long 0x04 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RSTAT,Receiver Status Register" hexmask.long.word 0x08 16.--31. 1. "RX_TTCLK,The Most Recent Synchronization Tick Time Calculation in Clocks" bitfld.long 0x08 15. "RX_SYNC,SENT Received Valid Synchronization Period Flag" "0,1" bitfld.long 0x08 14. "RXFAST_DN,Fast Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 13. "RXSLOW_DN,Slow Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 8.--12. "RXSLOW_ST,Receiving Status of Slow Channel Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "RXSLOW_FORMATERR,Slow Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 6. "RXSLOW_CRCERR,Slow Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 5. "RX_FRMERR,Fast Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 4. "RX_CRCERR,Fast Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 3. "PP,Pause Pulse Flag" "0,1" newline bitfld.long 0x08 0.--2. "RXNIB,Number of Received Nibbles" "0,1,2,3,4,5,6,7" group.long ad:0xD0090C30++0x0F line.long 0x00 "RSYNC,Receiver Sync Register" hexmask.long.word 0x00 16.--31. 1. "RSYNC_MAX,Maximum Number of Clocks" hexmask.long.word 0x00 0.--15. 1. "RSYNC_MIN,Minimum Number of Clocks" line.long 0x04 "MSEL,Mode Select Register" bitfld.long 0x04 16. "EXTERGBYPASS,External Register Bypass Control" "0,1" bitfld.long 0x04 0. "MODE,Internal\External Mode Select" "0,1" line.long 0x08 "ETCFG,External Trigger Configuration Register" hexmask.long.word 0x08 0.--14. 1. "EXTTR,The corresponding external gtm_trigger_i[14:0] is enable" line.long 0x0C "TTMOUT,Trigger Timeout Register" hexmask.long 0x0C 0.--25. 1. "TB,Timeout Boundary" rgroup.long ad:0xD0090C1C++0x03 line.long 0x00 "EXTSTAT,External State Register" bitfld.long 0x00 1. "DATARCV,Received Data Flag" "0,1" bitfld.long 0x00 0. "DATAMIS,Data Miss Flag" "0,1" tree.end tree "SENT4" group.long ad:0xD0091020++0x03 line.long 0x00 "RCFG,Receiver Configuration Register" hexmask.long.word 0x00 20.--31. 1. "TTCLK_SPC,Tick Time for SPC Configuration" bitfld.long 0x00 19. "RX_SYNC_RST,SYNCTT Count Reset Configuration" "0,1" bitfld.long 0x00 18. "RX_CRCTYPE,CRC Type Select Configuration" "0,1" bitfld.long 0x00 17. "RX_CRC_WITH_STATUS,CRC Checksum Calculation Range Configuration" "0,1" bitfld.long 0x00 16. "SPC_MODE,SPC Mode Select Configuration" "0,1" newline hexmask.long.byte 0x00 8.--15. 1. "RX_SPCMTP,SPC Master Trigger Pulse Width Configuration" bitfld.long 0x00 5.--7. "RX_DNIB,Data Nibbles Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. "RX_SPCENB,SPC Mode Enable Configuration" "0,1" bitfld.long 0x00 3. "RX_PPENB,Pause Pulse Enable Configuration" "0,1" bitfld.long 0x00 2. "RX_IDLEPOL,Idle Polarity of Received Data" "0,1" newline bitfld.long 0x00 1. "RX_CRCENB,CRC Checksum Calculation Enable Configuration" "0,1" bitfld.long 0x00 0. "RX_ENB,SENT Module Enable Configuration" "0,1" rgroup.long ad:0xD0091024++0x0B line.long 0x00 "RFDATA,Receiver Fast Channel Data Register/FIFO" bitfld.long 0x00 28.--31. "STAT,Status and Communication Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "DATA1,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "DATA2,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "DATA3,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "DATA4,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "DATA5,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DATA6,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSDATA,Receiver Slow Channel Data Register" bitfld.long 0x04 24.--27. "MessageID,Short Serial Message ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 8.--15. 1. "DATA,Data" bitfld.long 0x04 7. "C=0,Enhanced Serial Message Type Flag" "0,1" bitfld.long 0x04 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RSTAT,Receiver Status Register" hexmask.long.word 0x08 16.--31. 1. "RX_TTCLK,The Most Recent Synchronization Tick Time Calculation in Clocks" bitfld.long 0x08 15. "RX_SYNC,SENT Received Valid Synchronization Period Flag" "0,1" bitfld.long 0x08 14. "RXFAST_DN,Fast Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 13. "RXSLOW_DN,Slow Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 8.--12. "RXSLOW_ST,Receiving Status of Slow Channel Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "RXSLOW_FORMATERR,Slow Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 6. "RXSLOW_CRCERR,Slow Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 5. "RX_FRMERR,Fast Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 4. "RX_CRCERR,Fast Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 3. "PP,Pause Pulse Flag" "0,1" newline bitfld.long 0x08 0.--2. "RXNIB,Number of Received Nibbles" "0,1,2,3,4,5,6,7" group.long ad:0xD0091030++0x0F line.long 0x00 "RSYNC,Receiver Sync Register" hexmask.long.word 0x00 16.--31. 1. "RSYNC_MAX,Maximum Number of Clocks" hexmask.long.word 0x00 0.--15. 1. "RSYNC_MIN,Minimum Number of Clocks" line.long 0x04 "MSEL,Mode Select Register" bitfld.long 0x04 16. "EXTERGBYPASS,External Register Bypass Control" "0,1" bitfld.long 0x04 0. "MODE,Internal\External Mode Select" "0,1" line.long 0x08 "ETCFG,External Trigger Configuration Register" hexmask.long.word 0x08 0.--14. 1. "EXTTR,The corresponding external gtm_trigger_i[14:0] is enable" line.long 0x0C "TTMOUT,Trigger Timeout Register" hexmask.long 0x0C 0.--25. 1. "TB,Timeout Boundary" rgroup.long ad:0xD009101C++0x03 line.long 0x00 "EXTSTAT,External State Register" bitfld.long 0x00 1. "DATARCV,Received Data Flag" "0,1" bitfld.long 0x00 0. "DATAMIS,Data Miss Flag" "0,1" tree.end tree "SENT5" group.long ad:0xD00B0020++0x03 line.long 0x00 "RCFG,Receiver Configuration Register" hexmask.long.word 0x00 20.--31. 1. "TTCLK_SPC,Tick Time for SPC Configuration" bitfld.long 0x00 19. "RX_SYNC_RST,SYNCTT Count Reset Configuration" "0,1" bitfld.long 0x00 18. "RX_CRCTYPE,CRC Type Select Configuration" "0,1" bitfld.long 0x00 17. "RX_CRC_WITH_STATUS,CRC Checksum Calculation Range Configuration" "0,1" bitfld.long 0x00 16. "SPC_MODE,SPC Mode Select Configuration" "0,1" newline hexmask.long.byte 0x00 8.--15. 1. "RX_SPCMTP,SPC Master Trigger Pulse Width Configuration" bitfld.long 0x00 5.--7. "RX_DNIB,Data Nibbles Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. "RX_SPCENB,SPC Mode Enable Configuration" "0,1" bitfld.long 0x00 3. "RX_PPENB,Pause Pulse Enable Configuration" "0,1" bitfld.long 0x00 2. "RX_IDLEPOL,Idle Polarity of Received Data" "0,1" newline bitfld.long 0x00 1. "RX_CRCENB,CRC Checksum Calculation Enable Configuration" "0,1" bitfld.long 0x00 0. "RX_ENB,SENT Module Enable Configuration" "0,1" rgroup.long ad:0xD00B0024++0x0B line.long 0x00 "RFDATA,Receiver Fast Channel Data Register/FIFO" bitfld.long 0x00 28.--31. "STAT,Status and Communication Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "DATA1,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "DATA2,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "DATA3,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "DATA4,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "DATA5,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DATA6,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSDATA,Receiver Slow Channel Data Register" bitfld.long 0x04 24.--27. "MessageID,Short Serial Message ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 8.--15. 1. "DATA,Data" bitfld.long 0x04 7. "C=0,Enhanced Serial Message Type Flag" "0,1" bitfld.long 0x04 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RSTAT,Receiver Status Register" hexmask.long.word 0x08 16.--31. 1. "RX_TTCLK,The Most Recent Synchronization Tick Time Calculation in Clocks" bitfld.long 0x08 15. "RX_SYNC,SENT Received Valid Synchronization Period Flag" "0,1" bitfld.long 0x08 14. "RXFAST_DN,Fast Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 13. "RXSLOW_DN,Slow Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 8.--12. "RXSLOW_ST,Receiving Status of Slow Channel Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "RXSLOW_FORMATERR,Slow Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 6. "RXSLOW_CRCERR,Slow Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 5. "RX_FRMERR,Fast Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 4. "RX_CRCERR,Fast Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 3. "PP,Pause Pulse Flag" "0,1" newline bitfld.long 0x08 0.--2. "RXNIB,Number of Received Nibbles" "0,1,2,3,4,5,6,7" group.long ad:0xD00B0030++0x0F line.long 0x00 "RSYNC,Receiver Sync Register" hexmask.long.word 0x00 16.--31. 1. "RSYNC_MAX,Maximum Number of Clocks" hexmask.long.word 0x00 0.--15. 1. "RSYNC_MIN,Minimum Number of Clocks" line.long 0x04 "MSEL,Mode Select Register" bitfld.long 0x04 16. "EXTERGBYPASS,External Register Bypass Control" "0,1" bitfld.long 0x04 0. "MODE,Internal\External Mode Select" "0,1" line.long 0x08 "ETCFG,External Trigger Configuration Register" hexmask.long.word 0x08 0.--14. 1. "EXTTR,The corresponding external gtm_trigger_i[14:0] is enable" line.long 0x0C "TTMOUT,Trigger Timeout Register" hexmask.long 0x0C 0.--25. 1. "TB,Timeout Boundary" rgroup.long ad:0xD00B001C++0x03 line.long 0x00 "EXTSTAT,External State Register" bitfld.long 0x00 1. "DATARCV,Received Data Flag" "0,1" bitfld.long 0x00 0. "DATAMIS,Data Miss Flag" "0,1" tree.end tree "SENT6" group.long ad:0xD00B0420++0x03 line.long 0x00 "RCFG,Receiver Configuration Register" hexmask.long.word 0x00 20.--31. 1. "TTCLK_SPC,Tick Time for SPC Configuration" bitfld.long 0x00 19. "RX_SYNC_RST,SYNCTT Count Reset Configuration" "0,1" bitfld.long 0x00 18. "RX_CRCTYPE,CRC Type Select Configuration" "0,1" bitfld.long 0x00 17. "RX_CRC_WITH_STATUS,CRC Checksum Calculation Range Configuration" "0,1" bitfld.long 0x00 16. "SPC_MODE,SPC Mode Select Configuration" "0,1" newline hexmask.long.byte 0x00 8.--15. 1. "RX_SPCMTP,SPC Master Trigger Pulse Width Configuration" bitfld.long 0x00 5.--7. "RX_DNIB,Data Nibbles Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. "RX_SPCENB,SPC Mode Enable Configuration" "0,1" bitfld.long 0x00 3. "RX_PPENB,Pause Pulse Enable Configuration" "0,1" bitfld.long 0x00 2. "RX_IDLEPOL,Idle Polarity of Received Data" "0,1" newline bitfld.long 0x00 1. "RX_CRCENB,CRC Checksum Calculation Enable Configuration" "0,1" bitfld.long 0x00 0. "RX_ENB,SENT Module Enable Configuration" "0,1" rgroup.long ad:0xD00B0424++0x0B line.long 0x00 "RFDATA,Receiver Fast Channel Data Register/FIFO" bitfld.long 0x00 28.--31. "STAT,Status and Communication Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "DATA1,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "DATA2,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "DATA3,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "DATA4,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "DATA5,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DATA6,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSDATA,Receiver Slow Channel Data Register" bitfld.long 0x04 24.--27. "MessageID,Short Serial Message ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 8.--15. 1. "DATA,Data" bitfld.long 0x04 7. "C=0,Enhanced Serial Message Type Flag" "0,1" bitfld.long 0x04 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RSTAT,Receiver Status Register" hexmask.long.word 0x08 16.--31. 1. "RX_TTCLK,The Most Recent Synchronization Tick Time Calculation in Clocks" bitfld.long 0x08 15. "RX_SYNC,SENT Received Valid Synchronization Period Flag" "0,1" bitfld.long 0x08 14. "RXFAST_DN,Fast Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 13. "RXSLOW_DN,Slow Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 8.--12. "RXSLOW_ST,Receiving Status of Slow Channel Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "RXSLOW_FORMATERR,Slow Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 6. "RXSLOW_CRCERR,Slow Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 5. "RX_FRMERR,Fast Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 4. "RX_CRCERR,Fast Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 3. "PP,Pause Pulse Flag" "0,1" newline bitfld.long 0x08 0.--2. "RXNIB,Number of Received Nibbles" "0,1,2,3,4,5,6,7" group.long ad:0xD00B0430++0x0F line.long 0x00 "RSYNC,Receiver Sync Register" hexmask.long.word 0x00 16.--31. 1. "RSYNC_MAX,Maximum Number of Clocks" hexmask.long.word 0x00 0.--15. 1. "RSYNC_MIN,Minimum Number of Clocks" line.long 0x04 "MSEL,Mode Select Register" bitfld.long 0x04 16. "EXTERGBYPASS,External Register Bypass Control" "0,1" bitfld.long 0x04 0. "MODE,Internal\External Mode Select" "0,1" line.long 0x08 "ETCFG,External Trigger Configuration Register" hexmask.long.word 0x08 0.--14. 1. "EXTTR,The corresponding external gtm_trigger_i[14:0] is enable" line.long 0x0C "TTMOUT,Trigger Timeout Register" hexmask.long 0x0C 0.--25. 1. "TB,Timeout Boundary" rgroup.long ad:0xD00B041C++0x03 line.long 0x00 "EXTSTAT,External State Register" bitfld.long 0x00 1. "DATARCV,Received Data Flag" "0,1" bitfld.long 0x00 0. "DATAMIS,Data Miss Flag" "0,1" tree.end tree "SENT7" group.long ad:0xD00B0820++0x03 line.long 0x00 "RCFG,Receiver Configuration Register" hexmask.long.word 0x00 20.--31. 1. "TTCLK_SPC,Tick Time for SPC Configuration" bitfld.long 0x00 19. "RX_SYNC_RST,SYNCTT Count Reset Configuration" "0,1" bitfld.long 0x00 18. "RX_CRCTYPE,CRC Type Select Configuration" "0,1" bitfld.long 0x00 17. "RX_CRC_WITH_STATUS,CRC Checksum Calculation Range Configuration" "0,1" bitfld.long 0x00 16. "SPC_MODE,SPC Mode Select Configuration" "0,1" newline hexmask.long.byte 0x00 8.--15. 1. "RX_SPCMTP,SPC Master Trigger Pulse Width Configuration" bitfld.long 0x00 5.--7. "RX_DNIB,Data Nibbles Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. "RX_SPCENB,SPC Mode Enable Configuration" "0,1" bitfld.long 0x00 3. "RX_PPENB,Pause Pulse Enable Configuration" "0,1" bitfld.long 0x00 2. "RX_IDLEPOL,Idle Polarity of Received Data" "0,1" newline bitfld.long 0x00 1. "RX_CRCENB,CRC Checksum Calculation Enable Configuration" "0,1" bitfld.long 0x00 0. "RX_ENB,SENT Module Enable Configuration" "0,1" rgroup.long ad:0xD00B0824++0x0B line.long 0x00 "RFDATA,Receiver Fast Channel Data Register/FIFO" bitfld.long 0x00 28.--31. "STAT,Status and Communication Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "DATA1,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "DATA2,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "DATA3,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "DATA4,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "DATA5,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DATA6,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSDATA,Receiver Slow Channel Data Register" bitfld.long 0x04 24.--27. "MessageID,Short Serial Message ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 8.--15. 1. "DATA,Data" bitfld.long 0x04 7. "C=0,Enhanced Serial Message Type Flag" "0,1" bitfld.long 0x04 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RSTAT,Receiver Status Register" hexmask.long.word 0x08 16.--31. 1. "RX_TTCLK,The Most Recent Synchronization Tick Time Calculation in Clocks" bitfld.long 0x08 15. "RX_SYNC,SENT Received Valid Synchronization Period Flag" "0,1" bitfld.long 0x08 14. "RXFAST_DN,Fast Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 13. "RXSLOW_DN,Slow Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 8.--12. "RXSLOW_ST,Receiving Status of Slow Channel Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "RXSLOW_FORMATERR,Slow Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 6. "RXSLOW_CRCERR,Slow Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 5. "RX_FRMERR,Fast Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 4. "RX_CRCERR,Fast Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 3. "PP,Pause Pulse Flag" "0,1" newline bitfld.long 0x08 0.--2. "RXNIB,Number of Received Nibbles" "0,1,2,3,4,5,6,7" group.long ad:0xD00B0830++0x0F line.long 0x00 "RSYNC,Receiver Sync Register" hexmask.long.word 0x00 16.--31. 1. "RSYNC_MAX,Maximum Number of Clocks" hexmask.long.word 0x00 0.--15. 1. "RSYNC_MIN,Minimum Number of Clocks" line.long 0x04 "MSEL,Mode Select Register" bitfld.long 0x04 16. "EXTERGBYPASS,External Register Bypass Control" "0,1" bitfld.long 0x04 0. "MODE,Internal\External Mode Select" "0,1" line.long 0x08 "ETCFG,External Trigger Configuration Register" hexmask.long.word 0x08 0.--14. 1. "EXTTR,The corresponding external gtm_trigger_i[14:0] is enable" line.long 0x0C "TTMOUT,Trigger Timeout Register" hexmask.long 0x0C 0.--25. 1. "TB,Timeout Boundary" rgroup.long ad:0xD00B081C++0x03 line.long 0x00 "EXTSTAT,External State Register" bitfld.long 0x00 1. "DATARCV,Received Data Flag" "0,1" bitfld.long 0x00 0. "DATAMIS,Data Miss Flag" "0,1" tree.end tree "SENT8" group.long ad:0xD00B0C20++0x03 line.long 0x00 "RCFG,Receiver Configuration Register" hexmask.long.word 0x00 20.--31. 1. "TTCLK_SPC,Tick Time for SPC Configuration" bitfld.long 0x00 19. "RX_SYNC_RST,SYNCTT Count Reset Configuration" "0,1" bitfld.long 0x00 18. "RX_CRCTYPE,CRC Type Select Configuration" "0,1" bitfld.long 0x00 17. "RX_CRC_WITH_STATUS,CRC Checksum Calculation Range Configuration" "0,1" bitfld.long 0x00 16. "SPC_MODE,SPC Mode Select Configuration" "0,1" newline hexmask.long.byte 0x00 8.--15. 1. "RX_SPCMTP,SPC Master Trigger Pulse Width Configuration" bitfld.long 0x00 5.--7. "RX_DNIB,Data Nibbles Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. "RX_SPCENB,SPC Mode Enable Configuration" "0,1" bitfld.long 0x00 3. "RX_PPENB,Pause Pulse Enable Configuration" "0,1" bitfld.long 0x00 2. "RX_IDLEPOL,Idle Polarity of Received Data" "0,1" newline bitfld.long 0x00 1. "RX_CRCENB,CRC Checksum Calculation Enable Configuration" "0,1" bitfld.long 0x00 0. "RX_ENB,SENT Module Enable Configuration" "0,1" rgroup.long ad:0xD00B0C24++0x0B line.long 0x00 "RFDATA,Receiver Fast Channel Data Register/FIFO" bitfld.long 0x00 28.--31. "STAT,Status and Communication Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "DATA1,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "DATA2,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "DATA3,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "DATA4,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "DATA5,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DATA6,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSDATA,Receiver Slow Channel Data Register" bitfld.long 0x04 24.--27. "MessageID,Short Serial Message ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 8.--15. 1. "DATA,Data" bitfld.long 0x04 7. "C=0,Enhanced Serial Message Type Flag" "0,1" bitfld.long 0x04 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RSTAT,Receiver Status Register" hexmask.long.word 0x08 16.--31. 1. "RX_TTCLK,The Most Recent Synchronization Tick Time Calculation in Clocks" bitfld.long 0x08 15. "RX_SYNC,SENT Received Valid Synchronization Period Flag" "0,1" bitfld.long 0x08 14. "RXFAST_DN,Fast Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 13. "RXSLOW_DN,Slow Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 8.--12. "RXSLOW_ST,Receiving Status of Slow Channel Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "RXSLOW_FORMATERR,Slow Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 6. "RXSLOW_CRCERR,Slow Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 5. "RX_FRMERR,Fast Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 4. "RX_CRCERR,Fast Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 3. "PP,Pause Pulse Flag" "0,1" newline bitfld.long 0x08 0.--2. "RXNIB,Number of Received Nibbles" "0,1,2,3,4,5,6,7" group.long ad:0xD00B0C30++0x0F line.long 0x00 "RSYNC,Receiver Sync Register" hexmask.long.word 0x00 16.--31. 1. "RSYNC_MAX,Maximum Number of Clocks" hexmask.long.word 0x00 0.--15. 1. "RSYNC_MIN,Minimum Number of Clocks" line.long 0x04 "MSEL,Mode Select Register" bitfld.long 0x04 16. "EXTERGBYPASS,External Register Bypass Control" "0,1" bitfld.long 0x04 0. "MODE,Internal\External Mode Select" "0,1" line.long 0x08 "ETCFG,External Trigger Configuration Register" hexmask.long.word 0x08 0.--14. 1. "EXTTR,The corresponding external gtm_trigger_i[14:0] is enable" line.long 0x0C "TTMOUT,Trigger Timeout Register" hexmask.long 0x0C 0.--25. 1. "TB,Timeout Boundary" rgroup.long ad:0xD00B0C1C++0x03 line.long 0x00 "EXTSTAT,External State Register" bitfld.long 0x00 1. "DATARCV,Received Data Flag" "0,1" bitfld.long 0x00 0. "DATAMIS,Data Miss Flag" "0,1" tree.end tree "SENT9" group.long ad:0xD00B1020++0x03 line.long 0x00 "RCFG,Receiver Configuration Register" hexmask.long.word 0x00 20.--31. 1. "TTCLK_SPC,Tick Time for SPC Configuration" bitfld.long 0x00 19. "RX_SYNC_RST,SYNCTT Count Reset Configuration" "0,1" bitfld.long 0x00 18. "RX_CRCTYPE,CRC Type Select Configuration" "0,1" bitfld.long 0x00 17. "RX_CRC_WITH_STATUS,CRC Checksum Calculation Range Configuration" "0,1" bitfld.long 0x00 16. "SPC_MODE,SPC Mode Select Configuration" "0,1" newline hexmask.long.byte 0x00 8.--15. 1. "RX_SPCMTP,SPC Master Trigger Pulse Width Configuration" bitfld.long 0x00 5.--7. "RX_DNIB,Data Nibbles Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4. "RX_SPCENB,SPC Mode Enable Configuration" "0,1" bitfld.long 0x00 3. "RX_PPENB,Pause Pulse Enable Configuration" "0,1" bitfld.long 0x00 2. "RX_IDLEPOL,Idle Polarity of Received Data" "0,1" newline bitfld.long 0x00 1. "RX_CRCENB,CRC Checksum Calculation Enable Configuration" "0,1" bitfld.long 0x00 0. "RX_ENB,SENT Module Enable Configuration" "0,1" rgroup.long ad:0xD00B1024++0x0B line.long 0x00 "RFDATA,Receiver Fast Channel Data Register/FIFO" bitfld.long 0x00 28.--31. "STAT,Status and Communication Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "DATA1,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "DATA2,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "DATA3,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "DATA4,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "DATA5,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "DATA6,Data Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "RSDATA,Receiver Slow Channel Data Register" bitfld.long 0x04 24.--27. "MessageID,Short Serial Message ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 8.--15. 1. "DATA,Data" bitfld.long 0x04 7. "C=0,Enhanced Serial Message Type Flag" "0,1" bitfld.long 0x04 0.--3. "CRC,CRC Nibble" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RSTAT,Receiver Status Register" hexmask.long.word 0x08 16.--31. 1. "RX_TTCLK,The Most Recent Synchronization Tick Time Calculation in Clocks" bitfld.long 0x08 15. "RX_SYNC,SENT Received Valid Synchronization Period Flag" "0,1" bitfld.long 0x08 14. "RXFAST_DN,Fast Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 13. "RXSLOW_DN,Slow Channel Data Receive Successful Flag" "0,1" bitfld.long 0x08 8.--12. "RXSLOW_ST,Receiving Status of Slow Channel Data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 7. "RXSLOW_FORMATERR,Slow Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 6. "RXSLOW_CRCERR,Slow Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 5. "RX_FRMERR,Fast Channel Data Receive Frame Error Flag" "0,1" bitfld.long 0x08 4. "RX_CRCERR,Fast Channel Data Receive CRC Error Flag" "0,1" bitfld.long 0x08 3. "PP,Pause Pulse Flag" "0,1" newline bitfld.long 0x08 0.--2. "RXNIB,Number of Received Nibbles" "0,1,2,3,4,5,6,7" group.long ad:0xD00B1030++0x0F line.long 0x00 "RSYNC,Receiver Sync Register" hexmask.long.word 0x00 16.--31. 1. "RSYNC_MAX,Maximum Number of Clocks" hexmask.long.word 0x00 0.--15. 1. "RSYNC_MIN,Minimum Number of Clocks" line.long 0x04 "MSEL,Mode Select Register" bitfld.long 0x04 16. "EXTERGBYPASS,External Register Bypass Control" "0,1" bitfld.long 0x04 0. "MODE,Internal\External Mode Select" "0,1" line.long 0x08 "ETCFG,External Trigger Configuration Register" hexmask.long.word 0x08 0.--14. 1. "EXTTR,The corresponding external gtm_trigger_i[14:0] is enable" line.long 0x0C "TTMOUT,Trigger Timeout Register" hexmask.long 0x0C 0.--25. 1. "TB,Timeout Boundary" rgroup.long ad:0xD00B101C++0x03 line.long 0x00 "EXTSTAT,External State Register" bitfld.long 0x00 1. "DATARCV,Received Data Flag" "0,1" bitfld.long 0x00 0. "DATAMIS,Data Miss Flag" "0,1" tree.end tree.end tree "SARADC" tree "SARADC0" group.long ad:0xB0000000++0x77 line.long 0x00 "Q2TRICTRL,Queue 2 Trigger Control Register" bitfld.long 0x00 16. "INTRISEL,Internal Trigger Source Selection" "0,1" hexmask.long.byte 0x00 8.--13. 1. "TRICNTSET,Queue Trigger Counter Initial Value" hexmask.long.byte 0x00 0.--5. 1. "TRICNT,Queue Trigger Counter" line.long 0x04 "ANACFG,Analog Configuration Register" rbitfld.long 0x04 31. "ANAFLG,SARADC Analog Flag" "0,1" hexmask.long.byte 0x04 16.--21. 1. "OFFSET,SARADC Offset" hexmask.long.byte 0x04 8.--15. 1. "ANADIVF,SARADC Divider Factor For The Analog Internal Clock" bitfld.long 0x04 5. "DISHEN,Calibration Offset Enable" "0,1" bitfld.long 0x04 4. "CALIC,Calibration Control" "0,1" bitfld.long 0x04 2.--3. "ANARESO,ADC Resolution Configuration" "0,1,2,3" newline bitfld.long 0x04 1. "REFSEL,Reference Voltage Selection" "0,1" bitfld.long 0x04 0. "ANAEN,SARADC Analog Enable" "0,1" line.long 0x08 "ARBCTRL,Arbiter Control Register" rbitfld.long 0x08 29. "INJECT2STA,Queue2 Insert Status" "0,1" rbitfld.long 0x08 28. "INJECT1STA,Queue1 Insert Status" "0,1" rbitfld.long 0x08 27. "INJECT0STA,Queue0 Insert Status" "0,1" bitfld.long 0x08 26. "ARBEN2,Arbitration Queue2 Enable Control" "0,1" bitfld.long 0x08 25. "ARBEN1,Arbitration Queue1 Enable Control" "0,1" bitfld.long 0x08 24. "ARBEN0,Arbitration Queue0 Enable Control" "0,1" newline rbitfld.long 0x08 23. "SYNCBUSY,Synchronous Queue Busy Flag" "0,1" rbitfld.long 0x08 22. "Q2BUSY,Queue2 Busy Flag" "0,1" rbitfld.long 0x08 21. "Q1BUSY,Queue1 Busy Flag" "0,1" rbitfld.long 0x08 20. "Q0BUSY,Queue0 Busy Flag" "0,1" rbitfld.long 0x08 18. "Q2WAIT,Queue2 Wait Status" "0,1" rbitfld.long 0x08 17. "Q1WAIT,Queue1 Wait Status" "0,1" newline rbitfld.long 0x08 16. "Q0WAIT,Queue0 Wait Status" "0,1" bitfld.long 0x08 15. "INJECT2CLR,Queue2 Inject Status Clear" "0,1" bitfld.long 0x08 14. "INJECT1CLR,Queue1 Inject Status Clear" "0,1" bitfld.long 0x08 13. "INJECT0CLR,Queue0 Inject Status Clear" "0,1" bitfld.long 0x08 11. "CONSMODE2,Conversion Start Mode of Queue 2" "0,1" bitfld.long 0x08 8.--9. "PRIOL2,Priority Level of Queue 2 Configuration" "0,1,2,3" newline bitfld.long 0x08 7. "CONSMODE1,Conversion Start Mode of Queue 1" "0,1" bitfld.long 0x08 4.--5. "PRIOL1,Priority Level of Queue 1 Configuration" "0,1,2,3" bitfld.long 0x08 3. "CONSMODE0,Conversion Start Mode of Queue 0" "0,1" bitfld.long 0x08 0.--1. "PRIOL0,Priority Level of Queue 0 Configuration" "0,1,2,3" line.long 0x0C "SAMCTRL,Sample Time Control Register" hexmask.long.byte 0x0C 0.--7. 1. "STCTRL,Sample time control register" line.long 0x10 "FUNBOUND,Functional Bound Control Register" bitfld.long 0x10 28.--31. "BOUNDUSEL,Upper Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 16.--27. 1. "BOUNDU,Software Set Upper Boundary" bitfld.long 0x10 12.--15. "BOUNDLSEL,Lower Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 0.--11. 1. "BOUNDL,Software Set Lower Boundary" line.long 0x14 "SYNCCTRL,Synchronous Converter Control Register" bitfld.long 0x14 6. "SYNCEN3,Synchronous Converter Follows CI3 Enable" "0,1" bitfld.long 0x14 5. "SYNCEN2,Synchronous Converter Follows CI2 Enable" "0,1" bitfld.long 0x14 4. "SYNCEN1,Synchronous Converter Follows CI1 Enable" "0,1" bitfld.long 0x14 0.--1. "SYNCSEL,Synchronous Converter Source Selection" "0,1,2,3" line.long 0x18 "QTRICTRL0,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x18 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x18 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x18 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x18 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x18 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x18 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x1C "QTRICTRL1,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x1C 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x1C 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x1C 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x1C 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x1C 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x1C 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x20 "QTRICTRL2,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x20 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x20 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x20 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x20 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x20 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x20 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x24 "QMODE0,Queue x Mode Control Register (x=0~2)" bitfld.long 0x24 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x24 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x24 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x24 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x28 "QMODE1,Queue x Mode Control Register (x=0~2)" bitfld.long 0x28 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x28 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x28 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x28 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x2C "QMODE2,Queue x Mode Control Register (x=0~2)" bitfld.long 0x2C 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x2C 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x2C 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x2C 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x30 "QINCFG0,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x30 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x30 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x30 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x30 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x30 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x30 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x30 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x30 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x30 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x30 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "QINCFG1,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x34 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x34 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x34 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x34 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x34 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x34 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x34 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x34 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x34 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x34 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "QINCFG2,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x38 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x38 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x38 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x38 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x38 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x38 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x38 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x38 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x38 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x38 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "QREQTM0,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x3C 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x3C 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x3C 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x3C 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x40 "QREQTM1,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x40 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x40 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x40 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x40 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x44 "QREQTM2,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x44 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x44 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x44 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x44 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x48 "CHCTRL0,Channel y Control Register (y=0~11)" bitfld.long 0x48 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x48 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x48 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x48 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x48 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x48 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x48 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x48 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x48 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x48 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x48 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x48 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x4C "CHCTRL1,Channel y Control Register (y=0~11)" bitfld.long 0x4C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x4C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x4C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x4C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x4C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x4C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x4C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x4C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x4C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x4C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x4C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x4C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x50 "CHCTRL2,Channel y Control Register (y=0~11)" bitfld.long 0x50 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x50 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x50 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x50 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x50 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x50 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x50 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x50 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x50 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x50 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x50 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x50 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x54 "CHCTRL3,Channel y Control Register (y=0~11)" bitfld.long 0x54 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x54 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x54 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x54 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x54 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x54 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x54 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x54 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x54 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x54 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x54 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x54 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x58 "CHCTRL4,Channel y Control Register (y=0~11)" bitfld.long 0x58 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x58 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x58 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x58 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x58 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x58 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x58 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x58 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x58 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x58 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x58 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x58 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x5C "CHCTRL5,Channel y Control Register (y=0~11)" bitfld.long 0x5C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x5C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x5C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x5C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x5C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x5C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x5C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x5C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x5C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x5C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x5C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x5C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x60 "CHCTRL6,Channel y Control Register (y=0~11)" bitfld.long 0x60 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x60 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x60 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x60 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x60 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x60 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x60 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x60 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x60 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x60 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x60 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x60 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x64 "CHCTRL7,Channel y Control Register (y=0~11)" bitfld.long 0x64 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x64 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x64 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x64 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x64 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x64 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x64 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x64 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x64 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x64 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x64 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x64 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x68 "CHCTRL8,Channel y Control Register (y=0~11)" bitfld.long 0x68 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x68 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x68 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x68 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x68 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x68 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x68 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x68 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x68 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x68 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x68 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x68 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x6C "CHCTRL9,Channel y Control Register (y=0~11)" bitfld.long 0x6C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x6C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x6C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x6C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x6C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x6C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x6C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x6C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x6C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x6C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x6C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x6C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x70 "CHCTRL10,Channel y Control Register (y=0~11)" bitfld.long 0x70 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x70 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x70 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x70 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x70 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x70 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x70 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x70 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x70 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x70 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x70 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x70 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x74 "CHCTRL11,Channel y Control Register (y=0~11)" bitfld.long 0x74 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x74 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x74 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x74 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x74 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x74 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x74 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x74 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x74 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x74 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x74 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x74 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" group.long ad:0xB0000088++0x3F line.long 0x00 "RESCTRL0,Result z Control Register (z=0~15)" bitfld.long 0x00 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x00 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x04 "RESCTRL1,Result z Control Register (z=0~15)" bitfld.long 0x04 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x04 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x04 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x08 "RESCTRL2,Result z Control Register (z=0~15)" bitfld.long 0x08 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x08 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x08 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x0C "RESCTRL3,Result z Control Register (z=0~15)" bitfld.long 0x0C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x0C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x0C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x10 "RESCTRL4,Result z Control Register (z=0~15)" bitfld.long 0x10 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x10 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x10 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x14 "RESCTRL5,Result z Control Register (z=0~15)" bitfld.long 0x14 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x14 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x14 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x18 "RESCTRL6,Result z Control Register (z=0~15)" bitfld.long 0x18 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x18 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x18 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x1C "RESCTRL7,Result z Control Register (z=0~15)" bitfld.long 0x1C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x1C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x1C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x20 "RESCTRL8,Result z Control Register (z=0~15)" bitfld.long 0x20 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x20 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x20 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x24 "RESCTRL9,Result z Control Register (z=0~15)" bitfld.long 0x24 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x24 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x24 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x28 "RESCTRL10,Result z Control Register (z=0~15)" bitfld.long 0x28 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x28 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x28 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x2C "RESCTRL11,Result z Control Register (z=0~15)" bitfld.long 0x2C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x2C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x2C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x30 "RESCTRL12,Result z Control Register (z=0~15)" bitfld.long 0x30 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x30 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x30 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x34 "RESCTRL13,Result z Control Register (z=0~15)" bitfld.long 0x34 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x34 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x34 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x38 "RESCTRL14,Result z Control Register (z=0~15)" bitfld.long 0x38 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x38 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x38 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x3C "RESCTRL15,Result z Control Register (z=0~15)" bitfld.long 0x3C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x3C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x3C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" rgroup.long ad:0xB00000C8++0x7F line.long 0x00 "RESULT0,Result Register (z=0~15)" bitfld.long 0x00 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x00 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x00 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x04 "RESULT1,Result Register (z=0~15)" bitfld.long 0x04 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x04 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x04 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x08 "RESULT2,Result Register (z=0~15)" bitfld.long 0x08 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x08 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x08 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x0C "RESULT3,Result Register (z=0~15)" bitfld.long 0x0C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x0C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x0C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x10 "RESULT4,Result Register (z=0~15)" bitfld.long 0x10 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x10 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x10 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x10 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x14 "RESULT5,Result Register (z=0~15)" bitfld.long 0x14 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x14 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x14 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x14 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x18 "RESULT6,Result Register (z=0~15)" bitfld.long 0x18 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x18 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x18 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x18 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x1C "RESULT7,Result Register (z=0~15)" bitfld.long 0x1C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x1C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x1C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x1C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x20 "RESULT8,Result Register (z=0~15)" bitfld.long 0x20 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x20 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x20 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x20 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x24 "RESULT9,Result Register (z=0~15)" bitfld.long 0x24 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x24 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x24 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x24 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x28 "RESULT10,Result Register (z=0~15)" bitfld.long 0x28 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x28 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x28 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x28 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x2C "RESULT11,Result Register (z=0~15)" bitfld.long 0x2C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x2C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x2C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x2C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x30 "RESULT12,Result Register (z=0~15)" bitfld.long 0x30 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x30 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x30 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x30 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x34 "RESULT13,Result Register (z=0~15)" bitfld.long 0x34 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x34 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x34 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x34 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x38 "RESULT14,Result Register (z=0~15)" bitfld.long 0x38 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x38 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x38 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x38 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x3C "RESULT15,Result Register (z=0~15)" bitfld.long 0x3C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x3C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x3C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x3C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x40 "RESULTD0,Result Debug Register (z=0~15)" bitfld.long 0x40 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x40 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x40 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x40 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x44 "RESULTD1,Result Debug Register (z=0~15)" bitfld.long 0x44 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x44 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x44 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x44 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x48 "RESULTD2,Result Debug Register (z=0~15)" bitfld.long 0x48 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x48 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x48 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x48 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x4C "RESULTD3,Result Debug Register (z=0~15)" bitfld.long 0x4C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x4C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x4C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x4C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x50 "RESULTD4,Result Debug Register (z=0~15)" bitfld.long 0x50 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x50 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x50 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x50 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x54 "RESULTD5,Result Debug Register (z=0~15)" bitfld.long 0x54 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x54 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x54 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x54 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x58 "RESULTD6,Result Debug Register (z=0~15)" bitfld.long 0x58 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x58 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x58 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x58 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x5C "RESULTD7,Result Debug Register (z=0~15)" bitfld.long 0x5C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x5C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x5C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x5C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x60 "RESULTD8,Result Debug Register (z=0~15)" bitfld.long 0x60 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x60 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x60 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x60 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x64 "RESULTD9,Result Debug Register (z=0~15)" bitfld.long 0x64 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x64 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x64 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x64 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x68 "RESULTD10,Result Debug Register (z=0~15)" bitfld.long 0x68 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x68 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x68 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x68 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x6C "RESULTD11,Result Debug Register (z=0~15)" bitfld.long 0x6C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x6C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x6C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x6C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x70 "RESULTD12,Result Debug Register (z=0~15)" bitfld.long 0x70 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x70 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x70 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x70 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x74 "RESULTD13,Result Debug Register (z=0~15)" bitfld.long 0x74 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x74 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x74 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x74 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x78 "RESULTD14,Result Debug Register (z=0~15)" bitfld.long 0x78 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x78 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x78 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x78 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x7C "RESULTD15,Result Debug Register (z=0~15)" bitfld.long 0x7C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x7C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x7C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x7C 0.--15. 1. "CONRESULT,Conversion Result" group.long ad:0xB0000148++0x0B line.long 0x00 "CINTCTRL,Channel Interruption Control Register" bitfld.long 0x00 30.--31. "CMASK,Channel Interruption Mask" "0,1,2,3" bitfld.long 0x00 11. "CINT11,Channel Interruption Flag for Channel 11" "0,1" bitfld.long 0x00 10. "CINT10,Channel Interruption Flag for Channel 10" "0,1" bitfld.long 0x00 9. "CINT9,Channel Interruption Flag for Channel 9" "0,1" bitfld.long 0x00 8. "CINT8,Channel Interruption Flag for Channel 8" "0,1" bitfld.long 0x00 7. "CINT7,Channel Interruption Flag for Channel 7" "0,1" newline bitfld.long 0x00 6. "CINT6,Channel Interruption Flag for Channel 6" "0,1" bitfld.long 0x00 5. "CINT5,Channel Interruption Flag for Channel 5" "0,1" bitfld.long 0x00 4. "CINT4,Channel Interruption Flag for Channel 4" "0,1" bitfld.long 0x00 3. "CINT3,Channel Interruption Flag for Channel 3" "0,1" bitfld.long 0x00 2. "CINT2,Channel Interruption Flag for Channel 2" "0,1" bitfld.long 0x00 1. "CINT1,Channel Interruption Flag for Channel 1" "0,1" newline bitfld.long 0x00 0. "CINT0,Channel Interruption Flag for Channel 0" "0,1" line.long 0x04 "RINTCTRL,Result Interruption Control Register" bitfld.long 0x04 30.--31. "RMASK,Result Interruption Mask" "0,1,2,3" bitfld.long 0x04 15. "RINT15,Result Interruption Flag for RESULT 15" "0,1" bitfld.long 0x04 14. "RINT14,Result Interruption Flag for RESULT 14" "0,1" bitfld.long 0x04 13. "RINT13,Result Interruption Flag for RESULT 13" "0,1" bitfld.long 0x04 12. "RINT12,Result Interruption Flag for RESULT 12" "0,1" bitfld.long 0x04 11. "RINT11,Result Interruption Flag for RESULT 11" "0,1" newline bitfld.long 0x04 10. "RINT10,Result Interruption Flag for RESULT 10" "0,1" bitfld.long 0x04 9. "RINT9,Result Interruption Flag for RESULT 9" "0,1" bitfld.long 0x04 8. "RINT8,Result Interruption Flag for RESULT 8" "0,1" bitfld.long 0x04 7. "RINT7,Result Interruption Flag for RESULT 7" "0,1" bitfld.long 0x04 6. "RINT6,Result Interruption Flag for RESULT 6" "0,1" bitfld.long 0x04 5. "RINT5,Result Interruption Flag for RESULT 5" "0,1" newline bitfld.long 0x04 4. "RINT4,Result Interruption Flag for RESULT 4" "0,1" bitfld.long 0x04 3. "RINT3,Result Interruption Flag for RESULT 3" "0,1" bitfld.long 0x04 2. "RINT2,Result Interruption Flag for RESULT 2" "0,1" bitfld.long 0x04 1. "RINT1,Result Interruption Flag for RESULT 1" "0,1" bitfld.long 0x04 0. "RINT0,Result Interruption Flag for RESULT 0" "0,1" line.long 0x08 "SINTCTRL,Source Interruption Control Register" bitfld.long 0x08 30.--31. "SMASK,Source Interruption Mask" "0,1,2,3" bitfld.long 0x08 2. "SINT2,Source Interruption Flag for Queue 2" "0,1" bitfld.long 0x08 1. "SINT1,Source Interruption Flag for Queue 1" "0,1" bitfld.long 0x08 0. "SINT0,Source Interruption Flag for Queue 0" "0,1" wgroup.long ad:0xB0000154++0x0B line.long 0x00 "CINTCLR,Channel Interruption Clear Register" bitfld.long 0x00 11. "CCLR11,Channel 11 Interruption Flag Clear" "0,1" bitfld.long 0x00 10. "CCLR10,Channel 10 Interruption Flag Clear" "0,1" bitfld.long 0x00 9. "CCLR9,Channel 9 Interruption Flag Clear" "0,1" bitfld.long 0x00 8. "CCLR8,Channel 8 Interruption Flag Clear" "0,1" bitfld.long 0x00 7. "CCLR7,Channel 7 Interruption Flag Clear" "0,1" bitfld.long 0x00 6. "CCLR6,Channel 6 Interruption Flag Clear" "0,1" newline bitfld.long 0x00 5. "CCLR5,Channel 5 Interruption Flag Clear" "0,1" bitfld.long 0x00 4. "CCLR4,Channel 4 Interruption Flag Clear" "0,1" bitfld.long 0x00 3. "CCLR3,Channel 3 Interruption Flag Clear" "0,1" bitfld.long 0x00 2. "CCLR2,Channel 2 Interruption Flag Clear" "0,1" bitfld.long 0x00 1. "CCLR1,Channel 1 Interruption Flag Clear" "0,1" bitfld.long 0x00 0. "CCLR0,Channel 0 Interruption Flag Clear" "0,1" line.long 0x04 "RINTCLR,Result Interruption Clear Register" bitfld.long 0x04 15. "RCLR15,Result 15 Interruption Flag Clear" "0,1" bitfld.long 0x04 14. "RCLR14,Result 14 Interruption Flag Clear" "0,1" bitfld.long 0x04 13. "RCLR13,Result 13 Interruption Flag Clear" "0,1" bitfld.long 0x04 12. "RCLR12,Result 12 Interruption Flag Clear" "0,1" bitfld.long 0x04 11. "RCLR11,Result 11 Interruption Flag Clear" "0,1" bitfld.long 0x04 10. "RCLR10,Result 10 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 9. "RCLR9,Result 9 Interruption Flag Clear" "0,1" bitfld.long 0x04 8. "RCLR8,Result 8 Interruption Flag Clear" "0,1" bitfld.long 0x04 7. "RCLR7,Result 7 Interruption Flag Clear" "0,1" bitfld.long 0x04 6. "RCLR6,Result 6 Interruption Flag Clear" "0,1" bitfld.long 0x04 5. "RCLR5,Result 5 Interruption Flag Clear" "0,1" bitfld.long 0x04 4. "RCLR4,Result 4 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 3. "RCLR3,Result 3 Interruption Flag Clear" "0,1" bitfld.long 0x04 2. "RCLR2,Result 2 Interruption Flag Clear" "0,1" bitfld.long 0x04 1. "RCLR1,Result 1 Interruption Flag Clear" "0,1" bitfld.long 0x04 0. "RCLR0,Result 0 Interruption Flag Clear" "0,1" line.long 0x08 "SINTCLR,Queue Interruption Clear Register" bitfld.long 0x08 2. "SCLR2,Queue 2 Interruption Flag Clear" "0,1" bitfld.long 0x08 1. "SCLR1,Queue 1 Interruption Flag Clear" "0,1" bitfld.long 0x08 0. "SCLR0,Queue 0 Interruption Flag Clear" "0,1" group.long ad:0xB0000160++0x13 line.long 0x00 "CINTNP0,Channel Interruption Node Pointer 0 Register" bitfld.long 0x00 28.--31. "CINT7NP,Channel 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "CINT6NP,Channel 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "CINT5NP,Channel 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "CINT4NP,Channel 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "CINT3NP,Channel 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "CINT2NP,Channel 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 4.--7. "CINT1NP,Channel 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CINT0NP,Channel 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CINTNP1,Channel Interruption Node Pointer 1 Register" bitfld.long 0x04 12.--15. "CINT11NP,Channel 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. "CINT10NP,Channel 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. "CINT9NP,Channel 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. "CINT8NP,Channel 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RINTNP0,Result Interruption Node Pointer 0 Register" bitfld.long 0x08 28.--31. "RINT7NP,Result 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. "RINT6NP,Result 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. "RINT5NP,Result 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. "RINT4NP,Result 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. "RINT3NP,Result 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. "RINT2NP,Result 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 4.--7. "RINT1NP,Result 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. "RINT0NP,Result 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "RINTNP1,Result Interruption Node Pointer 1 Register" bitfld.long 0x0C 28.--31. "RINT15NP,Result 15 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. "RINT14NP,Result 14 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 20.--23. "RINT13NP,Result 13 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. "RINT12NP,Result 12 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 12.--15. "RINT11NP,Result 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. "RINT10NP,Result 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x0C 4.--7. "RINT9NP,Result 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. "RINT8NP,Result 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SINTNP,Source Interruption Node Pointer Register" bitfld.long 0x10 8.--11. "SINT2NP,Source 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 4.--7. "SINT1NP,Source 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. "SINT0NP,Source 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xB0000174++0x03 line.long 0x00 "STRIINT,Software Trigger Interruption Register" bitfld.long 0x00 11. "SASINT3,Software Activate Common Shared Interruption 3" "0,1" bitfld.long 0x00 10. "SASINT2,Software Activate Common Shared Interruption 2" "0,1" bitfld.long 0x00 9. "SASINT1,Software Activate Common Shared Interruption 1" "0,1" bitfld.long 0x00 8. "SASINT0,Software Activate Common Shared Interruption 0" "0,1" bitfld.long 0x00 3. "SAGINT3,Software Activate Group Interruption 3" "0,1" bitfld.long 0x00 2. "SAGINT2,Software Activate Group Interruption 2" "0,1" newline bitfld.long 0x00 1. "SAGINT1,Software Activate Group Interruption 1" "0,1" bitfld.long 0x00 0. "SAGINT0,Software Activate Group Interruption 0" "0,1" group.long ad:0xB0000178++0x0B line.long 0x00 "ALIASCH,Alias Channel Register" bitfld.long 0x00 0.--4. "ALIASCH,Alias Channel for CH0 Conversion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "DMAEN,DMA Enable Control Register" bitfld.long 0x04 15. "DMAEN15,DMA enable for RESULT15" "0,1" bitfld.long 0x04 14. "DMAEN14,DMA enable for RESULT 14" "0,1" bitfld.long 0x04 13. "DMAEN13,DMA enable for RESULT 13" "0,1" bitfld.long 0x04 12. "DMAEN12,DMA enable for RESULT 12" "0,1" bitfld.long 0x04 11. "DMAEN11,DMA enable for RESULT 11" "0,1" bitfld.long 0x04 10. "DMAEN10,DMA enable for RESULT 10" "0,1" newline bitfld.long 0x04 9. "DMAEN9,DMA enable for RESULT 9" "0,1" bitfld.long 0x04 8. "DMAEN8,DMA enable for RESULT 8" "0,1" bitfld.long 0x04 7. "DMAEN7,DMA enable for RESULT 7" "0,1" bitfld.long 0x04 6. "DMAEN6,DMA enable for RESULT 6" "0,1" bitfld.long 0x04 5. "DMAEN5,DMA enable for RESULT 5" "0,1" bitfld.long 0x04 4. "DMAEN4,DMA enable for RESULT 4" "0,1" newline bitfld.long 0x04 3. "DMAEN3,DMA enable for RESULT 3" "0,1" bitfld.long 0x04 2. "DMAEN2,DMA enable for RESULT 2" "0,1" bitfld.long 0x04 1. "DMAEN1,DMA enable for RESULT 1" "0,1" bitfld.long 0x04 0. "DMAEN0,DMA enable for RESULT 0" "0,1" line.long 0x08 "ANCONFIG,Analog Configuration Register" bitfld.long 0x08 0. "COMPCRT,Trim Factor of Comparator" "0,1" rgroup.long ad:0xB0000184++0x0B line.long 0x00 "QFIFO0,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x00 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x00 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x00 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "QFIFO1,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x04 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x04 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x04 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "QFIFO2,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x08 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x08 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x08 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xB0000194++0x07 line.long 0x00 "FAULTIN,Safety Fault Input Register" bitfld.long 0x00 10.--11. "DAISYDFI,DAISY Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 8.--9. "SYNCDFI,SYNC Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 6.--7. "GATEDFI,Gate Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 4.--5. "FTFI,Feedback Timeout Fault Input" "0,1,2,3" bitfld.long 0x00 2.--3. "TRIDFI,Trigger Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 0.--1. "DRFI,DFF Redundancy Fault Input" "0,1,2,3" line.long 0x04 "SAFEEN,Safety Enable Register" bitfld.long 0x04 30.--31. "BEMASK,Bus Error Mask Control" "0,1,2,3" bitfld.long 0x04 12.--13. "DAISYDSE,DAISY Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 10.--11. "SYNCDSE,SYNC Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 8.--9. "GATEDSE,Gate Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 6.--7. "BDSE,Boundary Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 4.--5. "DTSE,DMA Timeout Safety Enable" "0,1,2,3" newline bitfld.long 0x04 2.--3. "TRIDSE,Trigger Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 0.--1. "DRSE,DFF Redundancy Safety Enable" "0,1,2,3" rgroup.long ad:0xB000019C++0x03 line.long 0x00 "SAFEALM,Safety Alarm Register" bitfld.long 0x00 20. "DMALOSEALM,DMA Request Lose Alarm" "0,1" bitfld.long 0x00 19. "GLORESCTRLALM,GLORESCTRL Redundancy Alarm" "0,1" bitfld.long 0x00 18. "GLORESULTALM,GLORESULT Redundancy Alarm" "0,1" bitfld.long 0x00 17. "ALARMCLRALM,ALARMCLR Redundancy Alarm" "0,1" bitfld.long 0x00 16. "SAFEENALM,SAFEEN Redundancy Alarm" "0,1" bitfld.long 0x00 15. "FAULTINALM,FAULTIN Redundancy Alarm" "0,1" newline bitfld.long 0x00 14. "ANCONFIGALM,ANCONFIG Redundancy Alarm" "0,1" bitfld.long 0x00 13. "RESULTALM,RESULTz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 12. "RESCTRLALM,RESCTRLz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 11. "CHCTRLALM,CHCTRLy(y = 0~11) Redundancy Alarm" "0,1" bitfld.long 0x00 10. "QINCFGALM,QINCFGx(x = 0~2) Redundancy Alarm" "0,1" bitfld.long 0x00 9. "ARBCTRLALM,ARBCTRL Redundancy Alarm" "0,1" newline bitfld.long 0x00 8. "ANACFGALM,ANACFG Redundancy Alarm" "0,1" bitfld.long 0x00 7. "DAITOALM,Daisy Chain Signal Timeout Alarm" "0,1" bitfld.long 0x00 6. "SYNTOALM,Synchronization Signal Timeout Alarm" "0,1" bitfld.long 0x00 5. "GATOALM,Gate Timeout Alarm" "0,1" bitfld.long 0x00 4. "TRITOALM,Trigger Timeout Alarm" "0,1" bitfld.long 0x00 3. "SEALM,Safety Endinit Alarm" "0,1" newline bitfld.long 0x00 2. "EALM,Endinit Alarm" "0,1" bitfld.long 0x00 1. "DMATOALM,DMA Timeout Alarm" "0,1" bitfld.long 0x00 0. "BOUNDALM,Boundary Detection Alarm" "0,1" wgroup.long ad:0xB00001A0++0x03 line.long 0x00 "SAFEALMCLR,Safety Alarm Clear Register" bitfld.long 0x00 8.--9. "ESEALMC,Endinit / Safety Endinit Alarm Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "DMATOALMC,DMA Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "BOUNDALMC,Boundary Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SMDALMC,Signal Monitor Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "DRALMC,Register Redundancy Alarm Clear" "0,1,2,3" group.long ad:0xB00001A4++0x13 line.long 0x00 "SAFEBOUND,Safety Boundary Control Register" bitfld.long 0x00 30. "SAFEBOUNDDR,Discard Result out of Boundary ADC Conversion Result Handle" "0,1" hexmask.long.word 0x00 16.--27. 1. "SAFEBOUNDU,Software set upper boundary" hexmask.long.word 0x00 0.--11. 1. "SAFEBOUNDL,Software set lower boundary" line.long 0x04 "TRIGATTHRES,Trigger and Gate Monitor Threshold Register" line.long 0x08 "SYNCTHRES,Synchronization Signal Monitor Threshold Register" line.long 0x0C "DAISYTHRES,Daisy Chain Signal Monitor Threshold Register" line.long 0x10 "DMATHRES,DMA Handshake Threshold Register" group.long ad:0xB0000200++0x03 line.long 0x00 "GLOINTCTRL,Global Interruption Control Register" bitfld.long 0x00 30.--31. "GMASK,Global Result Interruption Mask" "0,1,2,3" bitfld.long 0x00 16.--19. "GRINTNP,Global Result Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. "GCLR,Global Result Interruption Clear" "0,1" bitfld.long 0x00 0. "GINT,Global Result Interruption Flag" "0,1" rgroup.long ad:0xB0000204++0x07 line.long 0x00 "GLORESULT,Global Result Register" bitfld.long 0x00 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x00 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x00 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. "GCONRESULT,Conversion Result" line.long 0x04 "GLORESULTD,Global Result Debug Register" bitfld.long 0x04 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x04 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x04 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. "GCONRESULT,Conversion Result" group.long ad:0xB000020C++0x0B line.long 0x00 "GLORESCTRL,Global Result Control Register" bitfld.long 0x00 8. "GNRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "GWFRMODE,Wait-for-Read Mode Enable" "0,1" bitfld.long 0x00 0. "GRESALI,Result Format Alignment" "0,1" line.long 0x04 "GLODMA,Global DMA Enable Control Register" bitfld.long 0x04 0. "GDMAEN,Global DMA Enable Control" "0,1" line.long 0x08 "GLOFUNBOUND,Global Functional Bound Control Register" hexmask.long.word 0x08 16.--27. 1. "GBOUNDU,Software Set Upper Boundary" hexmask.long.word 0x08 0.--11. 1. "GBOUNDL,Software Set Lower Boundary" tree.end tree "SARADC1" group.long ad:0xB0000400++0x77 line.long 0x00 "Q2TRICTRL,Queue 2 Trigger Control Register" bitfld.long 0x00 16. "INTRISEL,Internal Trigger Source Selection" "0,1" hexmask.long.byte 0x00 8.--13. 1. "TRICNTSET,Queue Trigger Counter Initial Value" hexmask.long.byte 0x00 0.--5. 1. "TRICNT,Queue Trigger Counter" line.long 0x04 "ANACFG,Analog Configuration Register" rbitfld.long 0x04 31. "ANAFLG,SARADC Analog Flag" "0,1" hexmask.long.byte 0x04 16.--21. 1. "OFFSET,SARADC Offset" hexmask.long.byte 0x04 8.--15. 1. "ANADIVF,SARADC Divider Factor For The Analog Internal Clock" bitfld.long 0x04 5. "DISHEN,Calibration Offset Enable" "0,1" bitfld.long 0x04 4. "CALIC,Calibration Control" "0,1" bitfld.long 0x04 2.--3. "ANARESO,ADC Resolution Configuration" "0,1,2,3" newline bitfld.long 0x04 1. "REFSEL,Reference Voltage Selection" "0,1" bitfld.long 0x04 0. "ANAEN,SARADC Analog Enable" "0,1" line.long 0x08 "ARBCTRL,Arbiter Control Register" rbitfld.long 0x08 29. "INJECT2STA,Queue2 Insert Status" "0,1" rbitfld.long 0x08 28. "INJECT1STA,Queue1 Insert Status" "0,1" rbitfld.long 0x08 27. "INJECT0STA,Queue0 Insert Status" "0,1" bitfld.long 0x08 26. "ARBEN2,Arbitration Queue2 Enable Control" "0,1" bitfld.long 0x08 25. "ARBEN1,Arbitration Queue1 Enable Control" "0,1" bitfld.long 0x08 24. "ARBEN0,Arbitration Queue0 Enable Control" "0,1" newline rbitfld.long 0x08 23. "SYNCBUSY,Synchronous Queue Busy Flag" "0,1" rbitfld.long 0x08 22. "Q2BUSY,Queue2 Busy Flag" "0,1" rbitfld.long 0x08 21. "Q1BUSY,Queue1 Busy Flag" "0,1" rbitfld.long 0x08 20. "Q0BUSY,Queue0 Busy Flag" "0,1" rbitfld.long 0x08 18. "Q2WAIT,Queue2 Wait Status" "0,1" rbitfld.long 0x08 17. "Q1WAIT,Queue1 Wait Status" "0,1" newline rbitfld.long 0x08 16. "Q0WAIT,Queue0 Wait Status" "0,1" bitfld.long 0x08 15. "INJECT2CLR,Queue2 Inject Status Clear" "0,1" bitfld.long 0x08 14. "INJECT1CLR,Queue1 Inject Status Clear" "0,1" bitfld.long 0x08 13. "INJECT0CLR,Queue0 Inject Status Clear" "0,1" bitfld.long 0x08 11. "CONSMODE2,Conversion Start Mode of Queue 2" "0,1" bitfld.long 0x08 8.--9. "PRIOL2,Priority Level of Queue 2 Configuration" "0,1,2,3" newline bitfld.long 0x08 7. "CONSMODE1,Conversion Start Mode of Queue 1" "0,1" bitfld.long 0x08 4.--5. "PRIOL1,Priority Level of Queue 1 Configuration" "0,1,2,3" bitfld.long 0x08 3. "CONSMODE0,Conversion Start Mode of Queue 0" "0,1" bitfld.long 0x08 0.--1. "PRIOL0,Priority Level of Queue 0 Configuration" "0,1,2,3" line.long 0x0C "SAMCTRL,Sample Time Control Register" hexmask.long.byte 0x0C 0.--7. 1. "STCTRL,Sample time control register" line.long 0x10 "FUNBOUND,Functional Bound Control Register" bitfld.long 0x10 28.--31. "BOUNDUSEL,Upper Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 16.--27. 1. "BOUNDU,Software Set Upper Boundary" bitfld.long 0x10 12.--15. "BOUNDLSEL,Lower Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 0.--11. 1. "BOUNDL,Software Set Lower Boundary" line.long 0x14 "SYNCCTRL,Synchronous Converter Control Register" bitfld.long 0x14 6. "SYNCEN3,Synchronous Converter Follows CI3 Enable" "0,1" bitfld.long 0x14 5. "SYNCEN2,Synchronous Converter Follows CI2 Enable" "0,1" bitfld.long 0x14 4. "SYNCEN1,Synchronous Converter Follows CI1 Enable" "0,1" bitfld.long 0x14 0.--1. "SYNCSEL,Synchronous Converter Source Selection" "0,1,2,3" line.long 0x18 "QTRICTRL0,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x18 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x18 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x18 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x18 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x18 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x18 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x1C "QTRICTRL1,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x1C 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x1C 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x1C 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x1C 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x1C 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x1C 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x20 "QTRICTRL2,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x20 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x20 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x20 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x20 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x20 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x20 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x24 "QMODE0,Queue x Mode Control Register (x=0~2)" bitfld.long 0x24 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x24 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x24 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x24 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x28 "QMODE1,Queue x Mode Control Register (x=0~2)" bitfld.long 0x28 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x28 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x28 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x28 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x2C "QMODE2,Queue x Mode Control Register (x=0~2)" bitfld.long 0x2C 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x2C 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x2C 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x2C 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x30 "QINCFG0,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x30 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x30 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x30 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x30 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x30 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x30 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x30 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x30 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x30 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x30 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "QINCFG1,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x34 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x34 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x34 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x34 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x34 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x34 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x34 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x34 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x34 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x34 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "QINCFG2,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x38 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x38 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x38 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x38 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x38 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x38 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x38 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x38 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x38 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x38 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "QREQTM0,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x3C 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x3C 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x3C 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x3C 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x40 "QREQTM1,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x40 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x40 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x40 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x40 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x44 "QREQTM2,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x44 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x44 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x44 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x44 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x48 "CHCTRL0,Channel y Control Register (y=0~11)" bitfld.long 0x48 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x48 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x48 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x48 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x48 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x48 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x48 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x48 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x48 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x48 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x48 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x48 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x4C "CHCTRL1,Channel y Control Register (y=0~11)" bitfld.long 0x4C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x4C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x4C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x4C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x4C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x4C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x4C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x4C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x4C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x4C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x4C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x4C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x50 "CHCTRL2,Channel y Control Register (y=0~11)" bitfld.long 0x50 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x50 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x50 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x50 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x50 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x50 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x50 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x50 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x50 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x50 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x50 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x50 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x54 "CHCTRL3,Channel y Control Register (y=0~11)" bitfld.long 0x54 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x54 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x54 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x54 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x54 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x54 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x54 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x54 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x54 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x54 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x54 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x54 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x58 "CHCTRL4,Channel y Control Register (y=0~11)" bitfld.long 0x58 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x58 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x58 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x58 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x58 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x58 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x58 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x58 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x58 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x58 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x58 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x58 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x5C "CHCTRL5,Channel y Control Register (y=0~11)" bitfld.long 0x5C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x5C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x5C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x5C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x5C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x5C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x5C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x5C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x5C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x5C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x5C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x5C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x60 "CHCTRL6,Channel y Control Register (y=0~11)" bitfld.long 0x60 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x60 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x60 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x60 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x60 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x60 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x60 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x60 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x60 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x60 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x60 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x60 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x64 "CHCTRL7,Channel y Control Register (y=0~11)" bitfld.long 0x64 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x64 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x64 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x64 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x64 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x64 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x64 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x64 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x64 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x64 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x64 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x64 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x68 "CHCTRL8,Channel y Control Register (y=0~11)" bitfld.long 0x68 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x68 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x68 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x68 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x68 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x68 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x68 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x68 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x68 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x68 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x68 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x68 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x6C "CHCTRL9,Channel y Control Register (y=0~11)" bitfld.long 0x6C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x6C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x6C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x6C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x6C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x6C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x6C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x6C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x6C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x6C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x6C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x6C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x70 "CHCTRL10,Channel y Control Register (y=0~11)" bitfld.long 0x70 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x70 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x70 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x70 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x70 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x70 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x70 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x70 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x70 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x70 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x70 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x70 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x74 "CHCTRL11,Channel y Control Register (y=0~11)" bitfld.long 0x74 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x74 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x74 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x74 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x74 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x74 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x74 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x74 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x74 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x74 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x74 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x74 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" group.long ad:0xB0000488++0x3F line.long 0x00 "RESCTRL0,Result z Control Register (z=0~15)" bitfld.long 0x00 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x00 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x04 "RESCTRL1,Result z Control Register (z=0~15)" bitfld.long 0x04 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x04 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x04 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x08 "RESCTRL2,Result z Control Register (z=0~15)" bitfld.long 0x08 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x08 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x08 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x0C "RESCTRL3,Result z Control Register (z=0~15)" bitfld.long 0x0C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x0C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x0C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x10 "RESCTRL4,Result z Control Register (z=0~15)" bitfld.long 0x10 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x10 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x10 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x14 "RESCTRL5,Result z Control Register (z=0~15)" bitfld.long 0x14 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x14 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x14 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x18 "RESCTRL6,Result z Control Register (z=0~15)" bitfld.long 0x18 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x18 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x18 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x1C "RESCTRL7,Result z Control Register (z=0~15)" bitfld.long 0x1C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x1C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x1C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x20 "RESCTRL8,Result z Control Register (z=0~15)" bitfld.long 0x20 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x20 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x20 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x24 "RESCTRL9,Result z Control Register (z=0~15)" bitfld.long 0x24 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x24 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x24 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x28 "RESCTRL10,Result z Control Register (z=0~15)" bitfld.long 0x28 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x28 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x28 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x2C "RESCTRL11,Result z Control Register (z=0~15)" bitfld.long 0x2C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x2C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x2C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x30 "RESCTRL12,Result z Control Register (z=0~15)" bitfld.long 0x30 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x30 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x30 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x34 "RESCTRL13,Result z Control Register (z=0~15)" bitfld.long 0x34 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x34 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x34 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x38 "RESCTRL14,Result z Control Register (z=0~15)" bitfld.long 0x38 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x38 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x38 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x3C "RESCTRL15,Result z Control Register (z=0~15)" bitfld.long 0x3C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x3C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x3C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" rgroup.long ad:0xB00004C8++0x7F line.long 0x00 "RESULT0,Result Register (z=0~15)" bitfld.long 0x00 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x00 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x00 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x04 "RESULT1,Result Register (z=0~15)" bitfld.long 0x04 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x04 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x04 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x08 "RESULT2,Result Register (z=0~15)" bitfld.long 0x08 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x08 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x08 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x0C "RESULT3,Result Register (z=0~15)" bitfld.long 0x0C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x0C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x0C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x10 "RESULT4,Result Register (z=0~15)" bitfld.long 0x10 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x10 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x10 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x10 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x14 "RESULT5,Result Register (z=0~15)" bitfld.long 0x14 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x14 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x14 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x14 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x18 "RESULT6,Result Register (z=0~15)" bitfld.long 0x18 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x18 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x18 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x18 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x1C "RESULT7,Result Register (z=0~15)" bitfld.long 0x1C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x1C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x1C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x1C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x20 "RESULT8,Result Register (z=0~15)" bitfld.long 0x20 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x20 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x20 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x20 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x24 "RESULT9,Result Register (z=0~15)" bitfld.long 0x24 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x24 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x24 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x24 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x28 "RESULT10,Result Register (z=0~15)" bitfld.long 0x28 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x28 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x28 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x28 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x2C "RESULT11,Result Register (z=0~15)" bitfld.long 0x2C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x2C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x2C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x2C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x30 "RESULT12,Result Register (z=0~15)" bitfld.long 0x30 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x30 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x30 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x30 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x34 "RESULT13,Result Register (z=0~15)" bitfld.long 0x34 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x34 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x34 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x34 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x38 "RESULT14,Result Register (z=0~15)" bitfld.long 0x38 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x38 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x38 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x38 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x3C "RESULT15,Result Register (z=0~15)" bitfld.long 0x3C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x3C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x3C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x3C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x40 "RESULTD0,Result Debug Register (z=0~15)" bitfld.long 0x40 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x40 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x40 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x40 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x44 "RESULTD1,Result Debug Register (z=0~15)" bitfld.long 0x44 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x44 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x44 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x44 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x48 "RESULTD2,Result Debug Register (z=0~15)" bitfld.long 0x48 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x48 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x48 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x48 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x4C "RESULTD3,Result Debug Register (z=0~15)" bitfld.long 0x4C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x4C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x4C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x4C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x50 "RESULTD4,Result Debug Register (z=0~15)" bitfld.long 0x50 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x50 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x50 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x50 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x54 "RESULTD5,Result Debug Register (z=0~15)" bitfld.long 0x54 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x54 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x54 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x54 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x58 "RESULTD6,Result Debug Register (z=0~15)" bitfld.long 0x58 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x58 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x58 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x58 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x5C "RESULTD7,Result Debug Register (z=0~15)" bitfld.long 0x5C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x5C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x5C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x5C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x60 "RESULTD8,Result Debug Register (z=0~15)" bitfld.long 0x60 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x60 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x60 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x60 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x64 "RESULTD9,Result Debug Register (z=0~15)" bitfld.long 0x64 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x64 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x64 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x64 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x68 "RESULTD10,Result Debug Register (z=0~15)" bitfld.long 0x68 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x68 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x68 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x68 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x6C "RESULTD11,Result Debug Register (z=0~15)" bitfld.long 0x6C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x6C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x6C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x6C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x70 "RESULTD12,Result Debug Register (z=0~15)" bitfld.long 0x70 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x70 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x70 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x70 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x74 "RESULTD13,Result Debug Register (z=0~15)" bitfld.long 0x74 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x74 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x74 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x74 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x78 "RESULTD14,Result Debug Register (z=0~15)" bitfld.long 0x78 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x78 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x78 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x78 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x7C "RESULTD15,Result Debug Register (z=0~15)" bitfld.long 0x7C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x7C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x7C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x7C 0.--15. 1. "CONRESULT,Conversion Result" group.long ad:0xB0000548++0x0B line.long 0x00 "CINTCTRL,Channel Interruption Control Register" bitfld.long 0x00 30.--31. "CMASK,Channel Interruption Mask" "0,1,2,3" bitfld.long 0x00 11. "CINT11,Channel Interruption Flag for Channel 11" "0,1" bitfld.long 0x00 10. "CINT10,Channel Interruption Flag for Channel 10" "0,1" bitfld.long 0x00 9. "CINT9,Channel Interruption Flag for Channel 9" "0,1" bitfld.long 0x00 8. "CINT8,Channel Interruption Flag for Channel 8" "0,1" bitfld.long 0x00 7. "CINT7,Channel Interruption Flag for Channel 7" "0,1" newline bitfld.long 0x00 6. "CINT6,Channel Interruption Flag for Channel 6" "0,1" bitfld.long 0x00 5. "CINT5,Channel Interruption Flag for Channel 5" "0,1" bitfld.long 0x00 4. "CINT4,Channel Interruption Flag for Channel 4" "0,1" bitfld.long 0x00 3. "CINT3,Channel Interruption Flag for Channel 3" "0,1" bitfld.long 0x00 2. "CINT2,Channel Interruption Flag for Channel 2" "0,1" bitfld.long 0x00 1. "CINT1,Channel Interruption Flag for Channel 1" "0,1" newline bitfld.long 0x00 0. "CINT0,Channel Interruption Flag for Channel 0" "0,1" line.long 0x04 "RINTCTRL,Result Interruption Control Register" bitfld.long 0x04 30.--31. "RMASK,Result Interruption Mask" "0,1,2,3" bitfld.long 0x04 15. "RINT15,Result Interruption Flag for RESULT 15" "0,1" bitfld.long 0x04 14. "RINT14,Result Interruption Flag for RESULT 14" "0,1" bitfld.long 0x04 13. "RINT13,Result Interruption Flag for RESULT 13" "0,1" bitfld.long 0x04 12. "RINT12,Result Interruption Flag for RESULT 12" "0,1" bitfld.long 0x04 11. "RINT11,Result Interruption Flag for RESULT 11" "0,1" newline bitfld.long 0x04 10. "RINT10,Result Interruption Flag for RESULT 10" "0,1" bitfld.long 0x04 9. "RINT9,Result Interruption Flag for RESULT 9" "0,1" bitfld.long 0x04 8. "RINT8,Result Interruption Flag for RESULT 8" "0,1" bitfld.long 0x04 7. "RINT7,Result Interruption Flag for RESULT 7" "0,1" bitfld.long 0x04 6. "RINT6,Result Interruption Flag for RESULT 6" "0,1" bitfld.long 0x04 5. "RINT5,Result Interruption Flag for RESULT 5" "0,1" newline bitfld.long 0x04 4. "RINT4,Result Interruption Flag for RESULT 4" "0,1" bitfld.long 0x04 3. "RINT3,Result Interruption Flag for RESULT 3" "0,1" bitfld.long 0x04 2. "RINT2,Result Interruption Flag for RESULT 2" "0,1" bitfld.long 0x04 1. "RINT1,Result Interruption Flag for RESULT 1" "0,1" bitfld.long 0x04 0. "RINT0,Result Interruption Flag for RESULT 0" "0,1" line.long 0x08 "SINTCTRL,Source Interruption Control Register" bitfld.long 0x08 30.--31. "SMASK,Source Interruption Mask" "0,1,2,3" bitfld.long 0x08 2. "SINT2,Source Interruption Flag for Queue 2" "0,1" bitfld.long 0x08 1. "SINT1,Source Interruption Flag for Queue 1" "0,1" bitfld.long 0x08 0. "SINT0,Source Interruption Flag for Queue 0" "0,1" wgroup.long ad:0xB0000554++0x0B line.long 0x00 "CINTCLR,Channel Interruption Clear Register" bitfld.long 0x00 11. "CCLR11,Channel 11 Interruption Flag Clear" "0,1" bitfld.long 0x00 10. "CCLR10,Channel 10 Interruption Flag Clear" "0,1" bitfld.long 0x00 9. "CCLR9,Channel 9 Interruption Flag Clear" "0,1" bitfld.long 0x00 8. "CCLR8,Channel 8 Interruption Flag Clear" "0,1" bitfld.long 0x00 7. "CCLR7,Channel 7 Interruption Flag Clear" "0,1" bitfld.long 0x00 6. "CCLR6,Channel 6 Interruption Flag Clear" "0,1" newline bitfld.long 0x00 5. "CCLR5,Channel 5 Interruption Flag Clear" "0,1" bitfld.long 0x00 4. "CCLR4,Channel 4 Interruption Flag Clear" "0,1" bitfld.long 0x00 3. "CCLR3,Channel 3 Interruption Flag Clear" "0,1" bitfld.long 0x00 2. "CCLR2,Channel 2 Interruption Flag Clear" "0,1" bitfld.long 0x00 1. "CCLR1,Channel 1 Interruption Flag Clear" "0,1" bitfld.long 0x00 0. "CCLR0,Channel 0 Interruption Flag Clear" "0,1" line.long 0x04 "RINTCLR,Result Interruption Clear Register" bitfld.long 0x04 15. "RCLR15,Result 15 Interruption Flag Clear" "0,1" bitfld.long 0x04 14. "RCLR14,Result 14 Interruption Flag Clear" "0,1" bitfld.long 0x04 13. "RCLR13,Result 13 Interruption Flag Clear" "0,1" bitfld.long 0x04 12. "RCLR12,Result 12 Interruption Flag Clear" "0,1" bitfld.long 0x04 11. "RCLR11,Result 11 Interruption Flag Clear" "0,1" bitfld.long 0x04 10. "RCLR10,Result 10 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 9. "RCLR9,Result 9 Interruption Flag Clear" "0,1" bitfld.long 0x04 8. "RCLR8,Result 8 Interruption Flag Clear" "0,1" bitfld.long 0x04 7. "RCLR7,Result 7 Interruption Flag Clear" "0,1" bitfld.long 0x04 6. "RCLR6,Result 6 Interruption Flag Clear" "0,1" bitfld.long 0x04 5. "RCLR5,Result 5 Interruption Flag Clear" "0,1" bitfld.long 0x04 4. "RCLR4,Result 4 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 3. "RCLR3,Result 3 Interruption Flag Clear" "0,1" bitfld.long 0x04 2. "RCLR2,Result 2 Interruption Flag Clear" "0,1" bitfld.long 0x04 1. "RCLR1,Result 1 Interruption Flag Clear" "0,1" bitfld.long 0x04 0. "RCLR0,Result 0 Interruption Flag Clear" "0,1" line.long 0x08 "SINTCLR,Queue Interruption Clear Register" bitfld.long 0x08 2. "SCLR2,Queue 2 Interruption Flag Clear" "0,1" bitfld.long 0x08 1. "SCLR1,Queue 1 Interruption Flag Clear" "0,1" bitfld.long 0x08 0. "SCLR0,Queue 0 Interruption Flag Clear" "0,1" group.long ad:0xB0000560++0x13 line.long 0x00 "CINTNP0,Channel Interruption Node Pointer 0 Register" bitfld.long 0x00 28.--31. "CINT7NP,Channel 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "CINT6NP,Channel 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "CINT5NP,Channel 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "CINT4NP,Channel 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "CINT3NP,Channel 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "CINT2NP,Channel 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 4.--7. "CINT1NP,Channel 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CINT0NP,Channel 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CINTNP1,Channel Interruption Node Pointer 1 Register" bitfld.long 0x04 12.--15. "CINT11NP,Channel 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. "CINT10NP,Channel 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. "CINT9NP,Channel 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. "CINT8NP,Channel 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RINTNP0,Result Interruption Node Pointer 0 Register" bitfld.long 0x08 28.--31. "RINT7NP,Result 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. "RINT6NP,Result 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. "RINT5NP,Result 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. "RINT4NP,Result 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. "RINT3NP,Result 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. "RINT2NP,Result 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 4.--7. "RINT1NP,Result 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. "RINT0NP,Result 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "RINTNP1,Result Interruption Node Pointer 1 Register" bitfld.long 0x0C 28.--31. "RINT15NP,Result 15 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. "RINT14NP,Result 14 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 20.--23. "RINT13NP,Result 13 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. "RINT12NP,Result 12 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 12.--15. "RINT11NP,Result 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. "RINT10NP,Result 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x0C 4.--7. "RINT9NP,Result 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. "RINT8NP,Result 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SINTNP,Source Interruption Node Pointer Register" bitfld.long 0x10 8.--11. "SINT2NP,Source 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 4.--7. "SINT1NP,Source 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. "SINT0NP,Source 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xB0000574++0x03 line.long 0x00 "STRIINT,Software Trigger Interruption Register" bitfld.long 0x00 11. "SASINT3,Software Activate Common Shared Interruption 3" "0,1" bitfld.long 0x00 10. "SASINT2,Software Activate Common Shared Interruption 2" "0,1" bitfld.long 0x00 9. "SASINT1,Software Activate Common Shared Interruption 1" "0,1" bitfld.long 0x00 8. "SASINT0,Software Activate Common Shared Interruption 0" "0,1" bitfld.long 0x00 3. "SAGINT3,Software Activate Group Interruption 3" "0,1" bitfld.long 0x00 2. "SAGINT2,Software Activate Group Interruption 2" "0,1" newline bitfld.long 0x00 1. "SAGINT1,Software Activate Group Interruption 1" "0,1" bitfld.long 0x00 0. "SAGINT0,Software Activate Group Interruption 0" "0,1" group.long ad:0xB0000578++0x0B line.long 0x00 "ALIASCH,Alias Channel Register" bitfld.long 0x00 0.--4. "ALIASCH,Alias Channel for CH0 Conversion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "DMAEN,DMA Enable Control Register" bitfld.long 0x04 15. "DMAEN15,DMA enable for RESULT15" "0,1" bitfld.long 0x04 14. "DMAEN14,DMA enable for RESULT 14" "0,1" bitfld.long 0x04 13. "DMAEN13,DMA enable for RESULT 13" "0,1" bitfld.long 0x04 12. "DMAEN12,DMA enable for RESULT 12" "0,1" bitfld.long 0x04 11. "DMAEN11,DMA enable for RESULT 11" "0,1" bitfld.long 0x04 10. "DMAEN10,DMA enable for RESULT 10" "0,1" newline bitfld.long 0x04 9. "DMAEN9,DMA enable for RESULT 9" "0,1" bitfld.long 0x04 8. "DMAEN8,DMA enable for RESULT 8" "0,1" bitfld.long 0x04 7. "DMAEN7,DMA enable for RESULT 7" "0,1" bitfld.long 0x04 6. "DMAEN6,DMA enable for RESULT 6" "0,1" bitfld.long 0x04 5. "DMAEN5,DMA enable for RESULT 5" "0,1" bitfld.long 0x04 4. "DMAEN4,DMA enable for RESULT 4" "0,1" newline bitfld.long 0x04 3. "DMAEN3,DMA enable for RESULT 3" "0,1" bitfld.long 0x04 2. "DMAEN2,DMA enable for RESULT 2" "0,1" bitfld.long 0x04 1. "DMAEN1,DMA enable for RESULT 1" "0,1" bitfld.long 0x04 0. "DMAEN0,DMA enable for RESULT 0" "0,1" line.long 0x08 "ANCONFIG,Analog Configuration Register" bitfld.long 0x08 0. "COMPCRT,Trim Factor of Comparator" "0,1" rgroup.long ad:0xB0000584++0x0B line.long 0x00 "QFIFO0,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x00 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x00 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x00 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "QFIFO1,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x04 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x04 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x04 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "QFIFO2,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x08 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x08 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x08 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xB0000594++0x07 line.long 0x00 "FAULTIN,Safety Fault Input Register" bitfld.long 0x00 10.--11. "DAISYDFI,DAISY Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 8.--9. "SYNCDFI,SYNC Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 6.--7. "GATEDFI,Gate Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 4.--5. "FTFI,Feedback Timeout Fault Input" "0,1,2,3" bitfld.long 0x00 2.--3. "TRIDFI,Trigger Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 0.--1. "DRFI,DFF Redundancy Fault Input" "0,1,2,3" line.long 0x04 "SAFEEN,Safety Enable Register" bitfld.long 0x04 30.--31. "BEMASK,Bus Error Mask Control" "0,1,2,3" bitfld.long 0x04 12.--13. "DAISYDSE,DAISY Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 10.--11. "SYNCDSE,SYNC Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 8.--9. "GATEDSE,Gate Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 6.--7. "BDSE,Boundary Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 4.--5. "DTSE,DMA Timeout Safety Enable" "0,1,2,3" newline bitfld.long 0x04 2.--3. "TRIDSE,Trigger Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 0.--1. "DRSE,DFF Redundancy Safety Enable" "0,1,2,3" rgroup.long ad:0xB000059C++0x03 line.long 0x00 "SAFEALM,Safety Alarm Register" bitfld.long 0x00 20. "DMALOSEALM,DMA Request Lose Alarm" "0,1" bitfld.long 0x00 19. "GLORESCTRLALM,GLORESCTRL Redundancy Alarm" "0,1" bitfld.long 0x00 18. "GLORESULTALM,GLORESULT Redundancy Alarm" "0,1" bitfld.long 0x00 17. "ALARMCLRALM,ALARMCLR Redundancy Alarm" "0,1" bitfld.long 0x00 16. "SAFEENALM,SAFEEN Redundancy Alarm" "0,1" bitfld.long 0x00 15. "FAULTINALM,FAULTIN Redundancy Alarm" "0,1" newline bitfld.long 0x00 14. "ANCONFIGALM,ANCONFIG Redundancy Alarm" "0,1" bitfld.long 0x00 13. "RESULTALM,RESULTz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 12. "RESCTRLALM,RESCTRLz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 11. "CHCTRLALM,CHCTRLy(y = 0~11) Redundancy Alarm" "0,1" bitfld.long 0x00 10. "QINCFGALM,QINCFGx(x = 0~2) Redundancy Alarm" "0,1" bitfld.long 0x00 9. "ARBCTRLALM,ARBCTRL Redundancy Alarm" "0,1" newline bitfld.long 0x00 8. "ANACFGALM,ANACFG Redundancy Alarm" "0,1" bitfld.long 0x00 7. "DAITOALM,Daisy Chain Signal Timeout Alarm" "0,1" bitfld.long 0x00 6. "SYNTOALM,Synchronization Signal Timeout Alarm" "0,1" bitfld.long 0x00 5. "GATOALM,Gate Timeout Alarm" "0,1" bitfld.long 0x00 4. "TRITOALM,Trigger Timeout Alarm" "0,1" bitfld.long 0x00 3. "SEALM,Safety Endinit Alarm" "0,1" newline bitfld.long 0x00 2. "EALM,Endinit Alarm" "0,1" bitfld.long 0x00 1. "DMATOALM,DMA Timeout Alarm" "0,1" bitfld.long 0x00 0. "BOUNDALM,Boundary Detection Alarm" "0,1" wgroup.long ad:0xB00005A0++0x03 line.long 0x00 "SAFEALMCLR,Safety Alarm Clear Register" bitfld.long 0x00 8.--9. "ESEALMC,Endinit / Safety Endinit Alarm Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "DMATOALMC,DMA Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "BOUNDALMC,Boundary Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SMDALMC,Signal Monitor Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "DRALMC,Register Redundancy Alarm Clear" "0,1,2,3" group.long ad:0xB00005A4++0x13 line.long 0x00 "SAFEBOUND,Safety Boundary Control Register" bitfld.long 0x00 30. "SAFEBOUNDDR,Discard Result out of Boundary ADC Conversion Result Handle" "0,1" hexmask.long.word 0x00 16.--27. 1. "SAFEBOUNDU,Software set upper boundary" hexmask.long.word 0x00 0.--11. 1. "SAFEBOUNDL,Software set lower boundary" line.long 0x04 "TRIGATTHRES,Trigger and Gate Monitor Threshold Register" line.long 0x08 "SYNCTHRES,Synchronization Signal Monitor Threshold Register" line.long 0x0C "DAISYTHRES,Daisy Chain Signal Monitor Threshold Register" line.long 0x10 "DMATHRES,DMA Handshake Threshold Register" group.long ad:0xB0000600++0x03 line.long 0x00 "GLOINTCTRL,Global Interruption Control Register" bitfld.long 0x00 30.--31. "GMASK,Global Result Interruption Mask" "0,1,2,3" bitfld.long 0x00 16.--19. "GRINTNP,Global Result Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. "GCLR,Global Result Interruption Clear" "0,1" bitfld.long 0x00 0. "GINT,Global Result Interruption Flag" "0,1" rgroup.long ad:0xB0000604++0x07 line.long 0x00 "GLORESULT,Global Result Register" bitfld.long 0x00 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x00 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x00 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. "GCONRESULT,Conversion Result" line.long 0x04 "GLORESULTD,Global Result Debug Register" bitfld.long 0x04 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x04 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x04 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. "GCONRESULT,Conversion Result" group.long ad:0xB000060C++0x0B line.long 0x00 "GLORESCTRL,Global Result Control Register" bitfld.long 0x00 8. "GNRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "GWFRMODE,Wait-for-Read Mode Enable" "0,1" bitfld.long 0x00 0. "GRESALI,Result Format Alignment" "0,1" line.long 0x04 "GLODMA,Global DMA Enable Control Register" bitfld.long 0x04 0. "GDMAEN,Global DMA Enable Control" "0,1" line.long 0x08 "GLOFUNBOUND,Global Functional Bound Control Register" hexmask.long.word 0x08 16.--27. 1. "GBOUNDU,Software Set Upper Boundary" hexmask.long.word 0x08 0.--11. 1. "GBOUNDL,Software Set Lower Boundary" tree.end tree "SARADC2" group.long ad:0xB0000800++0x77 line.long 0x00 "Q2TRICTRL,Queue 2 Trigger Control Register" bitfld.long 0x00 16. "INTRISEL,Internal Trigger Source Selection" "0,1" hexmask.long.byte 0x00 8.--13. 1. "TRICNTSET,Queue Trigger Counter Initial Value" hexmask.long.byte 0x00 0.--5. 1. "TRICNT,Queue Trigger Counter" line.long 0x04 "ANACFG,Analog Configuration Register" rbitfld.long 0x04 31. "ANAFLG,SARADC Analog Flag" "0,1" hexmask.long.byte 0x04 16.--21. 1. "OFFSET,SARADC Offset" hexmask.long.byte 0x04 8.--15. 1. "ANADIVF,SARADC Divider Factor For The Analog Internal Clock" bitfld.long 0x04 5. "DISHEN,Calibration Offset Enable" "0,1" bitfld.long 0x04 4. "CALIC,Calibration Control" "0,1" bitfld.long 0x04 2.--3. "ANARESO,ADC Resolution Configuration" "0,1,2,3" newline bitfld.long 0x04 1. "REFSEL,Reference Voltage Selection" "0,1" bitfld.long 0x04 0. "ANAEN,SARADC Analog Enable" "0,1" line.long 0x08 "ARBCTRL,Arbiter Control Register" rbitfld.long 0x08 29. "INJECT2STA,Queue2 Insert Status" "0,1" rbitfld.long 0x08 28. "INJECT1STA,Queue1 Insert Status" "0,1" rbitfld.long 0x08 27. "INJECT0STA,Queue0 Insert Status" "0,1" bitfld.long 0x08 26. "ARBEN2,Arbitration Queue2 Enable Control" "0,1" bitfld.long 0x08 25. "ARBEN1,Arbitration Queue1 Enable Control" "0,1" bitfld.long 0x08 24. "ARBEN0,Arbitration Queue0 Enable Control" "0,1" newline rbitfld.long 0x08 23. "SYNCBUSY,Synchronous Queue Busy Flag" "0,1" rbitfld.long 0x08 22. "Q2BUSY,Queue2 Busy Flag" "0,1" rbitfld.long 0x08 21. "Q1BUSY,Queue1 Busy Flag" "0,1" rbitfld.long 0x08 20. "Q0BUSY,Queue0 Busy Flag" "0,1" rbitfld.long 0x08 18. "Q2WAIT,Queue2 Wait Status" "0,1" rbitfld.long 0x08 17. "Q1WAIT,Queue1 Wait Status" "0,1" newline rbitfld.long 0x08 16. "Q0WAIT,Queue0 Wait Status" "0,1" bitfld.long 0x08 15. "INJECT2CLR,Queue2 Inject Status Clear" "0,1" bitfld.long 0x08 14. "INJECT1CLR,Queue1 Inject Status Clear" "0,1" bitfld.long 0x08 13. "INJECT0CLR,Queue0 Inject Status Clear" "0,1" bitfld.long 0x08 11. "CONSMODE2,Conversion Start Mode of Queue 2" "0,1" bitfld.long 0x08 8.--9. "PRIOL2,Priority Level of Queue 2 Configuration" "0,1,2,3" newline bitfld.long 0x08 7. "CONSMODE1,Conversion Start Mode of Queue 1" "0,1" bitfld.long 0x08 4.--5. "PRIOL1,Priority Level of Queue 1 Configuration" "0,1,2,3" bitfld.long 0x08 3. "CONSMODE0,Conversion Start Mode of Queue 0" "0,1" bitfld.long 0x08 0.--1. "PRIOL0,Priority Level of Queue 0 Configuration" "0,1,2,3" line.long 0x0C "SAMCTRL,Sample Time Control Register" hexmask.long.byte 0x0C 0.--7. 1. "STCTRL,Sample time control register" line.long 0x10 "FUNBOUND,Functional Bound Control Register" bitfld.long 0x10 28.--31. "BOUNDUSEL,Upper Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 16.--27. 1. "BOUNDU,Software Set Upper Boundary" bitfld.long 0x10 12.--15. "BOUNDLSEL,Lower Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 0.--11. 1. "BOUNDL,Software Set Lower Boundary" line.long 0x14 "SYNCCTRL,Synchronous Converter Control Register" bitfld.long 0x14 6. "SYNCEN3,Synchronous Converter Follows CI3 Enable" "0,1" bitfld.long 0x14 5. "SYNCEN2,Synchronous Converter Follows CI2 Enable" "0,1" bitfld.long 0x14 4. "SYNCEN1,Synchronous Converter Follows CI1 Enable" "0,1" bitfld.long 0x14 0.--1. "SYNCSEL,Synchronous Converter Source Selection" "0,1,2,3" line.long 0x18 "QTRICTRL0,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x18 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x18 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x18 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x18 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x18 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x18 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x1C "QTRICTRL1,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x1C 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x1C 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x1C 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x1C 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x1C 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x1C 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x20 "QTRICTRL2,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x20 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x20 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x20 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x20 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x20 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x20 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x24 "QMODE0,Queue x Mode Control Register (x=0~2)" bitfld.long 0x24 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x24 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x24 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x24 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x28 "QMODE1,Queue x Mode Control Register (x=0~2)" bitfld.long 0x28 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x28 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x28 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x28 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x2C "QMODE2,Queue x Mode Control Register (x=0~2)" bitfld.long 0x2C 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x2C 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x2C 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x2C 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x30 "QINCFG0,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x30 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x30 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x30 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x30 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x30 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x30 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x30 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x30 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x30 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x30 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "QINCFG1,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x34 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x34 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x34 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x34 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x34 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x34 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x34 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x34 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x34 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x34 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "QINCFG2,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x38 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x38 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x38 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x38 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x38 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x38 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x38 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x38 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x38 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x38 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "QREQTM0,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x3C 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x3C 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x3C 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x3C 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x40 "QREQTM1,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x40 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x40 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x40 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x40 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x44 "QREQTM2,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x44 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x44 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x44 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x44 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x48 "CHCTRL0,Channel y Control Register (y=0~11)" bitfld.long 0x48 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x48 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x48 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x48 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x48 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x48 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x48 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x48 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x48 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x48 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x48 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x48 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x4C "CHCTRL1,Channel y Control Register (y=0~11)" bitfld.long 0x4C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x4C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x4C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x4C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x4C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x4C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x4C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x4C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x4C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x4C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x4C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x4C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x50 "CHCTRL2,Channel y Control Register (y=0~11)" bitfld.long 0x50 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x50 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x50 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x50 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x50 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x50 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x50 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x50 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x50 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x50 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x50 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x50 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x54 "CHCTRL3,Channel y Control Register (y=0~11)" bitfld.long 0x54 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x54 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x54 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x54 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x54 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x54 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x54 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x54 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x54 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x54 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x54 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x54 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x58 "CHCTRL4,Channel y Control Register (y=0~11)" bitfld.long 0x58 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x58 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x58 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x58 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x58 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x58 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x58 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x58 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x58 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x58 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x58 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x58 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x5C "CHCTRL5,Channel y Control Register (y=0~11)" bitfld.long 0x5C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x5C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x5C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x5C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x5C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x5C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x5C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x5C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x5C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x5C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x5C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x5C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x60 "CHCTRL6,Channel y Control Register (y=0~11)" bitfld.long 0x60 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x60 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x60 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x60 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x60 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x60 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x60 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x60 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x60 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x60 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x60 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x60 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x64 "CHCTRL7,Channel y Control Register (y=0~11)" bitfld.long 0x64 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x64 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x64 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x64 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x64 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x64 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x64 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x64 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x64 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x64 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x64 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x64 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x68 "CHCTRL8,Channel y Control Register (y=0~11)" bitfld.long 0x68 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x68 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x68 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x68 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x68 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x68 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x68 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x68 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x68 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x68 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x68 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x68 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x6C "CHCTRL9,Channel y Control Register (y=0~11)" bitfld.long 0x6C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x6C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x6C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x6C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x6C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x6C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x6C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x6C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x6C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x6C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x6C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x6C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x70 "CHCTRL10,Channel y Control Register (y=0~11)" bitfld.long 0x70 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x70 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x70 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x70 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x70 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x70 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x70 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x70 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x70 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x70 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x70 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x70 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x74 "CHCTRL11,Channel y Control Register (y=0~11)" bitfld.long 0x74 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x74 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x74 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x74 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x74 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x74 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x74 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x74 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x74 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x74 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x74 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x74 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" group.long ad:0xB0000888++0x3F line.long 0x00 "RESCTRL0,Result z Control Register (z=0~15)" bitfld.long 0x00 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x00 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x04 "RESCTRL1,Result z Control Register (z=0~15)" bitfld.long 0x04 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x04 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x04 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x08 "RESCTRL2,Result z Control Register (z=0~15)" bitfld.long 0x08 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x08 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x08 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x0C "RESCTRL3,Result z Control Register (z=0~15)" bitfld.long 0x0C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x0C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x0C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x10 "RESCTRL4,Result z Control Register (z=0~15)" bitfld.long 0x10 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x10 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x10 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x14 "RESCTRL5,Result z Control Register (z=0~15)" bitfld.long 0x14 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x14 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x14 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x18 "RESCTRL6,Result z Control Register (z=0~15)" bitfld.long 0x18 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x18 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x18 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x1C "RESCTRL7,Result z Control Register (z=0~15)" bitfld.long 0x1C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x1C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x1C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x20 "RESCTRL8,Result z Control Register (z=0~15)" bitfld.long 0x20 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x20 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x20 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x24 "RESCTRL9,Result z Control Register (z=0~15)" bitfld.long 0x24 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x24 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x24 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x28 "RESCTRL10,Result z Control Register (z=0~15)" bitfld.long 0x28 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x28 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x28 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x2C "RESCTRL11,Result z Control Register (z=0~15)" bitfld.long 0x2C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x2C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x2C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x30 "RESCTRL12,Result z Control Register (z=0~15)" bitfld.long 0x30 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x30 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x30 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x34 "RESCTRL13,Result z Control Register (z=0~15)" bitfld.long 0x34 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x34 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x34 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x38 "RESCTRL14,Result z Control Register (z=0~15)" bitfld.long 0x38 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x38 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x38 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x3C "RESCTRL15,Result z Control Register (z=0~15)" bitfld.long 0x3C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x3C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x3C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" rgroup.long ad:0xB00008C8++0x7F line.long 0x00 "RESULT0,Result Register (z=0~15)" bitfld.long 0x00 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x00 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x00 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x04 "RESULT1,Result Register (z=0~15)" bitfld.long 0x04 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x04 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x04 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x08 "RESULT2,Result Register (z=0~15)" bitfld.long 0x08 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x08 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x08 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x0C "RESULT3,Result Register (z=0~15)" bitfld.long 0x0C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x0C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x0C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x10 "RESULT4,Result Register (z=0~15)" bitfld.long 0x10 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x10 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x10 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x10 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x14 "RESULT5,Result Register (z=0~15)" bitfld.long 0x14 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x14 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x14 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x14 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x18 "RESULT6,Result Register (z=0~15)" bitfld.long 0x18 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x18 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x18 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x18 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x1C "RESULT7,Result Register (z=0~15)" bitfld.long 0x1C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x1C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x1C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x1C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x20 "RESULT8,Result Register (z=0~15)" bitfld.long 0x20 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x20 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x20 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x20 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x24 "RESULT9,Result Register (z=0~15)" bitfld.long 0x24 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x24 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x24 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x24 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x28 "RESULT10,Result Register (z=0~15)" bitfld.long 0x28 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x28 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x28 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x28 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x2C "RESULT11,Result Register (z=0~15)" bitfld.long 0x2C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x2C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x2C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x2C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x30 "RESULT12,Result Register (z=0~15)" bitfld.long 0x30 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x30 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x30 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x30 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x34 "RESULT13,Result Register (z=0~15)" bitfld.long 0x34 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x34 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x34 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x34 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x38 "RESULT14,Result Register (z=0~15)" bitfld.long 0x38 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x38 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x38 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x38 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x3C "RESULT15,Result Register (z=0~15)" bitfld.long 0x3C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x3C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x3C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x3C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x40 "RESULTD0,Result Debug Register (z=0~15)" bitfld.long 0x40 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x40 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x40 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x40 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x44 "RESULTD1,Result Debug Register (z=0~15)" bitfld.long 0x44 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x44 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x44 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x44 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x48 "RESULTD2,Result Debug Register (z=0~15)" bitfld.long 0x48 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x48 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x48 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x48 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x4C "RESULTD3,Result Debug Register (z=0~15)" bitfld.long 0x4C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x4C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x4C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x4C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x50 "RESULTD4,Result Debug Register (z=0~15)" bitfld.long 0x50 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x50 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x50 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x50 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x54 "RESULTD5,Result Debug Register (z=0~15)" bitfld.long 0x54 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x54 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x54 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x54 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x58 "RESULTD6,Result Debug Register (z=0~15)" bitfld.long 0x58 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x58 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x58 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x58 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x5C "RESULTD7,Result Debug Register (z=0~15)" bitfld.long 0x5C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x5C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x5C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x5C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x60 "RESULTD8,Result Debug Register (z=0~15)" bitfld.long 0x60 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x60 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x60 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x60 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x64 "RESULTD9,Result Debug Register (z=0~15)" bitfld.long 0x64 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x64 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x64 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x64 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x68 "RESULTD10,Result Debug Register (z=0~15)" bitfld.long 0x68 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x68 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x68 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x68 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x6C "RESULTD11,Result Debug Register (z=0~15)" bitfld.long 0x6C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x6C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x6C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x6C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x70 "RESULTD12,Result Debug Register (z=0~15)" bitfld.long 0x70 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x70 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x70 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x70 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x74 "RESULTD13,Result Debug Register (z=0~15)" bitfld.long 0x74 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x74 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x74 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x74 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x78 "RESULTD14,Result Debug Register (z=0~15)" bitfld.long 0x78 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x78 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x78 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x78 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x7C "RESULTD15,Result Debug Register (z=0~15)" bitfld.long 0x7C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x7C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x7C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x7C 0.--15. 1. "CONRESULT,Conversion Result" group.long ad:0xB0000948++0x0B line.long 0x00 "CINTCTRL,Channel Interruption Control Register" bitfld.long 0x00 30.--31. "CMASK,Channel Interruption Mask" "0,1,2,3" bitfld.long 0x00 11. "CINT11,Channel Interruption Flag for Channel 11" "0,1" bitfld.long 0x00 10. "CINT10,Channel Interruption Flag for Channel 10" "0,1" bitfld.long 0x00 9. "CINT9,Channel Interruption Flag for Channel 9" "0,1" bitfld.long 0x00 8. "CINT8,Channel Interruption Flag for Channel 8" "0,1" bitfld.long 0x00 7. "CINT7,Channel Interruption Flag for Channel 7" "0,1" newline bitfld.long 0x00 6. "CINT6,Channel Interruption Flag for Channel 6" "0,1" bitfld.long 0x00 5. "CINT5,Channel Interruption Flag for Channel 5" "0,1" bitfld.long 0x00 4. "CINT4,Channel Interruption Flag for Channel 4" "0,1" bitfld.long 0x00 3. "CINT3,Channel Interruption Flag for Channel 3" "0,1" bitfld.long 0x00 2. "CINT2,Channel Interruption Flag for Channel 2" "0,1" bitfld.long 0x00 1. "CINT1,Channel Interruption Flag for Channel 1" "0,1" newline bitfld.long 0x00 0. "CINT0,Channel Interruption Flag for Channel 0" "0,1" line.long 0x04 "RINTCTRL,Result Interruption Control Register" bitfld.long 0x04 30.--31. "RMASK,Result Interruption Mask" "0,1,2,3" bitfld.long 0x04 15. "RINT15,Result Interruption Flag for RESULT 15" "0,1" bitfld.long 0x04 14. "RINT14,Result Interruption Flag for RESULT 14" "0,1" bitfld.long 0x04 13. "RINT13,Result Interruption Flag for RESULT 13" "0,1" bitfld.long 0x04 12. "RINT12,Result Interruption Flag for RESULT 12" "0,1" bitfld.long 0x04 11. "RINT11,Result Interruption Flag for RESULT 11" "0,1" newline bitfld.long 0x04 10. "RINT10,Result Interruption Flag for RESULT 10" "0,1" bitfld.long 0x04 9. "RINT9,Result Interruption Flag for RESULT 9" "0,1" bitfld.long 0x04 8. "RINT8,Result Interruption Flag for RESULT 8" "0,1" bitfld.long 0x04 7. "RINT7,Result Interruption Flag for RESULT 7" "0,1" bitfld.long 0x04 6. "RINT6,Result Interruption Flag for RESULT 6" "0,1" bitfld.long 0x04 5. "RINT5,Result Interruption Flag for RESULT 5" "0,1" newline bitfld.long 0x04 4. "RINT4,Result Interruption Flag for RESULT 4" "0,1" bitfld.long 0x04 3. "RINT3,Result Interruption Flag for RESULT 3" "0,1" bitfld.long 0x04 2. "RINT2,Result Interruption Flag for RESULT 2" "0,1" bitfld.long 0x04 1. "RINT1,Result Interruption Flag for RESULT 1" "0,1" bitfld.long 0x04 0. "RINT0,Result Interruption Flag for RESULT 0" "0,1" line.long 0x08 "SINTCTRL,Source Interruption Control Register" bitfld.long 0x08 30.--31. "SMASK,Source Interruption Mask" "0,1,2,3" bitfld.long 0x08 2. "SINT2,Source Interruption Flag for Queue 2" "0,1" bitfld.long 0x08 1. "SINT1,Source Interruption Flag for Queue 1" "0,1" bitfld.long 0x08 0. "SINT0,Source Interruption Flag for Queue 0" "0,1" wgroup.long ad:0xB0000954++0x0B line.long 0x00 "CINTCLR,Channel Interruption Clear Register" bitfld.long 0x00 11. "CCLR11,Channel 11 Interruption Flag Clear" "0,1" bitfld.long 0x00 10. "CCLR10,Channel 10 Interruption Flag Clear" "0,1" bitfld.long 0x00 9. "CCLR9,Channel 9 Interruption Flag Clear" "0,1" bitfld.long 0x00 8. "CCLR8,Channel 8 Interruption Flag Clear" "0,1" bitfld.long 0x00 7. "CCLR7,Channel 7 Interruption Flag Clear" "0,1" bitfld.long 0x00 6. "CCLR6,Channel 6 Interruption Flag Clear" "0,1" newline bitfld.long 0x00 5. "CCLR5,Channel 5 Interruption Flag Clear" "0,1" bitfld.long 0x00 4. "CCLR4,Channel 4 Interruption Flag Clear" "0,1" bitfld.long 0x00 3. "CCLR3,Channel 3 Interruption Flag Clear" "0,1" bitfld.long 0x00 2. "CCLR2,Channel 2 Interruption Flag Clear" "0,1" bitfld.long 0x00 1. "CCLR1,Channel 1 Interruption Flag Clear" "0,1" bitfld.long 0x00 0. "CCLR0,Channel 0 Interruption Flag Clear" "0,1" line.long 0x04 "RINTCLR,Result Interruption Clear Register" bitfld.long 0x04 15. "RCLR15,Result 15 Interruption Flag Clear" "0,1" bitfld.long 0x04 14. "RCLR14,Result 14 Interruption Flag Clear" "0,1" bitfld.long 0x04 13. "RCLR13,Result 13 Interruption Flag Clear" "0,1" bitfld.long 0x04 12. "RCLR12,Result 12 Interruption Flag Clear" "0,1" bitfld.long 0x04 11. "RCLR11,Result 11 Interruption Flag Clear" "0,1" bitfld.long 0x04 10. "RCLR10,Result 10 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 9. "RCLR9,Result 9 Interruption Flag Clear" "0,1" bitfld.long 0x04 8. "RCLR8,Result 8 Interruption Flag Clear" "0,1" bitfld.long 0x04 7. "RCLR7,Result 7 Interruption Flag Clear" "0,1" bitfld.long 0x04 6. "RCLR6,Result 6 Interruption Flag Clear" "0,1" bitfld.long 0x04 5. "RCLR5,Result 5 Interruption Flag Clear" "0,1" bitfld.long 0x04 4. "RCLR4,Result 4 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 3. "RCLR3,Result 3 Interruption Flag Clear" "0,1" bitfld.long 0x04 2. "RCLR2,Result 2 Interruption Flag Clear" "0,1" bitfld.long 0x04 1. "RCLR1,Result 1 Interruption Flag Clear" "0,1" bitfld.long 0x04 0. "RCLR0,Result 0 Interruption Flag Clear" "0,1" line.long 0x08 "SINTCLR,Queue Interruption Clear Register" bitfld.long 0x08 2. "SCLR2,Queue 2 Interruption Flag Clear" "0,1" bitfld.long 0x08 1. "SCLR1,Queue 1 Interruption Flag Clear" "0,1" bitfld.long 0x08 0. "SCLR0,Queue 0 Interruption Flag Clear" "0,1" group.long ad:0xB0000960++0x13 line.long 0x00 "CINTNP0,Channel Interruption Node Pointer 0 Register" bitfld.long 0x00 28.--31. "CINT7NP,Channel 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "CINT6NP,Channel 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "CINT5NP,Channel 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "CINT4NP,Channel 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "CINT3NP,Channel 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "CINT2NP,Channel 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 4.--7. "CINT1NP,Channel 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CINT0NP,Channel 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CINTNP1,Channel Interruption Node Pointer 1 Register" bitfld.long 0x04 12.--15. "CINT11NP,Channel 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. "CINT10NP,Channel 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. "CINT9NP,Channel 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. "CINT8NP,Channel 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RINTNP0,Result Interruption Node Pointer 0 Register" bitfld.long 0x08 28.--31. "RINT7NP,Result 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. "RINT6NP,Result 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. "RINT5NP,Result 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. "RINT4NP,Result 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. "RINT3NP,Result 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. "RINT2NP,Result 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 4.--7. "RINT1NP,Result 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. "RINT0NP,Result 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "RINTNP1,Result Interruption Node Pointer 1 Register" bitfld.long 0x0C 28.--31. "RINT15NP,Result 15 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. "RINT14NP,Result 14 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 20.--23. "RINT13NP,Result 13 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. "RINT12NP,Result 12 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 12.--15. "RINT11NP,Result 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. "RINT10NP,Result 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x0C 4.--7. "RINT9NP,Result 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. "RINT8NP,Result 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SINTNP,Source Interruption Node Pointer Register" bitfld.long 0x10 8.--11. "SINT2NP,Source 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 4.--7. "SINT1NP,Source 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. "SINT0NP,Source 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xB0000974++0x03 line.long 0x00 "STRIINT,Software Trigger Interruption Register" bitfld.long 0x00 11. "SASINT3,Software Activate Common Shared Interruption 3" "0,1" bitfld.long 0x00 10. "SASINT2,Software Activate Common Shared Interruption 2" "0,1" bitfld.long 0x00 9. "SASINT1,Software Activate Common Shared Interruption 1" "0,1" bitfld.long 0x00 8. "SASINT0,Software Activate Common Shared Interruption 0" "0,1" bitfld.long 0x00 3. "SAGINT3,Software Activate Group Interruption 3" "0,1" bitfld.long 0x00 2. "SAGINT2,Software Activate Group Interruption 2" "0,1" newline bitfld.long 0x00 1. "SAGINT1,Software Activate Group Interruption 1" "0,1" bitfld.long 0x00 0. "SAGINT0,Software Activate Group Interruption 0" "0,1" group.long ad:0xB0000978++0x0B line.long 0x00 "ALIASCH,Alias Channel Register" bitfld.long 0x00 0.--4. "ALIASCH,Alias Channel for CH0 Conversion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "DMAEN,DMA Enable Control Register" bitfld.long 0x04 15. "DMAEN15,DMA enable for RESULT15" "0,1" bitfld.long 0x04 14. "DMAEN14,DMA enable for RESULT 14" "0,1" bitfld.long 0x04 13. "DMAEN13,DMA enable for RESULT 13" "0,1" bitfld.long 0x04 12. "DMAEN12,DMA enable for RESULT 12" "0,1" bitfld.long 0x04 11. "DMAEN11,DMA enable for RESULT 11" "0,1" bitfld.long 0x04 10. "DMAEN10,DMA enable for RESULT 10" "0,1" newline bitfld.long 0x04 9. "DMAEN9,DMA enable for RESULT 9" "0,1" bitfld.long 0x04 8. "DMAEN8,DMA enable for RESULT 8" "0,1" bitfld.long 0x04 7. "DMAEN7,DMA enable for RESULT 7" "0,1" bitfld.long 0x04 6. "DMAEN6,DMA enable for RESULT 6" "0,1" bitfld.long 0x04 5. "DMAEN5,DMA enable for RESULT 5" "0,1" bitfld.long 0x04 4. "DMAEN4,DMA enable for RESULT 4" "0,1" newline bitfld.long 0x04 3. "DMAEN3,DMA enable for RESULT 3" "0,1" bitfld.long 0x04 2. "DMAEN2,DMA enable for RESULT 2" "0,1" bitfld.long 0x04 1. "DMAEN1,DMA enable for RESULT 1" "0,1" bitfld.long 0x04 0. "DMAEN0,DMA enable for RESULT 0" "0,1" line.long 0x08 "ANCONFIG,Analog Configuration Register" bitfld.long 0x08 0. "COMPCRT,Trim Factor of Comparator" "0,1" rgroup.long ad:0xB0000984++0x0B line.long 0x00 "QFIFO0,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x00 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x00 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x00 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "QFIFO1,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x04 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x04 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x04 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "QFIFO2,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x08 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x08 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x08 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xB0000994++0x07 line.long 0x00 "FAULTIN,Safety Fault Input Register" bitfld.long 0x00 10.--11. "DAISYDFI,DAISY Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 8.--9. "SYNCDFI,SYNC Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 6.--7. "GATEDFI,Gate Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 4.--5. "FTFI,Feedback Timeout Fault Input" "0,1,2,3" bitfld.long 0x00 2.--3. "TRIDFI,Trigger Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 0.--1. "DRFI,DFF Redundancy Fault Input" "0,1,2,3" line.long 0x04 "SAFEEN,Safety Enable Register" bitfld.long 0x04 30.--31. "BEMASK,Bus Error Mask Control" "0,1,2,3" bitfld.long 0x04 12.--13. "DAISYDSE,DAISY Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 10.--11. "SYNCDSE,SYNC Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 8.--9. "GATEDSE,Gate Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 6.--7. "BDSE,Boundary Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 4.--5. "DTSE,DMA Timeout Safety Enable" "0,1,2,3" newline bitfld.long 0x04 2.--3. "TRIDSE,Trigger Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 0.--1. "DRSE,DFF Redundancy Safety Enable" "0,1,2,3" rgroup.long ad:0xB000099C++0x03 line.long 0x00 "SAFEALM,Safety Alarm Register" bitfld.long 0x00 20. "DMALOSEALM,DMA Request Lose Alarm" "0,1" bitfld.long 0x00 19. "GLORESCTRLALM,GLORESCTRL Redundancy Alarm" "0,1" bitfld.long 0x00 18. "GLORESULTALM,GLORESULT Redundancy Alarm" "0,1" bitfld.long 0x00 17. "ALARMCLRALM,ALARMCLR Redundancy Alarm" "0,1" bitfld.long 0x00 16. "SAFEENALM,SAFEEN Redundancy Alarm" "0,1" bitfld.long 0x00 15. "FAULTINALM,FAULTIN Redundancy Alarm" "0,1" newline bitfld.long 0x00 14. "ANCONFIGALM,ANCONFIG Redundancy Alarm" "0,1" bitfld.long 0x00 13. "RESULTALM,RESULTz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 12. "RESCTRLALM,RESCTRLz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 11. "CHCTRLALM,CHCTRLy(y = 0~11) Redundancy Alarm" "0,1" bitfld.long 0x00 10. "QINCFGALM,QINCFGx(x = 0~2) Redundancy Alarm" "0,1" bitfld.long 0x00 9. "ARBCTRLALM,ARBCTRL Redundancy Alarm" "0,1" newline bitfld.long 0x00 8. "ANACFGALM,ANACFG Redundancy Alarm" "0,1" bitfld.long 0x00 7. "DAITOALM,Daisy Chain Signal Timeout Alarm" "0,1" bitfld.long 0x00 6. "SYNTOALM,Synchronization Signal Timeout Alarm" "0,1" bitfld.long 0x00 5. "GATOALM,Gate Timeout Alarm" "0,1" bitfld.long 0x00 4. "TRITOALM,Trigger Timeout Alarm" "0,1" bitfld.long 0x00 3. "SEALM,Safety Endinit Alarm" "0,1" newline bitfld.long 0x00 2. "EALM,Endinit Alarm" "0,1" bitfld.long 0x00 1. "DMATOALM,DMA Timeout Alarm" "0,1" bitfld.long 0x00 0. "BOUNDALM,Boundary Detection Alarm" "0,1" wgroup.long ad:0xB00009A0++0x03 line.long 0x00 "SAFEALMCLR,Safety Alarm Clear Register" bitfld.long 0x00 8.--9. "ESEALMC,Endinit / Safety Endinit Alarm Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "DMATOALMC,DMA Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "BOUNDALMC,Boundary Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SMDALMC,Signal Monitor Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "DRALMC,Register Redundancy Alarm Clear" "0,1,2,3" group.long ad:0xB00009A4++0x13 line.long 0x00 "SAFEBOUND,Safety Boundary Control Register" bitfld.long 0x00 30. "SAFEBOUNDDR,Discard Result out of Boundary ADC Conversion Result Handle" "0,1" hexmask.long.word 0x00 16.--27. 1. "SAFEBOUNDU,Software set upper boundary" hexmask.long.word 0x00 0.--11. 1. "SAFEBOUNDL,Software set lower boundary" line.long 0x04 "TRIGATTHRES,Trigger and Gate Monitor Threshold Register" line.long 0x08 "SYNCTHRES,Synchronization Signal Monitor Threshold Register" line.long 0x0C "DAISYTHRES,Daisy Chain Signal Monitor Threshold Register" line.long 0x10 "DMATHRES,DMA Handshake Threshold Register" group.long ad:0xB0000A00++0x03 line.long 0x00 "GLOINTCTRL,Global Interruption Control Register" bitfld.long 0x00 30.--31. "GMASK,Global Result Interruption Mask" "0,1,2,3" bitfld.long 0x00 16.--19. "GRINTNP,Global Result Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. "GCLR,Global Result Interruption Clear" "0,1" bitfld.long 0x00 0. "GINT,Global Result Interruption Flag" "0,1" rgroup.long ad:0xB0000A04++0x07 line.long 0x00 "GLORESULT,Global Result Register" bitfld.long 0x00 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x00 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x00 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. "GCONRESULT,Conversion Result" line.long 0x04 "GLORESULTD,Global Result Debug Register" bitfld.long 0x04 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x04 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x04 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. "GCONRESULT,Conversion Result" group.long ad:0xB0000A0C++0x0B line.long 0x00 "GLORESCTRL,Global Result Control Register" bitfld.long 0x00 8. "GNRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "GWFRMODE,Wait-for-Read Mode Enable" "0,1" bitfld.long 0x00 0. "GRESALI,Result Format Alignment" "0,1" line.long 0x04 "GLODMA,Global DMA Enable Control Register" bitfld.long 0x04 0. "GDMAEN,Global DMA Enable Control" "0,1" line.long 0x08 "GLOFUNBOUND,Global Functional Bound Control Register" hexmask.long.word 0x08 16.--27. 1. "GBOUNDU,Software Set Upper Boundary" hexmask.long.word 0x08 0.--11. 1. "GBOUNDL,Software Set Lower Boundary" tree.end tree "SARADC3" group.long ad:0xB0000C00++0x77 line.long 0x00 "Q2TRICTRL,Queue 2 Trigger Control Register" bitfld.long 0x00 16. "INTRISEL,Internal Trigger Source Selection" "0,1" hexmask.long.byte 0x00 8.--13. 1. "TRICNTSET,Queue Trigger Counter Initial Value" hexmask.long.byte 0x00 0.--5. 1. "TRICNT,Queue Trigger Counter" line.long 0x04 "ANACFG,Analog Configuration Register" rbitfld.long 0x04 31. "ANAFLG,SARADC Analog Flag" "0,1" hexmask.long.byte 0x04 16.--21. 1. "OFFSET,SARADC Offset" hexmask.long.byte 0x04 8.--15. 1. "ANADIVF,SARADC Divider Factor For The Analog Internal Clock" bitfld.long 0x04 5. "DISHEN,Calibration Offset Enable" "0,1" bitfld.long 0x04 4. "CALIC,Calibration Control" "0,1" bitfld.long 0x04 2.--3. "ANARESO,ADC Resolution Configuration" "0,1,2,3" newline bitfld.long 0x04 1. "REFSEL,Reference Voltage Selection" "0,1" bitfld.long 0x04 0. "ANAEN,SARADC Analog Enable" "0,1" line.long 0x08 "ARBCTRL,Arbiter Control Register" rbitfld.long 0x08 29. "INJECT2STA,Queue2 Insert Status" "0,1" rbitfld.long 0x08 28. "INJECT1STA,Queue1 Insert Status" "0,1" rbitfld.long 0x08 27. "INJECT0STA,Queue0 Insert Status" "0,1" bitfld.long 0x08 26. "ARBEN2,Arbitration Queue2 Enable Control" "0,1" bitfld.long 0x08 25. "ARBEN1,Arbitration Queue1 Enable Control" "0,1" bitfld.long 0x08 24. "ARBEN0,Arbitration Queue0 Enable Control" "0,1" newline rbitfld.long 0x08 23. "SYNCBUSY,Synchronous Queue Busy Flag" "0,1" rbitfld.long 0x08 22. "Q2BUSY,Queue2 Busy Flag" "0,1" rbitfld.long 0x08 21. "Q1BUSY,Queue1 Busy Flag" "0,1" rbitfld.long 0x08 20. "Q0BUSY,Queue0 Busy Flag" "0,1" rbitfld.long 0x08 18. "Q2WAIT,Queue2 Wait Status" "0,1" rbitfld.long 0x08 17. "Q1WAIT,Queue1 Wait Status" "0,1" newline rbitfld.long 0x08 16. "Q0WAIT,Queue0 Wait Status" "0,1" bitfld.long 0x08 15. "INJECT2CLR,Queue2 Inject Status Clear" "0,1" bitfld.long 0x08 14. "INJECT1CLR,Queue1 Inject Status Clear" "0,1" bitfld.long 0x08 13. "INJECT0CLR,Queue0 Inject Status Clear" "0,1" bitfld.long 0x08 11. "CONSMODE2,Conversion Start Mode of Queue 2" "0,1" bitfld.long 0x08 8.--9. "PRIOL2,Priority Level of Queue 2 Configuration" "0,1,2,3" newline bitfld.long 0x08 7. "CONSMODE1,Conversion Start Mode of Queue 1" "0,1" bitfld.long 0x08 4.--5. "PRIOL1,Priority Level of Queue 1 Configuration" "0,1,2,3" bitfld.long 0x08 3. "CONSMODE0,Conversion Start Mode of Queue 0" "0,1" bitfld.long 0x08 0.--1. "PRIOL0,Priority Level of Queue 0 Configuration" "0,1,2,3" line.long 0x0C "SAMCTRL,Sample Time Control Register" hexmask.long.byte 0x0C 0.--7. 1. "STCTRL,Sample time control register" line.long 0x10 "FUNBOUND,Functional Bound Control Register" bitfld.long 0x10 28.--31. "BOUNDUSEL,Upper Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 16.--27. 1. "BOUNDU,Software Set Upper Boundary" bitfld.long 0x10 12.--15. "BOUNDLSEL,Lower Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 0.--11. 1. "BOUNDL,Software Set Lower Boundary" line.long 0x14 "SYNCCTRL,Synchronous Converter Control Register" bitfld.long 0x14 6. "SYNCEN3,Synchronous Converter Follows CI3 Enable" "0,1" bitfld.long 0x14 5. "SYNCEN2,Synchronous Converter Follows CI2 Enable" "0,1" bitfld.long 0x14 4. "SYNCEN1,Synchronous Converter Follows CI1 Enable" "0,1" bitfld.long 0x14 0.--1. "SYNCSEL,Synchronous Converter Source Selection" "0,1,2,3" line.long 0x18 "QTRICTRL0,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x18 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x18 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x18 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x18 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x18 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x18 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x1C "QTRICTRL1,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x1C 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x1C 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x1C 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x1C 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x1C 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x1C 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x20 "QTRICTRL2,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x20 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x20 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x20 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x20 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x20 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x20 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x24 "QMODE0,Queue x Mode Control Register (x=0~2)" bitfld.long 0x24 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x24 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x24 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x24 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x28 "QMODE1,Queue x Mode Control Register (x=0~2)" bitfld.long 0x28 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x28 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x28 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x28 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x2C "QMODE2,Queue x Mode Control Register (x=0~2)" bitfld.long 0x2C 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x2C 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x2C 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x2C 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x30 "QINCFG0,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x30 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x30 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x30 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x30 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x30 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x30 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x30 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x30 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x30 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x30 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "QINCFG1,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x34 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x34 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x34 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x34 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x34 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x34 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x34 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x34 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x34 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x34 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "QINCFG2,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x38 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x38 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x38 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x38 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x38 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x38 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x38 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x38 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x38 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x38 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "QREQTM0,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x3C 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x3C 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x3C 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x3C 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x40 "QREQTM1,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x40 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x40 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x40 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x40 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x44 "QREQTM2,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x44 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x44 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x44 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x44 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x48 "CHCTRL0,Channel y Control Register (y=0~11)" bitfld.long 0x48 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x48 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x48 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x48 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x48 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x48 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x48 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x48 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x48 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x48 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x48 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x48 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x4C "CHCTRL1,Channel y Control Register (y=0~11)" bitfld.long 0x4C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x4C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x4C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x4C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x4C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x4C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x4C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x4C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x4C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x4C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x4C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x4C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x50 "CHCTRL2,Channel y Control Register (y=0~11)" bitfld.long 0x50 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x50 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x50 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x50 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x50 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x50 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x50 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x50 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x50 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x50 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x50 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x50 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x54 "CHCTRL3,Channel y Control Register (y=0~11)" bitfld.long 0x54 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x54 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x54 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x54 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x54 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x54 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x54 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x54 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x54 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x54 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x54 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x54 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x58 "CHCTRL4,Channel y Control Register (y=0~11)" bitfld.long 0x58 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x58 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x58 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x58 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x58 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x58 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x58 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x58 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x58 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x58 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x58 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x58 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x5C "CHCTRL5,Channel y Control Register (y=0~11)" bitfld.long 0x5C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x5C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x5C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x5C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x5C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x5C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x5C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x5C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x5C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x5C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x5C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x5C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x60 "CHCTRL6,Channel y Control Register (y=0~11)" bitfld.long 0x60 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x60 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x60 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x60 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x60 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x60 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x60 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x60 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x60 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x60 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x60 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x60 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x64 "CHCTRL7,Channel y Control Register (y=0~11)" bitfld.long 0x64 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x64 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x64 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x64 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x64 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x64 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x64 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x64 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x64 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x64 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x64 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x64 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x68 "CHCTRL8,Channel y Control Register (y=0~11)" bitfld.long 0x68 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x68 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x68 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x68 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x68 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x68 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x68 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x68 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x68 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x68 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x68 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x68 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x6C "CHCTRL9,Channel y Control Register (y=0~11)" bitfld.long 0x6C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x6C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x6C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x6C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x6C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x6C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x6C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x6C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x6C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x6C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x6C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x6C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x70 "CHCTRL10,Channel y Control Register (y=0~11)" bitfld.long 0x70 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x70 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x70 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x70 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x70 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x70 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x70 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x70 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x70 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x70 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x70 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x70 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x74 "CHCTRL11,Channel y Control Register (y=0~11)" bitfld.long 0x74 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x74 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x74 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x74 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x74 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x74 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x74 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x74 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x74 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x74 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x74 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x74 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" group.long ad:0xB0000C88++0x3F line.long 0x00 "RESCTRL0,Result z Control Register (z=0~15)" bitfld.long 0x00 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x00 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x04 "RESCTRL1,Result z Control Register (z=0~15)" bitfld.long 0x04 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x04 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x04 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x08 "RESCTRL2,Result z Control Register (z=0~15)" bitfld.long 0x08 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x08 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x08 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x0C "RESCTRL3,Result z Control Register (z=0~15)" bitfld.long 0x0C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x0C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x0C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x10 "RESCTRL4,Result z Control Register (z=0~15)" bitfld.long 0x10 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x10 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x10 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x14 "RESCTRL5,Result z Control Register (z=0~15)" bitfld.long 0x14 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x14 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x14 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x18 "RESCTRL6,Result z Control Register (z=0~15)" bitfld.long 0x18 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x18 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x18 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x1C "RESCTRL7,Result z Control Register (z=0~15)" bitfld.long 0x1C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x1C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x1C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x20 "RESCTRL8,Result z Control Register (z=0~15)" bitfld.long 0x20 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x20 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x20 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x24 "RESCTRL9,Result z Control Register (z=0~15)" bitfld.long 0x24 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x24 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x24 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x28 "RESCTRL10,Result z Control Register (z=0~15)" bitfld.long 0x28 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x28 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x28 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x2C "RESCTRL11,Result z Control Register (z=0~15)" bitfld.long 0x2C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x2C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x2C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x30 "RESCTRL12,Result z Control Register (z=0~15)" bitfld.long 0x30 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x30 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x30 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x34 "RESCTRL13,Result z Control Register (z=0~15)" bitfld.long 0x34 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x34 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x34 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x38 "RESCTRL14,Result z Control Register (z=0~15)" bitfld.long 0x38 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x38 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x38 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x3C "RESCTRL15,Result z Control Register (z=0~15)" bitfld.long 0x3C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x3C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x3C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" rgroup.long ad:0xB0000CC8++0x7F line.long 0x00 "RESULT0,Result Register (z=0~15)" bitfld.long 0x00 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x00 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x00 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x04 "RESULT1,Result Register (z=0~15)" bitfld.long 0x04 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x04 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x04 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x08 "RESULT2,Result Register (z=0~15)" bitfld.long 0x08 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x08 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x08 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x0C "RESULT3,Result Register (z=0~15)" bitfld.long 0x0C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x0C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x0C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x10 "RESULT4,Result Register (z=0~15)" bitfld.long 0x10 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x10 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x10 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x10 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x14 "RESULT5,Result Register (z=0~15)" bitfld.long 0x14 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x14 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x14 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x14 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x18 "RESULT6,Result Register (z=0~15)" bitfld.long 0x18 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x18 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x18 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x18 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x1C "RESULT7,Result Register (z=0~15)" bitfld.long 0x1C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x1C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x1C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x1C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x20 "RESULT8,Result Register (z=0~15)" bitfld.long 0x20 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x20 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x20 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x20 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x24 "RESULT9,Result Register (z=0~15)" bitfld.long 0x24 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x24 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x24 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x24 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x28 "RESULT10,Result Register (z=0~15)" bitfld.long 0x28 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x28 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x28 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x28 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x2C "RESULT11,Result Register (z=0~15)" bitfld.long 0x2C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x2C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x2C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x2C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x30 "RESULT12,Result Register (z=0~15)" bitfld.long 0x30 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x30 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x30 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x30 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x34 "RESULT13,Result Register (z=0~15)" bitfld.long 0x34 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x34 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x34 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x34 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x38 "RESULT14,Result Register (z=0~15)" bitfld.long 0x38 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x38 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x38 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x38 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x3C "RESULT15,Result Register (z=0~15)" bitfld.long 0x3C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x3C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x3C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x3C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x40 "RESULTD0,Result Debug Register (z=0~15)" bitfld.long 0x40 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x40 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x40 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x40 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x44 "RESULTD1,Result Debug Register (z=0~15)" bitfld.long 0x44 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x44 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x44 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x44 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x48 "RESULTD2,Result Debug Register (z=0~15)" bitfld.long 0x48 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x48 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x48 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x48 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x4C "RESULTD3,Result Debug Register (z=0~15)" bitfld.long 0x4C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x4C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x4C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x4C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x50 "RESULTD4,Result Debug Register (z=0~15)" bitfld.long 0x50 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x50 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x50 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x50 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x54 "RESULTD5,Result Debug Register (z=0~15)" bitfld.long 0x54 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x54 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x54 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x54 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x58 "RESULTD6,Result Debug Register (z=0~15)" bitfld.long 0x58 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x58 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x58 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x58 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x5C "RESULTD7,Result Debug Register (z=0~15)" bitfld.long 0x5C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x5C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x5C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x5C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x60 "RESULTD8,Result Debug Register (z=0~15)" bitfld.long 0x60 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x60 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x60 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x60 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x64 "RESULTD9,Result Debug Register (z=0~15)" bitfld.long 0x64 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x64 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x64 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x64 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x68 "RESULTD10,Result Debug Register (z=0~15)" bitfld.long 0x68 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x68 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x68 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x68 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x6C "RESULTD11,Result Debug Register (z=0~15)" bitfld.long 0x6C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x6C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x6C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x6C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x70 "RESULTD12,Result Debug Register (z=0~15)" bitfld.long 0x70 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x70 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x70 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x70 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x74 "RESULTD13,Result Debug Register (z=0~15)" bitfld.long 0x74 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x74 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x74 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x74 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x78 "RESULTD14,Result Debug Register (z=0~15)" bitfld.long 0x78 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x78 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x78 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x78 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x7C "RESULTD15,Result Debug Register (z=0~15)" bitfld.long 0x7C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x7C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x7C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x7C 0.--15. 1. "CONRESULT,Conversion Result" group.long ad:0xB0000D48++0x0B line.long 0x00 "CINTCTRL,Channel Interruption Control Register" bitfld.long 0x00 30.--31. "CMASK,Channel Interruption Mask" "0,1,2,3" bitfld.long 0x00 11. "CINT11,Channel Interruption Flag for Channel 11" "0,1" bitfld.long 0x00 10. "CINT10,Channel Interruption Flag for Channel 10" "0,1" bitfld.long 0x00 9. "CINT9,Channel Interruption Flag for Channel 9" "0,1" bitfld.long 0x00 8. "CINT8,Channel Interruption Flag for Channel 8" "0,1" bitfld.long 0x00 7. "CINT7,Channel Interruption Flag for Channel 7" "0,1" newline bitfld.long 0x00 6. "CINT6,Channel Interruption Flag for Channel 6" "0,1" bitfld.long 0x00 5. "CINT5,Channel Interruption Flag for Channel 5" "0,1" bitfld.long 0x00 4. "CINT4,Channel Interruption Flag for Channel 4" "0,1" bitfld.long 0x00 3. "CINT3,Channel Interruption Flag for Channel 3" "0,1" bitfld.long 0x00 2. "CINT2,Channel Interruption Flag for Channel 2" "0,1" bitfld.long 0x00 1. "CINT1,Channel Interruption Flag for Channel 1" "0,1" newline bitfld.long 0x00 0. "CINT0,Channel Interruption Flag for Channel 0" "0,1" line.long 0x04 "RINTCTRL,Result Interruption Control Register" bitfld.long 0x04 30.--31. "RMASK,Result Interruption Mask" "0,1,2,3" bitfld.long 0x04 15. "RINT15,Result Interruption Flag for RESULT 15" "0,1" bitfld.long 0x04 14. "RINT14,Result Interruption Flag for RESULT 14" "0,1" bitfld.long 0x04 13. "RINT13,Result Interruption Flag for RESULT 13" "0,1" bitfld.long 0x04 12. "RINT12,Result Interruption Flag for RESULT 12" "0,1" bitfld.long 0x04 11. "RINT11,Result Interruption Flag for RESULT 11" "0,1" newline bitfld.long 0x04 10. "RINT10,Result Interruption Flag for RESULT 10" "0,1" bitfld.long 0x04 9. "RINT9,Result Interruption Flag for RESULT 9" "0,1" bitfld.long 0x04 8. "RINT8,Result Interruption Flag for RESULT 8" "0,1" bitfld.long 0x04 7. "RINT7,Result Interruption Flag for RESULT 7" "0,1" bitfld.long 0x04 6. "RINT6,Result Interruption Flag for RESULT 6" "0,1" bitfld.long 0x04 5. "RINT5,Result Interruption Flag for RESULT 5" "0,1" newline bitfld.long 0x04 4. "RINT4,Result Interruption Flag for RESULT 4" "0,1" bitfld.long 0x04 3. "RINT3,Result Interruption Flag for RESULT 3" "0,1" bitfld.long 0x04 2. "RINT2,Result Interruption Flag for RESULT 2" "0,1" bitfld.long 0x04 1. "RINT1,Result Interruption Flag for RESULT 1" "0,1" bitfld.long 0x04 0. "RINT0,Result Interruption Flag for RESULT 0" "0,1" line.long 0x08 "SINTCTRL,Source Interruption Control Register" bitfld.long 0x08 30.--31. "SMASK,Source Interruption Mask" "0,1,2,3" bitfld.long 0x08 2. "SINT2,Source Interruption Flag for Queue 2" "0,1" bitfld.long 0x08 1. "SINT1,Source Interruption Flag for Queue 1" "0,1" bitfld.long 0x08 0. "SINT0,Source Interruption Flag for Queue 0" "0,1" wgroup.long ad:0xB0000D54++0x0B line.long 0x00 "CINTCLR,Channel Interruption Clear Register" bitfld.long 0x00 11. "CCLR11,Channel 11 Interruption Flag Clear" "0,1" bitfld.long 0x00 10. "CCLR10,Channel 10 Interruption Flag Clear" "0,1" bitfld.long 0x00 9. "CCLR9,Channel 9 Interruption Flag Clear" "0,1" bitfld.long 0x00 8. "CCLR8,Channel 8 Interruption Flag Clear" "0,1" bitfld.long 0x00 7. "CCLR7,Channel 7 Interruption Flag Clear" "0,1" bitfld.long 0x00 6. "CCLR6,Channel 6 Interruption Flag Clear" "0,1" newline bitfld.long 0x00 5. "CCLR5,Channel 5 Interruption Flag Clear" "0,1" bitfld.long 0x00 4. "CCLR4,Channel 4 Interruption Flag Clear" "0,1" bitfld.long 0x00 3. "CCLR3,Channel 3 Interruption Flag Clear" "0,1" bitfld.long 0x00 2. "CCLR2,Channel 2 Interruption Flag Clear" "0,1" bitfld.long 0x00 1. "CCLR1,Channel 1 Interruption Flag Clear" "0,1" bitfld.long 0x00 0. "CCLR0,Channel 0 Interruption Flag Clear" "0,1" line.long 0x04 "RINTCLR,Result Interruption Clear Register" bitfld.long 0x04 15. "RCLR15,Result 15 Interruption Flag Clear" "0,1" bitfld.long 0x04 14. "RCLR14,Result 14 Interruption Flag Clear" "0,1" bitfld.long 0x04 13. "RCLR13,Result 13 Interruption Flag Clear" "0,1" bitfld.long 0x04 12. "RCLR12,Result 12 Interruption Flag Clear" "0,1" bitfld.long 0x04 11. "RCLR11,Result 11 Interruption Flag Clear" "0,1" bitfld.long 0x04 10. "RCLR10,Result 10 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 9. "RCLR9,Result 9 Interruption Flag Clear" "0,1" bitfld.long 0x04 8. "RCLR8,Result 8 Interruption Flag Clear" "0,1" bitfld.long 0x04 7. "RCLR7,Result 7 Interruption Flag Clear" "0,1" bitfld.long 0x04 6. "RCLR6,Result 6 Interruption Flag Clear" "0,1" bitfld.long 0x04 5. "RCLR5,Result 5 Interruption Flag Clear" "0,1" bitfld.long 0x04 4. "RCLR4,Result 4 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 3. "RCLR3,Result 3 Interruption Flag Clear" "0,1" bitfld.long 0x04 2. "RCLR2,Result 2 Interruption Flag Clear" "0,1" bitfld.long 0x04 1. "RCLR1,Result 1 Interruption Flag Clear" "0,1" bitfld.long 0x04 0. "RCLR0,Result 0 Interruption Flag Clear" "0,1" line.long 0x08 "SINTCLR,Queue Interruption Clear Register" bitfld.long 0x08 2. "SCLR2,Queue 2 Interruption Flag Clear" "0,1" bitfld.long 0x08 1. "SCLR1,Queue 1 Interruption Flag Clear" "0,1" bitfld.long 0x08 0. "SCLR0,Queue 0 Interruption Flag Clear" "0,1" group.long ad:0xB0000D60++0x13 line.long 0x00 "CINTNP0,Channel Interruption Node Pointer 0 Register" bitfld.long 0x00 28.--31. "CINT7NP,Channel 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "CINT6NP,Channel 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "CINT5NP,Channel 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "CINT4NP,Channel 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "CINT3NP,Channel 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "CINT2NP,Channel 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 4.--7. "CINT1NP,Channel 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CINT0NP,Channel 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CINTNP1,Channel Interruption Node Pointer 1 Register" bitfld.long 0x04 12.--15. "CINT11NP,Channel 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. "CINT10NP,Channel 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. "CINT9NP,Channel 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. "CINT8NP,Channel 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RINTNP0,Result Interruption Node Pointer 0 Register" bitfld.long 0x08 28.--31. "RINT7NP,Result 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. "RINT6NP,Result 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. "RINT5NP,Result 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. "RINT4NP,Result 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. "RINT3NP,Result 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. "RINT2NP,Result 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 4.--7. "RINT1NP,Result 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. "RINT0NP,Result 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "RINTNP1,Result Interruption Node Pointer 1 Register" bitfld.long 0x0C 28.--31. "RINT15NP,Result 15 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. "RINT14NP,Result 14 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 20.--23. "RINT13NP,Result 13 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. "RINT12NP,Result 12 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 12.--15. "RINT11NP,Result 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. "RINT10NP,Result 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x0C 4.--7. "RINT9NP,Result 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. "RINT8NP,Result 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SINTNP,Source Interruption Node Pointer Register" bitfld.long 0x10 8.--11. "SINT2NP,Source 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 4.--7. "SINT1NP,Source 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. "SINT0NP,Source 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xB0000D74++0x03 line.long 0x00 "STRIINT,Software Trigger Interruption Register" bitfld.long 0x00 11. "SASINT3,Software Activate Common Shared Interruption 3" "0,1" bitfld.long 0x00 10. "SASINT2,Software Activate Common Shared Interruption 2" "0,1" bitfld.long 0x00 9. "SASINT1,Software Activate Common Shared Interruption 1" "0,1" bitfld.long 0x00 8. "SASINT0,Software Activate Common Shared Interruption 0" "0,1" bitfld.long 0x00 3. "SAGINT3,Software Activate Group Interruption 3" "0,1" bitfld.long 0x00 2. "SAGINT2,Software Activate Group Interruption 2" "0,1" newline bitfld.long 0x00 1. "SAGINT1,Software Activate Group Interruption 1" "0,1" bitfld.long 0x00 0. "SAGINT0,Software Activate Group Interruption 0" "0,1" group.long ad:0xB0000D78++0x0B line.long 0x00 "ALIASCH,Alias Channel Register" bitfld.long 0x00 0.--4. "ALIASCH,Alias Channel for CH0 Conversion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "DMAEN,DMA Enable Control Register" bitfld.long 0x04 15. "DMAEN15,DMA enable for RESULT15" "0,1" bitfld.long 0x04 14. "DMAEN14,DMA enable for RESULT 14" "0,1" bitfld.long 0x04 13. "DMAEN13,DMA enable for RESULT 13" "0,1" bitfld.long 0x04 12. "DMAEN12,DMA enable for RESULT 12" "0,1" bitfld.long 0x04 11. "DMAEN11,DMA enable for RESULT 11" "0,1" bitfld.long 0x04 10. "DMAEN10,DMA enable for RESULT 10" "0,1" newline bitfld.long 0x04 9. "DMAEN9,DMA enable for RESULT 9" "0,1" bitfld.long 0x04 8. "DMAEN8,DMA enable for RESULT 8" "0,1" bitfld.long 0x04 7. "DMAEN7,DMA enable for RESULT 7" "0,1" bitfld.long 0x04 6. "DMAEN6,DMA enable for RESULT 6" "0,1" bitfld.long 0x04 5. "DMAEN5,DMA enable for RESULT 5" "0,1" bitfld.long 0x04 4. "DMAEN4,DMA enable for RESULT 4" "0,1" newline bitfld.long 0x04 3. "DMAEN3,DMA enable for RESULT 3" "0,1" bitfld.long 0x04 2. "DMAEN2,DMA enable for RESULT 2" "0,1" bitfld.long 0x04 1. "DMAEN1,DMA enable for RESULT 1" "0,1" bitfld.long 0x04 0. "DMAEN0,DMA enable for RESULT 0" "0,1" line.long 0x08 "ANCONFIG,Analog Configuration Register" bitfld.long 0x08 0. "COMPCRT,Trim Factor of Comparator" "0,1" rgroup.long ad:0xB0000D84++0x0B line.long 0x00 "QFIFO0,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x00 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x00 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x00 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "QFIFO1,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x04 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x04 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x04 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "QFIFO2,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x08 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x08 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x08 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xB0000D94++0x07 line.long 0x00 "FAULTIN,Safety Fault Input Register" bitfld.long 0x00 10.--11. "DAISYDFI,DAISY Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 8.--9. "SYNCDFI,SYNC Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 6.--7. "GATEDFI,Gate Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 4.--5. "FTFI,Feedback Timeout Fault Input" "0,1,2,3" bitfld.long 0x00 2.--3. "TRIDFI,Trigger Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 0.--1. "DRFI,DFF Redundancy Fault Input" "0,1,2,3" line.long 0x04 "SAFEEN,Safety Enable Register" bitfld.long 0x04 30.--31. "BEMASK,Bus Error Mask Control" "0,1,2,3" bitfld.long 0x04 12.--13. "DAISYDSE,DAISY Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 10.--11. "SYNCDSE,SYNC Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 8.--9. "GATEDSE,Gate Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 6.--7. "BDSE,Boundary Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 4.--5. "DTSE,DMA Timeout Safety Enable" "0,1,2,3" newline bitfld.long 0x04 2.--3. "TRIDSE,Trigger Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 0.--1. "DRSE,DFF Redundancy Safety Enable" "0,1,2,3" rgroup.long ad:0xB0000D9C++0x03 line.long 0x00 "SAFEALM,Safety Alarm Register" bitfld.long 0x00 20. "DMALOSEALM,DMA Request Lose Alarm" "0,1" bitfld.long 0x00 19. "GLORESCTRLALM,GLORESCTRL Redundancy Alarm" "0,1" bitfld.long 0x00 18. "GLORESULTALM,GLORESULT Redundancy Alarm" "0,1" bitfld.long 0x00 17. "ALARMCLRALM,ALARMCLR Redundancy Alarm" "0,1" bitfld.long 0x00 16. "SAFEENALM,SAFEEN Redundancy Alarm" "0,1" bitfld.long 0x00 15. "FAULTINALM,FAULTIN Redundancy Alarm" "0,1" newline bitfld.long 0x00 14. "ANCONFIGALM,ANCONFIG Redundancy Alarm" "0,1" bitfld.long 0x00 13. "RESULTALM,RESULTz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 12. "RESCTRLALM,RESCTRLz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 11. "CHCTRLALM,CHCTRLy(y = 0~11) Redundancy Alarm" "0,1" bitfld.long 0x00 10. "QINCFGALM,QINCFGx(x = 0~2) Redundancy Alarm" "0,1" bitfld.long 0x00 9. "ARBCTRLALM,ARBCTRL Redundancy Alarm" "0,1" newline bitfld.long 0x00 8. "ANACFGALM,ANACFG Redundancy Alarm" "0,1" bitfld.long 0x00 7. "DAITOALM,Daisy Chain Signal Timeout Alarm" "0,1" bitfld.long 0x00 6. "SYNTOALM,Synchronization Signal Timeout Alarm" "0,1" bitfld.long 0x00 5. "GATOALM,Gate Timeout Alarm" "0,1" bitfld.long 0x00 4. "TRITOALM,Trigger Timeout Alarm" "0,1" bitfld.long 0x00 3. "SEALM,Safety Endinit Alarm" "0,1" newline bitfld.long 0x00 2. "EALM,Endinit Alarm" "0,1" bitfld.long 0x00 1. "DMATOALM,DMA Timeout Alarm" "0,1" bitfld.long 0x00 0. "BOUNDALM,Boundary Detection Alarm" "0,1" wgroup.long ad:0xB0000DA0++0x03 line.long 0x00 "SAFEALMCLR,Safety Alarm Clear Register" bitfld.long 0x00 8.--9. "ESEALMC,Endinit / Safety Endinit Alarm Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "DMATOALMC,DMA Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "BOUNDALMC,Boundary Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SMDALMC,Signal Monitor Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "DRALMC,Register Redundancy Alarm Clear" "0,1,2,3" group.long ad:0xB0000DA4++0x13 line.long 0x00 "SAFEBOUND,Safety Boundary Control Register" bitfld.long 0x00 30. "SAFEBOUNDDR,Discard Result out of Boundary ADC Conversion Result Handle" "0,1" hexmask.long.word 0x00 16.--27. 1. "SAFEBOUNDU,Software set upper boundary" hexmask.long.word 0x00 0.--11. 1. "SAFEBOUNDL,Software set lower boundary" line.long 0x04 "TRIGATTHRES,Trigger and Gate Monitor Threshold Register" line.long 0x08 "SYNCTHRES,Synchronization Signal Monitor Threshold Register" line.long 0x0C "DAISYTHRES,Daisy Chain Signal Monitor Threshold Register" line.long 0x10 "DMATHRES,DMA Handshake Threshold Register" group.long ad:0xB0000E00++0x03 line.long 0x00 "GLOINTCTRL,Global Interruption Control Register" bitfld.long 0x00 30.--31. "GMASK,Global Result Interruption Mask" "0,1,2,3" bitfld.long 0x00 16.--19. "GRINTNP,Global Result Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. "GCLR,Global Result Interruption Clear" "0,1" bitfld.long 0x00 0. "GINT,Global Result Interruption Flag" "0,1" rgroup.long ad:0xB0000E04++0x07 line.long 0x00 "GLORESULT,Global Result Register" bitfld.long 0x00 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x00 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x00 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. "GCONRESULT,Conversion Result" line.long 0x04 "GLORESULTD,Global Result Debug Register" bitfld.long 0x04 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x04 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x04 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. "GCONRESULT,Conversion Result" group.long ad:0xB0000E0C++0x0B line.long 0x00 "GLORESCTRL,Global Result Control Register" bitfld.long 0x00 8. "GNRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "GWFRMODE,Wait-for-Read Mode Enable" "0,1" bitfld.long 0x00 0. "GRESALI,Result Format Alignment" "0,1" line.long 0x04 "GLODMA,Global DMA Enable Control Register" bitfld.long 0x04 0. "GDMAEN,Global DMA Enable Control" "0,1" line.long 0x08 "GLOFUNBOUND,Global Functional Bound Control Register" hexmask.long.word 0x08 16.--27. 1. "GBOUNDU,Software Set Upper Boundary" hexmask.long.word 0x08 0.--11. 1. "GBOUNDL,Software Set Lower Boundary" tree.end tree "SARADC8" group.long ad:0xB0010000++0x77 line.long 0x00 "Q2TRICTRL,Queue 2 Trigger Control Register" bitfld.long 0x00 16. "INTRISEL,Internal Trigger Source Selection" "0,1" hexmask.long.byte 0x00 8.--13. 1. "TRICNTSET,Queue Trigger Counter Initial Value" hexmask.long.byte 0x00 0.--5. 1. "TRICNT,Queue Trigger Counter" line.long 0x04 "ANACFG,Analog Configuration Register" rbitfld.long 0x04 31. "ANAFLG,SARADC Analog Flag" "0,1" hexmask.long.byte 0x04 16.--21. 1. "OFFSET,SARADC Offset" hexmask.long.byte 0x04 8.--15. 1. "ANADIVF,SARADC Divider Factor For The Analog Internal Clock" bitfld.long 0x04 5. "DISHEN,Calibration Offset Enable" "0,1" bitfld.long 0x04 4. "CALIC,Calibration Control" "0,1" bitfld.long 0x04 2.--3. "ANARESO,ADC Resolution Configuration" "0,1,2,3" newline bitfld.long 0x04 1. "REFSEL,Reference Voltage Selection" "0,1" bitfld.long 0x04 0. "ANAEN,SARADC Analog Enable" "0,1" line.long 0x08 "ARBCTRL,Arbiter Control Register" rbitfld.long 0x08 29. "INJECT2STA,Queue2 Insert Status" "0,1" rbitfld.long 0x08 28. "INJECT1STA,Queue1 Insert Status" "0,1" rbitfld.long 0x08 27. "INJECT0STA,Queue0 Insert Status" "0,1" bitfld.long 0x08 26. "ARBEN2,Arbitration Queue2 Enable Control" "0,1" bitfld.long 0x08 25. "ARBEN1,Arbitration Queue1 Enable Control" "0,1" bitfld.long 0x08 24. "ARBEN0,Arbitration Queue0 Enable Control" "0,1" newline rbitfld.long 0x08 23. "SYNCBUSY,Synchronous Queue Busy Flag" "0,1" rbitfld.long 0x08 22. "Q2BUSY,Queue2 Busy Flag" "0,1" rbitfld.long 0x08 21. "Q1BUSY,Queue1 Busy Flag" "0,1" rbitfld.long 0x08 20. "Q0BUSY,Queue0 Busy Flag" "0,1" rbitfld.long 0x08 18. "Q2WAIT,Queue2 Wait Status" "0,1" rbitfld.long 0x08 17. "Q1WAIT,Queue1 Wait Status" "0,1" newline rbitfld.long 0x08 16. "Q0WAIT,Queue0 Wait Status" "0,1" bitfld.long 0x08 15. "INJECT2CLR,Queue2 Inject Status Clear" "0,1" bitfld.long 0x08 14. "INJECT1CLR,Queue1 Inject Status Clear" "0,1" bitfld.long 0x08 13. "INJECT0CLR,Queue0 Inject Status Clear" "0,1" bitfld.long 0x08 11. "CONSMODE2,Conversion Start Mode of Queue 2" "0,1" bitfld.long 0x08 8.--9. "PRIOL2,Priority Level of Queue 2 Configuration" "0,1,2,3" newline bitfld.long 0x08 7. "CONSMODE1,Conversion Start Mode of Queue 1" "0,1" bitfld.long 0x08 4.--5. "PRIOL1,Priority Level of Queue 1 Configuration" "0,1,2,3" bitfld.long 0x08 3. "CONSMODE0,Conversion Start Mode of Queue 0" "0,1" bitfld.long 0x08 0.--1. "PRIOL0,Priority Level of Queue 0 Configuration" "0,1,2,3" line.long 0x0C "SAMCTRL,Sample Time Control Register" hexmask.long.byte 0x0C 0.--7. 1. "STCTRL,Sample time control register" line.long 0x10 "FUNBOUND,Functional Bound Control Register" bitfld.long 0x10 28.--31. "BOUNDUSEL,Upper Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 16.--27. 1. "BOUNDU,Software Set Upper Boundary" bitfld.long 0x10 12.--15. "BOUNDLSEL,Lower Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 0.--11. 1. "BOUNDL,Software Set Lower Boundary" line.long 0x14 "SYNCCTRL,Synchronous Converter Control Register" bitfld.long 0x14 6. "SYNCEN3,Synchronous Converter Follows CI3 Enable" "0,1" bitfld.long 0x14 5. "SYNCEN2,Synchronous Converter Follows CI2 Enable" "0,1" bitfld.long 0x14 4. "SYNCEN1,Synchronous Converter Follows CI1 Enable" "0,1" bitfld.long 0x14 0.--1. "SYNCSEL,Synchronous Converter Source Selection" "0,1,2,3" line.long 0x18 "QTRICTRL0,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x18 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x18 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x18 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x18 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x18 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x18 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x1C "QTRICTRL1,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x1C 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x1C 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x1C 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x1C 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x1C 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x1C 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x20 "QTRICTRL2,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x20 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x20 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x20 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x20 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x20 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x20 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x24 "QMODE0,Queue x Mode Control Register (x=0~2)" bitfld.long 0x24 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x24 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x24 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x24 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x28 "QMODE1,Queue x Mode Control Register (x=0~2)" bitfld.long 0x28 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x28 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x28 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x28 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x2C "QMODE2,Queue x Mode Control Register (x=0~2)" bitfld.long 0x2C 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x2C 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x2C 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x2C 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x30 "QINCFG0,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x30 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x30 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x30 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x30 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x30 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x30 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x30 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x30 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x30 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x30 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "QINCFG1,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x34 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x34 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x34 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x34 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x34 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x34 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x34 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x34 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x34 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x34 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "QINCFG2,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x38 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x38 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x38 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x38 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x38 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x38 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x38 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x38 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x38 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x38 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "QREQTM0,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x3C 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x3C 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x3C 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x3C 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x40 "QREQTM1,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x40 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x40 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x40 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x40 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x44 "QREQTM2,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x44 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x44 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x44 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x44 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x48 "CHCTRL0,Channel y Control Register (y=0~11)" bitfld.long 0x48 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x48 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x48 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x48 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x48 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x48 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x48 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x48 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x48 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x48 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x48 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x48 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x4C "CHCTRL1,Channel y Control Register (y=0~11)" bitfld.long 0x4C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x4C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x4C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x4C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x4C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x4C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x4C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x4C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x4C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x4C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x4C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x4C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x50 "CHCTRL2,Channel y Control Register (y=0~11)" bitfld.long 0x50 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x50 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x50 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x50 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x50 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x50 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x50 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x50 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x50 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x50 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x50 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x50 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x54 "CHCTRL3,Channel y Control Register (y=0~11)" bitfld.long 0x54 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x54 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x54 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x54 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x54 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x54 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x54 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x54 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x54 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x54 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x54 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x54 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x58 "CHCTRL4,Channel y Control Register (y=0~11)" bitfld.long 0x58 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x58 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x58 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x58 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x58 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x58 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x58 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x58 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x58 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x58 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x58 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x58 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x5C "CHCTRL5,Channel y Control Register (y=0~11)" bitfld.long 0x5C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x5C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x5C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x5C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x5C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x5C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x5C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x5C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x5C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x5C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x5C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x5C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x60 "CHCTRL6,Channel y Control Register (y=0~11)" bitfld.long 0x60 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x60 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x60 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x60 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x60 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x60 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x60 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x60 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x60 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x60 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x60 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x60 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x64 "CHCTRL7,Channel y Control Register (y=0~11)" bitfld.long 0x64 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x64 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x64 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x64 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x64 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x64 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x64 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x64 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x64 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x64 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x64 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x64 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x68 "CHCTRL8,Channel y Control Register (y=0~11)" bitfld.long 0x68 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x68 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x68 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x68 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x68 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x68 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x68 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x68 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x68 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x68 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x68 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x68 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x6C "CHCTRL9,Channel y Control Register (y=0~11)" bitfld.long 0x6C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x6C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x6C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x6C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x6C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x6C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x6C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x6C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x6C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x6C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x6C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x6C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x70 "CHCTRL10,Channel y Control Register (y=0~11)" bitfld.long 0x70 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x70 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x70 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x70 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x70 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x70 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x70 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x70 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x70 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x70 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x70 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x70 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x74 "CHCTRL11,Channel y Control Register (y=0~11)" bitfld.long 0x74 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x74 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x74 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x74 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x74 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x74 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x74 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x74 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x74 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x74 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x74 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x74 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" group.long ad:0xB0010088++0x3F line.long 0x00 "RESCTRL0,Result z Control Register (z=0~15)" bitfld.long 0x00 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x00 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x04 "RESCTRL1,Result z Control Register (z=0~15)" bitfld.long 0x04 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x04 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x04 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x08 "RESCTRL2,Result z Control Register (z=0~15)" bitfld.long 0x08 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x08 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x08 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x0C "RESCTRL3,Result z Control Register (z=0~15)" bitfld.long 0x0C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x0C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x0C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x10 "RESCTRL4,Result z Control Register (z=0~15)" bitfld.long 0x10 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x10 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x10 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x14 "RESCTRL5,Result z Control Register (z=0~15)" bitfld.long 0x14 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x14 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x14 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x18 "RESCTRL6,Result z Control Register (z=0~15)" bitfld.long 0x18 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x18 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x18 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x1C "RESCTRL7,Result z Control Register (z=0~15)" bitfld.long 0x1C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x1C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x1C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x20 "RESCTRL8,Result z Control Register (z=0~15)" bitfld.long 0x20 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x20 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x20 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x24 "RESCTRL9,Result z Control Register (z=0~15)" bitfld.long 0x24 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x24 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x24 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x28 "RESCTRL10,Result z Control Register (z=0~15)" bitfld.long 0x28 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x28 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x28 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x2C "RESCTRL11,Result z Control Register (z=0~15)" bitfld.long 0x2C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x2C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x2C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x30 "RESCTRL12,Result z Control Register (z=0~15)" bitfld.long 0x30 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x30 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x30 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x34 "RESCTRL13,Result z Control Register (z=0~15)" bitfld.long 0x34 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x34 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x34 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x38 "RESCTRL14,Result z Control Register (z=0~15)" bitfld.long 0x38 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x38 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x38 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x3C "RESCTRL15,Result z Control Register (z=0~15)" bitfld.long 0x3C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x3C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x3C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" rgroup.long ad:0xB00100C8++0x7F line.long 0x00 "RESULT0,Result Register (z=0~15)" bitfld.long 0x00 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x00 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x00 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x04 "RESULT1,Result Register (z=0~15)" bitfld.long 0x04 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x04 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x04 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x08 "RESULT2,Result Register (z=0~15)" bitfld.long 0x08 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x08 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x08 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x0C "RESULT3,Result Register (z=0~15)" bitfld.long 0x0C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x0C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x0C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x10 "RESULT4,Result Register (z=0~15)" bitfld.long 0x10 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x10 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x10 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x10 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x14 "RESULT5,Result Register (z=0~15)" bitfld.long 0x14 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x14 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x14 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x14 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x18 "RESULT6,Result Register (z=0~15)" bitfld.long 0x18 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x18 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x18 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x18 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x1C "RESULT7,Result Register (z=0~15)" bitfld.long 0x1C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x1C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x1C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x1C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x20 "RESULT8,Result Register (z=0~15)" bitfld.long 0x20 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x20 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x20 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x20 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x24 "RESULT9,Result Register (z=0~15)" bitfld.long 0x24 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x24 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x24 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x24 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x28 "RESULT10,Result Register (z=0~15)" bitfld.long 0x28 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x28 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x28 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x28 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x2C "RESULT11,Result Register (z=0~15)" bitfld.long 0x2C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x2C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x2C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x2C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x30 "RESULT12,Result Register (z=0~15)" bitfld.long 0x30 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x30 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x30 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x30 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x34 "RESULT13,Result Register (z=0~15)" bitfld.long 0x34 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x34 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x34 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x34 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x38 "RESULT14,Result Register (z=0~15)" bitfld.long 0x38 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x38 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x38 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x38 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x3C "RESULT15,Result Register (z=0~15)" bitfld.long 0x3C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x3C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x3C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x3C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x40 "RESULTD0,Result Debug Register (z=0~15)" bitfld.long 0x40 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x40 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x40 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x40 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x44 "RESULTD1,Result Debug Register (z=0~15)" bitfld.long 0x44 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x44 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x44 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x44 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x48 "RESULTD2,Result Debug Register (z=0~15)" bitfld.long 0x48 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x48 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x48 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x48 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x4C "RESULTD3,Result Debug Register (z=0~15)" bitfld.long 0x4C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x4C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x4C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x4C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x50 "RESULTD4,Result Debug Register (z=0~15)" bitfld.long 0x50 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x50 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x50 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x50 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x54 "RESULTD5,Result Debug Register (z=0~15)" bitfld.long 0x54 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x54 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x54 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x54 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x58 "RESULTD6,Result Debug Register (z=0~15)" bitfld.long 0x58 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x58 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x58 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x58 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x5C "RESULTD7,Result Debug Register (z=0~15)" bitfld.long 0x5C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x5C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x5C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x5C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x60 "RESULTD8,Result Debug Register (z=0~15)" bitfld.long 0x60 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x60 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x60 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x60 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x64 "RESULTD9,Result Debug Register (z=0~15)" bitfld.long 0x64 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x64 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x64 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x64 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x68 "RESULTD10,Result Debug Register (z=0~15)" bitfld.long 0x68 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x68 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x68 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x68 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x6C "RESULTD11,Result Debug Register (z=0~15)" bitfld.long 0x6C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x6C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x6C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x6C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x70 "RESULTD12,Result Debug Register (z=0~15)" bitfld.long 0x70 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x70 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x70 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x70 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x74 "RESULTD13,Result Debug Register (z=0~15)" bitfld.long 0x74 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x74 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x74 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x74 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x78 "RESULTD14,Result Debug Register (z=0~15)" bitfld.long 0x78 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x78 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x78 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x78 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x7C "RESULTD15,Result Debug Register (z=0~15)" bitfld.long 0x7C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x7C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x7C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x7C 0.--15. 1. "CONRESULT,Conversion Result" group.long ad:0xB0010148++0x0B line.long 0x00 "CINTCTRL,Channel Interruption Control Register" bitfld.long 0x00 30.--31. "CMASK,Channel Interruption Mask" "0,1,2,3" bitfld.long 0x00 11. "CINT11,Channel Interruption Flag for Channel 11" "0,1" bitfld.long 0x00 10. "CINT10,Channel Interruption Flag for Channel 10" "0,1" bitfld.long 0x00 9. "CINT9,Channel Interruption Flag for Channel 9" "0,1" bitfld.long 0x00 8. "CINT8,Channel Interruption Flag for Channel 8" "0,1" bitfld.long 0x00 7. "CINT7,Channel Interruption Flag for Channel 7" "0,1" newline bitfld.long 0x00 6. "CINT6,Channel Interruption Flag for Channel 6" "0,1" bitfld.long 0x00 5. "CINT5,Channel Interruption Flag for Channel 5" "0,1" bitfld.long 0x00 4. "CINT4,Channel Interruption Flag for Channel 4" "0,1" bitfld.long 0x00 3. "CINT3,Channel Interruption Flag for Channel 3" "0,1" bitfld.long 0x00 2. "CINT2,Channel Interruption Flag for Channel 2" "0,1" bitfld.long 0x00 1. "CINT1,Channel Interruption Flag for Channel 1" "0,1" newline bitfld.long 0x00 0. "CINT0,Channel Interruption Flag for Channel 0" "0,1" line.long 0x04 "RINTCTRL,Result Interruption Control Register" bitfld.long 0x04 30.--31. "RMASK,Result Interruption Mask" "0,1,2,3" bitfld.long 0x04 15. "RINT15,Result Interruption Flag for RESULT 15" "0,1" bitfld.long 0x04 14. "RINT14,Result Interruption Flag for RESULT 14" "0,1" bitfld.long 0x04 13. "RINT13,Result Interruption Flag for RESULT 13" "0,1" bitfld.long 0x04 12. "RINT12,Result Interruption Flag for RESULT 12" "0,1" bitfld.long 0x04 11. "RINT11,Result Interruption Flag for RESULT 11" "0,1" newline bitfld.long 0x04 10. "RINT10,Result Interruption Flag for RESULT 10" "0,1" bitfld.long 0x04 9. "RINT9,Result Interruption Flag for RESULT 9" "0,1" bitfld.long 0x04 8. "RINT8,Result Interruption Flag for RESULT 8" "0,1" bitfld.long 0x04 7. "RINT7,Result Interruption Flag for RESULT 7" "0,1" bitfld.long 0x04 6. "RINT6,Result Interruption Flag for RESULT 6" "0,1" bitfld.long 0x04 5. "RINT5,Result Interruption Flag for RESULT 5" "0,1" newline bitfld.long 0x04 4. "RINT4,Result Interruption Flag for RESULT 4" "0,1" bitfld.long 0x04 3. "RINT3,Result Interruption Flag for RESULT 3" "0,1" bitfld.long 0x04 2. "RINT2,Result Interruption Flag for RESULT 2" "0,1" bitfld.long 0x04 1. "RINT1,Result Interruption Flag for RESULT 1" "0,1" bitfld.long 0x04 0. "RINT0,Result Interruption Flag for RESULT 0" "0,1" line.long 0x08 "SINTCTRL,Source Interruption Control Register" bitfld.long 0x08 30.--31. "SMASK,Source Interruption Mask" "0,1,2,3" bitfld.long 0x08 2. "SINT2,Source Interruption Flag for Queue 2" "0,1" bitfld.long 0x08 1. "SINT1,Source Interruption Flag for Queue 1" "0,1" bitfld.long 0x08 0. "SINT0,Source Interruption Flag for Queue 0" "0,1" wgroup.long ad:0xB0010154++0x0B line.long 0x00 "CINTCLR,Channel Interruption Clear Register" bitfld.long 0x00 11. "CCLR11,Channel 11 Interruption Flag Clear" "0,1" bitfld.long 0x00 10. "CCLR10,Channel 10 Interruption Flag Clear" "0,1" bitfld.long 0x00 9. "CCLR9,Channel 9 Interruption Flag Clear" "0,1" bitfld.long 0x00 8. "CCLR8,Channel 8 Interruption Flag Clear" "0,1" bitfld.long 0x00 7. "CCLR7,Channel 7 Interruption Flag Clear" "0,1" bitfld.long 0x00 6. "CCLR6,Channel 6 Interruption Flag Clear" "0,1" newline bitfld.long 0x00 5. "CCLR5,Channel 5 Interruption Flag Clear" "0,1" bitfld.long 0x00 4. "CCLR4,Channel 4 Interruption Flag Clear" "0,1" bitfld.long 0x00 3. "CCLR3,Channel 3 Interruption Flag Clear" "0,1" bitfld.long 0x00 2. "CCLR2,Channel 2 Interruption Flag Clear" "0,1" bitfld.long 0x00 1. "CCLR1,Channel 1 Interruption Flag Clear" "0,1" bitfld.long 0x00 0. "CCLR0,Channel 0 Interruption Flag Clear" "0,1" line.long 0x04 "RINTCLR,Result Interruption Clear Register" bitfld.long 0x04 15. "RCLR15,Result 15 Interruption Flag Clear" "0,1" bitfld.long 0x04 14. "RCLR14,Result 14 Interruption Flag Clear" "0,1" bitfld.long 0x04 13. "RCLR13,Result 13 Interruption Flag Clear" "0,1" bitfld.long 0x04 12. "RCLR12,Result 12 Interruption Flag Clear" "0,1" bitfld.long 0x04 11. "RCLR11,Result 11 Interruption Flag Clear" "0,1" bitfld.long 0x04 10. "RCLR10,Result 10 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 9. "RCLR9,Result 9 Interruption Flag Clear" "0,1" bitfld.long 0x04 8. "RCLR8,Result 8 Interruption Flag Clear" "0,1" bitfld.long 0x04 7. "RCLR7,Result 7 Interruption Flag Clear" "0,1" bitfld.long 0x04 6. "RCLR6,Result 6 Interruption Flag Clear" "0,1" bitfld.long 0x04 5. "RCLR5,Result 5 Interruption Flag Clear" "0,1" bitfld.long 0x04 4. "RCLR4,Result 4 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 3. "RCLR3,Result 3 Interruption Flag Clear" "0,1" bitfld.long 0x04 2. "RCLR2,Result 2 Interruption Flag Clear" "0,1" bitfld.long 0x04 1. "RCLR1,Result 1 Interruption Flag Clear" "0,1" bitfld.long 0x04 0. "RCLR0,Result 0 Interruption Flag Clear" "0,1" line.long 0x08 "SINTCLR,Queue Interruption Clear Register" bitfld.long 0x08 2. "SCLR2,Queue 2 Interruption Flag Clear" "0,1" bitfld.long 0x08 1. "SCLR1,Queue 1 Interruption Flag Clear" "0,1" bitfld.long 0x08 0. "SCLR0,Queue 0 Interruption Flag Clear" "0,1" group.long ad:0xB0010160++0x13 line.long 0x00 "CINTNP0,Channel Interruption Node Pointer 0 Register" bitfld.long 0x00 28.--31. "CINT7NP,Channel 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "CINT6NP,Channel 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "CINT5NP,Channel 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "CINT4NP,Channel 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "CINT3NP,Channel 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "CINT2NP,Channel 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 4.--7. "CINT1NP,Channel 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CINT0NP,Channel 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CINTNP1,Channel Interruption Node Pointer 1 Register" bitfld.long 0x04 12.--15. "CINT11NP,Channel 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. "CINT10NP,Channel 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. "CINT9NP,Channel 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. "CINT8NP,Channel 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RINTNP0,Result Interruption Node Pointer 0 Register" bitfld.long 0x08 28.--31. "RINT7NP,Result 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. "RINT6NP,Result 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. "RINT5NP,Result 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. "RINT4NP,Result 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. "RINT3NP,Result 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. "RINT2NP,Result 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 4.--7. "RINT1NP,Result 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. "RINT0NP,Result 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "RINTNP1,Result Interruption Node Pointer 1 Register" bitfld.long 0x0C 28.--31. "RINT15NP,Result 15 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. "RINT14NP,Result 14 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 20.--23. "RINT13NP,Result 13 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. "RINT12NP,Result 12 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 12.--15. "RINT11NP,Result 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. "RINT10NP,Result 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x0C 4.--7. "RINT9NP,Result 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. "RINT8NP,Result 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SINTNP,Source Interruption Node Pointer Register" bitfld.long 0x10 8.--11. "SINT2NP,Source 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 4.--7. "SINT1NP,Source 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. "SINT0NP,Source 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xB0010174++0x03 line.long 0x00 "STRIINT,Software Trigger Interruption Register" bitfld.long 0x00 11. "SASINT3,Software Activate Common Shared Interruption 3" "0,1" bitfld.long 0x00 10. "SASINT2,Software Activate Common Shared Interruption 2" "0,1" bitfld.long 0x00 9. "SASINT1,Software Activate Common Shared Interruption 1" "0,1" bitfld.long 0x00 8. "SASINT0,Software Activate Common Shared Interruption 0" "0,1" bitfld.long 0x00 3. "SAGINT3,Software Activate Group Interruption 3" "0,1" bitfld.long 0x00 2. "SAGINT2,Software Activate Group Interruption 2" "0,1" newline bitfld.long 0x00 1. "SAGINT1,Software Activate Group Interruption 1" "0,1" bitfld.long 0x00 0. "SAGINT0,Software Activate Group Interruption 0" "0,1" group.long ad:0xB0010178++0x0B line.long 0x00 "ALIASCH,Alias Channel Register" bitfld.long 0x00 0.--4. "ALIASCH,Alias Channel for CH0 Conversion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "DMAEN,DMA Enable Control Register" bitfld.long 0x04 15. "DMAEN15,DMA enable for RESULT15" "0,1" bitfld.long 0x04 14. "DMAEN14,DMA enable for RESULT 14" "0,1" bitfld.long 0x04 13. "DMAEN13,DMA enable for RESULT 13" "0,1" bitfld.long 0x04 12. "DMAEN12,DMA enable for RESULT 12" "0,1" bitfld.long 0x04 11. "DMAEN11,DMA enable for RESULT 11" "0,1" bitfld.long 0x04 10. "DMAEN10,DMA enable for RESULT 10" "0,1" newline bitfld.long 0x04 9. "DMAEN9,DMA enable for RESULT 9" "0,1" bitfld.long 0x04 8. "DMAEN8,DMA enable for RESULT 8" "0,1" bitfld.long 0x04 7. "DMAEN7,DMA enable for RESULT 7" "0,1" bitfld.long 0x04 6. "DMAEN6,DMA enable for RESULT 6" "0,1" bitfld.long 0x04 5. "DMAEN5,DMA enable for RESULT 5" "0,1" bitfld.long 0x04 4. "DMAEN4,DMA enable for RESULT 4" "0,1" newline bitfld.long 0x04 3. "DMAEN3,DMA enable for RESULT 3" "0,1" bitfld.long 0x04 2. "DMAEN2,DMA enable for RESULT 2" "0,1" bitfld.long 0x04 1. "DMAEN1,DMA enable for RESULT 1" "0,1" bitfld.long 0x04 0. "DMAEN0,DMA enable for RESULT 0" "0,1" line.long 0x08 "ANCONFIG,Analog Configuration Register" bitfld.long 0x08 0. "COMPCRT,Trim Factor of Comparator" "0,1" rgroup.long ad:0xB0010184++0x0B line.long 0x00 "QFIFO0,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x00 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x00 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x00 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "QFIFO1,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x04 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x04 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x04 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "QFIFO2,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x08 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x08 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x08 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xB0010194++0x07 line.long 0x00 "FAULTIN,Safety Fault Input Register" bitfld.long 0x00 10.--11. "DAISYDFI,DAISY Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 8.--9. "SYNCDFI,SYNC Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 6.--7. "GATEDFI,Gate Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 4.--5. "FTFI,Feedback Timeout Fault Input" "0,1,2,3" bitfld.long 0x00 2.--3. "TRIDFI,Trigger Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 0.--1. "DRFI,DFF Redundancy Fault Input" "0,1,2,3" line.long 0x04 "SAFEEN,Safety Enable Register" bitfld.long 0x04 30.--31. "BEMASK,Bus Error Mask Control" "0,1,2,3" bitfld.long 0x04 12.--13. "DAISYDSE,DAISY Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 10.--11. "SYNCDSE,SYNC Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 8.--9. "GATEDSE,Gate Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 6.--7. "BDSE,Boundary Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 4.--5. "DTSE,DMA Timeout Safety Enable" "0,1,2,3" newline bitfld.long 0x04 2.--3. "TRIDSE,Trigger Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 0.--1. "DRSE,DFF Redundancy Safety Enable" "0,1,2,3" rgroup.long ad:0xB001019C++0x03 line.long 0x00 "SAFEALM,Safety Alarm Register" bitfld.long 0x00 20. "DMALOSEALM,DMA Request Lose Alarm" "0,1" bitfld.long 0x00 19. "GLORESCTRLALM,GLORESCTRL Redundancy Alarm" "0,1" bitfld.long 0x00 18. "GLORESULTALM,GLORESULT Redundancy Alarm" "0,1" bitfld.long 0x00 17. "ALARMCLRALM,ALARMCLR Redundancy Alarm" "0,1" bitfld.long 0x00 16. "SAFEENALM,SAFEEN Redundancy Alarm" "0,1" bitfld.long 0x00 15. "FAULTINALM,FAULTIN Redundancy Alarm" "0,1" newline bitfld.long 0x00 14. "ANCONFIGALM,ANCONFIG Redundancy Alarm" "0,1" bitfld.long 0x00 13. "RESULTALM,RESULTz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 12. "RESCTRLALM,RESCTRLz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 11. "CHCTRLALM,CHCTRLy(y = 0~11) Redundancy Alarm" "0,1" bitfld.long 0x00 10. "QINCFGALM,QINCFGx(x = 0~2) Redundancy Alarm" "0,1" bitfld.long 0x00 9. "ARBCTRLALM,ARBCTRL Redundancy Alarm" "0,1" newline bitfld.long 0x00 8. "ANACFGALM,ANACFG Redundancy Alarm" "0,1" bitfld.long 0x00 7. "DAITOALM,Daisy Chain Signal Timeout Alarm" "0,1" bitfld.long 0x00 6. "SYNTOALM,Synchronization Signal Timeout Alarm" "0,1" bitfld.long 0x00 5. "GATOALM,Gate Timeout Alarm" "0,1" bitfld.long 0x00 4. "TRITOALM,Trigger Timeout Alarm" "0,1" bitfld.long 0x00 3. "SEALM,Safety Endinit Alarm" "0,1" newline bitfld.long 0x00 2. "EALM,Endinit Alarm" "0,1" bitfld.long 0x00 1. "DMATOALM,DMA Timeout Alarm" "0,1" bitfld.long 0x00 0. "BOUNDALM,Boundary Detection Alarm" "0,1" wgroup.long ad:0xB00101A0++0x03 line.long 0x00 "SAFEALMCLR,Safety Alarm Clear Register" bitfld.long 0x00 8.--9. "ESEALMC,Endinit / Safety Endinit Alarm Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "DMATOALMC,DMA Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "BOUNDALMC,Boundary Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SMDALMC,Signal Monitor Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "DRALMC,Register Redundancy Alarm Clear" "0,1,2,3" group.long ad:0xB00101A4++0x13 line.long 0x00 "SAFEBOUND,Safety Boundary Control Register" bitfld.long 0x00 30. "SAFEBOUNDDR,Discard Result out of Boundary ADC Conversion Result Handle" "0,1" hexmask.long.word 0x00 16.--27. 1. "SAFEBOUNDU,Software set upper boundary" hexmask.long.word 0x00 0.--11. 1. "SAFEBOUNDL,Software set lower boundary" line.long 0x04 "TRIGATTHRES,Trigger and Gate Monitor Threshold Register" line.long 0x08 "SYNCTHRES,Synchronization Signal Monitor Threshold Register" line.long 0x0C "DAISYTHRES,Daisy Chain Signal Monitor Threshold Register" line.long 0x10 "DMATHRES,DMA Handshake Threshold Register" group.long ad:0xB0010200++0x03 line.long 0x00 "GLOINTCTRL,Global Interruption Control Register" bitfld.long 0x00 30.--31. "GMASK,Global Result Interruption Mask" "0,1,2,3" bitfld.long 0x00 16.--19. "GRINTNP,Global Result Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. "GCLR,Global Result Interruption Clear" "0,1" bitfld.long 0x00 0. "GINT,Global Result Interruption Flag" "0,1" rgroup.long ad:0xB0010204++0x07 line.long 0x00 "GLORESULT,Global Result Register" bitfld.long 0x00 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x00 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x00 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. "GCONRESULT,Conversion Result" line.long 0x04 "GLORESULTD,Global Result Debug Register" bitfld.long 0x04 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x04 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x04 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. "GCONRESULT,Conversion Result" group.long ad:0xB001020C++0x0B line.long 0x00 "GLORESCTRL,Global Result Control Register" bitfld.long 0x00 8. "GNRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "GWFRMODE,Wait-for-Read Mode Enable" "0,1" bitfld.long 0x00 0. "GRESALI,Result Format Alignment" "0,1" line.long 0x04 "GLODMA,Global DMA Enable Control Register" bitfld.long 0x04 0. "GDMAEN,Global DMA Enable Control" "0,1" line.long 0x08 "GLOFUNBOUND,Global Functional Bound Control Register" hexmask.long.word 0x08 16.--27. 1. "GBOUNDU,Software Set Upper Boundary" hexmask.long.word 0x08 0.--11. 1. "GBOUNDL,Software Set Lower Boundary" tree.end tree "SARADC9" group.long ad:0xB0010400++0x77 line.long 0x00 "Q2TRICTRL,Queue 2 Trigger Control Register" bitfld.long 0x00 16. "INTRISEL,Internal Trigger Source Selection" "0,1" hexmask.long.byte 0x00 8.--13. 1. "TRICNTSET,Queue Trigger Counter Initial Value" hexmask.long.byte 0x00 0.--5. 1. "TRICNT,Queue Trigger Counter" line.long 0x04 "ANACFG,Analog Configuration Register" rbitfld.long 0x04 31. "ANAFLG,SARADC Analog Flag" "0,1" hexmask.long.byte 0x04 16.--21. 1. "OFFSET,SARADC Offset" hexmask.long.byte 0x04 8.--15. 1. "ANADIVF,SARADC Divider Factor For The Analog Internal Clock" bitfld.long 0x04 5. "DISHEN,Calibration Offset Enable" "0,1" bitfld.long 0x04 4. "CALIC,Calibration Control" "0,1" bitfld.long 0x04 2.--3. "ANARESO,ADC Resolution Configuration" "0,1,2,3" newline bitfld.long 0x04 1. "REFSEL,Reference Voltage Selection" "0,1" bitfld.long 0x04 0. "ANAEN,SARADC Analog Enable" "0,1" line.long 0x08 "ARBCTRL,Arbiter Control Register" rbitfld.long 0x08 29. "INJECT2STA,Queue2 Insert Status" "0,1" rbitfld.long 0x08 28. "INJECT1STA,Queue1 Insert Status" "0,1" rbitfld.long 0x08 27. "INJECT0STA,Queue0 Insert Status" "0,1" bitfld.long 0x08 26. "ARBEN2,Arbitration Queue2 Enable Control" "0,1" bitfld.long 0x08 25. "ARBEN1,Arbitration Queue1 Enable Control" "0,1" bitfld.long 0x08 24. "ARBEN0,Arbitration Queue0 Enable Control" "0,1" newline rbitfld.long 0x08 23. "SYNCBUSY,Synchronous Queue Busy Flag" "0,1" rbitfld.long 0x08 22. "Q2BUSY,Queue2 Busy Flag" "0,1" rbitfld.long 0x08 21. "Q1BUSY,Queue1 Busy Flag" "0,1" rbitfld.long 0x08 20. "Q0BUSY,Queue0 Busy Flag" "0,1" rbitfld.long 0x08 18. "Q2WAIT,Queue2 Wait Status" "0,1" rbitfld.long 0x08 17. "Q1WAIT,Queue1 Wait Status" "0,1" newline rbitfld.long 0x08 16. "Q0WAIT,Queue0 Wait Status" "0,1" bitfld.long 0x08 15. "INJECT2CLR,Queue2 Inject Status Clear" "0,1" bitfld.long 0x08 14. "INJECT1CLR,Queue1 Inject Status Clear" "0,1" bitfld.long 0x08 13. "INJECT0CLR,Queue0 Inject Status Clear" "0,1" bitfld.long 0x08 11. "CONSMODE2,Conversion Start Mode of Queue 2" "0,1" bitfld.long 0x08 8.--9. "PRIOL2,Priority Level of Queue 2 Configuration" "0,1,2,3" newline bitfld.long 0x08 7. "CONSMODE1,Conversion Start Mode of Queue 1" "0,1" bitfld.long 0x08 4.--5. "PRIOL1,Priority Level of Queue 1 Configuration" "0,1,2,3" bitfld.long 0x08 3. "CONSMODE0,Conversion Start Mode of Queue 0" "0,1" bitfld.long 0x08 0.--1. "PRIOL0,Priority Level of Queue 0 Configuration" "0,1,2,3" line.long 0x0C "SAMCTRL,Sample Time Control Register" hexmask.long.byte 0x0C 0.--7. 1. "STCTRL,Sample time control register" line.long 0x10 "FUNBOUND,Functional Bound Control Register" bitfld.long 0x10 28.--31. "BOUNDUSEL,Upper Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 16.--27. 1. "BOUNDU,Software Set Upper Boundary" bitfld.long 0x10 12.--15. "BOUNDLSEL,Lower Boundary Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10 0.--11. 1. "BOUNDL,Software Set Lower Boundary" line.long 0x14 "SYNCCTRL,Synchronous Converter Control Register" bitfld.long 0x14 6. "SYNCEN3,Synchronous Converter Follows CI3 Enable" "0,1" bitfld.long 0x14 5. "SYNCEN2,Synchronous Converter Follows CI2 Enable" "0,1" bitfld.long 0x14 4. "SYNCEN1,Synchronous Converter Follows CI1 Enable" "0,1" bitfld.long 0x14 0.--1. "SYNCSEL,Synchronous Converter Source Selection" "0,1,2,3" line.long 0x18 "QTRICTRL0,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x18 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x18 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x18 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x18 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x18 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x18 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x1C "QTRICTRL1,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x1C 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x1C 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x1C 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x1C 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x1C 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x1C 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x20 "QTRICTRL2,Queue x Trigger Configuration Register (x=0~2)" bitfld.long 0x20 23. "GSWE,GATESEL Register Write Enable" "0,1" rbitfld.long 0x20 20. "GATELVL,Gate Level" "0,1" bitfld.long 0x20 16.--19. "GATESEL,Gate Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 15. "TRWE,Trigger Register Write Enable" "0,1" bitfld.long 0x20 13.--14. "TRIMODE,Trigger Mode" "0,1,2,3" rbitfld.long 0x20 12. "EXTTRILVL,External Trigger Level" "0,1" newline bitfld.long 0x20 8.--11. "EXTTRISEL,External Trigger Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 6.--7. "TRISEL,Trigger Source Selection" "0,1,2,3" line.long 0x24 "QMODE0,Queue x Mode Control Register (x=0~2)" bitfld.long 0x24 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x24 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x24 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x24 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x28 "QMODE1,Queue x Mode Control Register (x=0~2)" bitfld.long 0x28 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x28 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x28 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x28 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x2C "QMODE2,Queue x Mode Control Register (x=0~2)" bitfld.long 0x2C 12. "FLUQU,Flush Queue" "0,1" bitfld.long 0x2C 8. "STRIGEN,Software Trigger Generation" "0,1" bitfld.long 0x2C 4. "EXTTRIEN,External Trigger Enable" "0,1" bitfld.long 0x2C 0.--1. "GATEEN,Gate Enable Control" "0,1,2,3" line.long 0x30 "QINCFG0,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x30 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x30 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x30 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x30 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x30 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x30 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x30 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x30 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x30 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x30 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x34 "QINCFG1,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x34 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x34 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x34 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x34 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x34 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x34 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x34 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x34 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x34 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x34 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x38 "QINCFG2,Queue x Input Configuration Register (x=0~2)" bitfld.long 0x38 15. "SUCCEEN,Successive Converter Enable" "0,1" bitfld.long 0x38 13.--14. "CONDSEL,Converter Diagnostics Selection" "0,1,2,3" bitfld.long 0x38 12. "CDEN,Converter Diagnostics Enable" "0,1" bitfld.long 0x38 11. "MDPU,Multiplexer Diagnostics Pull Up Enable" "0,1" bitfld.long 0x38 10. "MDPD,Multiplexer Diagnostics Pull Down Enable" "0,1" bitfld.long 0x38 9. "MDLPD,Multiplexer Diagnostics Pull Down with Low Resistance Enable" "0,1" newline bitfld.long 0x38 8. "QIEN,Source Interruption Enable" "0,1" bitfld.long 0x38 7. "EXTEREN,External Trigger Enable Mode" "0,1" bitfld.long 0x38 5. "RFEN,Refill Enable" "0,1" bitfld.long 0x38 0.--4. "REQCHN,Conversion Request Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x3C "QREQTM0,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x3C 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x3C 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x3C 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x3C 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x40 "QREQTM1,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x40 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x40 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x40 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x40 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x44 "QREQTM2,Queue x Request Timer Mode Register (x=0~2)" bitfld.long 0x44 17. "EXTTRITEN,External Trigger Internal Timer Enable" "0,1" bitfld.long 0x44 16. "STRITEN,Software Trigger Internal Timer Enable" "0,1" hexmask.long.byte 0x44 8.--15. 1. "SEQTVALUE,Internal Timer Period" bitfld.long 0x44 0.--1. "SEQTMOD,Internal Timer Mode Control" "0,1,2,3" line.long 0x48 "CHCTRL0,Channel y Control Register (y=0~11)" bitfld.long 0x48 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x48 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x48 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x48 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x48 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x48 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x48 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x48 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x48 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x48 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x48 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x48 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x48 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x4C "CHCTRL1,Channel y Control Register (y=0~11)" bitfld.long 0x4C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x4C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x4C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x4C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x4C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x4C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x4C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x4C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x4C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x4C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x4C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x4C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x50 "CHCTRL2,Channel y Control Register (y=0~11)" bitfld.long 0x50 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x50 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x50 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x50 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x50 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x50 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x50 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x50 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x50 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x50 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x50 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x50 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x50 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x54 "CHCTRL3,Channel y Control Register (y=0~11)" bitfld.long 0x54 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x54 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x54 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x54 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x54 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x54 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x54 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x54 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x54 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x54 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x54 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x54 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x58 "CHCTRL4,Channel y Control Register (y=0~11)" bitfld.long 0x58 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x58 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x58 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x58 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x58 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x58 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x58 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x58 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x58 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x58 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x58 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x58 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x58 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x5C "CHCTRL5,Channel y Control Register (y=0~11)" bitfld.long 0x5C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x5C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x5C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x5C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x5C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x5C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x5C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x5C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x5C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x5C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x5C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x5C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x5C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x60 "CHCTRL6,Channel y Control Register (y=0~11)" bitfld.long 0x60 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x60 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x60 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x60 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x60 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x60 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x60 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x60 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x60 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x60 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x60 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x60 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x60 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x64 "CHCTRL7,Channel y Control Register (y=0~11)" bitfld.long 0x64 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x64 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x64 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x64 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x64 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x64 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x64 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x64 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x64 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x64 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x64 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x64 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x64 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x68 "CHCTRL8,Channel y Control Register (y=0~11)" bitfld.long 0x68 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x68 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x68 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x68 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x68 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x68 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x68 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x68 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x68 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x68 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x68 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x68 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x68 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x6C "CHCTRL9,Channel y Control Register (y=0~11)" bitfld.long 0x6C 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x6C 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x6C 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x6C 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x6C 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x6C 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x6C 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x6C 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x6C 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x6C 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x6C 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x6C 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x6C 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x70 "CHCTRL10,Channel y Control Register (y=0~11)" bitfld.long 0x70 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x70 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x70 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x70 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x70 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x70 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x70 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x70 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x70 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x70 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x70 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x70 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x70 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" line.long 0x74 "CHCTRL11,Channel y Control Register (y=0~11)" bitfld.long 0x74 25. "BWDREFSEL,Broken Wire Reference Voltage Selection" "0,1" bitfld.long 0x74 24. "BWDETEN,Broken Wire Detection Enable" "0,1" bitfld.long 0x74 22. "HDIRDCEN,HDI Interface to RDC Enable" "0,1" bitfld.long 0x74 21. "HDIGTMEN,HDI Interface to GTM Enable" "0,1" bitfld.long 0x74 20. "HDIFCEN,HDI Interface to FC Enable" "0,1" bitfld.long 0x74 16.--19. "DREDCTRL,Data Reduction Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x74 12.--15. "RESSTREG,Result Store Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 8. "RESSTTAR,Result Store Target" "0,1" bitfld.long 0x74 6. "BOUNDRS,Boundary Range Selection" "0,1" bitfld.long 0x74 5. "BOUNDDR,Discard Result out of Boundary" "0,1" bitfld.long 0x74 3.--4. "BOUNDSEL,Function Boundary Mode Selection" "0,1,2,3" bitfld.long 0x74 2. "SYNCREQ,Synchronization Request" "0,1" newline bitfld.long 0x74 0.--1. "CHINTMODE,Channel Interruption Mode" "0,1,2,3" group.long ad:0xB0010488++0x3F line.long 0x00 "RESCTRL0,Result z Control Register (z=0~15)" bitfld.long 0x00 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x00 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x04 "RESCTRL1,Result z Control Register (z=0~15)" bitfld.long 0x04 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x04 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x04 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x08 "RESCTRL2,Result z Control Register (z=0~15)" bitfld.long 0x08 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x08 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x08 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x0C "RESCTRL3,Result z Control Register (z=0~15)" bitfld.long 0x0C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x0C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x0C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x10 "RESCTRL4,Result z Control Register (z=0~15)" bitfld.long 0x10 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x10 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x10 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x14 "RESCTRL5,Result z Control Register (z=0~15)" bitfld.long 0x14 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x14 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x14 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x18 "RESCTRL6,Result z Control Register (z=0~15)" bitfld.long 0x18 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x18 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x18 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x1C "RESCTRL7,Result z Control Register (z=0~15)" bitfld.long 0x1C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x1C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x1C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x20 "RESCTRL8,Result z Control Register (z=0~15)" bitfld.long 0x20 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x20 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x20 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x24 "RESCTRL9,Result z Control Register (z=0~15)" bitfld.long 0x24 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x24 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x24 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x28 "RESCTRL10,Result z Control Register (z=0~15)" bitfld.long 0x28 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x28 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x28 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x2C "RESCTRL11,Result z Control Register (z=0~15)" bitfld.long 0x2C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x2C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x2C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x30 "RESCTRL12,Result z Control Register (z=0~15)" bitfld.long 0x30 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x30 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x30 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x34 "RESCTRL13,Result z Control Register (z=0~15)" bitfld.long 0x34 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x34 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x34 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x38 "RESCTRL14,Result z Control Register (z=0~15)" bitfld.long 0x38 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x38 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x38 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" line.long 0x3C "RESCTRL15,Result z Control Register (z=0~15)" bitfld.long 0x3C 8. "NRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x3C 4. "RESALI,Result Alignment" "0,1" bitfld.long 0x3C 0. "WFRMODE,Wait-for-Read Mode Enable" "0,1" rgroup.long ad:0xB00104C8++0x7F line.long 0x00 "RESULT0,Result Register (z=0~15)" bitfld.long 0x00 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x00 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x00 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x04 "RESULT1,Result Register (z=0~15)" bitfld.long 0x04 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x04 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x04 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x04 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x08 "RESULT2,Result Register (z=0~15)" bitfld.long 0x08 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x08 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x08 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x08 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x0C "RESULT3,Result Register (z=0~15)" bitfld.long 0x0C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x0C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x0C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x10 "RESULT4,Result Register (z=0~15)" bitfld.long 0x10 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x10 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x10 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x10 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x14 "RESULT5,Result Register (z=0~15)" bitfld.long 0x14 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x14 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x14 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x14 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x18 "RESULT6,Result Register (z=0~15)" bitfld.long 0x18 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x18 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x18 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x18 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x1C "RESULT7,Result Register (z=0~15)" bitfld.long 0x1C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x1C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x1C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x1C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x20 "RESULT8,Result Register (z=0~15)" bitfld.long 0x20 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x20 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x20 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x20 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x24 "RESULT9,Result Register (z=0~15)" bitfld.long 0x24 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x24 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x24 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x24 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x28 "RESULT10,Result Register (z=0~15)" bitfld.long 0x28 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x28 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x28 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x28 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x2C "RESULT11,Result Register (z=0~15)" bitfld.long 0x2C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x2C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x2C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x2C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x30 "RESULT12,Result Register (z=0~15)" bitfld.long 0x30 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x30 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x30 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x30 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x34 "RESULT13,Result Register (z=0~15)" bitfld.long 0x34 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x34 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x34 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x34 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x38 "RESULT14,Result Register (z=0~15)" bitfld.long 0x38 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x38 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x38 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x38 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x3C "RESULT15,Result Register (z=0~15)" bitfld.long 0x3C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x3C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x3C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x3C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x40 "RESULTD0,Result Debug Register (z=0~15)" bitfld.long 0x40 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x40 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x40 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x40 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x44 "RESULTD1,Result Debug Register (z=0~15)" bitfld.long 0x44 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x44 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x44 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x44 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x48 "RESULTD2,Result Debug Register (z=0~15)" bitfld.long 0x48 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x48 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x48 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x48 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x4C "RESULTD3,Result Debug Register (z=0~15)" bitfld.long 0x4C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x4C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x4C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x4C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x50 "RESULTD4,Result Debug Register (z=0~15)" bitfld.long 0x50 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x50 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x50 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x50 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x54 "RESULTD5,Result Debug Register (z=0~15)" bitfld.long 0x54 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x54 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x54 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x54 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x58 "RESULTD6,Result Debug Register (z=0~15)" bitfld.long 0x58 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x58 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x58 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x58 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x5C "RESULTD7,Result Debug Register (z=0~15)" bitfld.long 0x5C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x5C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x5C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x5C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x60 "RESULTD8,Result Debug Register (z=0~15)" bitfld.long 0x60 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x60 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x60 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x60 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x64 "RESULTD9,Result Debug Register (z=0~15)" bitfld.long 0x64 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x64 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x64 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x64 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x68 "RESULTD10,Result Debug Register (z=0~15)" bitfld.long 0x68 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x68 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x68 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x68 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x6C "RESULTD11,Result Debug Register (z=0~15)" bitfld.long 0x6C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x6C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x6C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x6C 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x70 "RESULTD12,Result Debug Register (z=0~15)" bitfld.long 0x70 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x70 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x70 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x70 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x74 "RESULTD13,Result Debug Register (z=0~15)" bitfld.long 0x74 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x74 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x74 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x74 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x78 "RESULTD14,Result Debug Register (z=0~15)" bitfld.long 0x78 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x78 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x78 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x78 0.--15. 1. "CONRESULT,Conversion Result" line.long 0x7C "RESULTD15,Result Debug Register (z=0~15)" bitfld.long 0x7C 24. "VFLAG,Valid Flag" "0,1" bitfld.long 0x7C 21.--22. "CONREQS,Conversion Request Source" "0,1,2,3" bitfld.long 0x7C 16.--20. "CHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x7C 0.--15. 1. "CONRESULT,Conversion Result" group.long ad:0xB0010548++0x0B line.long 0x00 "CINTCTRL,Channel Interruption Control Register" bitfld.long 0x00 30.--31. "CMASK,Channel Interruption Mask" "0,1,2,3" bitfld.long 0x00 11. "CINT11,Channel Interruption Flag for Channel 11" "0,1" bitfld.long 0x00 10. "CINT10,Channel Interruption Flag for Channel 10" "0,1" bitfld.long 0x00 9. "CINT9,Channel Interruption Flag for Channel 9" "0,1" bitfld.long 0x00 8. "CINT8,Channel Interruption Flag for Channel 8" "0,1" bitfld.long 0x00 7. "CINT7,Channel Interruption Flag for Channel 7" "0,1" newline bitfld.long 0x00 6. "CINT6,Channel Interruption Flag for Channel 6" "0,1" bitfld.long 0x00 5. "CINT5,Channel Interruption Flag for Channel 5" "0,1" bitfld.long 0x00 4. "CINT4,Channel Interruption Flag for Channel 4" "0,1" bitfld.long 0x00 3. "CINT3,Channel Interruption Flag for Channel 3" "0,1" bitfld.long 0x00 2. "CINT2,Channel Interruption Flag for Channel 2" "0,1" bitfld.long 0x00 1. "CINT1,Channel Interruption Flag for Channel 1" "0,1" newline bitfld.long 0x00 0. "CINT0,Channel Interruption Flag for Channel 0" "0,1" line.long 0x04 "RINTCTRL,Result Interruption Control Register" bitfld.long 0x04 30.--31. "RMASK,Result Interruption Mask" "0,1,2,3" bitfld.long 0x04 15. "RINT15,Result Interruption Flag for RESULT 15" "0,1" bitfld.long 0x04 14. "RINT14,Result Interruption Flag for RESULT 14" "0,1" bitfld.long 0x04 13. "RINT13,Result Interruption Flag for RESULT 13" "0,1" bitfld.long 0x04 12. "RINT12,Result Interruption Flag for RESULT 12" "0,1" bitfld.long 0x04 11. "RINT11,Result Interruption Flag for RESULT 11" "0,1" newline bitfld.long 0x04 10. "RINT10,Result Interruption Flag for RESULT 10" "0,1" bitfld.long 0x04 9. "RINT9,Result Interruption Flag for RESULT 9" "0,1" bitfld.long 0x04 8. "RINT8,Result Interruption Flag for RESULT 8" "0,1" bitfld.long 0x04 7. "RINT7,Result Interruption Flag for RESULT 7" "0,1" bitfld.long 0x04 6. "RINT6,Result Interruption Flag for RESULT 6" "0,1" bitfld.long 0x04 5. "RINT5,Result Interruption Flag for RESULT 5" "0,1" newline bitfld.long 0x04 4. "RINT4,Result Interruption Flag for RESULT 4" "0,1" bitfld.long 0x04 3. "RINT3,Result Interruption Flag for RESULT 3" "0,1" bitfld.long 0x04 2. "RINT2,Result Interruption Flag for RESULT 2" "0,1" bitfld.long 0x04 1. "RINT1,Result Interruption Flag for RESULT 1" "0,1" bitfld.long 0x04 0. "RINT0,Result Interruption Flag for RESULT 0" "0,1" line.long 0x08 "SINTCTRL,Source Interruption Control Register" bitfld.long 0x08 30.--31. "SMASK,Source Interruption Mask" "0,1,2,3" bitfld.long 0x08 2. "SINT2,Source Interruption Flag for Queue 2" "0,1" bitfld.long 0x08 1. "SINT1,Source Interruption Flag for Queue 1" "0,1" bitfld.long 0x08 0. "SINT0,Source Interruption Flag for Queue 0" "0,1" wgroup.long ad:0xB0010554++0x0B line.long 0x00 "CINTCLR,Channel Interruption Clear Register" bitfld.long 0x00 11. "CCLR11,Channel 11 Interruption Flag Clear" "0,1" bitfld.long 0x00 10. "CCLR10,Channel 10 Interruption Flag Clear" "0,1" bitfld.long 0x00 9. "CCLR9,Channel 9 Interruption Flag Clear" "0,1" bitfld.long 0x00 8. "CCLR8,Channel 8 Interruption Flag Clear" "0,1" bitfld.long 0x00 7. "CCLR7,Channel 7 Interruption Flag Clear" "0,1" bitfld.long 0x00 6. "CCLR6,Channel 6 Interruption Flag Clear" "0,1" newline bitfld.long 0x00 5. "CCLR5,Channel 5 Interruption Flag Clear" "0,1" bitfld.long 0x00 4. "CCLR4,Channel 4 Interruption Flag Clear" "0,1" bitfld.long 0x00 3. "CCLR3,Channel 3 Interruption Flag Clear" "0,1" bitfld.long 0x00 2. "CCLR2,Channel 2 Interruption Flag Clear" "0,1" bitfld.long 0x00 1. "CCLR1,Channel 1 Interruption Flag Clear" "0,1" bitfld.long 0x00 0. "CCLR0,Channel 0 Interruption Flag Clear" "0,1" line.long 0x04 "RINTCLR,Result Interruption Clear Register" bitfld.long 0x04 15. "RCLR15,Result 15 Interruption Flag Clear" "0,1" bitfld.long 0x04 14. "RCLR14,Result 14 Interruption Flag Clear" "0,1" bitfld.long 0x04 13. "RCLR13,Result 13 Interruption Flag Clear" "0,1" bitfld.long 0x04 12. "RCLR12,Result 12 Interruption Flag Clear" "0,1" bitfld.long 0x04 11. "RCLR11,Result 11 Interruption Flag Clear" "0,1" bitfld.long 0x04 10. "RCLR10,Result 10 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 9. "RCLR9,Result 9 Interruption Flag Clear" "0,1" bitfld.long 0x04 8. "RCLR8,Result 8 Interruption Flag Clear" "0,1" bitfld.long 0x04 7. "RCLR7,Result 7 Interruption Flag Clear" "0,1" bitfld.long 0x04 6. "RCLR6,Result 6 Interruption Flag Clear" "0,1" bitfld.long 0x04 5. "RCLR5,Result 5 Interruption Flag Clear" "0,1" bitfld.long 0x04 4. "RCLR4,Result 4 Interruption Flag Clear" "0,1" newline bitfld.long 0x04 3. "RCLR3,Result 3 Interruption Flag Clear" "0,1" bitfld.long 0x04 2. "RCLR2,Result 2 Interruption Flag Clear" "0,1" bitfld.long 0x04 1. "RCLR1,Result 1 Interruption Flag Clear" "0,1" bitfld.long 0x04 0. "RCLR0,Result 0 Interruption Flag Clear" "0,1" line.long 0x08 "SINTCLR,Queue Interruption Clear Register" bitfld.long 0x08 2. "SCLR2,Queue 2 Interruption Flag Clear" "0,1" bitfld.long 0x08 1. "SCLR1,Queue 1 Interruption Flag Clear" "0,1" bitfld.long 0x08 0. "SCLR0,Queue 0 Interruption Flag Clear" "0,1" group.long ad:0xB0010560++0x13 line.long 0x00 "CINTNP0,Channel Interruption Node Pointer 0 Register" bitfld.long 0x00 28.--31. "CINT7NP,Channel 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "CINT6NP,Channel 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "CINT5NP,Channel 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "CINT4NP,Channel 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "CINT3NP,Channel 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "CINT2NP,Channel 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 4.--7. "CINT1NP,Channel 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CINT0NP,Channel 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "CINTNP1,Channel Interruption Node Pointer 1 Register" bitfld.long 0x04 12.--15. "CINT11NP,Channel 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 8.--11. "CINT10NP,Channel 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--7. "CINT9NP,Channel 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. "CINT8NP,Channel 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "RINTNP0,Result Interruption Node Pointer 0 Register" bitfld.long 0x08 28.--31. "RINT7NP,Result 7 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. "RINT6NP,Result 6 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. "RINT5NP,Result 5 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. "RINT4NP,Result 4 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12.--15. "RINT3NP,Result 3 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. "RINT2NP,Result 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 4.--7. "RINT1NP,Result 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--3. "RINT0NP,Result 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "RINTNP1,Result Interruption Node Pointer 1 Register" bitfld.long 0x0C 28.--31. "RINT15NP,Result 15 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 24.--27. "RINT14NP,Result 14 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 20.--23. "RINT13NP,Result 13 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. "RINT12NP,Result 12 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 12.--15. "RINT11NP,Result 11 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 8.--11. "RINT10NP,Result 10 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x0C 4.--7. "RINT9NP,Result 9 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. "RINT8NP,Result 8 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SINTNP,Source Interruption Node Pointer Register" bitfld.long 0x10 8.--11. "SINT2NP,Source 2 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 4.--7. "SINT1NP,Source 1 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. "SINT0NP,Source 0 Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xB0010574++0x03 line.long 0x00 "STRIINT,Software Trigger Interruption Register" bitfld.long 0x00 11. "SASINT3,Software Activate Common Shared Interruption 3" "0,1" bitfld.long 0x00 10. "SASINT2,Software Activate Common Shared Interruption 2" "0,1" bitfld.long 0x00 9. "SASINT1,Software Activate Common Shared Interruption 1" "0,1" bitfld.long 0x00 8. "SASINT0,Software Activate Common Shared Interruption 0" "0,1" bitfld.long 0x00 3. "SAGINT3,Software Activate Group Interruption 3" "0,1" bitfld.long 0x00 2. "SAGINT2,Software Activate Group Interruption 2" "0,1" newline bitfld.long 0x00 1. "SAGINT1,Software Activate Group Interruption 1" "0,1" bitfld.long 0x00 0. "SAGINT0,Software Activate Group Interruption 0" "0,1" group.long ad:0xB0010578++0x0B line.long 0x00 "ALIASCH,Alias Channel Register" bitfld.long 0x00 0.--4. "ALIASCH,Alias Channel for CH0 Conversion" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "DMAEN,DMA Enable Control Register" bitfld.long 0x04 15. "DMAEN15,DMA enable for RESULT15" "0,1" bitfld.long 0x04 14. "DMAEN14,DMA enable for RESULT 14" "0,1" bitfld.long 0x04 13. "DMAEN13,DMA enable for RESULT 13" "0,1" bitfld.long 0x04 12. "DMAEN12,DMA enable for RESULT 12" "0,1" bitfld.long 0x04 11. "DMAEN11,DMA enable for RESULT 11" "0,1" bitfld.long 0x04 10. "DMAEN10,DMA enable for RESULT 10" "0,1" newline bitfld.long 0x04 9. "DMAEN9,DMA enable for RESULT 9" "0,1" bitfld.long 0x04 8. "DMAEN8,DMA enable for RESULT 8" "0,1" bitfld.long 0x04 7. "DMAEN7,DMA enable for RESULT 7" "0,1" bitfld.long 0x04 6. "DMAEN6,DMA enable for RESULT 6" "0,1" bitfld.long 0x04 5. "DMAEN5,DMA enable for RESULT 5" "0,1" bitfld.long 0x04 4. "DMAEN4,DMA enable for RESULT 4" "0,1" newline bitfld.long 0x04 3. "DMAEN3,DMA enable for RESULT 3" "0,1" bitfld.long 0x04 2. "DMAEN2,DMA enable for RESULT 2" "0,1" bitfld.long 0x04 1. "DMAEN1,DMA enable for RESULT 1" "0,1" bitfld.long 0x04 0. "DMAEN0,DMA enable for RESULT 0" "0,1" line.long 0x08 "ANCONFIG,Analog Configuration Register" bitfld.long 0x08 0. "COMPCRT,Trim Factor of Comparator" "0,1" rgroup.long ad:0xB0010584++0x0B line.long 0x00 "QFIFO0,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x00 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x00 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x00 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "QFIFO1,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x04 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x04 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x04 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x08 "QFIFO2,Queue x FIFO Status Register (x=0-2)" bitfld.long 0x08 6. "FULL,FIFO Full Flag" "0,1" bitfld.long 0x08 5. "EMPTY,FIFO Empty Flag" "0,1" bitfld.long 0x08 0.--4. "COUNT,FIFO Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xB0010594++0x07 line.long 0x00 "FAULTIN,Safety Fault Input Register" bitfld.long 0x00 10.--11. "DAISYDFI,DAISY Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 8.--9. "SYNCDFI,SYNC Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 6.--7. "GATEDFI,Gate Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 4.--5. "FTFI,Feedback Timeout Fault Input" "0,1,2,3" bitfld.long 0x00 2.--3. "TRIDFI,Trigger Signal Monitor Detection Fault Input" "0,1,2,3" bitfld.long 0x00 0.--1. "DRFI,DFF Redundancy Fault Input" "0,1,2,3" line.long 0x04 "SAFEEN,Safety Enable Register" bitfld.long 0x04 30.--31. "BEMASK,Bus Error Mask Control" "0,1,2,3" bitfld.long 0x04 12.--13. "DAISYDSE,DAISY Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 10.--11. "SYNCDSE,SYNC Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 8.--9. "GATEDSE,Gate Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 6.--7. "BDSE,Boundary Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 4.--5. "DTSE,DMA Timeout Safety Enable" "0,1,2,3" newline bitfld.long 0x04 2.--3. "TRIDSE,Trigger Signal Monitor Detection Safety Enable" "0,1,2,3" bitfld.long 0x04 0.--1. "DRSE,DFF Redundancy Safety Enable" "0,1,2,3" rgroup.long ad:0xB001059C++0x03 line.long 0x00 "SAFEALM,Safety Alarm Register" bitfld.long 0x00 20. "DMALOSEALM,DMA Request Lose Alarm" "0,1" bitfld.long 0x00 19. "GLORESCTRLALM,GLORESCTRL Redundancy Alarm" "0,1" bitfld.long 0x00 18. "GLORESULTALM,GLORESULT Redundancy Alarm" "0,1" bitfld.long 0x00 17. "ALARMCLRALM,ALARMCLR Redundancy Alarm" "0,1" bitfld.long 0x00 16. "SAFEENALM,SAFEEN Redundancy Alarm" "0,1" bitfld.long 0x00 15. "FAULTINALM,FAULTIN Redundancy Alarm" "0,1" newline bitfld.long 0x00 14. "ANCONFIGALM,ANCONFIG Redundancy Alarm" "0,1" bitfld.long 0x00 13. "RESULTALM,RESULTz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 12. "RESCTRLALM,RESCTRLz(z = 0~15) Redundancy Alarm" "0,1" bitfld.long 0x00 11. "CHCTRLALM,CHCTRLy(y = 0~11) Redundancy Alarm" "0,1" bitfld.long 0x00 10. "QINCFGALM,QINCFGx(x = 0~2) Redundancy Alarm" "0,1" bitfld.long 0x00 9. "ARBCTRLALM,ARBCTRL Redundancy Alarm" "0,1" newline bitfld.long 0x00 8. "ANACFGALM,ANACFG Redundancy Alarm" "0,1" bitfld.long 0x00 7. "DAITOALM,Daisy Chain Signal Timeout Alarm" "0,1" bitfld.long 0x00 6. "SYNTOALM,Synchronization Signal Timeout Alarm" "0,1" bitfld.long 0x00 5. "GATOALM,Gate Timeout Alarm" "0,1" bitfld.long 0x00 4. "TRITOALM,Trigger Timeout Alarm" "0,1" bitfld.long 0x00 3. "SEALM,Safety Endinit Alarm" "0,1" newline bitfld.long 0x00 2. "EALM,Endinit Alarm" "0,1" bitfld.long 0x00 1. "DMATOALM,DMA Timeout Alarm" "0,1" bitfld.long 0x00 0. "BOUNDALM,Boundary Detection Alarm" "0,1" wgroup.long ad:0xB00105A0++0x03 line.long 0x00 "SAFEALMCLR,Safety Alarm Clear Register" bitfld.long 0x00 8.--9. "ESEALMC,Endinit / Safety Endinit Alarm Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "DMATOALMC,DMA Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "BOUNDALMC,Boundary Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SMDALMC,Signal Monitor Detection Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "DRALMC,Register Redundancy Alarm Clear" "0,1,2,3" group.long ad:0xB00105A4++0x13 line.long 0x00 "SAFEBOUND,Safety Boundary Control Register" bitfld.long 0x00 30. "SAFEBOUNDDR,Discard Result out of Boundary ADC Conversion Result Handle" "0,1" hexmask.long.word 0x00 16.--27. 1. "SAFEBOUNDU,Software set upper boundary" hexmask.long.word 0x00 0.--11. 1. "SAFEBOUNDL,Software set lower boundary" line.long 0x04 "TRIGATTHRES,Trigger and Gate Monitor Threshold Register" line.long 0x08 "SYNCTHRES,Synchronization Signal Monitor Threshold Register" line.long 0x0C "DAISYTHRES,Daisy Chain Signal Monitor Threshold Register" line.long 0x10 "DMATHRES,DMA Handshake Threshold Register" group.long ad:0xB0010600++0x03 line.long 0x00 "GLOINTCTRL,Global Interruption Control Register" bitfld.long 0x00 30.--31. "GMASK,Global Result Interruption Mask" "0,1,2,3" bitfld.long 0x00 16.--19. "GRINTNP,Global Result Interruption Node Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. "GCLR,Global Result Interruption Clear" "0,1" bitfld.long 0x00 0. "GINT,Global Result Interruption Flag" "0,1" rgroup.long ad:0xB0010604++0x07 line.long 0x00 "GLORESULT,Global Result Register" bitfld.long 0x00 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x00 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x00 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--15. 1. "GCONRESULT,Conversion Result" line.long 0x04 "GLORESULTD,Global Result Debug Register" bitfld.long 0x04 31. "GVFLAG,Global Valid Flag" "0,1" bitfld.long 0x04 28.--29. "GCONREQS,Converted Request Source" "0,1,2,3" bitfld.long 0x04 20.--24. "GCHNUM,Channel Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--19. "GNUM,Group Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--15. 1. "GCONRESULT,Conversion Result" group.long ad:0xB001060C++0x0B line.long 0x00 "GLORESCTRL,Global Result Control Register" bitfld.long 0x00 8. "GNRINTEN,New Result Interruption Enable" "0,1" bitfld.long 0x00 4. "GWFRMODE,Wait-for-Read Mode Enable" "0,1" bitfld.long 0x00 0. "GRESALI,Result Format Alignment" "0,1" line.long 0x04 "GLODMA,Global DMA Enable Control Register" bitfld.long 0x04 0. "GDMAEN,Global DMA Enable Control" "0,1" line.long 0x08 "GLOFUNBOUND,Global Functional Bound Control Register" hexmask.long.word 0x08 16.--27. 1. "GBOUNDU,Software Set Upper Boundary" hexmask.long.word 0x08 0.--11. 1. "GBOUNDL,Software Set Lower Boundary" tree.end tree.end tree "Global Registers" group.long ad:0xB0002084++0x03 line.long 0x00 "GLOBCRC,Global Channel Run Control Register" bitfld.long 0x00 16.--19. "MnRUNCTL,Modulator n Run Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CHnRUNCTL,Channel n Run Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xB0002088++0x03 line.long 0x00 "GLOBEVSF,Event Status Register" bitfld.long 0x00 19. "ALEVF3,Channel n alarm event" "0,1" bitfld.long 0x00 18. "ALEVF2,Channel n alarm event" "0,1" bitfld.long 0x00 17. "ALEVF1,Channel n alarm event" "0,1" bitfld.long 0x00 16. "ALEVF0,Channel n alarm event" "0,1" bitfld.long 0x00 3. "RESEVF3,Channel n Result Event" "0,1" bitfld.long 0x00 2. "RESEVF2,Channel n Result Event" "0,1" bitfld.long 0x00 1. "RESEVF1,Channel n Result Event" "0,1" bitfld.long 0x00 0. "RESEVF0,Channel n Result Event" "0,1" group.long ad:0xB000208C++0x07 line.long 0x00 "GLOBEVSFCLR,Event Status Clear Register" bitfld.long 0x00 19. "ALECLR3,Alarm Event Clear" "0,1" bitfld.long 0x00 18. "ALECLR2,Alarm Event Clear" "0,1" bitfld.long 0x00 17. "ALECLR1,Alarm Event Clear" "0,1" bitfld.long 0x00 16. "ALECLR0,Alarm Event Clear" "0,1" bitfld.long 0x00 3. "RESECLR3,Result Event Clear" "0,1" bitfld.long 0x00 2. "RESECLR2,Result Event Clear" "0,1" bitfld.long 0x00 1. "RESECLR1,Result Event Clear" "0,1" bitfld.long 0x00 0. "RESECLR0,Result Event Clear" "0,1" line.long 0x04 "CLOBSYNC,Global Synchronization Register" bitfld.long 0x04 21. "INTEREN,Integrator Enable" "0,1" bitfld.long 0x04 20. "SYNCSWITCH,DSADC Synchronization Mode" "0,1" bitfld.long 0x04 8.--11. "ACHnEN,Auxiliary Channel n Enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0.--3. "MCHnEN,Main Channel n Enable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "DSADC" tree "DSADC0" group.long ad:0xB0002000++0x0B line.long 0x00 "MODCFG,Modulator Configuration Register" bitfld.long 0x00 21. "MPSWP,Write Protection for Modulator Pattern Settings" "0,1" bitfld.long 0x00 20. "APC,Automatic Power Control" "0,1" bitfld.long 0x00 16.--19. "FDIVC,Frequency Divider Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 15. "INPWP,Write Protection for Input Parameters" "0,1" bitfld.long 0x00 14. "INMCC,Input Multiplexer Changing Control" "0,1" bitfld.long 0x00 12.--13. "INMCP,Input Multiplexer Control Pattern" "0,1,2,3" bitfld.long 0x00 11. "DIFFPC,Differential Pattern Control Signal" "0,1" newline rbitfld.long 0x00 10. "INMUXS,Input Multiplexer Setting" "0,1" bitfld.long 0x00 8. "INPSEL,Input Pin Selection" "0,1" bitfld.long 0x00 4.--6. "PGAGSEL,Gain Select of Analog Input Path" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. "NINEN,Negative Input Enable" "0,1" bitfld.long 0x00 2. "PINEN,Positive Input Enable" "0,1" bitfld.long 0x00 1. "NINSET,Setting of Negative Input Line" "0,1" bitfld.long 0x00 0. "PINSET,Setting of Positive Input Line" "0,1" line.long 0x04 "DEMICFG,Demodulator Input Configuration Register" bitfld.long 0x04 13. "FIFOBYPASS,FIFO Bypass" "0,1" bitfld.long 0x04 11. "RSTADC,ADC Loop Reset Signal" "0,1" bitfld.long 0x04 8. "MSWP,Write Protection for Mode Settings" "0,1" bitfld.long 0x04 7. "RDP,Result Display Pattern" "0,1" bitfld.long 0x04 6. "TSP,Time-Stamp Pattern" "0,1" bitfld.long 0x04 4.--5. "TSTRP,Timestamp Trigger Pattern" "0,1,2,3" bitfld.long 0x04 0.--3. "TRGSEL,Trigger Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CPVCFG,Common Voltage Configuration Register" bitfld.long 0x08 21. "INNVCB,Common-Mode Voltage Input Control of B" "0,1" bitfld.long 0x08 20. "INNVCA,Common-Mode Voltage Input Control of A" "0,1" bitfld.long 0x08 4. "VXEN,Common-Mode Voltage Enable" "0,1" group.long ad:0xB0002010++0x03 line.long 0x00 "RFCON,Result FIFO Control Register" rbitfld.long 0x00 20. "WREF,Write Error Flag" "0,1" rbitfld.long 0x00 19. "RDEF,Read Error Flag" "0,1" rbitfld.long 0x00 16.--18. "FILLVAL,FIFO Fill Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "FICLR,FIFO Clear" "0,1" bitfld.long 0x00 5. "WRECLR,Write Error Flag Clear" "0,1" bitfld.long 0x00 4. "RDECLR,Read Error Flag Clear" "0,1" bitfld.long 0x00 0.--1. "SRLVAL,Service Request FIFO Value" "0,1,2,3" rgroup.long ad:0xB0002014++0x07 line.long 0x00 "MCRES,Main Conversion Result Register" hexmask.long.word 0x00 0.--15. 1. "MCRES,Main Conversion Result Value" line.long 0x04 "TSTMP,Time-Stamp Register" bitfld.long 0x04 18. "TSVF,Timestamp Valid Flag" "0,1" bitfld.long 0x04 16. "AMSET,Analog Multiplexer Setting" "0,1" hexmask.long.word 0x04 0.--15. 1. "TSTMPVAL,Recent Captured Timestamp Value" group.long ad:0xB000201C++0x13 line.long 0x00 "TSCNT,Time-Stamp Counter Register" bitfld.long 0x00 19. "AMSCEN,Analog Multiplexer Enable" "0,1" bitfld.long 0x00 18. "TSCSC,Timestamp Counter Start Control" "0,1" bitfld.long 0x00 16.--17. "TSCCS,Timestamp Counter Clock Selection" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. "TSCVAL,Timestamp Counter Value" line.long 0x04 "MFCFG,Main Filter Configuration Register" bitfld.long 0x04 29.--31. "OCENCFG,Offset Compensation Filter Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x04 27.--28. "FIR1OSF,FIR1 Output Shift" "0,1,2,3" bitfld.long 0x04 26. "FIR0OSF,FIR0 Output Shift" "0,1" bitfld.long 0x04 25. "FIR1FEN,FIR1 Filter Enable" "0,1" bitfld.long 0x04 24. "FIR0FEN,FIR0 Filter Enable" "0,1" bitfld.long 0x04 23. "DCOFEN,DC Offset Enable" "0,1" bitfld.long 0x04 21. "FIR1DEC,FIR0 Filter Decimation Rate" "0,1" newline bitfld.long 0x04 20. "FIR0DEC,FIR1 Filter Decimation Rate" "0,1" bitfld.long 0x04 18.--19. "MAGCS,Main Alarm Generation Condition Selection" "0,1,2,3" bitfld.long 0x04 16.--17. "MGSRC,Main Generation Service Request Configuration" "0,1,2,3" bitfld.long 0x04 15. "MEANBYPASS,Mean Bypass" "0,1" bitfld.long 0x04 10.--14. "MCGSL,Main CIC Gain Shift Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--9. "MCPS,Main CIC Parallel Series Selection" "0,1,2,3" hexmask.long.byte 0x04 1.--7. 1. "MCFSF,Main CIC Filter Sampling Factor" newline bitfld.long 0x04 0. "MCFEN,Main CIC Filter Enable" "0,1" line.long 0x08 "AFCFG,Auxiliary Filter Configuration Register" bitfld.long 0x08 18.--19. "AAGCS,Auxiliary Alarm Generation Condition Selection" "0,1,2,3" bitfld.long 0x08 16.--17. "AGSRC,Auxiliary Generation Service Request Configuration" "0,1,2,3" bitfld.long 0x08 10.--14. "ACGSL,Auxiliary CIC Gain Shift Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8.--9. "ACPS,Auxiliary CIC Parallel Series Selection" "0,1,2,3" bitfld.long 0x08 1.--5. "ACFDF,Auxiliary CIC Filter Sampling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0. "ACFEN,Auxiliary CIC Filter Enable" "0,1" line.long 0x0C "GAINCTR,Gain Offset Ctrl Register" bitfld.long 0x0C 19. "DCOCEN,Offset Calibration Enable" "0,1" bitfld.long 0x0C 16.--18. "GAINOFFCTRL,Gain Offset Control Offset" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0C 1.--8. 1. "GAINOFF,Gain Offset Value" bitfld.long 0x0C 0. "GAINOFFEN,Fine Gain Offset Enable" "0,1" line.long 0x10 "THRESLM,Threshold Check Limit Register" hexmask.long.word 0x10 16.--31. 1. "TCLL,Threshold Check Lower limit" hexmask.long.word 0x10 0.--15. 1. "TCUL,Threshold Check Upper limit" rgroup.long ad:0xB0002030++0x03 line.long 0x00 "ACRES,Auxiliary Channel Result" hexmask.long.word 0x00 0.--15. 1. "ACRES,Auxiliary Conversion Result Value" group.long ad:0xB0002034++0x07 line.long 0x00 "INTEN,Interrupt Enable Register" bitfld.long 0x00 11. "DMAREAIE,Auxiliary DMA Transition Completes Request Enable" "0,1" bitfld.long 0x00 10. "DMATSTMPIE,DMA Timestamp Request Enable" "0,1" bitfld.long 0x00 9. "DMATRIGIE,DMA External Trigger Request Enable" "0,1" bitfld.long 0x00 8. "DMAFIFOIE,DMA FIFO Request Enable" "0,1" bitfld.long 0x00 7. "REAIE,Auxiliary Conversion Completes Interrupt Enable" "0,1" bitfld.long 0x00 6. "SBAIE,Auxiliary Result Below Lower Limit Interrupt Enable" "0,1" bitfld.long 0x00 5. "SAAIE,Auxiliary Result Above Upper Limit Interrupt Enable" "0,1" newline bitfld.long 0x00 4. "TSTMPIE,Timestamp Interrupt Enable" "0,1" bitfld.long 0x00 3. "SBMIE,Main Result Below Lower Limit Interrupt Enable" "0,1" bitfld.long 0x00 2. "SAMIE,Main Result Above Upper Limit Interrupt Enable" "0,1" bitfld.long 0x00 1. "FIFOFILLIE,The Quantity of FIFO Data Reaches Threshold Interrupt Enable" "0,1" bitfld.long 0x00 0. "TRIGIE,External Trigger Interrupt Enable" "0,1" line.long 0x04 "INTCLR,Interrupt Clear Register" bitfld.long 0x04 7. "REACLR,Auxiliary Conversion Completes Interrupt Clear" "0,1" bitfld.long 0x04 6. "SBACLR,Auxiliary Result Below Lower Limit Interrupt Clear" "0,1" bitfld.long 0x04 5. "SAACLR,Auxiliary Result Above Upper Limit Interrupt Clear" "0,1" bitfld.long 0x04 4. "TSTMPCLR,Timestamp Interrupt Clear" "0,1" bitfld.long 0x04 3. "SBMCLR,Main Result Below Lower Limit Interrupt Clear" "0,1" bitfld.long 0x04 2. "SAMCLR,Main Result Above Upper Limit Interrupt Clear" "0,1" bitfld.long 0x04 1. "FIFOFILLCLR,FIFO Data Reaches Threshold Interrupt Clear" "0,1" newline bitfld.long 0x04 0. "TRIGCLR,External Trigger Interrupt Clear" "0,1" rgroup.long ad:0xB000203C++0x03 line.long 0x00 "INTSTS,Interrupt Status Register" bitfld.long 0x00 7. "REAST,Auxiliary Conversion Completes Interrupt Status" "0,1" bitfld.long 0x00 6. "SBAST,Auxiliary Result Below Lower Limit Interrupt Status" "0,1" bitfld.long 0x00 5. "SAAST,Auxiliary Result Above Upper Limit Interrupt Status" "0,1" bitfld.long 0x00 4. "TSTMPST,Timestamp Interrupt Status" "0,1" bitfld.long 0x00 3. "SBMST,Main Result Below Lower Limit Interrupt Status" "0,1" bitfld.long 0x00 2. "SAMST,Main Result Above Upper Limit Interrupt Status" "0,1" bitfld.long 0x00 1. "FIFOFILLST,FIFO Data Reaches Threshold Interrupt Status" "0,1" newline bitfld.long 0x00 0. "TRIGST,External Trigger Interrupt Status" "0,1" group.long ad:0xB0002040++0x0B line.long 0x00 "TESTCFG,Test Configuration Register" bitfld.long 0x00 0.--2. "TESTSEL,Common Mode Test Voltage Output Control" "0,1,2,3,4,5,6,7" line.long 0x04 "COMP,Compensation Register" hexmask.long.word 0x04 16.--31. 1. "DCOFFSET,DC Compensation Offset" hexmask.long.word 0x04 0.--15. 1. "GCOFFSET,Gain Compensation Offset" line.long 0x08 "SMEN,Safety Mechanism Enable Register" bitfld.long 0x08 8.--9. "TRIGSMEN,Trigger Timeout Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 6.--7. "DMASMEN,DMA Timeout Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 4.--5. "DASMEN,Data Exceed Threshold Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 2.--3. "FISMEN,FIFO Write Full or Read Empty Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 0.--1. "REGSMEN,Register Redundancy Safety Mechanism Enable" "0,1,2,3" wgroup.long ad:0xB000204C++0x03 line.long 0x00 "ALACLR,Alarm Clear Register" bitfld.long 0x00 10.--11. "SEACLR,Write E/Se Register Without Unlock E/SE Protect Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 8.--9. "TRIGACLR,Trigger Timeout Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "DMAACLR,DMA Timeout Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "DAACLR,Data Exceed Threshold Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "FIACLR,FIFO Write Full or Read Empty Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "REGACLR,Register Redundancy Alarm Status Clear" "0,1,2,3" rgroup.long ad:0xB0002050++0x03 line.long 0x00 "ALASTS,Alarm Status Register" bitfld.long 0x00 8. "SEAST,Write E/Se Register Without Unlock E/Se Protect Alarm Status" "0,1" bitfld.long 0x00 7. "TRIGAST,Trigger Timeout Alarm Status" "0,1" bitfld.long 0x00 6. "DMAAST,DMA Timeout Alarm Status" "0,1" bitfld.long 0x00 5. "DAAST,Data Exceed Threshold Alarm Status" "0,1" bitfld.long 0x00 4. "FIAST,FIFO Write Full or Read Empty Alarm Status" "0,1" bitfld.long 0x00 3. "MRESAST,Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 2. "FIREGAST,Write E/Se Register Without Unlock E/Se Protect Alarm Status" "0,1" newline bitfld.long 0x00 1. "ACLRERST,Trigger Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SMREAST,DMA Timeout Alarm Status" "0,1" group.long ad:0xB0002054++0x27 line.long 0x00 "FAIN,Fault Injection Register" bitfld.long 0x00 2.--3. "TRIGFAIN,Trigger Timeout Fault Inject" "0,1,2,3" bitfld.long 0x00 0.--1. "DMAFAIN,DMA Timeout Fault Inject" "0,1,2,3" line.long 0x04 "DMATHRES,DMA Timeout Threshold Register" line.long 0x08 "TRIGTHRES,Trigger Timeout Threshold Register" line.long 0x0C "COMPCON,Calibration Control Register" bitfld.long 0x0C 6. "CALEN,Calibrating Enable" "0,1" bitfld.long 0x0C 4.--5. "CALSELLV,Calibration Input Selection" "0,1,2,3" bitfld.long 0x0C 2.--3. "VSELLV,Calibration Voltage Selection" "0,1,2,3" bitfld.long 0x0C 1. "DCOBEN,DC Offset Bypass Enable" "0,1" bitfld.long 0x0C 0. "GCOBEN,Fine Gain Offset Bypass Enable" "0,1" line.long 0x10 "TESTMODE,Test Mode Register" bitfld.long 0x10 0. "TESTMODE,Test Mode" "0,1" line.long 0x14 "DITHEREN,Dithering Enable Register" bitfld.long 0x14 0. "DITHEREN,Dithering Mode Enable" "0,1" line.long 0x18 "CWCFG,Carrier Wave Configure Register" rbitfld.long 0x18 19. "SYNSIGNBIT,Post-synchronous excitation results" "0,1" rbitfld.long 0x18 18. "SIGNBIT,Excitation results" "0,1" rbitfld.long 0x18 13.--17. "PERINDEX,Excitation Micro-step Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x18 8.--12. "PERCYCLE,Excitation Micro-step Cycle Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 4. "CWPHICRL,Carrier Waveform Control" "0,1" bitfld.long 0x18 3. "PCMEN,PCM Mode Enable" "0,1" bitfld.long 0x18 1.--2. "MODE,Carrier Waveform Select" "0,1,2,3" newline bitfld.long 0x18 0. "EN,Excitation Enable" "0,1" line.long 0x1C "CWSYNC,Carrier Wave Sync Control Register" hexmask.long.byte 0x1C 24.--31. 1. "CNT,Delay Counter" hexmask.long.byte 0x1C 16.--23. 1. "DELAY,Delay Parameter Display" hexmask.long.byte 0x1C 8.--15. 1. "SYNCSTART,Synchronous Start Value" hexmask.long.byte 0x1C 0.--7. 1. "SYNCEND,Synchronous End value" line.long 0x20 "MEANCON,Mean Control Register" hexmask.long.byte 0x20 4.--9. 1. "LEN,Mean Points" bitfld.long 0x20 3. "MODE,Mean Mode" "0,1" bitfld.long 0x20 0.--2. "SFL,Shift Length Control" "0,1,2,3,4,5,6,7" line.long 0x24 "BUSERRMSK,Bus Error Mask Register" bitfld.long 0x24 0. "BUSERRMSK,Bus Error Mask" "0,1" group.long ad:0xB0002080++0x03 line.long 0x00 "DEBUG,Debug Configure Register" bitfld.long 0x00 6. "DBGP,Debug Suspend Pattern" "0,1" rbitfld.long 0x00 5. "SUSFLAG,Suspend Flag" "0,1" bitfld.long 0x00 4. "SUSWP,Suspend Write Protection" "0,1" bitfld.long 0x00 0.--3. "SUSCTRL,Debug Mode Suspend Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "DSADC1" group.long ad:0xB0002400++0x0B line.long 0x00 "MODCFG,Modulator Configuration Register" bitfld.long 0x00 21. "MPSWP,Write Protection for Modulator Pattern Settings" "0,1" bitfld.long 0x00 20. "APC,Automatic Power Control" "0,1" bitfld.long 0x00 16.--19. "FDIVC,Frequency Divider Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 15. "INPWP,Write Protection for Input Parameters" "0,1" bitfld.long 0x00 14. "INMCC,Input Multiplexer Changing Control" "0,1" bitfld.long 0x00 12.--13. "INMCP,Input Multiplexer Control Pattern" "0,1,2,3" bitfld.long 0x00 11. "DIFFPC,Differential Pattern Control Signal" "0,1" newline rbitfld.long 0x00 10. "INMUXS,Input Multiplexer Setting" "0,1" bitfld.long 0x00 8. "INPSEL,Input Pin Selection" "0,1" bitfld.long 0x00 4.--6. "PGAGSEL,Gain Select of Analog Input Path" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. "NINEN,Negative Input Enable" "0,1" bitfld.long 0x00 2. "PINEN,Positive Input Enable" "0,1" bitfld.long 0x00 1. "NINSET,Setting of Negative Input Line" "0,1" bitfld.long 0x00 0. "PINSET,Setting of Positive Input Line" "0,1" line.long 0x04 "DEMICFG,Demodulator Input Configuration Register" bitfld.long 0x04 13. "FIFOBYPASS,FIFO Bypass" "0,1" bitfld.long 0x04 11. "RSTADC,ADC Loop Reset Signal" "0,1" bitfld.long 0x04 8. "MSWP,Write Protection for Mode Settings" "0,1" bitfld.long 0x04 7. "RDP,Result Display Pattern" "0,1" bitfld.long 0x04 6. "TSP,Time-Stamp Pattern" "0,1" bitfld.long 0x04 4.--5. "TSTRP,Timestamp Trigger Pattern" "0,1,2,3" bitfld.long 0x04 0.--3. "TRGSEL,Trigger Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CPVCFG,Common Voltage Configuration Register" bitfld.long 0x08 21. "INNVCB,Common-Mode Voltage Input Control of B" "0,1" bitfld.long 0x08 20. "INNVCA,Common-Mode Voltage Input Control of A" "0,1" bitfld.long 0x08 4. "VXEN,Common-Mode Voltage Enable" "0,1" group.long ad:0xB0002410++0x03 line.long 0x00 "RFCON,Result FIFO Control Register" rbitfld.long 0x00 20. "WREF,Write Error Flag" "0,1" rbitfld.long 0x00 19. "RDEF,Read Error Flag" "0,1" rbitfld.long 0x00 16.--18. "FILLVAL,FIFO Fill Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "FICLR,FIFO Clear" "0,1" bitfld.long 0x00 5. "WRECLR,Write Error Flag Clear" "0,1" bitfld.long 0x00 4. "RDECLR,Read Error Flag Clear" "0,1" bitfld.long 0x00 0.--1. "SRLVAL,Service Request FIFO Value" "0,1,2,3" rgroup.long ad:0xB0002414++0x07 line.long 0x00 "MCRES,Main Conversion Result Register" hexmask.long.word 0x00 0.--15. 1. "MCRES,Main Conversion Result Value" line.long 0x04 "TSTMP,Time-Stamp Register" bitfld.long 0x04 18. "TSVF,Timestamp Valid Flag" "0,1" bitfld.long 0x04 16. "AMSET,Analog Multiplexer Setting" "0,1" hexmask.long.word 0x04 0.--15. 1. "TSTMPVAL,Recent Captured Timestamp Value" group.long ad:0xB000241C++0x13 line.long 0x00 "TSCNT,Time-Stamp Counter Register" bitfld.long 0x00 19. "AMSCEN,Analog Multiplexer Enable" "0,1" bitfld.long 0x00 18. "TSCSC,Timestamp Counter Start Control" "0,1" bitfld.long 0x00 16.--17. "TSCCS,Timestamp Counter Clock Selection" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. "TSCVAL,Timestamp Counter Value" line.long 0x04 "MFCFG,Main Filter Configuration Register" bitfld.long 0x04 29.--31. "OCENCFG,Offset Compensation Filter Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x04 27.--28. "FIR1OSF,FIR1 Output Shift" "0,1,2,3" bitfld.long 0x04 26. "FIR0OSF,FIR0 Output Shift" "0,1" bitfld.long 0x04 25. "FIR1FEN,FIR1 Filter Enable" "0,1" bitfld.long 0x04 24. "FIR0FEN,FIR0 Filter Enable" "0,1" bitfld.long 0x04 23. "DCOFEN,DC Offset Enable" "0,1" bitfld.long 0x04 21. "FIR1DEC,FIR0 Filter Decimation Rate" "0,1" newline bitfld.long 0x04 20. "FIR0DEC,FIR1 Filter Decimation Rate" "0,1" bitfld.long 0x04 18.--19. "MAGCS,Main Alarm Generation Condition Selection" "0,1,2,3" bitfld.long 0x04 16.--17. "MGSRC,Main Generation Service Request Configuration" "0,1,2,3" bitfld.long 0x04 15. "MEANBYPASS,Mean Bypass" "0,1" bitfld.long 0x04 10.--14. "MCGSL,Main CIC Gain Shift Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--9. "MCPS,Main CIC Parallel Series Selection" "0,1,2,3" hexmask.long.byte 0x04 1.--7. 1. "MCFSF,Main CIC Filter Sampling Factor" newline bitfld.long 0x04 0. "MCFEN,Main CIC Filter Enable" "0,1" line.long 0x08 "AFCFG,Auxiliary Filter Configuration Register" bitfld.long 0x08 18.--19. "AAGCS,Auxiliary Alarm Generation Condition Selection" "0,1,2,3" bitfld.long 0x08 16.--17. "AGSRC,Auxiliary Generation Service Request Configuration" "0,1,2,3" bitfld.long 0x08 10.--14. "ACGSL,Auxiliary CIC Gain Shift Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8.--9. "ACPS,Auxiliary CIC Parallel Series Selection" "0,1,2,3" bitfld.long 0x08 1.--5. "ACFDF,Auxiliary CIC Filter Sampling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0. "ACFEN,Auxiliary CIC Filter Enable" "0,1" line.long 0x0C "GAINCTR,Gain Offset Ctrl Register" bitfld.long 0x0C 19. "DCOCEN,Offset Calibration Enable" "0,1" bitfld.long 0x0C 16.--18. "GAINOFFCTRL,Gain Offset Control Offset" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0C 1.--8. 1. "GAINOFF,Gain Offset Value" bitfld.long 0x0C 0. "GAINOFFEN,Fine Gain Offset Enable" "0,1" line.long 0x10 "THRESLM,Threshold Check Limit Register" hexmask.long.word 0x10 16.--31. 1. "TCLL,Threshold Check Lower limit" hexmask.long.word 0x10 0.--15. 1. "TCUL,Threshold Check Upper limit" rgroup.long ad:0xB0002430++0x03 line.long 0x00 "ACRES,Auxiliary Channel Result" hexmask.long.word 0x00 0.--15. 1. "ACRES,Auxiliary Conversion Result Value" group.long ad:0xB0002434++0x07 line.long 0x00 "INTEN,Interrupt Enable Register" bitfld.long 0x00 11. "DMAREAIE,Auxiliary DMA Transition Completes Request Enable" "0,1" bitfld.long 0x00 10. "DMATSTMPIE,DMA Timestamp Request Enable" "0,1" bitfld.long 0x00 9. "DMATRIGIE,DMA External Trigger Request Enable" "0,1" bitfld.long 0x00 8. "DMAFIFOIE,DMA FIFO Request Enable" "0,1" bitfld.long 0x00 7. "REAIE,Auxiliary Conversion Completes Interrupt Enable" "0,1" bitfld.long 0x00 6. "SBAIE,Auxiliary Result Below Lower Limit Interrupt Enable" "0,1" bitfld.long 0x00 5. "SAAIE,Auxiliary Result Above Upper Limit Interrupt Enable" "0,1" newline bitfld.long 0x00 4. "TSTMPIE,Timestamp Interrupt Enable" "0,1" bitfld.long 0x00 3. "SBMIE,Main Result Below Lower Limit Interrupt Enable" "0,1" bitfld.long 0x00 2. "SAMIE,Main Result Above Upper Limit Interrupt Enable" "0,1" bitfld.long 0x00 1. "FIFOFILLIE,The Quantity of FIFO Data Reaches Threshold Interrupt Enable" "0,1" bitfld.long 0x00 0. "TRIGIE,External Trigger Interrupt Enable" "0,1" line.long 0x04 "INTCLR,Interrupt Clear Register" bitfld.long 0x04 7. "REACLR,Auxiliary Conversion Completes Interrupt Clear" "0,1" bitfld.long 0x04 6. "SBACLR,Auxiliary Result Below Lower Limit Interrupt Clear" "0,1" bitfld.long 0x04 5. "SAACLR,Auxiliary Result Above Upper Limit Interrupt Clear" "0,1" bitfld.long 0x04 4. "TSTMPCLR,Timestamp Interrupt Clear" "0,1" bitfld.long 0x04 3. "SBMCLR,Main Result Below Lower Limit Interrupt Clear" "0,1" bitfld.long 0x04 2. "SAMCLR,Main Result Above Upper Limit Interrupt Clear" "0,1" bitfld.long 0x04 1. "FIFOFILLCLR,FIFO Data Reaches Threshold Interrupt Clear" "0,1" newline bitfld.long 0x04 0. "TRIGCLR,External Trigger Interrupt Clear" "0,1" rgroup.long ad:0xB000243C++0x03 line.long 0x00 "INTSTS,Interrupt Status Register" bitfld.long 0x00 7. "REAST,Auxiliary Conversion Completes Interrupt Status" "0,1" bitfld.long 0x00 6. "SBAST,Auxiliary Result Below Lower Limit Interrupt Status" "0,1" bitfld.long 0x00 5. "SAAST,Auxiliary Result Above Upper Limit Interrupt Status" "0,1" bitfld.long 0x00 4. "TSTMPST,Timestamp Interrupt Status" "0,1" bitfld.long 0x00 3. "SBMST,Main Result Below Lower Limit Interrupt Status" "0,1" bitfld.long 0x00 2. "SAMST,Main Result Above Upper Limit Interrupt Status" "0,1" bitfld.long 0x00 1. "FIFOFILLST,FIFO Data Reaches Threshold Interrupt Status" "0,1" newline bitfld.long 0x00 0. "TRIGST,External Trigger Interrupt Status" "0,1" group.long ad:0xB0002440++0x0B line.long 0x00 "TESTCFG,Test Configuration Register" bitfld.long 0x00 0.--2. "TESTSEL,Common Mode Test Voltage Output Control" "0,1,2,3,4,5,6,7" line.long 0x04 "COMP,Compensation Register" hexmask.long.word 0x04 16.--31. 1. "DCOFFSET,DC Compensation Offset" hexmask.long.word 0x04 0.--15. 1. "GCOFFSET,Gain Compensation Offset" line.long 0x08 "SMEN,Safety Mechanism Enable Register" bitfld.long 0x08 8.--9. "TRIGSMEN,Trigger Timeout Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 6.--7. "DMASMEN,DMA Timeout Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 4.--5. "DASMEN,Data Exceed Threshold Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 2.--3. "FISMEN,FIFO Write Full or Read Empty Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 0.--1. "REGSMEN,Register Redundancy Safety Mechanism Enable" "0,1,2,3" wgroup.long ad:0xB000244C++0x03 line.long 0x00 "ALACLR,Alarm Clear Register" bitfld.long 0x00 10.--11. "SEACLR,Write E/Se Register Without Unlock E/SE Protect Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 8.--9. "TRIGACLR,Trigger Timeout Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "DMAACLR,DMA Timeout Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "DAACLR,Data Exceed Threshold Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "FIACLR,FIFO Write Full or Read Empty Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "REGACLR,Register Redundancy Alarm Status Clear" "0,1,2,3" rgroup.long ad:0xB0002450++0x03 line.long 0x00 "ALASTS,Alarm Status Register" bitfld.long 0x00 8. "SEAST,Write E/Se Register Without Unlock E/Se Protect Alarm Status" "0,1" bitfld.long 0x00 7. "TRIGAST,Trigger Timeout Alarm Status" "0,1" bitfld.long 0x00 6. "DMAAST,DMA Timeout Alarm Status" "0,1" bitfld.long 0x00 5. "DAAST,Data Exceed Threshold Alarm Status" "0,1" bitfld.long 0x00 4. "FIAST,FIFO Write Full or Read Empty Alarm Status" "0,1" bitfld.long 0x00 3. "MRESAST,Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 2. "FIREGAST,Write E/Se Register Without Unlock E/Se Protect Alarm Status" "0,1" newline bitfld.long 0x00 1. "ACLRERST,Trigger Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SMREAST,DMA Timeout Alarm Status" "0,1" group.long ad:0xB0002454++0x27 line.long 0x00 "FAIN,Fault Injection Register" bitfld.long 0x00 2.--3. "TRIGFAIN,Trigger Timeout Fault Inject" "0,1,2,3" bitfld.long 0x00 0.--1. "DMAFAIN,DMA Timeout Fault Inject" "0,1,2,3" line.long 0x04 "DMATHRES,DMA Timeout Threshold Register" line.long 0x08 "TRIGTHRES,Trigger Timeout Threshold Register" line.long 0x0C "COMPCON,Calibration Control Register" bitfld.long 0x0C 6. "CALEN,Calibrating Enable" "0,1" bitfld.long 0x0C 4.--5. "CALSELLV,Calibration Input Selection" "0,1,2,3" bitfld.long 0x0C 2.--3. "VSELLV,Calibration Voltage Selection" "0,1,2,3" bitfld.long 0x0C 1. "DCOBEN,DC Offset Bypass Enable" "0,1" bitfld.long 0x0C 0. "GCOBEN,Fine Gain Offset Bypass Enable" "0,1" line.long 0x10 "TESTMODE,Test Mode Register" bitfld.long 0x10 0. "TESTMODE,Test Mode" "0,1" line.long 0x14 "DITHEREN,Dithering Enable Register" bitfld.long 0x14 0. "DITHEREN,Dithering Mode Enable" "0,1" line.long 0x18 "CWCFG,Carrier Wave Configure Register" rbitfld.long 0x18 19. "SYNSIGNBIT,Post-synchronous excitation results" "0,1" rbitfld.long 0x18 18. "SIGNBIT,Excitation results" "0,1" rbitfld.long 0x18 13.--17. "PERINDEX,Excitation Micro-step Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x18 8.--12. "PERCYCLE,Excitation Micro-step Cycle Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 4. "CWPHICRL,Carrier Waveform Control" "0,1" bitfld.long 0x18 3. "PCMEN,PCM Mode Enable" "0,1" bitfld.long 0x18 1.--2. "MODE,Carrier Waveform Select" "0,1,2,3" newline bitfld.long 0x18 0. "EN,Excitation Enable" "0,1" line.long 0x1C "CWSYNC,Carrier Wave Sync Control Register" hexmask.long.byte 0x1C 24.--31. 1. "CNT,Delay Counter" hexmask.long.byte 0x1C 16.--23. 1. "DELAY,Delay Parameter Display" hexmask.long.byte 0x1C 8.--15. 1. "SYNCSTART,Synchronous Start Value" hexmask.long.byte 0x1C 0.--7. 1. "SYNCEND,Synchronous End value" line.long 0x20 "MEANCON,Mean Control Register" hexmask.long.byte 0x20 4.--9. 1. "LEN,Mean Points" bitfld.long 0x20 3. "MODE,Mean Mode" "0,1" bitfld.long 0x20 0.--2. "SFL,Shift Length Control" "0,1,2,3,4,5,6,7" line.long 0x24 "BUSERRMSK,Bus Error Mask Register" bitfld.long 0x24 0. "BUSERRMSK,Bus Error Mask" "0,1" group.long ad:0xB0002480++0x03 line.long 0x00 "DEBUG,Debug Configure Register" bitfld.long 0x00 6. "DBGP,Debug Suspend Pattern" "0,1" rbitfld.long 0x00 5. "SUSFLAG,Suspend Flag" "0,1" bitfld.long 0x00 4. "SUSWP,Suspend Write Protection" "0,1" bitfld.long 0x00 0.--3. "SUSCTRL,Debug Mode Suspend Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "DSADC2" group.long ad:0xB0012000++0x0B line.long 0x00 "MODCFG,Modulator Configuration Register" bitfld.long 0x00 21. "MPSWP,Write Protection for Modulator Pattern Settings" "0,1" bitfld.long 0x00 20. "APC,Automatic Power Control" "0,1" bitfld.long 0x00 16.--19. "FDIVC,Frequency Divider Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 15. "INPWP,Write Protection for Input Parameters" "0,1" bitfld.long 0x00 14. "INMCC,Input Multiplexer Changing Control" "0,1" bitfld.long 0x00 12.--13. "INMCP,Input Multiplexer Control Pattern" "0,1,2,3" bitfld.long 0x00 11. "DIFFPC,Differential Pattern Control Signal" "0,1" newline rbitfld.long 0x00 10. "INMUXS,Input Multiplexer Setting" "0,1" bitfld.long 0x00 8. "INPSEL,Input Pin Selection" "0,1" bitfld.long 0x00 4.--6. "PGAGSEL,Gain Select of Analog Input Path" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. "NINEN,Negative Input Enable" "0,1" bitfld.long 0x00 2. "PINEN,Positive Input Enable" "0,1" bitfld.long 0x00 1. "NINSET,Setting of Negative Input Line" "0,1" bitfld.long 0x00 0. "PINSET,Setting of Positive Input Line" "0,1" line.long 0x04 "DEMICFG,Demodulator Input Configuration Register" bitfld.long 0x04 13. "FIFOBYPASS,FIFO Bypass" "0,1" bitfld.long 0x04 11. "RSTADC,ADC Loop Reset Signal" "0,1" bitfld.long 0x04 8. "MSWP,Write Protection for Mode Settings" "0,1" bitfld.long 0x04 7. "RDP,Result Display Pattern" "0,1" bitfld.long 0x04 6. "TSP,Time-Stamp Pattern" "0,1" bitfld.long 0x04 4.--5. "TSTRP,Timestamp Trigger Pattern" "0,1,2,3" bitfld.long 0x04 0.--3. "TRGSEL,Trigger Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CPVCFG,Common Voltage Configuration Register" bitfld.long 0x08 21. "INNVCB,Common-Mode Voltage Input Control of B" "0,1" bitfld.long 0x08 20. "INNVCA,Common-Mode Voltage Input Control of A" "0,1" bitfld.long 0x08 4. "VXEN,Common-Mode Voltage Enable" "0,1" group.long ad:0xB0012010++0x03 line.long 0x00 "RFCON,Result FIFO Control Register" rbitfld.long 0x00 20. "WREF,Write Error Flag" "0,1" rbitfld.long 0x00 19. "RDEF,Read Error Flag" "0,1" rbitfld.long 0x00 16.--18. "FILLVAL,FIFO Fill Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "FICLR,FIFO Clear" "0,1" bitfld.long 0x00 5. "WRECLR,Write Error Flag Clear" "0,1" bitfld.long 0x00 4. "RDECLR,Read Error Flag Clear" "0,1" bitfld.long 0x00 0.--1. "SRLVAL,Service Request FIFO Value" "0,1,2,3" rgroup.long ad:0xB0012014++0x07 line.long 0x00 "MCRES,Main Conversion Result Register" hexmask.long.word 0x00 0.--15. 1. "MCRES,Main Conversion Result Value" line.long 0x04 "TSTMP,Time-Stamp Register" bitfld.long 0x04 18. "TSVF,Timestamp Valid Flag" "0,1" bitfld.long 0x04 16. "AMSET,Analog Multiplexer Setting" "0,1" hexmask.long.word 0x04 0.--15. 1. "TSTMPVAL,Recent Captured Timestamp Value" group.long ad:0xB001201C++0x13 line.long 0x00 "TSCNT,Time-Stamp Counter Register" bitfld.long 0x00 19. "AMSCEN,Analog Multiplexer Enable" "0,1" bitfld.long 0x00 18. "TSCSC,Timestamp Counter Start Control" "0,1" bitfld.long 0x00 16.--17. "TSCCS,Timestamp Counter Clock Selection" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. "TSCVAL,Timestamp Counter Value" line.long 0x04 "MFCFG,Main Filter Configuration Register" bitfld.long 0x04 29.--31. "OCENCFG,Offset Compensation Filter Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x04 27.--28. "FIR1OSF,FIR1 Output Shift" "0,1,2,3" bitfld.long 0x04 26. "FIR0OSF,FIR0 Output Shift" "0,1" bitfld.long 0x04 25. "FIR1FEN,FIR1 Filter Enable" "0,1" bitfld.long 0x04 24. "FIR0FEN,FIR0 Filter Enable" "0,1" bitfld.long 0x04 23. "DCOFEN,DC Offset Enable" "0,1" bitfld.long 0x04 21. "FIR1DEC,FIR0 Filter Decimation Rate" "0,1" newline bitfld.long 0x04 20. "FIR0DEC,FIR1 Filter Decimation Rate" "0,1" bitfld.long 0x04 18.--19. "MAGCS,Main Alarm Generation Condition Selection" "0,1,2,3" bitfld.long 0x04 16.--17. "MGSRC,Main Generation Service Request Configuration" "0,1,2,3" bitfld.long 0x04 15. "MEANBYPASS,Mean Bypass" "0,1" bitfld.long 0x04 10.--14. "MCGSL,Main CIC Gain Shift Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--9. "MCPS,Main CIC Parallel Series Selection" "0,1,2,3" hexmask.long.byte 0x04 1.--7. 1. "MCFSF,Main CIC Filter Sampling Factor" newline bitfld.long 0x04 0. "MCFEN,Main CIC Filter Enable" "0,1" line.long 0x08 "AFCFG,Auxiliary Filter Configuration Register" bitfld.long 0x08 18.--19. "AAGCS,Auxiliary Alarm Generation Condition Selection" "0,1,2,3" bitfld.long 0x08 16.--17. "AGSRC,Auxiliary Generation Service Request Configuration" "0,1,2,3" bitfld.long 0x08 10.--14. "ACGSL,Auxiliary CIC Gain Shift Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8.--9. "ACPS,Auxiliary CIC Parallel Series Selection" "0,1,2,3" bitfld.long 0x08 1.--5. "ACFDF,Auxiliary CIC Filter Sampling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0. "ACFEN,Auxiliary CIC Filter Enable" "0,1" line.long 0x0C "GAINCTR,Gain Offset Ctrl Register" bitfld.long 0x0C 19. "DCOCEN,Offset Calibration Enable" "0,1" bitfld.long 0x0C 16.--18. "GAINOFFCTRL,Gain Offset Control Offset" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0C 1.--8. 1. "GAINOFF,Gain Offset Value" bitfld.long 0x0C 0. "GAINOFFEN,Fine Gain Offset Enable" "0,1" line.long 0x10 "THRESLM,Threshold Check Limit Register" hexmask.long.word 0x10 16.--31. 1. "TCLL,Threshold Check Lower limit" hexmask.long.word 0x10 0.--15. 1. "TCUL,Threshold Check Upper limit" rgroup.long ad:0xB0012030++0x03 line.long 0x00 "ACRES,Auxiliary Channel Result" hexmask.long.word 0x00 0.--15. 1. "ACRES,Auxiliary Conversion Result Value" group.long ad:0xB0012034++0x07 line.long 0x00 "INTEN,Interrupt Enable Register" bitfld.long 0x00 11. "DMAREAIE,Auxiliary DMA Transition Completes Request Enable" "0,1" bitfld.long 0x00 10. "DMATSTMPIE,DMA Timestamp Request Enable" "0,1" bitfld.long 0x00 9. "DMATRIGIE,DMA External Trigger Request Enable" "0,1" bitfld.long 0x00 8. "DMAFIFOIE,DMA FIFO Request Enable" "0,1" bitfld.long 0x00 7. "REAIE,Auxiliary Conversion Completes Interrupt Enable" "0,1" bitfld.long 0x00 6. "SBAIE,Auxiliary Result Below Lower Limit Interrupt Enable" "0,1" bitfld.long 0x00 5. "SAAIE,Auxiliary Result Above Upper Limit Interrupt Enable" "0,1" newline bitfld.long 0x00 4. "TSTMPIE,Timestamp Interrupt Enable" "0,1" bitfld.long 0x00 3. "SBMIE,Main Result Below Lower Limit Interrupt Enable" "0,1" bitfld.long 0x00 2. "SAMIE,Main Result Above Upper Limit Interrupt Enable" "0,1" bitfld.long 0x00 1. "FIFOFILLIE,The Quantity of FIFO Data Reaches Threshold Interrupt Enable" "0,1" bitfld.long 0x00 0. "TRIGIE,External Trigger Interrupt Enable" "0,1" line.long 0x04 "INTCLR,Interrupt Clear Register" bitfld.long 0x04 7. "REACLR,Auxiliary Conversion Completes Interrupt Clear" "0,1" bitfld.long 0x04 6. "SBACLR,Auxiliary Result Below Lower Limit Interrupt Clear" "0,1" bitfld.long 0x04 5. "SAACLR,Auxiliary Result Above Upper Limit Interrupt Clear" "0,1" bitfld.long 0x04 4. "TSTMPCLR,Timestamp Interrupt Clear" "0,1" bitfld.long 0x04 3. "SBMCLR,Main Result Below Lower Limit Interrupt Clear" "0,1" bitfld.long 0x04 2. "SAMCLR,Main Result Above Upper Limit Interrupt Clear" "0,1" bitfld.long 0x04 1. "FIFOFILLCLR,FIFO Data Reaches Threshold Interrupt Clear" "0,1" newline bitfld.long 0x04 0. "TRIGCLR,External Trigger Interrupt Clear" "0,1" rgroup.long ad:0xB001203C++0x03 line.long 0x00 "INTSTS,Interrupt Status Register" bitfld.long 0x00 7. "REAST,Auxiliary Conversion Completes Interrupt Status" "0,1" bitfld.long 0x00 6. "SBAST,Auxiliary Result Below Lower Limit Interrupt Status" "0,1" bitfld.long 0x00 5. "SAAST,Auxiliary Result Above Upper Limit Interrupt Status" "0,1" bitfld.long 0x00 4. "TSTMPST,Timestamp Interrupt Status" "0,1" bitfld.long 0x00 3. "SBMST,Main Result Below Lower Limit Interrupt Status" "0,1" bitfld.long 0x00 2. "SAMST,Main Result Above Upper Limit Interrupt Status" "0,1" bitfld.long 0x00 1. "FIFOFILLST,FIFO Data Reaches Threshold Interrupt Status" "0,1" newline bitfld.long 0x00 0. "TRIGST,External Trigger Interrupt Status" "0,1" group.long ad:0xB0012040++0x0B line.long 0x00 "TESTCFG,Test Configuration Register" bitfld.long 0x00 0.--2. "TESTSEL,Common Mode Test Voltage Output Control" "0,1,2,3,4,5,6,7" line.long 0x04 "COMP,Compensation Register" hexmask.long.word 0x04 16.--31. 1. "DCOFFSET,DC Compensation Offset" hexmask.long.word 0x04 0.--15. 1. "GCOFFSET,Gain Compensation Offset" line.long 0x08 "SMEN,Safety Mechanism Enable Register" bitfld.long 0x08 8.--9. "TRIGSMEN,Trigger Timeout Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 6.--7. "DMASMEN,DMA Timeout Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 4.--5. "DASMEN,Data Exceed Threshold Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 2.--3. "FISMEN,FIFO Write Full or Read Empty Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 0.--1. "REGSMEN,Register Redundancy Safety Mechanism Enable" "0,1,2,3" wgroup.long ad:0xB001204C++0x03 line.long 0x00 "ALACLR,Alarm Clear Register" bitfld.long 0x00 10.--11. "SEACLR,Write E/Se Register Without Unlock E/SE Protect Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 8.--9. "TRIGACLR,Trigger Timeout Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "DMAACLR,DMA Timeout Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "DAACLR,Data Exceed Threshold Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "FIACLR,FIFO Write Full or Read Empty Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "REGACLR,Register Redundancy Alarm Status Clear" "0,1,2,3" rgroup.long ad:0xB0012050++0x03 line.long 0x00 "ALASTS,Alarm Status Register" bitfld.long 0x00 8. "SEAST,Write E/Se Register Without Unlock E/Se Protect Alarm Status" "0,1" bitfld.long 0x00 7. "TRIGAST,Trigger Timeout Alarm Status" "0,1" bitfld.long 0x00 6. "DMAAST,DMA Timeout Alarm Status" "0,1" bitfld.long 0x00 5. "DAAST,Data Exceed Threshold Alarm Status" "0,1" bitfld.long 0x00 4. "FIAST,FIFO Write Full or Read Empty Alarm Status" "0,1" bitfld.long 0x00 3. "MRESAST,Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 2. "FIREGAST,Write E/Se Register Without Unlock E/Se Protect Alarm Status" "0,1" newline bitfld.long 0x00 1. "ACLRERST,Trigger Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SMREAST,DMA Timeout Alarm Status" "0,1" group.long ad:0xB0012054++0x27 line.long 0x00 "FAIN,Fault Injection Register" bitfld.long 0x00 2.--3. "TRIGFAIN,Trigger Timeout Fault Inject" "0,1,2,3" bitfld.long 0x00 0.--1. "DMAFAIN,DMA Timeout Fault Inject" "0,1,2,3" line.long 0x04 "DMATHRES,DMA Timeout Threshold Register" line.long 0x08 "TRIGTHRES,Trigger Timeout Threshold Register" line.long 0x0C "COMPCON,Calibration Control Register" bitfld.long 0x0C 6. "CALEN,Calibrating Enable" "0,1" bitfld.long 0x0C 4.--5. "CALSELLV,Calibration Input Selection" "0,1,2,3" bitfld.long 0x0C 2.--3. "VSELLV,Calibration Voltage Selection" "0,1,2,3" bitfld.long 0x0C 1. "DCOBEN,DC Offset Bypass Enable" "0,1" bitfld.long 0x0C 0. "GCOBEN,Fine Gain Offset Bypass Enable" "0,1" line.long 0x10 "TESTMODE,Test Mode Register" bitfld.long 0x10 0. "TESTMODE,Test Mode" "0,1" line.long 0x14 "DITHEREN,Dithering Enable Register" bitfld.long 0x14 0. "DITHEREN,Dithering Mode Enable" "0,1" line.long 0x18 "CWCFG,Carrier Wave Configure Register" rbitfld.long 0x18 19. "SYNSIGNBIT,Post-synchronous excitation results" "0,1" rbitfld.long 0x18 18. "SIGNBIT,Excitation results" "0,1" rbitfld.long 0x18 13.--17. "PERINDEX,Excitation Micro-step Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x18 8.--12. "PERCYCLE,Excitation Micro-step Cycle Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 4. "CWPHICRL,Carrier Waveform Control" "0,1" bitfld.long 0x18 3. "PCMEN,PCM Mode Enable" "0,1" bitfld.long 0x18 1.--2. "MODE,Carrier Waveform Select" "0,1,2,3" newline bitfld.long 0x18 0. "EN,Excitation Enable" "0,1" line.long 0x1C "CWSYNC,Carrier Wave Sync Control Register" hexmask.long.byte 0x1C 24.--31. 1. "CNT,Delay Counter" hexmask.long.byte 0x1C 16.--23. 1. "DELAY,Delay Parameter Display" hexmask.long.byte 0x1C 8.--15. 1. "SYNCSTART,Synchronous Start Value" hexmask.long.byte 0x1C 0.--7. 1. "SYNCEND,Synchronous End value" line.long 0x20 "MEANCON,Mean Control Register" hexmask.long.byte 0x20 4.--9. 1. "LEN,Mean Points" bitfld.long 0x20 3. "MODE,Mean Mode" "0,1" bitfld.long 0x20 0.--2. "SFL,Shift Length Control" "0,1,2,3,4,5,6,7" line.long 0x24 "BUSERRMSK,Bus Error Mask Register" bitfld.long 0x24 0. "BUSERRMSK,Bus Error Mask" "0,1" group.long ad:0xB0012080++0x03 line.long 0x00 "DEBUG,Debug Configure Register" bitfld.long 0x00 6. "DBGP,Debug Suspend Pattern" "0,1" rbitfld.long 0x00 5. "SUSFLAG,Suspend Flag" "0,1" bitfld.long 0x00 4. "SUSWP,Suspend Write Protection" "0,1" bitfld.long 0x00 0.--3. "SUSCTRL,Debug Mode Suspend Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "DSADC3" group.long ad:0xB0012400++0x0B line.long 0x00 "MODCFG,Modulator Configuration Register" bitfld.long 0x00 21. "MPSWP,Write Protection for Modulator Pattern Settings" "0,1" bitfld.long 0x00 20. "APC,Automatic Power Control" "0,1" bitfld.long 0x00 16.--19. "FDIVC,Frequency Divider Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 15. "INPWP,Write Protection for Input Parameters" "0,1" bitfld.long 0x00 14. "INMCC,Input Multiplexer Changing Control" "0,1" bitfld.long 0x00 12.--13. "INMCP,Input Multiplexer Control Pattern" "0,1,2,3" bitfld.long 0x00 11. "DIFFPC,Differential Pattern Control Signal" "0,1" newline rbitfld.long 0x00 10. "INMUXS,Input Multiplexer Setting" "0,1" bitfld.long 0x00 8. "INPSEL,Input Pin Selection" "0,1" bitfld.long 0x00 4.--6. "PGAGSEL,Gain Select of Analog Input Path" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3. "NINEN,Negative Input Enable" "0,1" bitfld.long 0x00 2. "PINEN,Positive Input Enable" "0,1" bitfld.long 0x00 1. "NINSET,Setting of Negative Input Line" "0,1" bitfld.long 0x00 0. "PINSET,Setting of Positive Input Line" "0,1" line.long 0x04 "DEMICFG,Demodulator Input Configuration Register" bitfld.long 0x04 13. "FIFOBYPASS,FIFO Bypass" "0,1" bitfld.long 0x04 11. "RSTADC,ADC Loop Reset Signal" "0,1" bitfld.long 0x04 8. "MSWP,Write Protection for Mode Settings" "0,1" bitfld.long 0x04 7. "RDP,Result Display Pattern" "0,1" bitfld.long 0x04 6. "TSP,Time-Stamp Pattern" "0,1" bitfld.long 0x04 4.--5. "TSTRP,Timestamp Trigger Pattern" "0,1,2,3" bitfld.long 0x04 0.--3. "TRGSEL,Trigger Source Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CPVCFG,Common Voltage Configuration Register" bitfld.long 0x08 21. "INNVCB,Common-Mode Voltage Input Control of B" "0,1" bitfld.long 0x08 20. "INNVCA,Common-Mode Voltage Input Control of A" "0,1" bitfld.long 0x08 4. "VXEN,Common-Mode Voltage Enable" "0,1" group.long ad:0xB0012410++0x03 line.long 0x00 "RFCON,Result FIFO Control Register" rbitfld.long 0x00 20. "WREF,Write Error Flag" "0,1" rbitfld.long 0x00 19. "RDEF,Read Error Flag" "0,1" rbitfld.long 0x00 16.--18. "FILLVAL,FIFO Fill Value" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6. "FICLR,FIFO Clear" "0,1" bitfld.long 0x00 5. "WRECLR,Write Error Flag Clear" "0,1" bitfld.long 0x00 4. "RDECLR,Read Error Flag Clear" "0,1" bitfld.long 0x00 0.--1. "SRLVAL,Service Request FIFO Value" "0,1,2,3" rgroup.long ad:0xB0012414++0x07 line.long 0x00 "MCRES,Main Conversion Result Register" hexmask.long.word 0x00 0.--15. 1. "MCRES,Main Conversion Result Value" line.long 0x04 "TSTMP,Time-Stamp Register" bitfld.long 0x04 18. "TSVF,Timestamp Valid Flag" "0,1" bitfld.long 0x04 16. "AMSET,Analog Multiplexer Setting" "0,1" hexmask.long.word 0x04 0.--15. 1. "TSTMPVAL,Recent Captured Timestamp Value" group.long ad:0xB001241C++0x13 line.long 0x00 "TSCNT,Time-Stamp Counter Register" bitfld.long 0x00 19. "AMSCEN,Analog Multiplexer Enable" "0,1" bitfld.long 0x00 18. "TSCSC,Timestamp Counter Start Control" "0,1" bitfld.long 0x00 16.--17. "TSCCS,Timestamp Counter Clock Selection" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. "TSCVAL,Timestamp Counter Value" line.long 0x04 "MFCFG,Main Filter Configuration Register" bitfld.long 0x04 29.--31. "OCENCFG,Offset Compensation Filter Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x04 27.--28. "FIR1OSF,FIR1 Output Shift" "0,1,2,3" bitfld.long 0x04 26. "FIR0OSF,FIR0 Output Shift" "0,1" bitfld.long 0x04 25. "FIR1FEN,FIR1 Filter Enable" "0,1" bitfld.long 0x04 24. "FIR0FEN,FIR0 Filter Enable" "0,1" bitfld.long 0x04 23. "DCOFEN,DC Offset Enable" "0,1" bitfld.long 0x04 21. "FIR1DEC,FIR0 Filter Decimation Rate" "0,1" newline bitfld.long 0x04 20. "FIR0DEC,FIR1 Filter Decimation Rate" "0,1" bitfld.long 0x04 18.--19. "MAGCS,Main Alarm Generation Condition Selection" "0,1,2,3" bitfld.long 0x04 16.--17. "MGSRC,Main Generation Service Request Configuration" "0,1,2,3" bitfld.long 0x04 15. "MEANBYPASS,Mean Bypass" "0,1" bitfld.long 0x04 10.--14. "MCGSL,Main CIC Gain Shift Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--9. "MCPS,Main CIC Parallel Series Selection" "0,1,2,3" hexmask.long.byte 0x04 1.--7. 1. "MCFSF,Main CIC Filter Sampling Factor" newline bitfld.long 0x04 0. "MCFEN,Main CIC Filter Enable" "0,1" line.long 0x08 "AFCFG,Auxiliary Filter Configuration Register" bitfld.long 0x08 18.--19. "AAGCS,Auxiliary Alarm Generation Condition Selection" "0,1,2,3" bitfld.long 0x08 16.--17. "AGSRC,Auxiliary Generation Service Request Configuration" "0,1,2,3" bitfld.long 0x08 10.--14. "ACGSL,Auxiliary CIC Gain Shift Length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 8.--9. "ACPS,Auxiliary CIC Parallel Series Selection" "0,1,2,3" bitfld.long 0x08 1.--5. "ACFDF,Auxiliary CIC Filter Sampling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0. "ACFEN,Auxiliary CIC Filter Enable" "0,1" line.long 0x0C "GAINCTR,Gain Offset Ctrl Register" bitfld.long 0x0C 19. "DCOCEN,Offset Calibration Enable" "0,1" bitfld.long 0x0C 16.--18. "GAINOFFCTRL,Gain Offset Control Offset" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x0C 1.--8. 1. "GAINOFF,Gain Offset Value" bitfld.long 0x0C 0. "GAINOFFEN,Fine Gain Offset Enable" "0,1" line.long 0x10 "THRESLM,Threshold Check Limit Register" hexmask.long.word 0x10 16.--31. 1. "TCLL,Threshold Check Lower limit" hexmask.long.word 0x10 0.--15. 1. "TCUL,Threshold Check Upper limit" rgroup.long ad:0xB0012430++0x03 line.long 0x00 "ACRES,Auxiliary Channel Result" hexmask.long.word 0x00 0.--15. 1. "ACRES,Auxiliary Conversion Result Value" group.long ad:0xB0012434++0x07 line.long 0x00 "INTEN,Interrupt Enable Register" bitfld.long 0x00 11. "DMAREAIE,Auxiliary DMA Transition Completes Request Enable" "0,1" bitfld.long 0x00 10. "DMATSTMPIE,DMA Timestamp Request Enable" "0,1" bitfld.long 0x00 9. "DMATRIGIE,DMA External Trigger Request Enable" "0,1" bitfld.long 0x00 8. "DMAFIFOIE,DMA FIFO Request Enable" "0,1" bitfld.long 0x00 7. "REAIE,Auxiliary Conversion Completes Interrupt Enable" "0,1" bitfld.long 0x00 6. "SBAIE,Auxiliary Result Below Lower Limit Interrupt Enable" "0,1" bitfld.long 0x00 5. "SAAIE,Auxiliary Result Above Upper Limit Interrupt Enable" "0,1" newline bitfld.long 0x00 4. "TSTMPIE,Timestamp Interrupt Enable" "0,1" bitfld.long 0x00 3. "SBMIE,Main Result Below Lower Limit Interrupt Enable" "0,1" bitfld.long 0x00 2. "SAMIE,Main Result Above Upper Limit Interrupt Enable" "0,1" bitfld.long 0x00 1. "FIFOFILLIE,The Quantity of FIFO Data Reaches Threshold Interrupt Enable" "0,1" bitfld.long 0x00 0. "TRIGIE,External Trigger Interrupt Enable" "0,1" line.long 0x04 "INTCLR,Interrupt Clear Register" bitfld.long 0x04 7. "REACLR,Auxiliary Conversion Completes Interrupt Clear" "0,1" bitfld.long 0x04 6. "SBACLR,Auxiliary Result Below Lower Limit Interrupt Clear" "0,1" bitfld.long 0x04 5. "SAACLR,Auxiliary Result Above Upper Limit Interrupt Clear" "0,1" bitfld.long 0x04 4. "TSTMPCLR,Timestamp Interrupt Clear" "0,1" bitfld.long 0x04 3. "SBMCLR,Main Result Below Lower Limit Interrupt Clear" "0,1" bitfld.long 0x04 2. "SAMCLR,Main Result Above Upper Limit Interrupt Clear" "0,1" bitfld.long 0x04 1. "FIFOFILLCLR,FIFO Data Reaches Threshold Interrupt Clear" "0,1" newline bitfld.long 0x04 0. "TRIGCLR,External Trigger Interrupt Clear" "0,1" rgroup.long ad:0xB001243C++0x03 line.long 0x00 "INTSTS,Interrupt Status Register" bitfld.long 0x00 7. "REAST,Auxiliary Conversion Completes Interrupt Status" "0,1" bitfld.long 0x00 6. "SBAST,Auxiliary Result Below Lower Limit Interrupt Status" "0,1" bitfld.long 0x00 5. "SAAST,Auxiliary Result Above Upper Limit Interrupt Status" "0,1" bitfld.long 0x00 4. "TSTMPST,Timestamp Interrupt Status" "0,1" bitfld.long 0x00 3. "SBMST,Main Result Below Lower Limit Interrupt Status" "0,1" bitfld.long 0x00 2. "SAMST,Main Result Above Upper Limit Interrupt Status" "0,1" bitfld.long 0x00 1. "FIFOFILLST,FIFO Data Reaches Threshold Interrupt Status" "0,1" newline bitfld.long 0x00 0. "TRIGST,External Trigger Interrupt Status" "0,1" group.long ad:0xB0012440++0x0B line.long 0x00 "TESTCFG,Test Configuration Register" bitfld.long 0x00 0.--2. "TESTSEL,Common Mode Test Voltage Output Control" "0,1,2,3,4,5,6,7" line.long 0x04 "COMP,Compensation Register" hexmask.long.word 0x04 16.--31. 1. "DCOFFSET,DC Compensation Offset" hexmask.long.word 0x04 0.--15. 1. "GCOFFSET,Gain Compensation Offset" line.long 0x08 "SMEN,Safety Mechanism Enable Register" bitfld.long 0x08 8.--9. "TRIGSMEN,Trigger Timeout Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 6.--7. "DMASMEN,DMA Timeout Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 4.--5. "DASMEN,Data Exceed Threshold Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 2.--3. "FISMEN,FIFO Write Full or Read Empty Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x08 0.--1. "REGSMEN,Register Redundancy Safety Mechanism Enable" "0,1,2,3" wgroup.long ad:0xB001244C++0x03 line.long 0x00 "ALACLR,Alarm Clear Register" bitfld.long 0x00 10.--11. "SEACLR,Write E/Se Register Without Unlock E/SE Protect Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 8.--9. "TRIGACLR,Trigger Timeout Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "DMAACLR,DMA Timeout Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "DAACLR,Data Exceed Threshold Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "FIACLR,FIFO Write Full or Read Empty Alarm Status Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "REGACLR,Register Redundancy Alarm Status Clear" "0,1,2,3" rgroup.long ad:0xB0012450++0x03 line.long 0x00 "ALASTS,Alarm Status Register" bitfld.long 0x00 8. "SEAST,Write E/Se Register Without Unlock E/Se Protect Alarm Status" "0,1" bitfld.long 0x00 7. "TRIGAST,Trigger Timeout Alarm Status" "0,1" bitfld.long 0x00 6. "DMAAST,DMA Timeout Alarm Status" "0,1" bitfld.long 0x00 5. "DAAST,Data Exceed Threshold Alarm Status" "0,1" bitfld.long 0x00 4. "FIAST,FIFO Write Full or Read Empty Alarm Status" "0,1" bitfld.long 0x00 3. "MRESAST,Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 2. "FIREGAST,Write E/Se Register Without Unlock E/Se Protect Alarm Status" "0,1" newline bitfld.long 0x00 1. "ACLRERST,Trigger Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SMREAST,DMA Timeout Alarm Status" "0,1" group.long ad:0xB0012454++0x27 line.long 0x00 "FAIN,Fault Injection Register" bitfld.long 0x00 2.--3. "TRIGFAIN,Trigger Timeout Fault Inject" "0,1,2,3" bitfld.long 0x00 0.--1. "DMAFAIN,DMA Timeout Fault Inject" "0,1,2,3" line.long 0x04 "DMATHRES,DMA Timeout Threshold Register" line.long 0x08 "TRIGTHRES,Trigger Timeout Threshold Register" line.long 0x0C "COMPCON,Calibration Control Register" bitfld.long 0x0C 6. "CALEN,Calibrating Enable" "0,1" bitfld.long 0x0C 4.--5. "CALSELLV,Calibration Input Selection" "0,1,2,3" bitfld.long 0x0C 2.--3. "VSELLV,Calibration Voltage Selection" "0,1,2,3" bitfld.long 0x0C 1. "DCOBEN,DC Offset Bypass Enable" "0,1" bitfld.long 0x0C 0. "GCOBEN,Fine Gain Offset Bypass Enable" "0,1" line.long 0x10 "TESTMODE,Test Mode Register" bitfld.long 0x10 0. "TESTMODE,Test Mode" "0,1" line.long 0x14 "DITHEREN,Dithering Enable Register" bitfld.long 0x14 0. "DITHEREN,Dithering Mode Enable" "0,1" line.long 0x18 "CWCFG,Carrier Wave Configure Register" rbitfld.long 0x18 19. "SYNSIGNBIT,Post-synchronous excitation results" "0,1" rbitfld.long 0x18 18. "SIGNBIT,Excitation results" "0,1" rbitfld.long 0x18 13.--17. "PERINDEX,Excitation Micro-step Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x18 8.--12. "PERCYCLE,Excitation Micro-step Cycle Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 4. "CWPHICRL,Carrier Waveform Control" "0,1" bitfld.long 0x18 3. "PCMEN,PCM Mode Enable" "0,1" bitfld.long 0x18 1.--2. "MODE,Carrier Waveform Select" "0,1,2,3" newline bitfld.long 0x18 0. "EN,Excitation Enable" "0,1" line.long 0x1C "CWSYNC,Carrier Wave Sync Control Register" hexmask.long.byte 0x1C 24.--31. 1. "CNT,Delay Counter" hexmask.long.byte 0x1C 16.--23. 1. "DELAY,Delay Parameter Display" hexmask.long.byte 0x1C 8.--15. 1. "SYNCSTART,Synchronous Start Value" hexmask.long.byte 0x1C 0.--7. 1. "SYNCEND,Synchronous End value" line.long 0x20 "MEANCON,Mean Control Register" hexmask.long.byte 0x20 4.--9. 1. "LEN,Mean Points" bitfld.long 0x20 3. "MODE,Mean Mode" "0,1" bitfld.long 0x20 0.--2. "SFL,Shift Length Control" "0,1,2,3,4,5,6,7" line.long 0x24 "BUSERRMSK,Bus Error Mask Register" bitfld.long 0x24 0. "BUSERRMSK,Bus Error Mask" "0,1" group.long ad:0xB0012480++0x03 line.long 0x00 "DEBUG,Debug Configure Register" bitfld.long 0x00 6. "DBGP,Debug Suspend Pattern" "0,1" rbitfld.long 0x00 5. "SUSFLAG,Suspend Flag" "0,1" bitfld.long 0x00 4. "SUSWP,Suspend Write Protection" "0,1" bitfld.long 0x00 0.--3. "SUSCTRL,Debug Mode Suspend Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree.end tree "RDC" rgroup.long ad:0xB0003800++0x03 line.long 0x00 "ID,Identification Register" group.long ad:0xB0003804++0x7B line.long 0x00 "CW0DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x00 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x00 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x04 "CW1DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x04 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x04 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x08 "CW2DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x08 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x08 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x0C "CW3DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x0C 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x0C 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x10 "CW4DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x10 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x10 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x14 "CW5DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x14 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x14 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x18 "CW6DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x18 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x18 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x1C "CW7DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x1C 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x1C 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x20 "CW8DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x20 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x20 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x24 "CW9DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x24 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x24 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x28 "CW10DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x28 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x28 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x2C "CW11DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x2C 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x2C 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x30 "CW12DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x30 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x30 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x34 "CW13DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x34 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x34 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x38 "CW14DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x38 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x38 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x3C "CW15DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x3C 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x3C 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x40 "CW16DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x40 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x40 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x44 "CW17DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x44 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x44 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x48 "CW18DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x48 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x48 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x4C "CW19DR,Carrier Wave n Duty Ratio Register (n=0~19)" hexmask.long.word 0x4C 16.--31. 1. "CWnPOS,Carrier Wave n Duty Ratio Posedge Position" hexmask.long.word 0x4C 0.--15. 1. "CWnNEG,Carrier Wave n Duty Ratio Negedge Position" line.long 0x50 "CWPOINTS,Carrier Wave Points Configuration Register" hexmask.long.word 0x50 16.--31. 1. "CWPOINTS,Carrier Wave Points" hexmask.long.word 0x50 0.--15. 1. "TOTALPOINTS,Total Sine Wave Points" line.long 0x54 "CWCFG,Excitation Carrier Wave Configuration Register" bitfld.long 0x54 8.--11. "PULSEDURCLK,Pulse Duration Clock" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x54 5. "REQENFLAG,Data Request Interrupt Enable Flag" "0,1" bitfld.long 0x54 4. "SOFTCFGEN,Software Configuration SPWM Enable" "0,1" bitfld.long 0x54 1.--3. "STEPCFG,Counter Step Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x54 0. "WAVEMODE,Waveform Mode" "0,1" line.long 0x58 "CWCTRL,Excitation Carrier Wave Control Register" bitfld.long 0x58 0. "RUN,Excitation Enable Switch" "0,1" line.long 0x5C "COSTASKP,COSTAS Loop KP Register" hexmask.long.tbyte 0x5C 0.--17. 1. "KP,COSTAS Loop KP Parameter" line.long 0x60 "COSTASKI,COSTAS Loop KI Register" hexmask.long.tbyte 0x60 0.--17. 1. "KI,COSTAS Loop KI Parameter" line.long 0x64 "MAINKP,Main Loop KP Register" hexmask.long.tbyte 0x64 0.--17. 1. "KP,Main Loop KP Parameter" line.long 0x68 "MAINKI,Main Loop KI Register" hexmask.long.tbyte 0x68 0.--17. 1. "KI,Main Loop KI Parameter" line.long 0x6C "DCOFFSET,DC Offset Register" hexmask.long.word 0x6C 16.--31. 1. "DOCI,I-path DC Offset" hexmask.long.word 0x6C 0.--15. 1. "DOCQ,Q-path DC Offset" line.long 0x70 "GAINOFFSET,Gain Offset Register" hexmask.long.word 0x70 0.--15. 1. "GCOFFSETI,I-path Gain Offset" line.long 0x74 "RECFG,Resolution Configuration Register" bitfld.long 0x74 20.--23. "QDATASEL,Q-path Data Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 16.--19. "IDATASEL,I-path Data Source Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 12.--15. "CDCDNUM,Clock Domain Cross Delay Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x74 11. "SIGSEL,Signal Generation Selection" "0,1" bitfld.long 0x74 9.--10. "SAMPCFG,Sample Rate Configuration" "0,1,2,3" bitfld.long 0x74 8. "VLDSEL,VLD Selection" "0,1" newline bitfld.long 0x74 7. "SARADCU2SBYPASS,SARADC Unsigned to Signed Bypass" "0,1" bitfld.long 0x74 6. "TRIGSEL,Trigger Selection" "0,1" bitfld.long 0x74 5. "GCBYPASS,Gain Compensation Bypass" "0,1" bitfld.long 0x74 4. "DCBYPASS,DC Bias Offset Bypass" "0,1" bitfld.long 0x74 1.--3. "HPFCFG,High-pass Filter Cutoff Frequency Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x74 0. "HPFBYPASS,High-pass Filter Bypass" "0,1" line.long 0x78 "CPUTRIG,CPU Trigger Signal Register" bitfld.long 0x78 0. "CPUTRIG,CPU Trigger" "0,1" rgroup.long ad:0xB0003880++0x17 line.long 0x00 "PE,Phase Estimation Value Report Register" hexmask.long.tbyte 0x00 0.--17. 1. "PE,Phase Estimate" line.long 0x04 "VEL,Solved Speed Value Report Register" hexmask.long.tbyte 0x04 0.--23. 1. "VELOCITY,Real-time Velocity" line.long 0x08 "ANG,Solved Angle Value Report Register" hexmask.long.tbyte 0x08 0.--23. 1. "ANGEL,Real-time Angle" line.long 0x0C "TRIGVEL,Triggered Velocity Value Report Register" hexmask.long.tbyte 0x0C 0.--23. 1. "TRIGVEL,Interruption Source Trigger Moment Speed" line.long 0x10 "TRIGANG,Triggered Angle Value Report Register" hexmask.long.tbyte 0x10 0.--23. 1. "TRIGANG,Interruption Source Trigger Moment Angle" line.long 0x14 "TRIGTSMP,Triggered Time Stamp Value Report Register" hexmask.long.word 0x14 0.--15. 1. "TSCOUNT,Time Stamp Count" wgroup.long ad:0xB0003898++0x03 line.long 0x00 "IQEXTREVALCLR,IQ Extreme Value Clear Register" bitfld.long 0x00 0. "CLR,IQ Extreme Clear" "0,1" rgroup.long ad:0xB000389C++0x0B line.long 0x00 "IEXTREVALRPT,I-path Extreme Value Report Register" hexmask.long.word 0x00 16.--31. 1. "MAX,Maximum Value of I-path" hexmask.long.word 0x00 0.--15. 1. "MIN,Minimum Value of I-path" line.long 0x04 "QEXTREVALRPT,Q-path Extreme Value Report Register" hexmask.long.word 0x04 16.--31. 1. "MAX,Maximum Value of Q-path" hexmask.long.word 0x04 0.--15. 1. "MIN,Minimum Value of Q-path" line.long 0x08 "MONRPT,Monitor Signal Report Register" hexmask.long.word 0x08 0.--15. 1. "MON,Monitor Signal Report" group.long ad:0xB00038A8++0x03 line.long 0x00 "BUSERRMSK,Bus Error Mask Register" bitfld.long 0x00 0. "BUSERRMSK,Bus Error Mask" "0,1" group.long ad:0xB0003950++0x03 line.long 0x00 "REGSAFETYEN,Register Safety Mechanism Enable Register" bitfld.long 0x00 0.--1. "EN,Register Safety Mechanism Enable" "0,1,2,3" wgroup.long ad:0xB0003954++0x03 line.long 0x00 "REGALARMCLR,Register Alarm Clear Register" bitfld.long 0x00 0.--1. "CLR,Clear Signal for the Register Alarm" "0,1,2,3" rgroup.long ad:0xB0003958++0x03 line.long 0x00 "REGALARMSTS,Register Alarm Status Register" bitfld.long 0x00 21. "IAACALM,Illegal Access Alarm Clear Alarm Status" "0,1" bitfld.long 0x00 20. "TRIGTSMPRALM,TRIGTSMP Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 19. "TRIGANGRALM,TRIGANG Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 18. "TRIGVELRALM,TRIGVEL Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 17. "ANGRALM,ANG Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 16. "VELRALM,VEL Register Redundancy Alarm Status" "0,1" newline bitfld.long 0x00 15. "PERALM,PE Register Redundancy Alarm Status" "0,1" bitfld.long 0x00 14. "RSENRALM,RS Enable Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 13. "LSTOENRALM,LSTO Enable Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 12. "EXTENRALM,EXT Enable Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 11. "ORAENRALM,ORA Enable Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 10. "DOSENRALM,DOS Enable Bit Redundancy Alarm Status" "0,1" newline bitfld.long 0x00 9. "LOSENRALM,LOS Enable Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 8. "EXTFREQACRALM,EXT Frequency Alarm Clear Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 7. "EXTFREQMERALM,EXT Frequency Monitor Enable Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 6. "REGACRALM,Register Alarm Clear Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 5. "REGSAFEENRALM,Register Safety Enable Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 4. "DOSCLRRALM,DOS Clear Bit Redundancy Alarm Status" "0,1" newline bitfld.long 0x00 3. "LSTOCLRRALM,LSTO Clear Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 2. "RSCLRRALM,RS Clear Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 1. "ORACLRRALM,ORA Clear Bit Redundancy Alarm Status" "0,1" bitfld.long 0x00 0. "LOSCLRRALM,LOS Clear Bit Redundancy Alarm Status" "0,1" wgroup.long ad:0xB000395C++0x07 line.long 0x00 "REGIACLR,Register Illegal Access Alarm Clear Registers" bitfld.long 0x00 0.--1. "CLR,Illegal Access Alarm Clear" "0,1,2,3" line.long 0x04 "FUNALARMCLR,Function Module Alarm Clear Register" bitfld.long 0x04 8.--9. "DOSCRASCLR,DOS Clear Bit Redundancy Alarm Status Clear" "0,1,2,3" bitfld.long 0x04 6.--7. "LSTOCRASCLR,LSTO Clear Bit Redundancy Alarm Status Clear" "0,1,2,3" bitfld.long 0x04 4.--5. "RSCRASCLR,RS Clear Bit Redundancy Alarm Status Clear" "0,1,2,3" bitfld.long 0x04 2.--3. "ORACRASCLR,ORA Clear Bit Redundancy Alarm Status Clear" "0,1,2,3" bitfld.long 0x04 0.--1. "LOSCRASCLR,LOS Clear Bit Redundancy Alarm Status Clear" "0,1,2,3" group.long ad:0xB0003964++0x17 line.long 0x00 "LOSTCFG,LOS Threshold Configuration Register" hexmask.long.word 0x00 0.--15. 1. "TCFG,Signal Loss Threshold Configuration" line.long 0x04 "ORATCFG,Overrange of Signal Threshold Configuration Registers" hexmask.long.word 0x04 0.--15. 1. "TCFG,Signal Over Limit Threshold Configuration" line.long 0x08 "LOTTCFG,Loop Stabilization Threshold Configuration Register" hexmask.long.word 0x08 16.--31. 1. "HTCFG,Loop Stabilization High Threshold Configuration" hexmask.long.word 0x08 0.--15. 1. "LTCFG,Loop Stabilization Low Threshold Configuration" line.long 0x0C "RSHTCFG,Reference Signal High Threshold Configuration Register" hexmask.long.tbyte 0x0C 0.--17. 1. "TCFG,Reference Signal Error Threshold Configuration" line.long 0x10 "RSLTCFG,Reference Signal Low Threshold Configuration Register" hexmask.long.tbyte 0x10 0.--17. 1. "TCFG,Reference Signal Error Low Threshold Configuration" line.long 0x14 "LSTOTCFG,Loop Stability Timeout Configuration Register" rgroup.long ad:0xB000397C++0x03 line.long 0x00 "FUNALARMSTS,Function Alarm Status Register" bitfld.long 0x00 5. "RSALM,RS Alarm Status" "0,1" bitfld.long 0x00 4. "LSTOALM,LSTO Alarm Status" "0,1" bitfld.long 0x00 3. "EXTALM,EXT Alarm Status" "0,1" bitfld.long 0x00 2. "ORAALM,ORA Alarm Status" "0,1" bitfld.long 0x00 1. "DOSALM,DOS Alarm Status" "0,1" bitfld.long 0x00 0. "LOSALM,LOS Alarm Status" "0,1" group.long ad:0xB0003980++0x0B line.long 0x00 "DOSMMTTCFG,DOS Mismatch Threshold Configuration Register" hexmask.long.word 0x00 0.--15. 1. "TCFG,Signal Degradation Mismatch Threshold Configuration" line.long 0x04 "FREMONEN,Frequency Monitor Enable Register" bitfld.long 0x04 0.--1. "EN,Frequency Monitor Enable" "0,1,2,3" line.long 0x08 "FREMONCFG,Frequency Monitor Threshold Configuration Register" hexmask.long.word 0x08 16.--31. 1. "THCFG,Frequency Monitor High Threshold Counter" hexmask.long.word 0x08 0.--15. 1. "TLCFG,Frequency Monitor Low Threshold Counter" wgroup.long ad:0xB000398C++0x03 line.long 0x00 "FREALARMCLR,Frequency Alarm Clear Register" bitfld.long 0x00 0.--1. "CLR,Frequency Abnormal Alarm Clear" "0,1,2,3" group.long ad:0xB0003990++0x03 line.long 0x00 "DOSWIN,DOS Judgment Enable Register" bitfld.long 0x00 0. "EN,DOS Alarm Enable Judgment" "0,1" rgroup.long ad:0xB0003994++0x03 line.long 0x00 "LSRPT,Loop Stable Status Report Register" bitfld.long 0x00 0. "STS,Loop Stabilization Flag" "0,1" group.long ad:0xB0003998++0x03 line.long 0x00 "FUNSAFETYEN,Function Module Safety Alarm Enable Register" bitfld.long 0x00 10.--11. "RSEN,RS Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "LSTOEN,LSTO Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "EXTEN,EXT Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "ORAEN,ORA Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "DOSEN,DOS Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "LOSEN,LOS Safety Mechanism Enable" "0,1,2,3" rgroup.long ad:0xB000399C++0x03 line.long 0x00 "REGIAALARMSTS,Registers Illegal Access Alarm Status Register" bitfld.long 0x00 0. "STS,Illegal Access to SE-protected Signal Status" "0,1" tree.end tree "FC0" group.long ad:0xB0003000++0x2F line.long 0x00 "ANEN,Analog IP enable control" bitfld.long 0x00 0. "ANAEN,Analog IP Enable Control" "0,1" line.long 0x04 "CON0,Control Register 0" bitfld.long 0x04 28.--29. "TRIMODE,Trigger Event Generating Mode Control" "0,1,2,3" rbitfld.long 0x04 24. "TRILVL,Trigger Level" "0,1" bitfld.long 0x04 20.--23. "TRISEL,Trigger input Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 13.--15. "CKDIVA,Divider Factor for The Analog Internal Clock" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--9. "CHEGMODE,Channel Event Generating Mode" "0,1,2,3" bitfld.long 0x04 0.--1. "STCON,Sample Time Control for Fast Comparisons" "0,1,2,3" line.long 0x08 "CON1,Control Register 1" bitfld.long 0x08 12.--13. "CTCON,Compare Time Control for Fast Comparisons" "0,1,2,3" bitfld.long 0x08 8.--9. "CVCH,Compare Value Input Channel" "0,1,2,3" bitfld.long 0x08 4.--5. "GCONMODE,Gate Control Mode of Reference Value Generating" "0,1,2,3" bitfld.long 0x08 0. "TRINV,Trigger Invert Selection" "0,1" line.long 0x0C "MODE,Mode Register" bitfld.long 0x0C 20.--21. "REFG,Reference Value Generation" "0,1,2,3" bitfld.long 0x0C 16.--17. "INTG,Interrupt Generation" "0,1,2,3" hexmask.long.byte 0x0C 8.--15. 1. "FCINTVL,Fast Compare Interval" bitfld.long 0x0C 4. "RAMPDIR,Fast Compare Ramp Direction" "0,1" bitfld.long 0x0C 0.--1. "RAMPON,Run Control for Ramp" "0,1,2,3" line.long 0x10 "REFVAL,Reference Value Register" hexmask.long.word 0x10 16.--25. 1. "REFVALSW,Software Configured Reference Value" hexmask.long.word 0x10 0.--9. 1. "REFVALUE,Fast Compare Reference Value" line.long 0x14 "RAMP0,Ramp Register 0" hexmask.long.byte 0x14 16.--23. 1. "RAMPSTEP,Fast Compare Ramp Step Width" hexmask.long.word 0x14 0.--9. 1. "RAMPCMP0,Fast Compare Ramp Compare Value 0" line.long 0x18 "RAMP1,Ramp Register 1" hexmask.long.word 0x18 0.--9. 1. "RAMPCMP1,Fast Compare Ramp Compare Value 1" line.long 0x1C "HYST,Hysteresis Register" hexmask.long.word 0x1C 16.--25. 1. "UPDELTA,Upper Delta Value" hexmask.long.word 0x1C 0.--9. 1. "LOWDELTA,Lower Delta Value" line.long 0x20 "BDFL,Boundary Flag Register" rbitfld.long 0x20 31. "CRVF,Compare Result Valid Flag" "0,1" rbitfld.long 0x20 28. "CR,Compare Result" "0,1" bitfld.long 0x20 24.--27. "BFP,Boundary Flag Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 17. "BFRSW,Boundary Flag Replaced by Software Configured Value" "0,1" bitfld.long 0x20 16. "BFHW,Boundary Flag Hardware Control" "0,1" bitfld.long 0x20 12.--13. "BFSW,Boundary Flag Software Control" "0,1,2,3" bitfld.long 0x20 8. "BFINV,Boundary Flag Inversion Control" "0,1" bitfld.long 0x20 4. "BFACT,Boundary Flag Activation Select" "0,1" bitfld.long 0x20 3. "BFOUTSEL,BFLOUT Source Select" "0,1" rbitfld.long 0x20 2. "BFDAT,Boundary Flag Alternate Data" "0,1" newline rbitfld.long 0x20 1. "BFSEL,Boundary Flag Source Select" "0,1" rbitfld.long 0x20 0. "BDFLAG,Boundary Flag" "0,1" line.long 0x24 "FCINT,Interrupt and DMA Control Register" bitfld.long 0x24 16. "DMAEN,DMA Enable" "0,1" bitfld.long 0x24 0. "INTST,Interrupt Status" "0,1" line.long 0x28 "FCON,Run Control for Compare Channel Register" bitfld.long 0x28 0. "COMPEN,Compare Channel Enable Control" "0,1" line.long 0x2C "SMEN,Safety Mechanism Enable Register" bitfld.long 0x2C 6.--7. "DMALSEN,DMA Request Loss Monitor Mechanism Enable" "0,1,2,3" bitfld.long 0x2C 4.--5. "MONIEN,Trigger Signal Time Monitor Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x2C 2.--3. "DMASMEN,DMA Feedback Timeout Monitor Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x2C 0.--1. "REGSMEN,Register Bit Redundancy Safety Mechanism Enable" "0,1,2,3" rgroup.long ad:0xB0003030++0x03 line.long 0x00 "ALM,Alarm Register" bitfld.long 0x00 8. "DMALSALM,DMA Request Loss Monitor Mechanism Alarm" "0,1" bitfld.long 0x00 7. "CVCHALM,CVCH Register Alarm" "0,1" bitfld.long 0x00 6. "FAULTALM,FAULTEN Register Alarm" "0,1" bitfld.long 0x00 5. "CLRALM,ALMCLR Register Alarm" "0,1" bitfld.long 0x00 4. "SEALM,Safety ENINIT Alarm" "0,1" bitfld.long 0x00 3. "EALM,ENDINIT Alarm" "0,1" bitfld.long 0x00 2. "MONIALM,Trigger Signal Timeout Monitor Safety Mechanism Alarm" "0,1" bitfld.long 0x00 1. "DMALM,DMA Feedback Timeout Monitor Safety Mechanism Alarm" "0,1" bitfld.long 0x00 0. "SMENALM,SMEN Register Alarm" "0,1" wgroup.long ad:0xB0003034++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 10.--11. "DMALSCLR,DMA Request Loss Alarm Clear" "0,1,2,3" bitfld.long 0x00 8.--9. "SECLR,Safety ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "ECLR,ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MONICLR,Trigger Signal Timeout Monitor Safety Mechanism Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "DMACLR,DMA Feedback Timeout Monitor Safety Mechanism Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "REGSMCLR,Register Two Bits Redundancy Safety Mechanism Alarm Clear" "0,1,2,3" group.long ad:0xB0003038++0x0B line.long 0x00 "FAULTEN,Fault Enable Register" bitfld.long 0x00 2.--3. "MONFAULT,Trigger Signal Timeout Monitor Safety Mechanism Fault Injection" "0,1,2,3" bitfld.long 0x00 0.--1. "DMAFAULT,DMA Feedback Timeout Monitor Safety Mechanism Fault Injection" "0,1,2,3" line.long 0x04 "PMCNT,Pulse Monitor Counter Register" line.long 0x08 "DMCNT,DMA Monitor Counter Register" rgroup.long ad:0xB0003044++0x03 line.long 0x00 "ANSTS,Analog IP State Register" bitfld.long 0x00 1. "ANAINIT,Analog IP Initialize Flag" "0,1" bitfld.long 0x00 0. "COMFL,Analog IP Compare Flag" "0,1" group.long ad:0xB0003048++0x03 line.long 0x00 "MASKR,Mask Register" bitfld.long 0x00 2. "CINTMASK,Common Interrupt Mask" "0,1" bitfld.long 0x00 1. "INTMASK,Interrupt Mask" "0,1" bitfld.long 0x00 0. "BEMASK,Bus Error Mask" "0,1" tree.end tree "FC1" group.long ad:0xB0013000++0x2F line.long 0x00 "ANEN,Analog IP enable control" bitfld.long 0x00 0. "ANAEN,Analog IP Enable Control" "0,1" line.long 0x04 "CON0,Control Register 0" bitfld.long 0x04 28.--29. "TRIMODE,Trigger Event Generating Mode Control" "0,1,2,3" rbitfld.long 0x04 24. "TRILVL,Trigger Level" "0,1" bitfld.long 0x04 20.--23. "TRISEL,Trigger input Selection" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 13.--15. "CKDIVA,Divider Factor for The Analog Internal Clock" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--9. "CHEGMODE,Channel Event Generating Mode" "0,1,2,3" bitfld.long 0x04 0.--1. "STCON,Sample Time Control for Fast Comparisons" "0,1,2,3" line.long 0x08 "CON1,Control Register 1" bitfld.long 0x08 12.--13. "CTCON,Compare Time Control for Fast Comparisons" "0,1,2,3" bitfld.long 0x08 8.--9. "CVCH,Compare Value Input Channel" "0,1,2,3" bitfld.long 0x08 4.--5. "GCONMODE,Gate Control Mode of Reference Value Generating" "0,1,2,3" bitfld.long 0x08 0. "TRINV,Trigger Invert Selection" "0,1" line.long 0x0C "MODE,Mode Register" bitfld.long 0x0C 20.--21. "REFG,Reference Value Generation" "0,1,2,3" bitfld.long 0x0C 16.--17. "INTG,Interrupt Generation" "0,1,2,3" hexmask.long.byte 0x0C 8.--15. 1. "FCINTVL,Fast Compare Interval" bitfld.long 0x0C 4. "RAMPDIR,Fast Compare Ramp Direction" "0,1" bitfld.long 0x0C 0.--1. "RAMPON,Run Control for Ramp" "0,1,2,3" line.long 0x10 "REFVAL,Reference Value Register" hexmask.long.word 0x10 16.--25. 1. "REFVALSW,Software Configured Reference Value" hexmask.long.word 0x10 0.--9. 1. "REFVALUE,Fast Compare Reference Value" line.long 0x14 "RAMP0,Ramp Register 0" hexmask.long.byte 0x14 16.--23. 1. "RAMPSTEP,Fast Compare Ramp Step Width" hexmask.long.word 0x14 0.--9. 1. "RAMPCMP0,Fast Compare Ramp Compare Value 0" line.long 0x18 "RAMP1,Ramp Register 1" hexmask.long.word 0x18 0.--9. 1. "RAMPCMP1,Fast Compare Ramp Compare Value 1" line.long 0x1C "HYST,Hysteresis Register" hexmask.long.word 0x1C 16.--25. 1. "UPDELTA,Upper Delta Value" hexmask.long.word 0x1C 0.--9. 1. "LOWDELTA,Lower Delta Value" line.long 0x20 "BDFL,Boundary Flag Register" rbitfld.long 0x20 31. "CRVF,Compare Result Valid Flag" "0,1" rbitfld.long 0x20 28. "CR,Compare Result" "0,1" bitfld.long 0x20 24.--27. "BFP,Boundary Flag Pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 17. "BFRSW,Boundary Flag Replaced by Software Configured Value" "0,1" bitfld.long 0x20 16. "BFHW,Boundary Flag Hardware Control" "0,1" bitfld.long 0x20 12.--13. "BFSW,Boundary Flag Software Control" "0,1,2,3" bitfld.long 0x20 8. "BFINV,Boundary Flag Inversion Control" "0,1" bitfld.long 0x20 4. "BFACT,Boundary Flag Activation Select" "0,1" bitfld.long 0x20 3. "BFOUTSEL,BFLOUT Source Select" "0,1" rbitfld.long 0x20 2. "BFDAT,Boundary Flag Alternate Data" "0,1" newline rbitfld.long 0x20 1. "BFSEL,Boundary Flag Source Select" "0,1" rbitfld.long 0x20 0. "BDFLAG,Boundary Flag" "0,1" line.long 0x24 "FCINT,Interrupt and DMA Control Register" bitfld.long 0x24 16. "DMAEN,DMA Enable" "0,1" bitfld.long 0x24 0. "INTST,Interrupt Status" "0,1" line.long 0x28 "FCON,Run Control for Compare Channel Register" bitfld.long 0x28 0. "COMPEN,Compare Channel Enable Control" "0,1" line.long 0x2C "SMEN,Safety Mechanism Enable Register" bitfld.long 0x2C 6.--7. "DMALSEN,DMA Request Loss Monitor Mechanism Enable" "0,1,2,3" bitfld.long 0x2C 4.--5. "MONIEN,Trigger Signal Time Monitor Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x2C 2.--3. "DMASMEN,DMA Feedback Timeout Monitor Safety Mechanism Enable" "0,1,2,3" bitfld.long 0x2C 0.--1. "REGSMEN,Register Bit Redundancy Safety Mechanism Enable" "0,1,2,3" rgroup.long ad:0xB0013030++0x03 line.long 0x00 "ALM,Alarm Register" bitfld.long 0x00 8. "DMALSALM,DMA Request Loss Monitor Mechanism Alarm" "0,1" bitfld.long 0x00 7. "CVCHALM,CVCH Register Alarm" "0,1" bitfld.long 0x00 6. "FAULTALM,FAULTEN Register Alarm" "0,1" bitfld.long 0x00 5. "CLRALM,ALMCLR Register Alarm" "0,1" bitfld.long 0x00 4. "SEALM,Safety ENINIT Alarm" "0,1" bitfld.long 0x00 3. "EALM,ENDINIT Alarm" "0,1" bitfld.long 0x00 2. "MONIALM,Trigger Signal Timeout Monitor Safety Mechanism Alarm" "0,1" bitfld.long 0x00 1. "DMALM,DMA Feedback Timeout Monitor Safety Mechanism Alarm" "0,1" bitfld.long 0x00 0. "SMENALM,SMEN Register Alarm" "0,1" wgroup.long ad:0xB0013034++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 10.--11. "DMALSCLR,DMA Request Loss Alarm Clear" "0,1,2,3" bitfld.long 0x00 8.--9. "SECLR,Safety ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "ECLR,ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MONICLR,Trigger Signal Timeout Monitor Safety Mechanism Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "DMACLR,DMA Feedback Timeout Monitor Safety Mechanism Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "REGSMCLR,Register Two Bits Redundancy Safety Mechanism Alarm Clear" "0,1,2,3" group.long ad:0xB0013038++0x0B line.long 0x00 "FAULTEN,Fault Enable Register" bitfld.long 0x00 2.--3. "MONFAULT,Trigger Signal Timeout Monitor Safety Mechanism Fault Injection" "0,1,2,3" bitfld.long 0x00 0.--1. "DMAFAULT,DMA Feedback Timeout Monitor Safety Mechanism Fault Injection" "0,1,2,3" line.long 0x04 "PMCNT,Pulse Monitor Counter Register" line.long 0x08 "DMCNT,DMA Monitor Counter Register" rgroup.long ad:0xB0013044++0x03 line.long 0x00 "ANSTS,Analog IP State Register" bitfld.long 0x00 1. "ANAINIT,Analog IP Initialize Flag" "0,1" bitfld.long 0x00 0. "COMFL,Analog IP Compare Flag" "0,1" group.long ad:0xB0013048++0x03 line.long 0x00 "MASKR,Mask Register" bitfld.long 0x00 2. "CINTMASK,Common Interrupt Mask" "0,1" bitfld.long 0x00 1. "INTMASK,Interrupt Mask" "0,1" bitfld.long 0x00 0. "BEMASK,Bus Error Mask" "0,1" tree.end tree "TSENSOR0" rgroup.long ad:0xC00E0000++0x07 line.long 0x00 "RESULT,Result Register" bitfld.long 0x00 12. "VLD,Valid" "0,1" hexmask.long.word 0x00 0.--11. 1. "RES,Result" line.long 0x04 "STAT,Status Register" bitfld.long 0x04 12. "ALMSFRSEL,Alarm Special Function Register of ANGCFG.SEL" "0,1" bitfld.long 0x04 11. "ALMSFRMASK,Alarm Special Function Register of MASK" "0,1" bitfld.long 0x04 10. "ALMSFRTEST,Alarm Special Function Register of SAFE" "0,1" bitfld.long 0x04 9. "ALMSE,Alarm Safe Watch Dog Enable SE" "0,1" bitfld.long 0x04 8. "ALMSFRSAMP,Alarm Special Function Register of Sample" "0,1" bitfld.long 0x04 7. "ALMSFRCLR,Alarm Special Function Register of Clear" "0,1" bitfld.long 0x04 6. "ALMTHR,Alarm Threshold" "0,1" newline bitfld.long 0x04 5. "ALMUS,Alarm 1 US" "0,1" bitfld.long 0x04 4. "ALMRES,Alarm Result" "0,1" bitfld.long 0x04 3. "LLU,Lower Limit Underflow" "0,1" bitfld.long 0x04 2. "INT,Interrupt Flag" "0,1" bitfld.long 0x04 1. "UOF,Upper Limit Overflow" "0,1" bitfld.long 0x04 0. "TCO,Temperature Code Overflow" "0,1" group.long ad:0xC00E0008++0x13 line.long 0x00 "LIM,Temperature Limit Register" hexmask.long.word 0x00 16.--27. 1. "LOWER,Lower Limit" hexmask.long.word 0x00 0.--11. 1. "UPPER,Upper Limit" line.long 0x04 "SAMP,Sample Register" bitfld.long 0x04 24. "BYEN,Bypass Enable" "0,1" bitfld.long 0x04 23. "TRIG,Temperature Trigger" "0,1" bitfld.long 0x04 22. "SLCK,Security Lock" "0,1" bitfld.long 0x04 21. "INTEN,Interrupt Enable" "0,1" bitfld.long 0x04 20. "EN,Enable TSENSOR" "0,1" bitfld.long 0x04 16.--18. "AVRTIMES,Average Times" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 0.--7. 1. "USDIV,1us Division" line.long 0x08 "INTERVAL,Sample Interval Register" line.long 0x0C "SAFE,Safe Register" bitfld.long 0x0C 30.--31. "TESTEN,Test Enable" "0,1,2,3" hexmask.long.word 0x0C 0.--11. 1. "TDATA,Test Data" line.long 0x10 "MASK,Mask Register" bitfld.long 0x10 12.--13. "USALMSK,1us Alarm Mask" "0,1,2,3" bitfld.long 0x10 10.--11. "SPALMSK,Spill Alarm Mask" "0,1,2,3" bitfld.long 0x10 8.--9. "REALMSK,Result Alarm Mask" "0,1,2,3" bitfld.long 0x10 6.--7. "THRALMSK,Threshold Alarm Mask" "0,1,2,3" bitfld.long 0x10 4.--5. "SFRALMASK,Special Function Register Alarm Mask" "0,1,2,3" bitfld.long 0x10 2.--3. "BUSERRMASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x10 0.--1. "ALMMASK,Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00E001C++0x03 line.long 0x00 "CLEAR,Clear Status Register" bitfld.long 0x00 12. "CLRALMSFRSEL,Clear Alarm Special Function Register of SEL" "0,1" bitfld.long 0x00 11. "CLRALMSFRMASK,Clear Alarm Special Function Register of Mask" "0,1" bitfld.long 0x00 10. "CLRLMSFRTEST,Clear Alarm Special Function Register of SAFE" "0,1" bitfld.long 0x00 9. "CLRALMSE,Clear Alarm Special Function Register of Safe Watch Dog Enable" "0,1" bitfld.long 0x00 8. "ALMSFRSAMP,Clear Alarm Special Function Register of Sample" "0,1" bitfld.long 0x00 7. "CLRALMSFR,Clear Alarm Special Function Register" "0,1" bitfld.long 0x00 6. "CLRALMTHR,Clear Alarm Threshold" "0,1" newline bitfld.long 0x00 5. "CLRALMUS,Clear Alarm 1US" "0,1" bitfld.long 0x00 4. "CLRALMRES,Clear Alarm Result" "0,1" bitfld.long 0x00 3. "CLRLLU,Clear Lower Limit Underflow" "0,1" bitfld.long 0x00 2. "CLRINT,Clear Interrupt" "0,1" bitfld.long 0x00 1. "CLRUOF,Clear Upper Limit Overflow" "0,1" bitfld.long 0x00 0. "CLRTCO,Clear Temperature Code Overflow" "0,1" rgroup.long ad:0xC00E0020++0x07 line.long 0x00 "OFFSET,Offset of Calibrating Register" line.long 0x04 "SLOPE,Slope Register" group.long ad:0xC00E0028++0x03 line.long 0x00 "ANGCFG,Analog Configuration Register" bitfld.long 0x00 16.--17. "SEL,Select" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. "QUWIN,Quantization Window" tree.end tree "TSENSOR1" rgroup.long ad:0xC00E0400++0x07 line.long 0x00 "RESULT,Result Register" bitfld.long 0x00 12. "VLD,Valid" "0,1" hexmask.long.word 0x00 0.--11. 1. "RES,Result" line.long 0x04 "STAT,Status Register" bitfld.long 0x04 12. "ALMSFRSEL,Alarm Special Function Register of ANGCFG.SEL" "0,1" bitfld.long 0x04 11. "ALMSFRMASK,Alarm Special Function Register of MASK" "0,1" bitfld.long 0x04 10. "ALMSFRTEST,Alarm Special Function Register of SAFE" "0,1" bitfld.long 0x04 9. "ALMSE,Alarm Safe Watch Dog Enable SE" "0,1" bitfld.long 0x04 8. "ALMSFRSAMP,Alarm Special Function Register of Sample" "0,1" bitfld.long 0x04 7. "ALMSFRCLR,Alarm Special Function Register of Clear" "0,1" bitfld.long 0x04 6. "ALMTHR,Alarm Threshold" "0,1" newline bitfld.long 0x04 5. "ALMUS,Alarm 1 US" "0,1" bitfld.long 0x04 4. "ALMRES,Alarm Result" "0,1" bitfld.long 0x04 3. "LLU,Lower Limit Underflow" "0,1" bitfld.long 0x04 2. "INT,Interrupt Flag" "0,1" bitfld.long 0x04 1. "UOF,Upper Limit Overflow" "0,1" bitfld.long 0x04 0. "TCO,Temperature Code Overflow" "0,1" group.long ad:0xC00E0408++0x13 line.long 0x00 "LIM,Temperature Limit Register" hexmask.long.word 0x00 16.--27. 1. "LOWER,Lower Limit" hexmask.long.word 0x00 0.--11. 1. "UPPER,Upper Limit" line.long 0x04 "SAMP,Sample Register" bitfld.long 0x04 24. "BYEN,Bypass Enable" "0,1" bitfld.long 0x04 23. "TRIG,Temperature Trigger" "0,1" bitfld.long 0x04 22. "SLCK,Security Lock" "0,1" bitfld.long 0x04 21. "INTEN,Interrupt Enable" "0,1" bitfld.long 0x04 20. "EN,Enable TSENSOR" "0,1" bitfld.long 0x04 16.--18. "AVRTIMES,Average Times" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x04 0.--7. 1. "USDIV,1us Division" line.long 0x08 "INTERVAL,Sample Interval Register" line.long 0x0C "SAFE,Safe Register" bitfld.long 0x0C 30.--31. "TESTEN,Test Enable" "0,1,2,3" hexmask.long.word 0x0C 0.--11. 1. "TDATA,Test Data" line.long 0x10 "MASK,Mask Register" bitfld.long 0x10 12.--13. "USALMSK,1us Alarm Mask" "0,1,2,3" bitfld.long 0x10 10.--11. "SPALMSK,Spill Alarm Mask" "0,1,2,3" bitfld.long 0x10 8.--9. "REALMSK,Result Alarm Mask" "0,1,2,3" bitfld.long 0x10 6.--7. "THRALMSK,Threshold Alarm Mask" "0,1,2,3" bitfld.long 0x10 4.--5. "SFRALMASK,Special Function Register Alarm Mask" "0,1,2,3" bitfld.long 0x10 2.--3. "BUSERRMASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x10 0.--1. "ALMMASK,Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00E041C++0x03 line.long 0x00 "CLEAR,Clear Status Register" bitfld.long 0x00 12. "CLRALMSFRSEL,Clear Alarm Special Function Register of SEL" "0,1" bitfld.long 0x00 11. "CLRALMSFRMASK,Clear Alarm Special Function Register of Mask" "0,1" bitfld.long 0x00 10. "CLRLMSFRTEST,Clear Alarm Special Function Register of SAFE" "0,1" bitfld.long 0x00 9. "CLRALMSE,Clear Alarm Special Function Register of Safe Watch Dog Enable" "0,1" bitfld.long 0x00 8. "ALMSFRSAMP,Clear Alarm Special Function Register of Sample" "0,1" bitfld.long 0x00 7. "CLRALMSFR,Clear Alarm Special Function Register" "0,1" bitfld.long 0x00 6. "CLRALMTHR,Clear Alarm Threshold" "0,1" newline bitfld.long 0x00 5. "CLRALMUS,Clear Alarm 1US" "0,1" bitfld.long 0x00 4. "CLRALMRES,Clear Alarm Result" "0,1" bitfld.long 0x00 3. "CLRLLU,Clear Lower Limit Underflow" "0,1" bitfld.long 0x00 2. "CLRINT,Clear Interrupt" "0,1" bitfld.long 0x00 1. "CLRUOF,Clear Upper Limit Overflow" "0,1" bitfld.long 0x00 0. "CLRTCO,Clear Temperature Code Overflow" "0,1" rgroup.long ad:0xC00E0420++0x07 line.long 0x00 "OFFSET,Offset of Calibrating Register" line.long 0x04 "SLOPE,Slope Register" group.long ad:0xC00E0428++0x03 line.long 0x00 "ANGCFG,Analog Configuration Register" bitfld.long 0x00 16.--17. "SEL,Select" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. "QUWIN,Quantization Window" tree.end tree "SAC_CORE" group.long ad:0xC0040400++0x03 line.long 0x00 "AGC,Alarm Global Configuration Register" bitfld.long 0x00 30. "EMU,Emulation" "0,1" bitfld.long 0x00 29. "EFRST,FAULT to RUN State Transition" "0,1" hexmask.long.byte 0x00 23.--28. 1. "PES,Port Emergency Stop" bitfld.long 0x00 19.--20. "NMISEL,NMI Selection" "0,1,2,3" bitfld.long 0x00 15.--18. "IGCS3,Interrupt Generation Configuration Set 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 10.--13. "IGCS2,Interrupt Generation Configuration Set 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5.--8. "IGCS1,Interrupt Generation Configuration Set 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0.--3. "IGCS0,Interrupt Generation Configuration Set 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC0040404++0x03 line.long 0x00 "AEX,Alarm Executed Status Register" bitfld.long 0x00 27. "PESAEM,PES Alarm Event Missed" "0,1" bitfld.long 0x00 25. "NMIAEM,NMI Alarm Event Missed" "0,1" bitfld.long 0x00 20. "RSTAEM,RST Alarm Event Missed" "0,1" bitfld.long 0x00 19. "IRQ3AEM,IRQ3 Alarm Event Missed" "0,1" bitfld.long 0x00 18. "IRQ2AEM,IRQ2 Alarm Event Missed" "0,1" bitfld.long 0x00 17. "IRQ1AEM,IRQ1 Alarm Event Missed" "0,1" bitfld.long 0x00 16. "IRQ0AEM,IRQ0 Alarm Event Missed" "0,1" newline bitfld.long 0x00 11. "PESSTS,PES Request Status" "0,1" bitfld.long 0x00 9. "NMISTS,NMI Request Status" "0,1" bitfld.long 0x00 4. "RSTSTS,RST Request Status" "0,1" bitfld.long 0x00 3. "IRQ3STS,IRQ3 Request Status" "0,1" bitfld.long 0x00 2. "IRQ2STS,IRQ2 Request Status" "0,1" bitfld.long 0x00 1. "IRQ1STS,IRQ1 Request Status" "0,1" bitfld.long 0x00 0. "IRQ0STS,IRQ0 Request Status" "0,1" wgroup.long ad:0xC0040408++0x03 line.long 0x00 "AEXCLR,Alarm Executed Status Clear Register" bitfld.long 0x00 27. "PESAEMCLR,PESAEM Status Clear" "0,1" bitfld.long 0x00 25. "NMIAEMCLR,NMIAEM Status Clear" "0,1" bitfld.long 0x00 20. "RSTAEMCLR,RSTAEM Status Clear" "0,1" bitfld.long 0x00 19. "IRQ3AEMCLR,IRQ3AEM Status Clear" "0,1" bitfld.long 0x00 18. "IRQ2AEMCLR,IRQ2AEM Status Clear" "0,1" bitfld.long 0x00 17. "IRQ1AEMCLR,IRQ1AEM Status Clear" "0,1" bitfld.long 0x00 16. "IRQ0AEMCLR,IRQ0AEM Status Clear" "0,1" newline bitfld.long 0x00 11. "PESSTSCLR,PES Request Status Clear" "0,1" bitfld.long 0x00 9. "NMISTSCLR,NMI Request Status Clear" "0,1" bitfld.long 0x00 4. "RSTSTSCLR,RST Request Status Clear" "0,1" bitfld.long 0x00 3. "IRQ3STSCLR,IRQ3 Request Status Clear" "0,1" bitfld.long 0x00 2. "IRQ2STSCLR,IRQ2 Request Status Clear" "0,1" bitfld.long 0x00 1. "IRQ1STSCLR,IRQ1 Request Status Clear" "0,1" bitfld.long 0x00 0. "IRQ0STSCLR,IRQ0 Request Status Clear" "0,1" rgroup.long ad:0xC004040C++0x03 line.long 0x00 "AFCNT,Alarm and Fault Counter Register" bitfld.long 0x00 31. "ACO,Alarm Counter Overflow" "0,1" bitfld.long 0x00 30. "FCO,Fault Counter Overflow" "0,1" hexmask.long.word 0x00 4.--15. 1. "ACNT,Alarm Counter" bitfld.long 0x00 0.--3. "FCNT,Fault Counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC0040410++0x33 line.long 0x00 "ASR0,Alarm Status Register 0" line.long 0x04 "ASR1,Alarm Status Register1" line.long 0x08 "ASR2,Alarm Status Register 2" line.long 0x0C "ASR3,Alarm Status Register 3" line.long 0x10 "ASR4,Alarm Status Register 4" hexmask.long.word 0x10 0.--15. 1. "SFz,Status Flag" line.long 0x14 "ASR5,Alarm Status Register 5" hexmask.long.word 0x14 0.--9. 1. "SFz,Status Flag" line.long 0x18 "ASR6,Alarm Status Register 6" hexmask.long.word 0x18 23.--31. 1. "SFz,Status Flag" hexmask.long.byte 0x18 14.--21. 1. "SFz,Status Flag" bitfld.long 0x18 7.--11. "SFz,Status Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 1.--5. "SFz,Status Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "ASR7,Alarm Status Register 7" bitfld.long 0x1C 27.--31. "SFz,Status Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x1C 9.--24. 1. "SFz,Status Flag" bitfld.long 0x1C 3.--5. "SFz,Status Flag" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0.--1. "SFz,Status Flag" "0,1,2,3" line.long 0x20 "ASR8,Alarm Status Register 8" hexmask.long 0x20 2.--31. 1. "SFz,Status Flag" bitfld.long 0x20 0. "SFz,Status Flag" "0,1" line.long 0x24 "ASR9,Alarm Status Register 9" hexmask.long 0x24 2.--31. 1. "SFz,Status Flag" bitfld.long 0x24 0. "SFz,Status Flag" "0,1" line.long 0x28 "ASR10,Alarm Status Register 10" bitfld.long 0x28 31. "SFz,Status Flag" "0,1" hexmask.long.tbyte 0x28 12.--28. 1. "SFz,Status Flag" bitfld.long 0x28 7.--10. "SFz,Status Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 0.--4. "SFz,Status Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "ASR11,Alarm Status Register 11" bitfld.long 0x2C 30.--31. "SFz,Status Flag" "0,1,2,3" hexmask.long.tbyte 0x2C 12.--28. 1. "SFz,Status Flag" bitfld.long 0x2C 3.--7. "SFz,Status Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "ASR12,Alarm Status Register 12" hexmask.long.word 0x30 22.--31. 1. "SFz,Status Flag" hexmask.long.word 0x30 0.--8. 1. "SFz,Status Flag" rgroup.long ad:0xC0040470++0x07 line.long 0x00 "AB0,Alarm Backup Register 0" line.long 0x04 "AB1,Alarm Backup Register 1" group.long ad:0xC0040478++0x07 line.long 0x00 "AB2,Alarm Backup Register 2" line.long 0x04 "AB3,Alarm Backup Register 3" rgroup.long ad:0xC0040480++0x1B line.long 0x00 "AB4,Alarm Backup Register 4" hexmask.long.word 0x00 0.--15. 1. "ADz,Alarm Diagnosis Flag" line.long 0x04 "AB5,Alarm Backup Register 5" hexmask.long.word 0x04 0.--9. 1. "ADz,Alarm Diagnosis Flag" line.long 0x08 "AB6,Alarm Backup Register 6" hexmask.long.word 0x08 23.--31. 1. "ADz,Alarm Diagnosis Flag" hexmask.long.byte 0x08 14.--21. 1. "ADz,Alarm Diagnosis Flag" bitfld.long 0x08 7.--11. "ADz,Alarm Diagnosis Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 1.--5. "ADz,Alarm Diagnosis Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x0C "AB7,Alarm Backup Register 7" bitfld.long 0x0C 27.--31. "ADz,Alarm Diagnosis Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x0C 9.--24. 1. "ADz,Alarm Diagnosis Flag" bitfld.long 0x0C 3.--5. "ADz,Alarm Diagnosis Flag" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0.--1. "ADz,Alarm Diagnosis Flag" "0,1,2,3" line.long 0x10 "AB8,Alarm Backup Register 8" hexmask.long 0x10 2.--31. 1. "ADz,Alarm Diagnosis Flag" bitfld.long 0x10 0. "ADz,Alarm Diagnosis Flag" "0,1" line.long 0x14 "AB9,Alarm Backup Register 9" hexmask.long 0x14 2.--31. 1. "ADz,Alarm Diagnosis Flag" bitfld.long 0x14 0. "ADz,Alarm Diagnosis Flag" "0,1" line.long 0x18 "AB10,Alarm Backup Register 10" bitfld.long 0x18 31. "ADz,Alarm Diagnosis Flag" "0,1" hexmask.long.tbyte 0x18 12.--28. 1. "ADz,Alarm Diagnosis Flag" bitfld.long 0x18 7.--10. "ADz,Alarm Diagnosis Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--4. "ADz,Alarm Diagnosis Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC004049C++0x03 line.long 0x00 "AB11,Alarm Backup Register 11" rbitfld.long 0x00 30.--31. "ADz,Alarm Diagnosis Flag" "0,1,2,3" bitfld.long 0x00 29. "11:8,R" "0,1" hexmask.long.tbyte 0x00 12.--28. 1. "ADz,Alarm Diagnosis Flag" rbitfld.long 0x00 3.--7. "ADz,Alarm Diagnosis Flag" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.long ad:0xC00404A0++0x03 line.long 0x00 "AB12,Alarm Backup Register 12" hexmask.long.word 0x00 22.--31. 1. "ADz,Alarm Diagnosis Flag" hexmask.long.word 0x00 0.--8. 1. "ADz,Alarm Diagnosis Flag" rgroup.long ad:0xC0040504++0x03 line.long 0x00 "ID,Identification Register" hexmask.long.word 0x00 16.--31. 1. "MOD_NUMBER,Module Number Value" hexmask.long.byte 0x00 8.--15. 1. "MOD_TYPE,Module Type" hexmask.long.byte 0x00 0.--7. 1. "MOD_REV,Module Revision Number" group.long ad:0xC0040508++0x13 line.long 0x00 "CMD,Command Register" bitfld.long 0x00 4.--7. "ARG,Argument" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CMD,Command" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "KEYS,Key Register" hexmask.long.byte 0x04 8.--15. 1. "PERLCK,Permanent Lock" hexmask.long.byte 0x04 0.--7. 1. "CFGLCK,Configuration Lock" line.long 0x08 "FIP,Fault Indication Protocol Register" hexmask.long.word 0x08 22.--31. 1. "TFIP_HIGH,Specifies the FIP Fault State Duration" hexmask.long.word 0x08 8.--21. 1. "TFIP_LOW,Specifies the FIP Fault State Duration" bitfld.long 0x08 7. "PES,Port Emergency Stop (PES)" "0,1" bitfld.long 0x08 5.--6. "MODE,Fault Indication Protocol Configuration" "0,1,2,3" bitfld.long 0x08 3.--4. "PRE2,Prescaler 2" "0,1,2,3" bitfld.long 0x08 0.--2. "PRE1,Prescaler 1" "0,1,2,3,4,5,6,7" line.long 0x0C "STS,Status Register" bitfld.long 0x0C 19. "IETME1,Interrupt Execution Timer1 Missed Event" "0,1" rbitfld.long 0x0C 18. "IETS1,Interrupt Execution Timer1 Status" "0,1" bitfld.long 0x0C 17. "IETME0,Interrupt Execution Timer0 Missed Event" "0,1" rbitfld.long 0x0C 16. "IETS0,Interrupt Execution Timer0 Status" "0,1" rbitfld.long 0x0C 10.--11. "FIP,Fault Indication Protocol status" "0,1,2,3" rbitfld.long 0x0C 9. "ASCE,Alarm Status Clear Enable" "0,1" rbitfld.long 0x0C 8. "RES,Result of last received command" "0,1" newline rbitfld.long 0x0C 4.--7. "ARG,Last Command Argument Received" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x0C 0.--3. "CMD,Last Command Received" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "ESGLF,ES Glitch Filter Register" hexmask.long.word 0x10 0.--9. 1. "ESGFCNT,ES Glitch Filter Counter" group.long ad:0xC0040540++0x13 line.long 0x00 "IETC,Interrupt Execution Timer Configuration Register" hexmask.long.tbyte 0x00 8.--31. 1. "IETD,Interrupt Execution Timer Duration" bitfld.long 0x00 1. "IET1E,IET1 Enable Bit" "0,1" bitfld.long 0x00 0. "IET0E,IET0 Enable Bit" "0,1" line.long 0x04 "IETAC00,Interrupt Execution Timer 0 Alarm Configuration 0" bitfld.long 0x04 20.--24. "ALID1,Alarm Identifier 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--19. "GID1,Group Index 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 4.--8. "ALID0,Alarm Identifier 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 0.--3. "GID0,Group Index 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "IETAC01,Interrupt Execution Timer 0 Alarm Configuration 1" bitfld.long 0x08 20.--24. "ALID3,Alarm Identifier 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 16.--19. "GID3,Group Index 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--8. "ALID2,Alarm Identifier 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x08 0.--3. "GID2,Group Index 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x0C "IETAC10,Interrupt Execution Timer 1 Alarm Configuration 0" bitfld.long 0x0C 20.--24. "ALID1,Alarm Identifier 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 16.--19. "GID1,Group index 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 4.--8. "ALID0,Alarm Identifier 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x0C 0.--3. "GID0,Group Index 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "IETAC11,Interrupt Execution Timer 1 Alarm Configuration 1" bitfld.long 0x10 20.--24. "ALID3,Alarm Identifier 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 16.--19. "GID3,Group Index 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 4.--8. "ALID2,Alarm Identifier 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10 0.--3. "GID2,Group Index 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC0040560++0x33 line.long 0x00 "FIPAG0,FIP Configuration for Alarm Group 0" line.long 0x04 "FIPAG1,FIP Configuration for Alarm Group 1" line.long 0x08 "FIPAG2,FIP Configuration for Alarm Group 2" line.long 0x0C "FIPAG3,FIP Configuration for Alarm Group 3" line.long 0x10 "FIPAG4,FIP Configuration for Alarm Group 4" hexmask.long.word 0x10 0.--15. 1. "FCz,Fault Indication Configuration" line.long 0x14 "FIPAG5,FIP Configuration for Alarm Group 5" hexmask.long.word 0x14 0.--9. 1. "FCz,Fault Indication Configuration" line.long 0x18 "FIPAG6,FIP Configuration for Alarm Group 6" hexmask.long.word 0x18 23.--31. 1. "FCz,Fault Indication Configuration" hexmask.long.byte 0x18 14.--21. 1. "FCz,Fault Indication Configuration" bitfld.long 0x18 7.--11. "FCz,Fault Indication Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x18 1.--5. "FCz,Fault Indication Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x1C "FIPAG7,FIP Configuration for Alarm Group 7" bitfld.long 0x1C 27.--31. "FCz,Fault Indication Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x1C 9.--24. 1. "FCz,Fault Indication Configuration" bitfld.long 0x1C 3.--5. "FCz,Fault Indication Configuration" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 0.--1. "FCz,Fault Indication Configuration" "0,1,2,3" line.long 0x20 "FIPAG8,FIP Configuration for Alarm Group 8" hexmask.long 0x20 2.--31. 1. "FCz,Fault Indication Configuration" bitfld.long 0x20 0. "FCz,Fault Indication Configuration" "0,1" line.long 0x24 "FIPAG9,FIP Configuration for Alarm Group 9" hexmask.long 0x24 2.--31. 1. "FCz,Fault Indication Configuration" bitfld.long 0x24 0. "FCz,Fault Indication Configuration" "0,1" line.long 0x28 "FIPAG10,FIP Configuration for Alarm Group 10" bitfld.long 0x28 31. "FCz,Fault Indication Configuration" "0,1" hexmask.long.tbyte 0x28 12.--28. 1. "FCz,Fault Indication Configuration" bitfld.long 0x28 7.--10. "FCz,Fault Indication Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 0.--4. "FCz,Fault Indication Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x2C "FIPAG11,FIP Configuration for Alarm Group 11" bitfld.long 0x2C 30.--31. "FCz,Fault Indication Configuration" "0,1,2,3" hexmask.long.tbyte 0x2C 12.--28. 1. "FCz,Fault Indication Configuration" bitfld.long 0x2C 3.--7. "FCz,Fault Indication Configuration" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x30 "FIPAG12,FIP Configuration for Alarm Group 12" hexmask.long.word 0x30 22.--31. 1. "FCz,Fault Indication Configuration" hexmask.long.word 0x30 0.--8. 1. "FCz,Fault Indication Configuration" group.long ad:0xC0040600++0x03 line.long 0x00 "PCTL,Port Control Register" bitfld.long 0x00 5. "GFSTS_EN,Glitch Filter for Error Pin FIP0 to Register STS Enable" "0,1" bitfld.long 0x00 4. "GFPES_EN,Glitch Filter for ErrorPin FIP0 to ES Enable" "0,1" bitfld.long 0x00 0.--1. "HWDIR,Port Direction" "0,1,2,3" group.long ad:0xC0040610++0x03 line.long 0x00 "AC0AG0,Alarm Configuration for Alarm Group 0 (j=0~2)" group.long ad:0xC0040650++0x03 line.long 0x00 "AC1AG0,Alarm Configuration for Alarm Group 0 (j=0~2)" group.long ad:0xC0040690++0x03 line.long 0x00 "AC2AG0,Alarm Configuration for Alarm Group 0 (j=0~2)" group.long ad:0xC0040614++0x03 line.long 0x00 "AC0AG1,Alarm Configuration for Alarm Group 1 (j=0~2)" group.long ad:0xC0040654++0x03 line.long 0x00 "AC1AG1,Alarm Configuration for Alarm Group 1 (j=0~2)" group.long ad:0xC0040694++0x03 line.long 0x00 "AC2AG1,Alarm Configuration for Alarm Group 1 (j=0~2)" group.long ad:0xC0040618++0x03 line.long 0x00 "AC0AG2,Alarm Configuration for Alarm Group 2 (j=0~2)" group.long ad:0xC0040658++0x03 line.long 0x00 "AC1AG2,Alarm Configuration for Alarm Group 2 (j=0~2)" group.long ad:0xC0040698++0x03 line.long 0x00 "AC2AG2,Alarm Configuration for Alarm Group 2 (j=0~2)" group.long ad:0xC004061C++0x03 line.long 0x00 "AC0AG3,Alarm Configuration for Alarm Group 3 (j=0~2)" group.long ad:0xC004065C++0x03 line.long 0x00 "AC1AG3,Alarm Configuration for Alarm Group 3 (j=0~2)" group.long ad:0xC004069C++0x03 line.long 0x00 "AC2AG3,Alarm Configuration for Alarm Group 3 (j=0~2)" group.long ad:0xC0040620++0x03 line.long 0x00 "AC0AG4,Alarm Configuration for Alarm Group 4 (j=0~2)" hexmask.long.word 0x00 0.--15. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 4" group.long ad:0xC0040660++0x03 line.long 0x00 "AC1AG4,Alarm Configuration for Alarm Group 4 (j=0~2)" hexmask.long.word 0x00 0.--15. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 4" group.long ad:0xC00406A0++0x03 line.long 0x00 "AC2AG4,Alarm Configuration for Alarm Group 4 (j=0~2)" hexmask.long.word 0x00 0.--15. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 4" group.long ad:0xC0040624++0x03 line.long 0x00 "AC0AG5,Alarm Configuration for Alarm Group 5 (j=0~2)" hexmask.long.word 0x00 0.--9. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 5" group.long ad:0xC0040664++0x03 line.long 0x00 "AC1AG5,Alarm Configuration for Alarm Group 5 (j=0~2)" hexmask.long.word 0x00 0.--9. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 5" group.long ad:0xC00406A4++0x03 line.long 0x00 "AC2AG5,Alarm Configuration for Alarm Group 5 (j=0~2)" hexmask.long.word 0x00 0.--9. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 5" group.long ad:0xC0040628++0x03 line.long 0x00 "AC0AG6,Alarm Configuration for Alarm Group 6 (j=0~2)" hexmask.long.word 0x00 23.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" hexmask.long.byte 0x00 14.--21. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" bitfld.long 0x00 7.--11. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--5. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC0040668++0x03 line.long 0x00 "AC1AG6,Alarm Configuration for Alarm Group 6 (j=0~2)" hexmask.long.word 0x00 23.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" hexmask.long.byte 0x00 14.--21. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" bitfld.long 0x00 7.--11. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--5. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC00406A8++0x03 line.long 0x00 "AC2AG6,Alarm Configuration for Alarm Group 6 (j=0~2)" hexmask.long.word 0x00 23.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" hexmask.long.byte 0x00 14.--21. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" bitfld.long 0x00 7.--11. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 1.--5. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC004062C++0x03 line.long 0x00 "AC0AG7,Alarm Configuration for Alarm Group 7 (j=0~2)" bitfld.long 0x00 27.--31. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 9.--24. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" bitfld.long 0x00 3.--5. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" "0,1,2,3" group.long ad:0xC004066C++0x03 line.long 0x00 "AC1AG7,Alarm Configuration for Alarm Group 7 (j=0~2)" bitfld.long 0x00 27.--31. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 9.--24. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" bitfld.long 0x00 3.--5. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" "0,1,2,3" group.long ad:0xC00406AC++0x03 line.long 0x00 "AC2AG7,Alarm Configuration for Alarm Group 7 (j=0~2)" bitfld.long 0x00 27.--31. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 9.--24. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" bitfld.long 0x00 3.--5. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 7" "0,1,2,3" group.long ad:0xC0040630++0x03 line.long 0x00 "AC0AG8,Alarm Configuration for Alarm Group 8 (j=0~2)" hexmask.long 0x00 2.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 8" bitfld.long 0x00 0. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 8" "0,1" group.long ad:0xC0040670++0x03 line.long 0x00 "AC1AG8,Alarm Configuration for Alarm Group 8 (j=0~2)" hexmask.long 0x00 2.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 8" bitfld.long 0x00 0. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 8" "0,1" group.long ad:0xC00406B0++0x03 line.long 0x00 "AC2AG8,Alarm Configuration for Alarm Group 8 (j=0~2)" hexmask.long 0x00 2.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 8" bitfld.long 0x00 0. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 8" "0,1" group.long ad:0xC0040634++0x03 line.long 0x00 "AC0AG9,Alarm Configuration for Alarm Group 9 (j=0~2)" hexmask.long 0x00 2.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 9" bitfld.long 0x00 0. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 9" "0,1" group.long ad:0xC0040674++0x03 line.long 0x00 "AC1AG9,Alarm Configuration for Alarm Group 9 (j=0~2)" hexmask.long 0x00 2.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 9" bitfld.long 0x00 0. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 9" "0,1" group.long ad:0xC00406B4++0x03 line.long 0x00 "AC2AG9,Alarm Configuration for Alarm Group 9 (j=0~2)" hexmask.long 0x00 2.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 9" bitfld.long 0x00 0. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 9" "0,1" group.long ad:0xC0040638++0x03 line.long 0x00 "AC0AG10,Alarm Configuration for Alarm Group 10 (j=0~2)" bitfld.long 0x00 31. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" "0,1" hexmask.long.tbyte 0x00 12.--28. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" bitfld.long 0x00 7.--10. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC0040678++0x03 line.long 0x00 "AC1AG10,Alarm Configuration for Alarm Group 10 (j=0~2)" bitfld.long 0x00 31. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" "0,1" hexmask.long.tbyte 0x00 12.--28. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" bitfld.long 0x00 7.--10. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC00406B8++0x03 line.long 0x00 "AC2AG10,Alarm Configuration for Alarm Group 10 (j=0~2)" bitfld.long 0x00 31. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" "0,1" hexmask.long.tbyte 0x00 12.--28. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" bitfld.long 0x00 7.--10. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--4. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC004063C++0x03 line.long 0x00 "AC0AG11,Alarm Configuration for Alarm Group 11 (j=0~2)" bitfld.long 0x00 30.--31. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 11" "0,1,2,3" hexmask.long.tbyte 0x00 12.--28. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 11" bitfld.long 0x00 3.--7. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC004067C++0x03 line.long 0x00 "AC1AG11,Alarm Configuration for Alarm Group 11 (j=0~2)" bitfld.long 0x00 30.--31. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 11" "0,1,2,3" hexmask.long.tbyte 0x00 12.--28. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 11" bitfld.long 0x00 3.--7. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC00406BC++0x03 line.long 0x00 "AC2AG11,Alarm Configuration for Alarm Group 11 (j=0~2)" bitfld.long 0x00 30.--31. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 11" "0,1,2,3" hexmask.long.tbyte 0x00 12.--28. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 11" bitfld.long 0x00 3.--7. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0xC0040640++0x03 line.long 0x00 "AC0AG12,Alarm Configuration for Alarm Group 12 (j=0~2)" hexmask.long.word 0x00 22.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 12" hexmask.long.word 0x00 0.--8. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 12" group.long ad:0xC0040680++0x03 line.long 0x00 "AC1AG12,Alarm Configuration for Alarm Group 12 (j=0~2)" hexmask.long.word 0x00 22.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 12" hexmask.long.word 0x00 0.--8. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 12" group.long ad:0xC00406C0++0x03 line.long 0x00 "AC2AG12,Alarm Configuration for Alarm Group 12 (j=0~2)" hexmask.long.word 0x00 22.--31. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 12" hexmask.long.word 0x00 0.--8. 1. "CFz,Configuration Flag j (j=0~2) for Alarm z belonging to Alarm Group 12" rgroup.long ad:0xC0040700++0x07 line.long 0x00 "DBG,Debug Register" bitfld.long 0x00 28.--31. "FSMSTS,FSM Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 27. "FSTS,Fault State Timing Status" "0,1" line.long 0x04 "ALMSTSCORE,Alarm Status for SAC_CORE" bitfld.long 0x04 31. "SFFAGC,SFF Alarm of AGC Register" "0,1" bitfld.long 0x04 30. "SFFAEX,SFF Alarm of AEX Register" "0,1" bitfld.long 0x04 29. "SFFFIPAGi,SFF Alarm of FIPAGi(i=0~12) Register" "0,1" bitfld.long 0x04 28. "SFFAC0AGi,SFF Alarm of AC0AGi(i=0~12) Register" "0,1" bitfld.long 0x04 27. "SFFAC1AGi,SFF Alarm of AC1AGi(i=0~12) Register" "0,1" bitfld.long 0x04 26. "SFFAC2AGi,SFF Alarm of AC2AGi(i=0~12) Register" "0,1" bitfld.long 0x04 25. "SFFCMD,SFF Alarm of CMD Register" "0,1" newline bitfld.long 0x04 24. "SFFFIP,SFF Alarm of FIP Register" "0,1" bitfld.long 0x04 23. "SFFSTS,SFF Alarm of STS Register" "0,1" bitfld.long 0x04 22. "SFFDBG,SFF Alarm of DBG Register" "0,1" bitfld.long 0x04 21. "SFFIETC,SFF Alarm of IETC Register" "0,1" bitfld.long 0x04 20. "SFFIETAC,SFF Alarm of IETAC Register" "0,1" bitfld.long 0x04 19. "SFFPCTL,SFF Alarm of PCTL Register" "0,1" bitfld.long 0x04 18. "SESAC,SE Alarm of SAC_CORE" "0,1" newline bitfld.long 0x04 17. "ALIVEALM,Core Alive Alarm" "0,1" bitfld.long 0x04 16. "COREFSMALM,SAC_CORE FSM Redundancy Alarm" "0,1" bitfld.long 0x04 14. "BITALM,Bit Redundancy Alarm of ALMCTRLCORE Register" "0,1" group.long ad:0xC0040708++0x03 line.long 0x00 "ALMCTRLCORE,Alarm Control for SAC_CORE" bitfld.long 0x00 30.--31. "SECLR,SE Alarm Clear" "0,1,2,3" bitfld.long 0x00 28.--29. "SFFCLR,SFF Alarm Clear" "0,1,2,3" bitfld.long 0x00 26.--27. "FSMCLR,SAC_CORE FSM Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 24.--25. "ALIVECLR,Core Alive Alarm Clear" "0,1,2,3" bitfld.long 0x00 22.--23. "FSMALMEN,FSM Redundancy Mechanism Enable Control" "0,1,2,3" bitfld.long 0x00 20.--21. "SFFALMEN,Redundancy Mechanism Enable Control" "0,1,2,3" bitfld.long 0x00 18.--19. "ALIVEALMEN,Core Alive Mechanism Enable Control" "0,1,2,3" newline bitfld.long 0x00 16.--17. "BUSERRMASK,Bus Error Mask" "0,1,2,3" tree.end tree "SAC_STDBY" group.long ad:0xD0060C00++0x07 line.long 0x00 "ASR20STDBY,SAC_STDBY Alarm Status Register for Alarm Group 20" hexmask.long.tbyte 0x00 13.--31. 1. "SFz,Status Flag" line.long 0x04 "ASR21STDBY,SAC_STDBY Alarm Status Register for Alarm Group 21" hexmask.long.byte 0x04 25.--31. 1. "SFz,Status Flag" hexmask.long.word 0x04 9.--23. 1. "SFz,Status Flag" group.long ad:0xD0060C10++0x07 line.long 0x00 "AG20FIPSTDBY,SAC_STDBY FIP Configuration for Alarm Group 20" hexmask.long.tbyte 0x00 13.--31. 1. "FCz,Fault Indication Configuration" bitfld.long 0x00 0. "BITPROT,AG20FIPSTDBY Register Bits Protection" "0,1" line.long 0x04 "AG21FIPSTDBY,SAC_STDBY FIP Configuration for Alarm Group 21" hexmask.long.byte 0x04 25.--31. 1. "FCz,Fault Indication Configuration" hexmask.long.word 0x04 9.--23. 1. "FCz,Fault Indication Configuration" bitfld.long 0x04 0. "BITPROT,AG21FIPSTDBY Register Bits Protection" "0,1" group.long ad:0xD0060C20++0x03 line.long 0x00 "CMDSTDBY,SAC_STDBY Command Register" bitfld.long 0x00 30. "BITPROT,CMD_STDBY Register Bits Protection" "0,1" bitfld.long 0x00 14.--15. "FAULTEN,SFF Fault Inject Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "RDALMEN,Redundancy Alarm Enable" "0,1,2,3" bitfld.long 0x00 10.--11. "BUSERRMASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x00 9. "ALMCLR,Alarm Clear" "0,1" bitfld.long 0x00 7.--8. "FIPCTRL,SAC_STDBY FIP Software Control" "0,1,2,3" bitfld.long 0x00 5.--6. "EMU,SAC_STDBY Emulation" "0,1,2,3" bitfld.long 0x00 4. "ACEN,SAC_STDBY Alarm Status Clear Enable" "0,1" newline bitfld.long 0x00 2.--3. "FIPEN,SAC_STDBY FIP Error Pin Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "STBEN,SAC_STDBY Module Enable" "0,1,2,3" rgroup.long ad:0xD0060C24++0x03 line.long 0x00 "ALMSTSSTDBY,SAC_STDBY Alarm Status Register" bitfld.long 0x00 13. "FAULTBIT,Bit Redundancy Alarm of FAULTEN" "0,1" bitfld.long 0x00 12. "FIPENBIT,Bit Redundancy Alarm of FIPEN" "0,1" bitfld.long 0x00 11. "SFFENBIT,Bit Redundancy Alarm of SFFEN" "0,1" bitfld.long 0x00 10. "MASKBIT,Bit Redundancy Alarm of BUSERRMASK" "0,1" bitfld.long 0x00 9. "STBENBIT,Bit Redundancy Alarm of STBEN" "0,1" bitfld.long 0x00 8. "EMUBIT,Bit Redundancy Alarm of EMU" "0,1" bitfld.long 0x00 7. "SEASR20,SE Alarm of ASR20STDBY Register" "0,1" bitfld.long 0x00 6. "SEASR21,SE Alarm of ASR21STDBY Register" "0,1" newline bitfld.long 0x00 5. "SEAG20FIP,SE Alarm of AG20FIPSTDBY Register" "0,1" bitfld.long 0x00 4. "SEAG21FIP,SE Alarm of AG21FIPSTDBY Register" "0,1" bitfld.long 0x00 3. "SECMD,SE Alarm of CMDSTDBY Register" "0,1" bitfld.long 0x00 2. "SFFAG20FIP,SFF Alarm of AG20FIPSTDBY Register" "0,1" bitfld.long 0x00 1. "SFFAG21FIP,SFF Alarm of AG21FIPSTDBY Register" "0,1" bitfld.long 0x00 0. "SFFCMD,SFF Alarm of CMDSTDBY Register" "0,1" tree.end tree "BUSPROT" tree "BUSPROT0" rgroup.long ad:0xC00B0000++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B0004++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B000C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B0010++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B0014++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0018++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B0028++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B002C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B0038++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B003C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B004C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B0050++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT1" rgroup.long ad:0xC00B0100++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B0104++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B010C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B0110++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B0114++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0118++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B0128++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B012C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B0138++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B013C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B014C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B0150++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT2" rgroup.long ad:0xC00B0200++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B0204++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B020C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B0210++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B0214++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0218++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B0228++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B022C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B0238++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B023C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B024C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B0250++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT3" rgroup.long ad:0xC00B0300++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B0304++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B030C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B0310++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B0314++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0318++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B0328++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B032C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B0338++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B033C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B034C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B0350++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT4" rgroup.long ad:0xC00B0400++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B0404++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B040C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B0410++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B0414++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0418++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B0428++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B042C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B0438++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B043C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B044C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B0450++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT5" rgroup.long ad:0xC00B0500++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B0504++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B050C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B0510++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B0514++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0518++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B0528++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B052C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B0538++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B053C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B054C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B0550++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT6" rgroup.long ad:0xC00B0600++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B0604++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B060C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B0610++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B0614++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0618++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B0628++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B062C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B0638++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B063C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B064C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B0650++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT7" rgroup.long ad:0xC00B0700++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B0704++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B070C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B0710++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B0714++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0718++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B0728++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B072C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B0738++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B073C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B074C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B0750++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT8" rgroup.long ad:0xC00B0800++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B0804++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B080C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B0810++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B0814++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0818++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B0828++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B082C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B0838++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B083C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B084C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B0850++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT9" rgroup.long ad:0xC00B0900++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B0904++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B090C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B0910++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B0914++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0918++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B0928++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B092C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B0938++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B093C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B094C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B0950++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT10" rgroup.long ad:0xC00B0A00++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B0A04++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B0A0C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B0A10++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B0A14++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0A18++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B0A28++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B0A2C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B0A38++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B0A3C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B0A4C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B0A50++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT11" rgroup.long ad:0xC00B1000++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B1004++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B100C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B1010++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B1014++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B1018++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B1028++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B102C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B1038++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B103C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B104C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B1050++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT12" rgroup.long ad:0xC00B1100++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B1104++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B110C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B1110++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B1114++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B1118++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B1128++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B112C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B1138++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B113C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B114C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B1150++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT13" rgroup.long ad:0xC00B1200++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B1204++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B120C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B1210++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B1214++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B1218++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B1228++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B122C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B1238++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B123C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B124C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B1250++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT14" rgroup.long ad:0xC00B1300++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B1304++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B130C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B1310++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B1314++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B1318++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B1328++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B132C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B1338++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B133C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B134C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B1350++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT15" rgroup.long ad:0xC00B1400++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B1404++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B140C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B1410++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B1414++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B1418++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B1428++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B142C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B1438++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B143C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B144C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B1450++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT16" rgroup.long ad:0xC00B1500++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B1504++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B150C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B1510++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B1514++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B1518++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B1528++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B152C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B1538++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B153C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B154C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B1550++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT17" rgroup.long ad:0xC00B1600++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B1604++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B160C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B1610++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B1614++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B1618++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B1628++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B162C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B1638++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B163C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B164C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B1650++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT18" rgroup.long ad:0xC00B1700++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B1704++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B170C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B1710++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B1714++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B1718++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B1728++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B172C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B1738++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B173C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B174C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B1750++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT19" rgroup.long ad:0xC00B1800++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B1804++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B180C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B1810++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B1814++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B1818++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B1828++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B182C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B1838++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B183C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B184C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B1850++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT20" rgroup.long ad:0xC00B2000++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2004++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B200C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2010++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2014++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2018++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2028++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B202C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2038++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B203C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B204C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2050++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT21" rgroup.long ad:0xC00B2100++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2104++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B210C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2110++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2114++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2118++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2128++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B212C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2138++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B213C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B214C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2150++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT22" rgroup.long ad:0xC00B2200++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2204++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B220C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2210++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2214++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2218++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2228++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B222C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2238++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B223C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B224C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2250++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT23" rgroup.long ad:0xC00B2300++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2304++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B230C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2310++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2314++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2318++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2328++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B232C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2338++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B233C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B234C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2350++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT24" rgroup.long ad:0xC00B2400++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2404++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B240C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2410++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2414++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2418++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2428++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B242C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2438++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B243C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B244C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2450++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT25" rgroup.long ad:0xC00B2500++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2504++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B250C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2510++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2514++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2518++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2528++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B252C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2538++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B253C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B254C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2550++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT26" rgroup.long ad:0xC00B2600++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2604++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B260C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2610++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2614++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2618++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2628++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B262C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2638++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B263C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B264C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2650++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT27" rgroup.long ad:0xC00B2700++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2704++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B270C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2710++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2714++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2718++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2728++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B272C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2738++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B273C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B274C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2750++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT28" rgroup.long ad:0xC00B2800++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2804++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B280C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2810++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2814++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2818++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2828++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B282C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2838++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B283C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B284C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2850++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT29" rgroup.long ad:0xC00B2900++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2904++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B290C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2910++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2914++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2918++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2928++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B292C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2938++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B293C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B294C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2950++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT30" rgroup.long ad:0xC00B2A00++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2A04++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B2A0C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2A10++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2A14++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2A18++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2A28++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2A2C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2A38++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B2A3C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B2A4C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2A50++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT31" rgroup.long ad:0xC00B2B00++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2B04++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B2B0C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2B10++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2B14++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2B18++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2B28++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2B2C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2B38++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B2B3C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B2B4C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2B50++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT32" rgroup.long ad:0xC00B2D00++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B2D04++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B2D0C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B2D10++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B2D14++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2D18++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B2D28++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B2D2C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B2D38++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B2D3C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B2D4C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B2D50++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT33" rgroup.long ad:0xC00B3000++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B3004++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B300C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B3010++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B3014++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3018++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B3028++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B302C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B3038++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B303C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B304C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B3050++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT34" rgroup.long ad:0xC00B3100++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B3104++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B310C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B3110++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B3114++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3118++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B3128++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B312C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B3138++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B313C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B314C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B3150++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT35" rgroup.long ad:0xC00B3200++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B3204++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B320C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B3210++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B3214++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3218++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B3228++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B322C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B3238++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B323C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B324C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B3250++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT36" rgroup.long ad:0xC00B3300++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B3304++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B330C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B3310++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B3314++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3318++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B3328++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B332C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B3338++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B333C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B334C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B3350++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT37" rgroup.long ad:0xC00B3400++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B3404++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B340C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B3410++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B3414++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3418++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B3428++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B342C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B3438++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B343C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B344C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B3450++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT38" rgroup.long ad:0xC00B3500++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B3504++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B350C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B3510++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B3514++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3518++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B3528++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B352C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B3538++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B353C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B354C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B3550++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT39" rgroup.long ad:0xC00B3600++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B3604++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B360C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B3610++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B3614++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3618++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B3628++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B362C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B3638++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B363C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B364C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B3650++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT40" rgroup.long ad:0xC00B3700++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B3704++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B370C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B3710++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B3714++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3718++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B3728++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B372C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B3738++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B373C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B374C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B3750++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT41" rgroup.long ad:0xC00B3800++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B3804++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B380C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B3810++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B3814++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3818++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B3828++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B382C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B3838++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B383C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B384C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B3850++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT42" rgroup.long ad:0xC00B3900++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B3904++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B390C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B3910++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B3914++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3918++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B3928++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B392C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B3938++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B393C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B394C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B3950++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree "BUSPROT43" rgroup.long ad:0xC00B3A00++0x03 line.long 0x00 "ID,BUSPROT Identification Register" bitfld.long 0x00 4.--7. "MOD_INTER,Module Interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "MOD_DIR,Module Direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00B3A04++0x03 line.long 0x00 "ACCEN,Access Enable Register" hexmask.long.word 0x00 0.--13. 1. "ACCEN,Access Enable for Master Device" group.long ad:0xC00B3A0C++0x03 line.long 0x00 "ACTRL,Access Control Register" bitfld.long 0x00 4.--5. "MIDPROT_EN,Master Identification Access Protection Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "MIDPROT_MOD,Master Identification Protect Mode" "0,1,2,3" bitfld.long 0x00 0.--1. "SW_ACCEN,Software Access Enable" "0,1,2,3" rgroup.long ad:0xC00B3A10++0x03 line.long 0x00 "HEDCPTY,AHB EDC Parity Register" hexmask.long.word 0x00 4.--13. 1. "SLAVE_ERR,Slave Error" bitfld.long 0x00 0.--1. "MASTER_ERR,Master Error" "0,1,2,3" wgroup.long ad:0xC00B3A14++0x03 line.long 0x00 "HERRCLR,AHB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3A18++0x0F line.long 0x00 "HERRINFO,AHB Error Information Register" bitfld.long 0x00 12.--13. "HTRANS_INFO,HTRANS Information" "0,1,2,3" bitfld.long 0x00 11. "HWRITE_INFO,HWRITE Information" "0,1" bitfld.long 0x00 10. "HMASTLOCK_INFO,HMASTLOCK Information" "0,1" bitfld.long 0x00 7.--9. "HSIZE_INFO,HSIZE Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. "HBURST_INFO,HBURST Information" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. "HPROT_INFO,HPROT Information" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "HERRADDR,AHB Error Address Register" line.long 0x08 "HERRDATA,AHB Error Data Register" line.long 0x0C "PEDCPTY,APB and AHB EDC Parity Register" bitfld.long 0x0C 10.--11. "ADR_ERR,AHB Address EDC Error" "0,1,2,3" hexmask.long.byte 0x0C 4.--9. 1. "PTY_ERR,Parity Error" bitfld.long 0x0C 0.--3. "EDC_ERR,APB EDC Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" wgroup.long ad:0xC00B3A28++0x03 line.long 0x00 "PERRCLR,APB Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" rgroup.long ad:0xC00B3A2C++0x0B line.long 0x00 "PERRADDR,APB Error Address Register" line.long 0x04 "PERRDATA,APB Error Data Register" line.long 0x08 "AERR,AXI Error Register" bitfld.long 0x08 8. "MID_ERR,MID Error" "0,1" bitfld.long 0x08 4.--7. "SLAVE_ERR,Slave Error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 0.--2. "MASTER_ERR,Master Error" "0,1,2,3,4,5,6,7" wgroup.long ad:0xC00B3A38++0x03 line.long 0x00 "AERRCLR,AXI Error Clear Register" bitfld.long 0x00 0.--1. "ERR_CLR,Error Clear" "0,1,2,3" group.long ad:0xC00B3A3C++0x0F line.long 0x00 "FATINJCTRL,Fault Injection Control Register" bitfld.long 0x00 4.--8. "POSTION,Position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 2.--3. "PTYINJEC_EN,Parity Fault Injection Enable" "0,1,2,3" bitfld.long 0x00 0.--1. "EDCINJEC_EN,EDC Fault Injection Enable" "0,1,2,3" line.long 0x04 "TMOUTHOLD,Timeout Threshold Register" line.long 0x08 "TMOUTCTRL,Timeout Control Register" bitfld.long 0x08 0.--1. "TMOUT_EN,Timeout Detection Enable" "0,1,2,3" line.long 0x0C "MSK,Mask Register" bitfld.long 0x0C 8.--9. "MIDALM_MASK,MID Alarm Mask" "0,1,2,3" bitfld.long 0x0C 6.--7. "TMALM_MASK,Timeout Alarm Mask" "0,1,2,3" bitfld.long 0x0C 4.--5. "REDUALM_MASK,Redundancy Alarm Mask" "0,1,2,3" bitfld.long 0x0C 2.--3. "BERR_MASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x0C 0.--1. "EDCPTYALM_MASK,EDC and Parity Alarm Mask" "0,1,2,3" wgroup.long ad:0xC00B3A4C++0x03 line.long 0x00 "ALMCLR,Alarm Clear Register" bitfld.long 0x00 6.--7. "REDUNALM_CLR,Redundancy Alarm Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "MIDALM_CLR,MID Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "TMOUTALM_CLR,Timeout Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALM_CLR,SE Alarm Clear" "0,1,2,3" rgroup.long ad:0xC00B3A50++0x03 line.long 0x00 "ALMSTS,Alarm Status Register" bitfld.long 0x00 11. "ALMCLR_STS,ALMCLR Alarm Status" "0,1" bitfld.long 0x00 10. "PFIJALM_STS,Parity Fault Injection Alarm Status" "0,1" bitfld.long 0x00 9. "BYPASSALM_STS,Bypass Alarm Status" "0,1" bitfld.long 0x00 8. "ACTRLALM_STS,ACTRL Alarm Status" "0,1" bitfld.long 0x00 7. "AERRCLRALM_STS,AERRCLR Alarm Status" "0,1" bitfld.long 0x00 6. "HERRCLRALM_STS,HERRCLR Alarm Status" "0,1" newline bitfld.long 0x00 5. "PERRCLRALM_STS,PERRCLR Alarm Status" "0,1" bitfld.long 0x00 4. "TMOUTCTRLALM_STS,TMOUTCTRL Alarm Status" "0,1" bitfld.long 0x00 3. "MSKALM_STS,MSK Alarm Status" "0,1" bitfld.long 0x00 2. "MIDALM_STS,MID Alarm Status" "0,1" bitfld.long 0x00 1. "TMOUTALM_STS,Timeout Alarm Status" "0,1" bitfld.long 0x00 0. "SEALM_STS,SE Alarm Status" "0,1" tree.end tree.end tree "ES" group.long ad:0xC0040004++0x03 line.long 0x00 "ESCTRL,Emergency Stop Control Register" hexmask.long.word 0x00 18.--27. 1. "PBGFCNT,PortB Glitch Filter Counter" rbitfld.long 0x00 17. "SEMSF,SAC Emergency Stop Flag" "0,1" rbitfld.long 0x00 16. "EMSF,Emergency Stop Flag" "0,1" bitfld.long 0x00 4. "PBGFEN,PortB Glitch Filter Enable" "0,1" bitfld.long 0x00 3. "PSEL,Port Select" "0,1" bitfld.long 0x00 2. "ENON,Enable On" "0,1" bitfld.long 0x00 1. "MODE,Mode Selection" "0,1" bitfld.long 0x00 0. "POL,Input Polarity" "0,1" wgroup.long ad:0xC0040008++0x03 line.long 0x00 "ESCMD,Emergency Stop Command Register" bitfld.long 0x00 26.--27. "SEMSFM,SAC Emergency Stop Flag Modification" "0,1,2,3" bitfld.long 0x00 24.--25. "EMSFM,Emergency Stop Flag Modification" "0,1,2,3" bitfld.long 0x00 22.--23. "ALMCLR,Alarm State Clear Alarm Status Register Clear Control" "0,1,2,3" bitfld.long 0x00 20.--21. "SFFALMEN,SFF and Bit Alarm Enable" "0,1,2,3" bitfld.long 0x00 18.--19. "BUSMASK,Bus Error Mask" "0,1,2,3" rgroup.long ad:0xC004000C++0x03 line.long 0x00 "ALMSTS,Alarm State Register" bitfld.long 0x00 27. "SFFCTRL,SFF Alarm Status of ESCTRL" "0,1" bitfld.long 0x00 26. "SFFCMD,SFF Alarm Status of ESCMD" "0,1" bitfld.long 0x00 25. "SFFALMSTS,SFF Alarm Status of ALMSTS" "0,1" bitfld.long 0x00 24. "SEALM,SE Alarm Status of ESCTRL" "0,1" bitfld.long 0x00 23. "BITALM,Bit Alarm Status of ALMCLR Control Bit Redundant" "0,1" tree.end tree "IOM" group.long ad:0xB0058000++0x03 line.long 0x00 "CKCON,Clock Control" hexmask.long.byte 0x00 8.--15. 1. "CKDIV,IOM Clock Divider Value" group.long ad:0xB0058030++0x0F line.long 0x00 "EMUCCFG,EMU Counter Configuration" bitfld.long 0x00 28.--31. "TEC3,The Threshold for Event Counter 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "CXEC3,Channel Mux for Event Counter3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "TEC2,Threshold for Event Counter 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "CXEC2,Channel Mux for Event Counter 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. "TEC1,Threshold for Event Counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8.--11. "CXEC1,Channel Mux for Event Counter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "TEC0,Threshold for Event Counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "CXEC0,Channel Mux for Event Counter 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "EMUESEL,EMU Event Selection" bitfld.long 0x04 19. "CCES3,Counted Channel Event Select" "0,1" bitfld.long 0x04 18. "CCES2,Counted Channel Event Select" "0,1" bitfld.long 0x04 17. "CCES1,Counted Channel Event Select" "0,1" bitfld.long 0x04 16. "CCES0,Counted Channel Event Select" "0,1" bitfld.long 0x04 15. "RCES15,Raw Channel Event Select" "0,1" bitfld.long 0x04 14. "RCES14,Raw Channel Event Select" "0,1" bitfld.long 0x04 13. "RCES13,Raw Channel Event Select" "0,1" bitfld.long 0x04 12. "RCES12,Raw Channel Event Select" "0,1" bitfld.long 0x04 11. "RCES11,Raw Channel Event Select" "0,1" newline bitfld.long 0x04 10. "RCES10,Raw Channel Event Select" "0,1" bitfld.long 0x04 9. "RCES9,Raw Channel Event Select" "0,1" bitfld.long 0x04 8. "RCES8,Raw Channel Event Select" "0,1" bitfld.long 0x04 7. "RCES7,Raw Channel Event Select" "0,1" bitfld.long 0x04 6. "RCES6,Raw Channel Event Select" "0,1" bitfld.long 0x04 5. "RCES5,Raw Channel Event Select" "0,1" bitfld.long 0x04 4. "RCES4,Raw Channel Event Select" "0,1" bitfld.long 0x04 3. "RCES3,Raw Channel Event Select" "0,1" bitfld.long 0x04 2. "RCES2,Raw Channel Event Select" "0,1" newline bitfld.long 0x04 1. "RCES1,Raw Channel Event Select" "0,1" bitfld.long 0x04 0. "RCES0,Raw Channel Event Select" "0,1" line.long 0x08 "EMUEHR0,EMU Event History Register0" bitfld.long 0x08 31. "AEH1C15,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 30. "AEH1C14,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 29. "AEH1C13,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 28. "AEH1C12,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 27. "AEH1C11,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 26. "AEH1C10,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 25. "AEH1C9,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 24. "AEH1C8,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 23. "AEH1C7,Alarm Triggered Event History 1 for Channel i" "0,1" newline bitfld.long 0x08 22. "AEH1C6,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 21. "AEH1C5,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 20. "AEH1C4,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 19. "AEH1C3,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 18. "AEH1C2,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 17. "AEH1C1,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 16. "AEH1C0,Alarm Triggered Event History 1 for Channel i" "0,1" bitfld.long 0x08 15. "AEH0C15,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 14. "AEH0C14,Alarm Triggered Event History 0 for Channel i" "0,1" newline bitfld.long 0x08 13. "AEH0C13,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 12. "AEH0C12,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 11. "AEH0C11,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 10. "AEH0C10,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 9. "AEH0C9,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 8. "AEH0C8,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 7. "AEH0C7,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 6. "AEH0C6,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 5. "AEH0C5,Alarm Triggered Event History 0 for Channel i" "0,1" newline bitfld.long 0x08 4. "AEH0C4,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 3. "AEH0C3,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 2. "AEH0C2,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 1. "AEH0C1,Alarm Triggered Event History 0 for Channel i" "0,1" bitfld.long 0x08 0. "AEH0C0,Alarm Triggered Event History 0 for Channel i" "0,1" line.long 0x0C "EMUEHR1,EMU Event History Register1" bitfld.long 0x0C 31. "AEH3C15,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 30. "AEH3C14,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 29. "AEH3C13,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 28. "AEH3C12,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 27. "AEH3C11,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 26. "AEH3C10,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 25. "AEH3C9,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 24. "AEH3C8,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 23. "AEH3C7,Alarm Triggered Event History 3 for Channel i" "0,1" newline bitfld.long 0x0C 22. "AEH3C6,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 21. "AEH3C5,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 20. "AEH3C4,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 19. "AEH3C3,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 18. "AEH3C2,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 17. "AEH3C1,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 16. "AEH3C0,Alarm Triggered Event History 3 for Channel i" "0,1" bitfld.long 0x0C 15. "AEH2C15,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 14. "AEH2C14,Alarm Triggered Event History 2 for Channel i" "0,1" newline bitfld.long 0x0C 13. "AEH2C13,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 12. "AEH2C12,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 11. "AEH2C11,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 10. "AEH2C10,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 9. "AEH2C9,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 8. "AEH2C8,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 7. "AEH2C7,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 6. "AEH2C6,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 5. "AEH2C5,Alarm Triggered Event History 2 for Channel i" "0,1" newline bitfld.long 0x0C 4. "AEH2C4,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 3. "AEH2C3,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 2. "AEH2C2,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 1. "AEH2C1,Alarm Triggered Event History 2 for Channel i" "0,1" bitfld.long 0x0C 0. "AEH2C0,Alarm Triggered Event History 2 for Channel i" "0,1" group.long ad:0xB0058078++0x03 line.long 0x00 "PPUESTS,PPU Edge Status" bitfld.long 0x00 31. "REDC15,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 30. "REDC14,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 29. "REDC13,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 28. "REDC12,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 27. "REDC11,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 26. "REDC10,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 25. "REDC9,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 24. "REDC8,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 23. "REDC7,Rising Edge Detected for Channel i" "0,1" newline bitfld.long 0x00 22. "REDC6,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 21. "REDC5,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 20. "REDC4,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 19. "REDC3,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 18. "REDC2,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 17. "REDC1,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 16. "REDC0,Rising Edge Detected for Channel i" "0,1" bitfld.long 0x00 15. "FEDC15,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 14. "FEDC14,Falling Edge Detected for Channel i" "0,1" newline bitfld.long 0x00 13. "FEDC13,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 12. "FEDC12,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 11. "FEDC11,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 10. "FEDC10,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 9. "FEDC9,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 8. "FEDC8,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 7. "FEDC7,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 6. "FEDC6,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 5. "FEDC5,Falling Edge Detected for Channel i" "0,1" newline bitfld.long 0x00 4. "FEDC4,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 3. "FEDC3,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 2. "FEDC2,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 1. "FEDC1,Falling Edge Detected for Channel i" "0,1" bitfld.long 0x00 0. "FEDC0,Falling Edge Detected for Channel i" "0,1" group.long ad:0xB0058080++0xBF line.long 0x00 "PPUCON0,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x00 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x00 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x00 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x00 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x04 "PPUCON1,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x04 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x04 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x04 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x04 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x04 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x08 "PPUCON2,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x08 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x08 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x08 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x08 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x08 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x0C "PPUCON3,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x0C 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x0C 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x0C 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x0C 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x10 "PPUCON4,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x10 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x10 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x10 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x10 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x10 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x14 "PPUCON5,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x14 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x14 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x14 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x14 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x14 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x18 "PPUCON6,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x18 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x18 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x18 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x18 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x18 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x1C "PPUCON7,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x1C 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x1C 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x1C 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x1C 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x1C 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x20 "PPUCON8,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x20 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x20 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x20 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x20 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x20 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x24 "PPUCON9,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x24 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x24 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x24 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x24 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x24 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x28 "PPUCON10,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x28 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x28 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x28 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x28 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x28 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x2C "PPUCON11,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x2C 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x2C 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x2C 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x2C 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x30 "PPUCON12,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x30 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x30 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x30 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x30 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x30 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x34 "PPUCON13,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x34 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x34 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x34 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x34 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x34 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x38 "PPUCON14,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x38 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x38 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x38 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x38 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x38 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x3C "PPUCON15,PPU Control (For Channel i) (i = 0~15)" bitfld.long 0x3C 24.--26. "RSEL,Reference Selection for PPU Channel i" "0,1,2,3,4,5,6,7" bitfld.long 0x3C 22. "TBMOD,Timer Behavior Mode for PPU Channel i" "0,1" bitfld.long 0x3C 19.--20. "MSEL,Monitor Selection for PPU Channel i" "0,1,2,3" bitfld.long 0x3C 16.--18. "OMSEL,Operation Mode Selection for PPU Channel i" "0,1,2,3,4,5,6,7" hexmask.long.word 0x3C 0.--15. 1. "FTHR,Filter Threshold for PPU Channel i" line.long 0x40 "PPUTVAL0,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x40 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x44 "PPUTVAL1,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x44 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x48 "PPUTVAL2,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x48 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x4C "PPUTVAL3,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x4C 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x50 "PPUTVAL4,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x50 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x54 "PPUTVAL5,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x54 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x58 "PPUTVAL6,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x58 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x5C "PPUTVAL7,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x5C 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x60 "PPUTVAL8,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x60 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x64 "PPUTVAL9,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x64 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x68 "PPUTVAL10,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x68 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x6C "PPUTVAL11,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x6C 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x70 "PPUTVAL12,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x70 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x74 "PPUTVAL13,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x74 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x78 "PPUTVAL14,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x78 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x7C "PPUTVAL15,PPU Timer Value (For Channel i) (i = 0~15)" hexmask.long.word 0x7C 0.--15. 1. "TVAL,Timer Value for PPU Channel i" line.long 0x80 "LPUEWSTS0,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0x80 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0x80 0.--23. 1. "CVAL,Counter Value at Event" line.long 0x84 "LPUEWSTS1,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0x84 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0x84 0.--23. 1. "CVAL,Counter Value at Event" line.long 0x88 "LPUEWSTS2,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0x88 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0x88 0.--23. 1. "CVAL,Counter Value at Event" line.long 0x8C "LPUEWSTS3,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0x8C 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0x8C 0.--23. 1. "CVAL,Counter Value at Event" line.long 0x90 "LPUEWSTS4,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0x90 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0x90 0.--23. 1. "CVAL,Counter Value at Event" line.long 0x94 "LPUEWSTS5,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0x94 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0x94 0.--23. 1. "CVAL,Counter Value at Event" line.long 0x98 "LPUEWSTS6,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0x98 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0x98 0.--23. 1. "CVAL,Counter Value at Event" line.long 0x9C "LPUEWSTS7,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0x9C 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0x9C 0.--23. 1. "CVAL,Counter Value at Event" line.long 0xA0 "LPUEWSTS8,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0xA0 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0xA0 0.--23. 1. "CVAL,Counter Value at Event" line.long 0xA4 "LPUEWSTS9,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0xA4 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0xA4 0.--23. 1. "CVAL,Counter Value at Event" line.long 0xA8 "LPUEWSTS10,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0xA8 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0xA8 0.--23. 1. "CVAL,Counter Value at Event" line.long 0xAC "LPUEWSTS11,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0xAC 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0xAC 0.--23. 1. "CVAL,Counter Value at Event" line.long 0xB0 "LPUEWSTS12,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0xB0 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0xB0 0.--23. 1. "CVAL,Counter Value at Event" line.long 0xB4 "LPUEWSTS13,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0xB4 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0xB4 0.--23. 1. "CVAL,Counter Value at Event" line.long 0xB8 "LPUEWSTS14,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0xB8 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0xB8 0.--23. 1. "CVAL,Counter Value at Event" line.long 0xBC "LPUEWSTS15,LPU Event Window Status (For Channel j) (j=0~15)" bitfld.long 0xBC 31. "COVF,Counter Overflow Status for LPU Channel j" "0,1" hexmask.long.tbyte 0xBC 0.--23. 1. "CVAL,Counter Value at Event" group.long ad:0xB0058180++0x8B line.long 0x00 "LPUCFG0,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x00 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x00 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x00 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x00 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x00 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x00 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x00 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x04 "LPUCFG1,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x04 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x04 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x04 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x04 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x04 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x04 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x04 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x08 "LPUCFG2,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x08 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x08 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x08 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x08 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x08 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x08 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x08 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x0C "LPUCFG3,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x0C 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x0C 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x0C 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x0C 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x0C 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x0C 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x0C 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x10 "LPUCFG4,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x10 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x10 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x10 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x10 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x10 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x10 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x10 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x14 "LPUCFG5,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x14 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x14 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x14 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x14 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x14 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x14 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x14 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x14 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x18 "LPUCFG6,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x18 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x18 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x18 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x18 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x18 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x18 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x18 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x1C "LPUCFG7,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x1C 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x1C 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x1C 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x1C 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x1C 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x1C 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x1C 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x1C 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x20 "LPUCFG8,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x20 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x20 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x20 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x20 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x20 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x20 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x20 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x20 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x24 "LPUCFG9,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x24 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x24 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x24 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x24 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x24 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x24 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x24 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x24 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x28 "LPUCFG10,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x28 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x28 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x28 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x28 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x28 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x28 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x28 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x28 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x2C "LPUCFG11,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x2C 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x2C 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x2C 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x2C 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x2C 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x2C 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x2C 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x2C 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x30 "LPUCFG12,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x30 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x30 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x30 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x30 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x30 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x30 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x30 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x34 "LPUCFG13,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x34 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x34 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x34 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x34 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x34 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x34 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x34 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x38 "LPUCFG14,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x38 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x38 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x38 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x38 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x38 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x38 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x38 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x38 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x3C "LPUCFG15,LPU Configuration (For Channel j) (j=0~15)" bitfld.long 0x3C 20.--23. "RSEL,Reference Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 16.--19. "MSEL,Monitor Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 12. "IVW,Invert Event Window for LPU Channel j" "0,1" bitfld.long 0x3C 8.--11. "EDS,Event Window Active Edge Selection for LPU Channel j" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x3C 5. "EDIS,Event Disable for LPU Channel j" "0,1" bitfld.long 0x3C 4. "EWSEL,Event Window Selection for LPU Channel j" "0,1" bitfld.long 0x3C 3. "EMSEL,Event Window Mode Selection for LPU Channel j" "0,1" bitfld.long 0x3C 2. "MSSEL,Monitor Source Selection for LPU Channel j" "0,1" bitfld.long 0x3C 1. "IVM,Invert Monitor for LPU Channel j" "0,1" newline bitfld.long 0x3C 0. "IVR,Invert Reference for LPU Channel j" "0,1" line.long 0x40 "LPUEWC0,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x40 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x44 "LPUEWC1,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x44 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x48 "LPUEWC2,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x48 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x4C "LPUEWC3,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x4C 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x50 "LPUEWC4,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x50 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x54 "LPUEWC5,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x54 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x58 "LPUEWC6,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x58 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x5C "LPUEWC7,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x5C 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x60 "LPUEWC8,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x60 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x64 "LPUEWC9,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x64 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x68 "LPUEWC10,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x68 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x6C "LPUEWC11,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x6C 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x70 "LPUEWC12,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x70 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x74 "LPUEWC13,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x74 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x78 "LPUEWC14,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x78 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x7C "LPUEWC15,LPU Event Window Configuration (for Channel j) (j=0~15)" hexmask.long.tbyte 0x7C 0.--23. 1. "EWTHR,Event Window Threshold for LPU Channel j" line.long 0x80 "SAFETYSTS,Functional Safety Module Status Register" bitfld.long 0x80 4. "SAFENALM,IOM SAFEN Register Detection Flag" "0,1" bitfld.long 0x80 3. "CFGALM,EMUCCFG Register Detection Flag" "0,1" bitfld.long 0x80 2. "DIVALM,CKCON Register Detection Flag" "0,1" bitfld.long 0x80 1. "SAFESE,Safety Related Registers SE Protection Flag" "0,1" bitfld.long 0x80 0. "DIVEP,CKCON.CKDIV E Protection Flag" "0,1" line.long 0x84 "IOMSAFEN,IOM Safety Enable Register" bitfld.long 0x84 2.--3. "FAULTEN,Redundancy Safety Mechanism Fault Injection Enable" "0,1,2,3" bitfld.long 0x84 0.--1. "SAFEN,Redundancy Safety Mechanism Enable" "0,1,2,3" line.long 0x88 "IOMMASKR,IOM Mask Register" bitfld.long 0x88 0. "BEMASK,Bus Error Mask" "0,1" tree.end tree "ECRC" rgroup.long ad:0xC014014C++0x03 line.long 0x00 "CHSTR,Channel Status Register" bitfld.long 0x00 7. "CH7,Channel 7 Status" "0,1" bitfld.long 0x00 6. "CH6,Channel 6 Status" "0,1" bitfld.long 0x00 5. "CH5,Channel 5 Status" "0,1" bitfld.long 0x00 4. "CH4,Channel 4 Status" "0,1" bitfld.long 0x00 3. "CH3,Channel 3 Status" "0,1" bitfld.long 0x00 2. "CH2,Channel 2 Status" "0,1" bitfld.long 0x00 1. "CH1,Channel 1 Status" "0,1" bitfld.long 0x00 0. "CH0,Channel 0 Status" "0,1" wgroup.long ad:0xC0140140++0x03 line.long 0x00 "MRSTCLR,Module Reset Status Clear Register" bitfld.long 0x00 0. "CLR,Module Reset Status Clear" "0,1" group.long ad:0xC0140144++0x07 line.long 0x00 "MRSTR1,Module Reset Register 1" bitfld.long 0x00 0. "RST,Module Reset" "0,1" line.long 0x04 "MRSTR0,Module Reset Register 0" rbitfld.long 0x04 1. "RSTST,Module Reset Status" "0,1" bitfld.long 0x04 0. "RST,Module Reset" "0,1" group.long ad:0xC0140000++0x03 line.long 0x00 "CHIN0,Channel Input Register n (n=0~7)" group.long ad:0xC0140028++0x03 line.long 0x00 "CHIN1,Channel Input Register n (n=0~7)" group.long ad:0xC0140050++0x03 line.long 0x00 "CHIN2,Channel Input Register n (n=0~7)" group.long ad:0xC0140078++0x03 line.long 0x00 "CHIN3,Channel Input Register n (n=0~7)" group.long ad:0xC01400A0++0x03 line.long 0x00 "CHIN4,Channel Input Register n (n=0~7)" group.long ad:0xC01400C8++0x03 line.long 0x00 "CHIN5,Channel Input Register n (n=0~7)" group.long ad:0xC01400F0++0x03 line.long 0x00 "CHIN6,Channel Input Register n (n=0~7)" group.long ad:0xC0140118++0x03 line.long 0x00 "CHIN7,Channel Input Register n (n=0~7)" rgroup.long ad:0xC0140004++0x03 line.long 0x00 "CHRES0,Channel Result Register n (n=0~7)" rgroup.long ad:0xC014002C++0x03 line.long 0x00 "CHRES1,Channel Result Register n (n=0~7)" rgroup.long ad:0xC0140054++0x03 line.long 0x00 "CHRES2,Channel Result Register n (n=0~7)" rgroup.long ad:0xC014007C++0x03 line.long 0x00 "CHRES3,Channel Result Register n (n=0~7)" rgroup.long ad:0xC01400A4++0x03 line.long 0x00 "CHRES4,Channel Result Register n (n=0~7)" rgroup.long ad:0xC01400CC++0x03 line.long 0x00 "CHRES5,Channel Result Register n (n=0~7)" rgroup.long ad:0xC01400F4++0x03 line.long 0x00 "CHRES6,Channel Result Register n (n=0~7)" rgroup.long ad:0xC014011C++0x03 line.long 0x00 "CHRES7,Channel Result Register n (n=0~7)" group.long ad:0xC0140008++0x03 line.long 0x00 "CHCFG0,Channel Configuration Register n (n=0~7)" bitfld.long 0x00 16.--19. "KERNEL,CRC Kernel Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "BYTESWAP,Swaps the Order of the Bytes in the CHIN Input Register" "0,1" bitfld.long 0x00 10. "XOUT,XOR Value with the Final CRC" "0,1" bitfld.long 0x00 9. "BITREFOUT,CRC Bit Wise Reflection" "0,1" bitfld.long 0x00 8. "BYTEREFIN,CHIN Byte Wise Reflection" "0,1" bitfld.long 0x00 5. "RELOAD,Automatic Length Reload" "0,1" bitfld.long 0x00 4. "CHKEN,CRC Check Comparison Enable" "0,1" bitfld.long 0x00 3. "BFI,Bus Fault Interrupt Mask" "0,1" bitfld.long 0x00 2. "LFI,Length Fault Interrupt Mask" "0,1" newline bitfld.long 0x00 1. "CFI,Configuration Fault Interrupt Mask" "0,1" bitfld.long 0x00 0. "CMI,CRC Mismatch Interrupt Mask" "0,1" group.long ad:0xC0140030++0x03 line.long 0x00 "CHCFG1,Channel Configuration Register n (n=0~7)" bitfld.long 0x00 16.--19. "KERNEL,CRC Kernel Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "BYTESWAP,Swaps the Order of the Bytes in the CHIN Input Register" "0,1" bitfld.long 0x00 10. "XOUT,XOR Value with the Final CRC" "0,1" bitfld.long 0x00 9. "BITREFOUT,CRC Bit Wise Reflection" "0,1" bitfld.long 0x00 8. "BYTEREFIN,CHIN Byte Wise Reflection" "0,1" bitfld.long 0x00 5. "RELOAD,Automatic Length Reload" "0,1" bitfld.long 0x00 4. "CHKEN,CRC Check Comparison Enable" "0,1" bitfld.long 0x00 3. "BFI,Bus Fault Interrupt Mask" "0,1" bitfld.long 0x00 2. "LFI,Length Fault Interrupt Mask" "0,1" newline bitfld.long 0x00 1. "CFI,Configuration Fault Interrupt Mask" "0,1" bitfld.long 0x00 0. "CMI,CRC Mismatch Interrupt Mask" "0,1" group.long ad:0xC0140058++0x03 line.long 0x00 "CHCFG2,Channel Configuration Register n (n=0~7)" bitfld.long 0x00 16.--19. "KERNEL,CRC Kernel Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "BYTESWAP,Swaps the Order of the Bytes in the CHIN Input Register" "0,1" bitfld.long 0x00 10. "XOUT,XOR Value with the Final CRC" "0,1" bitfld.long 0x00 9. "BITREFOUT,CRC Bit Wise Reflection" "0,1" bitfld.long 0x00 8. "BYTEREFIN,CHIN Byte Wise Reflection" "0,1" bitfld.long 0x00 5. "RELOAD,Automatic Length Reload" "0,1" bitfld.long 0x00 4. "CHKEN,CRC Check Comparison Enable" "0,1" bitfld.long 0x00 3. "BFI,Bus Fault Interrupt Mask" "0,1" bitfld.long 0x00 2. "LFI,Length Fault Interrupt Mask" "0,1" newline bitfld.long 0x00 1. "CFI,Configuration Fault Interrupt Mask" "0,1" bitfld.long 0x00 0. "CMI,CRC Mismatch Interrupt Mask" "0,1" group.long ad:0xC0140080++0x03 line.long 0x00 "CHCFG3,Channel Configuration Register n (n=0~7)" bitfld.long 0x00 16.--19. "KERNEL,CRC Kernel Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "BYTESWAP,Swaps the Order of the Bytes in the CHIN Input Register" "0,1" bitfld.long 0x00 10. "XOUT,XOR Value with the Final CRC" "0,1" bitfld.long 0x00 9. "BITREFOUT,CRC Bit Wise Reflection" "0,1" bitfld.long 0x00 8. "BYTEREFIN,CHIN Byte Wise Reflection" "0,1" bitfld.long 0x00 5. "RELOAD,Automatic Length Reload" "0,1" bitfld.long 0x00 4. "CHKEN,CRC Check Comparison Enable" "0,1" bitfld.long 0x00 3. "BFI,Bus Fault Interrupt Mask" "0,1" bitfld.long 0x00 2. "LFI,Length Fault Interrupt Mask" "0,1" newline bitfld.long 0x00 1. "CFI,Configuration Fault Interrupt Mask" "0,1" bitfld.long 0x00 0. "CMI,CRC Mismatch Interrupt Mask" "0,1" group.long ad:0xC01400A8++0x03 line.long 0x00 "CHCFG4,Channel Configuration Register n (n=0~7)" bitfld.long 0x00 16.--19. "KERNEL,CRC Kernel Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "BYTESWAP,Swaps the Order of the Bytes in the CHIN Input Register" "0,1" bitfld.long 0x00 10. "XOUT,XOR Value with the Final CRC" "0,1" bitfld.long 0x00 9. "BITREFOUT,CRC Bit Wise Reflection" "0,1" bitfld.long 0x00 8. "BYTEREFIN,CHIN Byte Wise Reflection" "0,1" bitfld.long 0x00 5. "RELOAD,Automatic Length Reload" "0,1" bitfld.long 0x00 4. "CHKEN,CRC Check Comparison Enable" "0,1" bitfld.long 0x00 3. "BFI,Bus Fault Interrupt Mask" "0,1" bitfld.long 0x00 2. "LFI,Length Fault Interrupt Mask" "0,1" newline bitfld.long 0x00 1. "CFI,Configuration Fault Interrupt Mask" "0,1" bitfld.long 0x00 0. "CMI,CRC Mismatch Interrupt Mask" "0,1" group.long ad:0xC01400D0++0x03 line.long 0x00 "CHCFG5,Channel Configuration Register n (n=0~7)" bitfld.long 0x00 16.--19. "KERNEL,CRC Kernel Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "BYTESWAP,Swaps the Order of the Bytes in the CHIN Input Register" "0,1" bitfld.long 0x00 10. "XOUT,XOR Value with the Final CRC" "0,1" bitfld.long 0x00 9. "BITREFOUT,CRC Bit Wise Reflection" "0,1" bitfld.long 0x00 8. "BYTEREFIN,CHIN Byte Wise Reflection" "0,1" bitfld.long 0x00 5. "RELOAD,Automatic Length Reload" "0,1" bitfld.long 0x00 4. "CHKEN,CRC Check Comparison Enable" "0,1" bitfld.long 0x00 3. "BFI,Bus Fault Interrupt Mask" "0,1" bitfld.long 0x00 2. "LFI,Length Fault Interrupt Mask" "0,1" newline bitfld.long 0x00 1. "CFI,Configuration Fault Interrupt Mask" "0,1" bitfld.long 0x00 0. "CMI,CRC Mismatch Interrupt Mask" "0,1" group.long ad:0xC01400F8++0x03 line.long 0x00 "CHCFG6,Channel Configuration Register n (n=0~7)" bitfld.long 0x00 16.--19. "KERNEL,CRC Kernel Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "BYTESWAP,Swaps the Order of the Bytes in the CHIN Input Register" "0,1" bitfld.long 0x00 10. "XOUT,XOR Value with the Final CRC" "0,1" bitfld.long 0x00 9. "BITREFOUT,CRC Bit Wise Reflection" "0,1" bitfld.long 0x00 8. "BYTEREFIN,CHIN Byte Wise Reflection" "0,1" bitfld.long 0x00 5. "RELOAD,Automatic Length Reload" "0,1" bitfld.long 0x00 4. "CHKEN,CRC Check Comparison Enable" "0,1" bitfld.long 0x00 3. "BFI,Bus Fault Interrupt Mask" "0,1" bitfld.long 0x00 2. "LFI,Length Fault Interrupt Mask" "0,1" newline bitfld.long 0x00 1. "CFI,Configuration Fault Interrupt Mask" "0,1" bitfld.long 0x00 0. "CMI,CRC Mismatch Interrupt Mask" "0,1" group.long ad:0xC0140120++0x03 line.long 0x00 "CHCFG7,Channel Configuration Register n (n=0~7)" bitfld.long 0x00 16.--19. "KERNEL,CRC Kernel Select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "BYTESWAP,Swaps the Order of the Bytes in the CHIN Input Register" "0,1" bitfld.long 0x00 10. "XOUT,XOR Value with the Final CRC" "0,1" bitfld.long 0x00 9. "BITREFOUT,CRC Bit Wise Reflection" "0,1" bitfld.long 0x00 8. "BYTEREFIN,CHIN Byte Wise Reflection" "0,1" bitfld.long 0x00 5. "RELOAD,Automatic Length Reload" "0,1" bitfld.long 0x00 4. "CHKEN,CRC Check Comparison Enable" "0,1" bitfld.long 0x00 3. "BFI,Bus Fault Interrupt Mask" "0,1" bitfld.long 0x00 2. "LFI,Length Fault Interrupt Mask" "0,1" newline bitfld.long 0x00 1. "CFI,Configuration Fault Interrupt Mask" "0,1" bitfld.long 0x00 0. "CMI,CRC Mismatch Interrupt Mask" "0,1" group.long ad:0xC014000C++0x03 line.long 0x00 "CSR0,CRC Status Register n (n=0~7)" bitfld.long 0x00 7. "RESFLAG,Result Flag" "0,1" bitfld.long 0x00 6. "FMICHK,CHTST.FCHK Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 5. "FMICFG,CHTST.FCFG Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 4. "FMICRC,CHTST.FCRC Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 3. "BFST,Bus Fault Status" "0,1" bitfld.long 0x00 2. "LFST,Length Fault Status" "0,1" bitfld.long 0x00 1. "CFST,Configuration Fault Status" "0,1" bitfld.long 0x00 0. "CMST,CRC Mismatch Status" "0,1" group.long ad:0xC0140034++0x03 line.long 0x00 "CSR1,CRC Status Register n (n=0~7)" bitfld.long 0x00 7. "RESFLAG,Result Flag" "0,1" bitfld.long 0x00 6. "FMICHK,CHTST.FCHK Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 5. "FMICFG,CHTST.FCFG Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 4. "FMICRC,CHTST.FCRC Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 3. "BFST,Bus Fault Status" "0,1" bitfld.long 0x00 2. "LFST,Length Fault Status" "0,1" bitfld.long 0x00 1. "CFST,Configuration Fault Status" "0,1" bitfld.long 0x00 0. "CMST,CRC Mismatch Status" "0,1" group.long ad:0xC014005C++0x03 line.long 0x00 "CSR2,CRC Status Register n (n=0~7)" bitfld.long 0x00 7. "RESFLAG,Result Flag" "0,1" bitfld.long 0x00 6. "FMICHK,CHTST.FCHK Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 5. "FMICFG,CHTST.FCFG Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 4. "FMICRC,CHTST.FCRC Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 3. "BFST,Bus Fault Status" "0,1" bitfld.long 0x00 2. "LFST,Length Fault Status" "0,1" bitfld.long 0x00 1. "CFST,Configuration Fault Status" "0,1" bitfld.long 0x00 0. "CMST,CRC Mismatch Status" "0,1" group.long ad:0xC0140084++0x03 line.long 0x00 "CSR3,CRC Status Register n (n=0~7)" bitfld.long 0x00 7. "RESFLAG,Result Flag" "0,1" bitfld.long 0x00 6. "FMICHK,CHTST.FCHK Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 5. "FMICFG,CHTST.FCFG Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 4. "FMICRC,CHTST.FCRC Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 3. "BFST,Bus Fault Status" "0,1" bitfld.long 0x00 2. "LFST,Length Fault Status" "0,1" bitfld.long 0x00 1. "CFST,Configuration Fault Status" "0,1" bitfld.long 0x00 0. "CMST,CRC Mismatch Status" "0,1" group.long ad:0xC01400AC++0x03 line.long 0x00 "CSR4,CRC Status Register n (n=0~7)" bitfld.long 0x00 7. "RESFLAG,Result Flag" "0,1" bitfld.long 0x00 6. "FMICHK,CHTST.FCHK Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 5. "FMICFG,CHTST.FCFG Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 4. "FMICRC,CHTST.FCRC Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 3. "BFST,Bus Fault Status" "0,1" bitfld.long 0x00 2. "LFST,Length Fault Status" "0,1" bitfld.long 0x00 1. "CFST,Configuration Fault Status" "0,1" bitfld.long 0x00 0. "CMST,CRC Mismatch Status" "0,1" group.long ad:0xC01400D4++0x03 line.long 0x00 "CSR5,CRC Status Register n (n=0~7)" bitfld.long 0x00 7. "RESFLAG,Result Flag" "0,1" bitfld.long 0x00 6. "FMICHK,CHTST.FCHK Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 5. "FMICFG,CHTST.FCFG Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 4. "FMICRC,CHTST.FCRC Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 3. "BFST,Bus Fault Status" "0,1" bitfld.long 0x00 2. "LFST,Length Fault Status" "0,1" bitfld.long 0x00 1. "CFST,Configuration Fault Status" "0,1" bitfld.long 0x00 0. "CMST,CRC Mismatch Status" "0,1" group.long ad:0xC01400FC++0x03 line.long 0x00 "CSR6,CRC Status Register n (n=0~7)" bitfld.long 0x00 7. "RESFLAG,Result Flag" "0,1" bitfld.long 0x00 6. "FMICHK,CHTST.FCHK Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 5. "FMICFG,CHTST.FCFG Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 4. "FMICRC,CHTST.FCRC Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 3. "BFST,Bus Fault Status" "0,1" bitfld.long 0x00 2. "LFST,Length Fault Status" "0,1" bitfld.long 0x00 1. "CFST,Configuration Fault Status" "0,1" bitfld.long 0x00 0. "CMST,CRC Mismatch Status" "0,1" group.long ad:0xC0140124++0x03 line.long 0x00 "CSR7,CRC Status Register n (n=0~7)" bitfld.long 0x00 7. "RESFLAG,Result Flag" "0,1" bitfld.long 0x00 6. "FMICHK,CHTST.FCHK Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 5. "FMICFG,CHTST.FCFG Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 4. "FMICRC,CHTST.FCRC Multi-bit Redundancy Fault Status" "0,1" bitfld.long 0x00 3. "BFST,Bus Fault Status" "0,1" bitfld.long 0x00 2. "LFST,Length Fault Status" "0,1" bitfld.long 0x00 1. "CFST,Configuration Fault Status" "0,1" bitfld.long 0x00 0. "CMST,CRC Mismatch Status" "0,1" group.long ad:0xC0140010++0x03 line.long 0x00 "CHLEN0,Channel Length Register n (n=0~7)" hexmask.long.word 0x00 0.--15. 1. "LEN,Message Length" group.long ad:0xC0140038++0x03 line.long 0x00 "CHLEN1,Channel Length Register n (n=0~7)" hexmask.long.word 0x00 0.--15. 1. "LEN,Message Length" group.long ad:0xC0140060++0x03 line.long 0x00 "CHLEN2,Channel Length Register n (n=0~7)" hexmask.long.word 0x00 0.--15. 1. "LEN,Message Length" group.long ad:0xC0140088++0x03 line.long 0x00 "CHLEN3,Channel Length Register n (n=0~7)" hexmask.long.word 0x00 0.--15. 1. "LEN,Message Length" group.long ad:0xC01400B0++0x03 line.long 0x00 "CHLEN4,Channel Length Register n (n=0~7)" hexmask.long.word 0x00 0.--15. 1. "LEN,Message Length" group.long ad:0xC01400D8++0x03 line.long 0x00 "CHLEN5,Channel Length Register n (n=0~7)" hexmask.long.word 0x00 0.--15. 1. "LEN,Message Length" group.long ad:0xC0140100++0x03 line.long 0x00 "CHLEN6,Channel Length Register n (n=0~7)" hexmask.long.word 0x00 0.--15. 1. "LEN,Message Length" group.long ad:0xC0140128++0x03 line.long 0x00 "CHLEN7,Channel Length Register n (n=0~7)" hexmask.long.word 0x00 0.--15. 1. "LEN,Message Length" group.long ad:0xC0140014++0x03 line.long 0x00 "CHCHK0,Channel Check Register n (n=0~7)" group.long ad:0xC014003C++0x03 line.long 0x00 "CHCHK1,Channel Check Register n (n=0~7)" group.long ad:0xC0140064++0x03 line.long 0x00 "CHCHK2,Channel Check Register n (n=0~7)" group.long ad:0xC014008C++0x03 line.long 0x00 "CHCHK3,Channel Check Register n (n=0~7)" group.long ad:0xC01400B4++0x03 line.long 0x00 "CHCHK4,Channel Check Register n (n=0~7)" group.long ad:0xC01400DC++0x03 line.long 0x00 "CHCHK5,Channel Check Register n (n=0~7)" group.long ad:0xC0140104++0x03 line.long 0x00 "CHCHK6,Channel Check Register n (n=0~7)" group.long ad:0xC014012C++0x03 line.long 0x00 "CHCHK7,Channel Check Register n (n=0~7)" group.long ad:0xC0140018++0x03 line.long 0x00 "CHCRC0,Channel CRC Register n (n=0~7)" group.long ad:0xC0140040++0x03 line.long 0x00 "CHCRC1,Channel CRC Register n (n=0~7)" group.long ad:0xC0140068++0x03 line.long 0x00 "CHCRC2,Channel CRC Register n (n=0~7)" group.long ad:0xC0140090++0x03 line.long 0x00 "CHCRC3,Channel CRC Register n (n=0~7)" group.long ad:0xC01400B8++0x03 line.long 0x00 "CHCRC4,Channel CRC Register n (n=0~7)" group.long ad:0xC01400E0++0x03 line.long 0x00 "CHCRC5,Channel CRC Register n (n=0~7)" group.long ad:0xC0140108++0x03 line.long 0x00 "CHCRC6,Channel CRC Register n (n=0~7)" group.long ad:0xC0140130++0x03 line.long 0x00 "CHCRC7,Channel CRC Register n (n=0~7)" group.long ad:0xC014001C++0x03 line.long 0x00 "CHTST0,Channel Test Register n (n=0~7)" bitfld.long 0x00 4.--5. "FCHK,Force Check Register Mismatch" "0,1,2,3" bitfld.long 0x00 2.--3. "FCFG,Force CHCFG Register Mismatch" "0,1,2,3" bitfld.long 0x00 0.--1. "FCRC,Force CRC Mismatch" "0,1,2,3" group.long ad:0xC0140044++0x03 line.long 0x00 "CHTST1,Channel Test Register n (n=0~7)" bitfld.long 0x00 4.--5. "FCHK,Force Check Register Mismatch" "0,1,2,3" bitfld.long 0x00 2.--3. "FCFG,Force CHCFG Register Mismatch" "0,1,2,3" bitfld.long 0x00 0.--1. "FCRC,Force CRC Mismatch" "0,1,2,3" group.long ad:0xC014006C++0x03 line.long 0x00 "CHTST2,Channel Test Register n (n=0~7)" bitfld.long 0x00 4.--5. "FCHK,Force Check Register Mismatch" "0,1,2,3" bitfld.long 0x00 2.--3. "FCFG,Force CHCFG Register Mismatch" "0,1,2,3" bitfld.long 0x00 0.--1. "FCRC,Force CRC Mismatch" "0,1,2,3" group.long ad:0xC0140094++0x03 line.long 0x00 "CHTST3,Channel Test Register n (n=0~7)" bitfld.long 0x00 4.--5. "FCHK,Force Check Register Mismatch" "0,1,2,3" bitfld.long 0x00 2.--3. "FCFG,Force CHCFG Register Mismatch" "0,1,2,3" bitfld.long 0x00 0.--1. "FCRC,Force CRC Mismatch" "0,1,2,3" group.long ad:0xC01400BC++0x03 line.long 0x00 "CHTST4,Channel Test Register n (n=0~7)" bitfld.long 0x00 4.--5. "FCHK,Force Check Register Mismatch" "0,1,2,3" bitfld.long 0x00 2.--3. "FCFG,Force CHCFG Register Mismatch" "0,1,2,3" bitfld.long 0x00 0.--1. "FCRC,Force CRC Mismatch" "0,1,2,3" group.long ad:0xC01400E4++0x03 line.long 0x00 "CHTST5,Channel Test Register n (n=0~7)" bitfld.long 0x00 4.--5. "FCHK,Force Check Register Mismatch" "0,1,2,3" bitfld.long 0x00 2.--3. "FCFG,Force CHCFG Register Mismatch" "0,1,2,3" bitfld.long 0x00 0.--1. "FCRC,Force CRC Mismatch" "0,1,2,3" group.long ad:0xC014010C++0x03 line.long 0x00 "CHTST6,Channel Test Register n (n=0~7)" bitfld.long 0x00 4.--5. "FCHK,Force Check Register Mismatch" "0,1,2,3" bitfld.long 0x00 2.--3. "FCFG,Force CHCFG Register Mismatch" "0,1,2,3" bitfld.long 0x00 0.--1. "FCRC,Force CRC Mismatch" "0,1,2,3" group.long ad:0xC0140134++0x03 line.long 0x00 "CHTST7,Channel Test Register n (n=0~7)" bitfld.long 0x00 4.--5. "FCHK,Force Check Register Mismatch" "0,1,2,3" bitfld.long 0x00 2.--3. "FCFG,Force CHCFG Register Mismatch" "0,1,2,3" bitfld.long 0x00 0.--1. "FCRC,Force CRC Mismatch" "0,1,2,3" rgroup.long ad:0xC0140020++0x03 line.long 0x00 "ALMSTR0,Alarm Status Register n (n=0~7)" bitfld.long 0x00 6. "SENCRE,Safety Enable Clear Redundancy Error" "0,1" bitfld.long 0x00 5. "SENRE,Safety Enable Redundancy Error" "0,1" bitfld.long 0x00 4. "SECRE,Safety ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 3. "ECRE,ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 2. "SEST,Safety ENDINIT Status" "0,1" bitfld.long 0x00 1. "ESTRST,ENDINIT Status" "0,1" bitfld.long 0x00 0. "ESTCFG,ENDINIT Status" "0,1" rgroup.long ad:0xC0140048++0x03 line.long 0x00 "ALMSTR1,Alarm Status Register n (n=0~7)" bitfld.long 0x00 6. "SENCRE,Safety Enable Clear Redundancy Error" "0,1" bitfld.long 0x00 5. "SENRE,Safety Enable Redundancy Error" "0,1" bitfld.long 0x00 4. "SECRE,Safety ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 3. "ECRE,ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 2. "SEST,Safety ENDINIT Status" "0,1" bitfld.long 0x00 1. "ESTRST,ENDINIT Status" "0,1" bitfld.long 0x00 0. "ESTCFG,ENDINIT Status" "0,1" rgroup.long ad:0xC0140070++0x03 line.long 0x00 "ALMSTR2,Alarm Status Register n (n=0~7)" bitfld.long 0x00 6. "SENCRE,Safety Enable Clear Redundancy Error" "0,1" bitfld.long 0x00 5. "SENRE,Safety Enable Redundancy Error" "0,1" bitfld.long 0x00 4. "SECRE,Safety ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 3. "ECRE,ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 2. "SEST,Safety ENDINIT Status" "0,1" bitfld.long 0x00 1. "ESTRST,ENDINIT Status" "0,1" bitfld.long 0x00 0. "ESTCFG,ENDINIT Status" "0,1" rgroup.long ad:0xC0140098++0x03 line.long 0x00 "ALMSTR3,Alarm Status Register n (n=0~7)" bitfld.long 0x00 6. "SENCRE,Safety Enable Clear Redundancy Error" "0,1" bitfld.long 0x00 5. "SENRE,Safety Enable Redundancy Error" "0,1" bitfld.long 0x00 4. "SECRE,Safety ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 3. "ECRE,ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 2. "SEST,Safety ENDINIT Status" "0,1" bitfld.long 0x00 1. "ESTRST,ENDINIT Status" "0,1" bitfld.long 0x00 0. "ESTCFG,ENDINIT Status" "0,1" rgroup.long ad:0xC01400C0++0x03 line.long 0x00 "ALMSTR4,Alarm Status Register n (n=0~7)" bitfld.long 0x00 6. "SENCRE,Safety Enable Clear Redundancy Error" "0,1" bitfld.long 0x00 5. "SENRE,Safety Enable Redundancy Error" "0,1" bitfld.long 0x00 4. "SECRE,Safety ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 3. "ECRE,ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 2. "SEST,Safety ENDINIT Status" "0,1" bitfld.long 0x00 1. "ESTRST,ENDINIT Status" "0,1" bitfld.long 0x00 0. "ESTCFG,ENDINIT Status" "0,1" rgroup.long ad:0xC01400E8++0x03 line.long 0x00 "ALMSTR5,Alarm Status Register n (n=0~7)" bitfld.long 0x00 6. "SENCRE,Safety Enable Clear Redundancy Error" "0,1" bitfld.long 0x00 5. "SENRE,Safety Enable Redundancy Error" "0,1" bitfld.long 0x00 4. "SECRE,Safety ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 3. "ECRE,ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 2. "SEST,Safety ENDINIT Status" "0,1" bitfld.long 0x00 1. "ESTRST,ENDINIT Status" "0,1" bitfld.long 0x00 0. "ESTCFG,ENDINIT Status" "0,1" rgroup.long ad:0xC0140110++0x03 line.long 0x00 "ALMSTR6,Alarm Status Register n (n=0~7)" bitfld.long 0x00 6. "SENCRE,Safety Enable Clear Redundancy Error" "0,1" bitfld.long 0x00 5. "SENRE,Safety Enable Redundancy Error" "0,1" bitfld.long 0x00 4. "SECRE,Safety ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 3. "ECRE,ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 2. "SEST,Safety ENDINIT Status" "0,1" bitfld.long 0x00 1. "ESTRST,ENDINIT Status" "0,1" bitfld.long 0x00 0. "ESTCFG,ENDINIT Status" "0,1" rgroup.long ad:0xC0140138++0x03 line.long 0x00 "ALMSTR7,Alarm Status Register n (n=0~7)" bitfld.long 0x00 6. "SENCRE,Safety Enable Clear Redundancy Error" "0,1" bitfld.long 0x00 5. "SENRE,Safety Enable Redundancy Error" "0,1" bitfld.long 0x00 4. "SECRE,Safety ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 3. "ECRE,ENDINIT Clear Redundancy Error" "0,1" bitfld.long 0x00 2. "SEST,Safety ENDINIT Status" "0,1" bitfld.long 0x00 1. "ESTRST,ENDINIT Status" "0,1" bitfld.long 0x00 0. "ESTCFG,ENDINIT Status" "0,1" wgroup.long ad:0xC0140024++0x03 line.long 0x00 "ALMCLR0,Alarm Clear Register n (n=0~7)" bitfld.long 0x00 4.--5. "SENAC,Safety Enable Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SEAC,Safety ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "EAC,ENDINIT Alarm Clear" "0,1,2,3" wgroup.long ad:0xC014004C++0x03 line.long 0x00 "ALMCLR1,Alarm Clear Register n (n=0~7)" bitfld.long 0x00 4.--5. "SENAC,Safety Enable Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SEAC,Safety ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "EAC,ENDINIT Alarm Clear" "0,1,2,3" wgroup.long ad:0xC0140074++0x03 line.long 0x00 "ALMCLR2,Alarm Clear Register n (n=0~7)" bitfld.long 0x00 4.--5. "SENAC,Safety Enable Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SEAC,Safety ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "EAC,ENDINIT Alarm Clear" "0,1,2,3" wgroup.long ad:0xC014009C++0x03 line.long 0x00 "ALMCLR3,Alarm Clear Register n (n=0~7)" bitfld.long 0x00 4.--5. "SENAC,Safety Enable Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SEAC,Safety ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "EAC,ENDINIT Alarm Clear" "0,1,2,3" wgroup.long ad:0xC01400C4++0x03 line.long 0x00 "ALMCLR4,Alarm Clear Register n (n=0~7)" bitfld.long 0x00 4.--5. "SENAC,Safety Enable Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SEAC,Safety ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "EAC,ENDINIT Alarm Clear" "0,1,2,3" wgroup.long ad:0xC01400EC++0x03 line.long 0x00 "ALMCLR5,Alarm Clear Register n (n=0~7)" bitfld.long 0x00 4.--5. "SENAC,Safety Enable Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SEAC,Safety ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "EAC,ENDINIT Alarm Clear" "0,1,2,3" wgroup.long ad:0xC0140114++0x03 line.long 0x00 "ALMCLR6,Alarm Clear Register n (n=0~7)" bitfld.long 0x00 4.--5. "SENAC,Safety Enable Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SEAC,Safety ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "EAC,ENDINIT Alarm Clear" "0,1,2,3" wgroup.long ad:0xC014013C++0x03 line.long 0x00 "ALMCLR7,Alarm Clear Register n (n=0~7)" bitfld.long 0x00 4.--5. "SENAC,Safety Enable Alarm Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SEAC,Safety ENDINIT Alarm Clear" "0,1,2,3" bitfld.long 0x00 0.--1. "EAC,ENDINIT Alarm Clear" "0,1,2,3" group.long ad:0xC0140150++0x07 line.long 0x00 "SAFETYEN,Safety Enable Register" bitfld.long 0x00 0.--1. "RSEN,Redundancy Safety Enable" "0,1,2,3" line.long 0x04 "MASKR,Mask Register" bitfld.long 0x04 0. "BEMASK,Bus Error Mask" "0,1" tree.end tree "SAFEWDT" group.long ad:0xC0040800++0x03 line.long 0x00 "PW0,Password Register 0" hexmask.long.word 0x00 0.--13. 1. "PW0,PW0 Key" wgroup.long ad:0xC0040804++0x03 line.long 0x00 "PWLOCK,Password Lock Register" bitfld.long 0x00 2. "WDTPWLCK,WDTPW Locking Signal" "0,1" bitfld.long 0x00 1. "SEPWLCK,SEPW Locking Signal" "0,1" bitfld.long 0x00 0. "PW0LCK,PW0 Locking Signal" "0,1" group.long ad:0xC0040808++0x17 line.long 0x00 "PWMAI,Password Mode and Initialization Register" bitfld.long 0x00 30.--31. "SEPWM,SEPW Mode Selection" "0,1,2,3" hexmask.long.word 0x00 16.--29. 1. "SEPWINIT,SEPW Initialization Password" bitfld.long 0x00 14.--15. "WDTPWM,WDTPWM Mode Selection" "0,1,2,3" hexmask.long.word 0x00 0.--13. 1. "WDTPWINIT,WDTPW Initialization Password" line.long 0x04 "PW0CNT,Password Counter Register 0" hexmask.long.word 0x04 0.--15. 1. "PW0CNT,PW0 Unlocked Counter Threshold" line.long 0x08 "SEPWCNT,SE Password Counter Register" hexmask.long.word 0x08 0.--15. 1. "SEPWCNT,SEPW Unlocked Counter Threshold" line.long 0x0C "SETHV,SE Threshold Value Register" hexmask.long.word 0x0C 0.--15. 1. "SETHV,SE Counter Threshold" line.long 0x10 "SEPW,SE Password Register" hexmask.long.word 0x10 0.--13. 1. "SEPW,SEPW Password" line.long 0x14 "SECNTEN,SE Counter Enable Register" bitfld.long 0x14 0.--1. "SECNTEN,SE Counter Enable" "0,1,2,3" wgroup.long ad:0xC0040820++0x03 line.long 0x00 "SECNTC,SE Counter Control Register" bitfld.long 0x00 2.--3. "SESTOP,SE Counter Stop" "0,1,2,3" bitfld.long 0x00 0.--1. "SESTART,SE Counter Start" "0,1,2,3" group.long ad:0xC0040824++0x1F line.long 0x00 "WDTPWCNT,WDT Password Counter Register" hexmask.long.word 0x00 0.--15. 1. "WDTPWCNT,WDTPW Unlocked Counter Threshold" line.long 0x04 "WDTLEN,WDT Low Enable Register" bitfld.long 0x04 1. "WDTLEN2,Low Threshold of WDT Second Window Interval Enable" "0,1" bitfld.long 0x04 0. "WDTLEN1,Low Threshold of WDT First Window Interval Enable" "0,1" line.long 0x08 "WDTLTHV0,WDT Low Threshold Value Register 0" hexmask.long.tbyte 0x08 0.--16. 1. "WDTLTHV0,WDT Low Threshold Value 0" line.long 0x0C "WDTHTHV0,WDT High Threshold Value Register 0" hexmask.long.tbyte 0x0C 0.--16. 1. "WDTHTHV0,WDT High Threshold Value 0" line.long 0x10 "WDTLTHV1,WDT Low Threshold Value Register 1" hexmask.long.tbyte 0x10 0.--16. 1. "WDTLTHV1,WDT Low Threshold Value 1" line.long 0x14 "WDTHTHV1,WDT High Threshold Value Register 1" hexmask.long.tbyte 0x14 0.--16. 1. "WDTHTHV1,WDT High Threshold Value 1" line.long 0x18 "WDTPW,WDT Password Register" hexmask.long.word 0x18 0.--13. 1. "WDTPW,WDTPW Password" line.long 0x1C "WDTCNTEN,WDT Counter Enable Register" bitfld.long 0x1C 0.--1. "WDTCNTEN,WDT Counter Enable" "0,1,2,3" wgroup.long ad:0xC0040844++0x03 line.long 0x00 "WDTCNTC,WDT Counter Control Register" bitfld.long 0x00 0.--1. "WDTSERVICE,WDT Service" "0,1,2,3" group.long ad:0xC0040848++0x0B line.long 0x00 "CLKMNG,Clock Manage Register" bitfld.long 0x00 6. "LPSEN,Low Power Signal Enable" "0,1" bitfld.long 0x00 3.--5. "SECLKDIV,SE Clock Divisor" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. "WDTCLKDIV,WDT Clock Divisor" "0,1,2,3,4,5,6,7" line.long 0x04 "OUTM,Output Mode Register" bitfld.long 0x04 1. "WDTOUTM1,WDT First Interval Error Output Mode" "0,1" bitfld.long 0x04 0. "SEOUTM,SE Error Output Mode" "0,1" line.long 0x08 "SAFECOREID,Safety Core ID Register" bitfld.long 0x08 0.--1. "SAFECOREID,Safety Core ID" "0,1,2,3" rgroup.long ad:0xC0040854++0x13 line.long 0x00 "SESTS,SE Status Register" bitfld.long 0x00 16. "SEOUTSTS,SE Output Status" "0,1" hexmask.long.word 0x00 0.--15. 1. "SECNT,SE Counter Value" line.long 0x04 "WDTCNTVAL,WDT Counter Value Register" hexmask.long.tbyte 0x04 0.--17. 1. "CNTVAL,WDT Counter Value" line.long 0x08 "SWSTS,SAFEWDT Status Register" bitfld.long 0x08 4. "WDTPWSTS,WDTPW Unlock Status" "0,1" bitfld.long 0x08 3. "SEPWSTS,SEPW Unlock Status" "0,1" bitfld.long 0x08 2. "PW0STS,PW0 Unlock Status" "0,1" bitfld.long 0x08 1. "SWMLPI,SAFEWDT Module Low Power Indication" "0,1" bitfld.long 0x08 0. "WDTLPI,WDT Low Power Indication" "0,1" line.long 0x0C "SWALMSTS,SAFEWDT Alarm Status Register" bitfld.long 0x0C 4. "SWREGALM,SAFEWDT Register Bit Redundancy Mechanism Alarm Status" "0,1" bitfld.long 0x0C 3. "SWALM,SAFEWDT Alarm Status" "0,1" bitfld.long 0x0C 2. "WDTALM2,WDT Second Interval Alarm Status" "0,1" bitfld.long 0x0C 1. "WDTALM1,WDT First Interval Alarm Status" "0,1" bitfld.long 0x0C 0. "SEALM,SE Alarm Status" "0,1" line.long 0x10 "SWINTSTS,SAFEWDT Interrupt Status Register" bitfld.long 0x10 1. "WDTINT1,WDT First Interval Interrupt Status" "0,1" bitfld.long 0x10 0. "SEINT,SE Interrupt Status" "0,1" group.long ad:0xC0040868++0x03 line.long 0x00 "SAFEWDTEN,SAFEWDT Alarm and Interrupt Enable Register" bitfld.long 0x00 16.--17. "REGALMEN,SAFEWDT Register Bit Redundancy Mechanism Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 14.--15. "SWALMEN,SAFEWDT Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 12.--13. "SWMLPIE,SAFEWDT Module Low Power Status Report Enable" "0,1,2,3" bitfld.long 0x00 10.--11. "WDTLPIE,WDT Low Power Status Report Enable" "0,1,2,3" bitfld.long 0x00 8.--9. "WDTALME2,WDT Second Interval Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 6.--7. "WDTINTE1,WDT First Interval Interrupt Enable" "0,1,2,3" bitfld.long 0x00 4.--5. "WDTALME1,WDT First Interval Alarm Report Enable" "0,1,2,3" bitfld.long 0x00 2.--3. "SEINTE,SE Interrupt Enable" "0,1,2,3" newline bitfld.long 0x00 0.--1. "SEALME,SE Alarm Reporting Enable" "0,1,2,3" wgroup.long ad:0xC004086C++0x03 line.long 0x00 "SAFEWDTCL,SAFEWDT Clear Register" bitfld.long 0x00 16.--17. "SWREGALMC,SWREGALM Status Clear" "0,1,2,3" bitfld.long 0x00 14.--15. "SWALMC,SWALM Status Clear" "0,1,2,3" bitfld.long 0x00 12.--13. "WDTLPIC,WDTLPI Status Clear" "0,1,2,3" bitfld.long 0x00 10.--11. "SWMLPIC,SWMLPI Status Clear" "0,1,2,3" bitfld.long 0x00 8.--9. "WDTALMC2,WDTALM2 Status Clear" "0,1,2,3" bitfld.long 0x00 6.--7. "WDTINTC1,WDTINT1 Status Clear" "0,1,2,3" bitfld.long 0x00 4.--5. "WDTALMC1,WDTALM1 Status Clear" "0,1,2,3" bitfld.long 0x00 2.--3. "SEINTC,SEINT Status Clear" "0,1,2,3" newline bitfld.long 0x00 0.--1. "SEALMC,SEALM Status Clear" "0,1,2,3" group.long ad:0xC0040870++0x0B line.long 0x00 "SWMASK,SAFEWDT Alarm and Bus Error Mask Register" bitfld.long 0x00 10.--11. "BEMASK,Bus Error Mask" "0,1,2,3" bitfld.long 0x00 8.--9. "REGALMMK,SAFEWDT Register Bit Redundancy Mechanism Alarm Mask" "0,1,2,3" bitfld.long 0x00 6.--7. "SWALMMK,SAFEWDT Alarm Mask" "0,1,2,3" bitfld.long 0x00 4.--5. "WDTALM2MK,WDT Second Interval Alarm Mask" "0,1,2,3" bitfld.long 0x00 2.--3. "WDTALM1MK,WDT First Interval Alarm Mask" "0,1,2,3" bitfld.long 0x00 0.--1. "SEALMMK,SE Alarm Mask" "0,1,2,3" line.long 0x04 "SWINTMASK,SAFEWDT Interrupt Mask Register" bitfld.long 0x04 2.--3. "WDTINT1MK,WDT First Interval Interrupt Mask" "0,1,2,3" bitfld.long 0x04 0.--1. "SEINTMK,SE Interrupt Mask" "0,1,2,3" line.long 0x08 "DBGHWCKEN,Debug Hardware Clock Gating Enable Register" bitfld.long 0x08 0. "DBGHWEN,Debug Hardware Clock Gating Enable" "0,1" tree.end tree "DWC Ether QOS" autoindent.on center tree tree "EQOS_MAC" group.long ad:0xC00BC000++0x2F line.long 0x00 "MAC_Configuration,The MAC Configuration Register establishes the operating mode of the MAC." rbitfld.long 0x00 31. "Reserved_ARPEN,Reserved" "0,1" newline bitfld.long 0x00 28.--30. "SARC,Source Address Insertion or Replacement Control This field controls the source address insertion or replacement for all transmitted packets" "0: SA_CTRL_IN,?,2: MAC0_INS_SA,3: MAC0_REP_SA,?,?,6: MAC1_INS_SA,7: MAC1_REP_SA" newline bitfld.long 0x00 27. "IPC,Checksum Offload When set this bit enables the IPv4 header checksum checking and IPv4 or IPv6 TCP UDP or ICMP payload checksum checking" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 24.--26. "IPG,Inter-Packet Gap These bits control the minimum IPG between packets during transmission" "0: IPG96,1: IPG88,2: IPG80,3: IPG72,4: IPG64,5: IPG56,6: IPG48,7: IPG40" newline bitfld.long 0x00 23. "GPSLCE,Giant Packet Size Limit Control Enable When this bit is set the MAC considers the value in GPSL field in MAC_Ext_Configuration register to declare a received packet as Giant packet" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 22. "S2KP,IEEE 802.3as Support for 2K Packets When this bit is set the MAC considers all packets with up to 2 000 bytes length as normal packets" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 21. "CST,CRC stripping for Type packets" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 20. "ACS,Automatic Pad or CRC Stripping" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 19. "WD,Watchdog Disable When this bit is set the MAC disables the watchdog timer on the receiver" "0: ENABLE,1: DISABLE" newline bitfld.long 0x00 18. "BE,Packet Burst Enable When this bit is set the MAC allows packet bursting during transmission in the GMII half-duplex mode" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 17. "JD,Jabber Disable When this bit is set the MAC disables the jabber timer on the transmitter" "0: ENABLE,1: DISABLE" newline bitfld.long 0x00 16. "JE,Jumbo Packet Enable When this bit is set the MAC allows jumbo packets of 9 018 bytes (9 022 bytes for VLAN tagged packets) without reporting a giant packet error in the Rx packet status" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 15. "PS,Port Select This bit selects the Ethernet line speed" "0: M_1000_2500M,1: M_10_100M" newline bitfld.long 0x00 14. "FES,Speed This bit selects the speed mode" "0: M_10_1000M,1: M_100_2500M" newline bitfld.long 0x00 13. "DM,Duplex Mode When this bit is set the MAC operates in the full-duplex mode in which it can transmit and receive simultaneously" "0: HDUPLX,1: FDUPLX" newline bitfld.long 0x00 12. "LM,Loopback Mode When this bit is set the MAC operates in the loopback mode at GMII or MII" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 11. "ECRSFD,Enable Carrier Sense Before Transmission in Full-Duplex Mode When this bit is set the MAC transmitter checks the CRS signal before packet transmission in the full-duplex mode" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 10. "DO,Disable Receive Own When this bit is set the MAC disables the reception of packets when the gmii_txen_o is asserted in the half-duplex mode" "0: ENABLE,1: DISABLE" newline bitfld.long 0x00 9. "DCRS,Disable Carrier Sense During Transmission When this bit is set the MAC transmitter ignores the (G)MII CRS signal during packet transmission in the half-duplex mode" "0: ENABLE,1: DISABLE" newline bitfld.long 0x00 8. "DR,Disable Retry When this bit is set the MAC attempts only one transmission" "0: ENABLE,1: DISABLE" newline rbitfld.long 0x00 7. "Reserved_7,Reserved" "0,1" newline bitfld.long 0x00 5.--6. "BL,Back-Off Limit The back-off limit determines the random integer number (r) of slot time delays (4 096 bit times for 1000/2500 Mbps 512 bit times for 10/100 Mbps) for which the MAC waits before rescheduling a transmission attempt during retries after.." "0: MIN_N_10,1: MIN_N_8,2: MIN_N_4,3: MIN_N_1" newline bitfld.long 0x00 4. "DC,Deferral Check When this bit is set the deferral check function is enabled in the MAC" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 2.--3. "PRELEN,Preamble Length for Transmit packets These bits control the number of preamble bytes that are added to the beginning of every Tx packet" "0: M_7BYTES,1: M_5BYTES,2: M_3BYTES,3: RESERVED" newline bitfld.long 0x00 1. "TE,Transmitter Enable When this bit is set the Tx state machine of the MAC is enabled for transmission on the GMII or MII interface" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "RE,Receiver Enable When this bit is set the Rx state machine of the MAC is enabled for receiving packets from the GMII or MII interface" "0: DISABLE,1: ENABLE" line.long 0x04 "MAC_Ext_Configuration,The MAC Extended Configuration Register establishes the operating mode of the MAC." rbitfld.long 0x04 31. "Reserved_FHE,Reserved" "0,1" newline rbitfld.long 0x04 30. "Reserved_APDIM,Reserved" "0,1" newline bitfld.long 0x04 25.--29. "EIPG,Extended Inter-Packet Gap The value in this field is applicable when the EIPGEN bit of this register is 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 24. "EIPGEN,Extended Inter-Packet Gap Enable" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x04 23. "Reserved_23,Reserved" "0,1" newline bitfld.long 0x04 20.--22. "HDSMS,Maximum Size for Splitting the Header Data These bits indicate the maximum header size allowed for splitting the header data in the received packet" "0: M_64BYTES,1: M_128BYTES,2: M_256BYTES,3: M_512BYTES,4: M_1024BYTES,5: RSVD,?..." newline bitfld.long 0x04 19. "PDC,Packet Duplication Control" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 18. "USP,Unicast Slow Protocol Packet Detect When this bit is set the MAC detects the Slow Protocol packets with unicast address of the station specified in the MAC_Address0_High and MAC_Address0_Low registers" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 17. "SPEN,Slow Protocol Detection Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 16. "DCRCC,Disable CRC Checking for Received Packets When this bit is set the MAC receiver does not check the CRC field in the received packets" "0: ENABLE,1: DISABLE" newline rbitfld.long 0x04 14.--15. "Reserved_15_14,Reserved" "0,1,2,3" newline hexmask.long.word 0x04 0.--13. 1. "GPSL,Giant Packet Size Limit If the received packet size is greater than the value programmed in this field in units of bytes the MAC declares the received packet as Giant packet" line.long 0x08 "MAC_Packet_Filter,The MAC Packet Filter register contains the filter controls for receiving packets. Some of the controls from this register go to the address check block of the MAC which performs the first level of address filtering. The second level.." bitfld.long 0x08 31. "RA,Receive All" "0: DISABLE,1: ENABLE" newline hexmask.long.word 0x08 22.--30. 1. "Reserved_30_22,Reserved" newline rbitfld.long 0x08 21. "Reserved_DNTU,Reserved" "0,1" newline rbitfld.long 0x08 20. "Reserved_IPFE,Reserved" "0,1" newline rbitfld.long 0x08 17.--19. "Reserved_19_17,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 16. "VTFE,VLAN Tag Filter Enable When this bit is set the MAC drops the VLAN tagged packets that do not match the VLAN Tag" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x08 11.--15. "Reserved_15_11,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x08 10. "HPF,Hash or Perfect Filter When this bit is set the address filter passes a packet if it matches either the perfect filtering or hash filtering as set by the HMC or HUC bit" "0: DISABLE,1: ENABLE" newline bitfld.long 0x08 9. "SAF,Source Address Filter Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x08 8. "SAIF,SA Inverse Filtering When this bit is set the Address Check block operates in the inverse filtering mode for SA address comparison" "0: DISABLE,1: ENABLE" newline bitfld.long 0x08 6.--7. "PCF,Pass Control Packets These bits control the forwarding of all control packets (including unicast and multicast Pause packets)" "0: FLTR_ALL,1: FW_XCPT_PAU,2: FW_ALL,3: FW_PASS" newline bitfld.long 0x08 5. "DBF,Disable Broadcast Packets When this bit is set the AFM module blocks all the incoming broadcast packets" "0: ENABLE,1: DISABLE" newline bitfld.long 0x08 4. "PM,Pass All Multicast When this bit is set it indicates that all the received packets with a multicast destination address (first bit in the destination address field is '1') are passed" "0: DISABLE,1: ENABLE" newline bitfld.long 0x08 3. "DAIF,DA Inverse Filtering When this bit is set the Address Check block operates in inverse filtering mode for the DA address comparison for both unicast and multicast packets" "0: DISABLE,1: ENABLE" newline bitfld.long 0x08 2. "HMC,Hash Multicast" "0: DISABLE,1: ENABLE" newline bitfld.long 0x08 1. "HUC,Hash Unicast" "0: DISABLE,1: ENABLE" newline bitfld.long 0x08 0. "PR,Promiscuous Mode" "0: DISABLE,1: ENABLE" line.long 0x0C "MAC_WD_JB_Timeout,The Watchdog and Jabber Timeout register controls the watchdog timeout limit for received packets and jabber timeout limit for transmitted packets." hexmask.long.byte 0x0C 25.--31. 1. "Reserved_31_25,Reserved" newline bitfld.long 0x0C 24. "PJE,Programmable Jabber Enable When this bit is set and the JD bit of the MAC_Configuration register is reset the JTO field is used as jabber timeout limit for a transmitted packet" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x0C 20.--23. "Reserved_23_20,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x0C 16.--19. "JTO,Jabber Timeout When the PJE bit is set and the JD bit of the MAC_Configuration register is reset this field is used as jabber timeout limit for a transmitted packet" "0: M_2KBYTES,1: M_3KBYTES,2: M_4KBYTES,3: M_5KBYTES,4: M_6KBYTES,5: M_7KBYTES,6: M_8KBYTES,7: M_9KBYTES,8: M_10KBYTES,9: M_11KBYTES,10: M_12KBYTES,11: M_13KBYTES,12: M_14KBYTES,13: M_15KBYTES,14: M_16383BYTES,15: RESERVED" newline hexmask.long.byte 0x0C 9.--15. 1. "Reserved_15_9,Reserved" newline bitfld.long 0x0C 8. "PWE,Programmable Watchdog Enable When this bit is set and the WD bit of the MAC_Configuration register is reset the WTO field is used as watchdog timeout limit for a received packet" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x0C 4.--7. "Reserved_7_4,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x0C 0.--3. "WTO,Watchdog Timeout When the PWE bit is set and the WD bit of the MAC_Configuration register is reset this field is used as watchdog timeout limit for a received packet" "0: M_2KBYTES,1: M_3KBYTES,2: M_4KBYTES,3: M_5KBYTES,4: M_6KBYTES,5: M_7KBYTES,6: M_8KBYTES,7: M_9KBYTES,8: M_10KBYTES,9: M_11KBYTES,10: M_12KBYTES,11: M_13KBYTES,12: M_14KBYTES,13: M_15KBYTES,14: M_16383BYTES,15: RESERVED" line.long 0x10 "MAC_Hash_Table_Reg0,The Hash Table Register 0 contains the first 32 bits of the hash table when the width of the hash table is 128 or 256 bits. You can specify the width of the hash table by using the Hash Table Size option in coreConsultant. The Hash.." line.long 0x14 "MAC_Hash_Table_Reg1,The Hash Table Register 1 contains the second 32 bits of the hash table. You can specify the width of the hash table by using the Hash Table Size option in coreConsultant. The Hash table is used for group address filtering. For hash.." line.long 0x18 "MAC_Hash_Table_Reg2,The Hash Table Register 2 contains the third 32 bits of the hash table. You can specify the width of the hash table by using the Hash Table Size option in coreConsultant. The Hash table is used for group address filtering. For hash.." line.long 0x1C "MAC_Hash_Table_Reg3,The Hash Table Register 3 contains the fourth 32 bits of the hash table. You can specify the width of the hash table by using the Hash Table Size option in coreConsultant. The Hash table is used for group address filtering. For hash.." line.long 0x20 "MAC_Hash_Table_Reg4,The Hash Table Register 4 contains the fifth 32 bits of the hash table. You can specify the width of the hash table by using the Hash Table Size option in coreConsultant. The Hash table is used for group address filtering. For hash.." line.long 0x24 "MAC_Hash_Table_Reg5,The Hash Table Register 5 contains the sixth 32 bits of the hash table. You can specify the width of the hash table by using the Hash Table Size option in coreConsultant. The Hash table is used for group address filtering. For hash.." line.long 0x28 "MAC_Hash_Table_Reg6,The Hash Table Register 6 contains the seventh 32 bits of the hash table. You can specify the width of the hash table by using the Hash Table Size option in coreConsultant. The Hash table is used for group address filtering. For hash.." line.long 0x2C "MAC_Hash_Table_Reg7,The Hash Table Register 7 contains the eighth 32 bits of the hash table. You can specify the width of the hash table by using the Hash Table Size option in coreConsultant. The Hash table is used for group address filtering. For hash.." group.long ad:0xC00BC050++0x0B line.long 0x00 "MAC_VLAN_Tag_Ctrl,This register is the redefined format of the MAC VLAN Tag Register. It is used for indirect addressing. It contains the address offset command type and Busy Bit for CSR access of the Per VLAN Tag registers." bitfld.long 0x00 31. "EIVLRXS,Enable Inner VLAN Tag in Rx Status" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 30. "Reserved_30,Reserved" "0,1" newline bitfld.long 0x00 28.--29. "EIVLS,Enable Inner VLAN Tag Stripping on Receive This field indicates the stripping operation on inner VLAN Tag in received packet" "0: DONOT,1: IFPASS,2: IFFAIL,3: ALWAYS" newline bitfld.long 0x00 27. "ERIVLT,Enable Inner VLAN Tag Comparison When this bit VTHM bit and the EDVLP field are set the MAC receiver enables VLAN Hash filtering operation on the inner VLAN Tag (if present)" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 26. "EDVLP,Enable Double VLAN Processing" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 25. "VTHM,VLAN Tag Hash Table Match Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 24. "EVLRXS,Enable VLAN Tag in Rx status" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 23. "Reserved_23,Reserved" "0,1" newline bitfld.long 0x00 21.--22. "EVLS,Enable VLAN Tag Stripping on Receive This field indicates the stripping operation on the outer VLAN Tag in received packet" "0: DONOT,1: IFPASS,2: IFFAIL,3: ALWAYS" newline bitfld.long 0x00 20. "DOVLTC,Disable VLAN Type Check for VLAN Hash Filtering" "0: ENABLE,1: DISABLE" newline bitfld.long 0x00 19. "ERSVLM,Enable Receive S-VLAN Match for VLAN Hash Filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 18. "ESVL,Enable S-VLAN" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 17. "VTIM,VLAN Tag Inverse Match Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 16. "ETV,Enable 12-Bit VLAN Tag Comparison for VLAN Hash Filtering" "0: DISABLE,1: ENABLE" newline hexmask.long.word 0x00 5.--15. 1. "Reserved_15_y,Reserved" newline bitfld.long 0x00 2.--4. "OFS,Offset This field holds the address offset of the MAC VLAN Tag Filter Register which the application is trying to access" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "CT,Command Type This bit indicates if the current register access is a read or a" "0:,1:" newline bitfld.long 0x00 0. "OB,Operation Busy - Software writes 1 in this bit to initiate an indirect read or write access to the MAC_VLAN_Tag register" "0: DISABLE,1: ENABLE" line.long 0x04 "MAC_VLAN_Tag_Data,This register holds the read or write data for the indirect access of the MAC_VLAN_Tag_Filter(#i) registers. - For the read operation this register contains valid read data only after the MAC writes 0 to the OB bit of the.." rbitfld.long 0x04 27.--31. "Reserved_31_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 25.--26. "DMACHN,DMA Channel Number The DMA Channel number to which the VLAN Tagged Frame is to be routed if it passes this VLAN Tag Filter is programmed in this field" "0,1,2,3" newline bitfld.long 0x04 24. "DMACHEN,DMA Channel Number Enable" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x04 21.--23. "Reserved_23_21,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 20. "ERIVLT,Enable Inner VLAN Tag Comparison This bit is valid only when Double VLAN Tag Enable of the Filter is set" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 19. "ERSVLM,Enable S-VLAN Match for received Frames This bit is valid only when you enable the VLAN Tag by programming the VEN field of the MAC_VLAN_Tag_Filter(#i) register" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 18. "DOVLTC,Disable VLAN Type Comparison This bit is valid only when you enable the VLAN Tag by programming the VEN field of the MAC_VLAN_Tag_Filter(#i) register" "0: ENABLE,1: DISABLE" newline bitfld.long 0x04 17. "ETV,12-Bit or 16-Bit VLAN Comparison This bit is valid only when you enable the VLAN Tag by programming the VEN field of the corresponding MAC_VLAN_Tag_Filter(#i) register" "0: M_16BIT,1: M_12BIT" newline bitfld.long 0x04 16. "VEN,VLAN Tag Enable This bit is used to enable or disable the VLAN Tag" "0: DISABLE,1: ENABLE" newline hexmask.long.word 0x04 0.--15. 1. "VID,VLAN Tag ID This field holds the VLAN Tag value which is used by the MAC for perfect comparison" line.long 0x08 "MAC_VLAN_Hash_Table,When VTHM bit of the MAC_VLAN_Tag register is set the 16-bit VLAN Hash Table register is used for group address filtering based on the VLAN tag. For hash filtering the content of the 16-bit VLAN tag or 12-bit VLAN ID (based on the.." hexmask.long.word 0x08 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x08 0.--15. 1. "VLHT,VLAN Hash Table This field contains the 16-bit VLAN Hash Table" group.long ad:0xC00BC060++0x07 line.long 0x00 "MAC_VLAN_Incl,The VLAN Tag Inclusion or Replacement register contains the VLAN tag for insertion or replacement in the Transmit packets. It also contains the VLAN tag insertion controls." rbitfld.long 0x00 31. "Reserved_BUSY,Reserved" "0,1" newline rbitfld.long 0x00 30. "Reserved_RDWR,Reserved" "0,1" newline rbitfld.long 0x00 26.--29. "Reserved_29_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x00 24.--25. "Reserved_ADDR,Reserved" "0,1,2,3" newline rbitfld.long 0x00 22.--23. "Reserved_23_22,Reserved" "0,1,2,3" newline rbitfld.long 0x00 21. "Reserved_CBTI,Reserved" "0,1" newline bitfld.long 0x00 20. "VLTI,VLAN Tag Input When this bit is set it indicates that the VLAN tag to be inserted or replaced in Tx packet must be taken from: - The Tx descriptor" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 19. "CSVL,C-VLAN or S-VLAN When this bit is set S-VLAN type (0x88A8) is inserted or replaced in the 13th and 14th bytes of transmitted packets" "0: C-VLAN,1: S-VLAN" newline bitfld.long 0x00 18. "VLP,VLAN Priority Control When this bit is set the control bits[17:16] are used for VLAN deletion insertion or replacement" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 16.--17. "VLC,VLAN Tag Control in Transmit Packets" "0: NONE,1: DELETE,2: INSERT,3: REPLACE" newline hexmask.long.word 0x00 0.--15. 1. "VLT,VLAN Tag for Transmit Packets This field contains the value of the VLAN tag to be inserted or replaced" line.long 0x04 "MAC_Inner_VLAN_Incl,The Inner VLAN Tag Inclusion or Replacement register contains the inner VLAN tag to be inserted or replaced in the Transmit packet. It also contains the inner VLAN tag insertion controls." hexmask.long.word 0x04 21.--31. 1. "Reserved_31_21,Reserved" newline bitfld.long 0x04 20. "VLTI,VLAN Tag Input When this bit is set it indicates that the VLAN tag to be inserted or replaced in Tx packet must be taken from: - The Tx descriptor" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 19. "CSVL,C-VLAN or S-VLAN" "0: C-VLAN,1: S-VLAN" newline bitfld.long 0x04 18. "VLP,VLAN Priority Control" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 16.--17. "VLC,VLAN Tag Control in Transmit Packets" "0: NONE,1: DELETE,2: INSERT,3: REPLACE" newline hexmask.long.word 0x04 0.--15. 1. "VLT,VLAN Tag for Transmit Packets This field contains the value of the VLAN tag to be inserted or replaced" group.long ad:0xC00BC070++0x03 line.long 0x00 "MAC_Q0_Tx_Flow_Ctrl,The Flow Control register controls the generation and reception of the Control (Pause Command) packets by the Flow control module of the MAC. A Write to a register with the Busy bit set to 1 triggers the Flow Control block to.." hexmask.long.word 0x00 16.--31. 1. "PT,Pause Time This field holds the value to be used in the Pause Time field in the Tx control packet" newline hexmask.long.byte 0x00 8.--15. 1. "Reserved_15_8,Reserved" newline bitfld.long 0x00 7. "DZPQ,Disable Zero-Quanta Pause When this bit is set it disables the automatic generation of the zero-quanta Pause packets on de-assertion of the flow-control signal from the FIFO layer (MTL or external sideband flow control signal sbd_flowctrl_i or.." "0: ENABLE,1: DISABLE" newline bitfld.long 0x00 4.--6. "PLT,Pause Low Threshold This field configures the threshold of the Pause timer at which the input flow control signal mti_flowctrl_i (or sbd_flowctrl_i) is checked for automatic retransmission of the Pause packet" "0: PT4,1: PT28,2: PT36,3: PT144,4: PT256,5: PT512,6: RSVD,?..." newline rbitfld.long 0x00 2.--3. "Reserved_3_2,Reserved" "0,1,2,3" newline bitfld.long 0x00 1. "TFE,Transmit Flow Control Enable Full-Duplex Mode: In the full-duplex mode when this bit is set the MAC enables the flow control operation to Tx Pause packets" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "FCB_BPA,Flow Control Busy or Backpressure Activate This bit initiates a Pause packet in the full-duplex mode and activates the backpressure function in the half-duplex mode if the TFE bit is set" "0: DISABLE,1: ENABLE" group.long ad:0xC00BC090++0x07 line.long 0x00 "MAC_Rx_Flow_Ctrl,The Receive Flow Control register controls the pausing of MAC Transmit based on the received Pause packet." hexmask.long.tbyte 0x00 9.--31. 1. "Reserved_31_9,Reserved" newline rbitfld.long 0x00 8. "Reserved_PFCE,Reserved" "0,1" newline hexmask.long.byte 0x00 2.--7. 1. "Reserved_7_2,Reserved" newline bitfld.long 0x00 1. "UP,Unicast Pause Packet Detect A pause packet is processed when it has the unique multicast address specified in the IEEE 802.3" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "RFE,Receive Flow Control Enable When this bit is set and the MAC is operating in full-duplex mode the MAC decodes the received Pause packet and disables its transmitter for a specified (Pause) time" "0: DISABLE,1: ENABLE" line.long 0x04 "MAC_RxQ_Ctrl4,The Receive Queue Control 4 register controls the routing of unicast and multicast packets that fail the Destination or Source address filter to the Rx queues." bitfld.long 0x04 31. "UDC,Unicast Packet Duplication Control When this bit is set along with PDC bit of the MAC_Ext_Configuration register the MAC provides DMA Channel number specified as one-hot value in DCS field of MAC_Address(#i)_High register that matched the Unicast.." "0: DISABLE,1: ENABLE" newline hexmask.long.word 0x04 19.--30. 1. "Reserved_30_y,Reserved" newline bitfld.long 0x04 17.--18. "VFFQ,VLAN Tag Filter Fail Packets Queue This field holds the Rx queue number to which the tagged packets failing the Destination or Source Address filter (and UFFQE/MFFQE not enabled) or failing the VLAN tag filter must be routed to" "0,1,2,3" newline bitfld.long 0x04 16. "VFFQE,VLAN Tag Filter Fail Packets Queuing Enable When this bit is set the tagged packets which fail the Destination or Source address filter or fail the VLAN tag filter are routed to the Rx Queue Number programmed in the VFFQ" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x04 11.--15. "Reserved_15_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 9.--10. "MFFQ,Multicast Address Filter Fail Packets Queue" "0,1,2,3" newline bitfld.long 0x04 8. "MFFQE,Multicast Address Filter Fail Packets Queuing Enable" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x04 3.--7. "Reserved_7_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 1.--2. "UFFQ,Unicast Address Filter Fail Packets Queue" "0,1,2,3" newline bitfld.long 0x04 0. "UFFQE,Unicast Address Filter Fail Packets Queuing Enable" "0: DISABLE,1: ENABLE" group.long ad:0xC00BC0A0++0x0B line.long 0x00 "MAC_RxQ_Ctrl0,The Receive Queue Control 0 register controls the queue management in the MAC Receiver. Note: In multiple Rx queues configuration all the queues are disabled by default. Enable the Rx queue by programming the corresponding field in this.." hexmask.long.word 0x00 16.--31. 1. "Reserved_31_16,Reserved" newline rbitfld.long 0x00 14.--15. "Reserved_RXQ7EN,Reserved" "0,1,2,3" newline rbitfld.long 0x00 12.--13. "Reserved_RXQ6EN,Reserved" "0,1,2,3" newline rbitfld.long 0x00 10.--11. "Reserved_RXQ5EN,Reserved" "0,1,2,3" newline rbitfld.long 0x00 8.--9. "Reserved_RXQ4EN,Reserved" "0,1,2,3" newline bitfld.long 0x00 6.--7. "RXQ3EN,Receive Queue 3 Enable This field is similar to the RXQ0EN field" "0: DISABLE,1: EN_AV,2: EN_DCB_GEN,3: RSVD" newline bitfld.long 0x00 4.--5. "RXQ2EN,Receive Queue 2 Enable This field is similar to the RXQ0EN field" "0: DISABLE,1: EN_AV,2: EN_DCB_GEN,3: RSVD" newline bitfld.long 0x00 2.--3. "RXQ1EN,Receive Queue 1 Enable This field is similar to the RXQ0EN field" "0: DISABLE,1: EN_AV,2: EN_DCB_GEN,3: RSVD" newline bitfld.long 0x00 0.--1. "RXQ0EN,Receive Queue 0 Enable This field indicates whether Rx Queue 0 is enabled for AV (2'b01) or Generic (2'b10)" "0: DISABLE,1: EN_AV,2: EN_DCB_GEN,3: RSVD" line.long 0x04 "MAC_RxQ_Ctrl1,The Receive Queue Control 1 register controls the routing of multicast broadcast AV and untagged packets to the Rx queues." rbitfld.long 0x04 30.--31. "Reserved_31_30,Reserved" "0,1,2,3" newline bitfld.long 0x04 29. "TBRQE,Type Field Based Rx Queuing Enable When this bit is set it enables Type Field based Rx Queuing where the Type field of received packet is compared with programmed TYP field in MAC_TMRQ_Regs(#i) and if a match occurs the packet is routed to the.." "0,1" newline bitfld.long 0x04 28. "OMCBCQ,Over-riding MC-BC queue priority select" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x04 27. "Reserved_27,Reserved" "0,1" newline bitfld.long 0x04 24.--26. "FPRQ,Frame Preemption Residue Queue This field holds the Rx queue number to which the residual preemption frames must be forwarded" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 22.--23. "TPQC,Tagged PTP over Ethernet Packets Queuing Control" "0: VLAN Tagged PTPoE packets are routed as generic,1: VLAN Tagged PTPoE packets are routed to Rx..,2: VLAN Tagged PTPoE packets are routed to only AV,3: Reserved" newline bitfld.long 0x04 21. "TACPQE,Tagged AV Control Packets Queuing Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 20. "MCBCQEN,Multicast and Broadcast Queue Enable This bit specifies that Multicast or Broadcast packets routing to the Rx Queue is enabled and the Multicast or Broadcast packets must be routed to Rx Queue specified in MCBCQ field" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x04 19. "Reserved_19,Reserved" "0,1" newline bitfld.long 0x04 16.--18. "MCBCQ,Multicast and Broadcast Queue This field specifies the Rx Queue onto which Multicast or Broadcast Packets are routed" "0: QUEUE0,1: QUEUE1,2: QUEUE2,3: QUEUE3,4: QUEUE4,5: QUEUE5,6: QUEUE6,7: QUEUE7" newline rbitfld.long 0x04 15. "Reserved_15,Reserved" "0,1" newline bitfld.long 0x04 12.--14. "UPQ,Untagged Packet Queue This field indicates the Rx Queue to which Untagged Packets are to be routed" "0: QUEUE0,1: QUEUE1,2: QUEUE2,3: QUEUE3,4: QUEUE4,5: QUEUE5,6: QUEUE6,7: QUEUE7" newline rbitfld.long 0x04 11. "Reserved_11,Reserved" "0,1" newline rbitfld.long 0x04 8.--10. "Reserved_DCBCPQ,Reserved" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x04 7. "Reserved_7,Reserved" "0,1" newline bitfld.long 0x04 4.--6. "PTPQ,PTP Packets Queue This field specifies the Rx queue on which the PTP packets sent over the Ethernet payload (not over IPv4 or IPv6) are routed" "0: QUEUE0,1: QUEUE1,2: QUEUE2,3: QUEUE3,4: QUEUE4,5: QUEUE5,6: QUEUE6,7: QUEUE7" newline rbitfld.long 0x04 3. "Reserved_3,Reserved" "0,1" newline bitfld.long 0x04 0.--2. "AVCPQ,AV Untagged Control Packets Queue This field specifies the Receive queue on which the received AV tagged and untagged control packets are routed" "0: QUEUE0,1: QUEUE1,2: QUEUE2,3: QUEUE3,4: QUEUE4,5: QUEUE5,6: QUEUE6,7: QUEUE7" line.long 0x08 "MAC_RxQ_Ctrl2,This register controls the routing of tagged packets based on the USP (user Priority) field of the received packets to the RxQueues 0 to 3." hexmask.long.byte 0x08 24.--31. 1. "PSRQ3,Priorities Selected in the Receive Queue 3 This field decides the priorities assigned to Rx Queue 3" newline hexmask.long.byte 0x08 16.--23. 1. "PSRQ2,Priorities Selected in the Receive Queue 2 This field decides the priorities assigned to Rx Queue 2" newline hexmask.long.byte 0x08 8.--15. 1. "PSRQ1,Priorities Selected in the Receive Queue 1 This field decides the priorities assigned to Rx Queue 1" newline hexmask.long.byte 0x08 0.--7. 1. "PSRQ0,Priorities Selected in the Receive Queue 0 This field decides the priorities assigned to Rx Queue 0" rgroup.long ad:0xC00BC0B0++0x03 line.long 0x00 "MAC_Interrupt_Status,The Interrupt Status register contains the status of interrupts." hexmask.long.byte 0x00 24.--31. 1. "Reserved_31_24,Reserved" newline bitfld.long 0x00 23. "PCIS,Policing Counter Interrupt Status This bit is set high when an interrupt is generated in the MAC_PCTH_Intr_Status or MAC_PCTW_Intr_Status Register" "0,1" newline bitfld.long 0x00 21.--22. "Reserved_22_21,Reserved" "0,1,2,3" newline bitfld.long 0x00 20. "MFRIS,MMC FPE Receive Interrupt Status" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 19. "MFTIS,MMC FPE Transmit Interrupt Status This bit is set high when an interrupt is generated in the MMC FPE Transmit Interrupt Register" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 18. "MDIOIS,MDIO Interrupt Status" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 17. "FPEIS,Frame Preemption Interrupt Status This bit indicates an interrupt event during the operation of Frame Preemption (Bits[19:16] of MAC_FPE_CTRL_STS register is set)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 16. "Reserved_16,Reserved" "0,1" newline bitfld.long 0x00 15. "Reserved_GPIIS,Reserved" "0,1" newline bitfld.long 0x00 14. "RXSTSIS,Receive Status Interrupt This bit indicates the status of received packets" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 13. "TXSTSIS,Transmit Status Interrupt This bit indicates the status of transmitted packets" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 12. "TSIS,Timestamp Interrupt Status this bit is 1 when any of the following conditions is true: - The system time value is equal to or exceeds the value you programmed in the MAC_PPS(#i)_Target_Time_Seconds and MAC_PPS(#i)_Target_Time_Nanoseconds" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11. "MMCRXIPIS,MMC Receive Checksum Offload Interrupt Status This bit is set high when an interrupt is generated in the MMC Receive Checksum Offload Interrupt Register" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 10. "MMCTXIS,MMC Transmit Interrupt Status This bit is set high when an interrupt is generated in the MMC Transmit Interrupt Register" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 9. "MMCRXIS,MMC Receive Interrupt Status This bit is set high when an interrupt is generated in the MMC Receive Interrupt Register" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 8. "MMCIS,MMC Interrupt Status This bit is set high when Bit 11 Bit 10 or Bit 9 is set high" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 6.--7. "Reserved_7_6,Reserved" "0,1,2,3" newline bitfld.long 0x00 5. "LPIIS,LPI Interrupt Status When the Energy Efficient Ethernet feature is enabled this bit is set for any LPI state entry or exit in the MAC Transmitter or Receiver" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 4. "PMTIS,PMT Interrupt Status This bit is set when a Magic packet or Wake-on-LAN packet is received in the power-down mode (RWKPRCVD and MGKPRCVD bits in MAC_PMT_Control_Status register)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 3. "PHYIS,PHY Interrupt This bit is set when rising edge is detected on the phy_intr_i input" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 2. "Reserved_PCSANCIS,Reserved" "0,1" newline bitfld.long 0x00 1. "Reserved_PCSLCHGIS,Reserved" "0,1" newline bitfld.long 0x00 0. "RGSMIIIS,RGMII or SMII Interrupt Status This bit is set because of any change in value of the Link Status of RGMII or SMII interface (LNKSTS bit in MAC_PHYIF_Control_Status register)" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BC0B4++0x03 line.long 0x00 "MAC_Interrupt_Enable,The Interrupt Enable register contains the masks for generating the interrupts." hexmask.long.word 0x00 19.--31. 1. "Reserved_31_19,Reserved" newline bitfld.long 0x00 18. "MDIOIE,MDIO Interrupt Enable When this bit is set it enables the assertion of the interrupt when MDIOIS field is set in the MAC_Interrupt_Status register" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 17. "FPEIE,Frame Preemption Interrupt Enable When this bit is set it enables the assertion of the interrupt when FPEIS field is set in the MAC_Interrupt_Status register" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 16. "Reserved_16,Reserved" "0,1" newline rbitfld.long 0x00 15. "Reserved_15,Reserved" "0,1" newline bitfld.long 0x00 14. "RXSTSIE,Receive Status Interrupt Enable When this bit is set it enables the assertion of the interrupt signal because of the setting of RXSTSIS bit in the MAC_Interrupt_Status register" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 13. "TXSTSIE,Transmit Status Interrupt Enable When this bit is set it enables the assertion of the interrupt signal because of the setting of TXSTSIS bit in the MAC_Interrupt_Status register" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 12. "TSIE,Timestamp Interrupt Enable When this bit is set it enables the assertion of the interrupt signal because of the setting of TSIS bit in MAC_Interrupt_Status register" "0: DISABLE,1: ENABLE" newline hexmask.long.byte 0x00 6.--11. 1. "Reserved_11_6,Reserved" newline bitfld.long 0x00 5. "LPIIE,LPI Interrupt Enable When this bit is set it enables the assertion of the interrupt signal because of the setting of LPIIS bit in MAC_Interrupt_Status register" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 4. "PMTIE,PMT Interrupt Enable When this bit is set it enables the assertion of the interrupt signal because of the setting of PMTIS bit in MAC_Interrupt_Status register" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 3. "PHYIE,PHY Interrupt Enable When this bit is set it enables the assertion of the interrupt signal because of the setting of PHYIS bit in MAC_Interrupt_Status register" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 2. "Reserved_PCSANCIE,Reserved" "0,1" newline rbitfld.long 0x00 1. "Reserved_PCSLCHGIE,Reserved" "0,1" newline bitfld.long 0x00 0. "RGSMIIIE,RGMII or SMII Interrupt Enable When this bit is set it enables the assertion of the interrupt signal because of the setting of RGSMIIIS bit in MAC_Interrupt_Status register" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BC0B8++0x03 line.long 0x00 "MAC_Rx_Tx_Status,The Receive Transmit Status register contains the Receive and Transmit Error status." hexmask.long.tbyte 0x00 9.--31. 1. "Reserved_31_9,Reserved" newline bitfld.long 0x00 8. "RWT,Receive Watchdog Timeout This bit is set when a packet with length greater than 2 048 bytes is received (10 240 bytes when Jumbo Packet mode is enabled) and the WD bit is reset in the MAC_Configuration register" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 6.--7. "Reserved_7_6,Reserved" "0,1,2,3" newline bitfld.long 0x00 5. "EXCOL,Excessive Collisions When the DTXSTS bit is set in the MTL_Operation_Mode register this bit indicates that the transmission aborted after 16 successive collisions while attempting to transmit the current packet" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 4. "LCOL,Late Collision When the DTXSTS bit is set in the MTL_Operation_Mode register this bit indicates that the packet transmission aborted because a collision occurred after the collision window (64 bytes including Preamble in MII mode 512 bytes.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 3. "EXDEF,Excessive Deferral When the DTXSTS bit is set in the MTL_Operation_Mode register and the DC bit is set in the MAC_Configuration register this bit indicates that the transmission ended because of excessive deferral of over 24 288 bit times (155 680.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 2. "LCARR,Loss of Carrier When the DTXSTS bit is set in the MTL_Operation_Mode register this bit indicates that the loss of carrier occurred during packet transmission that is the phy_crs_i signal was inactive for one or more transmission clock periods.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 1. "NCARR,No Carrier When the DTXSTS bit is set in the MTL_Operation_Mode register this bit indicates that the carrier signal from the PHY is not present at the end of preamble transmission" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "TJT,Transmit Jabber Timeout This bit indicates that the Transmit Jabber Timer expired which happens when the packet size exceeds 2 048 bytes (10 240 bytes when the Jumbo packet is enabled) and JD bit is reset in the MAC_Configuration register" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BC0C0++0x07 line.long 0x00 "MAC_PMT_Control_Status,The PMT Control and Status Register." bitfld.long 0x00 31. "RWKFILTRST,Remote Wake-Up Packet Filter Register Pointer Reset When this bit is set the remote wake-up packet filter register pointer is reset to 3'b000" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 29.--30. "Reserved_30_29,Reserved" "0,1,2,3" newline rbitfld.long 0x00 24.--28. "RWKPTR,Remote Wake-up FIFO Pointer This field gives the current value (0 to 7 15 or 31 when 4 8 or 16 Remote Wake-up Packet Filters are selected) of the Remote Wake-up Packet Filter register pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline hexmask.long.word 0x00 11.--23. 1. "Reserved_23_11,Reserved" newline bitfld.long 0x00 10. "RWKPFE,Remote Wake-up Packet Forwarding Enable When this bit is set along with RWKPKTEN the MAC receiver drops all received frames until it receives the expected Wake-up frame" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 9. "GLBLUCAST,Global Unicast When this bit set any unicast packet filtered by the MAC (DAF) address recognition is detected as a remote wake-up packet" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 7.--8. "Reserved_8_7,Reserved" "0,1,2,3" newline rbitfld.long 0x00 6. "RWKPRCVD,Remote Wake-Up Packet Received When this bit is set it indicates that the power management event is generated because of the reception of a remote wake-up packet" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 5. "MGKPRCVD,Magic Packet Received When this bit is set it indicates that the power management event is generated because of the reception of a magic packet" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 3.--4. "Reserved_4_3,Reserved" "0,1,2,3" newline bitfld.long 0x00 2. "RWKPKTEN,Remote Wake-Up Packet Enable When this bit is set a power management event is generated when the MAC receives a remote wake-up packet" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 1. "MGKPKTEN,Magic Packet Enable When this bit is set a power management event is generated when the MAC receives a magic packet" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "PWRDWN,Power Down When this bit is set the MAC receiver drops all received packets until it receives the expected magic packet or remote wake-up packet" "0: DISABLE,1: ENABLE" line.long 0x04 "MAC_RWK_Packet_Filter,The Remote Wakeup Filter registers are implemented as 8 16 or 32 indirect access registers (wkuppktfilter_reg#i) based on whether 4 8 or 16 Remote Wakeup Filters are selected in the configuration and accessed by application through.." group.long ad:0xC00BC0D0++0x0F line.long 0x00 "MAC_LPI_Control_Status,The LPI Control and Status Register controls the LPI functions and provides the LPI interrupt status. The status bits are cleared when this register is read." hexmask.long.word 0x00 22.--31. 1. "Reserved_31_22,Reserved" newline bitfld.long 0x00 21. "LPITCSE,LPI Tx Clock Stop Enable When this bit is set the MAC asserts sbd_tx_clk_gating_ctrl_o signal high after it enters Tx LPI mode to indicate that the Tx clock to MAC can be stopped" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 20. "LPIATE,LPI Timer Enable This bit controls the automatic entry of the MAC Transmitter into and exit out of the LPI state" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 19. "LPITXA,LPI Tx Automate This bit controls the behavior of the MAC when it is entering or coming out of the LPI mode on the Transmit side" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 18. "PLSEN,PHY Link Status Enable This bit enables the link status received on the RGMII SGMII or SMII Receive paths to be used for activating the LPI LS TIMER" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 17. "PLS,PHY Link Status This bit indicates the link status of the PHY" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 16. "LPIEN,LPI Enable When this bit is set it instructs the MAC Transmitter to enter the LPI state" "0: DISABLE,1: ENABLE" newline hexmask.long.byte 0x00 10.--15. 1. "Reserved_15_10,Reserved" newline rbitfld.long 0x00 9. "RLPIST,Receive LPI State When this bit is set it indicates that the MAC is receiving the LPI pattern on the GMII or MII interface" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 8. "TLPIST,Transmit LPI State When this bit is set it indicates that the MAC is transmitting the LPI pattern on the GMII or MII interface" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 4.--7. "Reserved_7_4,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x00 3. "RLPIEX,Receive LPI Exit When this bit is set it indicates that the MAC Receiver has stopped receiving the LPI pattern on the GMII or MII interface exited the LPI state and resumed the normal reception" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 2. "RLPIEN,Receive LPI Entry When this bit is set it indicates that the MAC Receiver has received an LPI pattern and entered the LPI state" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 1. "TLPIEX,Transmit LPI Exit When this bit is set it indicates that the MAC transmitter exited the LPI state after the application cleared the LPIEN bit and the LPI TW Timer has expired" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 0. "TLPIEN,Transmit LPI Entry When this bit is set it indicates that the MAC Transmitter has entered the LPI state because of the setting of the LPIEN bit" "0: INACTIVE,1: ACTIVE" line.long 0x04 "MAC_LPI_Timers_Control,The LPI Timers Control register controls the timeout values in the LPI states. It specifies the time for which the MAC transmits the LPI pattern and also the time for which the MAC waits before resuming the normal transmission." hexmask.long.byte 0x04 26.--31. 1. "Reserved_31_26,Reserved" newline hexmask.long.word 0x04 16.--25. 1. "LST,LPI LS Timer This field specifies the minimum time (in milliseconds) for which the link status from the PHY should be up (OKAY) before the LPI pattern can be transmitted to the PHY" newline hexmask.long.word 0x04 0.--15. 1. "TWT,LPI TW Timer This field specifies the minimum time (in microseconds) for which the MAC waits after it stops transmitting the LPI pattern to the PHY and before it resumes the normal transmission" line.long 0x08 "MAC_LPI_Entry_Timer,This register controls the Tx LPI entry timer. This counter is enabled only when bit[20](LPITE) bit of MAC_LPI_Control_Status is set to 1." hexmask.long.word 0x08 20.--31. 1. "Reserved_31_20,Reserved" newline hexmask.long.tbyte 0x08 3.--19. 1. "LPIET,LPI Entry Timer This field specifies the time in microseconds the MAC waits to enter LPI mode after it has transmitted all the frames" newline rbitfld.long 0x08 0.--2. "Reserved_2_0,Reserved" "0,1,2,3,4,5,6,7" line.long 0x0C "MAC_1US_Tic_Counter,This register controls the generation of the Reference time (1 microsecond tic) for all the LPI timers. This timer has to be programmed by the software initially." hexmask.long.tbyte 0x0C 12.--31. 1. "Reserved_31_12,Reserved" newline hexmask.long.word 0x0C 0.--11. 1. "TIC_1US_CNTR,1US TIC Counter The application must program this counter so that the number of clock cycles of CSR clock is 1us" group.long ad:0xC00BC0F8++0x03 line.long 0x00 "MAC_PHYIF_Control_Status,The PHY Interface Control and Status register indicates the status signals received by the SGMII RGMII or SMII interface (selected at reset) from the PHY. This register is optional." hexmask.long.word 0x00 22.--31. 1. "Reserved_31_22,Reserved" newline rbitfld.long 0x00 21. "Reserved_FALSCARDET,Reserved" "0,1" newline rbitfld.long 0x00 20. "Reserved_JABTO,Reserved" "0,1" newline rbitfld.long 0x00 19. "LNKSTS,Link Status This bit indicates whether the link is up (1'b1) or down (1'b0)" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 17.--18. "LNKSPEED,Link Speed This bit indicates the current speed of the link" "0: M_2500K,1: M_25M,2: M_125M,3: RSVD" newline rbitfld.long 0x00 16. "LNKMOD,Link Mode This bit indicates the current mode of operation of the link" "0: HDUPLX,1: FDUPLX" newline hexmask.long.word 0x00 5.--15. 1. "Reserved_15_5,Reserved" newline rbitfld.long 0x00 4. "Reserved_SMIDRXS,Reserved" "0,1" newline rbitfld.long 0x00 3. "Reserved_3,Reserved" "0,1" newline rbitfld.long 0x00 2. "Reserved_SFTERR,Reserved" "0,1" newline bitfld.long 0x00 1. "LUD,Link Up or Down This bit indicates whether the link is up or down during transmission of configuration in the RGMII SGMII or SMII interface" "0: LINKDOWN,1: LINKUP" newline bitfld.long 0x00 0. "TC,Transmit Configuration in RGMII SGMII or SMII When set this bit enables the transmission of duplex mode link speed and link up or down information to the PHY in the RGMII SMII or SGMII port" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BC110++0x07 line.long 0x00 "MAC_Version,The version register identifies the version of the DWC_ether_qos. This register contains two bytes: one that Synopsys uses to identify the IP release number and the other that you set while configuring the IP." hexmask.long.word 0x00 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.byte 0x00 8.--15. 1. "USERVER,User-defined Version (configured with coreConsultant)" newline hexmask.long.byte 0x00 0.--7. 1. "SNPSVER,Synopsys-defined Version" line.long 0x04 "MAC_Debug,The Debug register provides the debug status of various MAC blocks." hexmask.long.word 0x04 19.--31. 1. "Reserved_31_19,Reserved" newline bitfld.long 0x04 17.--18. "TFCSTS,MAC Transmit Packet Controller Status This field indicates the state of the MAC Transmit Packet Controller module" "0: IDLE,1: WAITING,2: GEN_TX_PAU,3: TRNSFR" newline bitfld.long 0x04 16. "TPESTS,MAC GMII or MII Transmit Protocol Engine Status When this bit is set it indicates that the MAC GMII or MII transmit protocol engine is actively transmitting data and it is not in the Idle state" "0: INACTIVE,1: ACTIVE" newline hexmask.long.word 0x04 3.--15. 1. "Reserved_15_3,Reserved" newline bitfld.long 0x04 1.--2. "RFCFCSTS,MAC Receive Packet Controller FIFO Status When this bit is set this field indicates the active state of the small FIFO Read and Write controllers of the MAC Receive Packet Controller module" "0,1,2,3" newline bitfld.long 0x04 0. "RPESTS,MAC GMII or MII Receive Protocol Engine Status When this bit is set it indicates that the MAC GMII or MII receive protocol engine is actively receiving data and it is not in the Idle state" "0: INACTIVE,1: ACTIVE" rgroup.long ad:0xC00BC11C++0x13 line.long 0x00 "MAC_HW_Feature0,This register indicates the presence of first set of the optional features or functions of the DWC_ether_qos. The software driver can use this register to dynamically enable or disable the programs related to the optional blocks. Note:.." bitfld.long 0x00 28.--31. "ACTPHYSEL,Active PHY Selected When you have multiple PHY interfaces in your configuration this field indicates the sampled value of phy_intf_sel_i during reset de-assertion" "0: GMII_MII,1: RGMII,2: SGMII,3: TBI,4: RMII,5: RTBI,6: SMII,7: REVMIII,8: B10T1S,?..." newline bitfld.long 0x00 27. "SAVLANINS,Source Address or VLAN Insertion Enable This bit is set to 1 when the Enable SA and VLAN Insertion on Tx option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 25.--26. "TSSTSSEL,Timestamp System Time Source This bit indicates the source of the Timestamp System Time" "0: INTRNL,1: EXTRNL,2: BOTH,3: RSVD" newline bitfld.long 0x00 24. "MACADR64SEL,MAC Addresses 64-127 Selected This bit is set to 1 when the Enable Additional 64 MAC Address Registers (64-127) option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 23. "MACADR32SEL,MAC Addresses 32-63 Selected This bit is set to 1 when the Enable Additional 32 MAC Address Registers (32-63) option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 18.--22. "ADDMACADRSEL,MAC Addresses 1-31 Selected This bit is set to 1 when the non-zero value is selected for Enable Additional 1-31 MAC Address Registers option" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 17. "Reserved_17,Reserved" "0,1" newline bitfld.long 0x00 16. "RXCOESEL,Receive Checksum Offload Enabled This bit is set to 1 when the Enable Receive TCP/IP Checksum Check option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 15. "Reserved_15,Reserved" "0,1" newline bitfld.long 0x00 14. "TXCOESEL,Transmit Checksum Offload Enabled This bit is set to 1 when the Enable Transmit TCP/IP Checksum Insertion option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 13. "EEESEL,Energy Efficient Ethernet Enabled This bit is set to 1 when the Enable Energy Efficient Ethernet (EEE) option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 12. "TSSEL,IEEE 1588-2008 Timestamp Enabled This bit is set to 1 when the Enable IEEE 1588 Timestamp Support option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 10.--11. "Reserved_11_10,Reserved" "0,1,2,3" newline bitfld.long 0x00 9. "ARPOFFSEL,ARP Offload Enabled This bit is set to 1 when the Enable IPv4 ARP Offload option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 8. "MMCSEL,RMON Module Enable This bit is set to 1 when the Enable MAC Management Counters (MMC) option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 7. "MGKSEL,PMT Magic Packet Enable This bit is set to 1 when the Enable Magic Packet Detection option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 6. "RWKSEL,PMT Remote Wake-up Packet Enable This bit is set to 1 when the Enable Remote Wake-Up Packet Detection option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 5. "SMASEL,SMA (MDIO) Interface This bit is set to 1 when the Enable Station Management (MDIO Interface) option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 4. "VLHASH,VLAN Hash Filter Selected This bit is set to 1 when the Enable VLAN Hash Table Based Filtering option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 3. "PCSSEL,PCS Registers (TBI SGMII or RTBI PHY interface) This bit is set to 1 when the TBI SGMII or RTBI PHY interface option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 2. "HDSEL,Half-duplex Support This bit is set to 1 when the half-duplex mode is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 1. "GMIISEL,1000 Mbps Support This bit is set to 1 when 1000 Mbps is selected as the Mode of Operation" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "MIISEL,10 or 100 Mbps Support This bit is set to 1 when 10/100 Mbps is selected as the Mode of Operation" "0: INACTIVE,1: ACTIVE" line.long 0x04 "MAC_HW_Feature1,This register indicates the presence of second set of the optional features or functions of the DWC_ether_qos. The software driver can use this register to dynamically enable or disable the programs related to the optional blocks. Note:.." bitfld.long 0x04 31. "Reserved_31,Reserved" "0,1" newline bitfld.long 0x04 27.--30. "L3L4FNUM,Total number of L3 or L4 Filters This field indicates the total number of L3 or L4 filters" "0: NOFILT,1: M_1FILT,2: M_2FILT,3: M_3FILT,4: M_4FILT,5: M_5FILT,6: M_6FILT,7: M_7FILT,8: M_8FILT,?..." newline bitfld.long 0x04 26. "Reserved_26,Reserved" "0,1" newline bitfld.long 0x04 24.--25. "HASHTBLSZ,Hash Table Size This field indicates the size of the hash table" "0: NO_HT,1: M_64,2: M_128,3: M_256" newline bitfld.long 0x04 23. "POUOST,One Step for PTP over UDP/IP Feature Enable This bit is set to 1 when the Enable One step timestamp for PTP over UDP/IP feature is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 22. "Reserved_22,Reserved" "0,1" newline bitfld.long 0x04 21. "RAVSEL,Rx Side Only AV Feature Enable This bit is set to 1 when the Enable Audio Video Bridging option on Rx Side Only is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 20. "AVSEL,AV Feature Enable This bit is set to 1 when the Enable Audio Video Bridging option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 19. "DBGMEMA,DMA Debug Registers Enable This bit is set to 1 when the Debug Mode Enable option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 18. "TSOEN,TCP Segmentation Offload Enable This bit is set to 1 when the Enable TCP Segmentation Offloading for TCP/IP Packets option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 17. "SPHEN,Split Header Feature Enable This bit is set to 1 when the Enable Split Header Structure option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 16. "DCBEN,DCB Feature Enable This bit is set to 1 when the Enable Data Center Bridging option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 14.--15. "ADDR64,Address Width" "0: M_32,1: M_40,2: M_48,3: RSVD" newline bitfld.long 0x04 13. "ADVTHWORD,IEEE 1588 High Word Register Enable This bit is set to 1 when the Add IEEE 1588 Higher Word Register option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 12. "PTOEN,PTP Offload Enable This bit is set to 1 when the Enable PTP Timestamp Offload Feature is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 11. "OSTEN,One-Step Timestamping Enable This bit is set to 1 when the Enable One-Step Timestamp Feature is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 6.--10. "TXFIFOSIZE,MTL Transmit FIFO Size This field contains the configured value of MTL Tx FIFO in bytes expressed as Log to base 2 minus 7 that is Log2(TXFIFO_SIZE) -7" "0: M_128B,1: M_256B,2: M_512B,3: M_1024B,4: M_2048B,5: M_4096B,6: M_8192B,7: M_16384B,8: M_32KB,9: M_64KB,10: M_128KB,11: RSVD,?..." newline bitfld.long 0x04 5. "SPRAM,Single Port RAM Enable This bit is set to 1 when the Use single port RAM Feature is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 0.--4. "RXFIFOSIZE,MTL Receive FIFO Size This field contains the configured value of MTL Rx FIFO in bytes expressed as Log to base 2 minus 7 that is Log2(RXFIFO_SIZE) -7" "0: M_128B,1: M_256B,2: M_512B,3: M_1024B,4: M_2048B,5: M_4096B,6: M_8192B,7: M_16384B,8: M_32KB,9: M_64KB,10: M_128KB,11: M_256KB,12: RSVD,?..." line.long 0x08 "MAC_HW_Feature2,This register indicates the presence of third set of the optional features or functions of the DWC_ether_qos. The software driver can use this register to dynamically enable or disable the programs related to the optional blocks." bitfld.long 0x08 31. "Reserved_31,Reserved" "0,1" newline bitfld.long 0x08 28.--30. "AUXSNAPNUM,Number of Auxiliary Snapshot Inputs This field indicates the number of auxiliary snapshot inputs" "0: NO_AUXI,1: M_1_AUXI,2: M_2_AUXI,3: M_3_AUXI,4: M_4_AUXI,5: RSVD,?..." newline bitfld.long 0x08 27. "Reserved_27,Reserved" "0,1" newline bitfld.long 0x08 24.--26. "PPSOUTNUM,Number of PPS Outputs This field indicates the number of PPS outputs" "0: NO_PPSO,1: M_1_PPSO,2: M_2_PPSO,3: M_3_PPSO,4: M_4_PPSO,5: RSVD,?..." newline bitfld.long 0x08 22.--23. "TDCSZ,Tx DMA Descriptor Cache Size in terms of 16-bytes descriptors" "0: NO_DCACHE,1: M_1TDCSZ,2: M_2TDCSZ,3: M_3TDCSZ" newline bitfld.long 0x08 18.--21. "TXCHCNT,Number of DMA Transmit Channels This field indicates the number of DMA Transmit channels" "0: D_1TXCH,1: D_2TXCH,2: D_3TXCH,3: D_4TXCH,4: D_5TXCH,5: D_6TXCH,6: D_7TXCH,7: D_8TXCH,?..." newline bitfld.long 0x08 16.--17. "RDCSZ,Rx DMA Descriptor Cache Size in terms of 16-bytes descriptors" "0: NO_DCACHE,1: M_1RDCSZ,2: M_2RDCSZ,3: M_3RDCSZ" newline bitfld.long 0x08 12.--15. "RXCHCNT,Number of DMA Receive Channels This field indicates the number of DMA Receive channels" "0: D_1RXCH,1: D_2RXCH,2: D_3RXCH,3: D_4RXCH,4: D_5RXCH,5: D_6RXCH,6: D_7RXCH,7: D_8RXCH,?..." newline bitfld.long 0x08 10.--11. "Reserved_11_10,Reserved" "0,1,2,3" newline bitfld.long 0x08 6.--9. "TXQCNT,Number of MTL Transmit Queues This field indicates the number of MTL Transmit queues" "0: M_1TXQ,1: M_2TXQ,2: M_3TXQ,3: M_4TXQ,4: M_5TXQ,5: M_6TXQ,6: M_7TXQ,7: M_8TXQ,?..." newline bitfld.long 0x08 4.--5. "Reserved_5_4,Reserved" "0,1,2,3" newline bitfld.long 0x08 0.--3. "RXQCNT,Number of MTL Receive Queues This field indicates the number of MTL Receive queues" "0: M_1RXQ,1: M_2RXQ,2: M_3RXQ,3: M_4RXQ,4: M_5RXQ,5: M_6RXQ,6: M_7RXQ,7: M_8RXQ,?..." line.long 0x0C "MAC_HW_Feature3,This register indicates the presence of fourth set the optional features or functions of the DWC_ether_qos. The software driver can use this register to dynamically enable or disable the programs related to the optional blocks." bitfld.long 0x0C 30.--31. "Reserved_31_30,Reserved" "0,1,2,3" newline bitfld.long 0x0C 28.--29. "ASP,Automotive Safety Package Following are the encoding for the different Safety features" "0: NONE,1: ECC_ONLY,2: AS_NPPE,3: AS_PPE" newline bitfld.long 0x0C 27. "TBSSEL,Time Based Scheduling Enable This bit is set to 1 when the Time Based Scheduling feature is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x0C 26. "FPESEL,Frame Preemption Enable This bit is set to 1 when the Enable Frame preemption feature is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x0C 22.--25. "Reserved_25_22,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x0C 20.--21. "ESTWID,Width of the Time Interval field in the Gate Control List This field indicates the width of the Configured Time Interval Field" "0: NOWIDTH,1: WIDTH16,2: WIDTH20,3: WIDTH24" newline bitfld.long 0x0C 17.--19. "ESTDEP,Depth of the Gate Control List Indicates the depth of Gate Control list in bytes" "0: NODEPTH,1: DEPTH64,2: DEPTH128,3: DEPTH256,4: DEPTH512,5: DEPTH1024,6: RSVD,?..." newline bitfld.long 0x0C 16. "ESTSEL,Enhancements to Scheduled Traffic Enable This bit is set to 1 when the Enable Enhancements to Scheduling Traffic feature is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x0C 15. "Reserved_15,Reserved" "0,1" newline bitfld.long 0x0C 13.--14. "FRPES,Flexible Receive Parser Table Entries size This field indicates the Max Number of Parser Entries supported by Flexible Receive Parser" "0: M_64ENTR,1: M_128ENTR,2: M_256ENTR,3: RSVD" newline bitfld.long 0x0C 11.--12. "FRPBS,Flexible Receive Parser Buffer size This field indicates the supported Max Number of bytes of the packet data to be Parsed by Flexible Receive Parser" "0: M_64BYTES,1: M_128BYTES,2: M_256BYTES,3: RSVD" newline bitfld.long 0x0C 10. "FRPSEL,Flexible Receive Parser Selected This bit is set to 1 when the Enable Flexible Programmable Receive Parser option is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x0C 9. "PDUPSEL,Broadcast/Multicast Packet Duplication This bit is set to 1 when the Broadcast/Multicast Packet Duplication feature is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x0C 6.--8. "Reserved_7_6,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 5. "DVLAN,Double VLAN Tag Processing Selected This bit is set to 1 when the Enable Double VLAN Processing Feature is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x0C 4. "CBTISEL,Queue/Channel based VLAN tag insertion on Tx Enable This bit is set to 1 when the Enable Queue/Channel based VLAN tag insertion on Tx Feature is selected" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x0C 3. "Reserved_3,Reserved" "0,1" newline bitfld.long 0x0C 0.--2. "NRVF,Number of Extended VLAN Tag Filters Enabled This field indicates the Number of Extended VLAN Tag Filters selected" "0: NO_ERVLAN,1: M_4_ERVLAN,2: M_8_ERVLAN,3: M_16_ERVLAN,4: M_24_ERVLAN,5: M_32_ERVLAN,6: RSVD,?..." line.long 0x10 "MAC_HW_Feature4,This register indicates the presence of the fifth set of optional features or functions of the DWC_ether_qos. The software driver can use this register to dynamically enable or disable the programs related to the optional blocks." hexmask.long 0x10 2.--31. 1. "Reserved_31_2,Reserved" newline bitfld.long 0x10 0.--1. "PCSEL,Policing Counters Selected This field indicates the Number of Policing Counters selected" "0: INACTIVE,1: PCNUM_16,2: PCNUM_32,3: RSVD" group.long ad:0xC00BC140++0x03 line.long 0x00 "MAC_DPP_FSM_Interrupt_Status,This register contains the status of Automotive Safety related Data Path Parity Errors Interface Timeout Errors FSM State Parity Errors and FSM State Timeout Errors. All the non-Reserved bits are cleared on read." rbitfld.long 0x00 29.--31. "Reserved_31_29,Reserved" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x00 28. "Reserved_DCPES,Reserved" "0,1" newline bitfld.long 0x00 27. "MRWCPES,MTL RWC data path Parity checker Error Status This field when set indicates that parity error is detected on the MTL RWC data interface (or at PC12 as shown in Recieve data path parity protection diagram)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 26. "MTFCPES,MAC TFC data path Parity checker Error Status This field when set indicates that parity error is detected on the MAC TFC data interface (or at PC11 as shown in Transmit data path parity protection diagram)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 25. "MTBUPES,MAC TBU data path Parity checker Error Status This field when set indicates that parity error is detected on the MAC TBU data interface (or at PC10 as shown in Transmit data path parity protection diagram)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 24. "FSMPES,FSM State Parity Error Status This field when set indicates one of the FSMs State registers has a parity error detected" "0: INACTIVE,1: ACTIVE" newline hexmask.long.byte 0x00 18.--23. 1. "Reserved_23_18,Reserved" newline bitfld.long 0x00 17. "SLVTES,Slave Read/Write Timeout Error Status This field when set indicates that an Application/CSR Timeout has occurred on the AXI slave interface" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 16. "MSTTES,Master Read/Write Timeout Error Status This field when set indicates that an Application/CSR Timeout has occurred on the master (AXI/AHB/ARI/ATI) interface" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 15. "Reserved_RVCTES,Reserved" "0,1" newline rbitfld.long 0x00 14. "Reserved_R125ES,Reserved" "0,1" newline rbitfld.long 0x00 13. "Reserved_T125ES,Reserved" "0,1" newline bitfld.long 0x00 12. "PTES,PTP FSM Timeout Error Status This field when set indicates that one of the PTP FSM Timeout has occurred" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11. "ATES,APP FSM Timeout Error Status This field when set indicates that one of the APP FSM Timeout has occurred" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 10. "CTES,CSR FSM Timeout Error Status This field when set indicates that one of the CSR FSM Timeout has occurred" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 9. "RTES,Rx FSM Timeout Error Status This field when set indicates that one of the Rx FSM Timeout has occurred" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 8. "TTES,Tx FSM Timeout Error Status This field when set indicates that one of the Tx FSM Timeout has occurred" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 7. "Reserved_ASRPES,Reserved" "0,1" newline bitfld.long 0x00 6. "CWPES,CSR Write data path Parity checker Error Status This bit when set indicates that parity error is detected at the CSR write data interface on mci_wdata_i (or at PC8 checker as shown in AXI slave Interface Data path parity protection diagram)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 5. "ARPES,Application Receive interface data path Parity Error Status This bit when set indicates that a parity error is detected at the following checkers based on the system configuration: - In MTL configuration (DWC_EQOS_SYS=1) parity checker (PC6 as.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 4. "MTSPES,MTL TX Status data path Parity checker Error Status This field when set indicates that parity error is detected on the MTL TX Status data on ati interface (or at PC5 as shown in Transmit data path parity protection diagram)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 3. "MPES,MTL data path Parity checker Error Status This bit when set indicates that a parity error is detected at the MTL transmit write controller parity checker (or at PC4 as shown in Transmit data path parity protection diagram)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 2. "RDPES,Read Descriptor Parity checker Error Status This bit when set indicates that a parity error is detected at the DMA Read descriptor parity checker (or at PC3 as shown in Transmit data path parity protection diagram)" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 1. "Reserved_TPES,Reserved" "0,1" newline bitfld.long 0x00 0. "ATPES,Application Transmit Interface Parity checker Error Status This bit when set indicates that a parity error is detected on the AXI/AHB Master read data parity checker" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BC148++0x0B line.long 0x00 "MAC_FSM_Control,This register is used to control the FSM State parity and timeout error injection in Debug mode." rbitfld.long 0x00 31. "Reserved_RVCLGRNML,Reserved" "0,1" newline rbitfld.long 0x00 30. "Reserved_R125LGRNML,Reserved" "0,1" newline rbitfld.long 0x00 29. "Reserved_T125LGRNML,Reserved" "0,1" newline bitfld.long 0x00 28. "PLGRNML,PTP Large/Normal Mode Select This field when set indicates that large mode tic generation is used for PTP domain else normal mode tic generation is used" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 27. "ALGRNML,APP Large or Normal Mode Select" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 26. "CLGRNML,CSR Large/Normal Mode Select This field when set indicates that large mode tic generation is used for CSR domain else normal mode tic generation is used" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 25. "RLGRNML,Rx Large/Normal Mode Select This field when set indicates that large mode tic generation is used for Rx domain else normal mode tic generation is used" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 24. "TLGRNML,Tx Large/Normal Mode Select This field when set indicates that large mode tic generation is used for Tx domain else normal mode tic generation is used" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 23. "Reserved_RVCPEIN,Reserved" "0,1" newline rbitfld.long 0x00 22. "Reserved_R125PEIN,Reserved" "0,1" newline rbitfld.long 0x00 21. "Reserved_T125PEIN,Reserved" "0,1" newline bitfld.long 0x00 20. "PPEIN,PTP FSM One Hot Protection Error Injection This field when set indicates that Error Injection for PTP FSM One Hot Protection is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 19. "APEIN,APP FSM One Hot Protection Error Injection This field when set indicates that Error Injection for APP FSM One Hot Protection is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 18. "CPEIN,CSR FSM One Hot Protection Error Injection This field when set indicates that Error Injection for CSR Parity is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 17. "RPEIN,Rx FSM One Hot Protection Error Injection This field when set indicates that Error Injection for RX FSM One Hot Protection is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 16. "TPEIN,Tx FSM One Hot Protection Error Injection This field when set indicates that Error Injection for TX FSM One Hot Protection is enabled" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 15. "Reserved_RVCTEIN,Reserved" "0,1" newline rbitfld.long 0x00 14. "Reserved_R125TEIN,Reserved" "0,1" newline rbitfld.long 0x00 13. "Reserved_T125TEIN,Reserved" "0,1" newline bitfld.long 0x00 12. "PTEIN,PTP FSM Timeout Error Injection This field when set indicates that Error Injection for PTP FSM timeout is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 11. "ATEIN,APP FSM Timeout Error Injection This field when set indicates that Error Injection for APP FSM timeout is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 10. "CTEIN,CSR FSM Timeout Error Injection This field when set indicates that Error Injection for CSR timeout is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 9. "RTEIN,Rx FSM Timeout Error Injection This field when set indicates that Error Injection for RX FSM timeout is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 8. "TTEIN,Tx FSM Timeout Error Injection This field when set indicates that Error Injection for TX FSM timeout is enabled" "0: DISABLE,1: ENABLE" newline hexmask.long.byte 0x00 2.--7. 1. "Reserved_7_2,Reserved" newline bitfld.long 0x00 1. "PRTYEN,This bit when set indicates that the FSM One Hot Protection feature is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "TMOUTEN,This bit when set indicates that the FSM timeout feature is enabled" "0: DISABLE,1: ENABLE" line.long 0x04 "MAC_FSM_ACT_Timer,This register is used to select the FSM and Interface Timeout values." hexmask.long.byte 0x04 24.--31. 1. "Reserved_31_24,Reserved" newline bitfld.long 0x04 20.--23. "LTMRMD,Large Mode Timeout Value This field provides the mode value to be used for large mode FSM and other interface time outs" "0: DISABLE,1: M_1MICRO_SEC,2: M_4MILLI_SEC,3: M_16MILLI_SEC,4: M_64MILLI_SEC,5: M_256MILLI_SEC,6: M_1SEC,7: M_4SEC,8: M_16SEC,9: M_32SEC,10: M_64SEC,11: RSVD,?..." newline bitfld.long 0x04 16.--19. "NTMRMD,Normal Mode Timeout Value This field provides the value to be used for normal mode FSM and other interface time outs" "0: DISABLE,1: M_1MICRO_SEC,2: M_4MILLI_SEC,3: M_16MILLI_SEC,4: M_64MILLI_SEC,5: M_256MILLI_SEC,6: M_1SEC,7: M_4SEC,8: M_16SEC,9: M_32SEC,10: M_64SEC,11: RSVD,?..." newline hexmask.long.byte 0x04 10.--15. 1. "Reserved_15_10,Reserved" newline hexmask.long.word 0x04 0.--9. 1. "TMR,CSR Clocks for 1us Tic This field indicates the number of CSR clocks required to generate 1us tic" line.long 0x08 "SNPS_SCS_REG1,Synopsys Reserved Register" group.long ad:0xC00BC200++0x07 line.long 0x00 "MAC_MDIO_Address,The MDIO Address register controls the management cycles to external PHY through a management interface." rbitfld.long 0x00 29.--31. "Reserved_31_29,Reserved" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x00 28. "Reserved_RAT,Reserved" "0,1" newline bitfld.long 0x00 27. "PSE,Preamble Suppression Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 26. "BTB,Back-to-Back Transactions" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 21.--25. "PA,Physical Layer Address Specifies the address of the PHY device out of the 32 possible PHY devices" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 16.--20. "RDA,Register or Device Address - For clause 22 PHY: Specifies the PHY register address of the selected PHY device" "0: B10T1S PLCA control,1: B10T1S PLCA node control,2: B10T1S PLCA status,3: B10T1S PLCA timer - 5'b00100-5'b01010: Reserved,?,?,?,?,?,?,?,11: B10T1S PCS control,12: B10T1S PCS status,13: B10T1S PCS diagnostic,14: B10T1S PCS diagnostic,15: B10T1S PCS Jab Timer - 5'b10000-5'b10011:..,?,?,?,?,20: B10T1S PMA/PMD extended ability,21: B10T1S PMA/PMD control,22: B10T1S PMA control,23: B10T1S PMA status,24: B10T1S test mode control,25: B10T1S Debug_mode - 5'b11010-5'b11111:..,?..." newline rbitfld.long 0x00 15. "Reserved_15,Reserved" "0,1" newline bitfld.long 0x00 12.--14. "NTC,Number of Trailing Clocks This field controls the number of trailing clock cycles generated on the gmii_mdc_o (MDC) signal after the end of MDIO frame transfer" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 8.--11. "CR,CSR Clock Range The CSR Clock Range selection determines the frequency of the MDC clock according to the CSR clock frequency used in your design" "0: CSR clock = 60-100 MHz MDC clock = CSR clock/42,1: CSR clock = 100-150 MHz MDC clock = CSR..,2: CSR clock = 20-35 MHz MDC clock = CSR clock/16,3: 0) ensures that the MDC clock is approximately,4: CSR clock = 150-250 MHz MDC clock = CSR..,5: CSR clock = 250-300 MHz MDC clock = CSR..,6: CSR clock = 300-500 MHz MDC clock = CSR..,7: CSR clock = 500-800 MHz MDC clock = CSR,8: CSR clock/4,9: CSR clock/6,10: CSR clock/8,11: CSR clock/10,12: CSR clock/12,13: CSR clock/14,14: CSR clock/16,15: CSR clock/18" newline rbitfld.long 0x00 5.--7. "Reserved_7_5,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4. "SKAP,Skip Address Packet" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 3. "GOC_1,GMII Operation Command 1 This bit is higher bit of the operation command to the PHY or RevMII GOC_1 and GOC_O is encoded as follows" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 2. "GOC_0,GMII Operation Command 0 This is the lower bit of the operation command to the PHY or RevMII" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 1. "C45E,Clause 45 PHY Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "GB,GMII Busy The application writes 1 to this bit to instruct the SMA to initiate a read or write access to the MDIO slave" "0: DISABLE,1: ENABLE" line.long 0x04 "MAC_MDIO_Data,The MDIO Data register stores the Write data to be written to the PHY register located at the address specified in MAC_MDIO_Address. This register also stores the Read data from the PHY register located at the address specified by MDIO.." hexmask.long.word 0x04 16.--31. 1. "RA,Register Address This field is valid only when C45E is set" newline hexmask.long.word 0x04 0.--15. 1. "GD,GMII Data This field contains the 16-bit data value read from the PHY after a Management Read operation or the 16-bit data value to be written to the PHY before a Management Write operation" group.long ad:0xC00BC230++0x0B line.long 0x00 "MAC_CSR_SW_Ctrl,This register contains software programmable controls for changing the CSR access response and status bits clearing." hexmask.long.tbyte 0x00 10.--31. 1. "Reserved_31_10,Reserved" newline rbitfld.long 0x00 9. "Reserved_ASPSSE,Reserved" "0,1" newline bitfld.long 0x00 8. "SEEN,Slave Error Response Enable When this bit is set the MAC responds with Slave Error for accesses to reserved registers in CSR space" "0: DISABLE,1: ENABLE" newline hexmask.long.byte 0x00 1.--7. 1. "Reserved_7_1,Reserved" newline bitfld.long 0x00 0. "RCWE,Register Clear on Write 1 Enable When this bit is set the access mode of some register fields changes to Clear on Write 1 the application needs to set that respective bit to 1 to clear it" "0: DISABLE,1: ENABLE" line.long 0x04 "MAC_FPE_CTRL_STS,This register controls the operation of Frame Preemption." hexmask.long.word 0x04 20.--31. 1. "Reserved_31_20,Reserved" newline bitfld.long 0x04 19. "TRSP,Transmitted Respond Frame Set when a Respond mPacket is transmitted (triggered by setting SRSP field)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 18. "TVER,Transmitted Verify Frame Set when a Verify mPacket is transmitted (triggered by setting SVER field)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 17. "RRSP,Received Respond Frame Set when a Respond mPacket is received" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 16. "RVER,Received Verify Frame Set when a Verify mPacket is received" "0: INACTIVE,1: ACTIVE" newline hexmask.long.word 0x04 5.--15. 1. "Reserved_15_5,Reserved" newline bitfld.long 0x04 4. "S1_SET_0,Synopsys Reserved Must be set to '0'" "0,1" newline bitfld.long 0x04 3. "ARV,Autogenerate Respond mPacket on receiving Verify mPacket When set enable the function that autogenerate a Respond mPacket on receiving Verify mPacket" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 2. "SRSP,Send Respond mPacket When set indicates hardware to send a Respond mPacket" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 1. "SVER,Send Verify mPacket When set indicates hardware to send a verify mPacket" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 0. "EFPE,Enable Tx Frame Preemption When set Frame Preemption Tx functionality is enabled" "0: DISABLE,1: ENABLE" line.long 0x08 "MAC_Ext_Cfg1,This register contains Split mode control field and offset field for Split Header feature." hexmask.long.byte 0x08 25.--31. 1. "Reserved_31_25,Reserved" newline bitfld.long 0x08 24. "SAVE,Split AV Enable - When this bit is set to 1 and the received packet is an AV Type packet the header is split at SAVO bytes from the beginning of Length/Type field of the packet for L2 Split" "0,1" newline rbitfld.long 0x08 23. "Reserved_23,Reserved" "0,1" newline hexmask.long.byte 0x08 16.--22. 1. "SAVO,Split AV Offset When SAVE bit is set to 1 and the received packet is an AV Type packet these bits indicate the value of the offset from the beginning of Length/Type field at which header should be split when appropriate SPLM is selected" newline hexmask.long.byte 0x08 10.--15. 1. "Reserved_15_10,Reserved" newline bitfld.long 0x08 8.--9. "SPLM,Split Mode These bits indicate the mode of splitting the incoming Rx packets" "0: L3L4,1: L2OFST,2: COMBN,3: RSVD" newline rbitfld.long 0x08 7. "Reserved_7,Reserved" "0,1" newline hexmask.long.byte 0x08 0.--6. 1. "SPLOFST,Split Offset These bits indicate the value of offset from the beginning of Length/Type field at which header split should take place when the appropriate SPLM is selected" rgroup.long ad:0xC00BC240++0x03 line.long 0x00 "MAC_Presn_Time_ns,This register contains the 32-bit binary rollover equivalent time of the PTP System Time in ns." group.long ad:0xC00BC244++0x03 line.long 0x00 "MAC_Presn_Time_Updt,This field holds the 32-bit value of MAC 1722 Presentation Time in ns that should be added to the Current Presentation Time Counter value. Init happens when TSINIT is set and update happens when the TSUPDT bit is set (TSINIT and.." abitfld.long 0x00 0.--31. "MPTU,MAC 1722 Presentation Time Update This field contains the initial value or the update value for the presentation time" "0x00000000000000000000000000000000=..,0x00000000000000000000000000000001=.." group.long ad:0xC00BC300++0xFF line.long 0x00 "MAC_Address0_High,The MAC Address0 High register holds the upper 16 bits of the 1st 6-byte MAC address of the station. The first DA byte that is received on the (G)MII interface corresponds to the LS byte (Bits [7:0]) of the MAC Address Low register.." rbitfld.long 0x00 31. "AE,Address Enable This bit is always set to 1" "0: DISABLE,1: ENABLE" newline hexmask.long.word 0x00 20.--30. 1. "Reserved_30_y,Reserved" newline bitfld.long 0x00 16.--19. "DCS,DMA Channel Select This field indicates the Rx DMA channel number or DMA channel numbers to which the MAC routes the received packet" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--15. 1. "ADDRHI,MAC Address0[47:32] This field contains the upper 16 bits [47:32] of the 1st 6-byte MAC address" line.long 0x04 "MAC_Address0_Low,The MAC Address0 Low register holds the lower 32 bits of the 1st 6-byte MAC address of the station." line.long 0x08 "MAC_Address1_High,The MAC Address1 High register holds the upper 16 bits of the 2nd 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x08 31. "AE,Address Enable When this bit is set the address filter module uses the 2nd MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x08 30. "SA,Source Address When this bit is set the MAC Address1[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x08 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x08 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address1 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x08 0.--15. 1. "ADDRHI,MAC Address1 [47:32] This field contains the upper 16 bits[47:32] of the 2nd 6-byte MAC address" line.long 0x0C "MAC_Address1_Low,The MAC Address1 Low register holds the lower 32 bits of the 2nd 6-byte MAC address of the station." line.long 0x10 "MAC_Address2_High,The MAC Address2 High register holds the upper 16 bits of the 3rd 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x10 31. "AE,Address Enable When this bit is set the address filter module uses the 3rd MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x10 30. "SA,Source Address When this bit is set the MAC Address2[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x10 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x10 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x10 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address2 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x10 0.--15. 1. "ADDRHI,MAC Address2 [47:32] This field contains the upper 16 bits[47:32] of the 3rd 6-byte MAC address" line.long 0x14 "MAC_Address2_Low,The MAC Address2 Low register holds the lower 32 bits of the 3rd 6-byte MAC address of the station." line.long 0x18 "MAC_Address3_High,The MAC Address3 High register holds the upper 16 bits of the 4th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x18 31. "AE,Address Enable When this bit is set the address filter module uses the 4th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x18 30. "SA,Source Address When this bit is set the MAC Address3[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x18 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x18 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x18 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address3 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x18 0.--15. 1. "ADDRHI,MAC Address3 [47:32] This field contains the upper 16 bits[47:32] of the 4th 6-byte MAC address" line.long 0x1C "MAC_Address3_Low,The MAC Address3 Low register holds the lower 32 bits of the 4th 6-byte MAC address of the station." line.long 0x20 "MAC_Address4_High,The MAC Address4 High register holds the upper 16 bits of the 5th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x20 31. "AE,Address Enable When this bit is set the address filter module uses the 5th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x20 30. "SA,Source Address When this bit is set the MAC Address4[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x20 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x20 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x20 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address4 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x20 0.--15. 1. "ADDRHI,MAC Address4 [47:32] This field contains the upper 16 bits[47:32] of the 5th 6-byte MAC address" line.long 0x24 "MAC_Address4_Low,The MAC Address4 Low register holds the lower 32 bits of the 5th 6-byte MAC address of the station." line.long 0x28 "MAC_Address5_High,The MAC Address5 High register holds the upper 16 bits of the 6th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x28 31. "AE,Address Enable When this bit is set the address filter module uses the 6th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x28 30. "SA,Source Address When this bit is set the MAC Address5[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x28 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x28 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x28 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address5 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x28 0.--15. 1. "ADDRHI,MAC Address5 [47:32] This field contains the upper 16 bits[47:32] of the 6th 6-byte MAC address" line.long 0x2C "MAC_Address5_Low,The MAC Address5 Low register holds the lower 32 bits of the 6th 6-byte MAC address of the station." line.long 0x30 "MAC_Address6_High,The MAC Address6 High register holds the upper 16 bits of the 7th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x30 31. "AE,Address Enable When this bit is set the address filter module uses the 7th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x30 30. "SA,Source Address When this bit is set the MAC Address6[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x30 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x30 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x30 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address6 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x30 0.--15. 1. "ADDRHI,MAC Address6 [47:32] This field contains the upper 16 bits[47:32] of the 7th 6-byte MAC address" line.long 0x34 "MAC_Address6_Low,The MAC Address6 Low register holds the lower 32 bits of the 7th 6-byte MAC address of the station." line.long 0x38 "MAC_Address7_High,The MAC Address7 High register holds the upper 16 bits of the 8th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x38 31. "AE,Address Enable When this bit is set the address filter module uses the 8th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x38 30. "SA,Source Address When this bit is set the MAC Address7[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x38 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x38 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x38 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address7 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x38 0.--15. 1. "ADDRHI,MAC Address7 [47:32] This field contains the upper 16 bits[47:32] of the 8th 6-byte MAC address" line.long 0x3C "MAC_Address7_Low,The MAC Address7 Low register holds the lower 32 bits of the 8th 6-byte MAC address of the station." line.long 0x40 "MAC_Address8_High,The MAC Address8 High register holds the upper 16 bits of the 9th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x40 31. "AE,Address Enable When this bit is set the address filter module uses the 9th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x40 30. "SA,Source Address When this bit is set the MAC Address8[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x40 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x40 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x40 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address8 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x40 0.--15. 1. "ADDRHI,MAC Address8 [47:32] This field contains the upper 16 bits[47:32] of the 9th 6-byte MAC address" line.long 0x44 "MAC_Address8_Low,The MAC Address8 Low register holds the lower 32 bits of the 9th 6-byte MAC address of the station." line.long 0x48 "MAC_Address9_High,The MAC Address9 High register holds the upper 16 bits of the 10th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x48 31. "AE,Address Enable When this bit is set the address filter module uses the 10th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x48 30. "SA,Source Address When this bit is set the MAC Address9[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x48 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x48 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x48 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address9 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x48 0.--15. 1. "ADDRHI,MAC Address9 [47:32] This field contains the upper 16 bits[47:32] of the 10th 6-byte MAC address" line.long 0x4C "MAC_Address9_Low,The MAC Address9 Low register holds the lower 32 bits of the 10th 6-byte MAC address of the station." line.long 0x50 "MAC_Address10_High,The MAC Address10 High register holds the upper 16 bits of the 11th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x50 31. "AE,Address Enable When this bit is set the address filter module uses the 11th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x50 30. "SA,Source Address When this bit is set the MAC Address10[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x50 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x50 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x50 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address10 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x50 0.--15. 1. "ADDRHI,MAC Address10 [47:32] This field contains the upper 16 bits[47:32] of the 11th 6-byte MAC address" line.long 0x54 "MAC_Address10_Low,The MAC Address10 Low register holds the lower 32 bits of the 11th 6-byte MAC address of the station." line.long 0x58 "MAC_Address11_High,The MAC Address11 High register holds the upper 16 bits of the 12th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x58 31. "AE,Address Enable When this bit is set the address filter module uses the 12th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x58 30. "SA,Source Address When this bit is set the MAC Address11[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x58 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x58 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x58 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address11 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x58 0.--15. 1. "ADDRHI,MAC Address11 [47:32] This field contains the upper 16 bits[47:32] of the 12th 6-byte MAC address" line.long 0x5C "MAC_Address11_Low,The MAC Address11 Low register holds the lower 32 bits of the 12th 6-byte MAC address of the station." line.long 0x60 "MAC_Address12_High,The MAC Address12 High register holds the upper 16 bits of the 13th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x60 31. "AE,Address Enable When this bit is set the address filter module uses the 13th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x60 30. "SA,Source Address When this bit is set the MAC Address12[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x60 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x60 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x60 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address12 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x60 0.--15. 1. "ADDRHI,MAC Address12 [47:32] This field contains the upper 16 bits[47:32] of the 13th 6-byte MAC address" line.long 0x64 "MAC_Address12_Low,The MAC Address12 Low register holds the lower 32 bits of the 13th 6-byte MAC address of the station." line.long 0x68 "MAC_Address13_High,The MAC Address13 High register holds the upper 16 bits of the 14th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x68 31. "AE,Address Enable When this bit is set the address filter module uses the 14th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x68 30. "SA,Source Address When this bit is set the MAC Address13[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x68 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x68 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x68 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address13 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x68 0.--15. 1. "ADDRHI,MAC Address13 [47:32] This field contains the upper 16 bits[47:32] of the 14th 6-byte MAC address" line.long 0x6C "MAC_Address13_Low,The MAC Address13 Low register holds the lower 32 bits of the 14th 6-byte MAC address of the station." line.long 0x70 "MAC_Address14_High,The MAC Address14 High register holds the upper 16 bits of the 15th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x70 31. "AE,Address Enable When this bit is set the address filter module uses the 15th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x70 30. "SA,Source Address When this bit is set the MAC Address14[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x70 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x70 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x70 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address14 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x70 0.--15. 1. "ADDRHI,MAC Address14 [47:32] This field contains the upper 16 bits[47:32] of the 15th 6-byte MAC address" line.long 0x74 "MAC_Address14_Low,The MAC Address14 Low register holds the lower 32 bits of the 15th 6-byte MAC address of the station." line.long 0x78 "MAC_Address15_High,The MAC Address15 High register holds the upper 16 bits of the 16th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x78 31. "AE,Address Enable When this bit is set the address filter module uses the 16th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x78 30. "SA,Source Address When this bit is set the MAC Address15[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x78 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x78 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x78 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address15 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x78 0.--15. 1. "ADDRHI,MAC Address15 [47:32] This field contains the upper 16 bits[47:32] of the 16th 6-byte MAC address" line.long 0x7C "MAC_Address15_Low,The MAC Address15 Low register holds the lower 32 bits of the 16th 6-byte MAC address of the station." line.long 0x80 "MAC_Address16_High,The MAC Address16 High register holds the upper 16 bits of the 17th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x80 31. "AE,Address Enable When this bit is set the address filter module uses the 17th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x80 30. "SA,Source Address When this bit is set the MAC Address16[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x80 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x80 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x80 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address16 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x80 0.--15. 1. "ADDRHI,MAC Address16 [47:32] This field contains the upper 16 bits[47:32] of the 17th 6-byte MAC address" line.long 0x84 "MAC_Address16_Low,The MAC Address16 Low register holds the lower 32 bits of the 17th 6-byte MAC address of the station." line.long 0x88 "MAC_Address17_High,The MAC Address17 High register holds the upper 16 bits of the 18th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x88 31. "AE,Address Enable When this bit is set the address filter module uses the 18th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x88 30. "SA,Source Address When this bit is set the MAC Address17[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x88 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x88 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x88 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address17 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x88 0.--15. 1. "ADDRHI,MAC Address17 [47:32] This field contains the upper 16 bits[47:32] of the 18th 6-byte MAC address" line.long 0x8C "MAC_Address17_Low,The MAC Address17 Low register holds the lower 32 bits of the 18th 6-byte MAC address of the station." line.long 0x90 "MAC_Address18_High,The MAC Address18 High register holds the upper 16 bits of the 19th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x90 31. "AE,Address Enable When this bit is set the address filter module uses the 19th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x90 30. "SA,Source Address When this bit is set the MAC Address18[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x90 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x90 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x90 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address18 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x90 0.--15. 1. "ADDRHI,MAC Address18 [47:32] This field contains the upper 16 bits[47:32] of the 19th 6-byte MAC address" line.long 0x94 "MAC_Address18_Low,The MAC Address18 Low register holds the lower 32 bits of the 19th 6-byte MAC address of the station." line.long 0x98 "MAC_Address19_High,The MAC Address19 High register holds the upper 16 bits of the 20th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0x98 31. "AE,Address Enable When this bit is set the address filter module uses the 20th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0x98 30. "SA,Source Address When this bit is set the MAC Address19[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0x98 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0x98 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x98 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address19 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x98 0.--15. 1. "ADDRHI,MAC Address19 [47:32] This field contains the upper 16 bits[47:32] of the 20th 6-byte MAC address" line.long 0x9C "MAC_Address19_Low,The MAC Address19 Low register holds the lower 32 bits of the 20th 6-byte MAC address of the station." line.long 0xA0 "MAC_Address20_High,The MAC Address20 High register holds the upper 16 bits of the 21st 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xA0 31. "AE,Address Enable When this bit is set the address filter module uses the 21st MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xA0 30. "SA,Source Address When this bit is set the MAC Address20[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xA0 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xA0 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xA0 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address20 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xA0 0.--15. 1. "ADDRHI,MAC Address20 [47:32] This field contains the upper 16 bits[47:32] of the 21st 6-byte MAC address" line.long 0xA4 "MAC_Address20_Low,The MAC Address20 Low register holds the lower 32 bits of the 21st 6-byte MAC address of the station." line.long 0xA8 "MAC_Address21_High,The MAC Address21 High register holds the upper 16 bits of the 22nd 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xA8 31. "AE,Address Enable When this bit is set the address filter module uses the 22nd MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xA8 30. "SA,Source Address When this bit is set the MAC Address21[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xA8 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xA8 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xA8 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address21 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xA8 0.--15. 1. "ADDRHI,MAC Address21 [47:32] This field contains the upper 16 bits[47:32] of the 22nd 6-byte MAC address" line.long 0xAC "MAC_Address21_Low,The MAC Address21 Low register holds the lower 32 bits of the 22nd 6-byte MAC address of the station." line.long 0xB0 "MAC_Address22_High,The MAC Address22 High register holds the upper 16 bits of the 23rd 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xB0 31. "AE,Address Enable When this bit is set the address filter module uses the 23rd MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xB0 30. "SA,Source Address When this bit is set the MAC Address22[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xB0 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xB0 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xB0 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address22 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xB0 0.--15. 1. "ADDRHI,MAC Address22 [47:32] This field contains the upper 16 bits[47:32] of the 23rd 6-byte MAC address" line.long 0xB4 "MAC_Address22_Low,The MAC Address22 Low register holds the lower 32 bits of the 23rd 6-byte MAC address of the station." line.long 0xB8 "MAC_Address23_High,The MAC Address23 High register holds the upper 16 bits of the 24th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xB8 31. "AE,Address Enable When this bit is set the address filter module uses the 24th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xB8 30. "SA,Source Address When this bit is set the MAC Address23[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xB8 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xB8 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xB8 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address23 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xB8 0.--15. 1. "ADDRHI,MAC Address23 [47:32] This field contains the upper 16 bits[47:32] of the 24th 6-byte MAC address" line.long 0xBC "MAC_Address23_Low,The MAC Address23 Low register holds the lower 32 bits of the 24th 6-byte MAC address of the station." line.long 0xC0 "MAC_Address24_High,The MAC Address24 High register holds the upper 16 bits of the 25th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xC0 31. "AE,Address Enable When this bit is set the address filter module uses the 25th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xC0 30. "SA,Source Address When this bit is set the MAC Address24[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xC0 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xC0 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xC0 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address24 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xC0 0.--15. 1. "ADDRHI,MAC Address24 [47:32] This field contains the upper 16 bits[47:32] of the 25th 6-byte MAC address" line.long 0xC4 "MAC_Address24_Low,The MAC Address24 Low register holds the lower 32 bits of the 25th 6-byte MAC address of the station." line.long 0xC8 "MAC_Address25_High,The MAC Address25 High register holds the upper 16 bits of the 26th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xC8 31. "AE,Address Enable When this bit is set the address filter module uses the 26th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xC8 30. "SA,Source Address When this bit is set the MAC Address25[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xC8 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xC8 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xC8 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address25 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xC8 0.--15. 1. "ADDRHI,MAC Address25 [47:32] This field contains the upper 16 bits[47:32] of the 26th 6-byte MAC address" line.long 0xCC "MAC_Address25_Low,The MAC Address25 Low register holds the lower 32 bits of the 26th 6-byte MAC address of the station." line.long 0xD0 "MAC_Address26_High,The MAC Address26 High register holds the upper 16 bits of the 27th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xD0 31. "AE,Address Enable When this bit is set the address filter module uses the 27th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xD0 30. "SA,Source Address When this bit is set the MAC Address26[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xD0 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xD0 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xD0 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address26 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xD0 0.--15. 1. "ADDRHI,MAC Address26 [47:32] This field contains the upper 16 bits[47:32] of the 27th 6-byte MAC address" line.long 0xD4 "MAC_Address26_Low,The MAC Address26 Low register holds the lower 32 bits of the 27th 6-byte MAC address of the station." line.long 0xD8 "MAC_Address27_High,The MAC Address27 High register holds the upper 16 bits of the 28th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xD8 31. "AE,Address Enable When this bit is set the address filter module uses the 28th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xD8 30. "SA,Source Address When this bit is set the MAC Address27[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xD8 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xD8 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xD8 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address27 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xD8 0.--15. 1. "ADDRHI,MAC Address27 [47:32] This field contains the upper 16 bits[47:32] of the 28th 6-byte MAC address" line.long 0xDC "MAC_Address27_Low,The MAC Address27 Low register holds the lower 32 bits of the 28th 6-byte MAC address of the station." line.long 0xE0 "MAC_Address28_High,The MAC Address28 High register holds the upper 16 bits of the 29th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xE0 31. "AE,Address Enable When this bit is set the address filter module uses the 29th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xE0 30. "SA,Source Address When this bit is set the MAC Address28[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xE0 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xE0 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xE0 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address28 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xE0 0.--15. 1. "ADDRHI,MAC Address28 [47:32] This field contains the upper 16 bits[47:32] of the 29th 6-byte MAC address" line.long 0xE4 "MAC_Address28_Low,The MAC Address28 Low register holds the lower 32 bits of the 29th 6-byte MAC address of the station." line.long 0xE8 "MAC_Address29_High,The MAC Address29 High register holds the upper 16 bits of the 30th 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xE8 31. "AE,Address Enable When this bit is set the address filter module uses the 30th MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xE8 30. "SA,Source Address When this bit is set the MAC Address29[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xE8 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xE8 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xE8 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address29 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xE8 0.--15. 1. "ADDRHI,MAC Address29 [47:32] This field contains the upper 16 bits[47:32] of the 30th 6-byte MAC address" line.long 0xEC "MAC_Address29_Low,The MAC Address29 Low register holds the lower 32 bits of the 30th 6-byte MAC address of the station." line.long 0xF0 "MAC_Address30_High,The MAC Address30 High register holds the upper 16 bits of the 31st 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xF0 31. "AE,Address Enable When this bit is set the address filter module uses the 31st MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xF0 30. "SA,Source Address When this bit is set the MAC Address30[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xF0 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xF0 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xF0 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address30 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xF0 0.--15. 1. "ADDRHI,MAC Address30 [47:32] This field contains the upper 16 bits[47:32] of the 31st 6-byte MAC address" line.long 0xF4 "MAC_Address30_Low,The MAC Address30 Low register holds the lower 32 bits of the 31st 6-byte MAC address of the station." line.long 0xF8 "MAC_Address31_High,The MAC Address31 High register holds the upper 16 bits of the 32nd 6-byte MAC address of the station. If the MAC address registers are configured to be double-synchronized to the (G)MII clock domains the synchronization is triggered.." bitfld.long 0xF8 31. "AE,Address Enable When this bit is set the address filter module uses the 32nd MAC address for perfect filtering" "0: DISABLE,1: ENABLE" newline bitfld.long 0xF8 30. "SA,Source Address When this bit is set the MAC Address31[47:0] is used to compare with the SA fields of the received packet" "0: DA,1: SA" newline abitfld.long 0xF8 24.--29. "MBC,Mask Byte Control These bits are mask control bits for comparing each of the MAC Address bytes" "0x000018=0x000018,0x00001B=0x00001B,0x00001C=0x00001C,0x00001D=0x00001D" newline rbitfld.long 0xF8 20.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0xF8 16.--19. "DCS,DMA Channel Select If the PDC bit of MAC_Ext_Configuration register is not set: This field contains the binary representation of the DMA Channel number to which an Rx packet whose DA matches the MAC Address31 content is routed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0xF8 0.--15. 1. "ADDRHI,MAC Address31 [47:32] This field contains the upper 16 bits[47:32] of the 32nd 6-byte MAC address" line.long 0xFC "MAC_Address31_Low,The MAC Address31 Low register holds the lower 32 bits of the 32nd 6-byte MAC address of the station." group.long ad:0xC00BC700++0x03 line.long 0x00 "MMC_Control,This register establishes the operating mode of MMC." hexmask.long.tbyte 0x00 9.--31. 1. "Reserved_31_9,Reserved" newline bitfld.long 0x00 8. "UCDBC,Update MMC Counters for Dropped Broadcast Packets Note: The CNTRST bit has a higher priority than the CNTPRST bit" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 6.--7. "Reserved_7_6,Reserved" "0,1,2,3" newline bitfld.long 0x00 5. "CNTPRSTLVL,Full-Half Preset When this bit is low and the CNTPRST bit is set all MMC counters get preset to almost-half value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 4. "CNTPRST,Counters Preset When this bit is set all counters are initialized or preset to almost full or almost half according to the CNTPRSTLVL bit" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 3. "CNTFREEZ,MMC Counter Freeze When this bit is set it freezes all MMC counters to their current value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 2. "RSTONRD,Reset on Read When this bit is set the MMC counters are reset to zero after Read (self-clearing after reset)" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 1. "CNTSTOPRO,Counter Stop Rollover When this bit is set the counter does not roll over to zero after reaching the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "CNTRST,Counters Reset When this bit is set all counters are reset" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BC704++0x07 line.long 0x00 "MMC_Rx_Interrupt,This register maintains the interrupts generated from all Receive statistics counters. The MMC Receive Interrupt register maintains the interrupts that are generated when the following occur: - Receive statistic counters reach half of.." bitfld.long 0x00 28.--31. "Reserved_31_28,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 27. "RXLPITRCIS,MMC Receive LPI transition counter interrupt status This bit is set when the Rx_LPI_Tran_Cntr counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 26. "RXLPIUSCIS,MMC Receive LPI microsecond counter interrupt status This bit is set when the Rx_LPI_USEC_Cntr counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 25. "RXCTRLPIS,MMC Receive Control Packet Counter Interrupt Status This bit is set when the Rx_Control_Packets_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 24. "RXRCVERRPIS,MMC Receive Error Packet Counter Interrupt Status This bit is set when the Rx_Receive_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 23. "RXWDOGPIS,MMC Receive Watchdog Error Packet Counter Interrupt Status This bit is set when the Rx_Watchdog_Error_Packets error counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 22. "RXVLANGBPIS,MMC Receive VLAN Good Bad Packet Counter Interrupt Status This bit is set when the Rx_VLAN_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 21. "RXFOVPIS,MMC Receive FIFO Overflow Packet Counter Interrupt Status This bit is set when the Rx_FIFO_Overflow_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 20. "RXPAUSPIS,MMC Receive Pause Packet Counter Interrupt Status This bit is set when the Rx_Pause_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 19. "RXORANGEPIS,MMC Receive Out Of Range Error Packet Counter Interrupt Status" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 18. "RXLENERPIS,MMC Receive Length Error Packet Counter Interrupt Status This bit is set when the Rx_Length_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 17. "RXUCGPIS,MMC Receive Unicast Good Packet Counter Interrupt Status This bit is set when the Rx_Unicast_Packets_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 16. "RX1024TMAXOCTGBPIS,MMC Receive 1024 to Maximum Octet Good Bad Packet Counter Interrupt Status This bit is set when the Rx_1024ToMaxOctets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 15. "RX512T1023OCTGBPIS,MMC Receive 512 to 1023 Octet Good Bad Packet Counter Interrupt Status This bit is set when the Rx_512To1023Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 14. "RX256T511OCTGBPIS,MMC Receive 256 to 511 Octet Good Bad Packet Counter Interrupt Status This bit is set when the Rx_256To511Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 13. "RX128T255OCTGBPIS,MMC Receive 128 to 255 Octet Good Bad Packet Counter Interrupt Status This bit is set when the Rx_128To255Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 12. "RX65T127OCTGBPIS,MMC Receive 65 to 127 Octet Good Bad Packet Counter Interrupt Status This bit is set when the Rx_65To127Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11. "RX64OCTGBPIS,MMC Receive 64 Octet Good Bad Packet Counter Interrupt Status This bit is set when the Rx_64Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 10. "RXOSIZEGPIS,MMC Receive Oversize Good Packet Counter Interrupt Status This bit is set when the Rx_Oversize_Packets_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 9. "RXUSIZEGPIS,MMC Receive Undersize Good Packet Counter Interrupt Status This bit is set when the Rx_Undersize_Packets_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 8. "RXJABERPIS,MMC Receive Jabber Error Packet Counter Interrupt Status This bit is set when the Rx_Jabber_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 7. "RXRUNTPIS,MMC Receive Runt Packet Counter Interrupt Status This bit is set when the Rx_Runt_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 6. "RXALGNERPIS,MMC Receive Alignment Error Packet Counter Interrupt Status This bit is set when the Rx_Alignment_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 5. "RXCRCERPIS,MMC Receive CRC Error Packet Counter Interrupt Status This bit is set when the Rx_CRC_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 4. "RXMCGPIS,MMC Receive Multicast Good Packet Counter Interrupt Status This bit is set when the Rx_Multicast_Packets_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 3. "RXBCGPIS,MMC Receive Broadcast Good Packet Counter Interrupt Status This bit is set when the Rx_Broadcast_Packets_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 2. "RXGOCTIS,MMC Receive Good Octet Counter Interrupt Status This bit is set when the Rx_Octet_Count_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 1. "RXGBOCTIS,MMC Receive Good Bad Octet Counter Interrupt Status This bit is set when the Rx_Octet_Count_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "RXGBPKTIS,MMC Receive Good Bad Packet Counter Interrupt Status This bit is set when the Rx_Packets_Count_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" line.long 0x04 "MMC_Tx_Interrupt,This register maintains the interrupts generated from all Transmit statistics counters. The MMC Transmit Interrupt register maintains the interrupts generated when transmit statistic counters reach half their maximum values (0x8000_0000.." bitfld.long 0x04 28.--31. "Reserved_31_28,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 27. "TXLPITRCIS,MMC Transmit LPI transition counter interrupt status This bit is set when the Tx_LPI_Tran_Cntr counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 26. "TXLPIUSCIS,MMC Transmit LPI microsecond counter interrupt status This bit is set when the Tx_LPI_USEC_Cntr counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 25. "TXOSIZEGPIS,MMC Transmit Oversize Good Packet Counter Interrupt Status This bit is set when the Tx_OSize_Packets_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 24. "TXVLANGPIS,MMC Transmit VLAN Good Packet Counter Interrupt Status This bit is set when the Tx_VLAN_Packets_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 23. "TXPAUSPIS,MMC Transmit Pause Packet Counter Interrupt Status This bit is set when the Tx_Pause_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 22. "TXEXDEFPIS,MMC Transmit Excessive Deferral Packet Counter Interrupt Status This bit is set when the Tx_Excessive_Deferral_Error counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 21. "TXGPKTIS,MMC Transmit Good Packet Counter Interrupt Status This bit is set when the Tx_Packet_Count_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 20. "TXGOCTIS,MMC Transmit Good Octet Counter Interrupt Status This bit is set when the Tx_Octet_Count_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 19. "TXCARERPIS,MMC Transmit Carrier Error Packet Counter Interrupt Status This bit is set when the Tx_Carrier_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 18. "TXEXCOLPIS,MMC Transmit Excessive Collision Packet Counter Interrupt Status This bit is set when the Tx_Excessive_Collision_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 17. "TXLATCOLPIS,MMC Transmit Late Collision Packet Counter Interrupt Status This bit is set when the Tx_Late_Collision_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 16. "TXDEFPIS,MMC Transmit Deferred Packet Counter Interrupt Status This bit is set when the Tx_Deferred_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 15. "TXMCOLGPIS,MMC Transmit Multiple Collision Good Packet Counter Interrupt Status This bit is set when the Tx_Multiple_Collision_Good_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 14. "TXSCOLGPIS,MMC Transmit Single Collision Good Packet Counter Interrupt Status This bit is set when the Tx_Single_Collision_Good_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 13. "TXUFLOWERPIS,MMC Transmit Underflow Error Packet Counter Interrupt Status This bit is set when the Tx_Underflow_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 12. "TXBCGBPIS,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Status This bit is set when the Tx_Broadcast_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 11. "TXMCGBPIS,MMC Transmit Multicast Good Bad Packet Counter Interrupt Status The bit is set when the Tx_Multicast_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 10. "TXUCGBPIS,MMC Transmit Unicast Good Bad Packet Counter Interrupt Status This bit is set when the Tx_Unicast_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 9. "TX1024TMAXOCTGBPIS,MMC Transmit 1024 to Maximum Octet Good Bad Packet Counter Interrupt Status This bit is set when the Tx_1024ToMaxOctets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 8. "TX512T1023OCTGBPIS,MMC Transmit 512 to 1023 Octet Good Bad Packet Counter Interrupt Status This bit is set when the Tx_512To1023Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 7. "TX256T511OCTGBPIS,MMC Transmit 256 to 511 Octet Good Bad Packet Counter Interrupt Status This bit is set when the Tx_512To1023Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 6. "TX128T255OCTGBPIS,MMC Transmit 128 to 255 Octet Good Bad Packet Counter Interrupt Status This bit is set when the Tx_128To255Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 5. "TX65T127OCTGBPIS,MMC Transmit 65 to 127 Octet Good Bad Packet Counter Interrupt Status This bit is set when the Tx_65To127Octets_Packets_Good_Bad counter reaches half the maximum value and also when it reaches the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 4. "TX64OCTGBPIS,MMC Transmit 64 Octet Good Bad Packet Counter Interrupt Status This bit is set when the Tx_64Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 3. "TXMCGPIS,MMC Transmit Multicast Good Packet Counter Interrupt Status This bit is set when the Tx_Multicast_Packets_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 2. "TXBCGPIS,MMC Transmit Broadcast Good Packet Counter Interrupt Status This bit is set when the Tx_Broadcast_Packets_Good counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 1. "TXGBPKTIS,MMC Transmit Good Bad Packet Counter Interrupt Status This bit is set when the Tx_Packet_Count_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 0. "TXGBOCTIS,MMC Transmit Good Bad Octet Counter Interrupt Status This bit is set when the Tx_Octet_Count_Good_Bad counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BC70C++0x07 line.long 0x00 "MMC_Rx_Interrupt_Mask,This register maintains the masks for interrupts generated from all Receive statistics counters. The MMC Receive Interrupt Mask register maintains the masks for the interrupts generated when receive statistic counters reach half of.." rbitfld.long 0x00 28.--31. "Reserved_31_28,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 27. "RXLPITRCIM,MMC Receive LPI transition counter interrupt Mask Setting this bit masks the interrupt when the Rx_LPI_Tran_Cntr counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 26. "RXLPIUSCIM,MMC Receive LPI microsecond counter interrupt Mask Setting this bit masks the interrupt when the Rx_LPI_USEC_Cntr counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 25. "RXCTRLPIM,MMC Receive Control Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Control_Packets_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 24. "RXRCVERRPIM,MMC Receive Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Receive_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 23. "RXWDOGPIM,MMC Receive Watchdog Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Watchdog_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 22. "RXVLANGBPIM,MMC Receive VLAN Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_VLAN_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 21. "RXFOVPIM,MMC Receive FIFO Overflow Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_FIFO_Overflow_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 20. "RXPAUSPIM,MMC Receive Pause Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Pause_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 19. "RXORANGEPIM,MMC Receive Out Of Range Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Out_Of_Range_Type_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 18. "RXLENERPIM,MMC Receive Length Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Length_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 17. "RXUCGPIM,MMC Receive Unicast Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Unicast_Packets_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 16. "RX1024TMAXOCTGBPIM,MMC Receive 1024 to Maximum Octet Good Bad Packet Counter Interrupt Mask" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 15. "RX512T1023OCTGBPIM,MMC Receive 512 to 1023 Octet Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_512To1023Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 14. "RX256T511OCTGBPIM,MMC Receive 256 to 511 Octet Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_256To511Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 13. "RX128T255OCTGBPIM,MMC Receive 128 to 255 Octet Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_128To255Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 12. "RX65T127OCTGBPIM,MMC Receive 65 to 127 Octet Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_65To127Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 11. "RX64OCTGBPIM,MMC Receive 64 Octet Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_64Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 10. "RXOSIZEGPIM,MMC Receive Oversize Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Oversize_Packets_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 9. "RXUSIZEGPIM,MMC Receive Undersize Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Undersize_Packets_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 8. "RXJABERPIM,MMC Receive Jabber Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Jabber_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 7. "RXRUNTPIM,MMC Receive Runt Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Runt_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 6. "RXALGNERPIM,MMC Receive Alignment Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Alignment_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 5. "RXCRCERPIM,MMC Receive CRC Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_CRC_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 4. "RXMCGPIM,MMC Receive Multicast Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Multicast_Packets_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 3. "RXBCGPIM,MMC Receive Broadcast Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Broadcast_Packets_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 2. "RXGOCTIM,MMC Receive Good Octet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Octet_Count_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 1. "RXGBOCTIM,MMC Receive Good Bad Octet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Octet_Count_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "RXGBPKTIM,MMC Receive Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Packets_Count_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" line.long 0x04 "MMC_Tx_Interrupt_Mask,This register maintains the masks for interrupts generated from all Transmit statistics counters. The MMC Transmit Interrupt Mask register maintains the masks for the interrupts generated when the transmit statistic counters reach.." rbitfld.long 0x04 28.--31. "Reserved_31_28,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 27. "TXLPITRCIM,MMC Transmit LPI transition counter interrupt Mask Setting this bit masks the interrupt when the Tx_LPI_Tran_Cntr counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 26. "TXLPIUSCIM,MMC Transmit LPI microsecond counter interrupt Mask Setting this bit masks the interrupt when the Tx_LPI_USEC_Cntr counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 25. "TXOSIZEGPIM,MMC Transmit Oversize Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_OSize_Packets_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 24. "TXVLANGPIM,MMC Transmit VLAN Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_VLAN_Packets_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 23. "TXPAUSPIM,MMC Transmit Pause Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Pause_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 22. "TXEXDEFPIM,MMC Transmit Excessive Deferral Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Excessive_Deferral_Error counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 21. "TXGPKTIM,MMC Transmit Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Packet_Count_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 20. "TXGOCTIM,MMC Transmit Good Octet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Octet_Count_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 19. "TXCARERPIM,MMC Transmit Carrier Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Carrier_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 18. "TXEXCOLPIM,MMC Transmit Excessive Collision Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Excessive_Collision_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 17. "TXLATCOLPIM,MMC Transmit Late Collision Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Late_Collision_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 16. "TXDEFPIM,MMC Transmit Deferred Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Deferred_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 15. "TXMCOLGPIM,MMC Transmit Multiple Collision Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Multiple_Collision_Good_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 14. "TXSCOLGPIM,MMC Transmit Single Collision Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Single_Collision_Good_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 13. "TXUFLOWERPIM,MMC Transmit Underflow Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Underflow_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 12. "TXBCGBPIM,MMC Transmit Broadcast Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Broadcast_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 11. "TXMCGBPIM,MMC Transmit Multicast Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Multicast_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 10. "TXUCGBPIM,MMC Transmit Unicast Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Unicast_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 9. "TX1024TMAXOCTGBPIM,MMC Transmit 1024 to Maximum Octet Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_1024ToMaxOctets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 8. "TX512T1023OCTGBPIM,MMC Transmit 512 to 1023 Octet Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_512To1023Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 7. "TX256T511OCTGBPIM,MMC Transmit 256 to 511 Octet Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_512To1023Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 6. "TX128T255OCTGBPIM,MMC Transmit 128 to 255 Octet Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_128To255Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 5. "TX65T127OCTGBPIM,MMC Transmit 65 to 127 Octet Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_65To127Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 4. "TX64OCTGBPIM,MMC Transmit 64 Octet Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_64Octets_Packets_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 3. "TXMCGPIM,MMC Transmit Multicast Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Multicast_Packets_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 2. "TXBCGPIM,MMC Transmit Broadcast Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Broadcast_Packets_Good counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 1. "TXGBPKTIM,MMC Transmit Good Bad Packet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Packet_Count_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 0. "TXGBOCTIM,MMC Transmit Good Bad Octet Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Octet_Count_Good_Bad counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BC714++0x67 line.long 0x00 "Tx_Octet_Count_Good_Bad,This register provides the number of bytes transmitted by the DWC_ether_qos exclusive of preamble and retried bytes in good and bad packets." line.long 0x04 "Tx_Packet_Count_Good_Bad,This register provides the number of good and bad packets transmitted by DWC_ether_qos exclusive of retried packets." hexmask.long.word 0x04 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x04 0.--15. 1. "TXPKTGB,Tx Packet Count Good Bad This field indicates the number of good and bad packets transmitted exclusive of retried packets" line.long 0x08 "Tx_Broadcast_Packets_Good,This register provides the number of good broadcast packets transmitted by DWC_ether_qos." hexmask.long.word 0x08 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x08 0.--15. 1. "TXBCASTG,Tx Broadcast Packets Good This field indicates the number of good broadcast packets transmitted" line.long 0x0C "Tx_Multicast_Packets_Good,This register provides the number of good multicast packets transmitted by DWC_ether_qos." hexmask.long.word 0x0C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x0C 0.--15. 1. "TXMCASTG,Tx Multicast Packets Good This field indicates the number of good multicast packets transmitted" line.long 0x10 "Tx_64Octets_Packets_Good_Bad,This register provides the number of good and bad packets transmitted by DWC_ether_qos with length 64 bytes exclusive of preamble and retried packets." hexmask.long.word 0x10 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x10 0.--15. 1. "TX64OCTGB,Tx 64Octets Packets Good_Bad This field indicates the number of good and bad packets transmitted with length 64 bytes exclusive of preamble and retried packets" line.long 0x14 "Tx_65To127Octets_Packets_Good_Bad,This register provides the number of good and bad packets transmitted by DWC_ether_qos with length between 65 and 127 (inclusive) bytes exclusive of preamble and retried packets." hexmask.long.word 0x14 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x14 0.--15. 1. "TX65_127OCTGB,Tx 65To127Octets Packets Good Bad This field indicates the number of good and bad packets transmitted with length between 65 and 127 (inclusive) bytes exclusive of preamble and retried packets" line.long 0x18 "Tx_128To255Octets_Packets_Good_Bad,This register provides the number of good and bad packets transmitted by DWC_ether_qos with length between 128 to 255 (inclusive) bytes exclusive of preamble and retried packets." hexmask.long.word 0x18 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x18 0.--15. 1. "TX128_255OCTGB,Tx 128To255Octets Packets Good Bad This field indicates the number of good and bad packets transmitted with length between 128 and 255 (inclusive) bytes exclusive of preamble and retried packets" line.long 0x1C "Tx_256To511Octets_Packets_Good_Bad,This register provides the number of good and bad packets transmitted by DWC_ether_qos with length between 256 to 511 (inclusive) bytes exclusive of preamble and retried packets." hexmask.long.word 0x1C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x1C 0.--15. 1. "TX256_511OCTGB,Tx 256To511Octets Packets Good Bad This field indicates the number of good and bad packets transmitted with length between 256 and 511 (inclusive) bytes exclusive of preamble and retried packets" line.long 0x20 "Tx_512To1023Octets_Packets_Good_Bad,This register provides the number of good and bad packets transmitted by DWC_ether_qos with length 512 to 1023 (inclusive) bytes exclusive of preamble and retried packets." hexmask.long.word 0x20 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x20 0.--15. 1. "TX512_1023OCTGB,Tx 512To1023Octets Packets Good Bad This field indicates the number of good and bad packets transmitted with length between 512 and 1023 (inclusive) bytes exclusive of preamble and retried packets" line.long 0x24 "Tx_1024ToMaxOctets_Packets_Good_Bad,This register provides the number of good and bad packets transmitted by DWC_ether_qos with length 1024 to maxsize (inclusive) bytes exclusive of preamble and retried packets." hexmask.long.word 0x24 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x24 0.--15. 1. "TX1024_MAXOCTGB,Tx 1024ToMaxOctets Packets Good Bad This field indicates the number of good and bad packets transmitted with length between 1024 and maxsize (inclusive) bytes exclusive of preamble and retried packets" line.long 0x28 "Tx_Unicast_Packets_Good_Bad,This register provides the number of good and bad unicast packets transmitted by DWC_ether_qos." hexmask.long.word 0x28 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x28 0.--15. 1. "TXUCASTGB,Tx Unicast Packets Good Bad This field indicates the number of good and bad unicast packets transmitted" line.long 0x2C "Tx_Multicast_Packets_Good_Bad,This register provides the number of good and bad multicast packets transmitted by DWC_ether_qos." hexmask.long.word 0x2C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x2C 0.--15. 1. "TXMCASTGB,Tx Multicast Packets Good Bad This field indicates the number of good and bad multicast packets transmitted" line.long 0x30 "Tx_Broadcast_Packets_Good_Bad,This register provides the number of good and bad broadcast packets transmitted by DWC_ether_qos." hexmask.long.word 0x30 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x30 0.--15. 1. "TXBCASTGB,Tx Broadcast Packets Good Bad This field indicates the number of good and bad broadcast packets transmitted" line.long 0x34 "Tx_Underflow_Error_Packets,This register provides the number of packets aborted by DWC_ether_qos because of packets underflow error." hexmask.long.word 0x34 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x34 0.--15. 1. "TXUNDRFLW,Tx Underflow Error Packets This field indicates the number of packets aborted because of packets underflow error" line.long 0x38 "Tx_Single_Collision_Good_Packets,This register provides the number of successfully transmitted packets by DWC_ether_qos after a single collision in the half-duplex mode." hexmask.long.word 0x38 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x38 0.--15. 1. "TXSNGLCOLG,Tx Single Collision Good Packets This field indicates the number of successfully transmitted packets after a single collision in the half-duplex mode" line.long 0x3C "Tx_Multiple_Collision_Good_Packets,This register provides the number of successfully transmitted packets by DWC_ether_qos after multiple collisions in the half-duplex mode." hexmask.long.word 0x3C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x3C 0.--15. 1. "TXMULTCOLG,Tx Multiple Collision Good Packets This field indicates the number of successfully transmitted packets after multiple collisions in the half-duplex mode" line.long 0x40 "Tx_Deferred_Packets,This register provides the number of successfully transmitted by DWC_ether_qos after a deferral in the half-duplex mode." hexmask.long.word 0x40 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x40 0.--15. 1. "TXDEFRD,Tx Deferred Packets This field indicates the number of successfully transmitted after a deferral in the half-duplex mode" line.long 0x44 "Tx_Late_Collision_Packets,This register provides the number of packets aborted by DWC_ether_qos because of late collision error." hexmask.long.word 0x44 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x44 0.--15. 1. "TXLATECOL,Tx Late Collision Packets This field indicates the number of packets aborted because of late collision error" line.long 0x48 "Tx_Excessive_Collision_Packets,This register provides the number of packets aborted by DWC_ether_qos because of excessive (16) collision errors." hexmask.long.word 0x48 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x48 0.--15. 1. "TXEXSCOL,Tx Excessive Collision Packets This field indicates the number of packets aborted because of excessive (16) collision errors" line.long 0x4C "Tx_Carrier_Error_Packets,This register provides the number of packets aborted by DWC_ether_qos because of carrier sense error (no carrier or loss of carrier)." hexmask.long.word 0x4C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x4C 0.--15. 1. "TXCARR,Tx Carrier Error Packets This field indicates the number of packets aborted because of carrier sense error (no carrier or loss of carrier)" line.long 0x50 "Tx_Octet_Count_Good,This register provides the number of bytes transmitted by DWC_ether_qos exclusive of preamble only in good packets." line.long 0x54 "Tx_Packet_Count_Good,This register provides the number of good packets transmitted by DWC_ether_qos." hexmask.long.word 0x54 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x54 0.--15. 1. "TXPKTG,Tx Packet Count Good This field indicates the number of good packets transmitted" line.long 0x58 "Tx_Excessive_Deferral_Error,This register provides the number of packets aborted by DWC_ether_qos because of excessive deferral error (deferred for more than two max-sized packet times)." hexmask.long.word 0x58 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x58 0.--15. 1. "TXEXSDEF,Tx Excessive Deferral Error This field indicates the number of packets aborted because of excessive deferral error (deferred for more than two max-sized packet times)" line.long 0x5C "Tx_Pause_Packets,This register provides the number of good Pause packets transmitted by DWC_ether_qos." hexmask.long.word 0x5C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x5C 0.--15. 1. "TXPAUSE,Tx Pause Packets This field indicates the number of good Pause packets transmitted" line.long 0x60 "Tx_VLAN_Packets_Good,This register provides the number of good VLAN packets transmitted by DWC_ether_qos." hexmask.long.word 0x60 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x60 0.--15. 1. "TXVLANG,Tx VLAN Packets Good This field provides the number of good VLAN packets transmitted" line.long 0x64 "Tx_OSize_Packets_Good,This register provides the number of packets transmitted by DWC_ether_qos without errors and with length greater than the maxsize (1 518 or 1 522 bytes for VLAN tagged packets 2000 bytes if enabled in S2KP bit of the.." hexmask.long.word 0x64 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x64 0.--15. 1. "TXOSIZG,Tx OSize Packets Good This field indicates the number of packets transmitted without errors and with length greater than the maxsize (1 518 or 1 522 bytes for VLAN tagged packets 2000 bytes if enabled in S2KP bit of the MAC_Configuration register)" rgroup.long ad:0xC00BC780++0x67 line.long 0x00 "Rx_Packets_Count_Good_Bad,This register provides the number of good and bad packets received by DWC_ether_qos." hexmask.long.word 0x00 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x00 0.--15. 1. "RXPKTGB,Rx Packets Count Good Bad This field indicates the number of good and bad packets received" line.long 0x04 "Rx_Octet_Count_Good_Bad,This register provides the number of bytes received by DWC_ther_qos exclusive of preamble in good and bad packets." line.long 0x08 "Rx_Octet_Count_Good,This register provides the number of bytes received by DWC_ether_qos exclusive of preamble only in good packets." line.long 0x0C "Rx_Broadcast_Packets_Good,This register provides the number of good broadcast packets received by DWC_ether_qos." hexmask.long.word 0x0C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x0C 0.--15. 1. "RXBCASTG,Rx Broadcast Packets Good This field indicates the number of good broadcast packets received" line.long 0x10 "Rx_Multicast_Packets_Good,This register provides the number of good multicast packets received by DWC_ether_qos." hexmask.long.word 0x10 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x10 0.--15. 1. "RXMCASTG,Rx Multicast Packets Good This field indicates the number of good multicast packets received" line.long 0x14 "Rx_CRC_Error_Packets,This register provides the number of packets received by DWC_ether_qos with CRC error." hexmask.long.word 0x14 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x14 0.--15. 1. "RXCRCERR,Rx CRC Error Packets This field indicates the number of packets received with CRC error" line.long 0x18 "Rx_Alignment_Error_Packets,This register provides the number of packets received by DWC_ether_qos with alignment (dribble) error. It is valid only in 10/100 mode." hexmask.long.word 0x18 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x18 0.--15. 1. "RXALGNERR,Rx Alignment Error Packets This field indicates the number of packets received with alignment (dribble) error" line.long 0x1C "Rx_Runt_Error_Packets,This register provides the number of packets received by DWC_ether_qos with runt (length less than 64 bytes and CRC error) error." hexmask.long.word 0x1C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x1C 0.--15. 1. "RXRUNTERR,Rx Runt Error Packets This field indicates the number of packets received with runt (length less than 64 bytes and CRC error) error" line.long 0x20 "Rx_Jabber_Error_Packets,This register provides the number of giant packets received by DWC_ether_qos with length (including CRC) greater than 1 518 bytes (1 522 bytes for VLAN tagged) and with CRC error. If Jumbo Packet mode is enabled packets of length.." hexmask.long.word 0x20 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x20 0.--15. 1. "RXJABERR,Rx Jabber Error Packets This field indicates the number of giant packets received with length (including CRC) greater than 1 518 bytes (1 522 bytes for VLAN tagged) and with CRC error" line.long 0x24 "Rx_Undersize_Packets_Good,This register provides the number of packets received by DWC_ether_qos with length less than 64 bytes without any errors." hexmask.long.word 0x24 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x24 0.--15. 1. "RXUNDERSZG,Rx Undersize Packets Good This field indicates the number of packets received with length less than 64 bytes without any errors" line.long 0x28 "Rx_Oversize_Packets_Good,This register provides the number of packets received by DWC_ether_qos without errors with length greater than the maxsize (1 518 bytes or 1 522 bytes for VLAN tagged packets 2000 bytes if enabled in the S2KP bit of the.." hexmask.long.word 0x28 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x28 0.--15. 1. "RXOVERSZG,Rx Oversize Packets Good This field indicates the number of packets received without errors with length greater than the maxsize (1 518 bytes or 1 522 bytes for VLAN tagged packets 2000 bytes if enabled in the S2KP bit of the MAC_Configuration.." line.long 0x2C "Rx_64Octets_Packets_Good_Bad,This register provides the number of good and bad packets received by DWC_ether_qos with length 64 bytes exclusive of the preamble." hexmask.long.word 0x2C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x2C 0.--15. 1. "RX64OCTGB,Rx 64 Octets Packets Good Bad This field indicates the number of good and bad packets received with length 64 bytes exclusive of the preamble" line.long 0x30 "Rx_65To127Octets_Packets_Good_Bad,This register provides the number of good and bad packets received by DWC_ether_qos with length between 65 and 127 (inclusive) bytes exclusive of the preamble." hexmask.long.word 0x30 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x30 0.--15. 1. "RX65_127OCTGB,Rx 65-127 Octets Packets Good Bad This field indicates the number of good and bad packets received with length between 65 and 127 (inclusive) bytes exclusive of the preamble" line.long 0x34 "Rx_128To255Octets_Packets_Good_Bad,This register provides the number of good and bad packets received by DWC_ether_qos with length between 128 and 255 (inclusive) bytes exclusive of the preamble." hexmask.long.word 0x34 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x34 0.--15. 1. "RX128_255OCTGB,Rx 128-255 Octets Packets Good Bad This field indicates the number of good and bad packets received with length between 128 and 255 (inclusive) bytes exclusive of the preamble" line.long 0x38 "Rx_256To511Octets_Packets_Good_Bad,This register provides the number of good and bad packets received by DWC_ether_qos with length between 256 and 511 (inclusive) bytes exclusive of the preamble." hexmask.long.word 0x38 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x38 0.--15. 1. "RX256_511OCTGB,Rx 256-511 Octets Packets Good Bad This field indicates the number of good and bad packets received with length between 256 and 511 (inclusive) bytes exclusive of the preamble" line.long 0x3C "Rx_512To1023Octets_Packets_Good_Bad,This register provides the number of good and bad packets received by DWC_ether_qos with length between 512 and 1023 (inclusive) bytes exclusive of the preamble." hexmask.long.word 0x3C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x3C 0.--15. 1. "RX512_1023OCTGB,RX 512-1023 Octets Packets Good Bad This field indicates the number of good and bad packets received with length between 512 and 1023 (inclusive) bytes exclusive of the preamble" line.long 0x40 "Rx_1024ToMaxOctets_Packets_Good_Bad,This register provides the number of good and bad packets received by DWC_ether_qos with length between 1024 and maxsize (inclusive) bytes exclusive of the preamble." hexmask.long.word 0x40 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x40 0.--15. 1. "RX1024_MAXOCTGB,Rx 1024-Max Octets Good Bad This field indicates the number of good and bad packets received with length between 1024 and maxsize (inclusive) bytes exclusive of the preamble" line.long 0x44 "Rx_Unicast_Packets_Good,This register provides the number of good unicast packets received by DWC_ether_qos." hexmask.long.word 0x44 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x44 0.--15. 1. "RXUCASTG,Rx Unicast Packets Good This field indicates the number of good unicast packets received" line.long 0x48 "Rx_Length_Error_Packets,This register provides the number of packets received by DWC_ether_qos with length error (Length Type field not equal to packet size) for all packets with valid length field." hexmask.long.word 0x48 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x48 0.--15. 1. "RXLENERR,Rx Length Error Packets This field indicates the number of packets received with length error (Length Type field not equal to packet size) for all packets with valid length field" line.long 0x4C "Rx_Out_Of_Range_Type_Packets,This register provides the number of packets received by DWC_ether_qos with length field not equal to the valid packet size (greater than 1 500 but less than 1 536)." hexmask.long.word 0x4C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x4C 0.--15. 1. "RXOUTOFRNG,Rx Out of Range Type Packet This field indicates the number of packets received with length field not equal to the valid packet size (greater than 1 500 but less than 1 536)" line.long 0x50 "Rx_Pause_Packets,This register provides the number of good and valid Pause packets received by DWC_ether_qos." hexmask.long.word 0x50 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x50 0.--15. 1. "RXPAUSEPKT,Rx Pause Packets This field indicates the number of good and valid Pause packets received" line.long 0x54 "Rx_FIFO_Overflow_Packets,This register provides the number of missed received packets because of FIFO overflow in DWC_ether_qos." hexmask.long.word 0x54 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x54 0.--15. 1. "RXFIFOOVFL,Rx FIFO Overflow Packets This field indicates the number of missed received packets because of FIFO overflow" line.long 0x58 "Rx_VLAN_Packets_Good_Bad,This register provides the number of good and bad VLAN packets received by DWC_ether_qos." hexmask.long.word 0x58 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x58 0.--15. 1. "RXVLANPKTGB,Rx VLAN Packets Good Bad This field indicates the number of good and bad VLAN packets received" line.long 0x5C "Rx_Watchdog_Error_Packets,This register provides the number of packets received by DWC_ether_qos with error because of watchdog timeout error (packets with a data load larger than 2 048 bytes (when JE and WD bits are reset in MAC_Configuration register).." hexmask.long.word 0x5C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x5C 0.--15. 1. "RXWDGERR,Rx Watchdog Error Packets This field indicates the number of packets received with error because of watchdog timeout error (packets with a data load larger than 2 048 bytes (when JE and WD bits are reset in MAC_Configuration register) 10 240.." line.long 0x60 "Rx_Receive_Error_Packets,This register provides the number of packets received by DWC_ether_qos with Receive error or Packet Extension error on the GMII or MII interface." hexmask.long.word 0x60 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x60 0.--15. 1. "RXRCVERR,Rx Receive Error Packets This field indicates the number of packets received with Receive error or Packet Extension error on the GMII or MII interface" line.long 0x64 "Rx_Control_Packets_Good,This register provides the number of good control packets received by DWC_ether_qos." hexmask.long.word 0x64 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x64 0.--15. 1. "RXCTRLG,Rx Control Packets Good This field indicates the number of good control packets received" rgroup.long ad:0xC00BC7EC++0x0F line.long 0x00 "Tx_LPI_USEC_Cntr,This register provides the number of microseconds Tx LPI is asserted by DWC_ether_qos." hexmask.long.word 0x00 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x00 0.--15. 1. "TXLPIUSC,Tx LPI Microseconds Counter This field indicates the number of microseconds Tx LPI is asserted" line.long 0x04 "Tx_LPI_Tran_Cntr,This register provides the number of times DWC_ether_qos has entered Tx LPI." hexmask.long.word 0x04 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x04 0.--15. 1. "TXLPITRC,Tx LPI Transition counter This field indicates the number of times Tx LPI Entry has occurred" line.long 0x08 "Rx_LPI_USEC_Cntr,This register provides the number of microseconds Rx LPI is sampled by DWC_ether_qos." hexmask.long.word 0x08 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x08 0.--15. 1. "RXLPIUSC,Rx LPI Microseconds Counter This field indicates the number of microseconds Rx LPI is asserted" line.long 0x0C "Rx_LPI_Tran_Cntr,This register provides the number of times DWC_ether_qos has entered Rx LPI." hexmask.long.word 0x0C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x0C 0.--15. 1. "RXLPITRC,Rx LPI Transition counter This field indicates the number of times Rx LPI Entry has occurred" group.long ad:0xC00BC800++0x03 line.long 0x00 "MMC_IPC_Rx_Interrupt_Mask,This register maintains the mask for the interrupt generated from the receive IPC statistic counters. The MMC Receive Checksum Off load Interrupt Mask register maintains the masks for the interrupts generated when the receive.." rbitfld.long 0x00 30.--31. "Reserved_31_30,Reserved" "0,1,2,3" newline bitfld.long 0x00 29. "RXICMPEROIM,MMC Receive ICMP Error Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxICMP_Error_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 28. "RXICMPGOIM,MMC Receive ICMP Good Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxICMP_Good_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 27. "RXTCPEROIM,MMC Receive TCP Error Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxTCP_Error_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 26. "RXTCPGOIM,MMC Receive TCP Good Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxTCP_Good_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 25. "RXUDPEROIM,MMC Receive UDP Good Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxUDP_Error_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 24. "RXUDPGOIM,MMC Receive IPV6 No Payload Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxUDP_Good_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 23. "RXIPV6NOPAYOIM,MMC Receive IPV6 Header Error Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv6_No_Payload_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 22. "RXIPV6HEROIM,MMC Receive IPV6 Good Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv6_Header_Error_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 21. "RXIPV6GOIM,MMC Receive IPV6 Good Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv6_Good_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 20. "RXIPV4UDSBLOIM,MMC Receive IPV4 UDP Checksum Disabled Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv4_UDP_Checksum_Disable_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 19. "RXIPV4FRAGOIM,MMC Receive IPV4 Fragmented Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv4_Fragmented_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 18. "RXIPV4NOPAYOIM,MMC Receive IPV4 No Payload Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv4_No_Payload_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 17. "RXIPV4HEROIM,MMC Receive IPV4 Header Error Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv4_Header_Error_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 16. "RXIPV4GOIM,MMC Receive IPV4 Good Octet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv4_Good_Octets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 14.--15. "Reserved_15_14,Reserved" "0,1,2,3" newline bitfld.long 0x00 13. "RXICMPERPIM,MMC Receive ICMP Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxICMP_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 12. "RXICMPGPIM,MMC Receive ICMP Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxICMP_Good_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 11. "RXTCPERPIM,MMC Receive TCP Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxTCP_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 10. "RXTCPGPIM,MMC Receive TCP Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxTCP_Good_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 9. "RXUDPERPIM,MMC Receive UDP Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxUDP_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 8. "RXUDPGPIM,MMC Receive UDP Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxUDP_Good_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 7. "RXIPV6NOPAYPIM,MMC Receive IPV6 No Payload Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv6_No_Payload_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 6. "RXIPV6HERPIM,MMC Receive IPV6 Header Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv6_Header_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 5. "RXIPV6GPIM,MMC Receive IPV6 Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv6_Good_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 4. "RXIPV4UDSBLPIM,MMC Receive IPV4 UDP Checksum Disabled Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv4_UDP_Checksum_Disabled_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 3. "RXIPV4FRAGPIM,MMC Receive IPV4 Fragmented Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv4_Fragmented_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 2. "RXIPV4NOPAYPIM,MMC Receive IPV4 No Payload Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv4_No_Payload_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 1. "RXIPV4HERPIM,MMC Receive IPV4 Header Error Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv4_Header_Error_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "RXIPV4GPIM,MMC Receive IPV4 Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the RxIPv4_Good_Packets counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BC808++0x03 line.long 0x00 "MMC_IPC_Rx_Interrupt,This register maintains the interrupt that the receive IPC statistic counters generate. The MMC Receive Checksum Offload Interrupt register maintains the interrupts generated when receive IPC statistic counters reach half their.." bitfld.long 0x00 30.--31. "Reserved_31_30,Reserved" "0,1,2,3" newline bitfld.long 0x00 29. "RXICMPEROIS,MMC Receive ICMP Error Octet Counter Interrupt Status This bit is set when the RxICMP_Error_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 28. "RXICMPGOIS,MMC Receive ICMP Good Octet Counter Interrupt Status This bit is set when the RxICMP_Good_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 27. "RXTCPEROIS,MMC Receive TCP Error Octet Counter Interrupt Status This bit is set when the RxTCP_Error_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 26. "RXTCPGOIS,MMC Receive TCP Good Octet Counter Interrupt Status This bit is set when the RxTCP_Good_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 25. "RXUDPEROIS,MMC Receive UDP Error Octet Counter Interrupt Status This bit is set when the RxUDP_Error_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 24. "RXUDPGOIS,MMC Receive UDP Good Octet Counter Interrupt Status This bit is set when the RxUDP_Good_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 23. "RXIPV6NOPAYOIS,MMC Receive IPV6 No Payload Octet Counter Interrupt Status This bit is set when the RxIPv6_No_Payload_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 22. "RXIPV6HEROIS,MMC Receive IPV6 Header Error Octet Counter Interrupt Status This bit is set when the RxIPv6_Header_Error_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 21. "RXIPV6GOIS,MMC Receive IPV6 Good Octet Counter Interrupt Status This bit is set when the RxIPv6_Good_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 20. "RXIPV4UDSBLOIS,MMC Receive IPV4 UDP Checksum Disabled Octet Counter Interrupt Status This bit is set when the RxIPv4_UDP_Checksum_Disable_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 19. "RXIPV4FRAGOIS,MMC Receive IPV4 Fragmented Octet Counter Interrupt Status This bit is set when the RxIPv4_Fragmented_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 18. "RXIPV4NOPAYOIS,MMC Receive IPV4 No Payload Octet Counter Interrupt Status This bit is set when the RxIPv4_No_Payload_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 17. "RXIPV4HEROIS,MMC Receive IPV4 Header Error Octet Counter Interrupt Status This bit is set when the RxIPv4_Header_Error_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 16. "RXIPV4GOIS,MMC Receive IPV4 Good Octet Counter Interrupt Status This bit is set when the RxIPv4_Good_Octets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 14.--15. "Reserved_15_14,Reserved" "0,1,2,3" newline bitfld.long 0x00 13. "RXICMPERPIS,MMC Receive ICMP Error Packet Counter Interrupt Status This bit is set when the RxICMP_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 12. "RXICMPGPIS,MMC Receive ICMP Good Packet Counter Interrupt Status This bit is set when the RxICMP_Good_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11. "RXTCPERPIS,MMC Receive TCP Error Packet Counter Interrupt Status This bit is set when the RxTCP_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 10. "RXTCPGPIS,MMC Receive TCP Good Packet Counter Interrupt Status This bit is set when the RxTCP_Good_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 9. "RXUDPERPIS,MMC Receive UDP Error Packet Counter Interrupt Status This bit is set when the RxUDP_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 8. "RXUDPGPIS,MC Receive UDP Good Packet Counter Interrupt Status This bit is set when the RxUDP_Good_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 7. "RXIPV6NOPAYPIS,MMC Receive IPV6 No Payload Packet Counter Interrupt Status This bit is set when the RxIPv6_No_Payload_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 6. "RXIPV6HERPIS,MMC Receive IPV6 Header Error Packet Counter Interrupt Status This bit is set when the RxIPv6_Header_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 5. "RXIPV6GPIS,MMC Receive IPV6 Good Packet Counter Interrupt Status This bit is set when the RxIPv6_Good_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 4. "RXIPV4UDSBLPIS,MMC Receive IPV4 UDP Checksum Disabled Packet Counter Interrupt Status This bit is set when the RxIPv4_UDP_Checksum_Disabled_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 3. "RXIPV4FRAGPIS,MMC Receive IPV4 Fragmented Packet Counter Interrupt Status This bit is set when the RxIPv4_Fragmented_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 2. "RXIPV4NOPAYPIS,MMC Receive IPV4 No Payload Packet Counter Interrupt Status This bit is set when the RxIPv4_No_Payload_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 1. "RXIPV4HERPIS,MMC Receive IPV4 Header Error Packet Counter Interrupt Status This bit is set when the RxIPv4_Header_Error_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "RXIPV4GPIS,MMC Receive IPV4 Good Packet Counter Interrupt Status This bit is set when the RxIPv4_Good_Packets counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" rgroup.long ad:0xC00BC810++0x37 line.long 0x00 "RxIPv4_Good_Packets,This register provides the number of good IPv4 datagrams received by DWC_ether_qos with the TCP UDP or ICMP payload." hexmask.long.word 0x00 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x00 0.--15. 1. "RXIPV4GDPKT,RxIPv4 Good Packets This field indicates the number of good IPv4 datagrams received with the TCP UDP or ICMP payload" line.long 0x04 "RxIPv4_Header_Error_Packets,RxIPv4 Header Error Packets This register provides the number of IPv4 datagrams received by DWC_ether_qos with header (checksum length or version mismatch) errors." hexmask.long.word 0x04 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x04 0.--15. 1. "RXIPV4HDRERRPKT,RxIPv4 Header Error Packets This field indicates the number of IPv4 datagrams received with header (checksum length or version mismatch) errors" line.long 0x08 "RxIPv4_No_Payload_Packets,This register provides the number of IPv4 datagram packets received by DWC_ether_qos that did not have a TCP UDP or ICMP payload." hexmask.long.word 0x08 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x08 0.--15. 1. "RXIPV4NOPAYPKT,RxIPv4 Payload Packets This field indicates the number of IPv4 datagram packets received that did not have a TCP UDP or ICMP payload" line.long 0x0C "RxIPv4_Fragmented_Packets,This register provides the number of good IPv4 datagrams received by DWC_ether_qos with fragmentation." hexmask.long.word 0x0C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x0C 0.--15. 1. "RXIPV4FRAGPKT,RxIPv4 Fragmented Packets This field indicates the number of good IPv4 datagrams received with fragmentation" line.long 0x10 "RxIPv4_UDP_Checksum_Disabled_Packets,This register provides the number of good IPv4 datagrams received by DWC_ether_qos that had a UDP payload with checksum disabled." hexmask.long.word 0x10 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x10 0.--15. 1. "RXIPV4UDSBLPKT,RxIPv4 UDP Checksum Disabled Packets This field indicates the number of good IPv4 datagrams received that had a UDP payload with checksum disabled" line.long 0x14 "RxIPv6_Good_Packets,This register provides the number of good IPv6 datagrams received by DWC_ether_qos with the TCP UDP or ICMP payload." hexmask.long.word 0x14 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x14 0.--15. 1. "RXIPV6GDPKT,RxIPv6 Good Packets This field indicates the number of good IPv6 datagrams received with the TCP UDP or ICMP payload" line.long 0x18 "RxIPv6_Header_Error_Packets,This register provides the number of IPv6 datagrams received by DWC_ether_qos with header (length or version mismatch) errors." hexmask.long.word 0x18 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x18 0.--15. 1. "RXIPV6HDRERRPKT,RxIPv6 Header Error Packets This field indicates the number of IPv6 datagrams received with header (length or version mismatch) errors" line.long 0x1C "RxIPv6_No_Payload_Packets,This register provides the number of IPv6 datagram packets received by DWC_ether_qos that did not have a TCP UDP or ICMP payload. This includes all IPv6 datagrams with fragmentation or security extension headers." hexmask.long.word 0x1C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x1C 0.--15. 1. "RXIPV6NOPAYPKT,RxIPv6 Payload Packets This field indicates the number of IPv6 datagram packets received that did not have a TCP UDP or ICMP payload" line.long 0x20 "RxUDP_Good_Packets,This register provides the number of good IP datagrams received by DWC_ether_qos with a good UDP payload. This counter is not updated when the RxIPv4_UDP_Checksum_Disabled_Packets counter is incremented." hexmask.long.word 0x20 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x20 0.--15. 1. "RXUDPGDPKT,RxUDP Good Packets This field indicates the number of good IP datagrams received with a good UDP payload" line.long 0x24 "RxUDP_Error_Packets,This register provides the number of good IP datagrams received by DWC_ether_qos whose UDP payload has a checksum error." hexmask.long.word 0x24 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x24 0.--15. 1. "RXUDPERRPKT,RxUDP Error Packets This field indicates the number of good IP datagrams received whose UDP payload has a checksum error" line.long 0x28 "RxTCP_Good_Packets,This register provides the number of good IP datagrams received by DWC_ether_qos with a good TCP payload." hexmask.long.word 0x28 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x28 0.--15. 1. "RXTCPGDPKT,RxTCP Good Packets This field indicates the number of good IP datagrams received with a good TCP payload" line.long 0x2C "RxTCP_Error_Packets,This register provides the number of good IP datagrams received by DWC_ether_qos whose TCP payload has a checksum error." hexmask.long.word 0x2C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x2C 0.--15. 1. "RXTCPERRPKT,RxTCP Error Packets This field indicates the number of good IP datagrams received whose TCP payload has a checksum error" line.long 0x30 "RxICMP_Good_Packets,This register provides the number of good IP datagrams received by DWC_ether_qos with a good ICMP payload." hexmask.long.word 0x30 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x30 0.--15. 1. "RXICMPGDPKT,RxICMP Good Packets This field indicates the number of good IP datagrams received with a good ICMP payload" line.long 0x34 "RxICMP_Error_Packets,This register provides the number of good IP datagrams received by DWC_ether_qos whose ICMP payload has a checksum error." hexmask.long.word 0x34 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x34 0.--15. 1. "RXICMPERRPKT,RxICMP Error Packets This field indicates the number of good IP datagrams received whose ICMP payload has a checksum error" rgroup.long ad:0xC00BC850++0x37 line.long 0x00 "RxIPv4_Good_Octets,This register provides the number of bytes received by DWC_ether_qos in good IPv4 datagrams encapsulating TCP UDP or ICMP data. (Ethernet header FCS pad or IP pad bytes are not included in this counter.)" line.long 0x04 "RxIPv4_Header_Error_Octets,This register provides the number of bytes received by DWC_ether_qos in IPv4 datagrams with header errors (checksum length version mismatch). The value in the Length field of IPv4 header is used to update this counter.." line.long 0x08 "RxIPv4_No_Payload_Octets,This register provides the number of bytes received by DWC_ether_qos in IPv4 datagrams that did not have a TCP UDP or ICMP payload. The value in the Length field of IPv4 header is used to update this counter. (Ethernet header.." line.long 0x0C "RxIPv4_Fragmented_Octets,This register provides the number of bytes received by DWC_ether_qos in fragmented IPv4 datagrams. The value in the Length field of IPv4 header is used to update this counter. (Ethernet header FCS pad or IP pad bytes are not.." line.long 0x10 "RxIPv4_UDP_Checksum_Disable_Octets,This register provides the number of bytes received by DWC_ether_qos in a UDP segment that had the UDP checksum disabled. This counter does not count IP Header bytes. (Ethernet header FCS pad or IP pad bytes are not.." line.long 0x14 "RxIPv6_Good_Octets,This register provides the number of bytes received by DWC_ether_qos in good IPv6 datagrams encapsulating TCP UDP or ICMP data. (Ethernet header FCS pad or IP pad bytes are not included in this counter.)" line.long 0x18 "RxIPv6_Header_Error_Octets,This register provides the number of bytes received by DWC_ether_qos in IPv6 datagrams with header errors (length version mismatch). The value in the Length field of IPv6 header is used to update this counter. (Ethernet header.." line.long 0x1C "RxIPv6_No_Payload_Octets,This register provides the number of bytes received by DWC_ether_qos in IPv6 datagrams that did not have a TCP UDP or ICMP payload. The value in the Length field of IPv6 header is used to update this counter. (Ethernet header.." line.long 0x20 "RxUDP_Good_Octets,This register provides the number of bytes received by DWC_ether_qos in a good UDP segment. This counter does not count IP header bytes." line.long 0x24 "RxUDP_Error_Octets,This register provides the number of bytes received by DWC_ether_qos in a UDP segment that had checksum errors. This counter does not count IP header bytes." line.long 0x28 "RxTCP_Good_Octets,This register provides the number of bytes received by DWC_ether_qos in a good TCP segment. This counter does not count IP header bytes." line.long 0x2C "RxTCP_Error_Octets,This register provides the number of bytes received by DWC_ether_qos in a TCP segment that had checksum errors. This counter does not count IP header bytes." line.long 0x30 "RxICMP_Good_Octets,This register provides the number of bytes received by DWC_ether_qos in a good ICMP segment. This counter does not count IP header bytes." line.long 0x34 "RxICMP_Error_Octets,This register provides the number of bytes received by DWC_ether_qos in a ICMP segment that had checksum errors. This counter does not count IP header bytes." rgroup.long ad:0xC00BC8A0++0x03 line.long 0x00 "MMC_FPE_Tx_Interrupt,This register maintains the interrupts generated from all FPE related Transmit statistics counters. The MMC FPE Transmit Interrupt register maintains the interrupts generated when transmit statistic counters reach half their maximum.." hexmask.long 0x00 2.--31. 1. "Reserved_31_2,Reserved" newline bitfld.long 0x00 1. "HRCIS,MMC Tx Hold Request Counter Interrupt Status This bit is set when the Tx_Hold_Req_Cntr counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "FCIS,MMC Tx FPE Fragment Counter Interrupt status This bit is set when the Tx_FPE_Fragment_Cntr counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BC8A4++0x03 line.long 0x00 "MMC_FPE_Tx_Interrupt_Mask,This register maintains the masks for interrupts generated from all FPE related Transmit statistics counters. The MMC Receive Interrupt Mask register maintains the masks for the interrupts generated when FPE related receive.." hexmask.long 0x00 2.--31. 1. "Reserved_31_2,Reserved" newline bitfld.long 0x00 1. "HRCIM,MMC Transmit Hold Request Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_Hold_Req_Cntr counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "FCIM,MMC Transmit Fragment Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_FPE_Fragment_Cntr counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BC8A8++0x07 line.long 0x00 "MMC_Tx_FPE_Fragment_Cntr,This register provides the number of additional mPackets transmitted due to preemption." line.long 0x04 "MMC_Tx_Hold_Req_Cntr,This register provides the count of number of times a hold request is given to MAC" rgroup.long ad:0xC00BC8C0++0x03 line.long 0x00 "MMC_FPE_Rx_Interrupt,This register maintains the interrupts generated from all FPE related Receive statistics counters. The MMC FPE Receive Interrupt register maintains the interrupts generated when transmit statistic counters reach half their maximum.." hexmask.long 0x00 4.--31. 1. "Reserved_31_4,Reserved" newline bitfld.long 0x00 3. "FCIS,MMC Rx FPE Fragment Counter Interrupt Status This bit is set when the Rx_FPE_Fragment_Cntr counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 2. "PAOCIS,MMC Rx Packet Assembly OK Counter Interrupt Status This bit is set when the Rx_Packet_Assemble_Ok_Cntr counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 1. "PSECIS,MMC Rx Packet SMD Error Counter Interrupt Status This bit is set when the Rx_Packet_SMD_Err_Cntr counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "PAECIS,MMC Rx Packet Assembly Error Counter Interrupt Status This bit is set when the Rx_Packet_Assemble_Err_Cntr counter reaches half of the maximum value or the maximum value" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BC8C4++0x03 line.long 0x00 "MMC_FPE_Rx_Interrupt_Mask,This register maintains the masks for interrupts generated from all FPE related Receive statistics counters. The MMC Receive Interrupt Mask register maintains the masks for the interrupts generated when FPE related receive.." hexmask.long 0x00 4.--31. 1. "Reserved_31_4,Reserved" newline bitfld.long 0x00 3. "FCIM,MMC Rx FPE Fragment Counter Interrupt Mask Setting this bit masks the interrupt when the Tx_FPE_Fragment_Cntr counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 2. "PAOCIM,MMC Rx Packet Assembly OK Counter Interrupt Mask Setting this bit masks the interrupt when the Rx_Packet_Assemble_Ok_Cntr counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 1. "PSECIM,MMC Rx Packet SMD Error Counter Interrupt Mask Setting this bit masks the interrupt when the R Rx_Packet_SMD_Err_Cntr counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "PAECIM,MMC Rx Packet Assembly Error Counter Interrupt Mask Setting this bit masks the interrupt when the R Rx_Packet_Assemble_Err_Cntr counter reaches half of the maximum value or the maximum value" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BC8C8++0x0F line.long 0x00 "MMC_Rx_Packet_Assembly_Err_Cntr,This register provides the number of MAC frames with reassembly errors on the Receiver due to mismatch in the Fragment Count value." line.long 0x04 "MMC_Rx_Packet_SMD_Err_Cntr,This register provides the number of received MAC frames rejected due to unknown SMD value and MAC frame fragments rejected due to arriving with an SMD-C when there was no preceding preempted frame." line.long 0x08 "MMC_Rx_Packet_Assembly_OK_Cntr,This register provides the number of MAC frames that were successfully reassembled and delivered to MAC." line.long 0x0C "MMC_Rx_FPE_Fragment_Cntr,This register provides the number of additional mPackets received due to preemption." group.long ad:0xC00BCA70++0x0F line.long 0x00 "MAC_Indir_Access_Ctrl,This register provides the Indirect Access control and status for MAC__ registers." bitfld.long 0x00 31. "SNPS_R," "0,1" newline hexmask.long.word 0x00 20.--30. 1. "Reserved_30_20,Reserved" newline bitfld.long 0x00 16.--19. "MSEL,Mode Select This field is used in indirect access of MAC__" "0: MAC_TMRQ_Regs (Ethernet Type based RXQ mapping),1: MAC_PCCtrl_IndReg (Per Policing Counter Control,2: MAC_PCntr_IndReg (Per Policing Counter..,3: MAC_DPCSel_IndReg (Per DA Perfect Filter Event,4: MAC_VPCSel_IndReg (Per VLAN Filter Event,5: MAC_LPCSel_IndReg (Per L3-L4 Filter Event,6: MAC_FPCSel_IndReg0 (Filter Fail Event Register),7: MAC_PCStatus_IndReg0 (Policing Counter Status,?..." newline abitfld.long 0x00 8.--15. "AOFF,Address Offset This field is used in indirect access of MAC__" "0x00000000=0x00000000,0x00000001=0x00000001,0x00000007=0x00000007,0x0000000A=0x0000000A,0x0000000B=0x0000000B,0x0000001F=0x0000001F,0x0000006F=0x0000006F" newline rbitfld.long 0x00 6.--7. "Reserved_7_6,Reserved" "0,1,2,3" newline bitfld.long 0x00 5. "AUTO,Auto increment" "0: AOFF is not incremented automatically,1: AOFF is incremented by 1" newline rbitfld.long 0x00 2.--4. "Reserved_4_2,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 1. "COM,Command type This bit indicates the register access type" "0:,1:" newline bitfld.long 0x00 0. "OB,Operation Busy" "0,1" line.long 0x04 "MAC_Indir_Access_Data,This register holds the read/write data for Indirect Access of MAC_ registers." line.long 0x08 "MAC_PCTH_Intr_Enable,This register contains threshold based interrupt enable for corresponding policing counters." hexmask.long.word 0x08 16.--31. 1. "Reserved_31_y,Reserved" newline hexmask.long.word 0x08 0.--15. 1. "PCTIE,Policing Counter Threshold Interrupt Enable When set indicates the assertion of the interrupt is enabled for corresponding policing counters" line.long 0x0C "MAC_PCTH_Intr_Status,This register contains threshold based interrupts for corresponding policing counters." hexmask.long.word 0x0C 16.--31. 1. "Reserved_31_y,Reserved" newline hexmask.long.word 0x0C 0.--15. 1. "PCTIS,Policing Counter Threshold Interrupt Status This field is set when corresponding threshold-based interrupt is generated in corresponding policing counter Access restriction applies" group.long ad:0xC00BCAA0++0x07 line.long 0x00 "MAC_PCTW_Intr_Enable,This register contains enable bits for Time based interrupt." hexmask.long 0x00 4.--31. 1. "Reserved_31_4,Reserved" newline bitfld.long 0x00 0.--3. "TWIE,Time window Interrupt Enable When set indicates the assertion of the interrupt is enabled for corresponding Time window" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MAC_PCTW_Intr_Status,This register contains Time window based interrupt status." hexmask.long 0x04 4.--31. 1. "Reserved_31_4,Reserved" newline bitfld.long 0x04 0.--3. "TWIS,Time window Interrupt Status This field is set when corresponding end of time window is detected" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00BCB00++0x07 line.long 0x00 "MAC_Timestamp_Control,This register controls the operation of the System Time generator and processing of PTP packets for timestamping in the Receiver." rbitfld.long 0x00 29.--31. "Reserved_31_29,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 28. "AV8021ASMEN,AV 802.1AS Mode Enable When this bit is set the MAC processes only untagged PTP over Ethernet packets for providing PTP status and capturing timestamp snapshots that is IEEE 802.1AS mode of operation" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 27. "Reserved_TITA,Reserved" "0,1" newline rbitfld.long 0x00 26. "Reserved_26,Reserved" "0,1" newline rbitfld.long 0x00 25. "Reserved_EPCSL,Reserved" "0,1" newline bitfld.long 0x00 24. "TXTSSTSM,Transmit Timestamp Status Mode When this bit is set the MAC overwrites the earlier transmit timestamp status even if it is not read by the software" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 21.--23. "Reserved_23_21,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 20. "ESTI,External System Time Input When this bit is set the MAC uses the external 64-bit reference System Time input for the following: - To take the timestamp provided as status - To insert the timestamp in transmit PTP packets when One-step Timestamp or.." "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 19. "CSC,Enable checksum correction during OST for PTP over UDP/IPv4 packets When this bit is set the last two bytes of PTP message sent over UDP/IPv4 is updated to keep the UDP checksum correct for changes made to origin timestamp and/or correction field as.." "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 18. "TSENMACADDR,Enable MAC Address for PTP Packet Filtering When this bit is set the DA MAC address (that matches any MAC Address register) is used to filter the PTP packets when PTP is directly sent over Ethernet" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 16.--17. "SNAPTYPSEL,Select PTP packets for Taking Snapshots These bits along with Bits 15 and 14 decide the set of PTP packet types for which snapshot needs to be taken" "0,1,2,3" newline bitfld.long 0x00 15. "TSMSTRENA,Enable Snapshot for Messages Relevant to Master When this bit is set the snapshot is taken only for the messages that are relevant to the master node" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 14. "TSEVNTENA,Enable Timestamp Snapshot for Event Messages When this bit is set the timestamp snapshot is taken only for event messages (SYNC Delay_Req Pdelay_Req or Pdelay_Resp)" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 13. "TSIPV4ENA,Enable Processing of PTP Packets Sent over IPv4-UDP When this bit is set the MAC receiver processes the PTP packets encapsulated in IPv4-UDP packets" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 12. "TSIPV6ENA,Enable Processing of PTP Packets Sent over IPv6-UDP When this bit is set the MAC receiver processes the PTP packets encapsulated in IPv6-UDP packets" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 11. "TSIPENA,Enable Processing of PTP over Ethernet Packets When this bit is set the MAC receiver processes the PTP packets encapsulated directly in the Ethernet packets" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 10. "TSVER2ENA,Enable PTP Packet Processing for Version 2 Format When this bit is set the IEEE 1588 version 2 format is used to process the PTP packets" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 9. "TSCTRLSSR,Timestamp Digital or Binary Rollover Control When this bit is set the Timestamp Low register rolls over after 0x3B9A_C9FF value (that is 1 nanosecond accuracy) and increments the timestamp (High) seconds" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 8. "TSENALL,Enable Timestamp for All Packets When this bit is set the timestamp snapshot is enabled for all packets received by the MAC" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 7. "Reserved_7,Reserved" "0,1" newline bitfld.long 0x00 6. "PTGE,Presentation Time Generation Enable When this bit is set the Presentation Time generation is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 5. "TSADDREG,Update Addend Register When this bit is set the content of the Timestamp Addend register is updated in the PTP block for fine correction" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 4. "Reserved_TSTRIG,Reserved" "0,1" newline bitfld.long 0x00 3. "TSUPDT,Update Timestamp When this bit is set the system time is updated (added or subtracted) with the value specified in MAC_System_Time_Seconds_Update and MAC_System_Time_Nanoseconds_Update registers" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 2. "TSINIT,Initialize Timestamp When this bit is set the system time is initialized (overwritten) with the value specified in the MAC_System_Time_Seconds_Update and MAC_System_Time_Nanoseconds_Update registers" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 1. "TSCFUPDT,Fine or Coarse Timestamp Update When this bit is set the Fine method is used to update system timestamp" "0: COARSE,1: FINE" newline bitfld.long 0x00 0. "TSENA,Enable Timestamp When this bit is set the timestamp is added for Transmit and Receive packets" "0: DISABLE,1: ENABLE" line.long 0x04 "MAC_Sub_Second_Increment,This register specifies the value to be added to the internal system time register every cycle of clk_ptp_ref_i clock." hexmask.long.byte 0x04 24.--31. 1. "Reserved_31_24,Reserved" newline hexmask.long.byte 0x04 16.--23. 1. "SSINC,Sub-second Increment Value The value programmed in this field is accumulated every clock cycle (of clk_ptp_i) with the contents of the sub-second register" newline hexmask.long.byte 0x04 8.--15. 1. "SNSINC,Sub-nanosecond Increment Value This field contains the sub-nanosecond increment value represented in nanoseconds multiplied by 2^8" newline hexmask.long.byte 0x04 0.--7. 1. "Reserved_7_0,Reserved" rgroup.long ad:0xC00BCB08++0x07 line.long 0x00 "MAC_System_Time_Seconds,The System Time Seconds register along with System Time Nanoseconds register indicates the current value of the system time maintained by the MAC. Though it is updated on a continuous basis there is some delay from the actual.." line.long 0x04 "MAC_System_Time_Nanoseconds,The System Time Nanoseconds register along with System Time Seconds register indicates the current value of the system time maintained by the MAC." bitfld.long 0x04 31. "Reserved_31,Reserved" "0,1" newline hexmask.long 0x04 0.--30. 1. "TSSS,Timestamp Sub Seconds The value in this field has the sub-second representation of time with an accuracy of 0.46 ns" group.long ad:0xC00BCB10++0x0F line.long 0x00 "MAC_System_Time_Seconds_Update,The System Time Seconds Update register along with the System Time Nanoseconds Update register initializes or updates the system time maintained by the MAC. You must write both registers before setting the TSINIT or TSUPDT.." line.long 0x04 "MAC_System_Time_Nanoseconds_Update,MAC System Time Nanoseconds Update register." bitfld.long 0x04 31. "ADDSUB,Add or Subtract Time When this bit is set the time value is subtracted with the contents of the update register" "0: ADD,1: SUB" newline abitfld.long 0x04 0.--30. "TSSS,Timestamp Sub Seconds The value in this field is the sub-seconds part of the update" "0x0000000000000000000000000000000=..,0x0000000000000000000000000000001=.." line.long 0x08 "MAC_Timestamp_Addend,Timestamp Addend register. This register value is used only when the system time is configured for Fine Update mode (TSCFUPDT bit in the MAC_Timestamp_Control register). The content of this register is added to a 32-bit accumulator.." line.long 0x0C "MAC_System_Time_Higher_Word_Seconds,System Time - Higher Word Seconds register." hexmask.long.word 0x0C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x0C 0.--15. 1. "TSHWR,Timestamp Higher Word Register This field contains the most-significant 16-bits of timestamp seconds value" rgroup.long ad:0xC00BCB20++0x03 line.long 0x00 "MAC_Timestamp_Status,Timestamp Status register. All bits except Bits[27:25] gets cleared when the application reads this register." bitfld.long 0x00 30.--31. "Reserved_31_30,Reserved" "0,1,2,3" newline bitfld.long 0x00 25.--29. "Reserved_ATSNS,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 24. "Reserved_ATSSTM,Reserved" "0,1" newline bitfld.long 0x00 20.--23. "Reserved_23_20,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 16.--19. "Reserved_ATSSTN,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 15. "TXTSSIS,Tx Timestamp Status Interrupt Status This bit is set when the captured transmit timestamp is updated in the MAC_Tx_Timestamp_Status_Nanoseconds and MAC_Tx_Timestamp_Status_Seconds registers" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 10.--14. "Reserved_14_10,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 9. "TSTRGTERR3,Timestamp Target Time Error This bit is set when the latest target time programmed in the MAC_PPS3_Target_Time_Seconds and MAC_PPS3_Target_Time_Nanoseconds registers elapses" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 8. "TSTARGT3,Timestamp Target Time Reached for Target Time PPS3 When this bit is set and MCGREN3 of MAC_PPS_Control register is reset it indicates that the value of system time is greater than or equal to the value specified in the.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 7. "TSTRGTERR2,Timestamp Target Time Error This bit is set when the latest target time programmed in the MAC_PPS2_Target_Time_Seconds and MAC_PPS2_Target_Time_Nanoseconds registers elapses" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 6. "TSTARGT2,Timestamp Target Time Reached for Target Time PPS2 When this bit is set and MCGREN2 of MAC_PPS_Control register is reset it indicates that the value of system time is greater than or equal to the value specified in the.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 5. "TSTRGTERR1,Timestamp Target Time Error This bit is set when the latest target time programmed in the MAC_PPS1_Target_Time_Seconds and MAC_PPS1_Target_Time_Nanoseconds registers elapses" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 4. "TSTARGT1,Timestamp Target Time Reached for Target Time PPS1 When this bit is set and MCGREN1 of MAC_PPS_Control register is reset it indicates that the value of system time is greater than or equal to the value specified in the.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 3. "TSTRGTERR0,Timestamp Target Time Error This bit is set when the latest target time programmed in the MAC_PPS0_Target_Time_Seconds and MAC_PPS0_Target_Time_Nanoseconds registers elapses" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 2. "Reserved_AUXTSTRIG,Reserved" "0,1" newline bitfld.long 0x00 1. "TSTARGT0,Timestamp Target Time Reached When this bit is set and MCGREN0 of MAC_PPS_Control register is reset it indicates that the value of system time is greater than or equal to the value specified in the MAC_PPS0_Target_Time_Seconds and.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "TSSOVF,Timestamp Seconds Overflow When this bit is set it indicates that the seconds value of the timestamp (when supporting version 2 format) has overflowed beyond 32'hFFFF_FFFF" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BCB24++0x07 line.long 0x00 "MAC_Rx_Domain_Time_Incr,This register indicates the increment value of the PTP time maintained in Receive clock domain that is used for timestamping." hexmask.long.word 0x00 16.--31. 1. "RXNS,Receive Domain Time Increment Value in Nanoseconds" newline hexmask.long.byte 0x00 8.--15. 1. "RXSNS,Receive Domain Time Increment Value in Sub-Nanoseconds" newline hexmask.long.byte 0x00 0.--7. 1. "Reserved_7_0,Reserved" line.long 0x04 "MAC_Tx_Domain_Time_Incr,This register indicates the increment value of the PTP time maintained in Transmit clock domain that is used for timestamping." hexmask.long.word 0x04 16.--31. 1. "TXNS,Transmit Domain Time Increment Value in Nanoseconds" newline hexmask.long.byte 0x04 8.--15. 1. "TXSNS,Transmit Domain Time Increment Value in Sub-Nanoseconds" newline hexmask.long.byte 0x04 0.--7. 1. "Reserved_7_0,Reserved" rgroup.long ad:0xC00BCB30++0x07 line.long 0x00 "MAC_Tx_Timestamp_Status_Nanoseconds,This register contains the nanosecond part of timestamp captured for Transmit packets when Tx status is disabled. The MAC_Tx_Timestamp_Status_Nanoseconds register along with MAC_Tx_Timestamp_Status_Seconds gives the.." bitfld.long 0x00 31. "TXTSSMIS,Transmit Timestamp Status Missed When this bit is set it indicates one of the following: - The timestamp of the current packet is ignored if TXTSSTSM bit of the MAC_Timestamp_Control register is reset - The timestamp of the previous packet is.." "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x00 0.--30. 1. "TXTSSLO,Transmit Timestamp Status Low This field contains the 31 bits of the Nanoseconds field of the Transmit packet's captured timestamp" line.long 0x04 "MAC_Tx_Timestamp_Status_Seconds,The register contains the higher 32 bits of the timestamp (in seconds) captured when a PTP packet is transmitted." group.long ad:0xC00BCB50++0x17 line.long 0x00 "MAC_Timestamp_Ingress_Asym_Corr,The MAC Timestamp Ingress Asymmetry Correction register contains the Ingress Asymmetry Correction value to be used while updating correction field in PDelay_Resp PTP messages." line.long 0x04 "MAC_Timestamp_Egress_Asym_Corr,The MAC Timestamp Egress Asymmetry Correction register contains the Egress Asymmetry Correction value to be used while updating the correction field in PDelay_Req PTP messages." line.long 0x08 "MAC_Timestamp_Ingress_Corr_Nanosecond,This register contains the correction value in nanoseconds to be used with the captured timestamp value in the ingress path." line.long 0x0C "MAC_Timestamp_Egress_Corr_Nanosecond,This register contains the correction value in nanoseconds to be used with the captured timestamp value in the egress path." line.long 0x10 "MAC_Timestamp_Ingress_Corr_Subnanosec,This register contains the sub-nanosecond part of the correction value to be used with the captured timestamp value for ingress direction." hexmask.long.word 0x10 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.byte 0x10 8.--15. 1. "TSICSNS,Timestamp Ingress Correction sub-nanoseconds This field contains the sub-nanoseconds part of the ingress path correction value as defined by the 'Ingress Correction' expression" newline hexmask.long.byte 0x10 0.--7. 1. "Reserved_7_0,Reserved" line.long 0x14 "MAC_Timestamp_Egress_Corr_Subnanosec,This register contains the sub-nanosecond part of the correction value to be used with the captured timestamp value for egress direction." hexmask.long.word 0x14 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.byte 0x14 8.--15. 1. "TSECSNS,Timestamp Egress Correction sub-nanoseconds This field contains the sub-nanoseconds part of the egress path correction value as defined by the 'Egress Correction' expression" newline hexmask.long.byte 0x14 0.--7. 1. "Reserved_7_0,Reserved" rgroup.long ad:0xC00BCB68++0x07 line.long 0x00 "MAC_Timestamp_Ingress_Latency,This register holds the Ingress MAC latency." bitfld.long 0x00 28.--31. "Reserved_31_28,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 16.--27. 1. "ITLNS,Ingress Timestamp Latency in sub-nanoseconds This register holds the average latency in sub-nanoseconds between the input ports (phy_rxd_i) of MAC and the actual point (GMII/MII) where the ingress timestamp is taken" newline hexmask.long.byte 0x00 8.--15. 1. "ITLSNS,Ingress Timestamp Latency in nanoseconds This register holds the average latency in nanoseconds between the input ports (phy_rxd_i) of MAC and the actual point (GMII/MII) where the ingress timestamp is taken" newline hexmask.long.byte 0x00 0.--7. 1. "Reserved_7_0,Reserved" line.long 0x04 "MAC_Timestamp_Egress_Latency,This register holds the Egress MAC latency." bitfld.long 0x04 28.--31. "Reserved_31_28,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x04 16.--27. 1. "ETLNS,Egress Timestamp Latency in nanoseconds This register holds the average latency in nanoseconds between the actual point (GMII/MII) where the egress timestamp is taken and the output ports (phy_txd_o) of the MAC" newline hexmask.long.byte 0x04 8.--15. 1. "ETLSNS,Egress Timestamp Latency in sub-nanoseconds This register holds the average latency in sub-nanoseconds between the actual point (GMII/MII) where the egress timestamp is taken and the output ports (phy_txd_o) of the MAC" newline hexmask.long.byte 0x04 0.--7. 1. "Reserved_7_0,Reserved" group.long ad:0xC00BCB70++0x03 line.long 0x00 "MAC_PPS_Control,PPS Control register. Bits[30:24] of this register are valid only when four Flexible PPS outputs are selected. Bits[22:16] are valid only when three or more Flexible PPS outputs are selected. Bits[14:8] are valid only when two or more.." bitfld.long 0x00 31. "MCGREN3,MCGR Mode Enable for PPS3 Output This field enables the 3rd PPS instance to operate in PPS or MCGR mode" "0: Operates in PPS mode,1: Operates in MCGR mode" newline bitfld.long 0x00 29.--30. "TRGTMODSEL3,Target Time Register Mode for PPS3 Output This field indicates the Target Time registers (MAC_PPS3_Target_Time_Seconds and MAC_PPS3_Target_Time_Nanoseconds) mode for PPS3 output signal" "0: ONLY_INT,1: MCGR,2: INT_ST,3: ONLY_ST" newline bitfld.long 0x00 28. "TIMESEL,Time Select When this bit is set 64 bit PTP time is used to capture time at MCGR trigger[0] input When this bit is reset presentation time is used to capture time at trigger input maintaining backward compatibility" "0,1" newline bitfld.long 0x00 24.--27. "PPSCMD3,Flexible PPS3 Output Control This field controls the flexible PPS3 output (ptp_pps_o[3]) signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 23. "MCGREN2,MCGR Mode Enable for PPS2 Output This field enables the 2nd PPS instance to operate in PPS or MCGR mode" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 21.--22. "TRGTMODSEL2,Target Time Register Mode for PPS2 Output This field indicates the Target Time registers (MAC_PPS2_Target_Time_Seconds and MAC_PPS2_Target_Time_Nanoseconds) mode for PPS2 output signal" "0: ONLY_INT,1: MCGR,2: INT_ST,3: ONLY_ST" newline rbitfld.long 0x00 20. "Reserved_20,Reserved" "0,1" newline bitfld.long 0x00 16.--19. "PPSCMD2,Flexible PPS2 Output Control This field controls the flexible PPS2 output (ptp_pps_o[2]) signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 15. "MCGREN1,MCGR Mode Enable for PPS1 Output This field enables the 1st PPS instance to operate in PPS or MCGR mode" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 13.--14. "TRGTMODSEL1,Target Time Register Mode for PPS1 Output This field indicates the Target Time registers (MAC_PPS1_Target_Time_Seconds and MAC_PPS1_Target_Time_Nanoseconds) mode for PPS1 output signal" "0: ONLY_INT,1: MCGR,2: INT_ST,3: ONLY_ST" newline rbitfld.long 0x00 12. "Reserved_12,Reserved" "0,1" newline bitfld.long 0x00 8.--11. "PPSCMD1,Flexible PPS1 Output Control This field controls the flexible PPS1 output (ptp_pps_o[1]) signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "MCGREN0,MCGR Mode Enable for PPS0 Output This field enables the 0th PPS instance to operate in PPS or MCGR mode" "0: PPS,1: MCGR" newline bitfld.long 0x00 5.--6. "TRGTMODSEL0,Target Time Register Mode for PPS0 Output This field indicates the Target Time registers (MAC_PPS0_Target_Time_Seconds and MAC_PPS0_Target_Time_Nanoseconds) mode for PPS0 output signal" "0: ONLY_INT,1: MCGR,2: INT_ST,3: ONLY_ST" newline bitfld.long 0x00 4. "PPSEN0,Flexible PPS Output Mode Enable When this bit is" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0.--3. "PPSCTRL_PPSCMD,PPS Output Frequency Control This field controls the frequency of the PPS0 output (ptp_pps_o[0]) signal" "0: MCGR operation is not carried out,1: Capture the Presentation time at the rising..,2: Capture the Presentation time at the falling,3: Capture the Presentation time at both edges of,4: STOP Pulse train at time This command stops the,5: STOP Pulse Train immediately This command,6: Cancel STOP Pulse train This command cancels..,?,?,9: Toggle output on compare,10: Pulse output low on compare for one PTP-clock,11: Pulse output high on compare for one PTP-clock,?,?,?,15: The binary rollover is 32.768 KHz and the" group.long ad:0xC00BCB80++0x53 line.long 0x00 "MAC_PPS0_Target_Time_Seconds,The PPS Target Time Seconds register along with PPS Target Time Nanoseconds register is used to schedule an interrupt event [Bit 1 of MAC_Timestamp_Status] when the system time exceeds the value programmed in these registers." line.long 0x04 "MAC_PPS0_Target_Time_Nanoseconds,PPS0 Target Time Nanoseconds register." bitfld.long 0x04 31. "TRGTBUSY0,PPS Target Time Register Busy The MAC sets this bit when the PPSCMD0 field in the MAC_PPS_Control register is programmed to 010 or 011" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x04 0.--30. 1. "TTSL0,Target Time Low for PPS Register This register stores the time in (signed) nanoseconds" line.long 0x08 "MAC_PPS0_Interval,The PPS0 Interval register contains the number of units of sub-second increment value between the rising edges of PPS0 signal output (ptp_pps_o[0])." line.long 0x0C "MAC_PPS0_Width,The PPS0 Width register contains the number of units of sub-second increment value between the rising and corresponding falling edges of PPS0 signal output (ptp_pps_o[0])." line.long 0x10 "MAC_PPS1_Target_Time_Seconds,The PPS Target Time Seconds register along with PPS Target Time Nanoseconds register is used to schedule an interrupt event [Bit 1 of MAC_Timestamp_Status] when the system time exceeds the value programmed in these registers." line.long 0x14 "MAC_PPS1_Target_Time_Nanoseconds,PPS1 Target Time Nanoseconds register." bitfld.long 0x14 31. "TRGTBUSY1,PPS Target Time Register Busy The MAC sets this bit when the PPSCMD1 field in the MAC_PPS_Control register is programmed to 010 or 011" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x14 0.--30. 1. "TTSL1,Target Time Low for PPS Register This register stores the time in (signed) nanoseconds" line.long 0x18 "MAC_PPS1_Interval,The PPS1 Interval register contains the number of units of sub-second increment value between the rising edges of PPS1 signal output (ptp_pps_o[1])." line.long 0x1C "MAC_PPS1_Width,The PPS1 Width register contains the number of units of sub-second increment value between the rising and corresponding falling edges of PPS1 signal output (ptp_pps_o[1])." line.long 0x20 "MAC_PPS2_Target_Time_Seconds,The PPS Target Time Seconds register along with PPS Target Time Nanoseconds register is used to schedule an interrupt event [Bit 1 of MAC_Timestamp_Status] when the system time exceeds the value programmed in these registers." line.long 0x24 "MAC_PPS2_Target_Time_Nanoseconds,PPS2 Target Time Nanoseconds register." bitfld.long 0x24 31. "TRGTBUSY2,PPS Target Time Register Busy The MAC sets this bit when the PPSCMD2 field in the MAC_PPS_Control register is programmed to 010 or 011" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x24 0.--30. 1. "TTSL2,Target Time Low for PPS Register This register stores the time in (signed) nanoseconds" line.long 0x28 "MAC_PPS2_Interval,The PPS2 Interval register contains the number of units of sub-second increment value between the rising edges of PPS2 signal output (ptp_pps_o[2])." line.long 0x2C "MAC_PPS2_Width,The PPS2 Width register contains the number of units of sub-second increment value between the rising and corresponding falling edges of PPS2 signal output (ptp_pps_o[2])." line.long 0x30 "MAC_PPS3_Target_Time_Seconds,The PPS Target Time Seconds register along with PPS Target Time Nanoseconds register is used to schedule an interrupt event [Bit 1 of MAC_Timestamp_Status] when the system time exceeds the value programmed in these registers." line.long 0x34 "MAC_PPS3_Target_Time_Nanoseconds,PPS3 Target Time Nanoseconds register." bitfld.long 0x34 31. "TRGTBUSY3,PPS Target Time Register Busy The MAC sets this bit when the PPSCMD3 field in the MAC_PPS_Control register is programmed to 010 or 011" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x34 0.--30. 1. "TTSL3,Target Time Low for PPS Register This register stores the time in (signed) nanoseconds" line.long 0x38 "MAC_PPS3_Interval,The PPS3 Interval register contains the number of units of sub-second increment value between the rising edges of PPS3 signal output (ptp_pps_o[3])." line.long 0x3C "MAC_PPS3_Width,The PPS3 Width register contains the number of units of sub-second increment value between the rising and corresponding falling edges of PPS3 signal output (ptp_pps_o[3])." line.long 0x40 "MAC_PTO_Control,This register controls the PTP Offload Engine operation. This register is available only when the Enable PTP Timestamp Offload feature is selected." hexmask.long.word 0x40 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.byte 0x40 8.--15. 1. "DN,Domain Number This field indicates the domain Number in which the PTP node is operating" newline bitfld.long 0x40 7. "PDRDIS,Disable Peer Delay Response response generation When this bit is set the Peer Delay Response (Pdelay_Resp) response is not be generated for received Peer Delay Request (Pdelay_Req) request packet as required by the programmed mode" "0: ENABLE,1: DISABLE" newline bitfld.long 0x40 6. "DRRDIS,Disable PTO Delay Request/Response response generation When this bit is set the Delay Request and Delay response is not generated for received SYNC and Delay request packet respectively as required by the programmed mode" "0: ENABLE,1: DISABLE" newline bitfld.long 0x40 5. "APDREQTRIG,Automatic PTP Pdelay_Req message Trigger When this bit is set one PTP Pdelay_Req message is transmitted" "0: DISABLE,1: ENABLE" newline bitfld.long 0x40 4. "ASYNCTRIG,Automatic PTP SYNC message Trigger When this bit is set one PTP SYNC message is transmitted" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x40 3. "Reserved_3,Reserved" "0,1" newline bitfld.long 0x40 2. "APDREQEN,Automatic PTP Pdelay_Req message Enable When this bit is set PTP Pdelay_Req message is generated periodically based on interval programmed or trigger from application when the MAC is programmed to be in Peer-to-Peer Transparent mode" "0: DISABLE,1: ENABLE" newline bitfld.long 0x40 1. "ASYNCEN,Automatic PTP SYNC message Enable When this bit is set PTP SYNC message is generated periodically based on interval programmed or trigger from application when the MAC is programmed to be in Clock Master mode" "0: DISABLE,1: ENABLE" newline bitfld.long 0x40 0. "PTOEN,PTP Offload Enable When this bit is set the PTP Offload feature is enabled" "0: DISABLE,1: ENABLE" line.long 0x44 "MAC_Source_Port_Identity0,This register contains Bits[31:0] of the 80-bit Source Port Identity of the PTP node. This register is available only when the Enable PTP Timestamp Offload feature is selected." line.long 0x48 "MAC_Source_Port_Identity1,This register contains Bits[63:32] of the 80-bit Source Port Identity of the PTP node. This register is available only when the Enable PTP Timestamp Offload feature is selected." line.long 0x4C "MAC_Source_Port_Identity2,This register contains Bits[79:64] of the 80-bit Source Port Identity of the PTP node. This register is available only when the Enable PTP Timestamp Offload feature is selected." hexmask.long.word 0x4C 16.--31. 1. "Reserved_31_16,Reserved" newline hexmask.long.word 0x4C 0.--15. 1. "SPI2,Source Port Identity 2 This field indicates bits [79:64] of sourcePortIdentity of PTP node" line.long 0x50 "MAC_Log_Message_Interval,This register contains the periodic intervals for automatic PTP packet generation. This register is available only when the Enable PTP Timestamp Offload feature is selected." hexmask.long.byte 0x50 24.--31. 1. "LMPDRI,Log Min Pdelay_Req Interval This field indicates logMinPdelayReqInterval of PTP node" newline hexmask.long.word 0x50 11.--23. 1. "Reserved_23_11,Reserved" newline bitfld.long 0x50 8.--10. "DRSYNCR,Delay_Req to SYNC Ratio In Slave mode it is used for controlling frequency of Delay_Req messages transmitted" "0: SYNC1,1: SYNC2,2: SYNC4,3: SYNC8,4: SYNC16,5: SYNC32,6: RSVD,?..." newline hexmask.long.byte 0x50 0.--7. 1. "LSI,Log Sync Interval This field indicates the periodicity of the automatically generated SYNC message when the PTP node is Master" tree.end tree "EQOS_MTL" group.long ad:0xC00BCC00++0x03 line.long 0x00 "MTL_Operation_Mode,The Operation Mode register establishes the Transmit and Receive operating modes and commands." hexmask.long.word 0x00 16.--31. 1. "Reserved_31_16,Reserved" newline bitfld.long 0x00 15. "FRPE,Flexible Rx parser Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 14. "RXPED,RxParser Software Error/Incomplete Parsing Packet Drop Enable when this bit is set to 0 packets encountering software programming errors (NPE/NVE/frame offset overflow errors) or incomplete parsing are forwarded to application with the.." "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 10.--13. "Reserved_13_10,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 9. "CNTCLR,Counters Reset When this bit is set all counters are reset" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 8. "CNTPRST,Counters Preset When this bit is set - MTL_TxQ[0-7]_Underflow register is initialized/preset to 12'h7F0" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 7. "Reserved_7,Reserved" "0,1" newline bitfld.long 0x00 5.--6. "SCHALG,Tx Scheduling Algorithm This field indicates the algorithm for Tx scheduling" "0: WRR,1: WFQ,2: DWRR,3: SP" newline rbitfld.long 0x00 3.--4. "Reserved_4_3,Reserved" "0,1,2,3" newline bitfld.long 0x00 2. "RAA,Receive Arbitration Algorithm This field is used to select the arbitration algorithm for the Rx side" "0: SP,1: WSP" newline bitfld.long 0x00 1. "DTXSTS,Drop Transmit Status" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 0. "Reserved_0,Reserved" "0,1" group.long ad:0xC00BCC08++0x0B line.long 0x00 "MTL_DBG_CTL,The FIFO Debug Access Control and Status register controls the operation mode of FIFO debug access. Note: Consecutive write or read to this register should be performed after at least 16 clock cycles of the slowest clock among MAC.." hexmask.long.word 0x00 19.--31. 1. "Reserved_31_19,Reserved" newline bitfld.long 0x00 18. "EIEC,ECC Inject Error Control for Tx Rx TSO and DCACHE memories When EIEE or EIAEE bit of this register is set following are the errors inserted based on the value encoded in this field" "0: M_1BIT,1: M_2BIT" newline bitfld.long 0x00 17. "EIAEE,ECC Inject Address Error for Tx Rx TSO and DCACHE memories" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 16. "EIEE,ECC Inject Error Enable for Tx Rx TSO and DCACHE memories" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 15. "STSIE,Transmit Status Available Interrupt Status Enable When this bit is set an interrupt is generated when Transmit status is available in slave mode" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 14. "PKTIE,Receive Packet Available Interrupt Status Enable When this bit is set an interrupt is generated when EOP of received packet is written to the Rx FIFO" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 12.--13. "FIFOSEL,FIFO Selected for Access This field indicates the FIFO selected for debug access" "0: TXFIFO,1: TXSTSFIFO,2: TSOFIFO,3: RXFIFO" newline bitfld.long 0x00 11. "FIFOWREN,FIFO Write Enable When this bit is set it enables the Write operation on selected FIFO when FIFO Debug Access is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 10. "FIFORDEN,FIFO Read Enable When this bit is set it enables the Read operation on selected FIFO when FIFO Debug Access is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 9. "RSTSEL,Reset Pointers of Selected FIFO When this bit is set the pointers of the currently-selected FIFO are reset when FIFO Debug Access is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 8. "RSTALL,Reset All Pointers When this bit is set the pointers of all FIFOs are reset when FIFO Debug Access is enabled" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 7. "Reserved_7,Reserved" "0,1" newline bitfld.long 0x00 5.--6. "PKTSTATE,Encoded Packet State This field is used to write the control information to the Tx FIFO or Rx FIFO" "0: PKT_DATA,1: CW_NS,2: SOP_LS,3: EOP" newline rbitfld.long 0x00 4. "Reserved_4,Reserved" "0,1" newline bitfld.long 0x00 2.--3. "BYTEEN,Byte Enables This field indicates the number of data bytes valid in the data register during Write operation" "0: B0_VAL,1: B01_VAL,2: B012_VAL,3: B0123_VAL" newline bitfld.long 0x00 1. "DBGMOD,Debug Mode Access to FIFO" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "FDBGEN,FIFO Debug Access Enable" "0: DISABLE,1: ENABLE" line.long 0x04 "MTL_DBG_STS,The FIFO Debug Status register contains the status of FIFO debug access." hexmask.long.tbyte 0x04 15.--31. 1. "LOCR,Remaining Locations in the FIFO - Slave Access Mode: This field indicates the space available in the selected FIFO" newline rbitfld.long 0x04 10.--14. "Reserved_14_10,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x04 9. "STSI,Transmit Status Available Interrupt Status When set this bit indicates that the Slave mode Tx packet is transmitted and the status is available in Tx Status FIFO" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 8. "PKTI,Receive Packet Available Interrupt Status When set this bit indicates that MAC layer has written the EOP of received packet to the Rx FIFO" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x04 5.--7. "Reserved_7_5,Reserved" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x04 3.--4. "BYTEEN,Byte Enables This field indicates the number of data bytes valid in the data register during Read operation" "0: B0_VAL,1: B01_VAL,2: B012_VAL,3: B0123_VAL" newline rbitfld.long 0x04 1.--2. "PKTSTATE,Encoded Packet State This field is used to get the control or status information of the selected FIFO" "0: PKT_DATA,1: CW_NS,2: SOP_LS,3: EOP" newline rbitfld.long 0x04 0. "FIFOBUSY,FIFO Busy When set this bit indicates that a FIFO operation is in progress in the MAC and content of the following fields is not valid: - All other fields of this register - All fields of the MTL_FIFO_Debug_Data register" "0: INACTIVE,1: ACTIVE" line.long 0x08 "MTL_FIFO_Debug_Data,The FIFO Debug Data register contains the data to be written to or read from the FIFOs." rgroup.long ad:0xC00BCC20++0x03 line.long 0x00 "MTL_Interrupt_Status,The software driver (application) reads this register during interrupt service routine or polling to determine the interrupt status of MTL queues and the MAC." hexmask.long.byte 0x00 24.--31. 1. "Reserved_31_24,Reserved" newline bitfld.long 0x00 23. "MTLPIS,MTL Rx Parser Interrupt Status This bit indicates that there is an interrupt from Rx Parser Block" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 19.--22. "Reserved_22_19,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 18. "ESTIS,EST (TAS- 802.1Qbv) Interrupt Status This bit indicates an interrupt event during the operation of 802.1Qbv" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 17. "DBGIS,Debug Interrupt status This bit indicates an interrupt event during the slave access" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 16. "Reserved_MACIS,Reserved" "0,1" newline hexmask.long.byte 0x00 8.--15. 1. "Reserved_15_8,Reserved" newline bitfld.long 0x00 7. "Reserved_Q7IS,Reserved" "0,1" newline bitfld.long 0x00 6. "Reserved_Q6IS,Reserved" "0,1" newline bitfld.long 0x00 5. "Reserved_Q5IS,Reserved" "0,1" newline bitfld.long 0x00 4. "Reserved_Q4IS,Reserved" "0,1" newline bitfld.long 0x00 3. "Q3IS,Queue 3 Interrupt status This bit indicates that there is an interrupt from Queue 3" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 2. "Q2IS,Queue 2 Interrupt status This bit indicates that there is an interrupt from Queue 2" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 1. "Q1IS,Queue 1 Interrupt status This bit indicates that there is an interrupt from Queue 1" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "Q0IS,Queue 0 Interrupt status This bit indicates that there is an interrupt from Queue 0" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BCC30++0x03 line.long 0x00 "MTL_RxQ_DMA_Map0,This register controls the Dynamic (per packet) or Static (all packets in a Receive Queue) DMA Channel Selection for lower numbered Receive Queues." rbitfld.long 0x00 29.--31. "Reserved_31_29,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 28. "Q3DDMACH,Queue 3 Enabled for Dynamic (per packet) DMA Channel Selection When set this bit indicates that the packets received in Queue 3 are routed to a particular DMA channel as decided in the MAC Receiver based on the DMA channel number programmed in.." "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 26.--27. "Reserved_27_y,Reserved" "0,1,2,3" newline bitfld.long 0x00 24.--25. "Q3MDMACH,Queue 3 Mapped to DMA Channel This field controls the routing of the received packet in Queue 3 to the DMA channel" "0: DMA Channel,1: DMA Channel 1Reserved,2: DMA Channel 2Reserved,3: DMA Channel 3Reserved" newline rbitfld.long 0x00 21.--23. "Reserved_23_21,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 20. "Q2DDMACH,Queue 2 Enabled for DA-based DMA Channel Selection When set this bit indicates that the packets received in Queue 2 are routed to a particular DMA channel as decided in the MAC Receiver based on the DMA channel number programmed in the Ethernet.." "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 18.--19. "Reserved_19_y,Reserved" "0,1,2,3" newline bitfld.long 0x00 16.--17. "Q2MDMACH,Queue 2 Mapped to DMA Channel This field controls the routing of the received packet in Queue 2 to the DMA channel" "0: DMA Channel,1: DMA Channel 1Reserved,2: DMA Channel 2Reserved,3: DMA Channel 3Reserved" newline rbitfld.long 0x00 13.--15. "Reserved_15_13,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 12. "Q1DDMACH,Queue 1 Enabled for DA-based DMA Channel Selection When set this bit indicates that the packets received in Queue 1 are routed to a particular DMA channel as decided in the MAC Receiver based on the DMA channel number programmed in the Ethernet.." "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 10.--11. "Reserved_11_y,Reserved" "0,1,2,3" newline bitfld.long 0x00 8.--9. "Q1MDMACH,Queue 1 Mapped to DMA Channel This field controls the routing of the received packet in Queue 1 to the DMA channel" "0: DMA Channel,1: DMA Channel 1Reserved,2: DMA Channel 2Reserved,3: DMA Channel 3Reserved" newline rbitfld.long 0x00 5.--7. "Reserved_7_5,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4. "Q0DDMACH,Queue 0 Enabled for DA-based DMA Channel Selection When set this bit indicates that the packets received in Queue 0 are routed to a particular DMA channel as decided in the MAC Receiver based on the DMA channel number programmed in the Ethernet.." "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 2.--3. "Reserved_3_y,Reserved" "0,1,2,3" newline bitfld.long 0x00 0.--1. "Q0MDMACH,Queue 0 Mapped to DMA Channel This field controls the routing of the packet received in Queue 0 to the DMA channel" "0: DMA Channel,1: DMA Channel 1Reserved,2: DMA Channel 2Reserved,3: DMA Channel 3Reserved" group.long ad:0xC00BCC40++0x03 line.long 0x00 "MTL_TBS_CTRL,This register controls the operation of Time Based Scheduling." hexmask.long.tbyte 0x00 8.--31. 1. "LEOS,Launch Expiry Offset The value in units of 256 nanoseconds that has to be added to the Launch time to compute the Launch Expiry time" newline rbitfld.long 0x00 7. "Reserved_7,Reserved" "0,1" newline bitfld.long 0x00 4.--6. "LEGOS,Launch Expiry GSN Offset The number GSN slots that has to be added to the Launch GSN to compute the Launch Expiry time" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x00 2.--3. "Reserved_3_2,Reserved" "0,1,2,3" newline bitfld.long 0x00 1. "LEOV,Launch Expiry Offset Valid When set indicates the LEOS field is valid" "0: INVALID,1: VALID" newline bitfld.long 0x00 0. "ESTM,EST offset Mode" "0: DISABLE,1: ENABLE" group.long ad:0xC00BCC50++0x0B line.long 0x00 "MTL_EST_Control,This register controls the operation of Enhancements to Scheduled Transmission (IEEE802.1Qbv)." hexmask.long.byte 0x00 24.--31. 1. "PTOV,PTP Time Offset Value The value of PTP Clock period multiplied by 9 in nanoseconds" newline hexmask.long.word 0x00 12.--23. 1. "CTOV,Current Time Offset Value Provides a 12 bit time offset value in nano second that is added to the current time to compensate for all the implementation pipeline delays such as the CDC sync delay buffering delays data path delays and so on" newline rbitfld.long 0x00 11. "Reserved_11,Reserved" "0,1" newline bitfld.long 0x00 8.--10. "TILS,Time Interval Left Shift Amount This field provides the left shift amount for the programmed Time Interval values used in the Gate Control Lists" "0: No left shift needed (equal to x1ns),1: Left shift TI by 1 bit (equal to x2ns),2: Left shift TI by 2 bits (equal to x4ns),?,4: Left shift TI by 7 bits (equal to x128ns),?..." newline bitfld.long 0x00 6.--7. "LCSE,Loop Count to report Scheduling Error Programmable number of GCL list iterations before reporting an HLBS error defined in EST_Status register" "0: M_4_ITERNS,1: M_8_ITERNS,2: M_16_ITERNS,3: M_32_ITERNS" newline bitfld.long 0x00 5. "DFBS,Drop Frames causing Scheduling Error When set frames reported to cause HOL Blocking due to not getting scheduled (HLBS field of EST_Status register) after 4 8 16 32 (based on LCSE field of this register) GCL iterations are dropped" "0: DONT_DROP,1: DROP" newline bitfld.long 0x00 4. "DDBF,Do not Drop frames during Frame Size Error When set frames are not be dropped during Head-of-Line blocking due to Frame Size Error (HLBF field of EST_Status register)" "0: DROP,1: DONT_DROP" newline bitfld.long 0x00 3. "QHLBF,Quick Assertion of HLBF Error When set Time Window for Head-of-Line blocking due to Frame Size Error is 1 to 2 loop count of GCL list.On reset Time Window for Head-of-Line blocking due to Frame Size Error is 2 to 3 loop counts of GCL list" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 2. "Reserved_2,Reserved" "0,1" newline bitfld.long 0x00 1. "SSWL,Switch to S/W owned list When set indicates that the software has programmed that list that it currently owns (SWOL) and the HW must switch to the new list based on the new BTR" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "EEST,Enable EST When reset the gate control list processing is halted and all gates are assumed to be in Open state" "0: DISABLE,1: ENABLE" line.long 0x04 "MTL_EST_Ext_Control,This register indicates the number of Overhead bytes for EST related scheduling." hexmask.long 0x04 6.--31. 1. "Reserved_31_6,Reserved" newline hexmask.long.byte 0x04 0.--5. 1. "OVHD,Overhead Bytes Value This field indicates the fixed overhead for every packet to account for EST Scheduler Delay IPG or EIPG and Preamble bytes" line.long 0x08 "MTL_EST_Status,This register provides Status related to Enhancements to Scheduled Transmission (IEEE802.1Qbv)." hexmask.long.word 0x08 20.--31. 1. "Reserved_31_20,Reserved" newline rbitfld.long 0x08 16.--19. "CGSN,Current GCL Slot Number Indicates the slot number of the GCL list" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.byte 0x08 8.--15. 1. "BTRL,BTR Error Loop Count Provides the minimum count (N) for which the equation Current Time =< New BTR + (N * New Cycle Time) becomes true" newline rbitfld.long 0x08 7. "SWOL,S/W owned list When '0' indicates Gate control list number '0' is owned by software and when '1' indicates the Gate Control list '1' is owned by the software" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x08 5.--6. "Reserved_6_5,Reserved" "0,1,2,3" newline bitfld.long 0x08 4. "CGCE,Constant Gate Control Error This error occurs when the list length (LLR) is 1 and the Cycle Time (CTR) is less than or equal to the programmed Time Interval (TI) value after the optional Left Shifting" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x08 3. "HLBS,Head-Of-Line Blocking due to Scheduling Set when the frame is not able to win arbitration and get scheduled even after 4 iterations of the GCL" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x08 2. "HLBF,Head-Of-Line Blocking due to Frame Size Set when HOL Blocking is noticed on one or more Queues as a result of none of the Time Intervals of gate open in the GCL being greater than or equal to the duration needed for frame size (or frame fragment.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x08 1. "BTRE,BTR Error When '1' indicates a programming error in the BTR of SWOL where the programmed value is less than current time" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x08 0. "SWLC,Switch to S/W owned list Complete When '1' indicates the hardware has successfully switched to the SWOL and the SWOL bit has been updated to that effect" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BCC60++0x07 line.long 0x00 "MTL_EST_Sch_Error,This register provides the One Hot encoded Queue Numbers that are having the Scheduling related error (timeout)." hexmask.long 0x00 4.--31. 1. "Reserved_31_x,Reserved" newline bitfld.long 0x00 0.--3. "SEQN,Schedule Error Queue Number The One Hot Encoded Queue Numbers that have experienced error/timeout described in HLBS field of status register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "MTL_EST_Frm_Size_Error,This register provides the One Hot encoded Queue Numbers that are having the Frame Size related error." hexmask.long 0x04 4.--31. 1. "Reserved_31_x,Reserved" newline bitfld.long 0x04 0.--3. "FEQN,Frame Size Error Queue Number The One Hot Encoded Queue Numbers that have experienced error described in HLBF field of status register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long ad:0xC00BCC68++0x03 line.long 0x00 "MTL_EST_Frm_Size_Capture,This register captures the Frame Size and Queue Number of the first occurrence of the Frame Size related error. Up on clearing it captures the data of immediate next occurrence of a similar error." hexmask.long.word 0x00 18.--31. 1. "Reserved_31_x,Reserved" newline bitfld.long 0x00 16.--17. "HBFQ,Queue Number of HLBF Captures the binary value of the of the first Queue (number) experiencing HLBF error (see HLBF field of status register)" "0,1,2,3" newline bitfld.long 0x00 15. "Reserved_15,Reserved" "0,1" newline hexmask.long.word 0x00 0.--14. 1. "HBFS,Frame Size of HLBF Captures the Frame Size of the dropped frame related to queue number indicated in HBFQ field of this register" group.long ad:0xC00BCC70++0x03 line.long 0x00 "MTL_EST_Intr_Enable,This register implements the Interrupt Enable bits for the various events that generate an interrupt. Bit positions have a 1 to 1 correlation with the status bit positions in MTL_ETS_Status register." hexmask.long 0x00 5.--31. 1. "Reserved_31_5,Reserved" newline bitfld.long 0x00 4. "CGCE,Interrupt Enable for CGCE When set generates interrupt when the Constant Gate Control Error occurs and is indicated in the status" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 3. "IEHS,Interrupt Enable for HLBS When set generates interrupt when the Head-of-Line Blocking due to Scheduling issue and is indicated in the status" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 2. "IEHF,Interrupt Enable for HLBF When set generates interrupt when the Head-of-Line Blocking due to Frame Size error occurs and is indicated in the status" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 1. "IEBE,Interrupt Enable for BTR Error When set generates interrupt when the BTR Error occurs and is indicated in the status" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "IECC,Interrupt Enable for Switch List When set generates interrupt when the configuration change is successful and the hardware has switched to the new list" "0: DISABLE,1: ENABLE" group.long ad:0xC00BCC80++0x07 line.long 0x00 "MTL_EST_GCL_Control,This register provides the control information for reading/writing to the Gate Control lists." hexmask.long.byte 0x00 24.--31. 1. "Reserved_31_24,Reserved" newline bitfld.long 0x00 23. "ESTEIEC,ECC Inject Error Control for EST Memory When ESTEIEE or ESTEIAEE bit of this register is set following are the errors inserted based on the value encoded in this field" "0: M_1BIT,1: M_2BIT" newline bitfld.long 0x00 22. "ESTEIAEE,EST ECC Inject Address Error Enable When set along with EEST bit of MTL_EST_Control register enables the ECC address error injection feature" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 21. "ESTEIEE,EST ECC Inject Error Enable When set along with EEST bit of MTL_EST_Control register enables the ECC error injection feature" "0: DISABLE,1: ENABLE" newline hexmask.long.byte 0x00 15.--20. 1. "Reserved_20_y,Reserved" newline abitfld.long 0x00 8.--14. "ADDR,Gate Control List Address: (ADDR when GCRR is '0')" "0x0000000=0x0000000,0x0000001=0x0000001,0x000000A=0x000000A,0x000000B=0x000000B,0x0000064=0x0000064,0x0000065=0x0000065" newline bitfld.long 0x00 6.--7. "Reserved_7_6,Reserved" "0,1,2,3" newline bitfld.long 0x00 5. "DBGB,Debug Mode Bank Select When set to '0' indicates R/W in debug mode must be directed to Bank 0 (GCL0 and corresponding Time related registers)" "0: BANK0,1: BANK1" newline bitfld.long 0x00 4. "DBGM,Debug Mode When set to '1' indicates R/W in debug mode where the memory bank (for GCL and Time related registers) is explicitly provided by DBGB value when set to '0' SWOL bit is used to determine which bank to use" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 3. "Reserved_3,Reserved" "0,1" newline bitfld.long 0x00 2. "GCRR,Gate Control Related Registers When set to '1' indicates the R/W access is for the GCL related registers (BTR CTR TER LLR) whose address is provided by ADDR" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 1. "R1W0,Read '1' Write '0'" "0:,1:" newline bitfld.long 0x00 0. "SRWO,Start Read or Write Operation" "0: DISABLE,1: ENABLE" line.long 0x04 "MTL_EST_GCL_Data,This register holds the read data or write data in case of reads and writes respectively." group.long ad:0xC00BCC90++0x07 line.long 0x00 "MTL_FPE_CTRL_STS,This register controls the operation of and provides status for Frame Preemption (IEEE802.1Qbu/802.3br)." rbitfld.long 0x00 29.--31. "Reserved_31_29,Reserved" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x00 28. "HRS,Hold/Release Status" "0: SET_REL,1: SET_HOLD" newline hexmask.long.word 0x00 12.--27. 1. "Reserved_27_y,Reserved" newline bitfld.long 0x00 8.--11. "PEC,Preemption Classification When set indicates the corresponding Queue must be classified as preemptable when '0' Queue is classified as express" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "LBHT,Level Based Hold Transition When set to 1 enables hold operation in second row of EST GCL if hold request is set in second GCL row for first loop of new GCL even though hold request is also set in the first GCL row" "0,1" newline rbitfld.long 0x00 2.--6. "Reserved_6_2,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 0.--1. "AFSZ,Additional Fragment Size used to indicate in units of 64 bytes the minimum number of bytes over 64 bytes required in non-final fragments of preempted frames" "0,1,2,3" line.long 0x04 "MTL_FPE_Advance,This register holds the Hold and Release Advance time." hexmask.long.word 0x04 16.--31. 1. "RADV,Release Advance The maximum time in nanoseconds that can elapse between issuing a RELEASE to the MAC and the MAC being ready to resume transmission of preemptable frames in the absence of there being any express frames available for transmission" newline hexmask.long.word 0x04 0.--15. 1. "HADV,Hold Advance The maximum time in nanoseconds that can elapse between issuing a HOLD to the MAC and the MAC ceasing to transmit any preemptable frame that is in the process of transmission or any preemptable frames that are queued for transmission" group.long ad:0xC00BCCA0++0x07 line.long 0x00 "MTL_RXP_Control_Status,The MTL_RXP_Control_Status register establishes the operating mode of Rx Parser and provides some status." rbitfld.long 0x00 31. "RXPI,RX Parser in Idle state This status bit is set to 1 when the Rx parser is in Idle State and waiting for a new packet for processing" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 30. "ELIRS,Enable Last Instruction in RX Status When this bit is set RDES2[31:16] indicates the index of the last instruction executed in Rx Parser when set to 0 indicates MAC filter status" "0,1" newline hexmask.long.byte 0x00 24.--29. 1. "Reserved_29_x,Reserved" newline hexmask.long.byte 0x00 16.--23. 1. "NPE,Number of parsable entries in the Instruction table This control indicates the number of parsable entries in the Instruction Memory" newline rbitfld.long 0x00 12.--15. "Reserved_15_12,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 11. "OKI_DME,Instruction's OK Index Dual Meaning Enable When this field is set to 1 it indicates Instruction's OK Index field has dual meaning" "0,1" newline rbitfld.long 0x00 8.--10. "Reserved_10_x,Reserved" "0,1,2,3,4,5,6,7" newline abitfld.long 0x00 0.--7. "NVE,Number of valid entry address/index in the Instruction table This control indicates the number of valid entries address/index in the Instruction Memory (i.e. when NVE field in register=31 the maximum valid entry address is NVE+1 i.e.." "0x00000001=0x00000001,0x00000002=0x00000002" line.long 0x04 "MTL_RXP_Interrupt_Control_Status,The MTL_RXP_Interrupt_Control_Status registers provides enable control for the interrupts and provides interrupt status." hexmask.long.word 0x04 20.--31. 1. "Reserved_31_20,Reserved" newline bitfld.long 0x04 19. "PDRFIE,Packet Drop due to RF Interrupt Enable When this bit is set the PDRFIS interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 18. "FOOVIE,Frame Offset Overflow Interrupt Enable When this bit is set the FOOVIS interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 17. "NPEOVIE,Number of Parsable Entries Overflow Interrupt Enable When this bit is set the NPEOVIS interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 16. "NVEOVIE,Number of Valid Entries Overflow Interrupt Enable When this bit is set the NVEOVIS interrupt is enabled" "0: DISABLE,1: ENABLE" newline hexmask.long.word 0x04 4.--15. 1. "Reserved_15_4,Reserved" newline bitfld.long 0x04 3. "PDRFIS,Packet Dropped due to RF Interrupt Status If the Rx Parser result says to drop the packet by setting RF=1 in the instruction memory then this bit is set to 1" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 2. "FOOVIS,Frame Offset Overflow Interrupt Status While parsing if the Instruction table entry's 'Frame Offset' found to be more than EOF offset then then this bit is set" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 1. "NPEOVIS,Number of Parsable Entries Overflow Interrupt Status While parsing a packet if the number of parsed entries found to be more than NPE[] (Number of Parseable Entries in MTL_RXP_Control register) then this bit is set to 1" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 0. "NVEOVIS,Number of Valid Entry Address/Index Overflow Interrupt Status While parsing if the Instruction address found to be more than NVE (Number of Valid Entry Address/index in MTL_RXP_Control register) then this bit is set to 1" "0: INACTIVE,1: ACTIVE" rgroup.long ad:0xC00BCCA8++0x07 line.long 0x00 "MTL_RXP_Drop_Cnt,The MTL_RXP_Drop_Cnt register provides the drop count of Rx Parser initiated drops." bitfld.long 0x00 31. "RXPDCOVF,Rx Parser Drop Counter Overflow Bit When set this bit indicates that the MTL_RXP_Drop_cnt (RXPDC) Counter field crossed the maximum limit" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x00 0.--30. 1. "RXPDC,Rx Parser Drop count This 31-bit counter is implemented when a Rx Parser Drops a packet due to RF =1" line.long 0x04 "MTL_RXP_Error_Cnt,The MTL_RXP_Error_Cnt register provides the Rx Parser related error occurrence count." bitfld.long 0x04 31. "RXPECOVF,Rx Parser Error Counter Overflow Bit When set this bit indicates that the MTL_RXP_Error_cnt (RXPEC) Counter field crossed the maximum limit" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x04 0.--30. 1. "RXPEC,Rx Parser Error count This 31-bit counter is implemented when a Rx Parser encounters following Error scenarios - Entry address >= NVE[] - Number Parsed Entries >= NPE[] - Entry address > EOF data entry address The counter is cleared when the.." group.long ad:0xC00BCCB0++0x03 line.long 0x00 "MTL_RXP_Indirect_Acc_Control_Status,The MTL_RXP_Indirect_Acc_Control_Status register provides the Indirect Access control and status for Rx Parser memory." bitfld.long 0x00 31. "STARTBUSY,FRP Instruction Table Access Busy - Set to 1 by the software indicates to start the Read/Write operation from/to the Rx Parser Memory" "0: INACTIVE,1: ACTIVE" newline hexmask.long.byte 0x00 23.--30. 1. "Reserved_30_23,Reserved" newline bitfld.long 0x00 22. "RXPEIEC,ECC Inject Error Control for Rx Parser Memory When RXPEIEE or RXPEIAEE bit of this register is set following are the errors inserted based on the value encoded in this field" "0: M_1BIT,1: M_2BIT" newline bitfld.long 0x00 21. "RXPEIAEE,ECC Inject Address Error Enable for Rx Parser Memory" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 20. "RXPEIEE,ECC Inject Error Enable for Rx Parser Memory" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 17.--19. "Reserved_19_17,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 16. "WRRDN,Read Write Control" "0:,1:" newline hexmask.long.byte 0x00 10.--15. 1. "Reserved_15_x,Reserved" newline hexmask.long.word 0x00 0.--9. 1. "ADDR,FRP Instruction Table Offset Address This field indicates the ADDR of the 32-bit part of a entry in Rx parser instruction table" rgroup.long ad:0xC00BCCB4++0x07 line.long 0x00 "MTL_RXP_Indirect_Acc_Data,The MTL_RXP_Indirect_Acc_Data registers holds the data associated to Indirect Access to Rx Parser memory." line.long 0x04 "MTL_RXP_Bypass_Cnt,The MTL_RXP_Bypass_Cnt register provides the bypass count of Rx Parser." bitfld.long 0x04 31. "RXPBCOF,Rx Parser bypass Counter Overflow Bit When set this bit indicates that the MTL_RXP_Bypass_cnt (RXPBC) Counter field crossed the maximum limit" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x04 0.--30. 1. "RXPBC,Rx Parser Bypass count This 31-bit counter is implemented when a Rx Parser bypass a packet due to AF=1 and RF =1" group.long ad:0xC00BCCC0++0x03 line.long 0x00 "MTL_ECC_Control,The MTL_ECC_Control register establishes the operating mode of ECC related to MTL memories." hexmask.long.tbyte 0x00 9.--31. 1. "Reserved_31_9,Reserved" newline bitfld.long 0x00 8. "MEEAO,MTL ECC Error Address Status Over-ride" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 6.--7. "Reserved_7_6,Reserved" "0,1,2,3" newline rbitfld.long 0x00 5. "Reserved_DSCEE,Reserved" "0,1" newline rbitfld.long 0x00 4. "Reserved_TSOEE,Reserved" "0,1" newline bitfld.long 0x00 3. "MRXPEE,MTL Rx Parser ECC Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 2. "MESTEE,MTL EST ECC Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 1. "MRXEE,MTL Rx FIFO ECC Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "MTXEE,MTL Tx FIFO ECC Enable" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BCCC4++0x03 line.long 0x00 "MTL_Safety_Interrupt_Status,The MTL_Safety_Interrupt_Status registers provides Safety interrupt status." bitfld.long 0x00 31. "Reserved_MCSIS,Reserved" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x00 2.--30. 1. "Reserved_30_2,Reserved" newline bitfld.long 0x00 1. "MEUIS,MTL ECC Uncorrectable error Interrupt Status This bit indicates that an uncorrectable error interrupt event in the MTL ECC safety feature" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "MECIS,MTL ECC Correctable error Interrupt Status This bit indicates that a correctable error interrupt event in the MTL ECC safety feature" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BCCC8++0x0B line.long 0x00 "MTL_ECC_Interrupt_Enable,The MTL_ECC_Interrupt_Enable register provides enable bits for the ECC interrupts." hexmask.long.tbyte 0x00 13.--31. 1. "Reserved_31_13,Reserved" newline bitfld.long 0x00 12. "RPCEIE,Rx Parser memory Correctable Error Interrupt Enable When set generates an interrupt when an uncorrectable error is detected at the Rx Parser memory interface" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 9.--11. "Reserved_11_9,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 8. "ECEIE,EST memory Correctable Error Interrupt Enable When set generates an interrupt when a correctable error is detected at the MTL EST memory interface" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 5.--7. "Reserved_7_5,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4. "RXCEIE,Rx memory Correctable Error Interrupt Enable When set generates an interrupt when a correctable error is detected at the MTL Rx memory interface" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 1.--3. "Reserved_3_1,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 0. "TXCEIE,Tx memory Correctable Error Interrupt Enable When set generates an interrupt when a correctable error is detected at the MTL Tx memory interface" "0: DISABLE,1: ENABLE" line.long 0x04 "MTL_ECC_Interrupt_Status,The MTL_ECC_Interrupt_Status register provides MTL ECC Interrupt Status." hexmask.long.tbyte 0x04 15.--31. 1. "Reserved_31_15,Reserved" newline bitfld.long 0x04 14. "RPUES,Rx Parser memory Uncorrectable Error Status When set indicates that an uncorrectable error is detected at Rx Parser memory interface" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 13. "RPAMS,MTL Rx Parser memory Address Mismatch Status This bit when set indicates that address mismatch is found for address bus of Rx Parser memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 12. "RPCES,MTL Rx Parser memory Correctable Error Status This bit when set indicates that correctable error is detected at RX Parser memory interface" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x04 11. "Reserved_11,Reserved" "0,1" newline bitfld.long 0x04 10. "EUES,MTL EST memory Uncorrectable Error Status When set indicates that an uncorrectable error is detected at MTL EST memory interface" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 9. "EAMS,MTL EST memory Address Mismatch Status This bit when set indicates that address mismatch is found for address bus of MTL EST memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 8. "ECES,MTL EST memory Correctable Error Status This bit when set indicates that correctable error is detected at the MTL EST memory" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x04 7. "Reserved_7,Reserved" "0,1" newline bitfld.long 0x04 6. "RXUES,MTL Rx memory Uncorrectable Error Status When set indicates that an uncorrectable error is detected at the MTL Rx memory interface" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 5. "RXAMS,MTL Rx memory Address Mismatch Status This bit when set indicates that address mismatch is found for address bus of the MTL Rx memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 4. "RXCES,MTL Rx memory Correctable Error Status This bit when set indicates that correctable error is detected at the MTL Rx memory" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x04 3. "Reserved_3,Reserved" "0,1" newline bitfld.long 0x04 2. "TXUES,MTL Tx memory Uncorrectable Error Status When set indicates that an uncorrectable error is detected at the MTL TX memory interface" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 1. "TXAMS,MTL Tx memory Address Mismatch Status This bit when set indicates that address mismatch is found for address bus of the MTL Tx memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 0. "TXCES,MTL Tx memory Correctable Error Status This bit when set indicates that a correctable error is detected at the MTL Tx memory" "0: INACTIVE,1: ACTIVE" line.long 0x08 "MTL_ECC_Err_Sts_Rctl,The MTL_ECC_Err_Sts_Rctl register establishes the control for ECC Error status capture." hexmask.long 0x08 6.--31. 1. "Reserved_31_6,Reserved" newline bitfld.long 0x08 5. "CUES,Clear Uncorrectable Error Status When this bit is set along with EESRE bit of this register based on the EMS field of this register the respective memory's uncorrectable error address and uncorrectable error count values are cleared upon reading" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x08 4. "CCES,Clear Correctable Error Status When this bit is set along with EESRE bit of this register based on the EMS field of this register the respective memory's correctable error address and correctable error count values are cleared upon reading" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x08 1.--3. "EMS,MTL ECC Memory Selection When EESRE bit of this register is set this field indicates which memory's error status value to be read" "0: TX_MEM,1: RX_MEM,2: EST_MEM,3: RXP_MEM,4: TSO_MEM,5: DCACHE_MEM,?..." newline bitfld.long 0x08 0. "EESRE,MTL ECC Error Status Read Enable When this bit is set based on the EMS field of this register the respective memory's error status values are captured as described: - The correctable and uncorrectable error count values are captured into.." "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BCCD4++0x07 line.long 0x00 "MTL_ECC_Err_Addr_Status,The MTL_ECC_Err_Addr_Status register provides the memory addresses for the correctable and uncorrectable errors." abitfld.long 0x00 16.--31. "EUEAS,MTL ECC Uncorrectable Error Address Status Based on the EMS field of MTL_ECC_Err_Sts_Rctl register this field holds the respective memory's address locations for which an uncorrectable error or address mismatch is detected" "0x0000000000000000=0x0000000000000000,0x0000000000000001=0x0000000000000001" newline abitfld.long 0x00 0.--15. "ECEAS,MTL ECC Correctable Error Address Status Based on the EMS field of MTL_ECC_Err_Sts_Rctl register this field holds the respective memory's address locations for which a correctable error is detected" "0x0000000000000000=0x0000000000000000,0x0000000000000001=0x0000000000000001" line.long 0x04 "MTL_ECC_Err_Cntr_Status,The MTL_ECC_Err_Cntr_Status register provides ECC Error count for Correctable and uncorrectable errors." hexmask.long.word 0x04 20.--31. 1. "Reserved_31_20,Reserved" newline bitfld.long 0x04 16.--19. "EUECS,MTL ECC Uncorrectable Error Counter Status Based on the EMS field of MTL_ECC_Err_Cntr_Rctl register this field holds the respective memory's uncorrectable error count value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.byte 0x04 8.--15. 1. "Reserved_15_8,Reserved" newline hexmask.long.byte 0x04 0.--7. 1. "ECECS,MTL ECC Correctable Error Counter Status Based on the EMS field of MTL_ECC_Err_Cntr_Rctl register this field holds the respective memory's correctable error count value" group.long ad:0xC00BCCE0++0x07 line.long 0x00 "MTL_DPP_Control,The MTL_DPP_Control establishes the operating mode of Data Parity protection and error injection." hexmask.long.word 0x00 17.--31. 1. "Reserved_31_17,Reserved" newline rbitfld.long 0x00 16. "Reserved_IPEDC,Reserved" "0,1" newline bitfld.long 0x00 15. "IPEMRWC,Insert Parity error in MTL RWC data parity checker When set to 1 parity/data bit of first valid input parity/data of the MTL RWC data parity checker (or at PC12 as shown in Recieve data path parity protection diagram) is flipped" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 14. "IPEMTFC,Insert Parity error in MAC TFC data parity checker When set to 1 parity/data bit of first valid input parity/data of the MAC TFC data parity checker (or at PC11 as shown in Transmit Data path parity protection diagram) is flipped" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 13. "IPEMTBU,Insert Parity error in MAC TBU data parity checker When set to 1 parity/data bit of first valid input parity/data of the MAC TBU data parity checker (or at PC10 as shown in Transmit data path parity protection diagram) is flipped" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 12. "Reserved_IPEASR,Reserved" "0,1" newline rbitfld.long 0x00 11. "Reserved_IPEMSW,Reserved" "0,1" newline bitfld.long 0x00 10. "IPEASW,Insert Parity error in AXI Slave Write data parity checker When set to 1 parity/data bit of first valid input parity/data of the AXI Slave Write data parity checker(or at PC7 as shown in AXI slave Interface Data path protection diagram) is flipped" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 9. "IPERID,Insert Parity Error in RX Interface Data parity checker When set to 1 parity/data bit of first valid input parity/data of the RX Interface Data parity checker is (or at PC6 as shown in Receive data path parity protection diagram) flipped" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 8. "IPEMTS,Insert Parity Error in MTL Tx Status FIFO parity checker When set to 1 parity/data bit of first valid input parity/data of the MTL Tx Status FIFO parity checker (or at PC5 as shown in Transmit data path parity protection diagram) is flipped" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 7. "IPEMTF,Insert Parity Error in MTL Tx FIFO write data parity checker When set to 1 parity/data bit of first valid input parity/data of the MTL Tx FIFO write data parity checker (or at PC4 as shown in Transmit data path parity protection diagram) is flipped" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 6. "IPETRD,Insert Parity Error in DMA Tx/Rx Descriptor parity checker When set to 1 parity/data bit of first valid input parity/data of the DMA Tx/Rx Descriptor parity checker (or at PC3 as shown in Transmit data path parity protection diagram) is flipped" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 5. "Reserved_IPETH,Reserved" "0,1" newline bitfld.long 0x00 4. "IPETID,Insert Parity Error in Tx Interface Data parity checker When set to 1 parity/data bit of first valid input parity/data of the Tx Interface data parity checker(or at PC1 as shown in Transmit data path parity protection diagram) is flipped" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 3. "Reserved_3,Reserved" "0,1" newline bitfld.long 0x00 2. "EPSI,Enable Parity on Slave Interface port When set to 1 enables the parity check for the slave interface ports and disables the internal generation of parity for the input slave data port" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 1. "OPE,Odd Parity Enable When set to 1 enables odd parity protection on all the external interfaces and when set to 0 enables even parity protection on all the external interfaces" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "EDPP,Enable Data path Parity Protection When set to 1 enables the parity protection for EQOS datapath by generating and checking the parity on EQOS datapath" "0: DISABLE,1: ENABLE" line.long 0x04 "MTL_DPP_ECC_EIC,The MTL_DPP_ECC_EIC establishes the operating mode of ECC/DPP error injection." hexmask.long.word 0x04 17.--31. 1. "Reserved_31_17,Reserved" newline bitfld.long 0x04 16. "EIM,Error Injection Mode" "0: Indicate error injection on data,1: Indicate error injection on ECC/Parity bits" newline hexmask.long.byte 0x04 8.--15. 1. "Reserved_15_8,Reserved" newline hexmask.long.byte 0x04 0.--7. 1. "BLEI,Bit Location of error injection This field indicates the bit location of DPP/ECC error injection determination of error in Parity/ECC bits or Data (being protected) depends on the Error Injection Mode (EIM field)" tree.end tree "EQOS_MTL_Q0" group.long ad:0xC00BCD00++0x03 line.long 0x00 "MTL_TxQ0_Operation_Mode,The Queue 0 Transmit Operation Mode register establishes the Transmit queue operating modes and commands." hexmask.long.word 0x00 20.--31. 1. "Reserved_31_y,Reserved" bitfld.long 0x00 16.--19. "TQS,Transmit Queue Size This field indicates the size of the allocated Transmit queues in blocks of 256 bytes the reset value is 0x0 and indicates size of 256 bytes" "0: 256 bytes,1: 512 bytes and so on,?..." newline hexmask.long.word 0x00 7.--15. 1. "Reserved_15_7,Reserved" bitfld.long 0x00 4.--6. "TTC,Transmit Threshold Control These bits control the threshold level of the MTL Tx Queue" "0: M_32BYTES,1: M_64BYTES,2: M_96BYTES,3: M_128BYTES,4: M_192BYTES,5: M_256BYTES,6: M_384BYTES,7: M_512BYTES" newline bitfld.long 0x00 2.--3. "TXQEN,Transmit Queue Enable This field is used to enable/disable the transmit queue 0" "0: DISABLE,1: EN_IF_AV,2: ENABLE,3: RSVD2" bitfld.long 0x00 1. "TSF,Transmit Store and Forward When this bit is set the transmission starts when a full packet resides in the MTL Tx queue" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "FTQ,Flush Transmit Queue When this bit is set the Tx queue controller logic is reset to its default values" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BCD04++0x07 line.long 0x00 "MTL_TxQ0_Underflow,The Queue 0 Underflow Counter register contains the counter for packets aborted because of Transmit queue underflow and packets missed because of Receive queue packet flush" hexmask.long.tbyte 0x00 12.--31. 1. "Reserved_31_12,Reserved" bitfld.long 0x00 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter This bit is set every time the Tx queue Underflow Packet Counter field overflows that is it has crossed the maximum count" "0: INACTIVE,1: ACTIVE" newline hexmask.long.word 0x00 0.--10. 1. "UFFRMCNT,Underflow Packet Counter This field indicates the number of packets aborted by the controller because of Tx Queue Underflow" line.long 0x04 "MTL_TxQ0_Debug,The Queue 0 Transmit Debug register gives the debug status of various blocks related to the Transmit queue." hexmask.long.word 0x04 23.--31. 1. "Reserved_31_23,Reserved" bitfld.long 0x04 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue This field indicates the current number of status in the Tx Status FIFO of this queue" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 19. "Reserved_19,Reserved" "0,1" bitfld.long 0x04 16.--18. "PTXQ,Number of Packets in the Transmit Queue This field indicates the current number of packets in the Tx Queue" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x04 6.--15. 1. "Reserved_15_6,Reserved" bitfld.long 0x04 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status When high this bit indicates that the MTL Tx Status FIFO is full" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 4. "TXQSTS,MTL Tx Queue Not Empty Status When this bit is high it indicates that the MTL Tx Queue is not empty and some data is left for transmission" "0: INACTIVE,1: ACTIVE" bitfld.long 0x04 3. "TWCSTS,MTL Tx Queue Write Controller Status When high this bit indicates that the MTL Tx Queue Write Controller is active and it is transferring the data to the Tx Queue" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status This field indicates the state of the Tx Queue Read Controller" "0: IDLE,1:,2: WAIT,3: FLUSH" bitfld.long 0x04 0. "TXQPAUSED,Transmit Queue in Pause When this bit is high and the Rx flow control is enabled it indicates that the Tx Queue is in the Pause condition (in the full-duplex only mode) because of the following: - Reception of the PFC packet for the priorities.." "0: INACTIVE,1: ACTIVE" rgroup.long ad:0xC00BCD14++0x03 line.long 0x00 "MTL_TxQ0_ETS_Status,The Queue 0 ETS Status register provides the average traffic transmitted in Queue 0." hexmask.long.byte 0x00 24.--31. 1. "Reserved_31_24,Reserved" hexmask.long.tbyte 0x00 0.--23. 1. "ABS,Average Bits per Slot This field contains the average transmitted bits per slot" group.long ad:0xC00BCD18++0x03 line.long 0x00 "MTL_TxQ0_Quantum_Weight,The Queue 0 Quantum or Weights register contains the weights for the Weighted Round Robin (WRR)." hexmask.long.word 0x00 21.--31. 1. "Reserved_31_21,Reserved" hexmask.long.tbyte 0x00 0.--20. 1. "ISCQW,Weights When generic queuing operation is enabled with WRR algorithm for Queue 0 traffic this field contains the weight for this queue" group.long ad:0xC00BCD2C++0x07 line.long 0x00 "MTL_Q0_Interrupt_Control_Status,This register contains the interrupt enable and status bits for the queue 0 interrupts." hexmask.long.byte 0x00 25.--31. 1. "Reserved_31_25,Reserved" bitfld.long 0x00 24. "RXOIE,Receive Queue Overflow Interrupt Enable When this bit is set the Receive Queue Overflow interrupt is enabled" "0: DISABLE,1: ENABLE" newline hexmask.long.byte 0x00 17.--23. 1. "Reserved_23_17,Reserved" bitfld.long 0x00 16. "RXOVFIS,Receive Queue Overflow Interrupt Status This bit indicates that the Receive Queue had an overflow while receiving the packet" "0: INACTIVE,1: ACTIVE" newline hexmask.long.byte 0x00 10.--15. 1. "Reserved_15_10,Reserved" bitfld.long 0x00 9. "ABPSIE,Average Bits Per Slot Interrupt Enable When this bit is set the MAC asserts the sbd_intr_o or mci_intr_o interrupt when the average bits per slot status is updated" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 8. "TXUIE,Transmit Queue Underflow Interrupt Enable When this bit is set the Transmit Queue Underflow interrupt is enabled" "0: DISABLE,1: ENABLE" hexmask.long.byte 0x00 2.--7. 1. "Reserved_7_2,Reserved" newline bitfld.long 0x00 1. "ABPSIS,Average Bits Per Slot Interrupt Status When set this bit indicates that the MAC has updated the ABS value" "0: INACTIVE,1: ACTIVE" bitfld.long 0x00 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status This bit indicates that the Transmit Queue had an underflow while transmitting the packet" "0: INACTIVE,1: ACTIVE" line.long 0x04 "MTL_RxQ0_Operation_Mode,The Queue 0 Receive Operation Mode register establishes the Receive queue operating modes and command." hexmask.long.byte 0x04 25.--31. 1. "Reserved_31_y,Reserved" bitfld.long 0x04 20.--24. "RQS,Receive Queue Size This field indicates the size of the allocated Receive queues in blocks of 256 bytesthe reset value is 0x0 and indicates size of 256 bytes" "0: 256 bytes,1: 512 bytes and so on,?..." newline rbitfld.long 0x04 18.--19. "Reserved_19_y,Reserved" "0,1,2,3" bitfld.long 0x04 14.--17. "RFD,Threshold for Deactivating Flow Control (in half-duplex and full-duplex modes) These bits control the threshold (fill-level of Rx queue) at which the flow control is de-asserted after activation" "0: Full minus 1 KB that is FULL 1 KB,1: Full minus 1.5 KB that is FULL 1.5 KB,2: Full minus 2 KB that is FULL 2 KB,3: Full minus 2.5 KB that is FULL 2.5 KB,?,?,?,?,?,?,?,?,?,?,14: Full minus 8 KB that is FULL 8 KB,15: Full minus 8.5 KB that is FULL 8.5 KB The" newline rbitfld.long 0x04 12.--13. "Reserved_13_y,Reserved" "0,1,2,3" bitfld.long 0x04 8.--11. "RFA,Threshold for Activating Flow Control (in half-duplex and full-duplex These bits control the threshold (fill-level of Rx queue) at which the flow control is activated: For more information on encoding for this field see RFD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 7. "EHFC,Enable Hardware Flow Control When this bit is set the flow control signal operation based on the fill-level of Rx queue is enabled" "0: DISABLE,1: ENABLE" bitfld.long 0x04 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets When this bit is set the MAC does not drop the packets which only have the errors detected by the Receive Checksum Offload engine" "0: ENABLE,1: DISABLE" newline bitfld.long 0x04 5. "RSF,Receive Queue Store and Forward When this bit is set the DWC_ether_qos reads a packet from the Rx queue only after the complete packet has been written to it ignoring the RTC field of this register" "0: DISABLE,1: ENABLE" bitfld.long 0x04 4. "FEP,Forward Error Packets When this bit is reset the Rx queue drops packets with error status (CRC error GMII_ER watchdog timeout or overflow)" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 3. "FUP,Forward Undersized Good Packets When this bit is set the Rx queue forwards the undersized good packets (packets with no error and length less than 64 bytes) including pad-bytes and CRC" "0: DISABLE,1: ENABLE" rbitfld.long 0x04 2. "Reserved_2,Reserved" "0,1" newline bitfld.long 0x04 0.--1. "RTC,Receive Queue Threshold Control These bits control the threshold level of the MTL Rx queue (in bytes): The received packet is transferred to the application or DMA when the packet size within the MTL Rx queue is larger than the threshold" "0: M_64BYTE,1: M_32BYTE,2: M_96BYTE,3: M_128BYTE" rgroup.long ad:0xC00BCD34++0x07 line.long 0x00 "MTL_RxQ0_Missed_Packet_Overflow_Cnt,The Queue 0 Missed Packet and Overflow Counter register contains the counter for packets missed because of Receive queue packet flush and packets discarded because of Receive queue overflow." bitfld.long 0x00 28.--31. "Reserved_31_28,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 27. "MISCNTOVF,Missed Packet Counter Overflow Bit When set this bit indicates that the Rx Queue Missed Packet Counter crossed the maximum limit" "0: INACTIVE,1: ACTIVE" newline hexmask.long.word 0x00 16.--26. 1. "MISPKTCNT,Missed Packet Counter This field indicates the number of packets missed by the DWC_ether_qos because the application asserted ari_pkt_flush_i[] for this queue" bitfld.long 0x00 12.--15. "Reserved_15_12,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 11. "OVFCNTOVF,Overflow Counter Overflow Bit When set this bit indicates that the Rx Queue Overflow Packet Counter field crossed the maximum limit" "0: INACTIVE,1: ACTIVE" hexmask.long.word 0x00 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter This field indicates the number of packets discarded by the DWC_ether_qos because of Receive queue overflow" line.long 0x04 "MTL_RxQ0_Debug,The Queue 0 Receive Debug register gives the debug status of various blocks related to the Receive queue." bitfld.long 0x04 30.--31. "Reserved_31_30,Reserved" "0,1,2,3" hexmask.long.word 0x04 16.--29. 1. "PRXQ,Number of Packets in Receive Queue This field indicates the current number of packets in the Rx Queue that is Max_Queue_Size/Min_Packet_Size" newline hexmask.long.word 0x04 6.--15. 1. "Reserved_15_6,Reserved" bitfld.long 0x04 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status This field gives the status of the fill-level of the Rx Queue" "0: EMPTY,1: BLW_THR,2: ABV_THR,3: FULL" newline bitfld.long 0x04 3. "Reserved_3,Reserved" "0,1" bitfld.long 0x04 1.--2. "RRCSTS,MTL Rx Queue Read Controller State This field gives the state of the Rx queue Read controller" "0: IDLE,1: READ_DATA,2: READ_STS,3: FLUSH" newline bitfld.long 0x04 0. "RWCSTS,MTL Rx Queue Write Controller Active Status When high this bit indicates that the MTL Rx queue Write controller is active and it is transferring a received packet to the Rx Queue" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BCD3C++0x03 line.long 0x00 "MTL_RxQ0_Control,The Queue Receive Control register controls the receive arbitration and passing of received packets to the application." hexmask.long 0x00 4.--31. 1. "Reserved_31_4,Reserved" bitfld.long 0x00 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration When this bit is set the DWC_ether_qos drives the packet data to the ARI interface such that the entire packet data of currently-selected queue is transmitted before switching to other queue" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0.--2. "RXQ_WEGT,Receive Queue Weight This field indicates the weight assigned to the Rx Queue 0" "0,1,2,3,4,5,6,7" tree.end tree "EQOS_MTL_Q1" group.long ad:0xC00BCD40++0x03 line.long 0x00 "MTL_TxQ1_Operation_Mode,The Queue 1 Transmit Operation Mode register establishes the Transmit queue operating modes and commands." hexmask.long.word 0x00 20.--31. 1. "Reserved_31_y,Reserved" bitfld.long 0x00 16.--19. "TQS,Transmit Queue Size This field indicates the size of the allocated Transmit queues in blocks of 256 bytes the reset value is 0x0 and indicates size of 256 bytes" "0: 256 bytes,1: 512 bytes and so on,?..." newline hexmask.long.word 0x00 7.--15. 1. "Reserved_15_7,Reserved" bitfld.long 0x00 4.--6. "TTC,Transmit Threshold Control These bits control the threshold level of the MTL Tx Queue" "0: M_32BYTES,1: M_64BYTES,2: M_96BYTES,3: M_128BYTES,4: M_192BYTES,5: M_256BYTES,6: M_384BYTES,7: M_512BYTES" newline bitfld.long 0x00 2.--3. "TXQEN,Transmit Queue Enable This field is used to enable/disable the transmit queue 1" "0: DISABLE,1: EN_IF_AV,2: ENABLE,3: RSVD2" bitfld.long 0x00 1. "TSF,Transmit Store and Forward When this bit is set the transmission starts when a full packet resides in the MTL Tx queue" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "FTQ,Flush Transmit Queue When this bit is set the Tx queue controller logic is reset to its default values" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BCD44++0x07 line.long 0x00 "MTL_TxQ1_Underflow,The Queue 1 Underflow Counter register contains the counter for packets aborted because of Transmit queue underflow and packets missed because of Receive queue packet flush" hexmask.long.tbyte 0x00 12.--31. 1. "Reserved_31_12,Reserved" bitfld.long 0x00 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter This bit is set every time the Tx queue Underflow Packet Counter field overflows that is it has crossed the maximum count" "0: INACTIVE,1: ACTIVE" newline hexmask.long.word 0x00 0.--10. 1. "UFFRMCNT,Underflow Packet Counter This field indicates the number of packets aborted by the controller because of Tx Queue Underflow" line.long 0x04 "MTL_TxQ1_Debug,The Queue 1 Transmit Debug register gives the debug status of various blocks related to the Transmit queue." hexmask.long.word 0x04 23.--31. 1. "Reserved_31_23,Reserved" bitfld.long 0x04 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue This field indicates the current number of status in the Tx Status FIFO of this queue" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 19. "Reserved_19,Reserved" "0,1" bitfld.long 0x04 16.--18. "PTXQ,Number of Packets in the Transmit Queue This field indicates the current number of packets in the Tx Queue" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x04 6.--15. 1. "Reserved_15_6,Reserved" bitfld.long 0x04 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status When high this bit indicates that the MTL Tx Status FIFO is full" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 4. "TXQSTS,MTL Tx Queue Not Empty Status When this bit is high it indicates that the MTL Tx Queue is not empty and some data is left for transmission" "0: INACTIVE,1: ACTIVE" bitfld.long 0x04 3. "TWCSTS,MTL Tx Queue Write Controller Status When high this bit indicates that the MTL Tx Queue Write Controller is active and it is transferring the data to the Tx Queue" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status This field indicates the state of the Tx Queue Read Controller" "0: IDLE,1:,2: WAIT,3: FLUSH" bitfld.long 0x04 0. "TXQPAUSED,Transmit Queue in Pause When this bit is high and the Rx flow control is enabled it indicates that the Tx Queue is in the Pause condition (in the full-duplex only mode) because of the following: - Reception of the PFC packet for the priorities.." "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BCD50++0x03 line.long 0x00 "MTL_TxQ1_ETS_Control,The Queue ETS Control register controls the enhanced transmission selection operation." hexmask.long 0x00 7.--31. 1. "Reserved_31_7,Reserved" bitfld.long 0x00 4.--6. "SLC,Slot Count If the credit-based shaper algorithm is enabled the software can program the number of slots (of duration programmed in DMA_CH1_Slot_Interval register) over which the average transmitted bits per slot provided in the MTL_TxQ1_ETS_Status.." "0: M_1_SLOT,1: M_2_SLOT,2: M_4_SLOT,3: M_8_SLOT,4: M_16_SLOT,5: RSVD,?..." newline bitfld.long 0x00 3. "CC,Credit Control When this bit is set the accumulated credit parameter in the credit-based shaper algorithm logic is not reset to zero when there is positive credit and no packet to transmit in Tx Queue 1" "0: DISABLE,1: ENABLE" bitfld.long 0x00 2. "AVALG,AV Algorithm When Queue 1 is programmed for AV this field configures the scheduling algorithm for this queue: This bit when set indicates credit based shaper algorithm (CBS) is selected for Queue 1 traffic" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 0.--1. "Reserved_1_0,Reserved" "0,1,2,3" rgroup.long ad:0xC00BCD54++0x03 line.long 0x00 "MTL_TxQ1_ETS_Status,The Queue 1 ETS Status register provides the average traffic transmitted in Queue 1." hexmask.long.byte 0x00 24.--31. 1. "Reserved_31_24,Reserved" hexmask.long.tbyte 0x00 0.--23. 1. "ABS,Average Bits per Slot This field contains the average transmitted bits per slot" group.long ad:0xC00BCD58++0x0F line.long 0x00 "MTL_TxQ1_Quantum_Weight,The Queue 1 idleSlopeCredit Weights register provides the average traffic transmitted in Queue 1." hexmask.long.word 0x00 21.--31. 1. "Reserved_31_21,Reserved" abitfld.long 0x00 0.--20. "ISCQW,idleSlopeCredit Weights - idleSlopeCredit When AV feature is enabled this field contains the idleSlopeCredit value required for the credit-based shaper algorithm for Queue 1" "0x000000000000000000001=0x000000000000000000001,0x000000000000000000003=0x000000000000000000003" line.long 0x04 "MTL_TxQ1_SendSlopeCredit,The sendSlopeCredit register contains the sendSlope credit value required for the credit-based shaper algorithm for the Queue." hexmask.long.tbyte 0x04 14.--31. 1. "Reserved_31_14,Reserved" hexmask.long.word 0x04 0.--13. 1. "SSC,sendSlopeCredit Value When AV operation is enabled this field contains the sendSlopeCredit value required for credit-based shaper algorithm for Tx Queue 1" line.long 0x08 "MTL_TxQ1_HiCredit,The hiCredit register contains the hiCredit value required for the credit-based shaper algorithm for the Queue." rbitfld.long 0x08 29.--31. "Reserved_31_29,Reserved" "0,1,2,3,4,5,6,7" hexmask.long 0x08 0.--28. 1. "HC,hiCredit Value When the AV feature is enabled this field contains the hiCredit value required for the credit-based shaper algorithm" line.long 0x0C "MTL_TxQ1_LoCredit,The loCredit register contains the loCredit value required for the credit-based shaper algorithm for the Queue." rbitfld.long 0x0C 29.--31. "Reserved_31_29,Reserved" "0,1,2,3,4,5,6,7" hexmask.long 0x0C 0.--28. 1. "LC,loCredit Value When AV operation is enabled this field contains the loCredit value required for the credit-based shaper algorithm" group.long ad:0xC00BCD6C++0x07 line.long 0x00 "MTL_Q1_Interrupt_Control_Status,This register contains the interrupt enable and status bits for the queue 1 interrupts." hexmask.long.byte 0x00 25.--31. 1. "Reserved_31_25,Reserved" bitfld.long 0x00 24. "RXOIE,Receive Queue Overflow Interrupt Enable When this bit is set the Receive Queue Overflow interrupt is enabled" "0: DISABLE,1: ENABLE" newline hexmask.long.byte 0x00 17.--23. 1. "Reserved_23_17,Reserved" bitfld.long 0x00 16. "RXOVFIS,Receive Queue Overflow Interrupt Status This bit indicates that the Receive Queue had an overflow while receiving the packet" "0: INACTIVE,1: ACTIVE" newline hexmask.long.byte 0x00 10.--15. 1. "Reserved_15_10,Reserved" bitfld.long 0x00 9. "ABPSIE,Average Bits Per Slot Interrupt Enable When this bit is set the MAC asserts the sbd_intr_o or mci_intr_o interrupt when the average bits per slot status is updated" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 8. "TXUIE,Transmit Queue Underflow Interrupt Enable When this bit is set the Transmit Queue Underflow interrupt is enabled" "0: DISABLE,1: ENABLE" hexmask.long.byte 0x00 2.--7. 1. "Reserved_7_2,Reserved" newline bitfld.long 0x00 1. "ABPSIS,Average Bits Per Slot Interrupt Status When set this bit indicates that the MAC has updated the ABS value" "0: INACTIVE,1: ACTIVE" bitfld.long 0x00 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status This bit indicates that the Transmit Queue had an underflow while transmitting the packet" "0: INACTIVE,1: ACTIVE" line.long 0x04 "MTL_RxQ1_Operation_Mode,The Queue 1 Receive Operation Mode register establishes the Receive queue operating modes and command." hexmask.long.byte 0x04 25.--31. 1. "Reserved_31_y,Reserved" bitfld.long 0x04 20.--24. "RQS,Receive Queue Size This field indicates the size of the allocated Receive queues in blocks of 256 bytesthe reset value is 0x0 and indicates size of 256 bytes" "0: 256 bytes,1: 512 bytes and so on,?..." newline rbitfld.long 0x04 18.--19. "Reserved_19_y,Reserved" "0,1,2,3" bitfld.long 0x04 14.--17. "RFD,Threshold for Deactivating Flow Control (in half-duplex and full-duplex modes) These bits control the threshold (fill-level of Rx queue) at which the flow control is de-asserted after activation" "0: Full minus 1 KB that is FULL 1 KB,1: Full minus 1.5 KB that is FULL 1.5 KB,2: Full minus 2 KB that is FULL 2 KB,3: Full minus 2.5 KB that is FULL 2.5 KB,?,?,?,?,?,?,?,?,?,?,14: Full minus 8 KB that is FULL 8 KB,15: Full minus 8.5 KB that is FULL 8.5 KB The" newline rbitfld.long 0x04 12.--13. "Reserved_13_y,Reserved" "0,1,2,3" bitfld.long 0x04 8.--11. "RFA,Threshold for Activating Flow Control (in half-duplex and full-duplex These bits control the threshold (fill-level of Rx queue) at which the flow control is activated: For more information on encoding for this field see RFD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 7. "EHFC,Enable Hardware Flow Control When this bit is set the flow control signal operation based on the fill-level of Rx queue is enabled" "0: DISABLE,1: ENABLE" bitfld.long 0x04 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets When this bit is set the MAC does not drop the packets which only have the errors detected by the Receive Checksum Offload engine" "0: ENABLE,1: DISABLE" newline bitfld.long 0x04 5. "RSF,Receive Queue Store and Forward When this bit is set the DWC_ether_qos reads a packet from the Rx queue only after the complete packet has been written to it ignoring the RTC field of this register" "0: DISABLE,1: ENABLE" bitfld.long 0x04 4. "FEP,Forward Error Packets When this bit is reset the Rx queue drops packets with error status (CRC error GMII_ER watchdog timeout or overflow)" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 3. "FUP,Forward Undersized Good Packets When this bit is set the Rx queue forwards the undersized good packets (packets with no error and length less than 64 bytes) including pad-bytes and CRC" "0: DISABLE,1: ENABLE" rbitfld.long 0x04 2. "Reserved_2,Reserved" "0,1" newline bitfld.long 0x04 0.--1. "RTC,Receive Queue Threshold Control These bits control the threshold level of the MTL Rx queue (in bytes): The received packet is transferred to the application or DMA when the packet size within the MTL Rx queue is larger than the threshold" "0: M_64BYTE,1: M_32BYTE,2: M_96BYTE,3: M_128BYTE" rgroup.long ad:0xC00BCD74++0x07 line.long 0x00 "MTL_RxQ1_Missed_Packet_Overflow_Cnt,The Queue 1 Missed Packet and Overflow Counter register contains the counter for packets missed because of Receive queue packet flush and packets discarded because of Receive queue overflow." bitfld.long 0x00 28.--31. "Reserved_31_28,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 27. "MISCNTOVF,Missed Packet Counter Overflow Bit When set this bit indicates that the Rx Queue Missed Packet Counter crossed the maximum limit" "0: INACTIVE,1: ACTIVE" newline hexmask.long.word 0x00 16.--26. 1. "MISPKTCNT,Missed Packet Counter This field indicates the number of packets missed by the DWC_ether_qos because the application asserted ari_pkt_flush_i[] for this queue" bitfld.long 0x00 12.--15. "Reserved_15_12,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 11. "OVFCNTOVF,Overflow Counter Overflow Bit When set this bit indicates that the Rx Queue Overflow Packet Counter field crossed the maximum limit" "0: INACTIVE,1: ACTIVE" hexmask.long.word 0x00 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter This field indicates the number of packets discarded by the DWC_ether_qos because of Receive queue overflow" line.long 0x04 "MTL_RxQ1_Debug,The Queue 1 Receive Debug register gives the debug status of various blocks related to the Receive queue." bitfld.long 0x04 30.--31. "Reserved_31_30,Reserved" "0,1,2,3" hexmask.long.word 0x04 16.--29. 1. "PRXQ,Number of Packets in Receive Queue This field indicates the current number of packets in the Rx Queue that is Max_Queue_Size/Min_Packet_Size" newline hexmask.long.word 0x04 6.--15. 1. "Reserved_15_6,Reserved" bitfld.long 0x04 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status This field gives the status of the fill-level of the Rx Queue" "0: EMPTY,1: BLW_THR,2: ABV_THR,3: FULL" newline bitfld.long 0x04 3. "Reserved_3,Reserved" "0,1" bitfld.long 0x04 1.--2. "RRCSTS,MTL Rx Queue Read Controller State This field gives the state of the Rx queue Read controller" "0: IDLE,1: READ_DATA,2: READ_STS,3: FLUSH" newline bitfld.long 0x04 0. "RWCSTS,MTL Rx Queue Write Controller Active Status When high this bit indicates that the MTL Rx queue Write controller is active and it is transferring a received packet to the Rx Queue" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BCD7C++0x03 line.long 0x00 "MTL_RxQ1_Control,The Queue Receive Control register controls the receive arbitration and passing of received packets to the application." hexmask.long 0x00 4.--31. 1. "Reserved_31_4,Reserved" bitfld.long 0x00 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration When this bit is set the DWC_ether_qos drives the packet data to the ARI interface such that the entire packet data of currently-selected queue is transmitted before switching to other queue" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0.--2. "RXQ_WEGT,Receive Queue Weight This field indicates the weight assigned to the Rx Queue 1" "0,1,2,3,4,5,6,7" tree.end tree "EQOS_MTL_Q2" group.long ad:0xC00BCD80++0x03 line.long 0x00 "MTL_TxQ2_Operation_Mode,The Queue 2 Transmit Operation Mode register establishes the Transmit queue operating modes and commands." hexmask.long.word 0x00 20.--31. 1. "Reserved_31_y,Reserved" bitfld.long 0x00 16.--19. "TQS,Transmit Queue Size This field indicates the size of the allocated Transmit queues in blocks of 256 bytes the reset value is 0x0 and indicates size of 256 bytes" "0: 256 bytes,1: 512 bytes and so on,?..." newline hexmask.long.word 0x00 7.--15. 1. "Reserved_15_7,Reserved" bitfld.long 0x00 4.--6. "TTC,Transmit Threshold Control These bits control the threshold level of the MTL Tx Queue" "0: M_32BYTES,1: M_64BYTES,2: M_96BYTES,3: M_128BYTES,4: M_192BYTES,5: M_256BYTES,6: M_384BYTES,7: M_512BYTES" newline bitfld.long 0x00 2.--3. "TXQEN,Transmit Queue Enable This field is used to enable/disable the transmit queue 2" "0: DISABLE,1: EN_IF_AV,2: ENABLE,3: RSVD2" bitfld.long 0x00 1. "TSF,Transmit Store and Forward When this bit is set the transmission starts when a full packet resides in the MTL Tx queue" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "FTQ,Flush Transmit Queue When this bit is set the Tx queue controller logic is reset to its default values" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BCD84++0x07 line.long 0x00 "MTL_TxQ2_Underflow,The Queue 2 Underflow Counter register contains the counter for packets aborted because of Transmit queue underflow and packets missed because of Receive queue packet flush" hexmask.long.tbyte 0x00 12.--31. 1. "Reserved_31_12,Reserved" bitfld.long 0x00 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter This bit is set every time the Tx queue Underflow Packet Counter field overflows that is it has crossed the maximum count" "0: INACTIVE,1: ACTIVE" newline hexmask.long.word 0x00 0.--10. 1. "UFFRMCNT,Underflow Packet Counter This field indicates the number of packets aborted by the controller because of Tx Queue Underflow" line.long 0x04 "MTL_TxQ2_Debug,The Queue 2 Transmit Debug register gives the debug status of various blocks related to the Transmit queue." hexmask.long.word 0x04 23.--31. 1. "Reserved_31_23,Reserved" bitfld.long 0x04 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue This field indicates the current number of status in the Tx Status FIFO of this queue" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 19. "Reserved_19,Reserved" "0,1" bitfld.long 0x04 16.--18. "PTXQ,Number of Packets in the Transmit Queue This field indicates the current number of packets in the Tx Queue" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x04 6.--15. 1. "Reserved_15_6,Reserved" bitfld.long 0x04 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status When high this bit indicates that the MTL Tx Status FIFO is full" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 4. "TXQSTS,MTL Tx Queue Not Empty Status When this bit is high it indicates that the MTL Tx Queue is not empty and some data is left for transmission" "0: INACTIVE,1: ACTIVE" bitfld.long 0x04 3. "TWCSTS,MTL Tx Queue Write Controller Status When high this bit indicates that the MTL Tx Queue Write Controller is active and it is transferring the data to the Tx Queue" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status This field indicates the state of the Tx Queue Read Controller" "0: IDLE,1:,2: WAIT,3: FLUSH" bitfld.long 0x04 0. "TXQPAUSED,Transmit Queue in Pause When this bit is high and the Rx flow control is enabled it indicates that the Tx Queue is in the Pause condition (in the full-duplex only mode) because of the following: - Reception of the PFC packet for the priorities.." "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BCD90++0x03 line.long 0x00 "MTL_TxQ2_ETS_Control,The Queue ETS Control register controls the enhanced transmission selection operation." hexmask.long 0x00 7.--31. 1. "Reserved_31_7,Reserved" bitfld.long 0x00 4.--6. "SLC,Slot Count If the credit-based shaper algorithm is enabled the software can program the number of slots (of duration programmed in DMA_CH2_Slot_Interval register) over which the average transmitted bits per slot provided in the MTL_TxQ2_ETS_Status.." "0: M_1_SLOT,1: M_2_SLOT,2: M_4_SLOT,3: M_8_SLOT,4: M_16_SLOT,5: RSVD,?..." newline bitfld.long 0x00 3. "CC,Credit Control When this bit is set the accumulated credit parameter in the credit-based shaper algorithm logic is not reset to zero when there is positive credit and no packet to transmit in Tx Queue 2" "0: DISABLE,1: ENABLE" bitfld.long 0x00 2. "AVALG,AV Algorithm When Queue 2 is programmed for AV this field configures the scheduling algorithm for this queue: This bit when set indicates credit based shaper algorithm (CBS) is selected for Queue 2 traffic" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 0.--1. "Reserved_1_0,Reserved" "0,1,2,3" rgroup.long ad:0xC00BCD94++0x03 line.long 0x00 "MTL_TxQ2_ETS_Status,The Queue 2 ETS Status register provides the average traffic transmitted in Queue 2." hexmask.long.byte 0x00 24.--31. 1. "Reserved_31_24,Reserved" hexmask.long.tbyte 0x00 0.--23. 1. "ABS,Average Bits per Slot This field contains the average transmitted bits per slot" group.long ad:0xC00BCD98++0x0F line.long 0x00 "MTL_TxQ2_Quantum_Weight,The Queue 2 idleSlopeCredit Weights register provides the average traffic transmitted in Queue 2." hexmask.long.word 0x00 21.--31. 1. "Reserved_31_21,Reserved" abitfld.long 0x00 0.--20. "ISCQW,idleSlopeCredit Weights - idleSlopeCredit When AV feature is enabled this field contains the idleSlopeCredit value required for the credit-based shaper algorithm for Queue 2" "0x000000000000000000001=0x000000000000000000001,0x000000000000000000003=0x000000000000000000003" line.long 0x04 "MTL_TxQ2_SendSlopeCredit,The sendSlopeCredit register contains the sendSlope credit value required for the credit-based shaper algorithm for the Queue." hexmask.long.tbyte 0x04 14.--31. 1. "Reserved_31_14,Reserved" hexmask.long.word 0x04 0.--13. 1. "SSC,sendSlopeCredit Value When AV operation is enabled this field contains the sendSlopeCredit value required for credit-based shaper algorithm for Tx Queue 2" line.long 0x08 "MTL_TxQ2_HiCredit,The hiCredit register contains the hiCredit value required for the credit-based shaper algorithm for the Queue." rbitfld.long 0x08 29.--31. "Reserved_31_29,Reserved" "0,1,2,3,4,5,6,7" hexmask.long 0x08 0.--28. 1. "HC,hiCredit Value When the AV feature is enabled this field contains the hiCredit value required for the credit-based shaper algorithm" line.long 0x0C "MTL_TxQ2_LoCredit,The loCredit register contains the loCredit value required for the credit-based shaper algorithm for the Queue." rbitfld.long 0x0C 29.--31. "Reserved_31_29,Reserved" "0,1,2,3,4,5,6,7" hexmask.long 0x0C 0.--28. 1. "LC,loCredit Value When AV operation is enabled this field contains the loCredit value required for the credit-based shaper algorithm" group.long ad:0xC00BCDAC++0x07 line.long 0x00 "MTL_Q2_Interrupt_Control_Status,This register contains the interrupt enable and status bits for the queue 2 interrupts." hexmask.long.byte 0x00 25.--31. 1. "Reserved_31_25,Reserved" bitfld.long 0x00 24. "RXOIE,Receive Queue Overflow Interrupt Enable When this bit is set the Receive Queue Overflow interrupt is enabled" "0: DISABLE,1: ENABLE" newline hexmask.long.byte 0x00 17.--23. 1. "Reserved_23_17,Reserved" bitfld.long 0x00 16. "RXOVFIS,Receive Queue Overflow Interrupt Status This bit indicates that the Receive Queue had an overflow while receiving the packet" "0: INACTIVE,1: ACTIVE" newline hexmask.long.byte 0x00 10.--15. 1. "Reserved_15_10,Reserved" bitfld.long 0x00 9. "ABPSIE,Average Bits Per Slot Interrupt Enable When this bit is set the MAC asserts the sbd_intr_o or mci_intr_o interrupt when the average bits per slot status is updated" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 8. "TXUIE,Transmit Queue Underflow Interrupt Enable When this bit is set the Transmit Queue Underflow interrupt is enabled" "0: DISABLE,1: ENABLE" hexmask.long.byte 0x00 2.--7. 1. "Reserved_7_2,Reserved" newline bitfld.long 0x00 1. "ABPSIS,Average Bits Per Slot Interrupt Status When set this bit indicates that the MAC has updated the ABS value" "0: INACTIVE,1: ACTIVE" bitfld.long 0x00 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status This bit indicates that the Transmit Queue had an underflow while transmitting the packet" "0: INACTIVE,1: ACTIVE" line.long 0x04 "MTL_RxQ2_Operation_Mode,The Queue 2 Receive Operation Mode register establishes the Receive queue operating modes and command." hexmask.long.byte 0x04 25.--31. 1. "Reserved_31_y,Reserved" bitfld.long 0x04 20.--24. "RQS,Receive Queue Size This field indicates the size of the allocated Receive queues in blocks of 256 bytesthe reset value is 0x0 and indicates size of 256 bytes" "0: 256 bytes,1: 512 bytes and so on,?..." newline rbitfld.long 0x04 18.--19. "Reserved_19_y,Reserved" "0,1,2,3" bitfld.long 0x04 14.--17. "RFD,Threshold for Deactivating Flow Control (in half-duplex and full-duplex modes) These bits control the threshold (fill-level of Rx queue) at which the flow control is de-asserted after activation" "0: Full minus 1 KB that is FULL 1 KB,1: Full minus 1.5 KB that is FULL 1.5 KB,2: Full minus 2 KB that is FULL 2 KB,3: Full minus 2.5 KB that is FULL 2.5 KB,?,?,?,?,?,?,?,?,?,?,14: Full minus 8 KB that is FULL 8 KB,15: Full minus 8.5 KB that is FULL 8.5 KB The" newline rbitfld.long 0x04 12.--13. "Reserved_13_y,Reserved" "0,1,2,3" bitfld.long 0x04 8.--11. "RFA,Threshold for Activating Flow Control (in half-duplex and full-duplex These bits control the threshold (fill-level of Rx queue) at which the flow control is activated: For more information on encoding for this field see RFD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 7. "EHFC,Enable Hardware Flow Control When this bit is set the flow control signal operation based on the fill-level of Rx queue is enabled" "0: DISABLE,1: ENABLE" bitfld.long 0x04 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets When this bit is set the MAC does not drop the packets which only have the errors detected by the Receive Checksum Offload engine" "0: ENABLE,1: DISABLE" newline bitfld.long 0x04 5. "RSF,Receive Queue Store and Forward When this bit is set the DWC_ether_qos reads a packet from the Rx queue only after the complete packet has been written to it ignoring the RTC field of this register" "0: DISABLE,1: ENABLE" bitfld.long 0x04 4. "FEP,Forward Error Packets When this bit is reset the Rx queue drops packets with error status (CRC error GMII_ER watchdog timeout or overflow)" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 3. "FUP,Forward Undersized Good Packets When this bit is set the Rx queue forwards the undersized good packets (packets with no error and length less than 64 bytes) including pad-bytes and CRC" "0: DISABLE,1: ENABLE" rbitfld.long 0x04 2. "Reserved_2,Reserved" "0,1" newline bitfld.long 0x04 0.--1. "RTC,Receive Queue Threshold Control These bits control the threshold level of the MTL Rx queue (in bytes): The received packet is transferred to the application or DMA when the packet size within the MTL Rx queue is larger than the threshold" "0: M_64BYTE,1: M_32BYTE,2: M_96BYTE,3: M_128BYTE" rgroup.long ad:0xC00BCDB4++0x07 line.long 0x00 "MTL_RxQ2_Missed_Packet_Overflow_Cnt,The Queue 2 Missed Packet and Overflow Counter register contains the counter for packets missed because of Receive queue packet flush and packets discarded because of Receive queue overflow." bitfld.long 0x00 28.--31. "Reserved_31_28,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 27. "MISCNTOVF,Missed Packet Counter Overflow Bit When set this bit indicates that the Rx Queue Missed Packet Counter crossed the maximum limit" "0: INACTIVE,1: ACTIVE" newline hexmask.long.word 0x00 16.--26. 1. "MISPKTCNT,Missed Packet Counter This field indicates the number of packets missed by the DWC_ether_qos because the application asserted ari_pkt_flush_i[] for this queue" bitfld.long 0x00 12.--15. "Reserved_15_12,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 11. "OVFCNTOVF,Overflow Counter Overflow Bit When set this bit indicates that the Rx Queue Overflow Packet Counter field crossed the maximum limit" "0: INACTIVE,1: ACTIVE" hexmask.long.word 0x00 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter This field indicates the number of packets discarded by the DWC_ether_qos because of Receive queue overflow" line.long 0x04 "MTL_RxQ2_Debug,The Queue 2 Receive Debug register gives the debug status of various blocks related to the Receive queue." bitfld.long 0x04 30.--31. "Reserved_31_30,Reserved" "0,1,2,3" hexmask.long.word 0x04 16.--29. 1. "PRXQ,Number of Packets in Receive Queue This field indicates the current number of packets in the Rx Queue that is Max_Queue_Size/Min_Packet_Size" newline hexmask.long.word 0x04 6.--15. 1. "Reserved_15_6,Reserved" bitfld.long 0x04 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status This field gives the status of the fill-level of the Rx Queue" "0: EMPTY,1: BLW_THR,2: ABV_THR,3: FULL" newline bitfld.long 0x04 3. "Reserved_3,Reserved" "0,1" bitfld.long 0x04 1.--2. "RRCSTS,MTL Rx Queue Read Controller State This field gives the state of the Rx queue Read controller" "0: IDLE,1: READ_DATA,2: READ_STS,3: FLUSH" newline bitfld.long 0x04 0. "RWCSTS,MTL Rx Queue Write Controller Active Status When high this bit indicates that the MTL Rx queue Write controller is active and it is transferring a received packet to the Rx Queue" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BCDBC++0x03 line.long 0x00 "MTL_RxQ2_Control,The Queue Receive Control register controls the receive arbitration and passing of received packets to the application." hexmask.long 0x00 4.--31. 1. "Reserved_31_4,Reserved" bitfld.long 0x00 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration When this bit is set the DWC_ether_qos drives the packet data to the ARI interface such that the entire packet data of currently-selected queue is transmitted before switching to other queue" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0.--2. "RXQ_WEGT,Receive Queue Weight This field indicates the weight assigned to the Rx Queue 2" "0,1,2,3,4,5,6,7" tree.end tree "EQOS_MTL_Q3" group.long ad:0xC00BCDC0++0x03 line.long 0x00 "MTL_TxQ3_Operation_Mode,The Queue 3 Transmit Operation Mode register establishes the Transmit queue operating modes and commands." hexmask.long.word 0x00 20.--31. 1. "Reserved_31_y,Reserved" bitfld.long 0x00 16.--19. "TQS,Transmit Queue Size This field indicates the size of the allocated Transmit queues in blocks of 256 bytes the reset value is 0x0 and indicates size of 256 bytes" "0: 256 bytes,1: 512 bytes and so on,?..." newline hexmask.long.word 0x00 7.--15. 1. "Reserved_15_7,Reserved" bitfld.long 0x00 4.--6. "TTC,Transmit Threshold Control These bits control the threshold level of the MTL Tx Queue" "0: M_32BYTES,1: M_64BYTES,2: M_96BYTES,3: M_128BYTES,4: M_192BYTES,5: M_256BYTES,6: M_384BYTES,7: M_512BYTES" newline bitfld.long 0x00 2.--3. "TXQEN,Transmit Queue Enable This field is used to enable/disable the transmit queue 3" "0: DISABLE,1: EN_IF_AV,2: ENABLE,3: RSVD2" bitfld.long 0x00 1. "TSF,Transmit Store and Forward When this bit is set the transmission starts when a full packet resides in the MTL Tx queue" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0. "FTQ,Flush Transmit Queue When this bit is set the Tx queue controller logic is reset to its default values" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BCDC4++0x07 line.long 0x00 "MTL_TxQ3_Underflow,The Queue 3 Underflow Counter register contains the counter for packets aborted because of Transmit queue underflow and packets missed because of Receive queue packet flush" hexmask.long.tbyte 0x00 12.--31. 1. "Reserved_31_12,Reserved" bitfld.long 0x00 11. "UFCNTOVF,Overflow Bit for Underflow Packet Counter This bit is set every time the Tx queue Underflow Packet Counter field overflows that is it has crossed the maximum count" "0: INACTIVE,1: ACTIVE" newline hexmask.long.word 0x00 0.--10. 1. "UFFRMCNT,Underflow Packet Counter This field indicates the number of packets aborted by the controller because of Tx Queue Underflow" line.long 0x04 "MTL_TxQ3_Debug,The Queue 3 Transmit Debug register gives the debug status of various blocks related to the Transmit queue." hexmask.long.word 0x04 23.--31. 1. "Reserved_31_23,Reserved" bitfld.long 0x04 20.--22. "STXSTSF,Number of Status Words in Tx Status FIFO of Queue This field indicates the current number of status in the Tx Status FIFO of this queue" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 19. "Reserved_19,Reserved" "0,1" bitfld.long 0x04 16.--18. "PTXQ,Number of Packets in the Transmit Queue This field indicates the current number of packets in the Tx Queue" "0,1,2,3,4,5,6,7" newline hexmask.long.word 0x04 6.--15. 1. "Reserved_15_6,Reserved" bitfld.long 0x04 5. "TXSTSFSTS,MTL Tx Status FIFO Full Status When high this bit indicates that the MTL Tx Status FIFO is full" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 4. "TXQSTS,MTL Tx Queue Not Empty Status When this bit is high it indicates that the MTL Tx Queue is not empty and some data is left for transmission" "0: INACTIVE,1: ACTIVE" bitfld.long 0x04 3. "TWCSTS,MTL Tx Queue Write Controller Status When high this bit indicates that the MTL Tx Queue Write Controller is active and it is transferring the data to the Tx Queue" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 1.--2. "TRCSTS,MTL Tx Queue Read Controller Status This field indicates the state of the Tx Queue Read Controller" "0: IDLE,1:,2: WAIT,3: FLUSH" bitfld.long 0x04 0. "TXQPAUSED,Transmit Queue in Pause When this bit is high and the Rx flow control is enabled it indicates that the Tx Queue is in the Pause condition (in the full-duplex only mode) because of the following: - Reception of the PFC packet for the priorities.." "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BCDD0++0x03 line.long 0x00 "MTL_TxQ3_ETS_Control,The Queue ETS Control register controls the enhanced transmission selection operation." hexmask.long 0x00 7.--31. 1. "Reserved_31_7,Reserved" bitfld.long 0x00 4.--6. "SLC,Slot Count If the credit-based shaper algorithm is enabled the software can program the number of slots (of duration programmed in DMA_CH3_Slot_Interval register) over which the average transmitted bits per slot provided in the MTL_TxQ3_ETS_Status.." "0: M_1_SLOT,1: M_2_SLOT,2: M_4_SLOT,3: M_8_SLOT,4: M_16_SLOT,5: RSVD,?..." newline bitfld.long 0x00 3. "CC,Credit Control When this bit is set the accumulated credit parameter in the credit-based shaper algorithm logic is not reset to zero when there is positive credit and no packet to transmit in Tx Queue 3" "0: DISABLE,1: ENABLE" bitfld.long 0x00 2. "AVALG,AV Algorithm When Queue 3 is programmed for AV this field configures the scheduling algorithm for this queue: This bit when set indicates credit based shaper algorithm (CBS) is selected for Queue 3 traffic" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 0.--1. "Reserved_1_0,Reserved" "0,1,2,3" rgroup.long ad:0xC00BCDD4++0x03 line.long 0x00 "MTL_TxQ3_ETS_Status,The Queue 3 ETS Status register provides the average traffic transmitted in Queue 3." hexmask.long.byte 0x00 24.--31. 1. "Reserved_31_24,Reserved" hexmask.long.tbyte 0x00 0.--23. 1. "ABS,Average Bits per Slot This field contains the average transmitted bits per slot" group.long ad:0xC00BCDD8++0x0F line.long 0x00 "MTL_TxQ3_Quantum_Weight,The Queue 3 idleSlopeCredit Weights register provides the average traffic transmitted in Queue 3." hexmask.long.word 0x00 21.--31. 1. "Reserved_31_21,Reserved" abitfld.long 0x00 0.--20. "ISCQW,idleSlopeCredit Weights - idleSlopeCredit When AV feature is enabled this field contains the idleSlopeCredit value required for the credit-based shaper algorithm for Queue 3" "0x000000000000000000001=0x000000000000000000001,0x000000000000000000003=0x000000000000000000003" line.long 0x04 "MTL_TxQ3_SendSlopeCredit,The sendSlopeCredit register contains the sendSlope credit value required for the credit-based shaper algorithm for the Queue." hexmask.long.tbyte 0x04 14.--31. 1. "Reserved_31_14,Reserved" hexmask.long.word 0x04 0.--13. 1. "SSC,sendSlopeCredit Value When AV operation is enabled this field contains the sendSlopeCredit value required for credit-based shaper algorithm for Tx Queue 3" line.long 0x08 "MTL_TxQ3_HiCredit,The hiCredit register contains the hiCredit value required for the credit-based shaper algorithm for the Queue." rbitfld.long 0x08 29.--31. "Reserved_31_29,Reserved" "0,1,2,3,4,5,6,7" hexmask.long 0x08 0.--28. 1. "HC,hiCredit Value When the AV feature is enabled this field contains the hiCredit value required for the credit-based shaper algorithm" line.long 0x0C "MTL_TxQ3_LoCredit,The loCredit register contains the loCredit value required for the credit-based shaper algorithm for the Queue." rbitfld.long 0x0C 29.--31. "Reserved_31_29,Reserved" "0,1,2,3,4,5,6,7" hexmask.long 0x0C 0.--28. 1. "LC,loCredit Value When AV operation is enabled this field contains the loCredit value required for the credit-based shaper algorithm" group.long ad:0xC00BCDEC++0x07 line.long 0x00 "MTL_Q3_Interrupt_Control_Status,This register contains the interrupt enable and status bits for the queue 3 interrupts." hexmask.long.byte 0x00 25.--31. 1. "Reserved_31_25,Reserved" bitfld.long 0x00 24. "RXOIE,Receive Queue Overflow Interrupt Enable When this bit is set the Receive Queue Overflow interrupt is enabled" "0: DISABLE,1: ENABLE" newline hexmask.long.byte 0x00 17.--23. 1. "Reserved_23_17,Reserved" bitfld.long 0x00 16. "RXOVFIS,Receive Queue Overflow Interrupt Status This bit indicates that the Receive Queue had an overflow while receiving the packet" "0: INACTIVE,1: ACTIVE" newline hexmask.long.byte 0x00 10.--15. 1. "Reserved_15_10,Reserved" bitfld.long 0x00 9. "ABPSIE,Average Bits Per Slot Interrupt Enable When this bit is set the MAC asserts the sbd_intr_o or mci_intr_o interrupt when the average bits per slot status is updated" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 8. "TXUIE,Transmit Queue Underflow Interrupt Enable When this bit is set the Transmit Queue Underflow interrupt is enabled" "0: DISABLE,1: ENABLE" hexmask.long.byte 0x00 2.--7. 1. "Reserved_7_2,Reserved" newline bitfld.long 0x00 1. "ABPSIS,Average Bits Per Slot Interrupt Status When set this bit indicates that the MAC has updated the ABS value" "0: INACTIVE,1: ACTIVE" bitfld.long 0x00 0. "TXUNFIS,Transmit Queue Underflow Interrupt Status This bit indicates that the Transmit Queue had an underflow while transmitting the packet" "0: INACTIVE,1: ACTIVE" line.long 0x04 "MTL_RxQ3_Operation_Mode,The Queue 3 Receive Operation Mode register establishes the Receive queue operating modes and command." hexmask.long.byte 0x04 25.--31. 1. "Reserved_31_y,Reserved" bitfld.long 0x04 20.--24. "RQS,Receive Queue Size This field indicates the size of the allocated Receive queues in blocks of 256 bytesthe reset value is 0x0 and indicates size of 256 bytes" "0: 256 bytes,1: 512 bytes and so on,?..." newline rbitfld.long 0x04 18.--19. "Reserved_19_y,Reserved" "0,1,2,3" bitfld.long 0x04 14.--17. "RFD,Threshold for Deactivating Flow Control (in half-duplex and full-duplex modes) These bits control the threshold (fill-level of Rx queue) at which the flow control is de-asserted after activation" "0: Full minus 1 KB that is FULL 1 KB,1: Full minus 1.5 KB that is FULL 1.5 KB,2: Full minus 2 KB that is FULL 2 KB,3: Full minus 2.5 KB that is FULL 2.5 KB,?,?,?,?,?,?,?,?,?,?,14: Full minus 8 KB that is FULL 8 KB,15: Full minus 8.5 KB that is FULL 8.5 KB The" newline rbitfld.long 0x04 12.--13. "Reserved_13_y,Reserved" "0,1,2,3" bitfld.long 0x04 8.--11. "RFA,Threshold for Activating Flow Control (in half-duplex and full-duplex These bits control the threshold (fill-level of Rx queue) at which the flow control is activated: For more information on encoding for this field see RFD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 7. "EHFC,Enable Hardware Flow Control When this bit is set the flow control signal operation based on the fill-level of Rx queue is enabled" "0: DISABLE,1: ENABLE" bitfld.long 0x04 6. "DIS_TCP_EF,Disable Dropping of TCP/IP Checksum Error Packets When this bit is set the MAC does not drop the packets which only have the errors detected by the Receive Checksum Offload engine" "0: ENABLE,1: DISABLE" newline bitfld.long 0x04 5. "RSF,Receive Queue Store and Forward When this bit is set the DWC_ether_qos reads a packet from the Rx queue only after the complete packet has been written to it ignoring the RTC field of this register" "0: DISABLE,1: ENABLE" bitfld.long 0x04 4. "FEP,Forward Error Packets When this bit is reset the Rx queue drops packets with error status (CRC error GMII_ER watchdog timeout or overflow)" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 3. "FUP,Forward Undersized Good Packets When this bit is set the Rx queue forwards the undersized good packets (packets with no error and length less than 64 bytes) including pad-bytes and CRC" "0: DISABLE,1: ENABLE" rbitfld.long 0x04 2. "Reserved_2,Reserved" "0,1" newline bitfld.long 0x04 0.--1. "RTC,Receive Queue Threshold Control These bits control the threshold level of the MTL Rx queue (in bytes): The received packet is transferred to the application or DMA when the packet size within the MTL Rx queue is larger than the threshold" "0: M_64BYTE,1: M_32BYTE,2: M_96BYTE,3: M_128BYTE" rgroup.long ad:0xC00BCDF4++0x07 line.long 0x00 "MTL_RxQ3_Missed_Packet_Overflow_Cnt,The Queue 3 Missed Packet and Overflow Counter register contains the counter for packets missed because of Receive queue packet flush and packets discarded because of Receive queue overflow." bitfld.long 0x00 28.--31. "Reserved_31_28,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 27. "MISCNTOVF,Missed Packet Counter Overflow Bit When set this bit indicates that the Rx Queue Missed Packet Counter crossed the maximum limit" "0: INACTIVE,1: ACTIVE" newline hexmask.long.word 0x00 16.--26. 1. "MISPKTCNT,Missed Packet Counter This field indicates the number of packets missed by the DWC_ether_qos because the application asserted ari_pkt_flush_i[] for this queue" bitfld.long 0x00 12.--15. "Reserved_15_12,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 11. "OVFCNTOVF,Overflow Counter Overflow Bit When set this bit indicates that the Rx Queue Overflow Packet Counter field crossed the maximum limit" "0: INACTIVE,1: ACTIVE" hexmask.long.word 0x00 0.--10. 1. "OVFPKTCNT,Overflow Packet Counter This field indicates the number of packets discarded by the DWC_ether_qos because of Receive queue overflow" line.long 0x04 "MTL_RxQ3_Debug,The Queue 3 Receive Debug register gives the debug status of various blocks related to the Receive queue." bitfld.long 0x04 30.--31. "Reserved_31_30,Reserved" "0,1,2,3" hexmask.long.word 0x04 16.--29. 1. "PRXQ,Number of Packets in Receive Queue This field indicates the current number of packets in the Rx Queue that is Max_Queue_Size/Min_Packet_Size" newline hexmask.long.word 0x04 6.--15. 1. "Reserved_15_6,Reserved" bitfld.long 0x04 4.--5. "RXQSTS,MTL Rx Queue Fill-Level Status This field gives the status of the fill-level of the Rx Queue" "0: EMPTY,1: BLW_THR,2: ABV_THR,3: FULL" newline bitfld.long 0x04 3. "Reserved_3,Reserved" "0,1" bitfld.long 0x04 1.--2. "RRCSTS,MTL Rx Queue Read Controller State This field gives the state of the Rx queue Read controller" "0: IDLE,1: READ_DATA,2: READ_STS,3: FLUSH" newline bitfld.long 0x04 0. "RWCSTS,MTL Rx Queue Write Controller Active Status When high this bit indicates that the MTL Rx queue Write controller is active and it is transferring a received packet to the Rx Queue" "0: INACTIVE,1: ACTIVE" group.long ad:0xC00BCDFC++0x03 line.long 0x00 "MTL_RxQ3_Control,The Queue Receive Control register controls the receive arbitration and passing of received packets to the application." hexmask.long 0x00 4.--31. 1. "Reserved_31_4,Reserved" bitfld.long 0x00 3. "RXQ_FRM_ARBIT,Receive Queue Packet Arbitration When this bit is set the DWC_ether_qos drives the packet data to the ARI interface such that the entire packet data of currently-selected queue is transmitted before switching to other queue" "0: DISABLE,1: ENABLE" newline bitfld.long 0x00 0.--2. "RXQ_WEGT,Receive Queue Weight This field indicates the weight assigned to the Rx Queue 3" "0,1,2,3,4,5,6,7" tree.end tree "EQOS_MTL_Q4" group.long ad:0xC00BCE00++0x03 line.long 0x00 "EQOS_MTL_Q4" button "DATA" "d ad:0xC00BCE00--0xC00BCE3F /long" tree.end tree "EQOS_MTL_Q5" group.long ad:0xC00BCE40++0x03 line.long 0x00 "EQOS_MTL_Q5" button "DATA" "d ad:0xC00BCE40--0xC00BCE7F /long" tree.end tree "EQOS_MTL_Q6" group.long ad:0xC00BCE80++0x03 line.long 0x00 "EQOS_MTL_Q6" button "DATA" "d ad:0xC00BCE80--0xC00BCEBF /long" tree.end tree "EQOS_MTL_Q7" group.long ad:0xC00BCEC0++0x03 line.long 0x00 "EQOS_MTL_Q7" button "DATA" "d ad:0xC00BCEC0--0xC00BCEFF /long" tree.end tree "EQOS_DMA" group.long ad:0xC00BD000++0x07 line.long 0x00 "DMA_Mode,The Bus Mode register establishes the bus operating modes for the DMA." hexmask.long.byte 0x00 24.--31. 1. "Reserved_31_24,Reserved" rbitfld.long 0x00 22.--23. "Reserved_RNDF,Reserved" "0,1,2,3" rbitfld.long 0x00 20.--21. "Reserved_TNDF,Reserved" "0,1,2,3" rbitfld.long 0x00 19. "Reserved_DCHE,Reserved" "0,1" newline rbitfld.long 0x00 18. "Reserved_18,Reserved" "0,1" bitfld.long 0x00 16.--17. "INTM,Interrupt Mode This field defines the interrupt mode of DWC_ether_qos" "0: MODE0,1: MODE1,2: MODE2,3: RSVD" rbitfld.long 0x00 15. "Reserved_15,Reserved" "0,1" rbitfld.long 0x00 12.--14. "Reserved_PR,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 11. "TXPR,Transmit Priority" "0: DISABLE,1: ENABLE" rbitfld.long 0x00 10. "Reserved_SCSW,Reserved" "0,1" rbitfld.long 0x00 9. "Reserved_ARBC,Reserved" "0,1" bitfld.long 0x00 8. "DSPW,Descriptor Posted Write" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 5.--7. "Reserved_7_5,Reserved" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2.--4. "TAA,Transmit Arbitration Algorithm This field is used to select the arbitration policy for the Transmit side when you select multiple Tx DMAs" "0: FP,1: WSP,2: WRR,3: RSVD,?..." rbitfld.long 0x00 1. "Reserved_DA,Reserved" "0,1" bitfld.long 0x00 0. "SWR,Software Reset" "0: DISABLE,1: ENABLE" line.long 0x04 "DMA_SysBus_Mode,System Bus Mode This register controls the behavior of the AXI master. It mainly controls burst splitting and the number of outstanding requests." bitfld.long 0x04 31. "EN_LPI,Enable Low Power Interface (LPI)" "0: DISABLE,1: ENABLE" bitfld.long 0x04 30. "LPI_XIT_PKT,Unlock on Magic Packet or Remote Wake-Up Packet" "0: DISABLE,1: ENABLE" rbitfld.long 0x04 27.--29. "Reserved_29_y,Reserved" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--26. "WR_OSR_LMT,AXI Maximum Write Outstanding Request Limit This value limits the maximum outstanding request on the AXI write interface" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x04 19.--23. "Reserved_23_y,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 16.--18. "RD_OSR_LMT,AXI Maximum Read Outstanding Request Limit This value limits the maximum outstanding request on the AXI read interface" "0,1,2,3,4,5,6,7" rbitfld.long 0x04 15. "Reserved_RB,Reserved" "0,1" rbitfld.long 0x04 14. "Reserved_MB,Reserved" "0,1" newline bitfld.long 0x04 13. "ONEKBBE,1 KB Boundary Crossing Enable for the EQOS-AXI Master" "0: DISABLE,1: ENABLE" bitfld.long 0x04 12. "AAL,Address-Aligned Beats" "0: DISABLE,1: ENABLE" rbitfld.long 0x04 11. "Reserved_EAME,Reserved" "0,1" bitfld.long 0x04 10. "AALE,Automatic AXI LPI enable" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x04 8.--9. "Reserved_9_8,Reserved" "0,1,2,3" bitfld.long 0x04 7. "BLEN256,AXI Burst Length 256 When set to" "0: DISABLE,1: ENABLE" bitfld.long 0x04 6. "BLEN128,AXI Burst Length 128 When set to" "0: DISABLE,1: ENABLE" bitfld.long 0x04 5. "BLEN64,AXI Burst Length 64 When set to" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 4. "BLEN32,AXI Burst Length 32 When set to" "0: DISABLE,1: ENABLE" bitfld.long 0x04 3. "BLEN16,AXI Burst Length" "0: DISABLE,1: ENABLE" bitfld.long 0x04 2. "BLEN8,AXI Burst Length" "0: DISABLE,1: ENABLE" bitfld.long 0x04 1. "BLEN4,AXI Burst Length" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 0. "FB,Fixed Burst Length" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BD008++0x0B line.long 0x00 "DMA_Interrupt_Status,The application reads this Interrupt Status register during interrupt service routine or polling to determine the interrupt status of DMA channels MTL queues and the MAC." hexmask.long.word 0x00 18.--31. 1. "Reserved_31_18,Reserved" bitfld.long 0x00 17. "MACIS,MAC Interrupt Status Indicates an interrupt event in the MAC" "0: INACTIVE,1: ACTIVE" bitfld.long 0x00 16. "MTLIS,MTL Interrupt Status Indicates an interrupt event in the MTL" "0: INACTIVE,1: ACTIVE" hexmask.long.byte 0x00 8.--15. 1. "Reserved_15_8,Reserved" newline bitfld.long 0x00 7. "Reserved_DC7IS,Reserved" "0,1" bitfld.long 0x00 6. "Reserved_DC6IS,Reserved" "0,1" bitfld.long 0x00 5. "Reserved_DC5IS,Reserved" "0,1" bitfld.long 0x00 4. "Reserved_DC4IS,Reserved" "0,1" newline bitfld.long 0x00 3. "DC3IS,DMA Channel 3 Interrupt Status This bit indicates an interrupt event in DMA Channel 3" "0: INACTIVE,1: ACTIVE" bitfld.long 0x00 2. "DC2IS,DMA Channel 2 Interrupt Status This bit indicates an interrupt event in DMA Channel 2" "0: INACTIVE,1: ACTIVE" bitfld.long 0x00 1. "DC1IS,DMA Channel 1 Interrupt Status This bit indicates an interrupt event in DMA Channel 1" "0: INACTIVE,1: ACTIVE" bitfld.long 0x00 0. "DC0IS,DMA Channel 0 Interrupt Status This bit indicates an interrupt event in DMA Channel 0" "0: INACTIVE,1: ACTIVE" line.long 0x04 "DMA_Debug_Status0,The Debug Status 0 register gives the Receive and Transmit process status for DMA Channel 0-Channel 2 for debugging purpose." bitfld.long 0x04 28.--31. "TPS2,DMA Channel 2 Transmit Process State This field indicates the Tx DMA FSM state for Channel 2" "0: STOP,1: RUN_FTTD,2: RUN_WS,3: RUN_RDS,4: TSTMP_WS,5: RSVD,6: SUSPND,7: RUN_CTD,?..." bitfld.long 0x04 24.--27. "RPS2,DMA Channel 2 Receive Process State This field indicates the Rx DMA FSM state for Channel 2" "0: STOP,1: RUN_FRTD,2: RSVD,3: RUN_WRP,4: SUSPND,5: RUN_CRD,6: TSTMP,7: RUN_TRP,?..." bitfld.long 0x04 20.--23. "TPS1,DMA Channel 1 Transmit Process State This field indicates the Tx DMA FSM state for Channel 1" "0: STOP,1: RUN_FTTD,2: RUN_WS,3: RUN_RDS,4: TSTMP_WS,5: RSVD,6: SUSPND,7: RUN_CTD,?..." bitfld.long 0x04 16.--19. "RPS1,DMA Channel 1 Receive Process State This field indicates the Rx DMA FSM state for Channel 1" "0: STOP,1: RUN_FRTD,2: RSVD,3: RUN_WRP,4: SUSPND,5: RUN_CRD,6: TSTMP,7: RUN_TRP,?..." newline bitfld.long 0x04 12.--15. "TPS0,DMA Channel 0 Transmit Process State This field indicates the Tx DMA FSM state for Channel 0" "0: STOP,1: RUN_FTTD,2: RUN_WS,3: RUN_RDS,4: TSTMP_WS,5: RSVD,6: SUSPND,7: RUN_CTD,?..." bitfld.long 0x04 8.--11. "RPS0,DMA Channel 0 Receive Process State This field indicates the Rx DMA FSM state for Channel 0" "0: STOP,1: RUN_FRTD,2: RSVD,3: RUN_WRP,4: SUSPND,5: RUN_CRD,6: TSTMP,7: RUN_TRP,?..." hexmask.long.byte 0x04 2.--7. 1. "Reserved_7_2,Reserved" bitfld.long 0x04 1. "AXRHSTS,AXI Master Read Channel Status" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x04 0. "AXWHSTS,AXI Master Write Channel When high this bit indicates that the write channel of the AXI master is active and it is transferring data" "0: INACTIVE,1: ACTIVE" line.long 0x08 "DMA_Debug_Status1,The Debug Status1 register gives the Receive and Transmit process status for DMA Channel 3-Channel 6." bitfld.long 0x08 28.--31. "Reserved_TPS6,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 24.--27. "Reserved_RPS6,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 20.--23. "Reserved_TPS5,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 16.--19. "Reserved_RPS5,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x08 12.--15. "Reserved_TPS4,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 8.--11. "Reserved_RPS4,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x08 4.--7. "TPS3,DMA Channel 3 Transmit Process State This field indicates the Tx DMA FSM state for Channel 3" "0: STOP,1: RUN_FTTD,2: RUN_WS,3: RUN_RDS,4: TSTMP_WS,5: RSVD,6: SUSPND,7: RUN_CTD,?..." bitfld.long 0x08 0.--3. "RPS3,DMA Channel 3 Receive Process State This field indicates the Rx DMA FSM state for Channel 3" "0: STOP,1: RUN_FRTD,2: RSVD,3: RUN_WRP,4: SUSPND,5: RUN_CRD,6: TSTMP,7: RUN_TRP,?..." group.long ad:0xC00BD020++0x0B line.long 0x00 "AXI4_Tx_AR_ACE_Control,This register is used to control the AXI4 Cache Coherency Signals for read transactions by all the Transmit DMA channels. The following signals of the AXI4 interface are driven with different values as programmed for corresponding.." hexmask.long.word 0x00 22.--31. 1. "Reserved_31_22,Reserved" bitfld.long 0x00 20.--21. "THD,Transmit DMA First Packet Buffer This field is used to drive ardomain_m_o[1:0] signal when Transmit DMA is accessing First Buffer of the Packet (First valid buffer with FD being set in the TDES3 of the Descriptor)" "0,1,2,3" bitfld.long 0x00 16.--19. "THC,Transmit DMA First Packet Buffer This field is used to drive arcache_m_o[3:0] signal when Transmit DMA is accessing First Buffer of the Packet (First valid buffer with FD being set in the TDES3 of the Descriptor)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 14.--15. "Reserved_15_14,Reserved" "0,1,2,3" newline bitfld.long 0x00 12.--13. "TED,Transmit DMA Extended Packet Buffer This field is used to drive ardomain_m_o[1:0] signal when Transmit DMA is accessing the extended buffers (when packet is distributed across multiple buffers)" "0,1,2,3" bitfld.long 0x00 8.--11. "TEC,Transmit DMA Extended Packet Buffer This field is used to drive arcache_m_o[3:0] signal when Transmit DMA is accessing the extended buffers (when packet is distributed across multiple buffers)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x00 6.--7. "Reserved_7_6,Reserved" "0,1,2,3" bitfld.long 0x00 4.--5. "TDRD,Transmit DMA Read Descriptor Domain Control This field is used to drive ardomain_m_o[1:0] signal when Transmit DMA engines access the Descriptor" "0,1,2,3" newline bitfld.long 0x00 0.--3. "TDRC,Transmit DMA Read Descriptor Cache Control This field is used to drive arcache_m_o[3:0] signal when Transmit DMA engines access the Descriptor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXI4_Rx_AW_ACE_Control,This register is used to control the AXI4 Cache Coherency Signals for write transactions by all the Receive DMA channels. The following signals of the AXI4 interface are driven with different values as programmed for corresponding.." rbitfld.long 0x04 30.--31. "Reserved_31_30,Reserved" "0,1,2,3" bitfld.long 0x04 28.--29. "RDD,Receive DMA Buffer Domain Control This field is used to drive the awdomain_m_o[1:0] signal when Receive DMA is accessing the Buffer when Header and payload are NOT separated" "0,1,2,3" bitfld.long 0x04 24.--27. "RDC,Receive DMA Buffer Cache Control This field is used to drive awcache_m_o[3:0] signal when Receive DMA is accessing the Buffer when Header and payload are NOT separated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x04 22.--23. "Reserved_23_22,Reserved" "0,1,2,3" newline bitfld.long 0x04 20.--21. "RHD,Receive DMA Header Domain Control This field is used to drive awdomain_m_o[1:0] and signal when Receive DMA is accessing the header Buffer when Header and payload are separated" "0,1,2,3" bitfld.long 0x04 16.--19. "RHC,Receive DMA Header Cache Control This field is used to drive awcache_m_o[3:0] and signal when Receive DMA is accessing the header Buffer when Header and payload are separated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x04 14.--15. "Reserved_15_14,Reserved" "0,1,2,3" bitfld.long 0x04 12.--13. "RPD,Receive DMA Payload Domain Control This field is used to drive awdomain_m_o[1:0] signal when Receive DMA is accessing the Payload Buffer when Header and payload are separated" "0,1,2,3" newline bitfld.long 0x04 8.--11. "RPC,Receive DMA Payload Cache Control This field is used to drive awcache_m_o[3:0] signal when Receive DMA is accessing the Payload Buffer when Header and payload are separated" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x04 6.--7. "Reserved_7_6,Reserved" "0,1,2,3" bitfld.long 0x04 4.--5. "RDWD,Receive DMA Write Descriptor Domain Control This field is used to drive awdomain_m_o[1:0] signal when Receive DMA accesses the Descriptor" "0,1,2,3" bitfld.long 0x04 0.--3. "RDWC,Receive DMA Write Descriptor Cache Control This field is used to drive awcache_m_o[3:0] signal when Receive DMA accesses the Descriptor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "AXI4_TxRx_AWAR_ACE_Control,This register is used to control the AXI4 Cache Coherency Signals for Descriptor write transactions by all the TxDMA channels and Descriptor read transactions by all the RxDMA channels. It also controls the values to be driven.." hexmask.long.word 0x08 23.--31. 1. "Reserved_31_23,Reserved" bitfld.long 0x08 20.--22. "WRP,DMA Write Protection control This field is used to drive awprot_m_o[2:0] signal on the AXI Write Channel" "0,1,2,3,4,5,6,7" rbitfld.long 0x08 19. "Reserved_19,Reserved" "0,1" bitfld.long 0x08 16.--18. "RDP,DMA Read Protection control This field is used to drive arprot_m_o[2:0] signal during all read requests" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x08 14.--15. "Reserved_15_14,Reserved" "0,1,2,3" bitfld.long 0x08 12.--13. "RDRD,Receive DMA Read Descriptor Domain control This field is used to drive ardomain_m_o[1:0] signal when Receive DMA engines read the Descriptor" "0,1,2,3" bitfld.long 0x08 8.--11. "RDRC,Receive DMA Read Descriptor Cache control This field is used to drive arcache_m_o[3:0] signal when Receive DMA engines read the Descriptor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x08 6.--7. "Reserved_7_6,Reserved" "0,1,2,3" newline bitfld.long 0x08 4.--5. "TDWD,Transmit DMA Write Descriptor Domain control This field is used to drive awdomain_m_o[1:0] signal when Transmit DMA write to the Descriptor" "0,1,2,3" bitfld.long 0x08 0.--3. "TDWC,Transmit DMA Write Descriptor Cache control This field is used to drive awcache_m_o[3:0] signal when Transmit DMA writes to the Descriptor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00BD040++0x03 line.long 0x00 "AXI_LPI_Entry_Interval,This register is used to control the AXI LPI entry interval." hexmask.long 0x00 4.--31. 1. "Reserved_31_4,Reserved" bitfld.long 0x00 0.--3. "LPIEI,LPI Entry Interval Contains the number of system clock cycles multiplied by 64 to wait for an activity in the DWC_ether_qos to enter into the AXI low power state 0 indicates 64 clock cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0xC00BD050++0x0F line.long 0x00 "DMA_TBS_CTRL0,This register is used to control the TBS attributes." hexmask.long.tbyte 0x00 8.--31. 1. "FTOS,Fetch Time Offset The value in units of 256 ns that has to be deducted from the Launch time to compute the Fetch Time" rbitfld.long 0x00 7. "Reserved_7,Reserved" "0,1" bitfld.long 0x00 4.--6. "FGOS,Fetch GSN Offset The number GSN slots that must be deducted from the Launch GSN to compute the Fetch GSN" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 1.--3. "Reserved_3_1,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 0. "FTOV,Fetch Time Offset Valid When set indicates the FTOS field is valid" "0: INVALID,1: VALID" line.long 0x04 "DMA_TBS_CTRL1,This register is used to control the TBS attributes." hexmask.long.tbyte 0x04 8.--31. 1. "FTOS,Fetch Time Offset The value in units of 256 nanoseconds that has to be deducted from the Launch time to compute the Fetch Time" rbitfld.long 0x04 7. "Reserved_7,Reserved" "0,1" bitfld.long 0x04 4.--6. "FGOS,Fetch GSN Offset The number GSN slots that must be deducted from the Launch GSN to compute the Fetch GSN" "0,1,2,3,4,5,6,7" rbitfld.long 0x04 1.--3. "Reserved_3_1,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. "FTOV,Fetch Time Offset Valid When set indicates the FTOS field is valid" "0: INVALID,1: VALID" line.long 0x08 "DMA_TBS_CTRL2,This register is used to control the TBS attributes." hexmask.long.tbyte 0x08 8.--31. 1. "FTOS,Fetch Time Offset The value in units of 256 nanoseconds that has to be deducted from the Launch time to compute the Fetch Time" rbitfld.long 0x08 7. "Reserved_7,Reserved" "0,1" bitfld.long 0x08 4.--6. "FGOS,Fetch GSN Offset The number GSN slots that must be deducted from the Launch GSN to compute the Fetch GSN" "0,1,2,3,4,5,6,7" rbitfld.long 0x08 1.--3. "Reserved_3_1,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "FTOV,Fetch Time Offset Valid When set indicates the FTOS field is valid" "0: INVALID,1: VALID" line.long 0x0C "DMA_TBS_CTRL3,This register is used to control the TBS attributes." hexmask.long.tbyte 0x0C 8.--31. 1. "FTOS,Fetch Time Offset The value in units of 256 nanoseconds that has to be deducted from the Launch time to compute the Fetch Time" rbitfld.long 0x0C 7. "Reserved_7,Reserved" "0,1" bitfld.long 0x0C 4.--6. "FGOS,Fetch GSN Offset The number GSN slots that must be deducted from the Launch GSN to compute the Fetch GSN" "0,1,2,3,4,5,6,7" rbitfld.long 0x0C 1.--3. "Reserved_3_1,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 0. "FTOV,Fetch Time Offset Valid When set indicates the FTOS field is valid" "0: INVALID,1: VALID" rgroup.long ad:0xC00BD080++0x03 line.long 0x00 "DMA_Safety_Interrupt_Status,This register indicates summary (whether error occurred in DMA/MTL/MAC and correctable/uncorrectable) of the Automotive Safety related error interrupts." bitfld.long 0x00 31. "MCSIS,MAC Safety Uncorrectable Interrupt Status Indicates a uncorrectable Safety related Interrupt is set in the MAC module" "0: INACTIVE,1: ACTIVE" bitfld.long 0x00 30. "Reserved_30,Reserved" "0,1" bitfld.long 0x00 29. "MSUIS,MTL Safety Uncorrectable error Interrupt Status This bit indicates an uncorrectable error interrupt event in MTL" "0: INACTIVE,1: ACTIVE" bitfld.long 0x00 28. "MSCIS,MTL Safety Correctable error Interrupt Status This bit indicates a correctable error interrupt event in MTL" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x00 2.--27. 1. "Reserved_27_2,Reserved" bitfld.long 0x00 1. "DEUIS,DMA ECC Uncorrectable error Interrupt Status This bit indicates an interrupt event in the DMA ECC safety feature" "0: INACTIVE,1: ACTIVE" bitfld.long 0x00 0. "DECIS,DMA ECC Correctable error Interrupt Status This bit indicates an interrupt event in the DMA ECC safety feature" "0: INACTIVE,1: ACTIVE" tree.end tree "EQOS_DMA_CH0" group.long ad:0xC00BD100++0x0B line.long 0x00 "DMA_CH0_Control,The DMA Channel0 Control register specifies the MSS value for segmentation length to skip between two descriptors and also the features such as header splitting and 8xPBL mode." hexmask.long.byte 0x00 25.--31. 1. "Reserved_31_25,Reserved" newline bitfld.long 0x00 24. "SPH,Split Headers" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 21.--23. "Reserved_23_21,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "DSL,Descriptor Skip Length This bit specifies the Dword (64-bit) number of locations to skip between two descriptors" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x00 17. "Reserved_17,Reserved" "0,1" newline bitfld.long 0x00 16. "PBLx8,8xPBL mode" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 14.--15. "Reserved_15_14,Reserved" "0,1,2,3" newline hexmask.long.word 0x00 0.--13. 1. "Reserved_MSS,Reserved" line.long 0x04 "DMA_CH0_Tx_Control,The DMA Channel0 Transmit Control register controls the Tx features such as PBL TCP segmentation and Tx Channel weights." rbitfld.long 0x04 31. "Reserved_31,Reserved" "0,1" newline bitfld.long 0x04 29.--30. "TFSEL,TBS Fetch Select Select bits for one of the four DMA_TBS_CTRL register fields (FTOS FGSN FTOV) for the channel Values" "0: DMA_TBS_CTRL0,1: DMA_TBS_CTRL1,2: DMA_TBS_CTRL2,3: DMA_TBS_CTRL3 (Reserved if" newline bitfld.long 0x04 28. "EDSE,Enhanced Descriptor Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 24.--27. "TQOS,Transmit QOS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x04 23. "Reserved_23,Reserved" "0,1" newline rbitfld.long 0x04 22. "Reserved_ETIC,Reserved" "0,1" newline hexmask.long.byte 0x04 16.--21. 1. "TxPBL,Transmit Programmable Burst Length These bits indicate the maximum number of beats to be transferred in one DMA block data transfer" newline bitfld.long 0x04 15. "IPBL,Ignore PBL Requirement" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x04 13.--14. "Reserved_TSE_MODE,Reserved" "0,1,2,3" newline rbitfld.long 0x04 12. "Reserved_TSE,Reserved" "0,1" newline hexmask.long.byte 0x04 5.--11. 1. "Reserved_11_5,Reserved" newline bitfld.long 0x04 4. "OSF,Operate on Second Packet" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 1.--3. "TCW,Transmit Channel Weight This field indicates the weight assigned to the corresponding Tx channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. "ST,Start or Stop Transmission Command" "0: STOP,1: START" line.long 0x08 "DMA_CH0_Rx_Control,The DMA Channel0 Receive Control register controls the Rx features such as PBL buffer size and extended status." bitfld.long 0x08 31. "RPF,Rx Packet Flush" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x08 28.--30. "Reserved_30_28,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 24.--27. "RQOS,Rx AXI4 QOS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x08 23. "Reserved_23,Reserved" "0,1" newline rbitfld.long 0x08 22. "Reserved_ERIC,Reserved" "0,1" newline hexmask.long.byte 0x08 16.--21. 1. "RxPBL,Receive Programmable Burst Length These bits indicate the maximum number of beats to be transferred in one DMA block data transfer" newline rbitfld.long 0x08 15. "Reserved_15,Reserved" "0,1" newline hexmask.long.word 0x08 4.--14. 1. "RBSZ_13_y,Receive Buffer size High RBSZ[13:0] is split into two fields higher RBSZ_13_y and lower RBSZ_x_0" newline rbitfld.long 0x08 1.--3. "RBSZ_x_0,Receive Buffer size Low RBSZ[13:0] is split into two fields RBSZ_13_y and RBSZ_x_0" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "SR,Start or Stop Receive" "0: STOP,1: START" group.long ad:0xC00BD114++0x03 line.long 0x00 "DMA_CH0_TxDesc_List_Address,The Channel0 Tx Descriptor List Address register points the DMA to the start of Transmit descriptor list. The descriptor lists reside in the physical memory space of the application and must be Dword (64-bit). The DMA.." hexmask.long 0x00 3.--31. 1. "TDESLA,Start of Transmit List This field contains the base address of the first descriptor in the Transmit descriptor list" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" group.long ad:0xC00BD11C++0x07 line.long 0x00 "DMA_CH0_RxDesc_List_Address,The Channel0 Rx Descriptor List Address register points the DMA to the start of Receive descriptor list. This register points to the start of the Receive Descriptor List. The descriptor lists reside in the physical memory.." hexmask.long 0x00 3.--31. 1. "RDESLA,Start of Receive List This field contains the base address of the first descriptor in the Rx Descriptor list" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" line.long 0x04 "DMA_CH0_TxDesc_Tail_Pointer,The Channel0 Tx Descriptor Tail Pointer register points to an offset from the base and indicates the location of the last valid descriptor." hexmask.long 0x04 3.--31. 1. "TDTP,Transmit Descriptor Tail Pointer This field contains the tail pointer for the Tx descriptor ring" newline rbitfld.long 0x04 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" group.long ad:0xC00BD128++0x17 line.long 0x00 "DMA_CH0_RxDesc_Tail_Pointer,The Channel0 Rx Descriptor Tail Pointer Points to an offset from the base and indicates the location of the last valid descriptor." hexmask.long 0x00 3.--31. 1. "RDTP,Receive Descriptor Tail Pointer This field contains the tail pointer for the Rx descriptor ring" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" line.long 0x04 "DMA_CH0_TxDesc_Ring_Length,The Tx Descriptor Ring Length register contains the length of the Transmit descriptor ring." hexmask.long.tbyte 0x04 10.--31. 1. "Reserved_31_10,Reserved" newline hexmask.long.word 0x04 0.--9. 1. "TDRL,Transmit Descriptor Ring Length This field sets the maximum number of Tx descriptors in the circular descriptor ring" line.long 0x08 "DMA_CH0_Rx_Control2,The Channel0 Receive Control register controls the Rx features such as Rx Descriptor Ring Length and Alternate Rx Buffer Size." hexmask.long.byte 0x08 24.--31. 1. "Reserved_31_24,Reserved" newline hexmask.long.byte 0x08 17.--23. 1. "ARBS,Alternate Receive Buffer Size Indicates size in bytes for Buffer 1 when ARBS is programmed to a non-zero value (when split header feature is not enabled)" newline hexmask.long.byte 0x08 10.--16. 1. "Reserved_x_10,Reserved" newline hexmask.long.word 0x08 0.--9. 1. "RDRL,Receive Descriptor Ring Length This register sets the maximum number of Rx descriptors in the circular descriptor ring" line.long 0x0C "DMA_CH0_Interrupt_Enable,The Channel0 Interrupt Enable register enables the interrupts reported by the Status register." hexmask.long.word 0x0C 16.--31. 1. "Reserved_31_16,Reserved" newline bitfld.long 0x0C 15. "NIE,Normal Interrupt Summary Enable When this bit is set the normal interrupt summary is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 14. "AIE,Abnormal Interrupt Summary Enable When this bit is set the abnormal interrupt summary is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 13. "CDEE,Context Descriptor Error Enable When this bit is set along with the AIE bit the Descriptor error interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 12. "FBEE,Fatal Bus Error Enable When this bit is set along with the AIE bit the Fatal Bus error interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 11. "ERIE,Early Receive Interrupt Enable When this bit is set along with the NIE bit the Early Receive interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 10. "ETIE,Early Transmit Interrupt Enable When this bit is set along with the AIE bit the Early Transmit interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 9. "RWTE,Receive Watchdog Timeout Enable When this bit is set along with the AIE bit the Receive Watchdog Timeout interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 8. "RSE,Receive Stopped Enable When this bit is set along with the AIE bit the Receive Stopped Interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 7. "RBUE,Receive Buffer Unavailable Enable When this bit is set along with the AIE bit the Receive Buffer Unavailable interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 6. "RIE,Receive Interrupt Enable When this bit is set along with the NIE bit the Receive Interrupt is enabled" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x0C 3.--5. "Reserved_5_3,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 2. "TBUE,Transmit Buffer Unavailable Enable When this bit is set along with the NIE bit the Transmit Buffer Unavailable interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 1. "TXSE,Transmit Stopped Enable When this bit is set along with the AIE bit the Transmission Stopped interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 0. "TIE,Transmit Interrupt Enable When this bit is set along with the NIE bit the Transmit Interrupt is enabled" "0: DISABLE,1: ENABLE" line.long 0x10 "DMA_CH0_Rx_Interrupt_Watchdog_Timer,The Receive Interrupt Watchdog Timer register indicates the watchdog timeout for Receive Interrupt (RI) from the DMA. When this register is written with a non-zero value it enables the watchdog timer for the RI bit of.." hexmask.long.word 0x10 18.--31. 1. "Reserved_31_18,Reserved" newline bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units This fields indicates the number of system clock cycles corresponding to one unit in RWT field" "0:,1:,2:,3: 2048 For" newline hexmask.long.byte 0x10 8.--15. 1. "Reserved_15_8,Reserved" newline hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count This field indicates the number of system clock cycles multiplied by factor indicated in RWTU field for which the watchdog timer is set" line.long 0x14 "DMA_CH0_Slot_Function_Control_Status,The Slot Function Control and Status register contains the control bits for slot function and the status for Transmit path." hexmask.long.word 0x14 20.--31. 1. "Reserved_31_20,Reserved" newline rbitfld.long 0x14 16.--19. "RSN,Reference Slot Number This field gives the current value of the reference slot number in the DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value This field controls the period of the slot interval in which the TxDMA fetches the scheduled packets" newline rbitfld.long 0x14 2.--3. "Reserved_3_2,Reserved" "0,1,2,3" newline bitfld.long 0x14 1. "ASC,Advance Slot Check When set this bit enables the DMA to fetch the data from the buffer when the slot number (SLOTNUM) programmed in the Tx descriptor is - equal to the reference slot number given in the RSN field or - ahead of the reference slot.." "0: DISABLE,1: ENABLE" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison When set this bit enables the checking of the slot numbers programmed in the Tx descriptor with the current reference given in the RSN field" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BD144++0x03 line.long 0x00 "DMA_CH0_Current_App_TxDesc,The Channel0 Current Application Transmit Descriptor register points to the current Transmit descriptor read by the DMA." rgroup.long ad:0xC00BD14C++0x03 line.long 0x00 "DMA_CH0_Current_App_RxDesc,The Channel0 Current Application Receive Descriptor register points to the current Receive descriptor read by the DMA." rgroup.long ad:0xC00BD154++0x03 line.long 0x00 "DMA_CH0_Current_App_TxBuffer,The Channel0 Current Application Transmit Buffer Address register points to the current Tx buffer address read by the DMA." rgroup.long ad:0xC00BD15C++0x03 line.long 0x00 "DMA_CH0_Current_App_RxBuffer,The Channel 0 Current Application Receive Buffer Address register points to the current Rx buffer address read by the DMA." group.long ad:0xC00BD160++0x03 line.long 0x00 "DMA_CH0_Status,The software driver (application) reads the Status register during interrupt service routine or polling to determine the status of the DMA. Note: The number of DMA_CH0_Status register in the configuration is the higher of number of Rx DMA.." hexmask.long.word 0x00 22.--31. 1. "Reserved_31_22,Reserved" newline rbitfld.long 0x00 19.--21. "REB,Rx DMA Error Bits This field indicates the type of error that caused a Bus Error" "0: Error during write transfer This field is valid,1: Error during read transfer,?..." newline rbitfld.long 0x00 16.--18. "TEB,Tx DMA Error Bits This field indicates the type of error that caused a Bus Error" "0: Error during write transfer This field is valid,1: Error during read transfer,?..." newline bitfld.long 0x00 15. "NIS,Normal Interrupt Summary Normal Interrupt Summary bit value is the logical OR of the following bits when the corresponding interrupt bits are enabled in the DMA_CH0_Interrupt_Enable register: - Bit" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 14. "AIS,Abnormal Interrupt Summary Abnormal Interrupt Summary bit value is the logical OR of the following when the corresponding interrupt bits are enabled in the DMA_CH0_Interrupt_Enable register: - Bit" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 13. "CDE,Context Descriptor Error This bit indicates that the DMA Tx/Rx engine received a descriptor error which indicates invalid context in the middle of packet flow ( intermediate descriptor) or all one's descriptor in Tx case and on Rx side it indicates.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 12. "FBE,Fatal Bus Error This bit indicates that a bus error occurred (as described in the EB field)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11. "ERI,Early Receive Interrupt This bit when set indicates that the RxDMA has completed the transfer of packet data to the memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 10. "ETI,Early Transmit Interrupt This bit when set indicates that the TxDMA has completed the transfer of packet data to the MTL TXFIFO memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 9. "RWT,Receive Watchdog Timeout This bit is asserted when a packet with length greater than 2 048 bytes (10 240 bytes when Jumbo Packet mode is enabled) is received" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 8. "RPS,Receive Process Stopped This bit is asserted when the Rx process enters the Stopped state" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 7. "RBU,Receive Buffer Unavailable This bit indicates that the application owns the next descriptor in the Receive list and the DMA cannot acquire it" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 6. "RI,Receive Interrupt This bit indicates that the packet reception is complete" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 3.--5. "Reserved_5_3,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 2. "TBU,Transmit Buffer Unavailable This bit indicates that the application owns the next descriptor in the Transmit list and the DMA cannot acquire it" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 1. "TPS,Transmit Process Stopped This bit is set when the transmission is stopped" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "TI,Transmit Interrupt This bit indicates that the packet transmission is complete" "0: INACTIVE,1: ACTIVE" rgroup.long ad:0xC00BD164++0x07 line.long 0x00 "DMA_CH0_Miss_Frame_Cnt,This register has the number of packet counter that got dropped by the DMA either due to Bus Error or due to programming RPF field in DMA_CH0_Rx_Control register." hexmask.long.word 0x00 16.--31. 1. "Reserved_31_16,Reserved" newline bitfld.long 0x00 15. "MFCO,Overflow status of the MFC Counter When this bit is set then the MFC counter does not get incremented further" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11.--14. "Reserved_14_11,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. "MFC,Dropped Packet Counters This counter indicates the number of packet counters that are dropped by the DMA either because of bus error or because of programing RPF field in DMA_CH0_Rx_Control register" line.long 0x04 "DMA_CH0_RXP_Accept_Cnt,The DMA_CH0_RXP_Accept_Cnt registers provides the count of the number of frames accepted by Rx Parser." bitfld.long 0x04 31. "RXPACOF,Rx Parser Accept Counter Overflow Bit When set this bit indicates that the RXPAC Counter field crossed the maximum limit" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x04 0.--30. 1. "RXPAC,Rx Parser Accept Counter This 31-bit counter is implemented when a Rx Parser Accept a packet due to AF =1" tree.end tree "EQOS_DMA_CH1" group.long ad:0xC00BD180++0x0B line.long 0x00 "DMA_CH1_Control,The DMA Channel1 Control register specifies the MSS value for segmentation length to skip between two descriptors and also the features such as header splitting and 8xPBL mode." hexmask.long.byte 0x00 25.--31. 1. "Reserved_31_25,Reserved" newline bitfld.long 0x00 24. "SPH,Split Headers" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 21.--23. "Reserved_23_21,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "DSL,Descriptor Skip Length This bit specifies the Dword (64-bit) number of locations to skip between two descriptors" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x00 17. "Reserved_17,Reserved" "0,1" newline bitfld.long 0x00 16. "PBLx8,8xPBL mode" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 14.--15. "Reserved_15_14,Reserved" "0,1,2,3" newline hexmask.long.word 0x00 0.--13. 1. "Reserved_MSS,Reserved" line.long 0x04 "DMA_CH1_Tx_Control,The DMA Channel1 Transmit Control register controls the Tx features such as PBL TCP segmentation and Tx Channel weights." rbitfld.long 0x04 31. "Reserved_31,Reserved" "0,1" newline bitfld.long 0x04 29.--30. "TFSEL,TBS Fetch Select Select bits for one of the four DMA_TBS_CTRL register fields (FTOS FGSN FTOV) for the channel Values" "0: DMA_TBS_CTRL0,1: DMA_TBS_CTRL1,2: DMA_TBS_CTRL2,3: DMA_TBS_CTRL3 (Reserved if" newline bitfld.long 0x04 28. "EDSE,Enhanced Descriptor Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 24.--27. "TQOS,Transmit QOS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x04 23. "Reserved_23,Reserved" "0,1" newline rbitfld.long 0x04 22. "Reserved_ETIC,Reserved" "0,1" newline hexmask.long.byte 0x04 16.--21. 1. "TxPBL,Transmit Programmable Burst Length These bits indicate the maximum number of beats to be transferred in one DMA block data transfer" newline bitfld.long 0x04 15. "IPBL,Ignore PBL Requirement" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x04 13.--14. "Reserved_TSE_MODE,Reserved" "0,1,2,3" newline rbitfld.long 0x04 12. "Reserved_TSE,Reserved" "0,1" newline hexmask.long.byte 0x04 5.--11. 1. "Reserved_11_5,Reserved" newline bitfld.long 0x04 4. "OSF,Operate on Second Packet" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 1.--3. "TCW,Transmit Channel Weight This field indicates the weight assigned to the corresponding Tx channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. "ST,Start or Stop Transmission Command" "0: STOP,1: START" line.long 0x08 "DMA_CH1_Rx_Control,The DMA Channel1 Receive Control register controls the Rx features such as PBL buffer size and extended status." bitfld.long 0x08 31. "RPF,Rx Packet Flush" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x08 28.--30. "Reserved_30_28,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 24.--27. "RQOS,Rx AXI4 QOS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x08 23. "Reserved_23,Reserved" "0,1" newline rbitfld.long 0x08 22. "Reserved_ERIC,Reserved" "0,1" newline hexmask.long.byte 0x08 16.--21. 1. "RxPBL,Receive Programmable Burst Length These bits indicate the maximum number of beats to be transferred in one DMA block data transfer" newline rbitfld.long 0x08 15. "Reserved_15,Reserved" "0,1" newline hexmask.long.word 0x08 4.--14. 1. "RBSZ_13_y,Receive Buffer size High RBSZ[13:0] is split into two fields higher RBSZ_13_y and lower RBSZ_x_0" newline rbitfld.long 0x08 1.--3. "RBSZ_x_0,Receive Buffer size Low RBSZ[13:0] is split into two fields RBSZ_13_y and RBSZ_x_0" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "SR,Start or Stop Receive" "0: STOP,1: START" group.long ad:0xC00BD194++0x03 line.long 0x00 "DMA_CH1_TxDesc_List_Address,The Channel1 Tx Descriptor List Address register points the DMA to the start of Transmit descriptor list. The descriptor lists reside in the physical memory space of the application and must be Dword (64-bit). The DMA.." hexmask.long 0x00 3.--31. 1. "TDESLA,Start of Transmit List This field contains the base address of the first descriptor in the Transmit descriptor list" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" group.long ad:0xC00BD19C++0x07 line.long 0x00 "DMA_CH1_RxDesc_List_Address,The Channel1 Rx Descriptor List Address register points the DMA to the start of Receive descriptor list. This register points to the start of the Receive Descriptor List. The descriptor lists reside in the physical memory.." hexmask.long 0x00 3.--31. 1. "RDESLA,Start of Receive List This field contains the base address of the first descriptor in the Rx Descriptor list" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" line.long 0x04 "DMA_CH1_TxDesc_Tail_Pointer,The Channel1 Tx Descriptor Tail Pointer register points to an offset from the base and indicates the location of the last valid descriptor." hexmask.long 0x04 3.--31. 1. "TDTP,Transmit Descriptor Tail Pointer This field contains the tail pointer for the Tx descriptor ring" newline rbitfld.long 0x04 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" group.long ad:0xC00BD1A8++0x17 line.long 0x00 "DMA_CH1_RxDesc_Tail_Pointer,The Channel1 Rx Descriptor Tail Pointer Points to an offset from the base and indicates the location of the last valid descriptor." hexmask.long 0x00 3.--31. 1. "RDTP,Receive Descriptor Tail Pointer This field contains the tail pointer for the Rx descriptor ring" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" line.long 0x04 "DMA_CH1_TxDesc_Ring_Length,The Tx Descriptor Ring Length register contains the length of the Transmit descriptor ring." hexmask.long.tbyte 0x04 10.--31. 1. "Reserved_31_10,Reserved" newline hexmask.long.word 0x04 0.--9. 1. "TDRL,Transmit Descriptor Ring Length This field sets the maximum number of Tx descriptors in the circular descriptor ring" line.long 0x08 "DMA_CH1_Rx_Control2,The Channel1 Receive Control register controls the Rx features such as Rx Descriptor Ring Length and Alternate Rx Buffer Size." hexmask.long.byte 0x08 24.--31. 1. "Reserved_31_24,Reserved" newline hexmask.long.byte 0x08 17.--23. 1. "ARBS,Alternate Receive Buffer Size Indicates size in bytes for Buffer 1 when ARBS is programmed to a non-zero value (when split header feature is not enabled)" newline hexmask.long.byte 0x08 10.--16. 1. "Reserved_x_10,Reserved" newline hexmask.long.word 0x08 0.--9. 1. "RDRL,Receive Descriptor Ring Length This register sets the maximum number of Rx descriptors in the circular descriptor ring" line.long 0x0C "DMA_CH1_Interrupt_Enable,The Channel1 Interrupt Enable register enables the interrupts reported by the Status register." hexmask.long.word 0x0C 16.--31. 1. "Reserved_31_16,Reserved" newline bitfld.long 0x0C 15. "NIE,Normal Interrupt Summary Enable When this bit is set the normal interrupt summary is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 14. "AIE,Abnormal Interrupt Summary Enable When this bit is set the abnormal interrupt summary is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 13. "CDEE,Context Descriptor Error Enable When this bit is set along with the AIE bit the Descriptor error interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 12. "FBEE,Fatal Bus Error Enable When this bit is set along with the AIE bit the Fatal Bus error interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 11. "ERIE,Early Receive Interrupt Enable When this bit is set along with the NIE bit the Early Receive interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 10. "ETIE,Early Transmit Interrupt Enable When this bit is set along with the AIE bit the Early Transmit interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 9. "RWTE,Receive Watchdog Timeout Enable When this bit is set along with the AIE bit the Receive Watchdog Timeout interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 8. "RSE,Receive Stopped Enable When this bit is set along with the AIE bit the Receive Stopped Interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 7. "RBUE,Receive Buffer Unavailable Enable When this bit is set along with the AIE bit the Receive Buffer Unavailable interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 6. "RIE,Receive Interrupt Enable When this bit is set along with the NIE bit the Receive Interrupt is enabled" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x0C 3.--5. "Reserved_5_3,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 2. "TBUE,Transmit Buffer Unavailable Enable When this bit is set along with the NIE bit the Transmit Buffer Unavailable interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 1. "TXSE,Transmit Stopped Enable When this bit is set along with the AIE bit the Transmission Stopped interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 0. "TIE,Transmit Interrupt Enable When this bit is set along with the NIE bit the Transmit Interrupt is enabled" "0: DISABLE,1: ENABLE" line.long 0x10 "DMA_CH1_Rx_Interrupt_Watchdog_Timer,The Receive Interrupt Watchdog Timer register indicates the watchdog timeout for Receive Interrupt (RI) from the DMA. When this register is written with a non-zero value it enables the watchdog timer for the RI bit of.." hexmask.long.word 0x10 18.--31. 1. "Reserved_31_18,Reserved" newline bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units This fields indicates the number of system clock cycles corresponding to one unit in RWT field" "0:,1:,2:,3: 2048 For" newline hexmask.long.byte 0x10 8.--15. 1. "Reserved_15_8,Reserved" newline hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count This field indicates the number of system clock cycles multiplied by factor indicated in RWTU field for which the watchdog timer is set" line.long 0x14 "DMA_CH1_Slot_Function_Control_Status,The Slot Function Control and Status register contains the control bits for slot function and the status for Transmit path." hexmask.long.word 0x14 20.--31. 1. "Reserved_31_20,Reserved" newline rbitfld.long 0x14 16.--19. "RSN,Reference Slot Number This field gives the current value of the reference slot number in the DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value This field controls the period of the slot interval in which the TxDMA fetches the scheduled packets" newline rbitfld.long 0x14 2.--3. "Reserved_3_2,Reserved" "0,1,2,3" newline bitfld.long 0x14 1. "ASC,Advance Slot Check When set this bit enables the DMA to fetch the data from the buffer when the slot number (SLOTNUM) programmed in the Tx descriptor is - equal to the reference slot number given in the RSN field or - ahead of the reference slot.." "0: DISABLE,1: ENABLE" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison When set this bit enables the checking of the slot numbers programmed in the Tx descriptor with the current reference given in the RSN field" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BD1C4++0x03 line.long 0x00 "DMA_CH1_Current_App_TxDesc,The Channel1 Current Application Transmit Descriptor register points to the current Transmit descriptor read by the DMA." rgroup.long ad:0xC00BD1CC++0x03 line.long 0x00 "DMA_CH1_Current_App_RxDesc,The Channel1 Current Application Receive Descriptor register points to the current Receive descriptor read by the DMA." rgroup.long ad:0xC00BD1D4++0x03 line.long 0x00 "DMA_CH1_Current_App_TxBuffer,The Channel1 Current Application Transmit Buffer Address register points to the current Tx buffer address read by the DMA." rgroup.long ad:0xC00BD1DC++0x03 line.long 0x00 "DMA_CH1_Current_App_RxBuffer,The Channel 1 Current Application Receive Buffer Address register points to the current Rx buffer address read by the DMA." group.long ad:0xC00BD1E0++0x03 line.long 0x00 "DMA_CH1_Status,The software driver (application) reads the Status register during interrupt service routine or polling to determine the status of the DMA. Note: The number of DMA_CH1_Status register in the configuration is the higher of number of Rx DMA.." hexmask.long.word 0x00 22.--31. 1. "Reserved_31_22,Reserved" newline rbitfld.long 0x00 19.--21. "REB,Rx DMA Error Bits This field indicates the type of error that caused a Bus Error" "0: Error during write transfer This field is valid,1: Error during read transfer,?..." newline rbitfld.long 0x00 16.--18. "TEB,Tx DMA Error Bits This field indicates the type of error that caused a Bus Error" "0: Error during write transfer This field is valid,1: Error during read transfer,?..." newline bitfld.long 0x00 15. "NIS,Normal Interrupt Summary Normal Interrupt Summary bit value is the logical OR of the following bits when the corresponding interrupt bits are enabled in the DMA_CH1_Interrupt_Enable register: - Bit" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 14. "AIS,Abnormal Interrupt Summary Abnormal Interrupt Summary bit value is the logical OR of the following when the corresponding interrupt bits are enabled in the DMA_CH1_Interrupt_Enable register: - Bit" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 13. "CDE,Context Descriptor Error This bit indicates that the DMA Tx/Rx engine received a descriptor error which indicates invalid context in the middle of packet flow ( intermediate descriptor) or all one's descriptor in Tx case and on Rx side it indicates.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 12. "FBE,Fatal Bus Error This bit indicates that a bus error occurred (as described in the EB field)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11. "ERI,Early Receive Interrupt This bit when set indicates that the RxDMA has completed the transfer of packet data to the memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 10. "ETI,Early Transmit Interrupt This bit when set indicates that the TxDMA has completed the transfer of packet data to the MTL TXFIFO memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 9. "RWT,Receive Watchdog Timeout This bit is asserted when a packet with length greater than 2 048 bytes (10 240 bytes when Jumbo Packet mode is enabled) is received" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 8. "RPS,Receive Process Stopped This bit is asserted when the Rx process enters the Stopped state" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 7. "RBU,Receive Buffer Unavailable This bit indicates that the application owns the next descriptor in the Receive list and the DMA cannot acquire it" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 6. "RI,Receive Interrupt This bit indicates that the packet reception is complete" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 3.--5. "Reserved_5_3,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 2. "TBU,Transmit Buffer Unavailable This bit indicates that the application owns the next descriptor in the Transmit list and the DMA cannot acquire it" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 1. "TPS,Transmit Process Stopped This bit is set when the transmission is stopped" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "TI,Transmit Interrupt This bit indicates that the packet transmission is complete" "0: INACTIVE,1: ACTIVE" rgroup.long ad:0xC00BD1E4++0x07 line.long 0x00 "DMA_CH1_Miss_Frame_Cnt,This register has the number of packet counter that got dropped by the DMA either due to Bus Error or due to programming RPF field in DMA_CH1_Rx_Control register." hexmask.long.word 0x00 16.--31. 1. "Reserved_31_16,Reserved" newline bitfld.long 0x00 15. "MFCO,Overflow status of the MFC Counter When this bit is set then the MFC counter does not get incremented further" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11.--14. "Reserved_14_11,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. "MFC,Dropped Packet Counters This counter indicates the number of packet counters that are dropped by the DMA either because of bus error or because of programing RPF field in DMA_CH1_Rx_Control register" line.long 0x04 "DMA_CH1_RXP_Accept_Cnt,The DMA_CH1_RXP_Accept_Cnt registers provides the count of the number of frames accepted by Rx Parser." bitfld.long 0x04 31. "RXPACOF,Rx Parser Accept Counter Overflow Bit When set this bit indicates that the RXPAC Counter field crossed the maximum limit" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x04 0.--30. 1. "RXPAC,Rx Parser Accept Counter This 31-bit counter is implemented when a Rx Parser Accept a packet due to AF =1" tree.end tree "EQOS_DMA_CH2" group.long ad:0xC00BD200++0x0B line.long 0x00 "DMA_CH2_Control,The DMA Channel2 Control register specifies the MSS value for segmentation length to skip between two descriptors and also the features such as header splitting and 8xPBL mode." hexmask.long.byte 0x00 25.--31. 1. "Reserved_31_25,Reserved" newline bitfld.long 0x00 24. "SPH,Split Headers" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 21.--23. "Reserved_23_21,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "DSL,Descriptor Skip Length This bit specifies the Dword (64-bit) number of locations to skip between two descriptors" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x00 17. "Reserved_17,Reserved" "0,1" newline bitfld.long 0x00 16. "PBLx8,8xPBL mode" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 14.--15. "Reserved_15_14,Reserved" "0,1,2,3" newline hexmask.long.word 0x00 0.--13. 1. "Reserved_MSS,Reserved" line.long 0x04 "DMA_CH2_Tx_Control,The DMA Channel2 Transmit Control register controls the Tx features such as PBL TCP segmentation and Tx Channel weights." rbitfld.long 0x04 31. "Reserved_31,Reserved" "0,1" newline bitfld.long 0x04 29.--30. "TFSEL,TBS Fetch Select Select bits for one of the four DMA_TBS_CTRL register fields (FTOS FGSN FTOV) for the channel Values" "0: DMA_TBS_CTRL0,1: DMA_TBS_CTRL1,2: DMA_TBS_CTRL2,3: DMA_TBS_CTRL3 (Reserved if" newline bitfld.long 0x04 28. "EDSE,Enhanced Descriptor Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 24.--27. "TQOS,Transmit QOS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x04 23. "Reserved_23,Reserved" "0,1" newline rbitfld.long 0x04 22. "Reserved_ETIC,Reserved" "0,1" newline hexmask.long.byte 0x04 16.--21. 1. "TxPBL,Transmit Programmable Burst Length These bits indicate the maximum number of beats to be transferred in one DMA block data transfer" newline bitfld.long 0x04 15. "IPBL,Ignore PBL Requirement" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x04 13.--14. "Reserved_TSE_MODE,Reserved" "0,1,2,3" newline rbitfld.long 0x04 12. "Reserved_TSE,Reserved" "0,1" newline hexmask.long.byte 0x04 5.--11. 1. "Reserved_11_5,Reserved" newline bitfld.long 0x04 4. "OSF,Operate on Second Packet" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 1.--3. "TCW,Transmit Channel Weight This field indicates the weight assigned to the corresponding Tx channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. "ST,Start or Stop Transmission Command" "0: STOP,1: START" line.long 0x08 "DMA_CH2_Rx_Control,The DMA Channel2 Receive Control register controls the Rx features such as PBL buffer size and extended status." bitfld.long 0x08 31. "RPF,Rx Packet Flush" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x08 28.--30. "Reserved_30_28,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 24.--27. "RQOS,Rx AXI4 QOS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x08 23. "Reserved_23,Reserved" "0,1" newline rbitfld.long 0x08 22. "Reserved_ERIC,Reserved" "0,1" newline hexmask.long.byte 0x08 16.--21. 1. "RxPBL,Receive Programmable Burst Length These bits indicate the maximum number of beats to be transferred in one DMA block data transfer" newline rbitfld.long 0x08 15. "Reserved_15,Reserved" "0,1" newline hexmask.long.word 0x08 4.--14. 1. "RBSZ_13_y,Receive Buffer size High RBSZ[13:0] is split into two fields higher RBSZ_13_y and lower RBSZ_x_0" newline rbitfld.long 0x08 1.--3. "RBSZ_x_0,Receive Buffer size Low RBSZ[13:0] is split into two fields RBSZ_13_y and RBSZ_x_0" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "SR,Start or Stop Receive" "0: STOP,1: START" group.long ad:0xC00BD214++0x03 line.long 0x00 "DMA_CH2_TxDesc_List_Address,The Channel2 Tx Descriptor List Address register points the DMA to the start of Transmit descriptor list. The descriptor lists reside in the physical memory space of the application and must be Dword (64-bit). The DMA.." hexmask.long 0x00 3.--31. 1. "TDESLA,Start of Transmit List This field contains the base address of the first descriptor in the Transmit descriptor list" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" group.long ad:0xC00BD21C++0x07 line.long 0x00 "DMA_CH2_RxDesc_List_Address,The Channel2 Rx Descriptor List Address register points the DMA to the start of Receive descriptor list. This register points to the start of the Receive Descriptor List. The descriptor lists reside in the physical memory.." hexmask.long 0x00 3.--31. 1. "RDESLA,Start of Receive List This field contains the base address of the first descriptor in the Rx Descriptor list" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" line.long 0x04 "DMA_CH2_TxDesc_Tail_Pointer,The Channel2 Tx Descriptor Tail Pointer register points to an offset from the base and indicates the location of the last valid descriptor." hexmask.long 0x04 3.--31. 1. "TDTP,Transmit Descriptor Tail Pointer This field contains the tail pointer for the Tx descriptor ring" newline rbitfld.long 0x04 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" group.long ad:0xC00BD228++0x17 line.long 0x00 "DMA_CH2_RxDesc_Tail_Pointer,The Channel2 Rx Descriptor Tail Pointer Points to an offset from the base and indicates the location of the last valid descriptor." hexmask.long 0x00 3.--31. 1. "RDTP,Receive Descriptor Tail Pointer This field contains the tail pointer for the Rx descriptor ring" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" line.long 0x04 "DMA_CH2_TxDesc_Ring_Length,The Tx Descriptor Ring Length register contains the length of the Transmit descriptor ring." hexmask.long.tbyte 0x04 10.--31. 1. "Reserved_31_10,Reserved" newline hexmask.long.word 0x04 0.--9. 1. "TDRL,Transmit Descriptor Ring Length This field sets the maximum number of Tx descriptors in the circular descriptor ring" line.long 0x08 "DMA_CH2_Rx_Control2,The Channel2 Receive Control register controls the Rx features such as Rx Descriptor Ring Length and Alternate Rx Buffer Size." hexmask.long.byte 0x08 24.--31. 1. "Reserved_31_24,Reserved" newline hexmask.long.byte 0x08 17.--23. 1. "ARBS,Alternate Receive Buffer Size Indicates size in bytes for Buffer 1 when ARBS is programmed to a non-zero value (when split header feature is not enabled)" newline hexmask.long.byte 0x08 10.--16. 1. "Reserved_x_10,Reserved" newline hexmask.long.word 0x08 0.--9. 1. "RDRL,Receive Descriptor Ring Length This register sets the maximum number of Rx descriptors in the circular descriptor ring" line.long 0x0C "DMA_CH2_Interrupt_Enable,The Channel2 Interrupt Enable register enables the interrupts reported by the Status register." hexmask.long.word 0x0C 16.--31. 1. "Reserved_31_16,Reserved" newline bitfld.long 0x0C 15. "NIE,Normal Interrupt Summary Enable When this bit is set the normal interrupt summary is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 14. "AIE,Abnormal Interrupt Summary Enable When this bit is set the abnormal interrupt summary is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 13. "CDEE,Context Descriptor Error Enable When this bit is set along with the AIE bit the Descriptor error interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 12. "FBEE,Fatal Bus Error Enable When this bit is set along with the AIE bit the Fatal Bus error interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 11. "ERIE,Early Receive Interrupt Enable When this bit is set along with the NIE bit the Early Receive interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 10. "ETIE,Early Transmit Interrupt Enable When this bit is set along with the AIE bit the Early Transmit interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 9. "RWTE,Receive Watchdog Timeout Enable When this bit is set along with the AIE bit the Receive Watchdog Timeout interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 8. "RSE,Receive Stopped Enable When this bit is set along with the AIE bit the Receive Stopped Interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 7. "RBUE,Receive Buffer Unavailable Enable When this bit is set along with the AIE bit the Receive Buffer Unavailable interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 6. "RIE,Receive Interrupt Enable When this bit is set along with the NIE bit the Receive Interrupt is enabled" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x0C 3.--5. "Reserved_5_3,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 2. "TBUE,Transmit Buffer Unavailable Enable When this bit is set along with the NIE bit the Transmit Buffer Unavailable interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 1. "TXSE,Transmit Stopped Enable When this bit is set along with the AIE bit the Transmission Stopped interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 0. "TIE,Transmit Interrupt Enable When this bit is set along with the NIE bit the Transmit Interrupt is enabled" "0: DISABLE,1: ENABLE" line.long 0x10 "DMA_CH2_Rx_Interrupt_Watchdog_Timer,The Receive Interrupt Watchdog Timer register indicates the watchdog timeout for Receive Interrupt (RI) from the DMA. When this register is written with a non-zero value it enables the watchdog timer for the RI bit of.." hexmask.long.word 0x10 18.--31. 1. "Reserved_31_18,Reserved" newline bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units This fields indicates the number of system clock cycles corresponding to one unit in RWT field" "0:,1:,2:,3: 2048 For" newline hexmask.long.byte 0x10 8.--15. 1. "Reserved_15_8,Reserved" newline hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count This field indicates the number of system clock cycles multiplied by factor indicated in RWTU field for which the watchdog timer is set" line.long 0x14 "DMA_CH2_Slot_Function_Control_Status,The Slot Function Control and Status register contains the control bits for slot function and the status for Transmit path." hexmask.long.word 0x14 20.--31. 1. "Reserved_31_20,Reserved" newline rbitfld.long 0x14 16.--19. "RSN,Reference Slot Number This field gives the current value of the reference slot number in the DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value This field controls the period of the slot interval in which the TxDMA fetches the scheduled packets" newline rbitfld.long 0x14 2.--3. "Reserved_3_2,Reserved" "0,1,2,3" newline bitfld.long 0x14 1. "ASC,Advance Slot Check When set this bit enables the DMA to fetch the data from the buffer when the slot number (SLOTNUM) programmed in the Tx descriptor is - equal to the reference slot number given in the RSN field or - ahead of the reference slot.." "0: DISABLE,1: ENABLE" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison When set this bit enables the checking of the slot numbers programmed in the Tx descriptor with the current reference given in the RSN field" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BD244++0x03 line.long 0x00 "DMA_CH2_Current_App_TxDesc,The Channel2 Current Application Transmit Descriptor register points to the current Transmit descriptor read by the DMA." rgroup.long ad:0xC00BD24C++0x03 line.long 0x00 "DMA_CH2_Current_App_RxDesc,The Channel2 Current Application Receive Descriptor register points to the current Receive descriptor read by the DMA." rgroup.long ad:0xC00BD254++0x03 line.long 0x00 "DMA_CH2_Current_App_TxBuffer,The Channel2 Current Application Transmit Buffer Address register points to the current Tx buffer address read by the DMA." rgroup.long ad:0xC00BD25C++0x03 line.long 0x00 "DMA_CH2_Current_App_RxBuffer,The Channel 2 Current Application Receive Buffer Address register points to the current Rx buffer address read by the DMA." group.long ad:0xC00BD260++0x03 line.long 0x00 "DMA_CH2_Status,The software driver (application) reads the Status register during interrupt service routine or polling to determine the status of the DMA. Note: The number of DMA_CH2_Status register in the configuration is the higher of number of Rx DMA.." hexmask.long.word 0x00 22.--31. 1. "Reserved_31_22,Reserved" newline rbitfld.long 0x00 19.--21. "REB,Rx DMA Error Bits This field indicates the type of error that caused a Bus Error" "0: Error during write transfer This field is valid,1: Error during read transfer,?..." newline rbitfld.long 0x00 16.--18. "TEB,Tx DMA Error Bits This field indicates the type of error that caused a Bus Error" "0: Error during write transfer This field is valid,1: Error during read transfer,?..." newline bitfld.long 0x00 15. "NIS,Normal Interrupt Summary Normal Interrupt Summary bit value is the logical OR of the following bits when the corresponding interrupt bits are enabled in the DMA_CH2_Interrupt_Enable register: - Bit" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 14. "AIS,Abnormal Interrupt Summary Abnormal Interrupt Summary bit value is the logical OR of the following when the corresponding interrupt bits are enabled in the DMA_CH2_Interrupt_Enable register: - Bit" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 13. "CDE,Context Descriptor Error This bit indicates that the DMA Tx/Rx engine received a descriptor error which indicates invalid context in the middle of packet flow ( intermediate descriptor) or all one's descriptor in Tx case and on Rx side it indicates.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 12. "FBE,Fatal Bus Error This bit indicates that a bus error occurred (as described in the EB field)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11. "ERI,Early Receive Interrupt This bit when set indicates that the RxDMA has completed the transfer of packet data to the memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 10. "ETI,Early Transmit Interrupt This bit when set indicates that the TxDMA has completed the transfer of packet data to the MTL TXFIFO memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 9. "RWT,Receive Watchdog Timeout This bit is asserted when a packet with length greater than 2 048 bytes (10 240 bytes when Jumbo Packet mode is enabled) is received" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 8. "RPS,Receive Process Stopped This bit is asserted when the Rx process enters the Stopped state" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 7. "RBU,Receive Buffer Unavailable This bit indicates that the application owns the next descriptor in the Receive list and the DMA cannot acquire it" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 6. "RI,Receive Interrupt This bit indicates that the packet reception is complete" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 3.--5. "Reserved_5_3,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 2. "TBU,Transmit Buffer Unavailable This bit indicates that the application owns the next descriptor in the Transmit list and the DMA cannot acquire it" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 1. "TPS,Transmit Process Stopped This bit is set when the transmission is stopped" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "TI,Transmit Interrupt This bit indicates that the packet transmission is complete" "0: INACTIVE,1: ACTIVE" rgroup.long ad:0xC00BD264++0x07 line.long 0x00 "DMA_CH2_Miss_Frame_Cnt,This register has the number of packet counter that got dropped by the DMA either due to Bus Error or due to programming RPF field in DMA_CH2_Rx_Control register." hexmask.long.word 0x00 16.--31. 1. "Reserved_31_16,Reserved" newline bitfld.long 0x00 15. "MFCO,Overflow status of the MFC Counter When this bit is set then the MFC counter does not get incremented further" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11.--14. "Reserved_14_11,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. "MFC,Dropped Packet Counters This counter indicates the number of packet counters that are dropped by the DMA either because of bus error or because of programing RPF field in DMA_CH2_Rx_Control register" line.long 0x04 "DMA_CH2_RXP_Accept_Cnt,The DMA_CH2_RXP_Accept_Cnt registers provides the count of the number of frames accepted by Rx Parser." bitfld.long 0x04 31. "RXPACOF,Rx Parser Accept Counter Overflow Bit When set this bit indicates that the RXPAC Counter field crossed the maximum limit" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x04 0.--30. 1. "RXPAC,Rx Parser Accept Counter This 31-bit counter is implemented when a Rx Parser Accept a packet due to AF =1" tree.end tree "EQOS_DMA_CH3" group.long ad:0xC00BD280++0x0B line.long 0x00 "DMA_CH3_Control,The DMA Channel3 Control register specifies the MSS value for segmentation length to skip between two descriptors and also the features such as header splitting and 8xPBL mode." hexmask.long.byte 0x00 25.--31. 1. "Reserved_31_25,Reserved" newline bitfld.long 0x00 24. "SPH,Split Headers" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 21.--23. "Reserved_23_21,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "DSL,Descriptor Skip Length This bit specifies the Dword (64-bit) number of locations to skip between two descriptors" "0,1,2,3,4,5,6,7" newline rbitfld.long 0x00 17. "Reserved_17,Reserved" "0,1" newline bitfld.long 0x00 16. "PBLx8,8xPBL mode" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x00 14.--15. "Reserved_15_14,Reserved" "0,1,2,3" newline hexmask.long.word 0x00 0.--13. 1. "Reserved_MSS,Reserved" line.long 0x04 "DMA_CH3_Tx_Control,The DMA Channel3 Transmit Control register controls the Tx features such as PBL TCP segmentation and Tx Channel weights." rbitfld.long 0x04 31. "Reserved_31,Reserved" "0,1" newline bitfld.long 0x04 29.--30. "TFSEL,TBS Fetch Select Select bits for one of the four DMA_TBS_CTRL register fields (FTOS FGSN FTOV) for the channel Values" "0: DMA_TBS_CTRL0,1: DMA_TBS_CTRL1,2: DMA_TBS_CTRL2,3: DMA_TBS_CTRL3 (Reserved if" newline bitfld.long 0x04 28. "EDSE,Enhanced Descriptor Enable" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 24.--27. "TQOS,Transmit QOS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x04 23. "Reserved_23,Reserved" "0,1" newline rbitfld.long 0x04 22. "Reserved_ETIC,Reserved" "0,1" newline hexmask.long.byte 0x04 16.--21. 1. "TxPBL,Transmit Programmable Burst Length These bits indicate the maximum number of beats to be transferred in one DMA block data transfer" newline bitfld.long 0x04 15. "IPBL,Ignore PBL Requirement" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x04 13.--14. "Reserved_TSE_MODE,Reserved" "0,1,2,3" newline rbitfld.long 0x04 12. "Reserved_TSE,Reserved" "0,1" newline hexmask.long.byte 0x04 5.--11. 1. "Reserved_11_5,Reserved" newline bitfld.long 0x04 4. "OSF,Operate on Second Packet" "0: DISABLE,1: ENABLE" newline bitfld.long 0x04 1.--3. "TCW,Transmit Channel Weight This field indicates the weight assigned to the corresponding Tx channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. "ST,Start or Stop Transmission Command" "0: STOP,1: START" line.long 0x08 "DMA_CH3_Rx_Control,The DMA Channel3 Receive Control register controls the Rx features such as PBL buffer size and extended status." bitfld.long 0x08 31. "RPF,Rx Packet Flush" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x08 28.--30. "Reserved_30_28,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 24.--27. "RQOS,Rx AXI4 QOS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline rbitfld.long 0x08 23. "Reserved_23,Reserved" "0,1" newline rbitfld.long 0x08 22. "Reserved_ERIC,Reserved" "0,1" newline hexmask.long.byte 0x08 16.--21. 1. "RxPBL,Receive Programmable Burst Length These bits indicate the maximum number of beats to be transferred in one DMA block data transfer" newline rbitfld.long 0x08 15. "Reserved_15,Reserved" "0,1" newline hexmask.long.word 0x08 4.--14. 1. "RBSZ_13_y,Receive Buffer size High RBSZ[13:0] is split into two fields higher RBSZ_13_y and lower RBSZ_x_0" newline rbitfld.long 0x08 1.--3. "RBSZ_x_0,Receive Buffer size Low RBSZ[13:0] is split into two fields RBSZ_13_y and RBSZ_x_0" "0,1,2,3,4,5,6,7" newline bitfld.long 0x08 0. "SR,Start or Stop Receive" "0: STOP,1: START" group.long ad:0xC00BD294++0x03 line.long 0x00 "DMA_CH3_TxDesc_List_Address,The Channel3 Tx Descriptor List Address register points the DMA to the start of Transmit descriptor list. The descriptor lists reside in the physical memory space of the application and must be Dword (64-bit). The DMA.." hexmask.long 0x00 3.--31. 1. "TDESLA,Start of Transmit List This field contains the base address of the first descriptor in the Transmit descriptor list" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" group.long ad:0xC00BD29C++0x07 line.long 0x00 "DMA_CH3_RxDesc_List_Address,The Channel3 Rx Descriptor List Address register points the DMA to the start of Receive descriptor list. This register points to the start of the Receive Descriptor List. The descriptor lists reside in the physical memory.." hexmask.long 0x00 3.--31. 1. "RDESLA,Start of Receive List This field contains the base address of the first descriptor in the Rx Descriptor list" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" line.long 0x04 "DMA_CH3_TxDesc_Tail_Pointer,The Channel3 Tx Descriptor Tail Pointer register points to an offset from the base and indicates the location of the last valid descriptor." hexmask.long 0x04 3.--31. 1. "TDTP,Transmit Descriptor Tail Pointer This field contains the tail pointer for the Tx descriptor ring" newline rbitfld.long 0x04 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" group.long ad:0xC00BD2A8++0x17 line.long 0x00 "DMA_CH3_RxDesc_Tail_Pointer,The Channel3 Rx Descriptor Tail Pointer Points to an offset from the base and indicates the location of the last valid descriptor." hexmask.long 0x00 3.--31. 1. "RDTP,Receive Descriptor Tail Pointer This field contains the tail pointer for the Rx descriptor ring" newline rbitfld.long 0x00 0.--2. "Reserved_LSb,Reserved" "0,1,2,3,4,5,6,7" line.long 0x04 "DMA_CH3_TxDesc_Ring_Length,The Tx Descriptor Ring Length register contains the length of the Transmit descriptor ring." hexmask.long.tbyte 0x04 10.--31. 1. "Reserved_31_10,Reserved" newline hexmask.long.word 0x04 0.--9. 1. "TDRL,Transmit Descriptor Ring Length This field sets the maximum number of Tx descriptors in the circular descriptor ring" line.long 0x08 "DMA_CH3_Rx_Control2,The Channel3 Receive Control register controls the Rx features such as Rx Descriptor Ring Length and Alternate Rx Buffer Size." hexmask.long.byte 0x08 24.--31. 1. "Reserved_31_24,Reserved" newline hexmask.long.byte 0x08 17.--23. 1. "ARBS,Alternate Receive Buffer Size Indicates size in bytes for Buffer 1 when ARBS is programmed to a non-zero value (when split header feature is not enabled)" newline hexmask.long.byte 0x08 10.--16. 1. "Reserved_x_10,Reserved" newline hexmask.long.word 0x08 0.--9. 1. "RDRL,Receive Descriptor Ring Length This register sets the maximum number of Rx descriptors in the circular descriptor ring" line.long 0x0C "DMA_CH3_Interrupt_Enable,The Channel3 Interrupt Enable register enables the interrupts reported by the Status register." hexmask.long.word 0x0C 16.--31. 1. "Reserved_31_16,Reserved" newline bitfld.long 0x0C 15. "NIE,Normal Interrupt Summary Enable When this bit is set the normal interrupt summary is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 14. "AIE,Abnormal Interrupt Summary Enable When this bit is set the abnormal interrupt summary is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 13. "CDEE,Context Descriptor Error Enable When this bit is set along with the AIE bit the Descriptor error interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 12. "FBEE,Fatal Bus Error Enable When this bit is set along with the AIE bit the Fatal Bus error interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 11. "ERIE,Early Receive Interrupt Enable When this bit is set along with the NIE bit the Early Receive interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 10. "ETIE,Early Transmit Interrupt Enable When this bit is set along with the AIE bit the Early Transmit interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 9. "RWTE,Receive Watchdog Timeout Enable When this bit is set along with the AIE bit the Receive Watchdog Timeout interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 8. "RSE,Receive Stopped Enable When this bit is set along with the AIE bit the Receive Stopped Interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 7. "RBUE,Receive Buffer Unavailable Enable When this bit is set along with the AIE bit the Receive Buffer Unavailable interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 6. "RIE,Receive Interrupt Enable When this bit is set along with the NIE bit the Receive Interrupt is enabled" "0: DISABLE,1: ENABLE" newline rbitfld.long 0x0C 3.--5. "Reserved_5_3,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x0C 2. "TBUE,Transmit Buffer Unavailable Enable When this bit is set along with the NIE bit the Transmit Buffer Unavailable interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 1. "TXSE,Transmit Stopped Enable When this bit is set along with the AIE bit the Transmission Stopped interrupt is enabled" "0: DISABLE,1: ENABLE" newline bitfld.long 0x0C 0. "TIE,Transmit Interrupt Enable When this bit is set along with the NIE bit the Transmit Interrupt is enabled" "0: DISABLE,1: ENABLE" line.long 0x10 "DMA_CH3_Rx_Interrupt_Watchdog_Timer,The Receive Interrupt Watchdog Timer register indicates the watchdog timeout for Receive Interrupt (RI) from the DMA. When this register is written with a non-zero value it enables the watchdog timer for the RI bit of.." hexmask.long.word 0x10 18.--31. 1. "Reserved_31_18,Reserved" newline bitfld.long 0x10 16.--17. "RWTU,Receive Interrupt Watchdog Timer Count Units This fields indicates the number of system clock cycles corresponding to one unit in RWT field" "0:,1:,2:,3: 2048 For" newline hexmask.long.byte 0x10 8.--15. 1. "Reserved_15_8,Reserved" newline hexmask.long.byte 0x10 0.--7. 1. "RWT,Receive Interrupt Watchdog Timer Count This field indicates the number of system clock cycles multiplied by factor indicated in RWTU field for which the watchdog timer is set" line.long 0x14 "DMA_CH3_Slot_Function_Control_Status,The Slot Function Control and Status register contains the control bits for slot function and the status for Transmit path." hexmask.long.word 0x14 20.--31. 1. "Reserved_31_20,Reserved" newline rbitfld.long 0x14 16.--19. "RSN,Reference Slot Number This field gives the current value of the reference slot number in the DMA" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x14 4.--15. 1. "SIV,Slot Interval Value This field controls the period of the slot interval in which the TxDMA fetches the scheduled packets" newline rbitfld.long 0x14 2.--3. "Reserved_3_2,Reserved" "0,1,2,3" newline bitfld.long 0x14 1. "ASC,Advance Slot Check When set this bit enables the DMA to fetch the data from the buffer when the slot number (SLOTNUM) programmed in the Tx descriptor is - equal to the reference slot number given in the RSN field or - ahead of the reference slot.." "0: DISABLE,1: ENABLE" newline bitfld.long 0x14 0. "ESC,Enable Slot Comparison When set this bit enables the checking of the slot numbers programmed in the Tx descriptor with the current reference given in the RSN field" "0: DISABLE,1: ENABLE" rgroup.long ad:0xC00BD2C4++0x03 line.long 0x00 "DMA_CH3_Current_App_TxDesc,The Channel3 Current Application Transmit Descriptor register points to the current Transmit descriptor read by the DMA." rgroup.long ad:0xC00BD2CC++0x03 line.long 0x00 "DMA_CH3_Current_App_RxDesc,The Channel3 Current Application Receive Descriptor register points to the current Receive descriptor read by the DMA." rgroup.long ad:0xC00BD2D4++0x03 line.long 0x00 "DMA_CH3_Current_App_TxBuffer,The Channel3 Current Application Transmit Buffer Address register points to the current Tx buffer address read by the DMA." rgroup.long ad:0xC00BD2DC++0x03 line.long 0x00 "DMA_CH3_Current_App_RxBuffer,The Channel 3 Current Application Receive Buffer Address register points to the current Rx buffer address read by the DMA." group.long ad:0xC00BD2E0++0x03 line.long 0x00 "DMA_CH3_Status,The software driver (application) reads the Status register during interrupt service routine or polling to determine the status of the DMA. Note: The number of DMA_CH3_Status register in the configuration is the higher of number of Rx DMA.." hexmask.long.word 0x00 22.--31. 1. "Reserved_31_22,Reserved" newline rbitfld.long 0x00 19.--21. "REB,Rx DMA Error Bits This field indicates the type of error that caused a Bus Error" "0: Error during write transfer This field is valid,1: Error during read transfer,?..." newline rbitfld.long 0x00 16.--18. "TEB,Tx DMA Error Bits This field indicates the type of error that caused a Bus Error" "0: Error during write transfer This field is valid,1: Error during read transfer,?..." newline bitfld.long 0x00 15. "NIS,Normal Interrupt Summary Normal Interrupt Summary bit value is the logical OR of the following bits when the corresponding interrupt bits are enabled in the DMA_CH3_Interrupt_Enable register: - Bit" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 14. "AIS,Abnormal Interrupt Summary Abnormal Interrupt Summary bit value is the logical OR of the following when the corresponding interrupt bits are enabled in the DMA_CH3_Interrupt_Enable register: - Bit" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 13. "CDE,Context Descriptor Error This bit indicates that the DMA Tx/Rx engine received a descriptor error which indicates invalid context in the middle of packet flow ( intermediate descriptor) or all one's descriptor in Tx case and on Rx side it indicates.." "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 12. "FBE,Fatal Bus Error This bit indicates that a bus error occurred (as described in the EB field)" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11. "ERI,Early Receive Interrupt This bit when set indicates that the RxDMA has completed the transfer of packet data to the memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 10. "ETI,Early Transmit Interrupt This bit when set indicates that the TxDMA has completed the transfer of packet data to the MTL TXFIFO memory" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 9. "RWT,Receive Watchdog Timeout This bit is asserted when a packet with length greater than 2 048 bytes (10 240 bytes when Jumbo Packet mode is enabled) is received" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 8. "RPS,Receive Process Stopped This bit is asserted when the Rx process enters the Stopped state" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 7. "RBU,Receive Buffer Unavailable This bit indicates that the application owns the next descriptor in the Receive list and the DMA cannot acquire it" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 6. "RI,Receive Interrupt This bit indicates that the packet reception is complete" "0: INACTIVE,1: ACTIVE" newline rbitfld.long 0x00 3.--5. "Reserved_5_3,Reserved" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 2. "TBU,Transmit Buffer Unavailable This bit indicates that the application owns the next descriptor in the Transmit list and the DMA cannot acquire it" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 1. "TPS,Transmit Process Stopped This bit is set when the transmission is stopped" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 0. "TI,Transmit Interrupt This bit indicates that the packet transmission is complete" "0: INACTIVE,1: ACTIVE" rgroup.long ad:0xC00BD2E4++0x07 line.long 0x00 "DMA_CH3_Miss_Frame_Cnt,This register has the number of packet counter that got dropped by the DMA either due to Bus Error or due to programming RPF field in DMA_CH3_Rx_Control register." hexmask.long.word 0x00 16.--31. 1. "Reserved_31_16,Reserved" newline bitfld.long 0x00 15. "MFCO,Overflow status of the MFC Counter When this bit is set then the MFC counter does not get incremented further" "0: INACTIVE,1: ACTIVE" newline bitfld.long 0x00 11.--14. "Reserved_14_11,Reserved" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--10. 1. "MFC,Dropped Packet Counters This counter indicates the number of packet counters that are dropped by the DMA either because of bus error or because of programing RPF field in DMA_CH3_Rx_Control register" line.long 0x04 "DMA_CH3_RXP_Accept_Cnt,The DMA_CH3_RXP_Accept_Cnt registers provides the count of the number of frames accepted by Rx Parser." bitfld.long 0x04 31. "RXPACOF,Rx Parser Accept Counter Overflow Bit When set this bit indicates that the RXPAC Counter field crossed the maximum limit" "0: INACTIVE,1: ACTIVE" newline hexmask.long 0x04 0.--30. 1. "RXPAC,Rx Parser Accept Counter This 31-bit counter is implemented when a Rx Parser Accept a packet due to AF =1" tree.end tree "EQOS_RESERVED" group.long ad:0xC00BD500++0x03 line.long 0x00 "EQOS_RESERVED" button "DATA" "d ad:0xC00BD500--0xC00CBFFF /long" tree.end autoindent.off newline tree.end tree "GTM Ipxact 4160" autoindent.on center tree tree "GTM_CLS0" rgroup.long ad:0x94800000++0x03 line.long 0x00 "GTM_REV,GTM version control register" bitfld.long 0x00 28.--31. "VER_MAJOR,Major version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 24.--27. "VER_MINOR,Minor version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 20.--23. "DEVICE_CODE,Device encoding digit 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 16.--19. "VENDOR_CODE,Device encoding digit 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x00 4.--11. 1. "REL_BASE,Release step" bitfld.long 0x00 0.--3. "REL_ITER,Delivery number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long ad:0x94800004++0x0B line.long 0x00 "GTM_RST,GTM global reset register" bitfld.long 0x00 27. "BRIDGE_MODE_WRDIS,BRIDGE_MODE write disable" "0,1" bitfld.long 0x00 0. "RST,GTM IP Reset" "0,1" line.long 0x04 "GTM_CTRL,GTM global control register" rbitfld.long 0x04 12.--15. "AEIM_CLUSTER,AEIM cluster number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x04 4.--11. 1. "TO_VAL,AEI timeout value" bitfld.long 0x04 1.--2. "TO_MODE,AEI timeout mode" "0,1,2,3" newline bitfld.long 0x04 0. "RF_PROT,RST and FORCINT protection" "0,1" line.long 0x08 "GTM_CFG,GTM configuration register" bitfld.long 0x08 0. "SRC_IN_MUX,Input source selection for signal TIM[i]_AUX_IN ( input port AUX_IN at module TIM)" "0,1" rgroup.long ad:0x94800010++0x07 line.long 0x00 "GTM_AEI_ADDR_XPT,GTM AEI timeout exception address register" bitfld.long 0x00 24. "TO_W1R0,AEI timeout Read/Write flag" "0,1" hexmask.long.tbyte 0x00 0.--20. 1. "TO_ADDR,AEI timeout address" line.long 0x04 "GTM_AEI_STA_XPT,GTM AEI non zero status register" bitfld.long 0x04 24. "W1R0,AEI exception Read/Write flag" "0,1" hexmask.long.tbyte 0x04 0.--20. 1. "ADDR,AEI exception address" group.long ad:0x94800018++0x1B line.long 0x00 "GTM_IRQ_NOTIFY,GTM Interrupt notification register" bitfld.long 0x00 8. "CLK_PER_ERR,Clock period error interrupt" "0,1" bitfld.long 0x00 7. "CLK_EN_ERR,Clock enable error interrupt" "0,1" bitfld.long 0x00 6. "AEIM_USP_BE,AEI master port unsupported byte enable interrupt" "0,1" newline bitfld.long 0x00 5. "AEIM_IM_ADDR,AEI master port illegal Module address interrupt" "0,1" bitfld.long 0x00 4. "AEIM_USP_ADDR,AEI master port unsupported address interrupt" "0,1" bitfld.long 0x00 3. "AEI_USP_BE,AEI unsupported byte enable interrupt" "0,1" newline bitfld.long 0x00 2. "AEI_IM_ADDR,AEI illegal Module address interrupt" "0,1" bitfld.long 0x00 1. "AEI_USP_ADDR,AEI unsupported address interrupt" "0,1" bitfld.long 0x00 0. "AEI_TO_XPT,AEI timeout exception occurred" "0,1" line.long 0x04 "GTM_IRQ_EN,GTM interrupt enable register" bitfld.long 0x04 8. "CLK_PER_ERR_IRQ_EN,CLK_PER_ERR_IRQ interrupt enable" "0,1" bitfld.long 0x04 7. "CLK_EN_ERR_IRQ_EN,CLK_EN_ERR_IRQ interrupt enable" "0,1" bitfld.long 0x04 6. "AEIM_USP_BE_IRQ_EN,AEIM_USP_BE_IRQ interrupt enable" "0,1" newline bitfld.long 0x04 5. "AEIM_IM_ADDR_IRQ_EN,AEIM_IM_ADDR_IRQ interrupt enable" "0,1" bitfld.long 0x04 4. "AEIM_USP_ADDR_IRQ_EN,AEI_USP_ADDR_IRQ interrupt enable" "0,1" bitfld.long 0x04 3. "AEI_USP_BE_IRQ_EN,AEI_USP_BE_IRQ interrupt enable" "0,1" newline bitfld.long 0x04 2. "AEI_IM_ADDR_IRQ_EN,AEI_IM_ADDR_IRQ interrupt enable" "0,1" bitfld.long 0x04 1. "AEI_USP_ADDR_IRQ_EN,AEI_USP_ADDR_IRQ interrupt enable" "0,1" bitfld.long 0x04 0. "AEI_TO_XPT_IRQ_EN,AEI_TO_XPT_IRQ interrupt enable" "0,1" line.long 0x08 "GTM_EIRQ_EN,GTM error interrupt enable register" bitfld.long 0x08 8. "CLK_PER_ERR_EIRQ_EN,CLK_PER_ERR_EIRQ interrupt enable" "0,1" bitfld.long 0x08 7. "CLK_EN_ERR_EIRQ_EN,CLK_EN_ERR_EIRQ interrupt enable" "0,1" bitfld.long 0x08 6. "AEIM_USP_BE_EIRQ_EN,AEIM_USP_BE_EIRQ error interrupt enable" "0,1" newline bitfld.long 0x08 5. "AEIM_IM_ADDR_EIRQ_EN,AEIM_IM_ADDR_EIRQ error interrupt enable" "0,1" bitfld.long 0x08 4. "AEIM_USP_ADDR_EIRQ_EN,AEIM_USP_ADDR_EIRQ error interrupt enable" "0,1" bitfld.long 0x08 3. "AEI_USP_BE_EIRQ_EN,AEI_USP_BE_EIRQ error interrupt enable" "0,1" newline bitfld.long 0x08 2. "AEI_IM_ADDR_EIRQ_EN,AEI_IM_ADDR_EIRQ error interrupt enable" "0,1" bitfld.long 0x08 1. "AEI_USP_ADDR_EIRQ_EN,AEI_USP_ADDR_EIRQ error interrupt enable" "0,1" bitfld.long 0x08 0. "AEI_TO_XPT_EIRQ_EN,AEI_TO_XPT_EIRQ error interrupt enable" "0,1" line.long 0x0C "GTM_IRQ_FORCINT,GTM Software interrupt generation register" bitfld.long 0x0C 8. "TRG_CLK_PER_ERR,Trigger the bit GTM_IRQ_NOTIFY.CLK_PER_ERR by software" "0,1" bitfld.long 0x0C 7. "TRG_CLK_EN_ERR,Trigger the bit GTM_IRQ_NOTIFY.CLK_EN_ERR by software" "0,1" bitfld.long 0x0C 6. "TRG_AEIM_USP_BE,Trigger the bit GTM_IRQ_NOTIFY.AEIM_USP_BE by software" "0,1" newline bitfld.long 0x0C 5. "TRG_AEIM_IM_ADDR,Trigger the bit GTM_IRQ_NOTIFY.AEIM_IM_ADDR by software" "0,1" bitfld.long 0x0C 4. "TRG_AEIM_USP_ADDR,Trigger the bit GTM_IRQ_NOTIFY.AEIM_USP_ADDR by software" "0,1" bitfld.long 0x0C 3. "TRG_AEI_USP_BE,Trigger the bit GTM_IRQ_NOTIFY.AEI_USP_BE by software" "0,1" newline bitfld.long 0x0C 2. "TRG_AEI_IM_ADDR,Trigger the bit GTM_IRQ_NOTIFY.AEI_IM_ADDR by software" "0,1" bitfld.long 0x0C 1. "TRG_AEI_USP_ADDR,Trigger the bit GTM_IRQ_NOTIFY.AEI_USP_ADDR by software" "0,1" bitfld.long 0x0C 0. "TRG_AEI_TO_XPT,Trigger the bit GTM_IRQ_NOTIFY.AEI_TO_XPT by software" "0,1" line.long 0x10 "GTM_IRQ_MODE,GTM top level interrupts mode selection" bitfld.long 0x10 0.--1. "IRQ_MODE,Interrupt strategy mode selection for the AEI timeout and address monitoring interrupts" "0,1,2,3" line.long 0x14 "GTM_CLS_CLK_CFG,GTM Cluster Clock Configuration" bitfld.long 0x14 6.--7. "CLS3_CLK_DIV,Cluster [j] Clock Divider" "0,1,2,3" bitfld.long 0x14 4.--5. "CLS2_CLK_DIV,Cluster [j] Clock Divider" "0,1,2,3" bitfld.long 0x14 2.--3. "CLS1_CLK_DIV,Cluster [j] Clock Divider" "0,1,2,3" newline bitfld.long 0x14 0.--1. "CLS0_CLK_DIV,Cluster [j] Clock Divider" "0,1,2,3" line.long 0x18 "GTM_ARU_COM_DIS,GTM ARU communication disable" bitfld.long 0x18 3. "CLS3_DIS,Disable cluster [j] ARU communication" "0,1" bitfld.long 0x18 2. "CLS2_DIS,Disable cluster [j] ARU communication" "0,1" bitfld.long 0x18 1. "CLS1_DIS,Disable cluster [j] ARU communication" "0,1" newline bitfld.long 0x18 0. "CLS0_DIS,Disable cluster [j] ARU communication" "0,1" group.long ad:0x94800040++0x03 line.long 0x00 "BRIDGE_MODE,GTM AEI bridge mode register" hexmask.long.byte 0x00 24.--31. 1. "BUFF_DPT,Buffer depth of AEI bridge" bitfld.long 0x00 16. "BRG_RST,Bridge software reset" "0,1" rbitfld.long 0x00 12. "SYNC_INPUT_REG,Additional pipelined stage in synchronous bridge mode" "0,1" newline bitfld.long 0x00 9. "BUFF_OVL,Buffer overflow register" "0,1" rbitfld.long 0x00 8. "MODE_UP_PGR,Mode update in progress" "0,1" bitfld.long 0x00 2. "BYPASS_SYNC,Bypass synchronizer flip-flops" "0,1" newline bitfld.long 0x00 1. "MSK_WR_RSP,Mask write response" "0,1" bitfld.long 0x00 0. "BRG_MODE,Defines the operation mode for the AEI bridge" "0,1" rgroup.long ad:0x94800044++0x07 line.long 0x00 "BRIDGE_PTR1,GTM AEI bridge pointer 1 register" hexmask.long.byte 0x00 26.--31. 1. "RSP_TRAN_RDY,Response transactions ready" hexmask.long.byte 0x00 20.--25. 1. "FBC,Free buffer count" bitfld.long 0x00 15.--19. "ABT_TRAN_PGR,Aborted transaction in progress pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 10.--14. "TRAN_IN_PGR,Transaction in progress pointer (acquire)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 5.--9. "FIRST_RSP_PTR,First response pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 0.--4. "NEW_TRAN_PTR,New transaction pointer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x04 "BRIDGE_PTR2,GTM AEI bridge pointer 2 register" bitfld.long 0x04 0.--4. "TRAN_IN_PGR2,Transaction in progress pointer (aquire2)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x9480004C++0x03 line.long 0x00 "MCS_AEM_DIS,GTM MCS master port disable register" bitfld.long 0x00 6.--7. "DIS_CLS3,Disable MCS AEIM access in cluster [j]" "0,1,2,3" bitfld.long 0x00 4.--5. "DIS_CLS2,Disable MCS AEIM access in cluster [j]" "0,1,2,3" bitfld.long 0x00 2.--3. "DIS_CLS1,Disable MCS AEIM access in cluster [j]" "0,1,2,3" newline bitfld.long 0x00 0.--1. "DIS_CLS0,Disable MCS AEIM access in cluster [j]" "0,1,2,3" group.long ad:0x94800080++0x4F line.long 0x00 "CMU_CLK_EN,CMU clock enable" bitfld.long 0x00 22.--23. "EN_FXCLK,Enable clock resolution CMU_FXCLK_RES" "0,1,2,3" bitfld.long 0x00 20.--21. "EN_ECLK2,Enable clock CMU_ECLK[z:z]" "0,1,2,3" bitfld.long 0x00 18.--19. "EN_ECLK1,Enable clock CMU_ECLK[z:z]" "0,1,2,3" newline bitfld.long 0x00 16.--17. "EN_ECLK0,Enable clock CMU_ECLK[z:z]" "0,1,2,3" bitfld.long 0x00 14.--15. "EN_CLK7,Enable clock resolution CMU_CLK_RES[x:x]" "0,1,2,3" bitfld.long 0x00 12.--13. "EN_CLK6,Enable clock resolution CMU_CLK_RES[x:x]" "0,1,2,3" newline bitfld.long 0x00 10.--11. "EN_CLK5,Enable clock resolution CMU_CLK_RES[x:x]" "0,1,2,3" bitfld.long 0x00 8.--9. "EN_CLK4,Enable clock resolution CMU_CLK_RES[x:x]" "0,1,2,3" bitfld.long 0x00 6.--7. "EN_CLK3,Enable clock resolution CMU_CLK_RES[x:x]" "0,1,2,3" newline bitfld.long 0x00 4.--5. "EN_CLK2,Enable clock resolution CMU_CLK_RES[x:x]" "0,1,2,3" bitfld.long 0x00 2.--3. "EN_CLK1,Enable clock resolution CMU_CLK_RES[x:x]" "0,1,2,3" bitfld.long 0x00 0.--1. "EN_CLK0,Enable clock resolution CMU_CLK_RES[x:x]" "0,1,2,3" line.long 0x04 "CMU_GCLK_NUM,The numerator for CMU global clock resolution generator" hexmask.long.tbyte 0x04 0.--23. 1. "GCLK_NUM,Numerator for global clock resolution generator" line.long 0x08 "CMU_GCLK_DEN,The denominator for CMU global clock resolution generator" hexmask.long.tbyte 0x08 0.--23. 1. "GCLK_DEN,Denominator for global resolution generator" line.long 0x0C "CMU_CLK_0_CTRL,CMU control for clock resolution generator [x]" hexmask.long.tbyte 0x0C 0.--23. 1. "CLK_CNT,Clock count" line.long 0x10 "CMU_CLK_1_CTRL,CMU control for clock resolution generator [x]" hexmask.long.tbyte 0x10 0.--23. 1. "CLK_CNT,Clock count" line.long 0x14 "CMU_CLK_2_CTRL,CMU control for clock resolution generator [x]" hexmask.long.tbyte 0x14 0.--23. 1. "CLK_CNT,Clock count" line.long 0x18 "CMU_CLK_3_CTRL,CMU control for clock resolution generator [x]" hexmask.long.tbyte 0x18 0.--23. 1. "CLK_CNT,Clock count" line.long 0x1C "CMU_CLK_4_CTRL,CMU control for clock resolution generator [x]" hexmask.long.tbyte 0x1C 0.--23. 1. "CLK_CNT,Clock count" line.long 0x20 "CMU_CLK_5_CTRL,CMU control for clock resolution generator [x]" hexmask.long.tbyte 0x20 0.--23. 1. "CLK_CNT,Clock count" line.long 0x24 "CMU_CLK_6_CTRL,CMU control for clock resolution generator 6" bitfld.long 0x24 24.--25. "CLK_SEL,Source selection" "0,1,2,3" hexmask.long.tbyte 0x24 0.--23. 1. "CLK_CNT,Clock count" line.long 0x28 "CMU_CLK_7_CTRL,CMU control for clock resolution generator 7" bitfld.long 0x28 24.--25. "CLK_SEL,Source selection" "0,1,2,3" hexmask.long.tbyte 0x28 0.--23. 1. "CLK_CNT,Clock count" line.long 0x2C "CMU_ECLK_0_NUM,The numerator for the external clock resolution generator [z]" hexmask.long.tbyte 0x2C 0.--23. 1. "ECLK_NUM,The numerator for external clock resolution generator" line.long 0x30 "CMU_ECLK_0_DEN,The denominator for the external clock resolution generator [z]" hexmask.long.tbyte 0x30 0.--23. 1. "ECLK_DEN,The denominator for external clock resolution generator" line.long 0x34 "CMU_ECLK_1_NUM,The numerator for the external clock resolution generator [z]" hexmask.long.tbyte 0x34 0.--23. 1. "ECLK_NUM,The numerator for external clock resolution generator" line.long 0x38 "CMU_ECLK_1_DEN,The denominator for the external clock resolution generator [z]" hexmask.long.tbyte 0x38 0.--23. 1. "ECLK_DEN,The denominator for external clock resolution generator" line.long 0x3C "CMU_ECLK_2_NUM,The numerator for the external clock resolution generator [z]" hexmask.long.tbyte 0x3C 0.--23. 1. "ECLK_NUM,The numerator for external clock resolution generator" line.long 0x40 "CMU_ECLK_2_DEN,The denominator for the external clock resolution generator [z]" hexmask.long.tbyte 0x40 0.--23. 1. "ECLK_DEN,The denominator for external clock resolution generator" line.long 0x44 "CMU_FXCLK_CTRL,CMU control for selection of FCR subblock input" bitfld.long 0x44 0.--3. "FXCLK_SEL,Input selection for EN_FXCLK line" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x48 "CMU_GLB_CTRL,CMU synchronizing ARU and clock source" bitfld.long 0x48 0. "ARU_ADDR_RSTGLB,Reset ARU caddr counter and ARU dynamic route counter" "0,1" line.long 0x4C "CMU_CLK_CTRL,CMU control for clock resolution generator" bitfld.long 0x4C 8. "CLK8_EXT_DIVIDER,Source selection for CMU_CLK_RES[8:8]" "0,1" bitfld.long 0x4C 7. "CLK7_EXT_DIVIDER,Input selection for Clock Resolution Generator [x]" "0,1" bitfld.long 0x4C 6. "CLK6_EXT_DIVIDER,Input selection for Clock Resolution Generator [x]" "0,1" newline bitfld.long 0x4C 5. "CLK5_EXT_DIVIDER,Input selection for Clock Resolution Generator [x]" "0,1" bitfld.long 0x4C 4. "CLK4_EXT_DIVIDER,Input selection for Clock Resolution Generator [x]" "0,1" bitfld.long 0x4C 3. "CLK3_EXT_DIVIDER,Input selection for Clock Resolution Generator [x]" "0,1" newline bitfld.long 0x4C 2. "CLK2_EXT_DIVIDER,Input selection for Clock Resolution Generator [x]" "0,1" bitfld.long 0x4C 1. "CLK1_EXT_DIVIDER,Input selection for Clock Resolution Generator [x]" "0,1" bitfld.long 0x4C 0. "CLK0_EXT_DIVIDER,Input selection for Clock Resolution Generator [x]" "0,1" group.long ad:0x94800100++0x27 line.long 0x00 "TBU_CHEN,TBU global channel enable" bitfld.long 0x00 6.--7. "ENDIS_CH3,TBU channel [y] enable/disable control" "0,1,2,3" bitfld.long 0x00 4.--5. "ENDIS_CH2,TBU channel [y] enable/disable control" "0,1,2,3" bitfld.long 0x00 2.--3. "ENDIS_CH1,TBU channel [y] enable/disable control" "0,1,2,3" newline bitfld.long 0x00 0.--1. "ENDIS_CH0,TBU channel [y] enable/disable control" "0,1,2,3" line.long 0x04 "TBU_CH0_CTRL,TBU channel 0 control" bitfld.long 0x04 1.--3. "CH_CLK_SRC,Clock source for channel 0 channel 1 and channel 2 time base counter" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0. "LOW_RES,TBU_CH0_BASE register resolution" "0,1" line.long 0x08 "TBU_CH0_BASE,TBU channel 0 base" hexmask.long 0x08 0.--26. 1. "BASE,Time base value for channel 0" line.long 0x0C "TBU_CH1_CTRL,TBU channel 1 control" bitfld.long 0x0C 1.--3. "CH_CLK_SRC,Clock source for channel 1 time base counter" "0,1,2,3,4,5,6,7" bitfld.long 0x0C 0. "CH_MODE,Channel mode" "0,1" line.long 0x10 "TBU_CH1_BASE,TBU channel [x] base" hexmask.long.tbyte 0x10 0.--23. 1. "BASE,Time base value for channel [x]" line.long 0x14 "TBU_CH2_CTRL,TBU channel 2 control" bitfld.long 0x14 1.--3. "CH_CLK_SRC,Clock source for channel 2 time base counter" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "CH_MODE,Channel mode" "0,1" line.long 0x18 "TBU_CH2_BASE,TBU channel [x] base" hexmask.long.tbyte 0x18 0.--23. 1. "BASE,Time base value for channel [x]" line.long 0x1C "TBU_CH3_CTRL,TBU channel 3 control" bitfld.long 0x1C 4. "USE_CH2,Channel selector for modulo counter" "0,1" rbitfld.long 0x1C 0. "CH_MODE,Channel mode" "0,1" line.long 0x20 "TBU_CH3_BASE,TBU channel 3 base" hexmask.long.tbyte 0x20 0.--23. 1. "BASE,Time base value for channel 3" line.long 0x24 "TBU_CH3_BASE_MARK,TBU channel 3 modulo value" hexmask.long.tbyte 0x24 0.--23. 1. "BASE_MARK,Modulo value for channel 3" rgroup.long ad:0x94800128++0x03 line.long 0x00 "TBU_CH3_BASE_CAPTURE,TBU channel 3 base captured" hexmask.long.tbyte 0x00 0.--23. 1. "BASE_CAPTURE,Captured value of time base channel 1 or channel 2" group.long ad:0x94800180++0x0F line.long 0x00 "ARU_ACCESS,ARU access register" bitfld.long 0x00 13. "WREQ,Initiate write request" "0,1" bitfld.long 0x00 12. "RREQ,Initiate read request" "0,1" hexmask.long.word 0x00 0.--8. 1. "ADDR,ARU address" line.long 0x04 "ARU_DATA_H,ARU access register upper data word" hexmask.long 0x04 0.--28. 1. "DATA,Upper ARU data word" line.long 0x08 "ARU_DATA_L,ARU access register lower data word" hexmask.long 0x08 0.--28. 1. "DATA,Lower ARU data word" line.long 0x0C "ARU_DBG_ACCESS0,ARU debug access channel 0" hexmask.long.word 0x0C 0.--8. 1. "ADDR,ARU debugging address" rgroup.long ad:0x94800190++0x07 line.long 0x00 "ARU_DBG_DATA0_H,ARU debug access 0 transfer register upper data word" hexmask.long 0x00 0.--28. 1. "DATA,Upper debug data word" line.long 0x04 "ARU_DBG_DATA0_L,ARU debug access 0 transfer register lower data word" hexmask.long 0x04 0.--28. 1. "DATA,Lower debug data word" group.long ad:0x94800198++0x03 line.long 0x00 "ARU_DBG_ACCESS1,ARU debug access channel 0" hexmask.long.word 0x00 0.--8. 1. "ADDR,ARU debugging address" rgroup.long ad:0x9480019C++0x07 line.long 0x00 "ARU_DBG_DATA1_H,ARU debug access 1 transfer register upper data word" hexmask.long 0x00 0.--28. 1. "DATA,Upper debug data word" line.long 0x04 "ARU_DBG_DATA1_L,ARU debug access 1 transfer register lower data word" hexmask.long 0x04 0.--28. 1. "DATA,Lower debug data word" group.long ad:0x948001A4++0x13 line.long 0x00 "ARU_IRQ_NOTIFY,ARU interrupt notification register" bitfld.long 0x00 2. "ACC_ACK,AEI to ARU access finished on read access data are valid" "0,1" bitfld.long 0x00 1. "NEW_DATA1,Data was transferred for addr ARU_DBG_ACCESS1" "0,1" bitfld.long 0x00 0. "NEW_DATA0,Data was transferred for addr ARU_DBG_ACCESS0" "0,1" line.long 0x04 "ARU_IRQ_EN,ARU interrupt enable register" bitfld.long 0x04 2. "ACC_ACK_IRQ_EN,ARU_ACC_ACK_IRQ interrupt enable" "0,1" bitfld.long 0x04 1. "NEW_DATA1_IRQ_EN,ARU_NEW_DATA1_IRQ interrupt enable" "0,1" bitfld.long 0x04 0. "NEW_DATA0_IRQ_EN,ARU_NEW_DATA0_IRQ interrupt enable" "0,1" line.long 0x08 "ARU_IRQ_FORCINT,ARU force interrupt register" bitfld.long 0x08 2. "TRG_ACC_ACK,Trigger the bit ARU_IRQ_NOTIFY.ACC_ACK by software" "0,1" bitfld.long 0x08 1. "TRG_NEW_DATA1,Trigger the bit ARU_IRQ_NOTIFY.NEW_DATA1 by software" "0,1" bitfld.long 0x08 0. "TRG_NEW_DATA0,Trigger the bit ARU_IRQ_NOTIFY.NEW_DATA0 by software" "0,1" line.long 0x0C "ARU_IRQ_MODE,ARU interrupt mode register" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "ARU_CADDR_END,ARU caddr counter end value" hexmask.long.byte 0x10 0.--6. 1. "CADDR_END,Set end value of ARU caddr counter" group.long ad:0x948001BC++0x33 line.long 0x00 "ARU_CTRL,ARU enable dynamic routing" bitfld.long 0x00 4. "ARU_DYN_RING_MODE,Enable dynamic routing ring mode" "0,1" bitfld.long 0x00 2.--3. "ARU_1_DYN_EN,Enable dynamic routing for ARU of sub-channel k" "0,1,2,3" bitfld.long 0x00 0.--1. "ARU_0_DYN_EN,Enable dynamic routing for ARU of sub-channel k" "0,1,2,3" line.long 0x04 "ARU_0_DYN_CTRL,ARU [g] dynamic routing control register" bitfld.long 0x04 1. "DYN_ROUTE_SWAP,Enable swapping DYN_ROUTE_SR with DYN_ROUTE register" "0,1" bitfld.long 0x04 0. "DYN_ARU_UPDATE_EN,Enable reload of DYN_ROUTE register from ARU itself" "0,1" line.long 0x08 "ARU_1_DYN_CTRL,ARU [g] dynamic routing control register" bitfld.long 0x08 1. "DYN_ROUTE_SWAP,Enable swapping DYN_ROUTE_SR with DYN_ROUTE register" "0,1" bitfld.long 0x08 0. "DYN_ARU_UPDATE_EN,Enable reload of DYN_ROUTE register from ARU itself" "0,1" line.long 0x0C "ARU_0_DYN_ROUTE_LOW,ARU [g] lower bits of DYN_ROUTE register" hexmask.long.byte 0x0C 16.--23. 1. "DYN_READ_ID2,ARU master ID_2" hexmask.long.byte 0x0C 8.--15. 1. "DYN_READ_ID1,ARU master ID_1" hexmask.long.byte 0x0C 0.--7. 1. "DYN_READ_ID0,ARU master ID_0" line.long 0x10 "ARU_1_DYN_ROUTE_LOW,ARU [g] lower bits of DYN_ROUTE register" hexmask.long.byte 0x10 16.--23. 1. "DYN_READ_ID2,ARU master ID_2" hexmask.long.byte 0x10 8.--15. 1. "DYN_READ_ID1,ARU master ID_1" hexmask.long.byte 0x10 0.--7. 1. "DYN_READ_ID0,ARU master ID_0" line.long 0x14 "ARU_0_DYN_ROUTE_HIGH,ARU [g] higher bits of DYN_ROUTE register" bitfld.long 0x14 24.--27. "DYN_CLK_WAIT,Number of clk cycles for dynamic routing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x14 16.--23. 1. "DYN_READ_ID5,ARU master ID_5" hexmask.long.byte 0x14 8.--15. 1. "DYN_READ_ID4,ARU master ID_4" newline hexmask.long.byte 0x14 0.--7. 1. "DYN_READ_ID3,ARU master ID_3" line.long 0x18 "ARU_1_DYN_ROUTE_HIGH,ARU [g] higher bits of DYN_ROUTE register" bitfld.long 0x18 24.--27. "DYN_CLK_WAIT,Number of clk cycles for dynamic routing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x18 16.--23. 1. "DYN_READ_ID5,ARU master ID_5" hexmask.long.byte 0x18 8.--15. 1. "DYN_READ_ID4,ARU master ID_4" newline hexmask.long.byte 0x18 0.--7. 1. "DYN_READ_ID3,ARU master ID_3" line.long 0x1C "ARU_0_DYN_ROUTE_SR_LOW,ARU [g] shadow register of DYN_ROUTE register lower bits" hexmask.long.byte 0x1C 16.--23. 1. "DYN_READ_ID8,ARU master ID_8" hexmask.long.byte 0x1C 8.--15. 1. "DYN_READ_ID7,ARU master ID_7" hexmask.long.byte 0x1C 0.--7. 1. "DYN_READ_ID6,ARU master ID_6" line.long 0x20 "ARU_1_DYN_ROUTE_SR_LOW,ARU [g] shadow register of DYN_ROUTE register lower bits" hexmask.long.byte 0x20 16.--23. 1. "DYN_READ_ID8,ARU master ID_8" hexmask.long.byte 0x20 8.--15. 1. "DYN_READ_ID7,ARU master ID_7" hexmask.long.byte 0x20 0.--7. 1. "DYN_READ_ID6,ARU master ID_6" line.long 0x24 "ARU_0_DYN_ROUTE_SR_HIGH,ARU [g] shadow register of DYN_ROUTE register higher bits" bitfld.long 0x24 28. "DYN_UPDATE_EN,Update enable from shadow register" "0,1" bitfld.long 0x24 24.--27. "DYN_CLK_WAIT,Number of clk cycles for dynamic routing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x24 16.--23. 1. "DYN_READ_ID11,ARU master ID_11" newline hexmask.long.byte 0x24 8.--15. 1. "DYN_READ_ID10,ARU master ID_10" hexmask.long.byte 0x24 0.--7. 1. "DYN_READ_ID9,ARU master ID_9" line.long 0x28 "ARU_1_DYN_ROUTE_SR_HIGH,ARU [g] shadow register of DYN_ROUTE register higher bits" bitfld.long 0x28 28. "DYN_UPDATE_EN,Update enable from shadow register" "0,1" bitfld.long 0x28 24.--27. "DYN_CLK_WAIT,Number of clk cycles for dynamic routing" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.byte 0x28 16.--23. 1. "DYN_READ_ID11,ARU master ID_11" newline hexmask.long.byte 0x28 8.--15. 1. "DYN_READ_ID10,ARU master ID_10" hexmask.long.byte 0x28 0.--7. 1. "DYN_READ_ID9,ARU master ID_9" line.long 0x2C "ARU_0_DYN_RDADDR,ARU [g] master ID for dynamic routing" hexmask.long.word 0x2C 0.--8. 1. "DYN_ARU_RDADDR,ARU read address ID to reload the dynamic routing register" line.long 0x30 "ARU_1_DYN_RDADDR,ARU [g] master ID for dynamic routing" hexmask.long.word 0x30 0.--8. 1. "DYN_ARU_RDADDR,ARU read address ID to reload the dynamic routing register" rgroup.long ad:0x948001FC++0x03 line.long 0x00 "ARU_CADDR,ARU caddr counter value" hexmask.long.byte 0x00 16.--22. 1. "CADDR_1,Value of ARU_1 caddr counter" hexmask.long.byte 0x00 0.--6. 1. "CADDR_0,Value of ARU_0 caddr counter" group.long ad:0x94800200++0x77 line.long 0x00 "BRC_SRC_0_ADDR,BRC read address for input channel [x]" bitfld.long 0x00 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x00 0.--8. 1. "ADDR,Source ARU address" line.long 0x04 "BRC_SRC_0_DEST,BRC destination channels for input channel [x]" bitfld.long 0x04 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x04 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x04 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x04 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x04 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x04 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x04 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x04 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x04 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x04 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x08 "BRC_SRC_1_ADDR,BRC read address for input channel [x]" bitfld.long 0x08 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x08 0.--8. 1. "ADDR,Source ARU address" line.long 0x0C "BRC_SRC_1_DEST,BRC destination channels for input channel [x]" bitfld.long 0x0C 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x0C 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x0C 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x0C 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x0C 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x0C 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x0C 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x0C 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x0C 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x0C 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x10 "BRC_SRC_2_ADDR,BRC read address for input channel [x]" bitfld.long 0x10 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x10 0.--8. 1. "ADDR,Source ARU address" line.long 0x14 "BRC_SRC_2_DEST,BRC destination channels for input channel [x]" bitfld.long 0x14 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x14 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x14 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x14 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x14 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x14 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x14 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x14 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x14 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x14 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x18 "BRC_SRC_3_ADDR,BRC read address for input channel [x]" bitfld.long 0x18 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x18 0.--8. 1. "ADDR,Source ARU address" line.long 0x1C "BRC_SRC_3_DEST,BRC destination channels for input channel [x]" bitfld.long 0x1C 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x1C 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x1C 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x1C 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x1C 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x1C 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x1C 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x1C 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x1C 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x1C 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x20 "BRC_SRC_4_ADDR,BRC read address for input channel [x]" bitfld.long 0x20 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x20 0.--8. 1. "ADDR,Source ARU address" line.long 0x24 "BRC_SRC_4_DEST,BRC destination channels for input channel [x]" bitfld.long 0x24 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x24 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x24 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x24 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x24 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x24 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x24 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x24 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x24 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x24 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x28 "BRC_SRC_5_ADDR,BRC read address for input channel [x]" bitfld.long 0x28 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x28 0.--8. 1. "ADDR,Source ARU address" line.long 0x2C "BRC_SRC_5_DEST,BRC destination channels for input channel [x]" bitfld.long 0x2C 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x2C 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x2C 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x2C 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x2C 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x2C 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x2C 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x2C 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x2C 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x2C 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x30 "BRC_SRC_6_ADDR,BRC read address for input channel [x]" bitfld.long 0x30 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x30 0.--8. 1. "ADDR,Source ARU address" line.long 0x34 "BRC_SRC_6_DEST,BRC destination channels for input channel [x]" bitfld.long 0x34 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x34 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x34 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x34 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x34 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x34 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x34 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x34 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x34 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x34 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x38 "BRC_SRC_7_ADDR,BRC read address for input channel [x]" bitfld.long 0x38 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x38 0.--8. 1. "ADDR,Source ARU address" line.long 0x3C "BRC_SRC_7_DEST,BRC destination channels for input channel [x]" bitfld.long 0x3C 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x3C 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x3C 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x3C 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x3C 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x3C 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x3C 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x3C 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x3C 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x3C 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x40 "BRC_SRC_8_ADDR,BRC read address for input channel [x]" bitfld.long 0x40 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x40 0.--8. 1. "ADDR,Source ARU address" line.long 0x44 "BRC_SRC_8_DEST,BRC destination channels for input channel [x]" bitfld.long 0x44 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x44 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x44 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x44 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x44 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x44 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x44 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x44 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x44 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x44 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x48 "BRC_SRC_9_ADDR,BRC read address for input channel [x]" bitfld.long 0x48 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x48 0.--8. 1. "ADDR,Source ARU address" line.long 0x4C "BRC_SRC_9_DEST,BRC destination channels for input channel [x]" bitfld.long 0x4C 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x4C 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x4C 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x4C 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x4C 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x4C 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x4C 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x4C 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x4C 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x4C 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x50 "BRC_SRC_10_ADDR,BRC read address for input channel [x]" bitfld.long 0x50 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x50 0.--8. 1. "ADDR,Source ARU address" line.long 0x54 "BRC_SRC_10_DEST,BRC destination channels for input channel [x]" bitfld.long 0x54 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x54 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x54 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x54 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x54 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x54 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x54 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x54 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x54 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x54 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x58 "BRC_SRC_11_ADDR,BRC read address for input channel [x]" bitfld.long 0x58 12. "BRC_MODE,BRC Operation mode select" "0,1" hexmask.long.word 0x58 0.--8. 1. "ADDR,Source ARU address" line.long 0x5C "BRC_SRC_11_DEST,BRC destination channels for input channel [x]" bitfld.long 0x5C 22. "EN_TRASHBIN,Control trash bin functionality" "0,1" bitfld.long 0x5C 21. "EN_DEST21,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 20. "EN_DEST20,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x5C 19. "EN_DEST19,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 18. "EN_DEST18,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 17. "EN_DEST17,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x5C 16. "EN_DEST16,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 15. "EN_DEST15,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 14. "EN_DEST14,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x5C 13. "EN_DEST13,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 12. "EN_DEST12,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 11. "EN_DEST11,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x5C 10. "EN_DEST10,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 9. "EN_DEST9,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 8. "EN_DEST8,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x5C 7. "EN_DEST7,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 6. "EN_DEST6,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 5. "EN_DEST5,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x5C 4. "EN_DEST4,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 3. "EN_DEST3,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 2. "EN_DEST2,Enable BRC destination address [z]" "0,1" newline bitfld.long 0x5C 1. "EN_DEST1,Enable BRC destination address [z]" "0,1" bitfld.long 0x5C 0. "EN_DEST0,Enable BRC destination address [z]" "0,1" line.long 0x60 "BRC_IRQ_NOTIFY,BRC interrupt notification register" bitfld.long 0x60 12. "DID11,Data inconsistency occurred in MTM mode for channel [x]" "0,1" bitfld.long 0x60 11. "DID10,Data inconsistency occurred in MTM mode for channel [x]" "0,1" bitfld.long 0x60 10. "DID9,Data inconsistency occurred in MTM mode for channel [x]" "0,1" newline bitfld.long 0x60 9. "DID8,Data inconsistency occurred in MTM mode for channel [x]" "0,1" bitfld.long 0x60 8. "DID7,Data inconsistency occurred in MTM mode for channel [x]" "0,1" bitfld.long 0x60 7. "DID6,Data inconsistency occurred in MTM mode for channel [x]" "0,1" newline bitfld.long 0x60 6. "DID5,Data inconsistency occurred in MTM mode for channel [x]" "0,1" bitfld.long 0x60 5. "DID4,Data inconsistency occurred in MTM mode for channel [x]" "0,1" bitfld.long 0x60 4. "DID3,Data inconsistency occurred in MTM mode for channel [x]" "0,1" newline bitfld.long 0x60 3. "DID2,Data inconsistency occurred in MTM mode for channel [x]" "0,1" bitfld.long 0x60 2. "DID1,Data inconsistency occurred in MTM mode for channel [x]" "0,1" bitfld.long 0x60 1. "DID0,Data inconsistency occurred in MTM mode for channel [x]" "0,1" newline bitfld.long 0x60 0. "DEST_ERR,Configuration error interrupt for BRC sub-module" "0,1" line.long 0x64 "BRC_IRQ_EN,BRC interrupt enable register" bitfld.long 0x64 12. "DID_IRQ_EN11,Enable BRC_DID_IRQ for channel [x]" "0,1" bitfld.long 0x64 11. "DID_IRQ_EN10,Enable BRC_DID_IRQ for channel [x]" "0,1" bitfld.long 0x64 10. "DID_IRQ_EN9,Enable BRC_DID_IRQ for channel [x]" "0,1" newline bitfld.long 0x64 9. "DID_IRQ_EN8,Enable BRC_DID_IRQ for channel [x]" "0,1" bitfld.long 0x64 8. "DID_IRQ_EN7,Enable BRC_DID_IRQ for channel [x]" "0,1" bitfld.long 0x64 7. "DID_IRQ_EN6,Enable BRC_DID_IRQ for channel [x]" "0,1" newline bitfld.long 0x64 6. "DID_IRQ_EN5,Enable BRC_DID_IRQ for channel [x]" "0,1" bitfld.long 0x64 5. "DID_IRQ_EN4,Enable BRC_DID_IRQ for channel [x]" "0,1" bitfld.long 0x64 4. "DID_IRQ_EN3,Enable BRC_DID_IRQ for channel [x]" "0,1" newline bitfld.long 0x64 3. "DID_IRQ_EN2,Enable BRC_DID_IRQ for channel [x]" "0,1" bitfld.long 0x64 2. "DID_IRQ_EN1,Enable BRC_DID_IRQ for channel [x]" "0,1" bitfld.long 0x64 1. "DID_IRQ_EN0,Enable BRC_DID_IRQ for channel [x]" "0,1" newline bitfld.long 0x64 0. "DEST_ERR_IRQ_EN,BRC_DEST_ERR_IRQ interrupt enable" "0,1" line.long 0x68 "BRC_IRQ_FORCINT,BRC force interrupt register" bitfld.long 0x68 12. "TRG_DID11,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" bitfld.long 0x68 11. "TRG_DID10,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" bitfld.long 0x68 10. "TRG_DID9,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" newline bitfld.long 0x68 9. "TRG_DID8,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" bitfld.long 0x68 8. "TRG_DID7,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" bitfld.long 0x68 7. "TRG_DID6,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" newline bitfld.long 0x68 6. "TRG_DID5,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" bitfld.long 0x68 5. "TRG_DID4,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" bitfld.long 0x68 4. "TRG_DID3,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" newline bitfld.long 0x68 3. "TRG_DID2,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" bitfld.long 0x68 2. "TRG_DID1,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" bitfld.long 0x68 1. "TRG_DID0,Trigger the bit BRC_IRQ_NOTIFY.DID[x] by software" "0,1" newline bitfld.long 0x68 0. "TRG_DEST_ERR,Trigger the bit BRC_IRQ_NOTIFY.DEST_ERR by software" "0,1" line.long 0x6C "BRC_IRQ_MODE,BRC interrupt mode configuration register" bitfld.long 0x6C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x70 "BRC_RST,BRC software reset register" bitfld.long 0x70 0. "RST,Software reset" "0,1" line.long 0x74 "BRC_EIRQ_EN,BRC error interrupt enable register" bitfld.long 0x74 12. "DID_EIRQ_EN11,Enable BRC_DID_EIRQ for channel [x]" "0,1" bitfld.long 0x74 11. "DID_EIRQ_EN10,Enable BRC_DID_EIRQ for channel [x]" "0,1" bitfld.long 0x74 10. "DID_EIRQ_EN9,Enable BRC_DID_EIRQ for channel [x]" "0,1" newline bitfld.long 0x74 9. "DID_EIRQ_EN8,Enable BRC_DID_EIRQ for channel [x]" "0,1" bitfld.long 0x74 8. "DID_EIRQ_EN7,Enable BRC_DID_EIRQ for channel [x]" "0,1" bitfld.long 0x74 7. "DID_EIRQ_EN6,Enable BRC_DID_EIRQ for channel [x]" "0,1" newline bitfld.long 0x74 6. "DID_EIRQ_EN5,Enable BRC_DID_EIRQ for channel [x]" "0,1" bitfld.long 0x74 5. "DID_EIRQ_EN4,Enable BRC_DID_EIRQ for channel [x]" "0,1" bitfld.long 0x74 4. "DID_EIRQ_EN3,Enable BRC_DID_EIRQ for channel [x]" "0,1" newline bitfld.long 0x74 3. "DID_EIRQ_EN2,Enable BRC_DID_EIRQ for channel [x]" "0,1" bitfld.long 0x74 2. "DID_EIRQ_EN1,Enable BRC_DID_EIRQ for channel [x]" "0,1" bitfld.long 0x74 1. "DID_EIRQ_EN0,Enable BRC_DID_EIRQ for channel [x]" "0,1" newline bitfld.long 0x74 0. "DEST_ERR_EIRQ_EN,BRC_DEST_ERR_EIRQ error interrupt enable" "0,1" rgroup.long ad:0x94800400++0x0B line.long 0x00 "ICM_IRQG_0,ICM Interrupt group register covering infrastructural and safety components (ARU BRC AEI PSM0 PSM1 MAP CMP SPE)" bitfld.long 0x00 31. "PSM1_CH7_IRQ,PSM1 shared sub-module channel [x] interrupt" "0,1" bitfld.long 0x00 30. "PSM1_CH6_IRQ,PSM1 shared sub-module channel [x] interrupt" "0,1" bitfld.long 0x00 29. "PSM1_CH5_IRQ,PSM1 shared sub-module channel [x] interrupt" "0,1" newline bitfld.long 0x00 28. "PSM1_CH4_IRQ,PSM1 shared sub-module channel [x] interrupt" "0,1" bitfld.long 0x00 27. "PSM1_CH3_IRQ,PSM1 shared sub-module channel [x] interrupt" "0,1" bitfld.long 0x00 26. "PSM1_CH2_IRQ,PSM1 shared sub-module channel [x] interrupt" "0,1" newline bitfld.long 0x00 25. "PSM1_CH1_IRQ,PSM1 shared sub-module channel [x] interrupt" "0,1" bitfld.long 0x00 24. "PSM1_CH0_IRQ,PSM1 shared sub-module channel [x] interrupt" "0,1" bitfld.long 0x00 23. "PSM0_CH7_IRQ,PSM0 shared sub-module channel [x] interrupt" "0,1" newline bitfld.long 0x00 22. "PSM0_CH6_IRQ,PSM0 shared sub-module channel [x] interrupt" "0,1" bitfld.long 0x00 21. "PSM0_CH5_IRQ,PSM0 shared sub-module channel [x] interrupt" "0,1" bitfld.long 0x00 20. "PSM0_CH4_IRQ,PSM0 shared sub-module channel [x] interrupt" "0,1" newline bitfld.long 0x00 19. "PSM0_CH3_IRQ,PSM0 shared sub-module channel [x] interrupt" "0,1" bitfld.long 0x00 18. "PSM0_CH2_IRQ,PSM0 shared sub-module channel [x] interrupt" "0,1" bitfld.long 0x00 17. "PSM0_CH1_IRQ,PSM0 shared sub-module channel [x] interrupt" "0,1" newline bitfld.long 0x00 16. "PSM0_CH0_IRQ,PSM0 shared sub-module channel [x] interrupt" "0,1" bitfld.long 0x00 8. "SPE2_IRQ,SPE[j] shared sub-module interrupt" "0,1" bitfld.long 0x00 7. "SPE1_IRQ,SPE[j] shared sub-module interrupt" "0,1" newline bitfld.long 0x00 6. "SPE0_IRQ,SPE[j] shared sub-module interrupt" "0,1" bitfld.long 0x00 5. "CMP_IRQ,CMP shared sub-module interrupt" "0,1" bitfld.long 0x00 4. "AEI_IRQ,ICM_IRQG_0.AEI_IRQ: AEI_IRQ interrupt" "0,1" newline bitfld.long 0x00 3. "BRC_IRQ,BRC shared sub-module interrupt" "0,1" bitfld.long 0x00 2. "ARU_ACC_ACK_IRQ,ARU_ACC_ACK_I interrupt" "0,1" bitfld.long 0x00 1. "ARU_NEW_DATA1_IRQ,ARU_NEW_DATA1_I interrupt" "0,1" newline bitfld.long 0x00 0. "ARU_NEW_DATA0_IRQ,ARU_NEW_DATA0_I interrupt" "0,1" line.long 0x04 "ICM_IRQG_1,ICM Interrupt group register covering DPLL" bitfld.long 0x04 26. "DPLL_SORI_IRQ,DPLL calculated duration interrupt for state" "0,1" bitfld.long 0x04 25. "DPLL_TORI_IRQ,DPLL calculated duration interrupt for state" "0,1" bitfld.long 0x04 24. "DPLL_CDSI_IRQ,DPLL calculated duration interrupt for state" "0,1" newline bitfld.long 0x04 23. "DPLL_CDTI_IRQ,DPLL calculated duration interrupt for trigger" "0,1" bitfld.long 0x04 22. "DPLL_TE4I_IRQ,TRIGGER event interrupt 4" "0,1" bitfld.long 0x04 21. "DPLL_TE3I_IRQ,TRIGGER event interrupt 3" "0,1" newline bitfld.long 0x04 20. "DPLL_TE2I_IRQ,TRIGGER event interrupt 2" "0,1" bitfld.long 0x04 19. "DPLL_TE1I_IRQ,TRIGGER event interrupt 1" "0,1" bitfld.long 0x04 18. "DPLL_TE0I_IRQ,TRIGGER event interrupt 0" "0,1" newline bitfld.long 0x04 17. "DPLL_LL2I_IRQ,Loss of lock interrupt for SUB_INC2" "0,1" bitfld.long 0x04 16. "DPLL_GL2I_IRQ,Get lock interrupt for SUB_INC2" "0,1" bitfld.long 0x04 15. "DPLL_EI_IRQ,Error interrupt" "0,1" newline bitfld.long 0x04 14. "DPLL_LL1I_IRQ,Loss of lock interrupt for SUB_INC1" "0,1" bitfld.long 0x04 13. "DPLL_GL1I_IRQ,Get lock interrupt for SUB_INC1" "0,1" bitfld.long 0x04 12. "DPLL_W1I_IRQ,Write access to RAM region 1b or 1c interrupt" "0,1" newline bitfld.long 0x04 11. "DPLL_W2I_IRQ,Write access to RAM region 2 interrupt" "0,1" bitfld.long 0x04 10. "DPLL_PWI_IRQ,Plausibility window (PVT) violation interrupt of TRIGGER" "0,1" bitfld.long 0x04 9. "DPLL_TASI_IRQ,TRIGGER active slope detected while DPLL_NTI_CNT.NTI_CNT is zero" "0,1" newline bitfld.long 0x04 8. "DPLL_SASI_IRQ,STATE active slope detected" "0,1" bitfld.long 0x04 7. "DPLL_MTI_IRQ,Missing TRIGGER interrupt" "0,1" bitfld.long 0x04 6. "DPLL_MSI_IRQ,Missing STATE interrupt" "0,1" newline bitfld.long 0x04 5. "DPLL_TISI_IRQ,TRIGGER inactive slope detected interrupt" "0,1" bitfld.long 0x04 4. "DPLL_SISI_IRQ,STATE inactive slope detected interrupt" "0,1" bitfld.long 0x04 3. "DPLL_TAXI_IRQ,TRIGGER maximum hold time (THMA) violation detected interrupt" "0,1" newline bitfld.long 0x04 2. "DPLL_TINI_IRQ,TRIGGER minimum hold time (THMI) violation detected interrupt" "0,1" bitfld.long 0x04 1. "DPLL_EDI_IRQ,DPLL enable/disable interrupt" "0,1" bitfld.long 0x04 0. "DPLL_DCGI_IRQ,TRIGGER direction change detected" "0,1" line.long 0x08 "ICM_IRQG_2,ICM Interrupt group register covering TIM0 TIM1 TIM2 TIM3" bitfld.long 0x08 23. "TIM2_CH7_IRQ,TIM2 shared interrupt channel [x]" "0,1" bitfld.long 0x08 22. "TIM2_CH6_IRQ,TIM2 shared interrupt channel [x]" "0,1" bitfld.long 0x08 21. "TIM2_CH5_IRQ,TIM2 shared interrupt channel [x]" "0,1" newline bitfld.long 0x08 20. "TIM2_CH4_IRQ,TIM2 shared interrupt channel [x]" "0,1" bitfld.long 0x08 19. "TIM2_CH3_IRQ,TIM2 shared interrupt channel [x]" "0,1" bitfld.long 0x08 18. "TIM2_CH2_IRQ,TIM2 shared interrupt channel [x]" "0,1" newline bitfld.long 0x08 17. "TIM2_CH1_IRQ,TIM2 shared interrupt channel [x]" "0,1" bitfld.long 0x08 16. "TIM2_CH0_IRQ,TIM2 shared interrupt channel [x]" "0,1" bitfld.long 0x08 15. "TIM1_CH7_IRQ,TIM1 shared interrupt channel [x]" "0,1" newline bitfld.long 0x08 14. "TIM1_CH6_IRQ,TIM1 shared interrupt channel [x]" "0,1" bitfld.long 0x08 13. "TIM1_CH5_IRQ,TIM1 shared interrupt channel [x]" "0,1" bitfld.long 0x08 12. "TIM1_CH4_IRQ,TIM1 shared interrupt channel [x]" "0,1" newline bitfld.long 0x08 11. "TIM1_CH3_IRQ,TIM1 shared interrupt channel [x]" "0,1" bitfld.long 0x08 10. "TIM1_CH2_IRQ,TIM1 shared interrupt channel [x]" "0,1" bitfld.long 0x08 9. "TIM1_CH1_IRQ,TIM1 shared interrupt channel [x]" "0,1" newline bitfld.long 0x08 8. "TIM1_CH0_IRQ,TIM1 shared interrupt channel [x]" "0,1" bitfld.long 0x08 7. "TIM0_CH7_IRQ,TIM0 shared interrupt channel [x]" "0,1" bitfld.long 0x08 6. "TIM0_CH6_IRQ,TIM0 shared interrupt channel [x]" "0,1" newline bitfld.long 0x08 5. "TIM0_CH5_IRQ,TIM0 shared interrupt channel [x]" "0,1" bitfld.long 0x08 4. "TIM0_CH4_IRQ,TIM0 shared interrupt channel [x]" "0,1" bitfld.long 0x08 3. "TIM0_CH3_IRQ,TIM0 shared interrupt channel [x]" "0,1" newline bitfld.long 0x08 2. "TIM0_CH2_IRQ,TIM0 shared interrupt channel [x]" "0,1" bitfld.long 0x08 1. "TIM0_CH1_IRQ,TIM0 shared interrupt channel [x]" "0,1" bitfld.long 0x08 0. "TIM0_CH0_IRQ,TIM0 shared interrupt channel [x]" "0,1" rgroup.long ad:0x94800410++0x03 line.long 0x00 "ICM_IRQG_4,ICM Interrupt group register covering MCS0 to MCS3 sub-modules" bitfld.long 0x00 31. "MCS3_CH7_IRQ,MCS3 channel [x] interrupt" "0,1" bitfld.long 0x00 30. "MCS3_CH6_IRQ,MCS3 channel [x] interrupt" "0,1" bitfld.long 0x00 29. "MCS3_CH5_IRQ,MCS3 channel [x] interrupt" "0,1" newline bitfld.long 0x00 28. "MCS3_CH4_IRQ,MCS3 channel [x] interrupt" "0,1" bitfld.long 0x00 27. "MCS3_CH3_IRQ,MCS3 channel [x] interrupt" "0,1" bitfld.long 0x00 26. "MCS3_CH2_IRQ,MCS3 channel [x] interrupt" "0,1" newline bitfld.long 0x00 25. "MCS3_CH1_IRQ,MCS3 channel [x] interrupt" "0,1" bitfld.long 0x00 24. "MCS3_CH0_IRQ,MCS3 channel [x] interrupt" "0,1" bitfld.long 0x00 23. "MCS2_CH7_IRQ,MCS2 channel [x] interrupt" "0,1" newline bitfld.long 0x00 22. "MCS2_CH6_IRQ,MCS2 channel [x] interrupt" "0,1" bitfld.long 0x00 21. "MCS2_CH5_IRQ,MCS2 channel [x] interrupt" "0,1" bitfld.long 0x00 20. "MCS2_CH4_IRQ,MCS2 channel [x] interrupt" "0,1" newline bitfld.long 0x00 19. "MCS2_CH3_IRQ,MCS2 channel [x] interrupt" "0,1" bitfld.long 0x00 18. "MCS2_CH2_IRQ,MCS2 channel [x] interrupt" "0,1" bitfld.long 0x00 17. "MCS2_CH1_IRQ,MCS2 channel [x] interrupt" "0,1" newline bitfld.long 0x00 16. "MCS2_CH0_IRQ,MCS2 channel [x] interrupt" "0,1" bitfld.long 0x00 15. "MCS1_CH7_IRQ,MCS1 channel [x] interrupt" "0,1" bitfld.long 0x00 14. "MCS1_CH6_IRQ,MCS1 channel [x] interrupt" "0,1" newline bitfld.long 0x00 13. "MCS1_CH5_IRQ,MCS1 channel [x] interrupt" "0,1" bitfld.long 0x00 12. "MCS1_CH4_IRQ,MCS1 channel [x] interrupt" "0,1" bitfld.long 0x00 11. "MCS1_CH3_IRQ,MCS1 channel [x] interrupt" "0,1" newline bitfld.long 0x00 10. "MCS1_CH2_IRQ,MCS1 channel [x] interrupt" "0,1" bitfld.long 0x00 9. "MCS1_CH1_IRQ,MCS1 channel [x] interrupt" "0,1" bitfld.long 0x00 8. "MCS1_CH0_IRQ,MCS1 channel [x] interrupt" "0,1" newline bitfld.long 0x00 7. "MCS0_CH7_IRQ,MCS0 channel [x] interrupt" "0,1" bitfld.long 0x00 6. "MCS0_CH6_IRQ,MCS0 channel [x] interrupt" "0,1" bitfld.long 0x00 5. "MCS0_CH5_IRQ,MCS0 channel [x] interrupt" "0,1" newline bitfld.long 0x00 4. "MCS0_CH4_IRQ,MCS0 channel [x] interrupt" "0,1" bitfld.long 0x00 3. "MCS0_CH3_IRQ,MCS0 channel [x] interrupt" "0,1" bitfld.long 0x00 2. "MCS0_CH2_IRQ,MCS0 channel [x] interrupt" "0,1" newline bitfld.long 0x00 1. "MCS0_CH1_IRQ,MCS0 channel [x] interrupt" "0,1" bitfld.long 0x00 0. "MCS0_CH0_IRQ,MCS0 channel [x] interrupt" "0,1" rgroup.long ad:0x94800430++0x0B line.long 0x00 "ICM_IRQG_MEI,ICM Interrupt group register for module error interrupt information" bitfld.long 0x00 25. "DPLL_EIRQ,DPLL error interrupt" "0,1" bitfld.long 0x00 24. "CMP_EIRQ,CMP error interrupt" "0,1" bitfld.long 0x00 22. "SPE2_EIRQ,SPE[j] error interrupt" "0,1" newline bitfld.long 0x00 21. "SPE1_EIRQ,SPE[j] error interrupt" "0,1" bitfld.long 0x00 20. "SPE0_EIRQ,SPE[j] error interrupt" "0,1" bitfld.long 0x00 15. "MCS3_EIRQ,MCS[j] error interrupt" "0,1" newline bitfld.long 0x00 14. "MCS2_EIRQ,MCS[j] error interrupt" "0,1" bitfld.long 0x00 13. "MCS1_EIRQ,MCS[j] error interrupt" "0,1" bitfld.long 0x00 12. "MCS0_EIRQ,MCS[j] error interrupt" "0,1" newline bitfld.long 0x00 6. "TIM2_EIRQ,TIM[j] error interrupt" "0,1" bitfld.long 0x00 5. "TIM1_EIRQ,TIM[j] error interrupt" "0,1" bitfld.long 0x00 4. "TIM0_EIRQ,TIM[j] error interrupt" "0,1" newline bitfld.long 0x00 3. "FIFO1_EIRQ,FIFO[j] error interrupt" "0,1" bitfld.long 0x00 2. "FIFO0_EIRQ,FIFO[j] error interrupt" "0,1" bitfld.long 0x00 1. "BRC_EIRQ,BRC error interrupt" "0,1" newline bitfld.long 0x00 0. "GTM_EIRQ,AEI error interrupt request" "0,1" line.long 0x04 "ICM_IRQG_CEI0,ICM Interrupt group register 0 for channel error interrupt information" bitfld.long 0x04 23. "FIFO2_CH7_EIRQ,FIFO2 channel [x] error interrupt" "0,1" bitfld.long 0x04 22. "FIFO2_CH6_EIRQ,FIFO2 channel [x] error interrupt" "0,1" bitfld.long 0x04 21. "FIFO2_CH5_EIRQ,FIFO2 channel [x] error interrupt" "0,1" newline bitfld.long 0x04 20. "FIFO2_CH4_EIRQ,FIFO2 channel [x] error interrupt" "0,1" bitfld.long 0x04 19. "FIFO2_CH3_EIRQ,FIFO2 channel [x] error interrupt" "0,1" bitfld.long 0x04 18. "FIFO2_CH2_EIRQ,FIFO2 channel [x] error interrupt" "0,1" newline bitfld.long 0x04 17. "FIFO2_CH1_EIRQ,FIFO2 channel [x] error interrupt" "0,1" bitfld.long 0x04 16. "FIFO2_CH0_EIRQ,FIFO2 channel [x] error interrupt" "0,1" bitfld.long 0x04 15. "FIFO1_CH7_EIRQ,FIFO1 channel [x] error interrupt" "0,1" newline bitfld.long 0x04 14. "FIFO1_CH6_EIRQ,FIFO1 channel [x] error interrupt" "0,1" bitfld.long 0x04 13. "FIFO1_CH5_EIRQ,FIFO1 channel [x] error interrupt" "0,1" bitfld.long 0x04 12. "FIFO1_CH4_EIRQ,FIFO1 channel [x] error interrupt" "0,1" newline bitfld.long 0x04 11. "FIFO1_CH3_EIRQ,FIFO1 channel [x] error interrupt" "0,1" bitfld.long 0x04 10. "FIFO1_CH2_EIRQ,FIFO1 channel [x] error interrupt" "0,1" bitfld.long 0x04 9. "FIFO1_CH1_EIRQ,FIFO1 channel [x] error interrupt" "0,1" newline bitfld.long 0x04 8. "FIFO1_CH0_EIRQ,FIFO1 channel [x] error interrupt" "0,1" bitfld.long 0x04 7. "FIFO0_CH7_EIRQ,FIFO0 channel [x] error interrupt" "0,1" bitfld.long 0x04 6. "FIFO0_CH6_EIRQ,FIFO0 channel [x] error interrupt" "0,1" newline bitfld.long 0x04 5. "FIFO0_CH5_EIRQ,FIFO0 channel [x] error interrupt" "0,1" bitfld.long 0x04 4. "FIFO0_CH4_EIRQ,FIFO0 channel [x] error interrupt" "0,1" bitfld.long 0x04 3. "FIFO0_CH3_EIRQ,FIFO0 channel [x] error interrupt" "0,1" newline bitfld.long 0x04 2. "FIFO0_CH2_EIRQ,FIFO0 channel [x] error interrupt" "0,1" bitfld.long 0x04 1. "FIFO0_CH1_EIRQ,FIFO0 channel [x] error interrupt" "0,1" bitfld.long 0x04 0. "FIFO0_CH0_EIRQ,FIFO0 channel [x] error interrupt" "0,1" line.long 0x08 "ICM_IRQG_CEI1,ICM Interrupt group register 1 for channel error interrupt information" bitfld.long 0x08 23. "TIM2_CH7_EIRQ,TIM2 channel [x] error interrupt" "0,1" bitfld.long 0x08 22. "TIM2_CH6_EIRQ,TIM2 channel [x] error interrupt" "0,1" bitfld.long 0x08 21. "TIM2_CH5_EIRQ,TIM2 channel [x] error interrupt" "0,1" newline bitfld.long 0x08 20. "TIM2_CH4_EIRQ,TIM2 channel [x] error interrupt" "0,1" bitfld.long 0x08 19. "TIM2_CH3_EIRQ,TIM2 channel [x] error interrupt" "0,1" bitfld.long 0x08 18. "TIM2_CH2_EIRQ,TIM2 channel [x] error interrupt" "0,1" newline bitfld.long 0x08 17. "TIM2_CH1_EIRQ,TIM2 channel [x] error interrupt" "0,1" bitfld.long 0x08 16. "TIM2_CH0_EIRQ,TIM2 channel [x] error interrupt" "0,1" bitfld.long 0x08 15. "TIM1_CH7_EIRQ,TIM1 channel [x] error interrupt" "0,1" newline bitfld.long 0x08 14. "TIM1_CH6_EIRQ,TIM1 channel [x] error interrupt" "0,1" bitfld.long 0x08 13. "TIM1_CH5_EIRQ,TIM1 channel [x] error interrupt" "0,1" bitfld.long 0x08 12. "TIM1_CH4_EIRQ,TIM1 channel [x] error interrupt" "0,1" newline bitfld.long 0x08 11. "TIM1_CH3_EIRQ,TIM1 channel [x] error interrupt" "0,1" bitfld.long 0x08 10. "TIM1_CH2_EIRQ,TIM1 channel [x] error interrupt" "0,1" bitfld.long 0x08 9. "TIM1_CH1_EIRQ,TIM1 channel [x] error interrupt" "0,1" newline bitfld.long 0x08 8. "TIM1_CH0_EIRQ,TIM1 channel [x] error interrupt" "0,1" bitfld.long 0x08 7. "TIM0_CH7_EIRQ,TIM0 channel [x] error interrupt" "0,1" bitfld.long 0x08 6. "TIM0_CH6_EIRQ,TIM0 channel [x] error interrupt" "0,1" newline bitfld.long 0x08 5. "TIM0_CH5_EIRQ,TIM0 channel [x] error interrupt" "0,1" bitfld.long 0x08 4. "TIM0_CH4_EIRQ,TIM0 channel [x] error interrupt" "0,1" bitfld.long 0x08 3. "TIM0_CH3_EIRQ,TIM0 channel [x] error interrupt" "0,1" newline bitfld.long 0x08 2. "TIM0_CH2_EIRQ,TIM0 channel [x] error interrupt" "0,1" bitfld.long 0x08 1. "TIM0_CH1_EIRQ,TIM0 channel [x] error interrupt" "0,1" bitfld.long 0x08 0. "TIM0_CH0_EIRQ,TIM0 channel [x] error interrupt" "0,1" rgroup.long ad:0x94800440++0x03 line.long 0x00 "ICM_IRQG_CEI3,ICM Interrupt group register 3 for channel error interrupt information" bitfld.long 0x00 31. "MCS3_CH7_EIRQ,MCS3 channel [x] error interrupt" "0,1" bitfld.long 0x00 30. "MCS3_CH6_EIRQ,MCS3 channel [x] error interrupt" "0,1" bitfld.long 0x00 29. "MCS3_CH5_EIRQ,MCS3 channel [x] error interrupt" "0,1" newline bitfld.long 0x00 28. "MCS3_CH4_EIRQ,MCS3 channel [x] error interrupt" "0,1" bitfld.long 0x00 27. "MCS3_CH3_EIRQ,MCS3 channel [x] error interrupt" "0,1" bitfld.long 0x00 26. "MCS3_CH2_EIRQ,MCS3 channel [x] error interrupt" "0,1" newline bitfld.long 0x00 25. "MCS3_CH1_EIRQ,MCS3 channel [x] error interrupt" "0,1" bitfld.long 0x00 24. "MCS3_CH0_EIRQ,MCS3 channel [x] error interrupt" "0,1" bitfld.long 0x00 23. "MCS2_CH7_EIRQ,MCS2 channel [x] error interrupt" "0,1" newline bitfld.long 0x00 22. "MCS2_CH6_EIRQ,MCS2 channel [x] error interrupt" "0,1" bitfld.long 0x00 21. "MCS2_CH5_EIRQ,MCS2 channel [x] error interrupt" "0,1" bitfld.long 0x00 20. "MCS2_CH4_EIRQ,MCS2 channel [x] error interrupt" "0,1" newline bitfld.long 0x00 19. "MCS2_CH3_EIRQ,MCS2 channel [x] error interrupt" "0,1" bitfld.long 0x00 18. "MCS2_CH2_EIRQ,MCS2 channel [x] error interrupt" "0,1" bitfld.long 0x00 17. "MCS2_CH1_EIRQ,MCS2 channel [x] error interrupt" "0,1" newline bitfld.long 0x00 16. "MCS2_CH0_EIRQ,MCS2 channel [x] error interrupt" "0,1" bitfld.long 0x00 15. "MCS1_CH7_EIRQ,MCS1 channel [x] error interrupt" "0,1" bitfld.long 0x00 14. "MCS1_CH6_EIRQ,MCS1 channel [x] error interrupt" "0,1" newline bitfld.long 0x00 13. "MCS1_CH5_EIRQ,MCS1 channel [x] error interrupt" "0,1" bitfld.long 0x00 12. "MCS1_CH4_EIRQ,MCS1 channel [x] error interrupt" "0,1" bitfld.long 0x00 11. "MCS1_CH3_EIRQ,MCS1 channel [x] error interrupt" "0,1" newline bitfld.long 0x00 10. "MCS1_CH2_EIRQ,MCS1 channel [x] error interrupt" "0,1" bitfld.long 0x00 9. "MCS1_CH1_EIRQ,MCS1 channel [x] error interrupt" "0,1" bitfld.long 0x00 8. "MCS1_CH0_EIRQ,MCS1 channel [x] error interrupt" "0,1" newline bitfld.long 0x00 7. "MCS0_CH7_EIRQ,MCS0 channel [x] error interrupt" "0,1" bitfld.long 0x00 6. "MCS0_CH6_EIRQ,MCS0 channel [x] error interrupt" "0,1" bitfld.long 0x00 5. "MCS0_CH5_EIRQ,MCS0 channel [x] error interrupt" "0,1" newline bitfld.long 0x00 4. "MCS0_CH4_EIRQ,MCS0 channel [x] error interrupt" "0,1" bitfld.long 0x00 3. "MCS0_CH3_EIRQ,MCS0 channel [x] error interrupt" "0,1" bitfld.long 0x00 2. "MCS0_CH2_EIRQ,MCS0 channel [x] error interrupt" "0,1" newline bitfld.long 0x00 1. "MCS0_CH1_EIRQ,MCS0 channel [x] error interrupt" "0,1" bitfld.long 0x00 0. "MCS0_CH0_EIRQ,MCS0 channel [x] error interrupt" "0,1" rgroup.long ad:0x94800464++0x0F line.long 0x00 "ICM_IRQG_MCS0_CEI,ICM Interrupt group MCS[j] for Channel Error Interrupt information" bitfld.long 0x00 7. "MCS_CH7_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x00 6. "MCS_CH6_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x00 5. "MCS_CH5_EIRQ,MCS channel [x] error interrupt" "0,1" newline bitfld.long 0x00 4. "MCS_CH4_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x00 3. "MCS_CH3_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x00 2. "MCS_CH2_EIRQ,MCS channel [x] error interrupt" "0,1" newline bitfld.long 0x00 1. "MCS_CH1_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x00 0. "MCS_CH0_EIRQ,MCS channel [x] error interrupt" "0,1" line.long 0x04 "ICM_IRQG_MCS1_CEI,ICM Interrupt group MCS[j] for Channel Error Interrupt information" bitfld.long 0x04 7. "MCS_CH7_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x04 6. "MCS_CH6_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x04 5. "MCS_CH5_EIRQ,MCS channel [x] error interrupt" "0,1" newline bitfld.long 0x04 4. "MCS_CH4_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x04 3. "MCS_CH3_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x04 2. "MCS_CH2_EIRQ,MCS channel [x] error interrupt" "0,1" newline bitfld.long 0x04 1. "MCS_CH1_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x04 0. "MCS_CH0_EIRQ,MCS channel [x] error interrupt" "0,1" line.long 0x08 "ICM_IRQG_MCS2_CEI,ICM Interrupt group MCS[j] for Channel Error Interrupt information" bitfld.long 0x08 7. "MCS_CH7_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x08 6. "MCS_CH6_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x08 5. "MCS_CH5_EIRQ,MCS channel [x] error interrupt" "0,1" newline bitfld.long 0x08 4. "MCS_CH4_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x08 3. "MCS_CH3_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x08 2. "MCS_CH2_EIRQ,MCS channel [x] error interrupt" "0,1" newline bitfld.long 0x08 1. "MCS_CH1_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x08 0. "MCS_CH0_EIRQ,MCS channel [x] error interrupt" "0,1" line.long 0x0C "ICM_IRQG_MCS3_CEI,ICM Interrupt group MCS[j] for Channel Error Interrupt information" bitfld.long 0x0C 7. "MCS_CH7_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x0C 6. "MCS_CH6_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x0C 5. "MCS_CH5_EIRQ,MCS channel [x] error interrupt" "0,1" newline bitfld.long 0x0C 4. "MCS_CH4_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x0C 3. "MCS_CH3_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x0C 2. "MCS_CH2_EIRQ,MCS channel [x] error interrupt" "0,1" newline bitfld.long 0x0C 1. "MCS_CH1_EIRQ,MCS channel [x] error interrupt" "0,1" bitfld.long 0x0C 0. "MCS_CH0_EIRQ,MCS channel [x] error interrupt" "0,1" rgroup.long ad:0x948004A4++0x03 line.long 0x00 "ICM_IRQG_PSM_0_CEI,ICM Interrupt group PSM 0 for Channel Error Interrupt information of FIFO0 FIFO1 FIFO2" bitfld.long 0x00 23. "PSM_M2_CH7_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 22. "PSM_M2_CH6_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 21. "PSM_M2_CH5_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+2)" "0,1" newline bitfld.long 0x00 20. "PSM_M2_CH4_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 19. "PSM_M2_CH3_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 18. "PSM_M2_CH2_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+2)" "0,1" newline bitfld.long 0x00 17. "PSM_M2_CH1_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 16. "PSM_M2_CH0_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 15. "PSM_M1_CH7_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+1)" "0,1" newline bitfld.long 0x00 14. "PSM_M1_CH6_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+1)" "0,1" bitfld.long 0x00 13. "PSM_M1_CH5_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+1)" "0,1" bitfld.long 0x00 12. "PSM_M1_CH4_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+1)" "0,1" newline bitfld.long 0x00 11. "PSM_M1_CH3_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+1)" "0,1" bitfld.long 0x00 10. "PSM_M1_CH2_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+1)" "0,1" bitfld.long 0x00 9. "PSM_M1_CH1_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+1)" "0,1" newline bitfld.long 0x00 8. "PSM_M1_CH0_EIRQ,PSM[j] channel [x] error interrupt ([j]=4*0+1)" "0,1" bitfld.long 0x00 7. "PSM_M0_CH7_EIRQ,PSMm channel [x] error interrupt ([j]=4*0+0)" "0,1" bitfld.long 0x00 6. "PSM_M0_CH6_EIRQ,PSMm channel [x] error interrupt ([j]=4*0+0)" "0,1" newline bitfld.long 0x00 5. "PSM_M0_CH5_EIRQ,PSMm channel [x] error interrupt ([j]=4*0+0)" "0,1" bitfld.long 0x00 4. "PSM_M0_CH4_EIRQ,PSMm channel [x] error interrupt ([j]=4*0+0)" "0,1" bitfld.long 0x00 3. "PSM_M0_CH3_EIRQ,PSMm channel [x] error interrupt ([j]=4*0+0)" "0,1" newline bitfld.long 0x00 2. "PSM_M0_CH2_EIRQ,PSMm channel [x] error interrupt ([j]=4*0+0)" "0,1" bitfld.long 0x00 1. "PSM_M0_CH1_EIRQ,PSMm channel [x] error interrupt ([j]=4*0+0)" "0,1" bitfld.long 0x00 0. "PSM_M0_CH0_EIRQ,PSMm channel [x] error interrupt ([j]=4*0+0)" "0,1" rgroup.long ad:0x948004B4++0x03 line.long 0x00 "ICM_IRQG_SPE_CEI,ICM Interrupt group SPE for module Error Interrupt information" bitfld.long 0x00 2. "SPE2_EIRQ,SPE[j] error interrupt" "0,1" bitfld.long 0x00 1. "SPE1_EIRQ,SPE[j] error interrupt" "0,1" bitfld.long 0x00 0. "SPE0_EIRQ,SPE[j] error interrupt" "0,1" rgroup.long ad:0x94800510++0x03 line.long 0x00 "ICM_IRQG_CLS_0_MEI,ICM Interrupt group for module Error Interrupt information for each TIM[j] MCS[j] SPE[j] FIFO[j] (j=4*[g]+k k?{0 ... 3})" bitfld.long 0x00 25. "MCS_M3_EIRQ,Error interrupt MCS[j]_EIRQ ([j]=4*[g]+3)" "0,1" bitfld.long 0x00 19. "FIFO_M2_EIRQ,Error interrupt FIFO[j]_EIRQ ([j]=4*[g]+2)" "0,1" bitfld.long 0x00 18. "SPE_M2_EIRQ,Error interrupt SPE[j]_EIRQ ([j]=4*[g]+2)" "0,1" newline bitfld.long 0x00 17. "MCS_M2_EIRQ,Error interrupt MCS[j]_EIRQ ([j]=4*[g]+2)" "0,1" bitfld.long 0x00 16. "TIM_M2_EIRQ,Error interrupt TIM[j]_EIRQ ([j]=4*[g]+2)" "0,1" bitfld.long 0x00 11. "FIFO_M1_EIRQ,Error interrupt FIFO[j]_EIRQ ([j]=4*[g]+1)" "0,1" newline bitfld.long 0x00 10. "SPE_M1_EIRQ,Error interrupt SPE[j]_EIRQ ([j]=4*[g]+1)" "0,1" bitfld.long 0x00 9. "MCS_M1_EIRQ,Error interrupt MCS[j]_EIRQ ([j]=4*[g]+1)" "0,1" bitfld.long 0x00 8. "TIM_M1_EIRQ,Error interrupt TIM[j]_EIRQ ([j]=4*[g]+1)" "0,1" newline bitfld.long 0x00 3. "FIFO_M0_EIRQ,Error interrupt FIFO[j]_EIRQ ([j]=4*[g]+0)" "0,1" bitfld.long 0x00 2. "SPE_M0_EIRQ,Error interrupt SPE[j]_EIRQ ([j]=4*[g]+0)" "0,1" bitfld.long 0x00 1. "MCS_M0_EIRQ,Error interrupt MCS[j]_EIRQ (j=4*[g])" "0,1" newline bitfld.long 0x00 0. "TIM_M0_EIRQ,Error interrupt TIM[j]_EIRQ (j=4*[g])" "0,1" rgroup.long ad:0x94800520++0x0F line.long 0x00 "ICM_IRQG_MCS0_CI,ICM Interrupt group MCS[j] for Channel Interrupt information" bitfld.long 0x00 7. "MCS_CH7_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x00 6. "MCS_CH6_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x00 5. "MCS_CH5_IRQ,MCS channel [x] interrupt" "0,1" newline bitfld.long 0x00 4. "MCS_CH4_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x00 3. "MCS_CH3_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x00 2. "MCS_CH2_IRQ,MCS channel [x] interrupt" "0,1" newline bitfld.long 0x00 1. "MCS_CH1_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x00 0. "MCS_CH0_IRQ,MCS channel [x] interrupt" "0,1" line.long 0x04 "ICM_IRQG_MCS1_CI,ICM Interrupt group MCS[j] for Channel Interrupt information" bitfld.long 0x04 7. "MCS_CH7_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x04 6. "MCS_CH6_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x04 5. "MCS_CH5_IRQ,MCS channel [x] interrupt" "0,1" newline bitfld.long 0x04 4. "MCS_CH4_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x04 3. "MCS_CH3_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x04 2. "MCS_CH2_IRQ,MCS channel [x] interrupt" "0,1" newline bitfld.long 0x04 1. "MCS_CH1_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x04 0. "MCS_CH0_IRQ,MCS channel [x] interrupt" "0,1" line.long 0x08 "ICM_IRQG_MCS2_CI,ICM Interrupt group MCS[j] for Channel Interrupt information" bitfld.long 0x08 7. "MCS_CH7_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x08 6. "MCS_CH6_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x08 5. "MCS_CH5_IRQ,MCS channel [x] interrupt" "0,1" newline bitfld.long 0x08 4. "MCS_CH4_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x08 3. "MCS_CH3_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x08 2. "MCS_CH2_IRQ,MCS channel [x] interrupt" "0,1" newline bitfld.long 0x08 1. "MCS_CH1_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x08 0. "MCS_CH0_IRQ,MCS channel [x] interrupt" "0,1" line.long 0x0C "ICM_IRQG_MCS3_CI,ICM Interrupt group MCS[j] for Channel Interrupt information" bitfld.long 0x0C 7. "MCS_CH7_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x0C 6. "MCS_CH6_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x0C 5. "MCS_CH5_IRQ,MCS channel [x] interrupt" "0,1" newline bitfld.long 0x0C 4. "MCS_CH4_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x0C 3. "MCS_CH3_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x0C 2. "MCS_CH2_IRQ,MCS channel [x] interrupt" "0,1" newline bitfld.long 0x0C 1. "MCS_CH1_IRQ,MCS channel [x] interrupt" "0,1" bitfld.long 0x0C 0. "MCS_CH0_IRQ,MCS channel [x] interrupt" "0,1" rgroup.long ad:0x94800560++0x03 line.long 0x00 "ICM_IRQG_PSM_0_CI,ICM Interrupt group PSM 0 for Channel Interrupt information of FIFO0 FIFO1 FIFO2" bitfld.long 0x00 23. "PSM_M2_CH7_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 22. "PSM_M2_CH6_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 21. "PSM_M2_CH5_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+2)" "0,1" newline bitfld.long 0x00 20. "PSM_M2_CH4_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 19. "PSM_M2_CH3_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 18. "PSM_M2_CH2_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+2)" "0,1" newline bitfld.long 0x00 17. "PSM_M2_CH1_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 16. "PSM_M2_CH0_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+2)" "0,1" bitfld.long 0x00 15. "PSM_M1_CH7_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+1)" "0,1" newline bitfld.long 0x00 14. "PSM_M1_CH6_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+1)" "0,1" bitfld.long 0x00 13. "PSM_M1_CH5_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+1)" "0,1" bitfld.long 0x00 12. "PSM_M1_CH4_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+1)" "0,1" newline bitfld.long 0x00 11. "PSM_M1_CH3_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+1)" "0,1" bitfld.long 0x00 10. "PSM_M1_CH2_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+1)" "0,1" bitfld.long 0x00 9. "PSM_M1_CH1_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+1)" "0,1" newline bitfld.long 0x00 8. "PSM_M1_CH0_IRQ,PSMm channel [x] shared interrupt ([j]=4*0+1)" "0,1" bitfld.long 0x00 7. "PSM_M0_CH7_IRQ,PSM0 channel [x] shared interrupt" "0,1" bitfld.long 0x00 6. "PSM_M0_CH6_IRQ,PSM0 channel [x] shared interrupt" "0,1" newline bitfld.long 0x00 5. "PSM_M0_CH5_IRQ,PSM0 channel [x] shared interrupt" "0,1" bitfld.long 0x00 4. "PSM_M0_CH4_IRQ,PSM0 channel [x] shared interrupt" "0,1" bitfld.long 0x00 3. "PSM_M0_CH3_IRQ,PSM0 channel [x] shared interrupt" "0,1" newline bitfld.long 0x00 2. "PSM_M0_CH2_IRQ,PSM0 channel [x] shared interrupt" "0,1" bitfld.long 0x00 1. "PSM_M0_CH1_IRQ,PSM0 channel [x] shared interrupt" "0,1" bitfld.long 0x00 0. "PSM_M0_CH0_IRQ,PSM0 channel [x] shared interrupt" "0,1" rgroup.long ad:0x94800570++0x03 line.long 0x00 "ICM_IRQG_SPE_CI,ICM Interrupt group SPE for module Interrupt information" bitfld.long 0x00 2. "SPE2_IRQ,SPE[j] interrupt" "0,1" bitfld.long 0x00 1. "SPE1_IRQ,SPE[j] interrupt" "0,1" bitfld.long 0x00 0. "SPE0_IRQ,SPE[j] interrupt" "0,1" rgroup.long ad:0x94800590++0x03 line.long 0x00 "ICM_IRQG_ATOM_0_CI,ICM Interrupt group ATOM [g] for Channel Interrupt information of ATOM[j] (m=4*[g]+(0..3))" bitfld.long 0x00 31. "ATOM_M3_CH7_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+3)" "0,1" bitfld.long 0x00 30. "ATOM_M3_CH6_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+3)" "0,1" bitfld.long 0x00 29. "ATOM_M3_CH5_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+3)" "0,1" newline bitfld.long 0x00 28. "ATOM_M3_CH4_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+3)" "0,1" bitfld.long 0x00 27. "ATOM_M3_CH3_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+3)" "0,1" bitfld.long 0x00 26. "ATOM_M3_CH2_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+3)" "0,1" newline bitfld.long 0x00 25. "ATOM_M3_CH1_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+3)" "0,1" bitfld.long 0x00 24. "ATOM_M3_CH0_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+3)" "0,1" bitfld.long 0x00 23. "ATOM_M2_CH7_IRQ,ATOMm channel [x] interrupt ([j]=4*[g]+2)" "0,1" newline bitfld.long 0x00 22. "ATOM_M2_CH6_IRQ,ATOMm channel [x] interrupt ([j]=4*[g]+2)" "0,1" bitfld.long 0x00 21. "ATOM_M2_CH5_IRQ,ATOMm channel [x] interrupt ([j]=4*[g]+2)" "0,1" bitfld.long 0x00 20. "ATOM_M2_CH4_IRQ,ATOMm channel [x] interrupt ([j]=4*[g]+2)" "0,1" newline bitfld.long 0x00 19. "ATOM_M2_CH3_IRQ,ATOMm channel [x] interrupt ([j]=4*[g]+2)" "0,1" bitfld.long 0x00 18. "ATOM_M2_CH2_IRQ,ATOMm channel [x] interrupt ([j]=4*[g]+2)" "0,1" bitfld.long 0x00 17. "ATOM_M2_CH1_IRQ,ATOMm channel [x] interrupt ([j]=4*[g]+2)" "0,1" newline bitfld.long 0x00 16. "ATOM_M2_CH0_IRQ,ATOMm channel [x] interrupt ([j]=4*[g]+2)" "0,1" bitfld.long 0x00 15. "ATOM_M1_CH7_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+1)" "0,1" bitfld.long 0x00 14. "ATOM_M1_CH6_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+1)" "0,1" newline bitfld.long 0x00 13. "ATOM_M1_CH5_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+1)" "0,1" bitfld.long 0x00 12. "ATOM_M1_CH4_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+1)" "0,1" bitfld.long 0x00 11. "ATOM_M1_CH3_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+1)" "0,1" newline bitfld.long 0x00 10. "ATOM_M1_CH2_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+1)" "0,1" bitfld.long 0x00 9. "ATOM_M1_CH1_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+1)" "0,1" bitfld.long 0x00 8. "ATOM_M1_CH0_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+1)" "0,1" newline bitfld.long 0x00 7. "ATOM_M0_CH7_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+0)" "0,1" bitfld.long 0x00 6. "ATOM_M0_CH6_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+0)" "0,1" bitfld.long 0x00 5. "ATOM_M0_CH5_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+0)" "0,1" newline bitfld.long 0x00 4. "ATOM_M0_CH4_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+0)" "0,1" bitfld.long 0x00 3. "ATOM_M0_CH3_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+0)" "0,1" bitfld.long 0x00 2. "ATOM_M0_CH2_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+0)" "0,1" newline bitfld.long 0x00 1. "ATOM_M0_CH1_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+0)" "0,1" bitfld.long 0x00 0. "ATOM_M0_CH0_IRQ,ATOM[j] channel [x] interrupt ([j]=4*[g]+0)" "0,1" rgroup.long ad:0x948005A0++0x07 line.long 0x00 "ICM_IRQG_TOM_0_CI,ICM Interrupt group TOM [g] for Channel Interrupt information of TOMm ([j]=2*[g]+(0..1))" bitfld.long 0x00 31. "TOM_M1_CH15_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" bitfld.long 0x00 30. "TOM_M1_CH14_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" bitfld.long 0x00 29. "TOM_M1_CH13_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" newline bitfld.long 0x00 28. "TOM_M1_CH12_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" bitfld.long 0x00 27. "TOM_M1_CH11_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" bitfld.long 0x00 26. "TOM_M1_CH10_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" newline bitfld.long 0x00 25. "TOM_M1_CH9_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" bitfld.long 0x00 24. "TOM_M1_CH8_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" bitfld.long 0x00 23. "TOM_M1_CH7_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" newline bitfld.long 0x00 22. "TOM_M1_CH6_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" bitfld.long 0x00 21. "TOM_M1_CH5_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" bitfld.long 0x00 20. "TOM_M1_CH4_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" newline bitfld.long 0x00 19. "TOM_M1_CH3_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" bitfld.long 0x00 18. "TOM_M1_CH2_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" bitfld.long 0x00 17. "TOM_M1_CH1_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" newline bitfld.long 0x00 16. "TOM_M1_CH0_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+1)" "0,1" bitfld.long 0x00 15. "TOM_M0_CH15_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x00 14. "TOM_M0_CH14_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" newline bitfld.long 0x00 13. "TOM_M0_CH13_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x00 12. "TOM_M0_CH12_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x00 11. "TOM_M0_CH11_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" newline bitfld.long 0x00 10. "TOM_M0_CH10_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x00 9. "TOM_M0_CH9_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x00 8. "TOM_M0_CH8_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" newline bitfld.long 0x00 7. "TOM_M0_CH7_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x00 6. "TOM_M0_CH6_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x00 5. "TOM_M0_CH5_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" newline bitfld.long 0x00 4. "TOM_M0_CH4_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x00 3. "TOM_M0_CH3_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x00 2. "TOM_M0_CH2_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" newline bitfld.long 0x00 1. "TOM_M0_CH1_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x00 0. "TOM_M0_CH0_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" line.long 0x04 "ICM_IRQG_TOM_1_CI,ICM Interrupt group TOM [g] for Channel Interrupt information of TOMm ([j]=2*[g]+(0..1))" bitfld.long 0x04 15. "TOM_M0_CH15_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x04 14. "TOM_M0_CH14_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x04 13. "TOM_M0_CH13_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" newline bitfld.long 0x04 12. "TOM_M0_CH12_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x04 11. "TOM_M0_CH11_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x04 10. "TOM_M0_CH10_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" newline bitfld.long 0x04 9. "TOM_M0_CH9_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x04 8. "TOM_M0_CH8_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x04 7. "TOM_M0_CH7_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" newline bitfld.long 0x04 6. "TOM_M0_CH6_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x04 5. "TOM_M0_CH5_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x04 4. "TOM_M0_CH4_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" newline bitfld.long 0x04 3. "TOM_M0_CH3_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x04 2. "TOM_M0_CH2_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" bitfld.long 0x04 1. "TOM_M0_CH1_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" newline bitfld.long 0x04 0. "TOM_M0_CH0_IRQ,TOM[j] channel [x] interrupt ([j]=2*[g]+0)" "0,1" group.long ad:0x94800640++0x03 line.long 0x00 "MAP_CTRL,MAP Control register" bitfld.long 0x00 30. "TSPP1_I2V,Disable of TSPP1 TIM_MAP_DATA[z][48:48] input line" "0,1" bitfld.long 0x00 29. "TSPP1_I1V,Disable of TSPP1 TIM_MAP_DATA[y][48:48] input line" "0,1" bitfld.long 0x00 28. "TSPP1_I0V,Disable of TSPP1 TIM_MAP_DATA[x][48:48] input line" "0,1" newline bitfld.long 0x00 25. "TSPP1_DLD,DIR level definition bit" "0,1" bitfld.long 0x00 24. "TSPP1_EN,Enable of TSPP1 sub-unit" "0,1" bitfld.long 0x00 22. "TSPP0_I2V,Disable of TSPP0 TIM_MAP_DATA[z][48:48] input line" "0,1" newline bitfld.long 0x00 21. "TSPP0_I1V,Disable of TSPP0 TIM_MAP_DATA[y][48:48] input line" "0,1" bitfld.long 0x00 20. "TSPP0_I0V,Disable of TSPP0 TIM_MAP_DATA[x][48:48] input line" "0,1" bitfld.long 0x00 17. "TSPP0_DLD,DIR level definition bit" "0,1" newline bitfld.long 0x00 16. "TSPP0_EN,Enable of TSPP0 sub-unit" "0,1" bitfld.long 0x00 4. "LSEL,TIM_MAP_DATA[6] input level selection" "0,1" bitfld.long 0x00 1.--3. "SSL,STATE signal output select" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 0. "TSEL,TRIGGER signal output select" "0,1" group.long ad:0x94800800++0x07 line.long 0x00 "TIM0_CH0_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM0_CH0_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94800808++0x07 line.long 0x00 "TIM0_CH0_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM0_CH0_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94800810++0x2F line.long 0x00 "TIM0_CH0_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM0_CH0_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM0_CH0_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM0_CH0_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM0_CH0_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM0_CH0_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 7. "TBU0_SEL,TIM_TBU_TS0 bits input select for TIM0_CH[x]_GPR0 and TIM0_CH[x]_GPR1" "0,1" bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" newline bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM0_CH0_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM0_CH0_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM0_CH0_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM0_CH0_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM0_CH0_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM0_CH0_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94800880++0x07 line.long 0x00 "TIM0_CH1_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM0_CH1_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94800888++0x07 line.long 0x00 "TIM0_CH1_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM0_CH1_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94800890++0x2F line.long 0x00 "TIM0_CH1_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM0_CH1_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM0_CH1_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM0_CH1_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM0_CH1_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM0_CH1_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 7. "TBU0_SEL,TIM_TBU_TS0 bits input select for TIM0_CH[x]_GPR0 and TIM0_CH[x]_GPR1" "0,1" bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" newline bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM0_CH1_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM0_CH1_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM0_CH1_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM0_CH1_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM0_CH1_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM0_CH1_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94800900++0x07 line.long 0x00 "TIM0_CH2_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM0_CH2_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94800908++0x07 line.long 0x00 "TIM0_CH2_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM0_CH2_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94800910++0x2F line.long 0x00 "TIM0_CH2_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM0_CH2_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM0_CH2_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM0_CH2_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM0_CH2_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM0_CH2_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 7. "TBU0_SEL,TIM_TBU_TS0 bits input select for TIM0_CH[x]_GPR0 and TIM0_CH[x]_GPR1" "0,1" bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" newline bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM0_CH2_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM0_CH2_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM0_CH2_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM0_CH2_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM0_CH2_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM0_CH2_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94800980++0x07 line.long 0x00 "TIM0_CH3_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM0_CH3_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94800988++0x07 line.long 0x00 "TIM0_CH3_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM0_CH3_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94800990++0x2F line.long 0x00 "TIM0_CH3_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM0_CH3_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM0_CH3_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM0_CH3_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM0_CH3_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM0_CH3_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 7. "TBU0_SEL,TIM_TBU_TS0 bits input select for TIM0_CH[x]_GPR0 and TIM0_CH[x]_GPR1" "0,1" bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" newline bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM0_CH3_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM0_CH3_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM0_CH3_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM0_CH3_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM0_CH3_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM0_CH3_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94800A00++0x07 line.long 0x00 "TIM0_CH4_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM0_CH4_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94800A08++0x07 line.long 0x00 "TIM0_CH4_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM0_CH4_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94800A10++0x2F line.long 0x00 "TIM0_CH4_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM0_CH4_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM0_CH4_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM0_CH4_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM0_CH4_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM0_CH4_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 7. "TBU0_SEL,TIM_TBU_TS0 bits input select for TIM0_CH[x]_GPR0 and TIM0_CH[x]_GPR1" "0,1" bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" newline bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM0_CH4_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM0_CH4_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM0_CH4_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM0_CH4_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM0_CH4_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM0_CH4_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94800A80++0x07 line.long 0x00 "TIM0_CH5_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM0_CH5_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94800A88++0x07 line.long 0x00 "TIM0_CH5_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM0_CH5_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94800A90++0x2F line.long 0x00 "TIM0_CH5_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM0_CH5_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM0_CH5_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM0_CH5_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM0_CH5_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM0_CH5_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 7. "TBU0_SEL,TIM_TBU_TS0 bits input select for TIM0_CH[x]_GPR0 and TIM0_CH[x]_GPR1" "0,1" bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" newline bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM0_CH5_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM0_CH5_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM0_CH5_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM0_CH5_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM0_CH5_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM0_CH5_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94800B00++0x07 line.long 0x00 "TIM0_CH6_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM0_CH6_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94800B08++0x07 line.long 0x00 "TIM0_CH6_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM0_CH6_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94800B10++0x2F line.long 0x00 "TIM0_CH6_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM0_CH6_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM0_CH6_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM0_CH6_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM0_CH6_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM0_CH6_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 7. "TBU0_SEL,TIM_TBU_TS0 bits input select for TIM0_CH[x]_GPR0 and TIM0_CH[x]_GPR1" "0,1" bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" newline bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM0_CH6_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM0_CH6_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM0_CH6_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM0_CH6_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM0_CH6_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM0_CH6_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94800B80++0x07 line.long 0x00 "TIM0_CH7_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM0_CH7_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94800B88++0x07 line.long 0x00 "TIM0_CH7_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM0_CH7_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94800B90++0x2F line.long 0x00 "TIM0_CH7_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM0_CH7_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM0_CH7_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM0_CH7_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM0_CH7_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM0_CH7_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 7. "TBU0_SEL,TIM_TBU_TS0 bits input select for TIM0_CH[x]_GPR0 and TIM0_CH[x]_GPR1" "0,1" bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" newline bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM0_CH7_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM0_CH7_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM0_CH7_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM0_CH7_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM0_CH7_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM0_CH7_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" rgroup.long ad:0x94800C00++0x03 line.long 0x00 "TIM0_INP_VAL,TIM[i] input value observation register" bitfld.long 0x00 23. "TIM_IN7,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 22. "TIM_IN6,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 21. "TIM_IN5,Signal channel [x] after TIM input signal synchronization" "0,1" newline bitfld.long 0x00 20. "TIM_IN4,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 19. "TIM_IN3,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 18. "TIM_IN2,Signal channel [x] after TIM input signal synchronization" "0,1" newline bitfld.long 0x00 17. "TIM_IN1,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 16. "TIM_IN0,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 15. "F_IN7,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" newline bitfld.long 0x00 14. "F_IN6,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 13. "F_IN5,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 12. "F_IN4,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" newline bitfld.long 0x00 11. "F_IN3,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 10. "F_IN2,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 9. "F_IN1,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" newline bitfld.long 0x00 8. "F_IN0,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 7. "F_OUT7,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 6. "F_OUT6,Signal channel [x] after TIM FLT unit" "0,1" newline bitfld.long 0x00 5. "F_OUT5,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 4. "F_OUT4,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 3. "F_OUT3,Signal channel [x] after TIM FLT unit" "0,1" newline bitfld.long 0x00 2. "F_OUT2,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 1. "F_OUT1,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 0. "F_OUT0,Signal channel [x] after TIM FLT unit" "0,1" group.long ad:0x94800C04++0x07 line.long 0x00 "TIM0_IN_SRC,TIM[i] AUX IN source selection register" bitfld.long 0x00 30.--31. "MODE_7,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 28.--29. "VAL_7,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 26.--27. "MODE_6,Input source to channel [x]" "0,1,2,3" newline bitfld.long 0x00 24.--25. "VAL_6,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 22.--23. "MODE_5,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 20.--21. "VAL_5,Value to be fed to channel [x]" "0,1,2,3" newline bitfld.long 0x00 18.--19. "MODE_4,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 16.--17. "VAL_4,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 14.--15. "MODE_3,Input source to channel [x]" "0,1,2,3" newline bitfld.long 0x00 12.--13. "VAL_3,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 10.--11. "MODE_2,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 8.--9. "VAL_2,Value to be fed to channel [x]" "0,1,2,3" newline bitfld.long 0x00 6.--7. "MODE_1,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 4.--5. "VAL_1,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 2.--3. "MODE_0,Input source to channel [x]" "0,1,2,3" newline bitfld.long 0x00 0.--1. "VAL_0,Value to be fed to channel [x]" "0,1,2,3" line.long 0x04 "TIM0_RST,TIM[i] global software reset register" bitfld.long 0x04 7. "RST_CH7,Software reset of channel [x]" "0,1" bitfld.long 0x04 6. "RST_CH6,Software reset of channel [x]" "0,1" bitfld.long 0x04 5. "RST_CH5,Software reset of channel [x]" "0,1" newline bitfld.long 0x04 4. "RST_CH4,Software reset of channel [x]" "0,1" bitfld.long 0x04 3. "RST_CH3,Software reset of channel [x]" "0,1" bitfld.long 0x04 2. "RST_CH2,Software reset of channel [x]" "0,1" newline bitfld.long 0x04 1. "RST_CH1,Software reset of channel [x]" "0,1" bitfld.long 0x04 0. "RST_CH0,Software reset of channel [x]" "0,1" group.long ad:0x94801000++0x33 line.long 0x00 "TOM0_CH0_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH0_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH0_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH0_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH0_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH0_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH0_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH0_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH0_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH0_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH0_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH0_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH0_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801040++0x33 line.long 0x00 "TOM0_CH1_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH1_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH1_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH1_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH1_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH1_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH1_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH1_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH1_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH1_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH1_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH1_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH1_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801080++0x33 line.long 0x00 "TOM0_CH2_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH2_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH2_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH2_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH2_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH2_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH2_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH2_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH2_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH2_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH2_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH2_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH2_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948010C0++0x33 line.long 0x00 "TOM0_CH3_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH3_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH3_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH3_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH3_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH3_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH3_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH3_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH3_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH3_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH3_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH3_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH3_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801100++0x33 line.long 0x00 "TOM0_CH4_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH4_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH4_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH4_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH4_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH4_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH4_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH4_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH4_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH4_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH4_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH4_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH4_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801140++0x33 line.long 0x00 "TOM0_CH5_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH5_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH5_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH5_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH5_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH5_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH5_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH5_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH5_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH5_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH5_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH5_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH5_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801180++0x33 line.long 0x00 "TOM0_CH6_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH6_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH6_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH6_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH6_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH6_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH6_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH6_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH6_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH6_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH6_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH6_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH6_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948011C0++0x33 line.long 0x00 "TOM0_CH7_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH7_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH7_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH7_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH7_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH7_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH7_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH7_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH7_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH7_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH7_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH7_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH7_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801200++0x33 line.long 0x00 "TOM0_CH8_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" newline bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" newline bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" newline bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH8_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH8_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH8_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH8_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH8_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH8_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH8_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH8_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH8_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH8_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH8_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH8_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801240++0x33 line.long 0x00 "TOM0_CH9_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" newline bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" newline bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" newline bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH9_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH9_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH9_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH9_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH9_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH9_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH9_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH9_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH9_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH9_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH9_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH9_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801280++0x33 line.long 0x00 "TOM0_CH10_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH10_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH10_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH10_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH10_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH10_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH10_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH10_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH10_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH10_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH10_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH10_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH10_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948012C0++0x33 line.long 0x00 "TOM0_CH11_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH11_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH11_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH11_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH11_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH11_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH11_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH11_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH11_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH11_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH11_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH11_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH11_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801300++0x33 line.long 0x00 "TOM0_CH12_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH12_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH12_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH12_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH12_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH12_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH12_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH12_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH12_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH12_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH12_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH12_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH12_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801340++0x33 line.long 0x00 "TOM0_CH13_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH13_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH13_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH13_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH13_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH13_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH13_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH13_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH13_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH13_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH13_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH13_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH13_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801380++0x33 line.long 0x00 "TOM0_CH14_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH14_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH14_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH14_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH14_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH14_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH14_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH14_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH14_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH14_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH14_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH14_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH14_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948013C0++0x33 line.long 0x00 "TOM0_CH15_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 27. "BITREV,Bit-reversing of output of counter TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" newline bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" newline bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" newline bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM0_CH15_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM0_CH15_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM0_CH15_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM0_CH15_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM0_CH15_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM0_CH15_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM0_CH15_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM0_CH15_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM0_CH15_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM0_CH15_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM0_CH15_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM0_CH15_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801430++0x0F line.long 0x00 "TOM0_TGC0_GLB_CTRL,TOM[i] TGC [g] global control register" bitfld.long 0x00 30.--31. "UPEN_CTRL7,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 28.--29. "UPEN_CTRL6,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 26.--27. "UPEN_CTRL5,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 24.--25. "UPEN_CTRL4,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 22.--23. "UPEN_CTRL3,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 20.--21. "UPEN_CTRL2,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 18.--19. "UPEN_CTRL1,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 16.--17. "UPEN_CTRL0,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 15. "RST_CH7,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 14. "RST_CH6,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 13. "RST_CH5,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 12. "RST_CH4,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 11. "RST_CH3,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 10. "RST_CH2,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 9. "RST_CH1,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 8. "RST_CH0,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 0. "HOST_TRIG,Trigger request signal to update the register TOM[i]_TGC[g]_ENDIS_STAT TOM[i]_TGC[g]_OUTEN_STAT" "0,1" line.long 0x04 "TOM0_TGC0_ACT_TB,TOM[i] TGC [g] action time base register" bitfld.long 0x04 25.--26. "TBU_SEL,Selection of time base used for comparison" "0,1,2,3" bitfld.long 0x04 24. "TB_TRIG,Set trigger request" "0,1" hexmask.long.tbyte 0x04 0.--23. 1. "ACT_TB,Specifies the signed compare value with selected signal CCM[i]_TBU_TS0 CCM[i]_TBU_TS1 and CCM[i]_TBU_TS2" line.long 0x08 "TOM0_TGC0_FUPD_CTRL,TOM[i] TGC [g] force update control register" bitfld.long 0x08 30.--31. "RSTCN0_CH7,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 28.--29. "RSTCN0_CH6,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 26.--27. "RSTCN0_CH5,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 24.--25. "RSTCN0_CH4,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 22.--23. "RSTCN0_CH3,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 20.--21. "RSTCN0_CH2,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 18.--19. "RSTCN0_CH1,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 16.--17. "RSTCN0_CH0,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 14.--15. "FUPD_CTRL7,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 12.--13. "FUPD_CTRL6,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 10.--11. "FUPD_CTRL5,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 8.--9. "FUPD_CTRL4,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 6.--7. "FUPD_CTRL3,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 4.--5. "FUPD_CTRL2,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 2.--3. "FUPD_CTRL1,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 0.--1. "FUPD_CTRL0,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" line.long 0x0C "TOM0_TGC0_INT_TRIG,TOM[i] TGC [g] internal trigger control register" bitfld.long 0x0C 14.--15. "INT_TRIG7,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 12.--13. "INT_TRIG6,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 10.--11. "INT_TRIG5,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "INT_TRIG4,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 6.--7. "INT_TRIG3,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 4.--5. "INT_TRIG2,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "INT_TRIG1,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 0.--1. "INT_TRIG0,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" group.long ad:0x94801470++0x0F line.long 0x00 "TOM0_TGC0_ENDIS_CTRL,TOM[i] TGC [g] enable/disable control register" bitfld.long 0x00 14.--15. "ENDIS_CTRL7,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 12.--13. "ENDIS_CTRL6,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 10.--11. "ENDIS_CTRL5,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 8.--9. "ENDIS_CTRL4,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 6.--7. "ENDIS_CTRL3,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 4.--5. "ENDIS_CTRL2,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 2.--3. "ENDIS_CTRL1,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 0.--1. "ENDIS_CTRL0,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" line.long 0x04 "TOM0_TGC0_ENDIS_STAT,TOM[i] TGC [g] enable/disable status register" bitfld.long 0x04 14.--15. "ENDIS_STAT7,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 12.--13. "ENDIS_STAT6,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 10.--11. "ENDIS_STAT5,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 8.--9. "ENDIS_STAT4,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 6.--7. "ENDIS_STAT3,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 4.--5. "ENDIS_STAT2,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 2.--3. "ENDIS_STAT1,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 0.--1. "ENDIS_STAT0,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" line.long 0x08 "TOM0_TGC0_OUTEN_CTRL,TOM[i] TGC [g] output enable control register" bitfld.long 0x08 14.--15. "OUTEN_CTRL7,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 12.--13. "OUTEN_CTRL6,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 10.--11. "OUTEN_CTRL5,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 8.--9. "OUTEN_CTRL4,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 6.--7. "OUTEN_CTRL3,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 4.--5. "OUTEN_CTRL2,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 2.--3. "OUTEN_CTRL1,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 0.--1. "OUTEN_CTRL0,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" line.long 0x0C "TOM0_TGC0_OUTEN_STAT,TOM[i] TGC [g] output enable status register" bitfld.long 0x0C 14.--15. "OUTEN_STAT7,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 12.--13. "OUTEN_STAT6,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 10.--11. "OUTEN_STAT5,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "OUTEN_STAT4,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 6.--7. "OUTEN_STAT3,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 4.--5. "OUTEN_STAT2,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "OUTEN_STAT1,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 0.--1. "OUTEN_STAT0,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" group.long ad:0x948014B0++0x0F line.long 0x00 "TOM0_TGC1_GLB_CTRL,TOM[i] TGC [g] global control register" bitfld.long 0x00 30.--31. "UPEN_CTRL7,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 28.--29. "UPEN_CTRL6,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 26.--27. "UPEN_CTRL5,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 24.--25. "UPEN_CTRL4,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 22.--23. "UPEN_CTRL3,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 20.--21. "UPEN_CTRL2,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 18.--19. "UPEN_CTRL1,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 16.--17. "UPEN_CTRL0,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 15. "RST_CH7,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 14. "RST_CH6,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 13. "RST_CH5,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 12. "RST_CH4,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 11. "RST_CH3,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 10. "RST_CH2,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 9. "RST_CH1,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 8. "RST_CH0,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 0. "HOST_TRIG,Trigger request signal to update the register TOM[i]_TGC[g]_ENDIS_STAT TOM[i]_TGC[g]_OUTEN_STAT" "0,1" line.long 0x04 "TOM0_TGC1_ACT_TB,TOM[i] TGC [g] action time base register" bitfld.long 0x04 25.--26. "TBU_SEL,Selection of time base used for comparison" "0,1,2,3" bitfld.long 0x04 24. "TB_TRIG,Set trigger request" "0,1" hexmask.long.tbyte 0x04 0.--23. 1. "ACT_TB,Specifies the signed compare value with selected signal CCM[i]_TBU_TS0 CCM[i]_TBU_TS1 and CCM[i]_TBU_TS2" line.long 0x08 "TOM0_TGC1_FUPD_CTRL,TOM[i] TGC [g] force update control register" bitfld.long 0x08 30.--31. "RSTCN0_CH7,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 28.--29. "RSTCN0_CH6,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 26.--27. "RSTCN0_CH5,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 24.--25. "RSTCN0_CH4,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 22.--23. "RSTCN0_CH3,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 20.--21. "RSTCN0_CH2,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 18.--19. "RSTCN0_CH1,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 16.--17. "RSTCN0_CH0,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 14.--15. "FUPD_CTRL7,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 12.--13. "FUPD_CTRL6,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 10.--11. "FUPD_CTRL5,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 8.--9. "FUPD_CTRL4,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 6.--7. "FUPD_CTRL3,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 4.--5. "FUPD_CTRL2,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 2.--3. "FUPD_CTRL1,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 0.--1. "FUPD_CTRL0,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" line.long 0x0C "TOM0_TGC1_INT_TRIG,TOM[i] TGC [g] internal trigger control register" bitfld.long 0x0C 14.--15. "INT_TRIG7,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 12.--13. "INT_TRIG6,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 10.--11. "INT_TRIG5,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "INT_TRIG4,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 6.--7. "INT_TRIG3,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 4.--5. "INT_TRIG2,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "INT_TRIG1,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 0.--1. "INT_TRIG0,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" group.long ad:0x948014F0++0x0F line.long 0x00 "TOM0_TGC1_ENDIS_CTRL,TOM[i] TGC [g] enable/disable control register" bitfld.long 0x00 14.--15. "ENDIS_CTRL7,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 12.--13. "ENDIS_CTRL6,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 10.--11. "ENDIS_CTRL5,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 8.--9. "ENDIS_CTRL4,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 6.--7. "ENDIS_CTRL3,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 4.--5. "ENDIS_CTRL2,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 2.--3. "ENDIS_CTRL1,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 0.--1. "ENDIS_CTRL0,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" line.long 0x04 "TOM0_TGC1_ENDIS_STAT,TOM[i] TGC [g] enable/disable status register" bitfld.long 0x04 14.--15. "ENDIS_STAT7,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 12.--13. "ENDIS_STAT6,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 10.--11. "ENDIS_STAT5,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 8.--9. "ENDIS_STAT4,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 6.--7. "ENDIS_STAT3,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 4.--5. "ENDIS_STAT2,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 2.--3. "ENDIS_STAT1,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 0.--1. "ENDIS_STAT0,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" line.long 0x08 "TOM0_TGC1_OUTEN_CTRL,TOM[i] TGC [g] output enable control register" bitfld.long 0x08 14.--15. "OUTEN_CTRL7,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 12.--13. "OUTEN_CTRL6,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 10.--11. "OUTEN_CTRL5,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 8.--9. "OUTEN_CTRL4,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 6.--7. "OUTEN_CTRL3,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 4.--5. "OUTEN_CTRL2,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 2.--3. "OUTEN_CTRL1,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 0.--1. "OUTEN_CTRL0,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" line.long 0x0C "TOM0_TGC1_OUTEN_STAT,TOM[i] TGC [g] output enable status register" bitfld.long 0x0C 14.--15. "OUTEN_STAT7,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 12.--13. "OUTEN_STAT6,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 10.--11. "OUTEN_STAT5,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "OUTEN_STAT4,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 6.--7. "OUTEN_STAT3,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 4.--5. "OUTEN_STAT2,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "OUTEN_STAT1,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 0.--1. "OUTEN_STAT0,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" group.long ad:0x94801800++0x37 line.long 0x00 "ATOM0_CH0_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM0_CH0_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM0_CH0_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM0_CH0_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM0_CH0_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM0_CH0_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM0_CH0_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM0_CH0_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM0_CH0_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM0_CH0_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM0_CH0_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM0_CH0_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM0_CH0_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM0_CH0_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801880++0x37 line.long 0x00 "ATOM0_CH1_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM0_CH1_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM0_CH1_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM0_CH1_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM0_CH1_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM0_CH1_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM0_CH1_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM0_CH1_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM0_CH1_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM0_CH1_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM0_CH1_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM0_CH1_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM0_CH1_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM0_CH1_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801900++0x37 line.long 0x00 "ATOM0_CH2_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM0_CH2_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM0_CH2_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM0_CH2_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM0_CH2_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM0_CH2_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM0_CH2_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM0_CH2_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM0_CH2_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM0_CH2_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM0_CH2_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM0_CH2_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM0_CH2_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM0_CH2_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801980++0x37 line.long 0x00 "ATOM0_CH3_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM0_CH3_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM0_CH3_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM0_CH3_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM0_CH3_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM0_CH3_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM0_CH3_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM0_CH3_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM0_CH3_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM0_CH3_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM0_CH3_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM0_CH3_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM0_CH3_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM0_CH3_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801A00++0x37 line.long 0x00 "ATOM0_CH4_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM0_CH4_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM0_CH4_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM0_CH4_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM0_CH4_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM0_CH4_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM0_CH4_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM0_CH4_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM0_CH4_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM0_CH4_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM0_CH4_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM0_CH4_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM0_CH4_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM0_CH4_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801A80++0x37 line.long 0x00 "ATOM0_CH5_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM0_CH5_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM0_CH5_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM0_CH5_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM0_CH5_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM0_CH5_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM0_CH5_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM0_CH5_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM0_CH5_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM0_CH5_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM0_CH5_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM0_CH5_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM0_CH5_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM0_CH5_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801B00++0x37 line.long 0x00 "ATOM0_CH6_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM0_CH6_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM0_CH6_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM0_CH6_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM0_CH6_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM0_CH6_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM0_CH6_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM0_CH6_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM0_CH6_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM0_CH6_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM0_CH6_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM0_CH6_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM0_CH6_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM0_CH6_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801B80++0x37 line.long 0x00 "ATOM0_CH7_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM0_CH7_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM0_CH7_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM0_CH7_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM0_CH7_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM0_CH7_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM0_CH7_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM0_CH7_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM0_CH7_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM0_CH7_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM0_CH7_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM0_CH7_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM0_CH7_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM0_CH7_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94801C40++0x1F line.long 0x00 "ATOM0_AGC_GLB_CTRL,ATOM[i] AGC global control register" bitfld.long 0x00 30.--31. "UPEN_CTRL7,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 28.--29. "UPEN_CTRL6,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 26.--27. "UPEN_CTRL5,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" newline bitfld.long 0x00 24.--25. "UPEN_CTRL4,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 22.--23. "UPEN_CTRL3,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 20.--21. "UPEN_CTRL2,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" newline bitfld.long 0x00 18.--19. "UPEN_CTRL1,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 16.--17. "UPEN_CTRL0,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 15. "RST_CH7,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 14. "RST_CH6,Software reset of channel [k]" "0,1" bitfld.long 0x00 13. "RST_CH5,Software reset of channel [k]" "0,1" bitfld.long 0x00 12. "RST_CH4,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 11. "RST_CH3,Software reset of channel [k]" "0,1" bitfld.long 0x00 10. "RST_CH2,Software reset of channel [k]" "0,1" bitfld.long 0x00 9. "RST_CH1,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 8. "RST_CH0,Software reset of channel [k]" "0,1" bitfld.long 0x00 0. "HOST_TRIG,Trigger request signal (see AGC) to update the register ATOM[i]_AGC_ENDIS_STAT and ATOM[i]_AGC_OUTEN_STAT" "0,1" line.long 0x04 "ATOM0_AGC_ENDIS_CTRL,ATOM[i] AGC enable/disable control register" bitfld.long 0x04 14.--15. "ENDIS_CTRL7,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 12.--13. "ENDIS_CTRL6,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 10.--11. "ENDIS_CTRL5,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" newline bitfld.long 0x04 8.--9. "ENDIS_CTRL4,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 6.--7. "ENDIS_CTRL3,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 4.--5. "ENDIS_CTRL2,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" newline bitfld.long 0x04 2.--3. "ENDIS_CTRL1,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 0.--1. "ENDIS_CTRL0,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" line.long 0x08 "ATOM0_AGC_ENDIS_STAT,ATOM[i] AGC enable/disable status register" bitfld.long 0x08 14.--15. "ENDIS_STAT7,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 12.--13. "ENDIS_STAT6,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 10.--11. "ENDIS_STAT5,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" newline bitfld.long 0x08 8.--9. "ENDIS_STAT4,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 6.--7. "ENDIS_STAT3,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 4.--5. "ENDIS_STAT2,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" newline bitfld.long 0x08 2.--3. "ENDIS_STAT1,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 0.--1. "ENDIS_STAT0,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" line.long 0x0C "ATOM0_AGC_ACT_TB,ATOM[i] AGC action time base register" bitfld.long 0x0C 25.--26. "TBU_SEL,Selection of time base used for comparison" "0,1,2,3" bitfld.long 0x0C 24. "TB_TRIG,Set trigger request" "0,1" hexmask.long.tbyte 0x0C 0.--23. 1. "ACT_TB,Specifies the signed compare value with selected signal CCM[i]_TBU_TS0/CCM[i]_TBU_TS1/CCM[i]_TBU_TS2" line.long 0x10 "ATOM0_AGC_OUTEN_CTRL,ATOM[i] AGC output enable control register" bitfld.long 0x10 14.--15. "OUTEN_CTRL7,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 12.--13. "OUTEN_CTRL6,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 10.--11. "OUTEN_CTRL5,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" newline bitfld.long 0x10 8.--9. "OUTEN_CTRL4,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 6.--7. "OUTEN_CTRL3,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 4.--5. "OUTEN_CTRL2,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" newline bitfld.long 0x10 2.--3. "OUTEN_CTRL1,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 0.--1. "OUTEN_CTRL0,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" line.long 0x14 "ATOM0_AGC_OUTEN_STAT,ATOM[i] AGC output enable status register" bitfld.long 0x14 14.--15. "OUTEN_STAT7,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 12.--13. "OUTEN_STAT6,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 10.--11. "OUTEN_STAT5,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" newline bitfld.long 0x14 8.--9. "OUTEN_STAT4,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 6.--7. "OUTEN_STAT3,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 4.--5. "OUTEN_STAT2,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" newline bitfld.long 0x14 2.--3. "OUTEN_STAT1,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 0.--1. "OUTEN_STAT0,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" line.long 0x18 "ATOM0_AGC_FUPD_CTRL,ATOM[i] AGC force update control register" bitfld.long 0x18 30.--31. "RSTCN0_CH7,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 28.--29. "RSTCN0_CH6,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 26.--27. "RSTCN0_CH5,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" newline bitfld.long 0x18 24.--25. "RSTCN0_CH4,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 22.--23. "RSTCN0_CH3,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 20.--21. "RSTCN0_CH2,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" newline bitfld.long 0x18 18.--19. "RSTCN0_CH1,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 16.--17. "RSTCN0_CH0,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 14.--15. "FUPD_CTRL7,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 12.--13. "FUPD_CTRL6,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 10.--11. "FUPD_CTRL5,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 8.--9. "FUPD_CTRL4,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 6.--7. "FUPD_CTRL3,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 4.--5. "FUPD_CTRL2,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 2.--3. "FUPD_CTRL1,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 0.--1. "FUPD_CTRL0,Force update of ATOM channel [k] operation registers" "0,1,2,3" line.long 0x1C "ATOM0_AGC_INT_TRIG,ATOM[i] AGC internal trigger control register" bitfld.long 0x1C 14.--15. "INT_TRIG7,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 12.--13. "INT_TRIG6,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 10.--11. "INT_TRIG5,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" newline bitfld.long 0x1C 8.--9. "INT_TRIG4,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 6.--7. "INT_TRIG3,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 4.--5. "INT_TRIG2,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" newline bitfld.long 0x1C 2.--3. "INT_TRIG1,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 0.--1. "INT_TRIG0,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" group.long ad:0x94802000++0x23 line.long 0x00 "MCS0_CH0_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS0_CH0_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS0_CH0_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS0_CH0_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS0_CH0_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS0_CH0_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS0_CH0_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS0_CH0_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS0_CH0_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94802024++0x03 line.long 0x00 "MCS0_CH0_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9480203C++0x03 line.long 0x00 "MCS0_CH0_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948020E0++0x17 line.long 0x00 "MCS0_CH0_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS0_CH0_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS0_CH0_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS0_CH0_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS0_CH0_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS0_CH0_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94802100++0x23 line.long 0x00 "MCS0_CH1_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS0_CH1_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS0_CH1_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS0_CH1_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS0_CH1_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS0_CH1_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS0_CH1_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS0_CH1_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS0_CH1_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94802124++0x03 line.long 0x00 "MCS0_CH1_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9480213C++0x03 line.long 0x00 "MCS0_CH1_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948021E0++0x17 line.long 0x00 "MCS0_CH1_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS0_CH1_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS0_CH1_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS0_CH1_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS0_CH1_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS0_CH1_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94802200++0x23 line.long 0x00 "MCS0_CH2_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS0_CH2_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS0_CH2_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS0_CH2_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS0_CH2_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS0_CH2_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS0_CH2_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS0_CH2_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS0_CH2_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94802224++0x03 line.long 0x00 "MCS0_CH2_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9480223C++0x03 line.long 0x00 "MCS0_CH2_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948022E0++0x17 line.long 0x00 "MCS0_CH2_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS0_CH2_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS0_CH2_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS0_CH2_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS0_CH2_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS0_CH2_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94802300++0x23 line.long 0x00 "MCS0_CH3_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS0_CH3_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS0_CH3_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS0_CH3_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS0_CH3_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS0_CH3_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS0_CH3_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS0_CH3_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS0_CH3_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94802324++0x03 line.long 0x00 "MCS0_CH3_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9480233C++0x03 line.long 0x00 "MCS0_CH3_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948023E0++0x17 line.long 0x00 "MCS0_CH3_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS0_CH3_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS0_CH3_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS0_CH3_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS0_CH3_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS0_CH3_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94802400++0x23 line.long 0x00 "MCS0_CH4_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS0_CH4_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS0_CH4_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS0_CH4_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS0_CH4_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS0_CH4_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS0_CH4_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS0_CH4_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS0_CH4_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94802424++0x03 line.long 0x00 "MCS0_CH4_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9480243C++0x03 line.long 0x00 "MCS0_CH4_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948024E0++0x17 line.long 0x00 "MCS0_CH4_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS0_CH4_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS0_CH4_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS0_CH4_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS0_CH4_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS0_CH4_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94802500++0x23 line.long 0x00 "MCS0_CH5_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS0_CH5_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS0_CH5_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS0_CH5_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS0_CH5_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS0_CH5_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS0_CH5_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS0_CH5_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS0_CH5_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94802524++0x03 line.long 0x00 "MCS0_CH5_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9480253C++0x03 line.long 0x00 "MCS0_CH5_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948025E0++0x17 line.long 0x00 "MCS0_CH5_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS0_CH5_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS0_CH5_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS0_CH5_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS0_CH5_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS0_CH5_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94802600++0x23 line.long 0x00 "MCS0_CH6_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS0_CH6_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS0_CH6_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS0_CH6_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS0_CH6_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS0_CH6_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS0_CH6_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS0_CH6_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS0_CH6_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94802624++0x03 line.long 0x00 "MCS0_CH6_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9480263C++0x03 line.long 0x00 "MCS0_CH6_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948026E0++0x17 line.long 0x00 "MCS0_CH6_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS0_CH6_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS0_CH6_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS0_CH6_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS0_CH6_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS0_CH6_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94802700++0x23 line.long 0x00 "MCS0_CH7_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS0_CH7_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS0_CH7_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS0_CH7_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS0_CH7_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS0_CH7_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS0_CH7_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS0_CH7_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS0_CH7_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94802724++0x03 line.long 0x00 "MCS0_CH7_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9480273C++0x03 line.long 0x00 "MCS0_CH7_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948027E0++0x17 line.long 0x00 "MCS0_CH7_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS0_CH7_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS0_CH7_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS0_CH7_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS0_CH7_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS0_CH7_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94802E28++0x07 line.long 0x00 "MCS0_CTRG,MCS[i] clear trigger control register" bitfld.long 0x00 23. "TRG23,Trigger bit [o]" "0,1" bitfld.long 0x00 22. "TRG22,Trigger bit [o]" "0,1" bitfld.long 0x00 21. "TRG21,Trigger bit [o]" "0,1" newline bitfld.long 0x00 20. "TRG20,Trigger bit [o]" "0,1" bitfld.long 0x00 19. "TRG19,Trigger bit [o]" "0,1" bitfld.long 0x00 18. "TRG18,Trigger bit [o]" "0,1" newline bitfld.long 0x00 17. "TRG17,Trigger bit [o]" "0,1" bitfld.long 0x00 16. "TRG16,Trigger bit [o]" "0,1" bitfld.long 0x00 15. "TRG15,Trigger bit [n]" "0,1" newline bitfld.long 0x00 14. "TRG14,Trigger bit [n]" "0,1" bitfld.long 0x00 13. "TRG13,Trigger bit [n]" "0,1" bitfld.long 0x00 12. "TRG12,Trigger bit [n]" "0,1" newline bitfld.long 0x00 11. "TRG11,Trigger bit [n]" "0,1" bitfld.long 0x00 10. "TRG10,Trigger bit [n]" "0,1" bitfld.long 0x00 9. "TRG9,Trigger bit [n]" "0,1" newline bitfld.long 0x00 8. "TRG8,Trigger bit [n]" "0,1" bitfld.long 0x00 7. "TRG7,Trigger bit [m]" "0,1" bitfld.long 0x00 6. "TRG6,Trigger bit [m]" "0,1" newline bitfld.long 0x00 5. "TRG5,Trigger bit [m]" "0,1" bitfld.long 0x00 4. "TRG4,Trigger bit [m]" "0,1" bitfld.long 0x00 3. "TRG3,Trigger bit [m]" "0,1" newline bitfld.long 0x00 2. "TRG2,Trigger bit [m]" "0,1" bitfld.long 0x00 1. "TRG1,Trigger bit [m]" "0,1" bitfld.long 0x00 0. "TRG0,Trigger bit [m]" "0,1" line.long 0x04 "MCS0_STRG,MCS[i] set trigger control register" bitfld.long 0x04 23. "TRG23,Trigger bit [k]" "0,1" bitfld.long 0x04 22. "TRG22,Trigger bit [k]" "0,1" bitfld.long 0x04 21. "TRG21,Trigger bit [k]" "0,1" newline bitfld.long 0x04 20. "TRG20,Trigger bit [k]" "0,1" bitfld.long 0x04 19. "TRG19,Trigger bit [k]" "0,1" bitfld.long 0x04 18. "TRG18,Trigger bit [k]" "0,1" newline bitfld.long 0x04 17. "TRG17,Trigger bit [k]" "0,1" bitfld.long 0x04 16. "TRG16,Trigger bit [k]" "0,1" bitfld.long 0x04 15. "TRG15,Trigger bit [k]" "0,1" newline bitfld.long 0x04 14. "TRG14,Trigger bit [k]" "0,1" bitfld.long 0x04 13. "TRG13,Trigger bit [k]" "0,1" bitfld.long 0x04 12. "TRG12,Trigger bit [k]" "0,1" newline bitfld.long 0x04 11. "TRG11,Trigger bit [k]" "0,1" bitfld.long 0x04 10. "TRG10,Trigger bit [k]" "0,1" bitfld.long 0x04 9. "TRG9,Trigger bit [k]" "0,1" newline bitfld.long 0x04 8. "TRG8,Trigger bit [k]" "0,1" bitfld.long 0x04 7. "TRG7,Trigger bit [k]" "0,1" bitfld.long 0x04 6. "TRG6,Trigger bit [k]" "0,1" newline bitfld.long 0x04 5. "TRG5,Trigger bit [k]" "0,1" bitfld.long 0x04 4. "TRG4,Trigger bit [k]" "0,1" bitfld.long 0x04 3. "TRG3,Trigger bit [k]" "0,1" newline bitfld.long 0x04 2. "TRG2,Trigger bit [k]" "0,1" bitfld.long 0x04 1. "TRG1,Trigger bit [k]" "0,1" bitfld.long 0x04 0. "TRG0,Trigger bit [k]" "0,1" group.long ad:0x94802F00++0x13 line.long 0x00 "MCS0_CTRL_STAT,MCS[i] control and status register" bitfld.long 0x00 26. "HLT_AEIM_ERR,Halt on AEI bus master error" "0,1" bitfld.long 0x00 25. "EN_HVD,Enable Modified Harvard architecture" "0,1" bitfld.long 0x00 24. "EN_TIM_FOUT,Enable routing of TIM[i]_CH[x]_F_OUT signal" "0,1" newline rbitfld.long 0x00 20.--22. "ERR_SRC_ID,Error source identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16. "RAM_RST,RAM reset bit" "0,1" bitfld.long 0x00 8.--11. "SCD_CH,Channel selection for scheduling algorithm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0.--1. "SCD_MODE,Select MCS scheduling mode" "0,1,2,3" line.long 0x04 "MCS0_RESET,MCS[i] reset register" bitfld.long 0x04 7. "RST7,Software reset of channel x" "0,1" bitfld.long 0x04 6. "RST6,Software reset of channel x" "0,1" bitfld.long 0x04 5. "RST5,Software reset of channel x" "0,1" newline bitfld.long 0x04 4. "RST4,Software reset of channel x" "0,1" bitfld.long 0x04 3. "RST3,Software reset of channel x" "0,1" bitfld.long 0x04 2. "RST2,Software reset of channel x" "0,1" newline bitfld.long 0x04 1. "RST1,Software reset of channel x" "0,1" bitfld.long 0x04 0. "RST0,Software reset of channel x" "0,1" line.long 0x08 "MCS0_CAT,MCS[i] cancel ARU transfer instruction" bitfld.long 0x08 7. "CAT7,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 6. "CAT6,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 5. "CAT5,Cancel ARU transfer of channel x" "0,1" newline bitfld.long 0x08 4. "CAT4,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 3. "CAT3,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 2. "CAT2,Cancel ARU transfer of channel x" "0,1" newline bitfld.long 0x08 1. "CAT1,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 0. "CAT0,Cancel ARU transfer of channel x" "0,1" line.long 0x0C "MCS0_CWT,MCS[i] cancel waiting instruction" bitfld.long 0x0C 7. "CWT7,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 6. "CWT6,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 5. "CWT5,Cancel waiting instruction for channel x" "0,1" newline bitfld.long 0x0C 4. "CWT4,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 3. "CWT3,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 2. "CWT2,Cancel waiting instruction for channel x" "0,1" newline bitfld.long 0x0C 1. "CWT1,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 0. "CWT0,Cancel waiting instruction for channel x" "0,1" line.long 0x10 "MCS0_ERR,MCS[i] error register" bitfld.long 0x10 7. "ERR7,Error State of MCS-channel x" "0,1" bitfld.long 0x10 6. "ERR6,Error State of MCS-channel x" "0,1" bitfld.long 0x10 5. "ERR5,Error State of MCS-channel x" "0,1" newline bitfld.long 0x10 4. "ERR4,Error State of MCS-channel x" "0,1" bitfld.long 0x10 3. "ERR3,Error State of MCS-channel x" "0,1" bitfld.long 0x10 2. "ERR2,Error State of MCS-channel x" "0,1" newline bitfld.long 0x10 1. "ERR1,Error State of MCS-channel x" "0,1" bitfld.long 0x10 0. "ERR0,Error State of MCS-channel x" "0,1" group.long ad:0x94802F1C++0x13 line.long 0x00 "MCS0_REG_PROT,MCS[i] write protection register" bitfld.long 0x00 14.--15. "WPROT7,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 12.--13. "WPROT6,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 10.--11. "WPROT5,Register Write Protection of MCS-channel [x]" "0,1,2,3" newline bitfld.long 0x00 8.--9. "WPROT4,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 6.--7. "WPROT3,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 4.--5. "WPROT2,Register Write Protection of MCS-channel [x]" "0,1,2,3" newline bitfld.long 0x00 2.--3. "WPROT1,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 0.--1. "WPROT0,Register Write Protection of MCS-channel [x]" "0,1,2,3" line.long 0x04 "MCS0_SINT_IRQ_NOTIFY,MCS[i] shared interrupt notification register" bitfld.long 0x04 7. "S_IRQ7,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 6. "S_IRQ6,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 5. "S_IRQ5,Shared interrupt [k] notify flag" "0,1" newline bitfld.long 0x04 4. "S_IRQ4,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 3. "S_IRQ3,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 2. "S_IRQ2,Shared interrupt [k] notify flag" "0,1" newline bitfld.long 0x04 1. "S_IRQ1,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 0. "S_IRQ0,Shared interrupt [k] notify flag" "0,1" line.long 0x08 "MCS0_SINT_IRQ_EN,MCS[i] shared interrupt enable register" bitfld.long 0x08 7. "S_IRQ7_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 6. "S_IRQ6_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 5. "S_IRQ5_EN,Shared interrupt [k]" "0,1" newline bitfld.long 0x08 4. "S_IRQ4_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 3. "S_IRQ3_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 2. "S_IRQ2_EN,Shared interrupt [k]" "0,1" newline bitfld.long 0x08 1. "S_IRQ1_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 0. "S_IRQ0_EN,Shared interrupt [k]" "0,1" line.long 0x0C "MCS0_SINT_IRQ_FORCINT,MCS[i] force shared interrupt register" bitfld.long 0x0C 7. "TRG_S_IRQ7,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 6. "TRG_S_IRQ6,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 5. "TRG_S_IRQ5,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" newline bitfld.long 0x0C 4. "TRG_S_IRQ4,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 3. "TRG_S_IRQ3,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 2. "TRG_S_IRQ2,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" newline bitfld.long 0x0C 1. "TRG_S_IRQ1,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 0. "TRG_S_IRQ0,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" line.long 0x10 "MCS0_SINT_IRQ_MODE,MCS[i] shared interrupt mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94802F40++0x1B line.long 0x00 "MCS0_HBP0_CTRL,MCS[i] hardware break point h control register" bitfld.long 0x00 17. "NOT,Logical negation of h-th hardware break point" "0,1" bitfld.long 0x00 16. "AND,Logical AND conjunction of h-th hardware break point" "0,1" bitfld.long 0x00 12.--14. "TYPE,Define type of h-th hardware break point" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 8.--9. "SCOPE,Define scope of h-th hardware break point" "0,1,2,3" bitfld.long 0x00 7. "EN_CH7,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 6. "EN_CH6,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 5. "EN_CH5,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 4. "EN_CH4,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 3. "EN_CH3,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 2. "EN_CH2,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 1. "EN_CH1,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 0. "EN_CH0,Enable h-th hardware break point for channel x" "0,1" line.long 0x04 "MCS0_HBP0_PATTERN,MCS[i] hardware break point pattern register" line.long 0x08 "MCS0_HBP0_STATUS,MCS[i] hardware break point status register" bitfld.long 0x08 7. "HALT_CH7,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 6. "HALT_CH6,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 5. "HALT_CH5,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 4. "HALT_CH4,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 3. "HALT_CH3,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 2. "HALT_CH2,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 1. "HALT_CH1,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 0. "HALT_CH0,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" line.long 0x0C "MCS0_HBP0_IRQ_NOTIFY,MCS[i] hardware break point interrupt notification register" bitfld.long 0x0C 0. "HBP_IRQ,Interrupt notify flag of the h-th hardware break point" "0,1" line.long 0x10 "MCS0_HBP0_IRQ_EN,MCS[i] hardware break point interrupt enable register" bitfld.long 0x10 0. "HBP_IRQ_EN,Interrupt Enable bit of the h-th hardware break point" "0,1" line.long 0x14 "MCS0_HBP0_IRQ_FORCINT,MCS[i] force hardware break point interrupt register" bitfld.long 0x14 0. "TRG_HBP_IRQ,Trigger the bit MCS[i]_HBP[h]_IRQ_NOTIFY.HBP_IRQ by software" "0,1" line.long 0x18 "MCS0_HBP0_IRQ_MODE,MCS[i] break point h interrupt mode configuration register" bitfld.long 0x18 0.--1. "IRQ_MODE,IRQ mode selection for all break point interrupts" "0,1,2,3" group.long ad:0x94802F60++0x1B line.long 0x00 "MCS0_HBP1_CTRL,MCS[i] hardware break point h control register" bitfld.long 0x00 17. "NOT,Logical negation of h-th hardware break point" "0,1" bitfld.long 0x00 16. "AND,Logical AND conjunction of h-th hardware break point" "0,1" bitfld.long 0x00 12.--14. "TYPE,Define type of h-th hardware break point" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 8.--9. "SCOPE,Define scope of h-th hardware break point" "0,1,2,3" bitfld.long 0x00 7. "EN_CH7,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 6. "EN_CH6,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 5. "EN_CH5,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 4. "EN_CH4,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 3. "EN_CH3,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 2. "EN_CH2,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 1. "EN_CH1,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 0. "EN_CH0,Enable h-th hardware break point for channel x" "0,1" line.long 0x04 "MCS0_HBP1_PATTERN,MCS[i] hardware break point pattern register" line.long 0x08 "MCS0_HBP1_STATUS,MCS[i] hardware break point status register" bitfld.long 0x08 7. "HALT_CH7,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 6. "HALT_CH6,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 5. "HALT_CH5,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 4. "HALT_CH4,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 3. "HALT_CH3,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 2. "HALT_CH2,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 1. "HALT_CH1,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 0. "HALT_CH0,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" line.long 0x0C "MCS0_HBP1_IRQ_NOTIFY,MCS[i] hardware break point interrupt notification register" bitfld.long 0x0C 0. "HBP_IRQ,Interrupt notify flag of the h-th hardware break point" "0,1" line.long 0x10 "MCS0_HBP1_IRQ_EN,MCS[i] hardware break point interrupt enable register" bitfld.long 0x10 0. "HBP_IRQ_EN,Interrupt Enable bit of the h-th hardware break point" "0,1" line.long 0x14 "MCS0_HBP1_IRQ_FORCINT,MCS[i] force hardware break point interrupt register" bitfld.long 0x14 0. "TRG_HBP_IRQ,Trigger the bit MCS[i]_HBP[h]_IRQ_NOTIFY.HBP_IRQ by software" "0,1" line.long 0x18 "MCS0_HBP1_IRQ_MODE,MCS[i] break point h interrupt mode configuration register" bitfld.long 0x18 0.--1. "IRQ_MODE,IRQ mode selection for all break point interrupts" "0,1,2,3" group.long ad:0x94804000++0x4F line.long 0x00 "CCM0_ARP0_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x00 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x00 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x00 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--15. 1. "ADDR,ARP base address" line.long 0x04 "CCM0_ARP0_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x04 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x04 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x04 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x08 "CCM0_ARP1_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x08 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x08 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x08 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x08 0.--15. 1. "ADDR,ARP base address" line.long 0x0C "CCM0_ARP1_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x0C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x0C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x0C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x10 "CCM0_ARP2_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x10 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x10 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x10 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x10 0.--15. 1. "ADDR,ARP base address" line.long 0x14 "CCM0_ARP2_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x14 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x14 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x14 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x18 "CCM0_ARP3_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x18 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x18 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x18 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x18 0.--15. 1. "ADDR,ARP base address" line.long 0x1C "CCM0_ARP3_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x1C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x1C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x1C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x20 "CCM0_ARP4_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x20 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x20 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x20 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x20 0.--15. 1. "ADDR,ARP base address" line.long 0x24 "CCM0_ARP4_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x24 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x24 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x24 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x28 "CCM0_ARP5_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x28 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x28 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x28 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x28 0.--15. 1. "ADDR,ARP base address" line.long 0x2C "CCM0_ARP5_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x2C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x2C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x2C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x30 "CCM0_ARP6_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x30 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x30 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x30 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x30 0.--15. 1. "ADDR,ARP base address" line.long 0x34 "CCM0_ARP6_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x34 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x34 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x34 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x38 "CCM0_ARP7_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x38 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x38 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x38 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x38 0.--15. 1. "ADDR,ARP base address" line.long 0x3C "CCM0_ARP7_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x3C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x3C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x3C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x40 "CCM0_ARP8_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x40 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x40 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x40 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x40 0.--15. 1. "ADDR,ARP base address" line.long 0x44 "CCM0_ARP8_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x44 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x44 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x44 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x48 "CCM0_ARP9_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x48 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x48 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x48 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x48 0.--15. 1. "ADDR,ARP base address" line.long 0x4C "CCM0_ARP9_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x4C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x4C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x4C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" rgroup.long ad:0x948041D4++0x03 line.long 0x00 "CCM0_HW_CONF2,CCM[i] 2. Hardware Configuration Register" bitfld.long 0x00 18. "AXIM_DATA_SIZE,Defines the data bus width of the AXI master interface" "0,1" bitfld.long 0x00 16. "AXIS_DATA_SIZE,Defines the data bus width of the AXI slave interface" "0,1" bitfld.long 0x00 9. "TIO_OUT_RST,Reset level for all TIO output signals" "0,1" newline bitfld.long 0x00 7. "AXIM_POSTED_WRITE,Write transaction without response" "0,1" bitfld.long 0x00 6. "AXIM_SEC_ACC,Secure AXI master access constant" "0,1" bitfld.long 0x00 5. "AXIM_PRIV_ACC,Privileged AXI master access constant" "0,1" newline bitfld.long 0x00 0.--4. "AXIM_ID_WIDTH,Defines which LSB of AXIM_ID are send to the bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x948041D8++0x03 line.long 0x00 "CCM0_AEIM_STA,CCM[i] MCS Bus Master Status Register" bitfld.long 0x00 24.--25. "AEIM_XPT_STA,AEIM exception status" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. "AEIM_XPT_ADDR,Exception address" rgroup.long ad:0x948041DC++0x03 line.long 0x00 "CCM0_HW_CONF,CCM[i] Hardware Configuration Register" bitfld.long 0x00 31. "AEI_RDATA_PIPELINE_STAGE,Read data pipeline stage implemented" "0,1" bitfld.long 0x00 30. "AEI_ADDR_PIPELINE_STAGE,Address pipeline stage implemented" "0,1" bitfld.long 0x00 29. "INT_CLK_EN_GEN,Internal clock enable generation" "0,1" newline bitfld.long 0x00 24.--28. "TOM_TRIG_INTCHAIN,TOM internal trigger chain length for pipeline register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20.--23. "ATOM_TRIG_INTCHAIN,ATOM internal trigger chain length for pipeline register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 19. "IRQ_MODE_SINGLE_PULSE,Signalize availability of Single Pulse IRQ mode" "0,1" newline bitfld.long 0x00 18. "IRQ_MODE_PULSE_NOTIFY,Signalize availability of Pulse Notoify IRQ mode" "0,1" bitfld.long 0x00 17. "IRQ_MODE_PULSE,Signalize availability of Pulse IRQ mode" "0,1" bitfld.long 0x00 16. "IRQ_MODE_LEVEL,Signalize availability of Level IRQ mode" "0,1" newline bitfld.long 0x00 15. "RESET_ACTIVE,Active level of asynchronous reset" "0,1" bitfld.long 0x00 13. "ERM,Enable RAM1 MSB for available MCS modules" "0,1" bitfld.long 0x00 12. "RAM_INIT_RST,RAM initialization from reset" "0,1" newline bitfld.long 0x00 9.--11. "TOM_TRIG_CHAIN,TOM trigger chain length without synchronization register" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. "TOM_OUT_RST,CCM_TOM_OUT reset level" "0,1" bitfld.long 0x00 5.--7. "ATOM_TRIG_CHAIN,ATOM trigger chain length without synchronization register" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4. "ATOM_OUT_RST,CCM_ATOM_OUT reset level" "0,1" bitfld.long 0x00 3. "CFG_CLOCK_RATE,Clocks per ARU transfer" "0,1" bitfld.long 0x00 2. "SYNC_INPUT_REG,Additional pipelined stage in synchronous bridge mode" "0,1" newline bitfld.long 0x00 1. "BRIDGE_MODE_RST,Bridge mode after reset" "0,1" bitfld.long 0x00 0. "GRSTEN,Global Reset Enable" "0,1" group.long ad:0x948041E0++0x07 line.long 0x00 "CCM0_TIM_AUX_IN_SRC,CCM[i] TIM AUX Input Source Register" bitfld.long 0x00 23. "SEL_OUT_N_CH7,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 22. "SEL_OUT_N_CH6,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 21. "SEL_OUT_N_CH5,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" newline bitfld.long 0x00 20. "SEL_OUT_N_CH4,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 19. "SEL_OUT_N_CH3,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 18. "SEL_OUT_N_CH2,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" newline bitfld.long 0x00 17. "SEL_OUT_N_CH1,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 16. "SEL_OUT_N_CH0,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 7. "SRC_CH7,Defines CCM_AUX_IN source of TIM[i] channel 7" "0,1" newline bitfld.long 0x00 6. "SRC_CH6,Defines CCM_AUX_IN source of TIM[i] channel 6" "0,1" bitfld.long 0x00 5. "SRC_CH5,Defines CCM_AUX_IN source of TIM[i] channel 5" "0,1" bitfld.long 0x00 4. "SRC_CH4,Defines CCM_AUX_IN source of TIM[i] channel 4" "0,1" newline bitfld.long 0x00 3. "SRC_CH3,Defines CCM_AUX_IN source of TIM[i] channel 3" "0,1" bitfld.long 0x00 2. "SRC_CH2,Defines CCM_AUX_IN source of TIM[i] channel 2" "0,1" bitfld.long 0x00 1. "SRC_CH1,Defines AUX_IN source of TIM[i] channel 1" "0,1" newline bitfld.long 0x00 0. "SRC_CH0,Defines CCM_AUX_IN source of TIM[i] channel 0" "0,1" line.long 0x04 "CCM0_EXT_CAP_EN,CCM[i] External Capture Enable Register" bitfld.long 0x04 15. "TIM_IP1_EXT_CAP_EN7,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 14. "TIM_IP1_EXT_CAP_EN6,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 13. "TIM_IP1_EXT_CAP_EN5,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 12. "TIM_IP1_EXT_CAP_EN4,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 11. "TIM_IP1_EXT_CAP_EN3,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 10. "TIM_IP1_EXT_CAP_EN2,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 9. "TIM_IP1_EXT_CAP_EN1,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 8. "TIM_IP1_EXT_CAP_EN0,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 7. "TIM_I_EXT_CAP_EN7,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 6. "TIM_I_EXT_CAP_EN6,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 5. "TIM_I_EXT_CAP_EN5,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 4. "TIM_I_EXT_CAP_EN4,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 3. "TIM_I_EXT_CAP_EN3,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 2. "TIM_I_EXT_CAP_EN2,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 1. "TIM_I_EXT_CAP_EN1,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 0. "TIM_I_EXT_CAP_EN0,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" rgroup.long ad:0x948041E8++0x07 line.long 0x00 "CCM0_TOM_OUT,CCM[i] TOM Output Register" bitfld.long 0x00 31. "TOM_OUT_N15,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 30. "TOM_OUT_N14,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 29. "TOM_OUT_N13,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 28. "TOM_OUT_N12,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 27. "TOM_OUT_N11,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 26. "TOM_OUT_N10,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 25. "TOM_OUT_N9,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 24. "TOM_OUT_N8,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 23. "TOM_OUT_N7,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 22. "TOM_OUT_N6,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 21. "TOM_OUT_N5,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 20. "TOM_OUT_N4,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 19. "TOM_OUT_N3,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 18. "TOM_OUT_N2,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 17. "TOM_OUT_N1,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 16. "TOM_OUT_N0,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 15. "TOM_OUT15,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 14. "TOM_OUT14,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 13. "TOM_OUT13,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 12. "TOM_OUT12,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 11. "TOM_OUT11,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 10. "TOM_OUT10,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 9. "TOM_OUT9,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 8. "TOM_OUT8,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 7. "TOM_OUT7,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 6. "TOM_OUT6,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 5. "TOM_OUT5,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 4. "TOM_OUT4,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 3. "TOM_OUT3,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 2. "TOM_OUT2,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 1. "TOM_OUT1,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 0. "TOM_OUT0,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" line.long 0x04 "CCM0_ATOM_OUT,CCM[i] ATOM Output Register" bitfld.long 0x04 31. "ATOM_IP1_OUT_N7,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 30. "ATOM_IP1_OUT_N6,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 29. "ATOM_IP1_OUT_N5,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" newline bitfld.long 0x04 28. "ATOM_IP1_OUT_N4,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 27. "ATOM_IP1_OUT_N3,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 26. "ATOM_IP1_OUT_N2,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" newline bitfld.long 0x04 25. "ATOM_IP1_OUT_N1,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 24. "ATOM_IP1_OUT_N0,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 23. "ATOM_IP1_OUT7,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" newline bitfld.long 0x04 22. "ATOM_IP1_OUT6,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 21. "ATOM_IP1_OUT5,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 20. "ATOM_IP1_OUT4,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" newline bitfld.long 0x04 19. "ATOM_IP1_OUT3,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 18. "ATOM_IP1_OUT2,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 17. "ATOM_IP1_OUT1,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" newline bitfld.long 0x04 16. "ATOM_IP1_OUT0,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 15. "ATOM_I_OUT_N7,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 14. "ATOM_I_OUT_N6,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x04 13. "ATOM_I_OUT_N5,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 12. "ATOM_I_OUT_N4,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 11. "ATOM_I_OUT_N3,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x04 10. "ATOM_I_OUT_N2,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 9. "ATOM_I_OUT_N1,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 8. "ATOM_I_OUT_N0,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x04 7. "ATOM_I_OUT7,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 6. "ATOM_I_OUT6,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 5. "ATOM_I_OUT5,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" newline bitfld.long 0x04 4. "ATOM_I_OUT4,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 3. "ATOM_I_OUT3,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 2. "ATOM_I_OUT2,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" newline bitfld.long 0x04 1. "ATOM_I_OUT1,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 0. "ATOM_I_OUT0,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" group.long ad:0x948041F0++0x0F line.long 0x00 "CCM0_CMU_CLK_CFG,CCM[i] CMU Clock Configuration Register" bitfld.long 0x00 28.--29. "CLK7_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 24.--25. "CLK6_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 20.--21. "CLK5_SRC,Clock [y] source signal selector" "0,1,2,3" newline bitfld.long 0x00 16.--17. "CLK4_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 12.--13. "CLK3_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 8.--9. "CLK2_SRC,Clock [y] source signal selector" "0,1,2,3" newline bitfld.long 0x00 4.--5. "CLK1_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 0.--1. "CLK0_SRC,Clock [y] source signal selector" "0,1,2,3" line.long 0x04 "CCM0_CMU_FXCLK_CFG,CCM[i] CMU Fixed Clock Configuration Register" bitfld.long 0x04 0.--3. "FXCLK0_SRC,Fixed clock 0 source signal selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CCM0_CFG,CCM[i] Configuration Register" rbitfld.long 0x08 31. "TBU_DIR2,DIR1 input signal of module TBU timebase [z]" "0,1" rbitfld.long 0x08 30. "TBU_DIR1,DIR1 input signal of module TBU timebase [z]" "0,1" rbitfld.long 0x08 16.--17. "CLS_CLK_DIV,Cluster Clock Divider" "0,1,2,3" newline bitfld.long 0x08 6. "EN_PSM,Enable PSM" "0,1" bitfld.long 0x08 5. "EN_BRC,Enable BRC" "0,1" bitfld.long 0x08 4. "EN_DPLL_MAP,Enable DPLL and MAP" "0,1" newline bitfld.long 0x08 3. "EN_MCS,Enable MCS" "0,1" bitfld.long 0x08 2. "EN_ATOM_ADTM,Enable ATOM and ADTM" "0,1" bitfld.long 0x08 1. "EN_TOM_SPE_TDTM,Enable TOM SPE and TDTM" "0,1" newline bitfld.long 0x08 0. "EN_TIM,Enable TIM" "0,1" line.long 0x0C "CCM0_PROT,CCM[i] Protection Register" bitfld.long 0x0C 0. "CLS_PROT,Cluster Protection" "0,1" group.long ad:0x94804400++0x17F line.long 0x00 "CDTM0_DTM0_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x00 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x00 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x00 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x00 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x00 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x04 "CDTM0_DTM0_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x04 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x04 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x04 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x04 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x04 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x04 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x04 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x04 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x04 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x04 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x04 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x04 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x04 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x04 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x04 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x04 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x04 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x04 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x04 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x04 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x08 "CDTM0_DTM0_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x08 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x08 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x08 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x08 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x08 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x08 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x08 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x08 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x08 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x08 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x08 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x08 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x08 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x08 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x08 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x08 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x08 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x08 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x08 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x08 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x08 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x08 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x08 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x08 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x08 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x08 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x08 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x08 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x08 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x08 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x08 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x08 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x0C "CDTM0_DTM0_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x0C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x0C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x0C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x0C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x0C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x0C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x0C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x0C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x0C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x0C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x0C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x0C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x0C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x0C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x0C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x0C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x0C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x0C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x0C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x0C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x10 "CDTM0_DTM0_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x10 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x10 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x10 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x10 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x10 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x14 "CDTM0_DTM0_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x14 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x14 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x14 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x18 "CDTM0_DTM0_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x18 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x18 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x18 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1C "CDTM0_DTM0_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x1C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x1C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x20 "CDTM0_DTM0_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x20 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x20 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x20 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x24 "CDTM0_DTM0_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x24 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x24 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x24 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x24 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x24 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x24 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x24 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x24 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x28 "CDTM0_DTM0_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x28 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x28 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x28 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x28 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x28 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x28 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x28 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x28 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x28 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x28 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x28 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x28 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x28 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x2C "CDTM0_DTM0_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x2C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x2C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x2C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x2C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x2C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x2C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x2C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x2C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x2C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x2C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x2C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x2C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x2C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x2C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x2C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x2C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x2C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x30 "CDTM0_DTM0_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x30 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x30 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x30 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x30 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x30 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x30 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x34 "CDTM0_DTM0_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x34 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x34 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x34 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x34 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x34 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x34 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x38 "CDTM0_DTM0_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x38 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x38 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x38 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x38 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x38 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x38 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x3C "CDTM0_DTM0_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x3C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x3C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x3C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x3C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x3C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x3C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x40 "CDTM0_DTM1_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x40 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x40 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x40 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x40 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x40 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x44 "CDTM0_DTM1_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x44 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x44 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x44 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x44 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x44 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x44 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x44 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x44 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x44 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x44 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x44 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x44 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x44 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x44 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x44 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x44 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x44 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x44 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x44 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x44 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0x44 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x48 "CDTM0_DTM1_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x48 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x48 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x48 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x48 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x48 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x48 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x48 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x48 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x48 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x48 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x48 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x48 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x48 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x48 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x48 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x48 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x48 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x48 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x48 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x48 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x48 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x48 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x48 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x48 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x48 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x48 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x48 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x48 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x48 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x48 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x48 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x48 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x4C "CDTM0_DTM1_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x4C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x4C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x4C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x4C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x4C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x4C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x4C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x4C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x4C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x4C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x4C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x4C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x4C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x4C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x4C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x4C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x4C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x4C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x4C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x4C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x50 "CDTM0_DTM1_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x50 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x50 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x50 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x50 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x50 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x54 "CDTM0_DTM1_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x54 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x54 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x54 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x58 "CDTM0_DTM1_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x58 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x58 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x58 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x5C "CDTM0_DTM1_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x5C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x5C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x5C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x60 "CDTM0_DTM1_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x60 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x60 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x60 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x64 "CDTM0_DTM1_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x64 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x64 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x64 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x64 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x64 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x64 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x64 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x64 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x68 "CDTM0_DTM1_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x68 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x68 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x68 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x68 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x68 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x68 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x68 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x68 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x68 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x68 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x68 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x68 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x68 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x6C "CDTM0_DTM1_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x6C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x6C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x6C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x6C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x6C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x6C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x6C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x6C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x6C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x6C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x6C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x6C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x6C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x6C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x6C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x6C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x6C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x6C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x70 "CDTM0_DTM1_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x70 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x70 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x70 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x70 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x70 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x70 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x74 "CDTM0_DTM1_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x74 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x74 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x74 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x74 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x74 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x74 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x78 "CDTM0_DTM1_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x78 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x78 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x78 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x78 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x78 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x78 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x7C "CDTM0_DTM1_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x7C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x7C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x7C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x7C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x7C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x7C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x80 "CDTM0_DTM2_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x80 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x80 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x80 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x80 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x80 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x80 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x84 "CDTM0_DTM2_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x84 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x84 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x84 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x84 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x84 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x84 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x84 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x84 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x84 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x84 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x84 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x84 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x84 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x84 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x84 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x84 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x84 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x84 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x84 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x84 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x88 "CDTM0_DTM2_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x88 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x88 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x88 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x88 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x88 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x88 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x88 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x88 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x88 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x88 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x88 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x88 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x88 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x88 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x88 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x88 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x88 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x88 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x88 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x88 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x88 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x88 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x88 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x88 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x88 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x88 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x88 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x88 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x88 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x88 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x88 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x88 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x8C "CDTM0_DTM2_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x8C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x8C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x8C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x8C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x8C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x8C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x8C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x8C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x8C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x8C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x8C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x8C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x8C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x8C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x8C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x8C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x8C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x8C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x8C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x8C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x90 "CDTM0_DTM2_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x90 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x90 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x90 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x90 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x90 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x94 "CDTM0_DTM2_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x94 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x94 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x94 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x98 "CDTM0_DTM2_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x98 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x98 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x98 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x9C "CDTM0_DTM2_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x9C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x9C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x9C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xA0 "CDTM0_DTM2_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0xA0 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0xA0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xA0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xA4 "CDTM0_DTM2_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0xA4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0xA4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0xA4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0xA4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0xA4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0xA4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0xA4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0xA4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0xA8 "CDTM0_DTM2_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0xA8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0xA8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0xA8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0xA8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0xA8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0xA8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0xA8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0xA8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0xA8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0xA8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0xA8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0xA8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0xA8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0xAC "CDTM0_DTM2_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0xAC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0xAC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0xAC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0xAC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0xAC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0xAC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0xAC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0xAC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0xAC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0xAC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0xAC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0xAC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0xAC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0xAC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0xAC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0xAC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0xAC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0xAC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0xB0 "CDTM0_DTM2_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xB4 "CDTM0_DTM2_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xB8 "CDTM0_DTM2_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xBC "CDTM0_DTM2_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xBC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xBC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xBC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xBC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xBC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xBC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xC0 "CDTM0_DTM3_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0xC0 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0xC0 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0xC0 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0xC0 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0xC0 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0xC0 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0xC4 "CDTM0_DTM3_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0xC4 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0xC4 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0xC4 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0xC4 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0xC4 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0xC4 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0xC4 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0xC4 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0xC4 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0xC4 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0xC4 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0xC4 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0xC4 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0xC4 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0xC4 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0xC4 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0xC4 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0xC4 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0xC4 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0xC4 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0xC4 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0xC8 "CDTM0_DTM3_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0xC8 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0xC8 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0xC8 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0xC8 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0xC8 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0xC8 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0xC8 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0xC8 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0xC8 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0xC8 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0xC8 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0xC8 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0xC8 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0xC8 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0xC8 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0xC8 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0xC8 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0xC8 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0xC8 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0xC8 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0xC8 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0xC8 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0xC8 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0xC8 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0xC8 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0xC8 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0xC8 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0xC8 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0xC8 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0xC8 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0xC8 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0xC8 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0xCC "CDTM0_DTM3_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0xCC 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0xCC 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0xCC 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0xCC 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0xCC 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0xCC 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0xCC 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0xCC 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0xCC 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0xCC 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0xCC 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0xCC 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0xCC 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0xCC 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0xCC 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0xCC 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0xCC 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0xCC 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0xCC 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0xCC 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0xD0 "CDTM0_DTM3_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0xD0 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0xD0 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0xD0 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0xD0 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0xD0 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0xD4 "CDTM0_DTM3_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0xD4 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0xD4 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xD4 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xD8 "CDTM0_DTM3_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0xD8 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0xD8 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xD8 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xDC "CDTM0_DTM3_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0xDC 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0xDC 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xDC 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xE0 "CDTM0_DTM3_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0xE0 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0xE0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xE0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xE4 "CDTM0_DTM3_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0xE4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0xE4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0xE4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0xE4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0xE4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0xE4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0xE4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0xE4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0xE8 "CDTM0_DTM3_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0xE8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0xE8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0xE8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0xE8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0xE8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0xE8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0xE8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0xE8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0xE8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0xE8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0xE8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0xE8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0xE8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0xEC "CDTM0_DTM3_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0xEC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0xEC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0xEC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0xEC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0xEC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0xEC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0xEC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0xEC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0xEC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0xEC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0xEC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0xEC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0xEC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0xEC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0xEC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0xEC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0xEC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0xEC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0xF0 "CDTM0_DTM3_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xF4 "CDTM0_DTM3_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xF8 "CDTM0_DTM3_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xFC "CDTM0_DTM3_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xFC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xFC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xFC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xFC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xFC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xFC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x100 "CDTM0_DTM4_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x100 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x100 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x100 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x100 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x100 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x100 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x104 "CDTM0_DTM4_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x104 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x104 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x104 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x104 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x104 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x104 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x104 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x104 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x104 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x104 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x104 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x104 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x104 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x104 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x104 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x104 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x104 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x104 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x104 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x104 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x108 "CDTM0_DTM4_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x108 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x108 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x108 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x108 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x108 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x108 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x108 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x108 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x108 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x108 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x108 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x108 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x108 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x108 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x108 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x108 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x108 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x108 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x108 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x108 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x108 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x108 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x108 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x108 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x108 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x108 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x108 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x108 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x108 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x108 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x108 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x108 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x10C "CDTM0_DTM4_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x10C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x10C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x10C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x10C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x10C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x10C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x10C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x10C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x10C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x10C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x10C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x10C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x10C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x10C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x10C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x10C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x10C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x10C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x10C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x10C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x10C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x10C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x10C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x10C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x10C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x10C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x10C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x10C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x10C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x10C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x10C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x10C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x110 "CDTM0_DTM4_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x110 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x110 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x110 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x110 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x110 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x114 "CDTM0_DTM4_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x114 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x114 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x114 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x118 "CDTM0_DTM4_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x118 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x118 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x118 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x11C "CDTM0_DTM4_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x11C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x11C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x11C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x120 "CDTM0_DTM4_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x120 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x120 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x120 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x124 "CDTM0_DTM4_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x124 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x124 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x124 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x124 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x124 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x124 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x124 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x124 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x128 "CDTM0_DTM4_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x128 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x128 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x128 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x128 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x128 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x128 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x128 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x128 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x128 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x128 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x128 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x128 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x128 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x128 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x128 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x128 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x12C "CDTM0_DTM4_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x12C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x12C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x12C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x12C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x12C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x12C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x12C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x12C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x12C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x12C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x12C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x12C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x12C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x12C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x12C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x12C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x12C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x12C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x130 "CDTM0_DTM4_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x130 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x130 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x130 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x130 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x130 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x130 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x134 "CDTM0_DTM4_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x134 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x134 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x134 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x134 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x134 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x134 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x138 "CDTM0_DTM4_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x138 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x138 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x138 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x138 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x138 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x138 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x13C "CDTM0_DTM4_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x13C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x13C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x13C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x13C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x13C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x13C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x140 "CDTM0_DTM5_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x140 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x140 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x140 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x140 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x140 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x140 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x144 "CDTM0_DTM5_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x144 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x144 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x144 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x144 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x144 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x144 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x144 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x144 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x144 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x144 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x144 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x144 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x144 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x144 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x144 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x144 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x144 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x144 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x144 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x144 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0x144 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x148 "CDTM0_DTM5_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x148 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x148 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x148 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x148 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x148 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x148 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x148 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x148 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x148 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x148 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x148 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x148 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x148 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x148 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x148 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x148 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x148 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x148 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x148 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x148 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x148 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x148 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x148 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x148 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x148 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x148 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x148 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x148 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x148 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x148 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x148 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x148 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x14C "CDTM0_DTM5_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x14C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x14C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x14C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x14C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x14C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x14C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x14C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x14C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x14C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x14C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x14C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x14C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x14C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x14C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x14C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x14C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x14C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x14C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x14C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x14C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x14C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x14C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x14C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x14C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x14C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x14C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x14C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x14C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x14C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x14C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x14C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x14C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x150 "CDTM0_DTM5_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x150 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x150 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x150 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x150 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x150 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x154 "CDTM0_DTM5_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x154 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x154 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x154 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x158 "CDTM0_DTM5_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x158 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x158 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x158 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x15C "CDTM0_DTM5_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x15C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x15C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x15C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x160 "CDTM0_DTM5_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x160 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x160 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x160 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x164 "CDTM0_DTM5_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x164 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x164 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x164 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x164 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x164 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x164 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x164 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x164 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x168 "CDTM0_DTM5_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x168 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x168 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x168 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x168 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x168 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x168 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x168 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x168 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x168 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x168 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x168 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x168 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x168 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x168 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x168 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x168 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x16C "CDTM0_DTM5_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x16C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x16C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x16C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x16C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x16C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x16C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x16C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x16C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x16C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x16C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x16C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x16C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x16C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x16C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x16C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x16C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x16C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x16C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x16C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x16C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x170 "CDTM0_DTM5_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x170 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x170 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x170 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x170 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x170 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x170 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x174 "CDTM0_DTM5_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x174 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x174 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x174 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x174 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x174 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x174 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x178 "CDTM0_DTM5_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x178 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x178 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x178 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x178 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x178 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x178 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x17C "CDTM0_DTM5_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x17C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x17C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x17C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x17C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x17C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x17C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" group.long ad:0x94804800++0x47 line.long 0x00 "F2A0_CH0_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x00 0.--8. 1. "ADDR,ARU Read address" line.long 0x04 "F2A0_CH1_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x04 0.--8. 1. "ADDR,ARU Read address" line.long 0x08 "F2A0_CH2_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x08 0.--8. 1. "ADDR,ARU Read address" line.long 0x0C "F2A0_CH3_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x0C 0.--8. 1. "ADDR,ARU Read address" line.long 0x10 "F2A0_CH4_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x10 0.--8. 1. "ADDR,ARU Read address" line.long 0x14 "F2A0_CH5_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x14 0.--8. 1. "ADDR,ARU Read address" line.long 0x18 "F2A0_CH6_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x18 0.--8. 1. "ADDR,ARU Read address" line.long 0x1C "F2A0_CH7_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x1C 0.--8. 1. "ADDR,ARU Read address" line.long 0x20 "F2A0_CH0_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x20 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x20 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x24 "F2A0_CH1_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x24 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x24 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x28 "F2A0_CH2_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x28 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x28 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x2C "F2A0_CH3_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x2C 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x2C 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x30 "F2A0_CH4_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x30 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x30 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x34 "F2A0_CH5_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x34 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x34 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x38 "F2A0_CH6_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x38 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x38 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x3C "F2A0_CH7_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x3C 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x3C 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x40 "F2A0_ENABLE,F2A[i] stream activation register" bitfld.long 0x40 14.--15. "STR7_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 12.--13. "STR6_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 10.--11. "STR5_EN,Enable/disable stream [y]" "0,1,2,3" newline bitfld.long 0x40 8.--9. "STR4_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 6.--7. "STR3_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 4.--5. "STR2_EN,Enable/disable stream [y]" "0,1,2,3" newline bitfld.long 0x40 2.--3. "STR1_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 0.--1. "STR0_EN,Enable/disable stream [y]" "0,1,2,3" line.long 0x44 "F2A0_CTRL,F2A[i] stream control register" bitfld.long 0x44 6.--7. "STR7_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" bitfld.long 0x44 4.--5. "STR6_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" bitfld.long 0x44 2.--3. "STR5_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" newline bitfld.long 0x44 0.--1. "STR4_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" group.long ad:0x94804880++0x03 line.long 0x00 "AFD0_CH0_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x94804890++0x03 line.long 0x00 "AFD0_CH1_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948048A0++0x03 line.long 0x00 "AFD0_CH2_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948048B0++0x03 line.long 0x00 "AFD0_CH3_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948048C0++0x03 line.long 0x00 "AFD0_CH4_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948048D0++0x03 line.long 0x00 "AFD0_CH5_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948048E0++0x03 line.long 0x00 "AFD0_CH6_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948048F0++0x03 line.long 0x00 "AFD0_CH7_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x94804A00++0x13 line.long 0x00 "FIFO0_CH0_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO0_CH0_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO0_CH0_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO0_CH0_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO0_CH0_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94804A14++0x0F line.long 0x00 "FIFO0_CH0_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH0_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO0_CH0_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO0_CH0_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94804A24++0x13 line.long 0x00 "FIFO0_CH0_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH0_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO0_CH0_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO0_CH0_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO0_CH0_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94804A40++0x13 line.long 0x00 "FIFO0_CH1_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO0_CH1_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO0_CH1_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO0_CH1_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO0_CH1_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94804A54++0x0F line.long 0x00 "FIFO0_CH1_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH1_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO0_CH1_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO0_CH1_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94804A64++0x13 line.long 0x00 "FIFO0_CH1_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH1_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO0_CH1_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO0_CH1_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO0_CH1_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94804A80++0x13 line.long 0x00 "FIFO0_CH2_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO0_CH2_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO0_CH2_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO0_CH2_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO0_CH2_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94804A94++0x0F line.long 0x00 "FIFO0_CH2_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH2_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO0_CH2_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO0_CH2_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94804AA4++0x13 line.long 0x00 "FIFO0_CH2_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH2_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO0_CH2_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO0_CH2_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO0_CH2_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94804AC0++0x13 line.long 0x00 "FIFO0_CH3_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO0_CH3_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO0_CH3_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO0_CH3_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO0_CH3_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94804AD4++0x0F line.long 0x00 "FIFO0_CH3_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH3_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO0_CH3_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO0_CH3_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94804AE4++0x13 line.long 0x00 "FIFO0_CH3_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH3_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO0_CH3_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO0_CH3_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO0_CH3_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94804B00++0x13 line.long 0x00 "FIFO0_CH4_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO0_CH4_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO0_CH4_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO0_CH4_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO0_CH4_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94804B14++0x0F line.long 0x00 "FIFO0_CH4_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH4_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO0_CH4_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO0_CH4_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94804B24++0x13 line.long 0x00 "FIFO0_CH4_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH4_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO0_CH4_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO0_CH4_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO0_CH4_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94804B40++0x13 line.long 0x00 "FIFO0_CH5_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO0_CH5_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO0_CH5_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO0_CH5_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO0_CH5_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94804B54++0x0F line.long 0x00 "FIFO0_CH5_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH5_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO0_CH5_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO0_CH5_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94804B64++0x13 line.long 0x00 "FIFO0_CH5_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH5_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO0_CH5_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO0_CH5_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO0_CH5_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94804B80++0x13 line.long 0x00 "FIFO0_CH6_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO0_CH6_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO0_CH6_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO0_CH6_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO0_CH6_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94804B94++0x0F line.long 0x00 "FIFO0_CH6_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH6_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO0_CH6_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO0_CH6_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94804BA4++0x13 line.long 0x00 "FIFO0_CH6_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH6_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO0_CH6_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO0_CH6_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO0_CH6_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94804BC0++0x13 line.long 0x00 "FIFO0_CH7_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO0_CH7_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO0_CH7_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO0_CH7_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO0_CH7_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94804BD4++0x0F line.long 0x00 "FIFO0_CH7_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH7_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO0_CH7_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO0_CH7_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94804BE4++0x13 line.long 0x00 "FIFO0_CH7_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO0_CH7_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO0_CH7_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO0_CH7_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO0_CH7_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94804C00++0x4F line.long 0x00 "SPE0_CTRL_STAT,SPE[i] Control Status Register" hexmask.long.byte 0x00 24.--31. 1. "FSOL,Fast Shutoff Level for TOM[i] channel 0 to 7" bitfld.long 0x00 23. "ETRIG_SEL,Extended trigger selection of signal TRIG_SEL" "0,1" rbitfld.long 0x00 20.--22. "NIP,New input pattern that was detected" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 19. "PDIR,Previous rotation direction" "0,1" bitfld.long 0x00 16.--18. "PIP,Previous input pattern that was detected by a regular input pattern change" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "ADIR,Rotation direction" "0,1" newline bitfld.long 0x00 12.--14. "AIP,Input pattern that was detected by a regular input pattern change" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. "SPE_PAT_PTR,Pattern selector for TOM output signals" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "FSOM,Fast Shutoff Mode" "0,1" newline bitfld.long 0x00 6. "TIM_SEL,Select TIM input signal" "0,1" bitfld.long 0x00 4.--5. "TRIG_SEL,Select trigger input signal" "0,1,2,3" bitfld.long 0x00 3. "SIE2,SPE Input [k] enable for TIM[i]_CH[x:x] TIM[i]_CH[y:y] TIM[i]_CH[z:z]" "0,1" newline bitfld.long 0x00 2. "SIE1,SPE Input [k] enable for TIM[i]_CH[x:x] TIM[i]_CH[y:y] TIM[i]_CH[z:z]" "0,1" bitfld.long 0x00 1. "SIE0,SPE Input [k] enable for TIM[i]_CH[x:x] TIM[i]_CH[y:y] TIM[i]_CH[z:z]" "0,1" bitfld.long 0x00 0. "EN,SPE Submodule enable" "0,1" line.long 0x04 "SPE0_PAT,SPE[i] Input Pattern Definition Register" bitfld.long 0x04 29.--31. "IP7_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 28. "IP7_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 25.--27. "IP6_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 24. "IP6_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 21.--23. "IP5_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20. "IP5_VAL,Input pattern [t] is a valid pattern" "0,1" newline bitfld.long 0x04 17.--19. "IP4_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16. "IP4_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 13.--15. "IP3_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 12. "IP3_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 9.--11. "IP2_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8. "IP2_VAL,Input pattern [t] is a valid pattern" "0,1" newline bitfld.long 0x04 5.--7. "IP1_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4. "IP1_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 1.--3. "IP0_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. "IP0_VAL,Input pattern [t] is a valid pattern" "0,1" line.long 0x08 "SPE0_OUT_PAT0,SPE[i] Output Definition Register" bitfld.long 0x08 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x08 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x08 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x0C "SPE0_OUT_PAT1,SPE[i] Output Definition Register" bitfld.long 0x0C 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x10 "SPE0_OUT_PAT2,SPE[i] Output Definition Register" bitfld.long 0x10 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x10 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x10 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x14 "SPE0_OUT_PAT3,SPE[i] Output Definition Register" bitfld.long 0x14 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x14 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x14 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x18 "SPE0_OUT_PAT4,SPE[i] Output Definition Register" bitfld.long 0x18 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x18 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x18 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x1C "SPE0_OUT_PAT5,SPE[i] Output Definition Register" bitfld.long 0x1C 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x1C 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x1C 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x20 "SPE0_OUT_PAT6,SPE[i] Output Definition Register" bitfld.long 0x20 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x20 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x20 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x24 "SPE0_OUT_PAT7,SPE[i] Output Definition Register" bitfld.long 0x24 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x24 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x24 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x28 "SPE0_OUT_CTRL,SPE[i] Output Control Register" bitfld.long 0x28 14.--15. "SPE_OUT_CTRL7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 12.--13. "SPE_OUT_CTRL6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 10.--11. "SPE_OUT_CTRL5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x28 8.--9. "SPE_OUT_CTRL4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 6.--7. "SPE_OUT_CTRL3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 4.--5. "SPE_OUT_CTRL2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x28 2.--3. "SPE_OUT_CTRL1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 0.--1. "SPE_OUT_CTRL0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x2C "SPE0_IRQ_NOTIFY,SPE[i] Interrupt Notification Register" bitfld.long 0x2C 4. "SPE_RCMP,SPE revolution counter match event" "0,1" bitfld.long 0x2C 3. "SPE_BIS,Bouncing input signal detected" "0,1" bitfld.long 0x2C 2. "SPE_PERR,Wrong or invalid pattern detected at input" "0,1" newline bitfld.long 0x2C 1. "SPE_DCHG,SPE_DIR bit changed on behalf of new input pattern" "0,1" bitfld.long 0x2C 0. "SPE_NIPD,New input pattern interrupt occurred" "0,1" line.long 0x30 "SPE0_IRQ_EN,SPE[i] Interrupt Enable Register" bitfld.long 0x30 4. "SPE_RCMP_IRQ_EN,SPE_RCMP_IRQ interrupt enable" "0,1" bitfld.long 0x30 3. "SPE_BIS_IRQ_EN,SPE_BIS_IRQ interrupt enable" "0,1" bitfld.long 0x30 2. "SPE_PERR_IRQ_EN,SPE_PERR_IRQ interrupt enable" "0,1" newline bitfld.long 0x30 1. "SPE_DCHG_IRQ_EN,SPE_DCHG_IRQ interrupt enable" "0,1" bitfld.long 0x30 0. "SPE_NIPD_IRQ_EN,SPE_NIPD_IRQ interrupt enable" "0,1" line.long 0x34 "SPE0_IRQ_FORCINT,SPE[i] Interrupt Generation By Software" bitfld.long 0x34 4. "TRG_SPE_RCMP,Trigger SPE[i]_IRQ_NOTIFY.SPE_RCMP by software" "0,1" bitfld.long 0x34 3. "TRG_SPE_BIS,Trigger SPE[i]_IRQ_NOTIFY.SPE_BIS by software" "0,1" bitfld.long 0x34 2. "TRG_SPE_PERR,Trigger SPE[i]_IRQ_NOTIFY.SPE_PERR by software" "0,1" newline bitfld.long 0x34 1. "TRG_SPE_DCHG,Trigger SPE[i]_IRQ_NOTIFY.SPE_DCHG by software" "0,1" bitfld.long 0x34 0. "TRG_SPE_NIPD,Trigger SPE[i]_IRQ_NOTIFY.SPE_NIPD by software" "0,1" line.long 0x38 "SPE0_IRQ_MODE,SPE[i] Interrupt Mode Configuration Register" bitfld.long 0x38 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x3C "SPE0_EIRQ_EN,SPE[i] Error Interrupt Enable Register" bitfld.long 0x3C 4. "SPE_RCMP_EIRQ_EN,SPE[i]_RCMP_EIRQ error interrupt enable" "0,1" bitfld.long 0x3C 3. "SPE_BIS_EIRQ_EN,SPE[i]_BIS_EIRQ error interrupt enable" "0,1" bitfld.long 0x3C 2. "SPE_PERR_EIRQ_EN,SPE_PERR_EIRQ error interrupt enable" "0,1" newline bitfld.long 0x3C 1. "SPE_DCHG_EIRQ_EN,SPE_DCHG_EIRQ error interrupt enable" "0,1" bitfld.long 0x3C 0. "SPE_NIPD_EIRQ_EN,SPE_NIPD_EIRQ interrupt enable" "0,1" line.long 0x40 "SPE0_REV_CNT,SPE[i] Input Revolution Counter" hexmask.long.tbyte 0x40 0.--23. 1. "REV_CNT,Input signal revolution counter" line.long 0x44 "SPE0_REV_CMP,SPE[i] Revolution Counter Compare Value" hexmask.long.tbyte 0x44 0.--23. 1. "REV_CMP,Input signal revolution counter compare value" line.long 0x48 "SPE0_CTRL_STAT2,SPE[i] Control Status Register 2" bitfld.long 0x48 8.--10. "SPE_PAT_PTR_BWD,Pattern selector for TOM output signals in case of SPE[i]_CMD.SPE_CTRL_CMD = 0b01 (e.g. backward direction)" "0,1,2,3,4,5,6,7" line.long 0x4C "SPE0_CMD,SPE[i] Command Register" bitfld.long 0x4C 16. "SPE_UPD_TRIG,SPE updater trigger" "0,1" bitfld.long 0x4C 0.--1. "SPE_CTRL_CMD,SPE control command" "0,1,2,3" rgroup.long ad:0x94805000++0x07 line.long 0x00 "AXIM0_FREE,AXIM[i] slot allocation status." bitfld.long 0x00 3. "FREE3,This bit represents the allocation status of the slot [t]" "0,1" bitfld.long 0x00 2. "FREE2,This bit represents the allocation status of the slot [t]" "0,1" bitfld.long 0x00 1. "FREE1,This bit represents the allocation status of the slot [t]" "0,1" newline bitfld.long 0x00 0. "FREE0,This bit represents the allocation status of the slot [t]" "0,1" line.long 0x04 "AXIM0_REQUEST,AXIM[i] slot request (allocation)." hexmask.long.byte 0x04 24.--31. 1. "REQID,This bit field shows the new allocated slot as binary encoded index" bitfld.long 0x04 3. "REQ1HOT3,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" bitfld.long 0x04 2. "REQ1HOT2,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" newline bitfld.long 0x04 1. "REQ1HOT1,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" bitfld.long 0x04 0. "REQ1HOT0,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" group.long ad:0x94805008++0x03 line.long 0x00 "AXIM0_RELEASE,AXIM[i] slot release (de-allocation)." bitfld.long 0x00 3. "RELREQ3,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" bitfld.long 0x00 2. "RELREQ2,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" bitfld.long 0x00 1. "RELREQ1,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" newline bitfld.long 0x00 0. "RELREQ0,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" group.long ad:0x94805020++0x03 line.long 0x00 "AXIM0_SLOT0_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94805028++0x03 line.long 0x00 "AXIM0_SLOT0_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94805030++0x07 line.long 0x00 "AXIM0_SLOT0_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM0_SLOT0_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94805038++0x03 line.long 0x00 "AXIM0_SLOT0_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94805040++0x03 line.long 0x00 "AXIM0_SLOT1_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94805048++0x03 line.long 0x00 "AXIM0_SLOT1_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94805050++0x07 line.long 0x00 "AXIM0_SLOT1_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM0_SLOT1_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94805058++0x03 line.long 0x00 "AXIM0_SLOT1_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94805060++0x03 line.long 0x00 "AXIM0_SLOT2_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94805068++0x03 line.long 0x00 "AXIM0_SLOT2_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94805070++0x07 line.long 0x00 "AXIM0_SLOT2_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM0_SLOT2_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94805078++0x03 line.long 0x00 "AXIM0_SLOT2_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94805080++0x03 line.long 0x00 "AXIM0_SLOT3_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94805088++0x03 line.long 0x00 "AXIM0_SLOT3_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94805090++0x07 line.long 0x00 "AXIM0_SLOT3_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM0_SLOT3_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94805098++0x03 line.long 0x00 "AXIM0_SLOT3_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94806000++0x03 "FIFO0_MEMORY - array[1024]" line.long 0x00 "FIFO0_MEMORY[0],FIFO data memory" button "DATA" "d ad:0x094806000++0x000000FFF /long" group.long ad:0x94808000++0x1F line.long 0x00 "DPLL_CTRL_0,Control Register 0" bitfld.long 0x00 31. "RMO,Reference mode" "0,1" bitfld.long 0x00 30. "TEN,TRIGGER enable" "0,1" bitfld.long 0x00 29. "SEN,STATE enable" "0,1" newline bitfld.long 0x00 28. "IDT,Input delay TRIGGER" "0,1" bitfld.long 0x00 27. "IDS,Input delay STATE" "0,1" bitfld.long 0x00 26. "AMT,Adapt mode TRIGGER" "0,1" newline bitfld.long 0x00 25. "AMS,Adapt mode STATE" "0,1" hexmask.long.word 0x00 16.--24. 1. "TNU,TRIGGER number" bitfld.long 0x00 11.--15. "SNU,STATE number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x00 10. "IFP,Input filter position" "0,1" hexmask.long.word 0x00 0.--9. 1. "MLT,Multiplier for TRIGGER" line.long 0x04 "DPLL_CTRL_1,Control Register 1" bitfld.long 0x04 30.--31. "TSL,Trigger slope select" "0,1,2,3" bitfld.long 0x04 28.--29. "SSL,State slope select" "0,1,2,3" bitfld.long 0x04 27. "SMC,Synchronous Motor Control" "0,1" newline bitfld.long 0x04 26. "TS0_HRT,Time stamp high resolution TRIGGER" "0,1" bitfld.long 0x04 25. "TS0_HRS,Time stamp high resolution STATE" "0,1" bitfld.long 0x04 24. "SYSF,DPLL_CTRL_EXT.SYN_NS for FULL_SCALE" "0,1" newline bitfld.long 0x04 23. "SWR,Software reset" "0,1" bitfld.long 0x04 22. "LCD,Locking condition definition" "0,1" hexmask.long.byte 0x04 16.--21. 1. "SYN_NT,Synchronization number of DPLL TRIGGER events" newline bitfld.long 0x04 11.--15. "SYN_NS,Synchronization number of DPLL STATE events" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 10. "PCM2,Pulse Correction Mode for SUB_INC2 generation" "0,1" bitfld.long 0x04 9. "DLM2,Direct Load Mode for SUB_INC2 generation" "0,1" newline bitfld.long 0x04 8. "SGE2,SUB_INC2 generator enable" "0,1" bitfld.long 0x04 7. "PCM1,Pulse Correction Mode for SUB_INC1 generation" "0,1" bitfld.long 0x04 6. "DLM1,Direct Load Mode for SUB_INC1 generation" "0,1" newline bitfld.long 0x04 5. "SGE1,SUB_INC1 generator enable" "0,1" bitfld.long 0x04 4. "PIT,Plausibility value DPLL_PVT.PVT to next active TRIGGER is time related" "0,1" bitfld.long 0x04 3. "COA,Correction strategy in automatic end mode (DPLL_CTRL_1.DMO=0)" "0,1" newline bitfld.long 0x04 2. "IDDS,Input direction detection strategy in the case of DPLL_CTRL_1.SMC=0" "0,1" bitfld.long 0x04 1. "DEN,DPLL enable" "0,1" bitfld.long 0x04 0. "DMO,DPLL mode select" "0,1" line.long 0x08 "DPLL_CTRL_2,Action Enable Register" bitfld.long 0x08 23. "WAD7,Write control bit of Action [m]" "0,1" bitfld.long 0x08 22. "WAD6,Write control bit of Action [m]" "0,1" bitfld.long 0x08 21. "WAD5,Write control bit of Action [m]" "0,1" newline bitfld.long 0x08 20. "WAD4,Write control bit of Action [m]" "0,1" bitfld.long 0x08 19. "WAD3,Write control bit of Action [m]" "0,1" bitfld.long 0x08 18. "WAD2,Write control bit of Action [m]" "0,1" newline bitfld.long 0x08 17. "WAD1,Write control bit of Action [m]" "0,1" bitfld.long 0x08 16. "WAD0,Write control bit of Action [m]" "0,1" bitfld.long 0x08 15. "AEN7,Action [n] enable" "0,1" newline bitfld.long 0x08 14. "AEN6,Action [n] enable" "0,1" bitfld.long 0x08 13. "AEN5,Action [n] enable" "0,1" bitfld.long 0x08 12. "AEN4,Action [n] enable" "0,1" newline bitfld.long 0x08 11. "AEN3,Action [n] enable" "0,1" bitfld.long 0x08 10. "AEN2,Action [n] enable" "0,1" bitfld.long 0x08 9. "AEN1,Action [n] enable" "0,1" newline bitfld.long 0x08 8. "AEN0,Action [n] enable" "0,1" line.long 0x0C "DPLL_CTRL_3,Action Enable Register" bitfld.long 0x0C 23. "WAD15,Write control bit of Action [m]" "0,1" bitfld.long 0x0C 22. "WAD14,Write control bit of Action [m]" "0,1" bitfld.long 0x0C 21. "WAD13,Write control bit of Action [m]" "0,1" newline bitfld.long 0x0C 20. "WAD12,Write control bit of Action [m]" "0,1" bitfld.long 0x0C 19. "WAD11,Write control bit of Action [m]" "0,1" bitfld.long 0x0C 18. "WAD10,Write control bit of Action [m]" "0,1" newline bitfld.long 0x0C 17. "WAD9,Write control bit of Action [m]" "0,1" bitfld.long 0x0C 16. "WAD8,Write control bit of Action [m]" "0,1" bitfld.long 0x0C 15. "AEN15,Action [n] enable" "0,1" newline bitfld.long 0x0C 14. "AEN14,Action [n] enable" "0,1" bitfld.long 0x0C 13. "AEN13,Action [n] enable" "0,1" bitfld.long 0x0C 12. "AEN12,Action [n] enable" "0,1" newline bitfld.long 0x0C 11. "AEN11,Action [n] enable" "0,1" bitfld.long 0x0C 10. "AEN10,Action [n] enable" "0,1" bitfld.long 0x0C 9. "AEN9,Action [n] enable" "0,1" newline bitfld.long 0x0C 8. "AEN8,Action [n] enable" "0,1" line.long 0x10 "DPLL_CTRL_4,Action Enable Register" bitfld.long 0x10 23. "WAD23,Write control bit of Action [m]" "0,1" bitfld.long 0x10 22. "WAD22,Write control bit of Action [m]" "0,1" bitfld.long 0x10 21. "WAD21,Write control bit of Action [m]" "0,1" newline bitfld.long 0x10 20. "WAD20,Write control bit of Action [m]" "0,1" bitfld.long 0x10 19. "WAD19,Write control bit of Action [m]" "0,1" bitfld.long 0x10 18. "WAD18,Write control bit of Action [m]" "0,1" newline bitfld.long 0x10 17. "WAD17,Write control bit of Action [m]" "0,1" bitfld.long 0x10 16. "WAD16,Write control bit of Action [m]" "0,1" bitfld.long 0x10 15. "AEN23,Action [n] enable" "0,1" newline bitfld.long 0x10 14. "AEN22,Action [n] enable" "0,1" bitfld.long 0x10 13. "AEN21,Action [n] enable" "0,1" bitfld.long 0x10 12. "AEN20,Action [n] enable" "0,1" newline bitfld.long 0x10 11. "AEN19,Action [n] enable" "0,1" bitfld.long 0x10 10. "AEN18,Action [n] enable" "0,1" bitfld.long 0x10 9. "AEN17,Action [n] enable" "0,1" newline bitfld.long 0x10 8. "AEN16,Action [n] enable" "0,1" line.long 0x14 "DPLL_CTRL_5,Action Enable Register" bitfld.long 0x14 23. "WAD31,Write control bit of Action [m]" "0,1" bitfld.long 0x14 22. "WAD30,Write control bit of Action [m]" "0,1" bitfld.long 0x14 21. "WAD29,Write control bit of Action [m]" "0,1" newline bitfld.long 0x14 20. "WAD28,Write control bit of Action [m]" "0,1" bitfld.long 0x14 19. "WAD27,Write control bit of Action [m]" "0,1" bitfld.long 0x14 18. "WAD26,Write control bit of Action [m]" "0,1" newline bitfld.long 0x14 17. "WAD25,Write control bit of Action [m]" "0,1" bitfld.long 0x14 16. "WAD24,Write control bit of Action [m]" "0,1" bitfld.long 0x14 15. "AEN31,Action [n] enable" "0,1" newline bitfld.long 0x14 14. "AEN30,Action [n] enable" "0,1" bitfld.long 0x14 13. "AEN29,Action [n] enable" "0,1" bitfld.long 0x14 12. "AEN28,Action [n] enable" "0,1" newline bitfld.long 0x14 11. "AEN27,Action [n] enable" "0,1" bitfld.long 0x14 10. "AEN26,Action [n] enable" "0,1" bitfld.long 0x14 9. "AEN25,Action [n] enable" "0,1" newline bitfld.long 0x14 8. "AEN24,Action [n] enable" "0,1" line.long 0x18 "DPLL_ACT_STA,Action Status Register including Shadow Register" bitfld.long 0x18 31. "ACT_N31,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 30. "ACT_N30,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 29. "ACT_N29,New output data values concerning to Action n provided" "0,1" newline bitfld.long 0x18 28. "ACT_N28,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 27. "ACT_N27,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 26. "ACT_N26,New output data values concerning to Action n provided" "0,1" newline bitfld.long 0x18 25. "ACT_N25,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 24. "ACT_N24,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 23. "ACT_N23,New output data values concerning to Action n provided" "0,1" newline bitfld.long 0x18 22. "ACT_N22,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 21. "ACT_N21,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 20. "ACT_N20,New output data values concerning to Action n provided" "0,1" newline bitfld.long 0x18 19. "ACT_N19,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 18. "ACT_N18,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 17. "ACT_N17,New output data values concerning to Action n provided" "0,1" newline bitfld.long 0x18 16. "ACT_N16,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 15. "ACT_N15,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 14. "ACT_N14,New output data values concerning to Action n provided" "0,1" newline bitfld.long 0x18 13. "ACT_N13,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 12. "ACT_N12,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 11. "ACT_N11,New output data values concerning to Action n provided" "0,1" newline bitfld.long 0x18 10. "ACT_N10,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 9. "ACT_N9,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 8. "ACT_N8,New output data values concerning to Action n provided" "0,1" newline bitfld.long 0x18 7. "ACT_N7,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 6. "ACT_N6,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 5. "ACT_N5,New output data values concerning to Action n provided" "0,1" newline bitfld.long 0x18 4. "ACT_N4,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 3. "ACT_N3,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 2. "ACT_N2,New output data values concerning to Action n provided" "0,1" newline bitfld.long 0x18 1. "ACT_N1,New output data values concerning to Action n provided" "0,1" bitfld.long 0x18 0. "ACT_N0,New output data values concerning to Action n provided" "0,1" line.long 0x1C "DPLL_OSW,Offset and Switch old/new Address Register" bitfld.long 0x1C 8.--9. "OSS,Offset size of RAM region 2" "0,1,2,3" rbitfld.long 0x1C 1. "SWON_T,Switch of new TRIGGER" "0,1" rbitfld.long 0x1C 0. "SWON_S,Switch of new DPLL STATE" "0,1" rgroup.long ad:0x94808020++0x03 line.long 0x00 "DPLL_AOSV_2,Address Offset Register of RAM 2 Regions" hexmask.long.byte 0x00 24.--31. 1. "AOSV_2D,Address offset value of the RAM 2D region" hexmask.long.byte 0x00 16.--23. 1. "AOSV_2C,Address offset value of the RAM 2C region" hexmask.long.byte 0x00 8.--15. 1. "AOSV_2B,Address offset value of the RAM 2B region" newline hexmask.long.byte 0x00 0.--7. 1. "AOSV_2A,Address offset value of the RAM 2A region" group.long ad:0x94808024++0x2F line.long 0x00 "DPLL_APT,Actual RAM Pointer Address for TRIGGER" hexmask.long.word 0x00 14.--23. 1. "APT_2B,Address pointer TRIGGER for RAM region 2b" bitfld.long 0x00 13. "WAPT_2B,Write bit for address pointer DPLL_APT.APT_2B read as zero" "0,1" hexmask.long.word 0x00 2.--11. 1. "APT,Address pointer DPLL TRIGGER" newline bitfld.long 0x00 1. "WAPT,Write bit for address pointer DPLL_APT.APT read as zero" "0,1" line.long 0x04 "DPLL_APS,Actual RAM Pointer Address for STATE" hexmask.long.byte 0x04 14.--19. 1. "APS_1C2,Actual RAM pointer address value for DPLL_TSF_S[p]" bitfld.long 0x04 13. "WAPS_1C2,Write bit for address pointer DPLL_APS.APS_1C2 read as zero" "0,1" hexmask.long.byte 0x04 2.--7. 1. "APS,Address pointer STATE: Actual RAM pointer address value for DPLL_DT_S[p] and DPLL_RDT_S[p]" newline bitfld.long 0x04 1. "WAPS,Write bit for address pointer DPLL_APS.APS read as zero" "0,1" line.long 0x08 "DPLL_APT_2C,Actual RAM Pointer Address for Region 2c" hexmask.long.word 0x08 2.--11. 1. "APT_2C,Address pointer TRIGGER for RAM region 2c: Actual RAM pointer address value for DPLL_ADT_T[p]" line.long 0x0C "DPLL_APS_1C3,Actual RAM Pointer Address for RAM region 1c3" hexmask.long.byte 0x0C 2.--7. 1. "APS_1C3,Address pointer STATE for RAM region 1c3: Actual RAM pointer address value for DPLL_ADT_S[p]" line.long 0x10 "DPLL_NUTC,Number of Recent TRIGGER Events used for Calculations" bitfld.long 0x10 31. "WVTN,Write control bit for DPLL_NUTC.VTN" "0,1" bitfld.long 0x10 30. "WSYN,Write control bit for DPLL_NUTC.SYN_T and DPLL_NUTC.SYN_T_OLD" "0,1" bitfld.long 0x10 29. "WNUT,Write control bit for DPLL_NUTC.NUTE and DPLL_NUTC.FST" "0,1" newline hexmask.long.byte 0x10 19.--24. 1. "VTN,Virtual DPLL TRIGGER number" bitfld.long 0x10 16.--18. "SYN_T_OLD,Number of real and virtual events to be considered for the last increment" "0,1,2,3,4,5,6,7" bitfld.long 0x10 13.--15. "SYN_T,Number of real and virtual events to be considered for the current increment" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 10. "FST,FULL_SCALE of TRIGGER" "0,1" hexmask.long.word 0x10 0.--9. 1. "NUTE,Number of recent TRIGGER events used for SUB_INC1 and Action calculations modulo 2*(TNU_max+1)" line.long 0x14 "DPLL_NUSC,Number of Recent STATE Events used for Calculations" bitfld.long 0x14 31. "WVSN,Write control bit for DPLL_NUSC.VSN read as zero" "0,1" bitfld.long 0x14 30. "WSYN,Write control bit for DPLL_NUSC.SYN_S and DPLL_NUSC.SYN_S_OLD read as zero" "0,1" bitfld.long 0x14 29. "WNUS,Write control bit for DPLL_NUSC.NUSE read as zero" "0,1" newline hexmask.long.byte 0x14 19.--24. 1. "VSN,Virtual STATE number" hexmask.long.byte 0x14 13.--18. 1. "SYN_S_OLD,Number of real and virtual events to be considered for the last increment" hexmask.long.byte 0x14 7.--12. 1. "SYN_S,Number of real and virtual events to be considered for the current increment" newline bitfld.long 0x14 6. "FSS,Full scale of STATE" "0,1" hexmask.long.byte 0x14 0.--5. 1. "NUSE,Number of recent STATE events used for SUB_INC1 and SUB_INC2 calculations modulo 2*(DPLL_CTRL_0.SNU+1)" line.long 0x18 "DPLL_NTI_CNT,Number of Active TRIGGER Events to Interrupt" hexmask.long.word 0x18 0.--9. 1. "NTI_CNT,Number of triggers to interrupt" line.long 0x1C "DPLL_IRQ_NOTIFY,Interrupt Register" bitfld.long 0x1C 27. "DCGI,Direction change interrupt" "0,1" bitfld.long 0x1C 26. "SORI,STATE out of range" "0,1" bitfld.long 0x1C 25. "TORI,TRIGGER out of range interrupt" "0,1" newline bitfld.long 0x1C 24. "CDSI,Calculation of STATE duration done" "0,1" bitfld.long 0x1C 23. "CDTI,TRIGGER duration is calculated only when DPLL_NTI_CNT.NTI_CNT is zero" "0,1" bitfld.long 0x1C 22. "TE4I,TRIGGER event interrupt 4" "0,1" newline bitfld.long 0x1C 21. "TE3I,TRIGGER event interrupt 3" "0,1" bitfld.long 0x1C 20. "TE2I,TRIGGER event interrupt 2" "0,1" bitfld.long 0x1C 19. "TE1I,TRIGGER event interrupt 1" "0,1" newline bitfld.long 0x1C 18. "TE0I,TRIGGER event interrupt 0" "0,1" bitfld.long 0x1C 17. "LL2I,Loss of lock interrupt for SUB_INC2" "0,1" bitfld.long 0x1C 16. "GL2I,Get lock interrupt for SUB_INC2" "0,1" newline bitfld.long 0x1C 15. "EI,Error interrupt (see status register bit 31)" "0,1" bitfld.long 0x1C 14. "LL1I,Loss of lock interrupt for SUB_INC1" "0,1" bitfld.long 0x1C 13. "GL1I,Get lock interrupt for SUB_INC1" "0,1" newline bitfld.long 0x1C 12. "W1I,Write access to RAM region 1b or 1c interrupt" "0,1" bitfld.long 0x1C 11. "W2I,RAM write access to RAM region 2 interrupt" "0,1" bitfld.long 0x1C 10. "PWI,Plausibility window (PVT) violation interrupt of TRIGGER" "0,1" newline bitfld.long 0x1C 9. "TASI,TRIGGER active slope interrupt" "0,1" bitfld.long 0x1C 8. "SASI,STATE active slope interrupt" "0,1" bitfld.long 0x1C 7. "MTI,Missing TRIGGER interrupt" "0,1" newline bitfld.long 0x1C 6. "MSI,Missing STATE interrupt" "0,1" bitfld.long 0x1C 5. "TISI,TRIGGER inactive slope interrupt" "0,1" bitfld.long 0x1C 4. "SISI,STATE inactive slope interrupt" "0,1" newline bitfld.long 0x1C 3. "TAXI,TRIGGER maximum hold time violation interrupt (dt > DPLL_THMA.THMA > 0)" "0,1" bitfld.long 0x1C 2. "TINI,TRIGGER minimum hold time violation interrupt (dt <= DPLL_THMI.THMI > 0)" "0,1" bitfld.long 0x1C 1. "PEI,DPLL enable interrupt" "0,1" newline bitfld.long 0x1C 0. "PDI,DPLL disable interrupt" "0,1" line.long 0x20 "DPLL_IRQ_EN,Interrupt Enable Register" bitfld.long 0x20 27. "DCGI_IRQ_EN,Direction change interrupt" "0,1" bitfld.long 0x20 26. "SORI_IRQ_EN,STATE out of range" "0,1" bitfld.long 0x20 25. "TORI_IRQ_EN,TRIGGER out of range interrupt" "0,1" newline bitfld.long 0x20 24. "CDSI_IRQ_EN,Enable interrupt when calculation of TRIGGER duration done" "0,1" bitfld.long 0x20 23. "CDTI_IRQ_EN,Enable interrupt when calculation of TRIGGER duration done" "0,1" bitfld.long 0x20 22. "TE4I_IRQ_EN,TRIGGER event interrupt 4 enable" "0,1" newline bitfld.long 0x20 21. "TE3I_IRQ_EN,TRIGGER event interrupt 3 enable" "0,1" bitfld.long 0x20 20. "TE2I_IRQ_EN,TRIGGER event interrupt 2 enable" "0,1" bitfld.long 0x20 19. "TE1I_IRQ_EN,TRIGGER event interrupt 1 enable" "0,1" newline bitfld.long 0x20 18. "TE0I_IRQ_EN,TRIGGER event interrupt 0 enable" "0,1" bitfld.long 0x20 17. "LL2I_IRQ_EN,Loss of lock interrupt enable for SUB_INC2" "0,1" bitfld.long 0x20 16. "GL2I_IRQ_EN,Get lock interrupt enable for SUB_INC2" "0,1" newline bitfld.long 0x20 15. "EI_IRQ_EN,Error interrupt enable (see status register)" "0,1" bitfld.long 0x20 14. "LL1I_IRQ_EN,Loss of lock interrupt enable" "0,1" bitfld.long 0x20 13. "GL1I_IRQ_EN,Get lock interrupt enable when lock arises" "0,1" newline bitfld.long 0x20 12. "W1I_IRQ_EN,Write access to RAM region 1b or 1c interrupt" "0,1" bitfld.long 0x20 11. "W2I_IRQ_EN,RAM write access to RAM region 2 interrupt enable" "0,1" bitfld.long 0x20 10. "PWI_IRQ_EN,Plausibility window (PVT) violation interrupt of TRIGGER enable" "0,1" newline bitfld.long 0x20 9. "TASI_IRQ_EN,TRIGGER active slope interrupt enable" "0,1" bitfld.long 0x20 8. "SASI_IRQ_EN,STATE active slope interrupt enable" "0,1" bitfld.long 0x20 7. "MTI_IRQ_EN,Missing TRIGGER interrupt enable" "0,1" newline bitfld.long 0x20 6. "MSI_IRQ_EN,Missing STATE interrupt enable" "0,1" bitfld.long 0x20 5. "TISI_IRQ_EN,TRIGGER inactive slope interrupt enable bit" "0,1" bitfld.long 0x20 4. "SISI_IRQ_EN,STATE inactive slope interrupt enable bit" "0,1" newline bitfld.long 0x20 3. "TAXI_IRQ_EN,TRIGGER maximum hold time violation interrupt enable bit" "0,1" bitfld.long 0x20 2. "TINI_IRQ_EN,TRIGGER minimum hold time violation interrupt enable bit" "0,1" bitfld.long 0x20 1. "PEI_IRQ_EN,DPLL enable interrupt enable when switch on of the DPLL_CTRL_1.DEN bit" "0,1" newline bitfld.long 0x20 0. "PDI_IRQ_EN,DPLL disable interrupt enable when switch off of the DPLL_CTRL_1.DEN bit" "0,1" line.long 0x24 "DPLL_IRQ_FORCINT,Force Interrupt Register" bitfld.long 0x24 27. "TRG_DCGI,Trigger the bit DPLL_IRQ_NOTIFY.DCGI by software" "0,1" bitfld.long 0x24 26. "TRG_SORI,Trigger the bit DPLL_IRQ_NOTIFY.SORI by software" "0,1" bitfld.long 0x24 25. "TRG_TORI,Trigger the bit DPLL_IRQ_NOTIFY.TORI by software" "0,1" newline bitfld.long 0x24 24. "TRG_CDSI,Trigger the bit DPLL_IRQ_NOTIFY.CDSI by software" "0,1" bitfld.long 0x24 23. "TRG_CDTI,Trigger the bit DPLL_IRQ_NOTIFY.CDTI by software" "0,1" bitfld.long 0x24 22. "TRG_TE4I,Trigger the bit DPLL_IRQ_NOTIFY.TE4I by software" "0,1" newline bitfld.long 0x24 21. "TRG_TE3I,Trigger the bit DPLL_IRQ_NOTIFY.TE3I by software" "0,1" bitfld.long 0x24 20. "TRG_TE2I,Trigger the bit DPLL_IRQ_NOTIFY.TE2I by software" "0,1" bitfld.long 0x24 19. "TRG_TE1I,Trigger the bit DPLL_IRQ_NOTIFY.TE1I by software" "0,1" newline bitfld.long 0x24 18. "TRG_TE0I,Trigger the bit DPLL_IRQ_NOTIFY.TE0I by software" "0,1" bitfld.long 0x24 17. "TRG_LL2I,Trigger the bit DPLL_IRQ_NOTIFY.LL2I by software" "0,1" bitfld.long 0x24 16. "TRG_GL2I,Trigger the bit DPLL_IRQ_NOTIFY.GL2I by software" "0,1" newline bitfld.long 0x24 15. "TRG_EI,Trigger the bit DPLL_IRQ_NOTIFY.EI by software" "0,1" bitfld.long 0x24 14. "TRG_LL1I,Trigger the bit DPLL_IRQ_NOTIFY.LL1I by software" "0,1" bitfld.long 0x24 13. "TRG_GL1I,Trigger the bit DPLL_IRQ_NOTIFY.GL1I by software" "0,1" newline bitfld.long 0x24 12. "TRG_W1I,Trigger the bit DPLL_IRQ_NOTIFY.W1I by software" "0,1" bitfld.long 0x24 11. "TRG_W2I,Trigger the bit DPLL_IRQ_NOTIFY.W2I by software" "0,1" bitfld.long 0x24 10. "TRG_PWI,Trigger the bit DPLL_IRQ_NOTIFY.PWI by software" "0,1" newline bitfld.long 0x24 9. "TRG_TASI,Trigger the bit DPLL_IRQ_NOTIFY.TASI by software" "0,1" bitfld.long 0x24 8. "TRG_SASI,Trigger the bit DPLL_IRQ_NOTIFY.SASI by software" "0,1" bitfld.long 0x24 7. "TRG_MTI,Trigger the bit DPLL_IRQ_NOTIFY.MTI by software" "0,1" newline bitfld.long 0x24 6. "TRG_MSI,Trigger the bit DPLL_IRQ_NOTIFY.MSI by software" "0,1" bitfld.long 0x24 5. "TRG_TISI,Trigger the bit DPLL_IRQ_NOTIFY.TISI by software" "0,1" bitfld.long 0x24 4. "TRG_SISI,Trigger the bit DPLL_IRQ_NOTIFY.SISI by software" "0,1" newline bitfld.long 0x24 3. "TRG_TAXI,Trigger the bit DPLL_IRQ_NOTIFY.TAXI by software" "0,1" bitfld.long 0x24 2. "TRG_TINI,Trigger the bit DPLL_IRQ_NOTIFY.TINI by software" "0,1" bitfld.long 0x24 1. "TRG_PEI,Trigger the bit DPLL_IRQ_NOTIFY.PEI by software" "0,1" newline bitfld.long 0x24 0. "TRG_PDI,Trigger the bit DPLL_IRQ_NOTIFY.PDI by software" "0,1" line.long 0x28 "DPLL_IRQ_MODE,Interrupt Request Mode" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "DPLL_EIRQ_EN,Error Interrupt Enable Register" bitfld.long 0x2C 27. "DCGI_EIRQ_EN,Direction change interrupt" "0,1" bitfld.long 0x2C 26. "SORI_EIRQ_EN,STATE out of range" "0,1" bitfld.long 0x2C 25. "TORI_EIRQ_EN,TRIGGER out of range interrupt" "0,1" newline bitfld.long 0x2C 24. "CDSI_EIRQ_EN,Enable interrupt when calculation of TRIGGER duration done" "0,1" bitfld.long 0x2C 23. "CDTI_EIRQ_EN,Enable interrupt when calculation of TRIGGER duration done" "0,1" bitfld.long 0x2C 22. "TE4I_EIRQ_EN,TRIGGER event interrupt 4 enable" "0,1" newline bitfld.long 0x2C 21. "TE3I_EIRQ_EN,TRIGGER event interrupt 3 enable" "0,1" bitfld.long 0x2C 20. "TE2I_EIRQ_EN,TRIGGER event interrupt 2 enable" "0,1" bitfld.long 0x2C 19. "TE1I_EIRQ_EN,TRIGGER event interrupt 1 enable" "0,1" newline bitfld.long 0x2C 18. "TE0I_EIRQ_EN,TRIGGER event interrupt 0 enable" "0,1" bitfld.long 0x2C 17. "LL2I_EIRQ_EN,Loss of lock interrupt enable for SUB_INC2" "0,1" bitfld.long 0x2C 16. "GL2I_EIRQ_EN,Get lock interrupt enable for SUB_INC2" "0,1" newline bitfld.long 0x2C 15. "EI_EIRQ_EN,Error interrupt enable (see status register)" "0,1" bitfld.long 0x2C 14. "LL1I_EIRQ_EN,Loss of lock interrupt enable" "0,1" bitfld.long 0x2C 13. "GL1I_EIRQ_EN,Get lock interrupt enable when lock is available" "0,1" newline bitfld.long 0x2C 12. "W1I_EIRQ_EN,Write access to RAM region 1b or 1c interrupt" "0,1" bitfld.long 0x2C 11. "W2I_EIRQ_EN,RAM write access to RAM region 2 interrupt enable" "0,1" bitfld.long 0x2C 10. "PWI_EIRQ_EN,Plausibility window (PVT) violation interrupt of TRIGGER enable" "0,1" newline bitfld.long 0x2C 9. "TASI_EIRQ_EN,TRIGGER active slope interrupt enable" "0,1" bitfld.long 0x2C 8. "SASI_EIRQ_EN,STATE active slope interrupt enable" "0,1" bitfld.long 0x2C 7. "MTI_EIRQ_EN,Missing TRIGGER interrupt enable" "0,1" newline bitfld.long 0x2C 6. "MSI_EIRQ_EN,Missing STATE interrupt enable" "0,1" bitfld.long 0x2C 5. "TISI_EIRQ_EN,TRIGGER inactive slope interrupt enable bit" "0,1" bitfld.long 0x2C 4. "SISI_EIRQ_EN,STATE inactive slope interrupt enable bit" "0,1" newline bitfld.long 0x2C 3. "TAXI_EIRQ_EN,TRIGGER maximum hold time violation interrupt enable bit" "0,1" bitfld.long 0x2C 2. "TINI_EIRQ_EN,TRIGGER minimum hold time violation interrupt enable bit" "0,1" bitfld.long 0x2C 1. "PEI_EIRQ_EN,Enabling of DPLL interrupt enable while switching on the DPLL_CTRL_1.DEN bit" "0,1" newline bitfld.long 0x2C 0. "PDI_EIRQ_EN,DPLL disable interrupt enable when switch off of the DPLL_CTRL_1.DEN bit" "0,1" group.long ad:0x948080B0++0x1F line.long 0x00 "DPLL_INC_CNT1,Counter Value of Sent SUB_INC1 Pulses" hexmask.long.tbyte 0x00 0.--23. 1. "INC_CNT1,Actual number of pulses yet to be sent out at the current increment until the next active input signal in automatic end mode" line.long 0x04 "DPLL_INC_CNT2,Counter Value of sent SUB_INC2 values (for DPLL_CTRL_1.SMC=1 and DPLL_CTRL_0.RMO=1)" hexmask.long.tbyte 0x04 0.--23. 1. "INC_CNT2,Actual number of pulses yet to be sent out at the current increment until the next active input signal in automatic end mode" line.long 0x08 "DPLL_APT_SYNC,TRIGGER Time Stamp Field Offset at Synchronization Time" hexmask.long.word 0x08 14.--23. 1. "APT_2B_OLD,Address pointer TRIGGER for RAM region 2b at synchronization time this value is set by the current DPLL_APT.APT_2B value when the synchronization takes place for the first active TRIGGER event after writing DPLL_APT_2C.APT_2C but before.." bitfld.long 0x08 6. "APT_2B_STATUS,Address pointer 2b status set by the CPU before the synchronization is performed" "0,1" hexmask.long.byte 0x08 0.--5. 1. "APT_2B_EXT,Address pointer 2b extension this offset value determines by which value the DPLL_APT.APT_2B is changed at the synchronization time set by CPU before the synchronization is performed" line.long 0x0C "DPLL_APS_SYNC,STATE Time Stamp Field Offset at Synchronization Time" hexmask.long.byte 0x0C 14.--19. 1. "APS_1C2_OLD,Address pointer STATE for RAM region 1c2 at synchronization time this value is set by the current DPLL_APS_EXT.APS_1C2 value when the synchronization takes place for the first active STATE event after writing DPLL_APS_1C3_EXT.APS_1C3 but.." bitfld.long 0x0C 6. "APS_1C2_STATUS,Address pointer 1c2 status set by CPU before the synchronization is performed" "0,1" hexmask.long.byte 0x0C 0.--5. 1. "APS_1C2_EXT,Address pointer 1c2 extension this offset value determines by which value the DPLL_APS_EXT.APS_1C2 is changed at the time of synchronization set by CPU before the synchronization is performed" line.long 0x10 "DPLL_TBU_TS0_T,Time Stamp Value for the last active TRIGGER" hexmask.long.tbyte 0x10 0.--23. 1. "DPLL_TBU_TS0_T,Value of CCM[0]_TBU_TS0 at the last TRIGGER event" line.long 0x14 "DPLL_TBU_TS0_S,Time Stamp Value for the last active STATE" hexmask.long.tbyte 0x14 0.--23. 1. "DPLL_TBU_TS0_S,Value of CCM[0]_TBU_TS0 at the last STATE event" line.long 0x18 "DPLL_ADD_IN_LD1,ADD_IN Value in Direct Load Mode for TRIGGER" hexmask.long.tbyte 0x18 0.--23. 1. "ADD_IN_LD1,Input value for SUB_INC1 generation given by CPU" line.long 0x1C "DPLL_ADD_IN_LD2,ADD_IN Value in Direct Load Mode for STATE" hexmask.long.tbyte 0x1C 0.--23. 1. "ADD_IN_LD2,ADD_IN_LD2: Input value for SUB_INC2 generation given by CPU" group.long ad:0x948080FC++0x83 line.long 0x00 "DPLL_STATUS,Status Register" rbitfld.long 0x00 31. "ERR,Error during configuration or operation resulting in unexpected values" "0,1" rbitfld.long 0x00 30. "LOCK1,DPLL Lock status concerning SUB_INC1" "0,1" rbitfld.long 0x00 29. "FTD,First TRIGGER detected" "0,1" newline rbitfld.long 0x00 28. "FSD,First STATE detected" "0,1" rbitfld.long 0x00 27. "SYT,Synchronization condition of TRIGGER fixed" "0,1" rbitfld.long 0x00 26. "SYS,Synchronization condition of STATE fixed" "0,1" newline rbitfld.long 0x00 25. "LOCK2,DPLL Lock status concerning SUB_INC2" "0,1" rbitfld.long 0x00 23. "BWD1,Backwards drive of SUB_INC1" "0,1" rbitfld.long 0x00 22. "BWD2,Backward drive of SUB_INC2" "0,1" newline rbitfld.long 0x00 21. "ITN,Incrementing number of TRIGGER events is not plausible Bit is set when the number of TRIGGERS is different from profile" "0,1" rbitfld.long 0x00 20. "ISN,Incrementing number of STATE events is not plausible Bit is set when the number of states is different from profile" "0,1" rbitfld.long 0x00 19. "CAIP1,Calculation of lower half Actions in progress" "0,1" newline rbitfld.long 0x00 18. "CAIP2,Calculation of upper half Actions in progress" "0,1" rbitfld.long 0x00 17. "CSVT,Current signal value TRIGGER" "0,1" rbitfld.long 0x00 16. "CSVS,Current signal value STATE" "0,1" newline rbitfld.long 0x00 15. "LOW_RES,Low resolution of CCM[0]_TBU_TS0 is used for DPLL input this value reflects the input signal LOW_RES" "0,1" bitfld.long 0x00 12. "RAM2_ERR,DPLL internal access to not configured RAM2 memory space" "0,1" bitfld.long 0x00 11. "MT,Missing TRIGGER detected according to DPLL_TOV" "0,1" newline bitfld.long 0x00 10. "TOR,TRIGGER out of range" "0,1" bitfld.long 0x00 9. "MS,Missing STATE detected according to DPLL_SOV" "0,1" bitfld.long 0x00 8. "SOR,STATE out of range" "0,1" newline rbitfld.long 0x00 7. "PSE,Prediction space configuration error" "0,1" rbitfld.long 0x00 6. "RCT,Resolution conflict TRIGGER" "0,1" rbitfld.long 0x00 5. "RCS,Resolution conflict STATE" "0,1" newline bitfld.long 0x00 4. "CRO,Calculated Reciprocal value overflow" "0,1" bitfld.long 0x00 3. "CTO,Calculated TRIGGER duration overflow" "0,1" bitfld.long 0x00 1. "CSO,Calculated STATE duration overflow" "0,1" newline bitfld.long 0x00 0. "FPCE,Fast pulse correction error" "0,1" line.long 0x04 "DPLL_ID_PMTR_0,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x04 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x08 "DPLL_ID_PMTR_1,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x08 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x0C "DPLL_ID_PMTR_2,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x0C 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x10 "DPLL_ID_PMTR_3,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x10 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x14 "DPLL_ID_PMTR_4,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x14 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x18 "DPLL_ID_PMTR_5,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x18 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x1C "DPLL_ID_PMTR_6,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x1C 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x20 "DPLL_ID_PMTR_7,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x20 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x24 "DPLL_ID_PMTR_8,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x24 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x28 "DPLL_ID_PMTR_9,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x28 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x2C "DPLL_ID_PMTR_10,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x2C 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x30 "DPLL_ID_PMTR_11,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x30 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x34 "DPLL_ID_PMTR_12,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x34 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x38 "DPLL_ID_PMTR_13,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x38 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x3C "DPLL_ID_PMTR_14,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x3C 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x40 "DPLL_ID_PMTR_15,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x40 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x44 "DPLL_ID_PMTR_16,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x44 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x48 "DPLL_ID_PMTR_17,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x48 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x4C "DPLL_ID_PMTR_18,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x4C 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x50 "DPLL_ID_PMTR_19,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x50 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x54 "DPLL_ID_PMTR_20,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x54 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x58 "DPLL_ID_PMTR_21,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x58 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x5C "DPLL_ID_PMTR_22,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x5C 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x60 "DPLL_ID_PMTR_23,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x60 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x64 "DPLL_ID_PMTR_24,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x64 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x68 "DPLL_ID_PMTR_25,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x68 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x6C "DPLL_ID_PMTR_26,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x6C 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x70 "DPLL_ID_PMTR_27,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x70 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x74 "DPLL_ID_PMTR_28,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x74 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x78 "DPLL_ID_PMTR_29,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x78 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x7C "DPLL_ID_PMTR_30,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x7C 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" line.long 0x80 "DPLL_ID_PMTR_31,ID Information for Input Signal PMTR[n] (Position minus Time Request)" hexmask.long.word 0x80 0.--8. 1. "ID_PMTR,ID information to the input signal PMTR[n] from the ARU" rgroup.long ad:0x948081E0++0x0F line.long 0x00 "DPLL_CTRL_0_SHADOW_TRIGGER,Shadow Register of DPLL_CTRL_0 controlled by an active TRIGGER Slope" bitfld.long 0x00 31. "RMO,Reference mode selection of the relevant the input signal for generation of SUB_INC1" "0,1" bitfld.long 0x00 28. "IDT,Input delay TRIGGER use of input delay information transmitted in FT part of the TRIGGER signal" "0,1" bitfld.long 0x00 26. "AMT,Use of adaptation information of Adapt mode TRIGGER" "0,1" newline bitfld.long 0x00 10. "IFP,Input filter position value contains position or time related information" "0,1" hexmask.long.word 0x00 0.--9. 1. "MLT,Multiplier for TRIGGER MLT+1 is number of SUB_INC1 pulses between two TRIGGER events in normal mode (1...1024)" line.long 0x04 "DPLL_CTRL_0_SHADOW_STATE,Shadow Register of DPLL_CTRL_0 controlled by an active STATE Slope" bitfld.long 0x04 31. "RMO,Reference mode selection of the relevant the input signal for generation of SUB_INC1" "0,1" bitfld.long 0x04 27. "IDS,Input delay STATE Use of input delay information transmitted in FT part of the STATE signal" "0,1" bitfld.long 0x04 25. "AMS,Adapt mode STATE Use of adaptation information of STATE" "0,1" newline bitfld.long 0x04 10. "IFP,Input filter position value contains position or time related information" "0,1" line.long 0x08 "DPLL_CTRL_1_SHADOW_TRIGGER,Shadow Register of DPLL_CTRL_1 controlled by an active TRIGGER Slope" bitfld.long 0x08 7. "PCM1,Pulse Correction Mode for SUB_INC1 generation" "0,1" bitfld.long 0x08 6. "DLM1,Direct Load Mode for SUB_INC1 generation" "0,1" bitfld.long 0x08 5. "SGE1,SUB_INC1 generator enable" "0,1" newline bitfld.long 0x08 4. "PIT,Plausibility value PVT to next active TRIGGER is time related" "0,1" bitfld.long 0x08 3. "COA,Correction strategy in automatic end mode (DPLL_CTRL_1.DMO=0)" "0,1" bitfld.long 0x08 0. "DMO,DPLL mode select" "0,1" line.long 0x0C "DPLL_CTRL_1_SHADOW_STATE,DPLL Shadow Register of DPLL_CTRL_1 controlled by an active STATE Slope" bitfld.long 0x0C 10. "PCM2,Pulse Correction Mode for SUB_INC2 generation" "0,1" bitfld.long 0x0C 9. "DLM2,Direct Load Mode for SUB_INC2 generation" "0,1" bitfld.long 0x0C 8. "SGE2,SUB_INC2 generator enable" "0,1" newline bitfld.long 0x0C 7. "PCM1,Pulse Correction Mode for SUB_INC1 generation" "0,1" bitfld.long 0x0C 6. "DLM1,Direct Load Mode for SUB_INC1 generation" "0,1" bitfld.long 0x0C 5. "SGE1,SUB_INC1 generator enable" "0,1" newline bitfld.long 0x0C 3. "COA,Correction strategy in automatic end mode (DPLL_CTRL_1.DMO=0)" "0,1" bitfld.long 0x0C 0. "DMO,DPLL mode select" "0,1" group.long ad:0x948081FC++0x803 line.long 0x00 "DPLL_RAM_INI,Register to control the RAM Initialization" bitfld.long 0x00 4. "INIT_RAM,RAM regions 1a 1b and 2 are to be initialized" "0,1" rbitfld.long 0x00 2. "INIT_2,RAM region 2 initialization in progress" "0,1" rbitfld.long 0x00 1. "INIT_1BC,RAM region 1b and 1c initialization in progress" "0,1" newline rbitfld.long 0x00 0. "INIT_1A,RAM region 1a initialization in progress" "0,1" line.long 0x04 "DPLL_PSA0,Position Request for Action [n]" hexmask.long.tbyte 0x04 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x08 "DPLL_PSA1,Position Request for Action [n]" hexmask.long.tbyte 0x08 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x0C "DPLL_PSA2,Position Request for Action [n]" hexmask.long.tbyte 0x0C 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x10 "DPLL_PSA3,Position Request for Action [n]" hexmask.long.tbyte 0x10 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x14 "DPLL_PSA4,Position Request for Action [n]" hexmask.long.tbyte 0x14 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x18 "DPLL_PSA5,Position Request for Action [n]" hexmask.long.tbyte 0x18 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x1C "DPLL_PSA6,Position Request for Action [n]" hexmask.long.tbyte 0x1C 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x20 "DPLL_PSA7,Position Request for Action [n]" hexmask.long.tbyte 0x20 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x24 "DPLL_PSA8,Position Request for Action [n]" hexmask.long.tbyte 0x24 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x28 "DPLL_PSA9,Position Request for Action [n]" hexmask.long.tbyte 0x28 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x2C "DPLL_PSA10,Position Request for Action [n]" hexmask.long.tbyte 0x2C 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x30 "DPLL_PSA11,Position Request for Action [n]" hexmask.long.tbyte 0x30 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x34 "DPLL_PSA12,Position Request for Action [n]" hexmask.long.tbyte 0x34 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x38 "DPLL_PSA13,Position Request for Action [n]" hexmask.long.tbyte 0x38 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x3C "DPLL_PSA14,Position Request for Action [n]" hexmask.long.tbyte 0x3C 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x40 "DPLL_PSA15,Position Request for Action [n]" hexmask.long.tbyte 0x40 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x44 "DPLL_PSA16,Position Request for Action [n]" hexmask.long.tbyte 0x44 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x48 "DPLL_PSA17,Position Request for Action [n]" hexmask.long.tbyte 0x48 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x4C "DPLL_PSA18,Position Request for Action [n]" hexmask.long.tbyte 0x4C 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x50 "DPLL_PSA19,Position Request for Action [n]" hexmask.long.tbyte 0x50 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x54 "DPLL_PSA20,Position Request for Action [n]" hexmask.long.tbyte 0x54 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x58 "DPLL_PSA21,Position Request for Action [n]" hexmask.long.tbyte 0x58 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x5C "DPLL_PSA22,Position Request for Action [n]" hexmask.long.tbyte 0x5C 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x60 "DPLL_PSA23,Position Request for Action [n]" hexmask.long.tbyte 0x60 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x64 "DPLL_PSA24,Position Request for Action [n]" hexmask.long.tbyte 0x64 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x68 "DPLL_PSA25,Position Request for Action [n]" hexmask.long.tbyte 0x68 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x6C "DPLL_PSA26,Position Request for Action [n]" hexmask.long.tbyte 0x6C 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x70 "DPLL_PSA27,Position Request for Action [n]" hexmask.long.tbyte 0x70 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x74 "DPLL_PSA28,Position Request for Action [n]" hexmask.long.tbyte 0x74 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x78 "DPLL_PSA29,Position Request for Action [n]" hexmask.long.tbyte 0x78 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x7C "DPLL_PSA30,Position Request for Action [n]" hexmask.long.tbyte 0x7C 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x80 "DPLL_PSA31,Position Request for Action [n]" hexmask.long.tbyte 0x80 0.--23. 1. "PSA,Position information of a desired Action [n]" line.long 0x84 "DPLL_DLA0,Time to React for Action [n]" hexmask.long.tbyte 0x84 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0x88 "DPLL_DLA1,Time to React for Action [n]" hexmask.long.tbyte 0x88 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0x8C "DPLL_DLA2,Time to React for Action [n]" hexmask.long.tbyte 0x8C 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0x90 "DPLL_DLA3,Time to React for Action [n]" hexmask.long.tbyte 0x90 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0x94 "DPLL_DLA4,Time to React for Action [n]" hexmask.long.tbyte 0x94 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0x98 "DPLL_DLA5,Time to React for Action [n]" hexmask.long.tbyte 0x98 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0x9C "DPLL_DLA6,Time to React for Action [n]" hexmask.long.tbyte 0x9C 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xA0 "DPLL_DLA7,Time to React for Action [n]" hexmask.long.tbyte 0xA0 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xA4 "DPLL_DLA8,Time to React for Action [n]" hexmask.long.tbyte 0xA4 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xA8 "DPLL_DLA9,Time to React for Action [n]" hexmask.long.tbyte 0xA8 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xAC "DPLL_DLA10,Time to React for Action [n]" hexmask.long.tbyte 0xAC 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xB0 "DPLL_DLA11,Time to React for Action [n]" hexmask.long.tbyte 0xB0 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xB4 "DPLL_DLA12,Time to React for Action [n]" hexmask.long.tbyte 0xB4 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xB8 "DPLL_DLA13,Time to React for Action [n]" hexmask.long.tbyte 0xB8 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xBC "DPLL_DLA14,Time to React for Action [n]" hexmask.long.tbyte 0xBC 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xC0 "DPLL_DLA15,Time to React for Action [n]" hexmask.long.tbyte 0xC0 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xC4 "DPLL_DLA16,Time to React for Action [n]" hexmask.long.tbyte 0xC4 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xC8 "DPLL_DLA17,Time to React for Action [n]" hexmask.long.tbyte 0xC8 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xCC "DPLL_DLA18,Time to React for Action [n]" hexmask.long.tbyte 0xCC 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xD0 "DPLL_DLA19,Time to React for Action [n]" hexmask.long.tbyte 0xD0 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xD4 "DPLL_DLA20,Time to React for Action [n]" hexmask.long.tbyte 0xD4 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xD8 "DPLL_DLA21,Time to React for Action [n]" hexmask.long.tbyte 0xD8 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xDC "DPLL_DLA22,Time to React for Action [n]" hexmask.long.tbyte 0xDC 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xE0 "DPLL_DLA23,Time to React for Action [n]" hexmask.long.tbyte 0xE0 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xE4 "DPLL_DLA24,Time to React for Action [n]" hexmask.long.tbyte 0xE4 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xE8 "DPLL_DLA25,Time to React for Action [n]" hexmask.long.tbyte 0xE8 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xEC "DPLL_DLA26,Time to React for Action [n]" hexmask.long.tbyte 0xEC 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xF0 "DPLL_DLA27,Time to React for Action [n]" hexmask.long.tbyte 0xF0 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xF4 "DPLL_DLA28,Time to React for Action [n]" hexmask.long.tbyte 0xF4 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xF8 "DPLL_DLA29,Time to React for Action [n]" hexmask.long.tbyte 0xF8 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0xFC "DPLL_DLA30,Time to React for Action [n]" hexmask.long.tbyte 0xFC 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0x100 "DPLL_DLA31,Time to React for Action [n]" hexmask.long.tbyte 0x100 0.--23. 1. "DLA,Time to react before the corresponding position value of a desired Action [n] is reached" line.long 0x104 "DPLL_NA0,Calculated Relative Time to Action [n]" bitfld.long 0x104 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x104 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x104 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x108 "DPLL_NA1,Calculated Relative Time to Action [n]" bitfld.long 0x108 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x108 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x108 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x10C "DPLL_NA2,Calculated Relative Time to Action [n]" bitfld.long 0x10C 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x10C 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x10C 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x110 "DPLL_NA3,Calculated Relative Time to Action [n]" bitfld.long 0x110 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x110 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x110 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x114 "DPLL_NA4,Calculated Relative Time to Action [n]" bitfld.long 0x114 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x114 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x114 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x118 "DPLL_NA5,Calculated Relative Time to Action [n]" bitfld.long 0x118 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x118 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x118 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x11C "DPLL_NA6,Calculated Relative Time to Action [n]" bitfld.long 0x11C 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x11C 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x11C 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x120 "DPLL_NA7,Calculated Relative Time to Action [n]" bitfld.long 0x120 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x120 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x120 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x124 "DPLL_NA8,Calculated Relative Time to Action [n]" bitfld.long 0x124 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x124 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x124 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x128 "DPLL_NA9,Calculated Relative Time to Action [n]" bitfld.long 0x128 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x128 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x128 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x12C "DPLL_NA10,Calculated Relative Time to Action [n]" bitfld.long 0x12C 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x12C 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x12C 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x130 "DPLL_NA11,Calculated Relative Time to Action [n]" bitfld.long 0x130 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x130 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x130 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x134 "DPLL_NA12,Calculated Relative Time to Action [n]" bitfld.long 0x134 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x134 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x134 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x138 "DPLL_NA13,Calculated Relative Time to Action [n]" bitfld.long 0x138 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x138 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x138 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x13C "DPLL_NA14,Calculated Relative Time to Action [n]" bitfld.long 0x13C 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x13C 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x13C 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x140 "DPLL_NA15,Calculated Relative Time to Action [n]" bitfld.long 0x140 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x140 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x140 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x144 "DPLL_NA16,Calculated Relative Time to Action [n]" bitfld.long 0x144 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x144 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x144 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x148 "DPLL_NA17,Calculated Relative Time to Action [n]" bitfld.long 0x148 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x148 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x148 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x14C "DPLL_NA18,Calculated Relative Time to Action [n]" bitfld.long 0x14C 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x14C 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x14C 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x150 "DPLL_NA19,Calculated Relative Time to Action [n]" bitfld.long 0x150 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x150 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x150 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x154 "DPLL_NA20,Calculated Relative Time to Action [n]" bitfld.long 0x154 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x154 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x154 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x158 "DPLL_NA21,Calculated Relative Time to Action [n]" bitfld.long 0x158 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x158 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x158 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x15C "DPLL_NA22,Calculated Relative Time to Action [n]" bitfld.long 0x15C 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x15C 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x15C 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x160 "DPLL_NA23,Calculated Relative Time to Action [n]" bitfld.long 0x160 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x160 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x160 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x164 "DPLL_NA24,Calculated Relative Time to Action [n]" bitfld.long 0x164 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x164 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x164 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x168 "DPLL_NA25,Calculated Relative Time to Action [n]" bitfld.long 0x168 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x168 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x168 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x16C "DPLL_NA26,Calculated Relative Time to Action [n]" bitfld.long 0x16C 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x16C 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x16C 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x170 "DPLL_NA27,Calculated Relative Time to Action [n]" bitfld.long 0x170 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x170 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x170 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x174 "DPLL_NA28,Calculated Relative Time to Action [n]" bitfld.long 0x174 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x174 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x174 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x178 "DPLL_NA29,Calculated Relative Time to Action [n]" bitfld.long 0x178 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x178 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x178 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x17C "DPLL_NA30,Calculated Relative Time to Action [n]" bitfld.long 0x17C 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x17C 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x17C 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x180 "DPLL_NA31,Calculated Relative Time to Action [n]" bitfld.long 0x180 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x180 10.--19. 1. "DW,Number of events to Action [n] (integer part)" hexmask.long.word 0x180 0.--9. 1. "DB,Number of events to Action [n] (fractional part)" line.long 0x184 "DPLL_DTA0,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x184 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x188 "DPLL_DTA1,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x188 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x18C "DPLL_DTA2,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x18C 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x190 "DPLL_DTA3,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x190 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x194 "DPLL_DTA4,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x194 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x198 "DPLL_DTA5,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x198 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x19C "DPLL_DTA6,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x19C 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1A0 "DPLL_DTA7,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1A0 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1A4 "DPLL_DTA8,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1A4 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1A8 "DPLL_DTA9,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1A8 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1AC "DPLL_DTA10,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1AC 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1B0 "DPLL_DTA11,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1B0 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1B4 "DPLL_DTA12,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1B4 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1B8 "DPLL_DTA13,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1B8 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1BC "DPLL_DTA14,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1BC 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1C0 "DPLL_DTA15,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1C0 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1C4 "DPLL_DTA16,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1C4 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1C8 "DPLL_DTA17,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1C8 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1CC "DPLL_DTA18,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1CC 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1D0 "DPLL_DTA19,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1D0 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1D4 "DPLL_DTA20,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1D4 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1D8 "DPLL_DTA21,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1D8 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1DC "DPLL_DTA22,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1DC 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1E0 "DPLL_DTA23,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1E0 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1E4 "DPLL_DTA24,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1E4 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1E8 "DPLL_DTA25,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1E8 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1EC "DPLL_DTA26,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1EC 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1F0 "DPLL_DTA27,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1F0 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1F4 "DPLL_DTA28,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1F4 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1F8 "DPLL_DTA29,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1F8 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x1FC "DPLL_DTA30,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x1FC 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x200 "DPLL_DTA31,Calculated Relative Time to Action [n]" hexmask.long.tbyte 0x200 0.--23. 1. "DTA,Calculated relative time to Action [n]" line.long 0x204 "DPLL_TS_T,Actual TRIGGER Time Stamp Value" hexmask.long.tbyte 0x204 0.--23. 1. "TRIGGER_TS,Time stamp value of the last active TRIGGER input" line.long 0x208 "DPLL_TS_T_OLD,Previous TRIGGER Time Stamp Value" hexmask.long.tbyte 0x208 0.--23. 1. "TRIGGER_TS_OLD,Time stamp value of the last but one active TRIGGER input" line.long 0x20C "DPLL_FTV_T,Actual TRIGGER Filter value" hexmask.long.tbyte 0x20C 0.--23. 1. "TRIGGER_FT,Filter value of the last active TRIGGER input" line.long 0x210 "DPLL_RAM1B_RSVD_0,DPLL RAM1B reserved data" hexmask.long.tbyte 0x210 0.--23. 1. "RSVD,Reserved Data word no DPLL internal use" line.long 0x214 "DPLL_TS_S,Actual STATE Time Stamp Register" hexmask.long.tbyte 0x214 0.--23. 1. "STATE_TS,Time stamp value of the last active STATE input" line.long 0x218 "DPLL_TS_S_OLD,Previous STATE Time Stamp Register" hexmask.long.tbyte 0x218 0.--23. 1. "STATE_TS_OLD,Time stamp value of the last active STATE input" line.long 0x21C "DPLL_FTV_S,Actual STATE Filter Value" hexmask.long.tbyte 0x21C 0.--23. 1. "STATE_FT,Filter value of the last active STATE input" line.long 0x220 "DPLL_RAM1B_RSVD_1,DPLL RAM1B reserved data" hexmask.long.tbyte 0x220 0.--23. 1. "RSVD,Reserved Data word no DPLL internal use" line.long 0x224 "DPLL_THMI,TRIGGER Hold Time Min. Value" hexmask.long.byte 0x224 16.--23. 1. "NOT_USED,Not used" hexmask.long.word 0x224 0.--15. 1. "THMI,Minimal time between active and inactive TRIGGER slope the time value corresponds to the time stamp clock counts: This means the clock selected for the TBU_CH0_BASE (see TBU_CH0_CTRL register)" line.long 0x228 "DPLL_THMA,TRIGGER Hold Time Max. Value" hexmask.long.byte 0x228 16.--23. 1. "NOT_USED,Not used" hexmask.long.word 0x228 0.--15. 1. "THMA,Maximal time between active and inactive TRIGGER slope the time value corresponds to the time stamp clock counts: This means the clock selected for the TBU_CH0_BASE (see TBU_CH0_CTRL register)" line.long 0x22C "DPLL_THVAL,Measured TRIGGER Hold Time Value" hexmask.long.tbyte 0x22C 0.--23. 1. "THVAL,Measured time from the last active slope to the next inactive TRIGGER slope in time stamp clock counts: This means the clock selected for the TBU_CH0_BASE" line.long 0x230 "DPLL_RAM1B_RSVD_2,DPLL RAM1B reserved data" hexmask.long.tbyte 0x230 0.--23. 1. "RSVD,Reserved Data word no DPLL internal use" line.long 0x234 "DPLL_TOV,Time Out Value of Active TRIGGER Slope (for missing TRIGGER generation)" hexmask.long.byte 0x234 16.--23. 1. "NOT_USED,Not used" hexmask.long.byte 0x234 10.--15. 1. "TOV_DW,Decision value (integer part) for missing TRIGGER interrupt" hexmask.long.word 0x234 0.--9. 1. "TOV_DB,Decision value (fractional part) for missing TRIGGER interrupt" line.long 0x238 "DPLL_TOV_S,Time Out Value of active STATE Slope (for missing STATE generation)" hexmask.long.byte 0x238 16.--23. 1. "NOT_USED,Not used" hexmask.long.byte 0x238 10.--15. 1. "DW,Decision value (integer part) for missing STATE interrupt" hexmask.long.word 0x238 0.--9. 1. "DB,Decision value (fractional part) for missing STATE interrupt" line.long 0x23C "DPLL_ADD_IN_CAL1,Calculated ADD_IN Value for SUB_INC1 Generation" hexmask.long.tbyte 0x23C 0.--23. 1. "ADD_IN_CAL1,Calculated input value for SUB_INC1 generation calculated by the DPLL" line.long 0x240 "DPLL_ADD_IN_CAL2,Calculated ADD_IN Value for SUB_INC2 Generation" hexmask.long.tbyte 0x240 0.--23. 1. "ADD_IN_CAL2,Input value for SUB_INC2 generation calculated by the DPLL for DPLL_CTRL_1.SMC=DPLL_CTRL_0.RMO=1" line.long 0x244 "DPLL_MPVAL1,Missing Pulses to be Added or Subtracted Directly" hexmask.long.byte 0x244 16.--23. 1. "SIX1,Sign extension for DPLL_MPVAL1.MPVAL1" hexmask.long.word 0x244 0.--15. 1. "MPVAL1,Missing pulses for direct correction of SUB_INC1 pulses by the CPU" line.long 0x248 "DPLL_MPVAL2,Missing Pulses to be Added or Subtracted Directly" hexmask.long.byte 0x248 16.--23. 1. "SIX2,Sign extension for DPLL_MPVAL2.MPVAL2" hexmask.long.word 0x248 0.--15. 1. "MPVAL2,Missing pulses for direct correction of SUB_INC2 pulses by the CPU" line.long 0x24C "DPLL_NMB_T_TAR,Target Number of Pulses to be sent in Normal Mode" hexmask.long.byte 0x24C 16.--23. 1. "NOT_USED,Not used" hexmask.long.word 0x24C 0.--15. 1. "NMB_T_TAR,Target number of pulses for TRIGGER calculated target number of pulses in normal mode for the current TRIGGER increment without missing pulses" line.long 0x250 "DPLL_NMB_T_TAR_OLD,Last but one Target Number of Pulses to be sent in Normal Mode" hexmask.long.byte 0x250 16.--23. 1. "NOT_USED,Not used" hexmask.long.word 0x250 0.--15. 1. "NMB_T_TAR_OLD,Target number of pulses for TRIGGER calculated number of pulses in normal mode for the current TRIGGER increment without missing pulses" line.long 0x254 "DPLL_NMB_S_TAR,Target Number of Pulses to be sent in Emergency Mode" bitfld.long 0x254 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x254 0.--19. 1. "NMB_S_TAR,Target number of pulses for STATE calculated number of pulses in emergency mode for the current STATE increment without missing pulses" line.long 0x258 "DPLL_NMB_S_TAR_OLD,Last but one Target Number of Pulses to be sent in Emergency Mode" bitfld.long 0x258 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x258 0.--19. 1. "NMB_S_TAR_OLD,Target number of pulses for STATE calculated number of pulses in emergency mode for the current STATE increment without missing pulses" line.long 0x25C "DPLL_RAM1B_RSVD_3_0,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x25C 0.--23. 1. "RSVD,Reserved Data word no DPLL internal use" line.long 0x260 "DPLL_RAM1B_RSVD_3_1,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x260 0.--23. 1. "RSVD,Reserved Data word no DPLL internal use" line.long 0x264 "DPLL_RCDT_TX,Reciprocal Value of the Expected Increment Duration of TRIGGER" hexmask.long.tbyte 0x264 0.--23. 1. "RCDT_TX,Reciprocal value of expected increment duration *2^32 while only the lower 24 bits are used" line.long 0x268 "DPLL_RCDT_SX,Reciprocal Value of the Expected Increment Duration of STATE" hexmask.long.tbyte 0x268 0.--23. 1. "RCDT_SX,Reciprocal value of expected increment duration *2^32 while only the lower 24 bits are used" line.long 0x26C "DPLL_RCDT_TX_NOM,Reciprocal Value of the Expected Nominal Increment Duration of TRIGGER" hexmask.long.tbyte 0x26C 0.--23. 1. "RCDT_TX_NOM,Reciprocal value of expected increment duration *2^32 while only the lower 24 bits are used" line.long 0x270 "DPLL_RCDT_SX_NOM,Reciprocal Value of the Expected Nominal Increment Duration of STATE" hexmask.long.tbyte 0x270 0.--23. 1. "RCDT_SX_NOM,Reciprocal value of expected increment duration *2^32 while only the lower 24 bits are used" line.long 0x274 "DPLL_RDT_T_ACT,Reciprocal Value of the Last Increment of TRIGGER" hexmask.long.tbyte 0x274 0.--23. 1. "RDT_T_ACT,Reciprocal value of last TRIGGER increment *2^32 only the lower 24 bits are used the LSB is rounded up when the next truncated bit is 1" line.long 0x278 "DPLL_RDT_S_ACT,Reciprocal Value of the Last Increment of STATE" hexmask.long.tbyte 0x278 0.--23. 1. "RDT_S_ACT,Reciprocal value of last STATE increment *2^32 only the lower 24 bits are used the LSB is rounded up when the next truncated bit is 1" line.long 0x27C "DPLL_DT_T_ACT,Duration of the Last TRIGGER Increment" hexmask.long.tbyte 0x27C 0.--23. 1. "DT_T_ACT,Calculated duration of the last TRIGGER increment" line.long 0x280 "DPLL_DT_S_ACT,Duration of the Last STATE Increment" hexmask.long.tbyte 0x280 0.--23. 1. "DT_S_ACT,Calculated duration of the last STATE increment" line.long 0x284 "DPLL_EDT_T,Difference of Prediction to Actual Value of the Last TRIGGER Increment" hexmask.long.tbyte 0x284 0.--23. 1. "EDT_T,Signed difference between actual value and a simple prediction of the last TRIGGER increment" line.long 0x288 "DPLL_MEDT_T,Weighted Difference of Prediction Errors of TRIGGER" hexmask.long.tbyte 0x288 0.--23. 1. "MEDT_T,Signed middle weighted difference between actual value and prediction of the last TRIGGER increments only calculated for DPLL_STATUS.SYT=1" line.long 0x28C "DPLL_EDT_S,Difference of Prediction to Actual Value of the Last STATE Increment" hexmask.long.tbyte 0x28C 0.--23. 1. "EDT_S,Signed difference between actual value and prediction of the last STATE increment" line.long 0x290 "DPLL_MEDT_S,Weighted Difference of Prediction Errors of STATE" hexmask.long.tbyte 0x290 0.--23. 1. "MEDT_S,Signed middle weighted difference between actual value and prediction of the last STATE increments only calculated for DPLL_STATUS.SYS=1" line.long 0x294 "DPLL_CDT_TX,Prediction of the Actual TRIGGER Increment Duration" hexmask.long.tbyte 0x294 0.--23. 1. "CDT_TX,Calculated duration of the current TRIGGER increment" line.long 0x298 "DPLL_CDT_SX,Prediction of the Actual STATE Increment Duration" hexmask.long.tbyte 0x298 0.--23. 1. "CDT_SX,Calculated duration of the current STATE increment" line.long 0x29C "DPLL_CDT_TX_NOM,Prediction of the Nominal TRIGGER Increment Duration" hexmask.long.tbyte 0x29C 0.--23. 1. "CDT_TX_NOM,Calculated duration of the current nominal TRIGGER event" line.long 0x2A0 "DPLL_CDT_SX_NOM,Prediction of the Nominal STATE Increment Duration" hexmask.long.tbyte 0x2A0 0.--23. 1. "CDT_SX_NOM,Calculated duration of the current nominal STATE event" line.long 0x2A4 "DPLL_TLR,TRIGGER Locking Range" hexmask.long.word 0x2A4 8.--23. 1. "NOT_USED,Not used" hexmask.long.byte 0x2A4 0.--7. 1. "TLR,Value is to be multiplied with the last nominal TRIGGER duration in order to get the range for the next TRIGGER event without setting DPLL_STATUS.TOR" line.long 0x2A8 "DPLL_SLR,STATE Locking Range" hexmask.long.word 0x2A8 8.--23. 1. "NOT_USED,Not used" hexmask.long.byte 0x2A8 0.--7. 1. "SLR,Value is to be multiplied with the last nominal STATE duration in order to get the range for the next STATE event without setting DPLL_STATUS.SOR" line.long 0x2AC "DPLL_RAM1B_RSVD_4_0,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2AC 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2B0 "DPLL_RAM1B_RSVD_4_1,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2B0 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2B4 "DPLL_RAM1B_RSVD_4_2,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2B4 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2B8 "DPLL_RAM1B_RSVD_4_3,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2B8 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2BC "DPLL_RAM1B_RSVD_4_4,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2BC 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2C0 "DPLL_RAM1B_RSVD_4_5,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2C0 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2C4 "DPLL_RAM1B_RSVD_4_6,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2C4 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2C8 "DPLL_RAM1B_RSVD_4_7,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2C8 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2CC "DPLL_RAM1B_RSVD_4_8,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2CC 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2D0 "DPLL_RAM1B_RSVD_4_9,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2D0 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2D4 "DPLL_RAM1B_RSVD_4_10,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2D4 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2D8 "DPLL_RAM1B_RSVD_4_11,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2D8 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2DC "DPLL_RAM1B_RSVD_4_12,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2DC 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2E0 "DPLL_RAM1B_RSVD_4_13,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2E0 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2E4 "DPLL_RAM1B_RSVD_4_14,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2E4 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2E8 "DPLL_RAM1B_RSVD_4_15,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2E8 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2EC "DPLL_RAM1B_RSVD_4_16,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2EC 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2F0 "DPLL_RAM1B_RSVD_4_17,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2F0 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2F4 "DPLL_RAM1B_RSVD_4_18,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2F4 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2F8 "DPLL_RAM1B_RSVD_4_19,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2F8 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x2FC "DPLL_RAM1B_RSVD_4_20,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x2FC 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x300 "DPLL_RAM1B_RSVD_4_21,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x300 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x304 "DPLL_PDT_0,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x304 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x304 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x308 "DPLL_PDT_1,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x308 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x308 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x30C "DPLL_PDT_2,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x30C 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x30C 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x310 "DPLL_PDT_3,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x310 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x310 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x314 "DPLL_PDT_4,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x314 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x314 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x318 "DPLL_PDT_5,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x318 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x318 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x31C "DPLL_PDT_6,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x31C 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x31C 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x320 "DPLL_PDT_7,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x320 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x320 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x324 "DPLL_PDT_8,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x324 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x324 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x328 "DPLL_PDT_9,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x328 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x328 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x32C "DPLL_PDT_10,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x32C 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x32C 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x330 "DPLL_PDT_11,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x330 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x330 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x334 "DPLL_PDT_12,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x334 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x334 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x338 "DPLL_PDT_13,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x338 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x338 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x33C "DPLL_PDT_14,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x33C 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x33C 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x340 "DPLL_PDT_15,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x340 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x340 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x344 "DPLL_PDT_16,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x344 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x344 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x348 "DPLL_PDT_17,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x348 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x348 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x34C "DPLL_PDT_18,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x34C 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x34C 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x350 "DPLL_PDT_19,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x350 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x350 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x354 "DPLL_PDT_20,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x354 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x354 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x358 "DPLL_PDT_21,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x358 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x358 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x35C "DPLL_PDT_22,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x35C 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x35C 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x360 "DPLL_PDT_23,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x360 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x360 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x364 "DPLL_PDT_24,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x364 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x364 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x368 "DPLL_PDT_25,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x368 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x368 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x36C "DPLL_PDT_26,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x36C 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x36C 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x370 "DPLL_PDT_27,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x370 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x370 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x374 "DPLL_PDT_28,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x374 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x374 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x378 "DPLL_PDT_29,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x378 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x378 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x37C "DPLL_PDT_30,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x37C 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x37C 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x380 "DPLL_PDT_31,Projected Increment Sum Relations for Action [n]" hexmask.long.word 0x380 14.--23. 1. "DW,Integer part of relation between TRIGGER and STATE increments" hexmask.long.word 0x380 0.--13. 1. "DB,fractional part of relation between TRIGGER and STATE increments" line.long 0x384 "DPLL_RAM1B_RSVD_5_0,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x384 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x388 "DPLL_RAM1B_RSVD_5_1,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x388 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x38C "DPLL_RAM1B_RSVD_5_2,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x38C 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x390 "DPLL_RAM1B_RSVD_5_3,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x390 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x394 "DPLL_RAM1B_RSVD_5_4,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x394 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x398 "DPLL_RAM1B_RSVD_5_5,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x398 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x39C "DPLL_RAM1B_RSVD_5_6,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x39C 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3A0 "DPLL_RAM1B_RSVD_5_7,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3A0 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3A4 "DPLL_RAM1B_RSVD_5_8,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3A4 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3A8 "DPLL_RAM1B_RSVD_5_9,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3A8 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3AC "DPLL_RAM1B_RSVD_5_10,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3AC 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3B0 "DPLL_RAM1B_RSVD_5_11,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3B0 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3B4 "DPLL_RAM1B_RSVD_5_12,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3B4 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3B8 "DPLL_RAM1B_RSVD_5_13,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3B8 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3BC "DPLL_RAM1B_RSVD_5_14,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3BC 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3C0 "DPLL_RAM1B_RSVD_5_15,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3C0 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3C4 "DPLL_MLS1,Calculated Number of Sub-Pulses between two nominal STATE Events for DPLL_CTRL_1.SMC = 0" hexmask.long.byte 0x3C4 18.--23. 1. "NOT_USED,Not used" hexmask.long.tbyte 0x3C4 0.--17. 1. "MLS1,Number of pulses between two STATE events (to be set and updated by the CPU)" line.long 0x3C8 "DPLL_MLS2,Calculated Number of Sub-Pulses between two nominal STATE Events for DPLL_CTRL_1.SMC=1 and RMO=1" hexmask.long.byte 0x3C8 18.--23. 1. "NOT_USED,Not used" hexmask.long.tbyte 0x3C8 0.--17. 1. "MLS2,Number of pulses between two STATE events (to be set and updated by the CPU)" line.long 0x3CC "DPLL_CNT_NUM_1,Number of SUB_INC1 pulses in continuous mode" hexmask.long.tbyte 0x3CC 0.--23. 1. "CNT_NUM_1,Counter for number of SUB_INC1 pulses Number of pulses in continuous mode for a nominal increment in normal and emergency mode for SUB_INC1 given and updated by CPU only" line.long 0x3D0 "DPLL_CNT_NUM_2,Number of SUB_INC2 pulses in continuous mode" hexmask.long.tbyte 0x3D0 0.--23. 1. "CNT_NUM_2,Counter for number of SUB_INC2 pulses Number of pulses in continuous mode for a nominal increment in normal and emergency mode for SUB_INC2 given and updated by CPU only" line.long 0x3D4 "DPLL_PVT,Plausibility Value of Next TRIGGER Slope" hexmask.long.tbyte 0x3D4 0.--23. 1. "PVT,Plausibility value of next active TRIGGER slope" line.long 0x3D8 "DPLL_RAM1B_RSVD_6_0,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3D8 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3DC "DPLL_RAM1B_RSVD_6_1,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3DC 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3E0 "DPLL_RAM1B_RSVD_6_2,DPLL RAM1B reserved data [k]" hexmask.long.tbyte 0x3E0 0.--23. 1. "RSVD,Reserved data word no DPLL internal use" line.long 0x3E4 "DPLL_PSTC,Actual Calculated Position Stamp of TRIGGER" hexmask.long.tbyte 0x3E4 0.--23. 1. "PSTC,Calculated position stamp of last TRIGGER input" line.long 0x3E8 "DPLL_PSSC,Actual Calculated Position Stamp of STATE" hexmask.long.tbyte 0x3E8 0.--23. 1. "PSSC,Calculated position stamp for the last STATE input" line.long 0x3EC "DPLL_PSTM,Measured Position Stamp at Last TRIGGER Input" hexmask.long.tbyte 0x3EC 0.--23. 1. "PSTM,Position stamp of TRIGGER measured Measured position stamp of last active TRIGGER input" line.long 0x3F0 "DPLL_PSTM_OLD,Measured Position Stamp at Last but one TRIGGER Input" hexmask.long.tbyte 0x3F0 0.--23. 1. "PSTM_OLD,Last but one position stamp of TRIGGER measured Measured position stamp of last but one active TRIGGER input" line.long 0x3F4 "DPLL_PSSM,Measured Position Stamp at Last STATE Input" hexmask.long.tbyte 0x3F4 0.--23. 1. "PSSM,Position stamp of STATE measured Measured position stamp of last active STATE input" line.long 0x3F8 "DPLL_PSSM_OLD,Measured Position Stamp at Last but one STATE Input" hexmask.long.tbyte 0x3F8 0.--23. 1. "PSSM_OLD,Last but one position stamp of STATE measured Measured position stamp of last but one active STATE input" line.long 0x3FC "DPLL_NMB_T,Number of Pulses to be sent in Normal Mode" hexmask.long.byte 0x3FC 16.--23. 1. "NOT_USED,Not used" hexmask.long.word 0x3FC 0.--15. 1. "NMB_T,Number of pulses for TRIGGER calculated number of pulses in normal mode for the current TRIGGER increment" line.long 0x400 "DPLL_NMB_S,Number of Pulses to be sent in Emergency Mode" bitfld.long 0x400 20.--23. "NOT_USED,Not used" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x400 0.--19. 1. "NMB_S,NMB_S: Number of pulses for STATE calculated number of pulses in emergency mode for the current STATE increment" line.long 0x404 "DPLL_RDT_S0,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x404 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x408 "DPLL_RDT_S1,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x408 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x40C "DPLL_RDT_S2,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x40C 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x410 "DPLL_RDT_S3,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x410 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x414 "DPLL_RDT_S4,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x414 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x418 "DPLL_RDT_S5,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x418 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x41C "DPLL_RDT_S6,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x41C 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x420 "DPLL_RDT_S7,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x420 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x424 "DPLL_RDT_S8,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x424 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x428 "DPLL_RDT_S9,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x428 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x42C "DPLL_RDT_S10,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x42C 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x430 "DPLL_RDT_S11,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x430 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x434 "DPLL_RDT_S12,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x434 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x438 "DPLL_RDT_S13,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x438 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x43C "DPLL_RDT_S14,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x43C 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x440 "DPLL_RDT_S15,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x440 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x444 "DPLL_RDT_S16,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x444 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x448 "DPLL_RDT_S17,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x448 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x44C "DPLL_RDT_S18,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x44C 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x450 "DPLL_RDT_S19,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x450 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x454 "DPLL_RDT_S20,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x454 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x458 "DPLL_RDT_S21,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x458 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x45C "DPLL_RDT_S22,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x45C 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x460 "DPLL_RDT_S23,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x460 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x464 "DPLL_RDT_S24,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x464 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x468 "DPLL_RDT_S25,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x468 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x46C "DPLL_RDT_S26,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x46C 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x470 "DPLL_RDT_S27,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x470 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x474 "DPLL_RDT_S28,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x474 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x478 "DPLL_RDT_S29,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x478 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x47C "DPLL_RDT_S30,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x47C 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x480 "DPLL_RDT_S31,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x480 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x484 "DPLL_RDT_S32,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x484 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x488 "DPLL_RDT_S33,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x488 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x48C "DPLL_RDT_S34,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x48C 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x490 "DPLL_RDT_S35,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x490 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x494 "DPLL_RDT_S36,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x494 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x498 "DPLL_RDT_S37,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x498 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x49C "DPLL_RDT_S38,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x49C 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4A0 "DPLL_RDT_S39,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4A0 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4A4 "DPLL_RDT_S40,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4A4 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4A8 "DPLL_RDT_S41,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4A8 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4AC "DPLL_RDT_S42,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4AC 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4B0 "DPLL_RDT_S43,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4B0 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4B4 "DPLL_RDT_S44,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4B4 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4B8 "DPLL_RDT_S45,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4B8 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4BC "DPLL_RDT_S46,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4BC 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4C0 "DPLL_RDT_S47,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4C0 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4C4 "DPLL_RDT_S48,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4C4 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4C8 "DPLL_RDT_S49,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4C8 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4CC "DPLL_RDT_S50,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4CC 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4D0 "DPLL_RDT_S51,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4D0 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4D4 "DPLL_RDT_S52,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4D4 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4D8 "DPLL_RDT_S53,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4D8 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4DC "DPLL_RDT_S54,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4DC 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4E0 "DPLL_RDT_S55,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4E0 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4E4 "DPLL_RDT_S56,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4E4 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4E8 "DPLL_RDT_S57,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4E8 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4EC "DPLL_RDT_S58,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4EC 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4F0 "DPLL_RDT_S59,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4F0 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4F4 "DPLL_RDT_S60,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4F4 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4F8 "DPLL_RDT_S61,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4F8 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x4FC "DPLL_RDT_S62,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x4FC 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x500 "DPLL_RDT_S63,Reciprocal Values of the Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x500 0.--23. 1. "RDT_S,Reciprocal difference time of STATE nominal reciprocal value of the number of time stamp clocks measured in the corresponding increment *2^32 while only the lower 24 bits are used no gap considered" line.long 0x504 "DPLL_TSF_S0,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x504 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x508 "DPLL_TSF_S1,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x508 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x50C "DPLL_TSF_S2,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x50C 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x510 "DPLL_TSF_S3,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x510 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x514 "DPLL_TSF_S4,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x514 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x518 "DPLL_TSF_S5,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x518 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x51C "DPLL_TSF_S6,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x51C 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x520 "DPLL_TSF_S7,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x520 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x524 "DPLL_TSF_S8,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x524 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x528 "DPLL_TSF_S9,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x528 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x52C "DPLL_TSF_S10,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x52C 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x530 "DPLL_TSF_S11,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x530 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x534 "DPLL_TSF_S12,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x534 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x538 "DPLL_TSF_S13,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x538 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x53C "DPLL_TSF_S14,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x53C 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x540 "DPLL_TSF_S15,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x540 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x544 "DPLL_TSF_S16,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x544 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x548 "DPLL_TSF_S17,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x548 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x54C "DPLL_TSF_S18,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x54C 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x550 "DPLL_TSF_S19,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x550 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x554 "DPLL_TSF_S20,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x554 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x558 "DPLL_TSF_S21,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x558 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x55C "DPLL_TSF_S22,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x55C 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x560 "DPLL_TSF_S23,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x560 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x564 "DPLL_TSF_S24,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x564 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x568 "DPLL_TSF_S25,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x568 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x56C "DPLL_TSF_S26,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x56C 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x570 "DPLL_TSF_S27,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x570 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x574 "DPLL_TSF_S28,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x574 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x578 "DPLL_TSF_S29,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x578 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x57C "DPLL_TSF_S30,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x57C 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x580 "DPLL_TSF_S31,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x580 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x584 "DPLL_TSF_S32,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x584 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x588 "DPLL_TSF_S33,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x588 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x58C "DPLL_TSF_S34,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x58C 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x590 "DPLL_TSF_S35,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x590 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x594 "DPLL_TSF_S36,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x594 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x598 "DPLL_TSF_S37,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x598 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x59C "DPLL_TSF_S38,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x59C 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5A0 "DPLL_TSF_S39,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5A0 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5A4 "DPLL_TSF_S40,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5A4 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5A8 "DPLL_TSF_S41,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5A8 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5AC "DPLL_TSF_S42,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5AC 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5B0 "DPLL_TSF_S43,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5B0 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5B4 "DPLL_TSF_S44,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5B4 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5B8 "DPLL_TSF_S45,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5B8 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5BC "DPLL_TSF_S46,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5BC 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5C0 "DPLL_TSF_S47,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5C0 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5C4 "DPLL_TSF_S48,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5C4 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5C8 "DPLL_TSF_S49,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5C8 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5CC "DPLL_TSF_S50,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5CC 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5D0 "DPLL_TSF_S51,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5D0 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5D4 "DPLL_TSF_S52,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5D4 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5D8 "DPLL_TSF_S53,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5D8 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5DC "DPLL_TSF_S54,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5DC 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5E0 "DPLL_TSF_S55,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5E0 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5E4 "DPLL_TSF_S56,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5E4 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5E8 "DPLL_TSF_S57,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5E8 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5EC "DPLL_TSF_S58,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5EC 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5F0 "DPLL_TSF_S59,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5F0 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5F4 "DPLL_TSF_S60,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5F4 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5F8 "DPLL_TSF_S61,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5F8 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x5FC "DPLL_TSF_S62,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x5FC 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x600 "DPLL_TSF_S63,Time Stamp Values of the Nominal STATE Events in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x600 0.--23. 1. "TSF_S,Time stamp field of STATE Time stamp value of each active STATE event" line.long 0x604 "DPLL_ADT_S0,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x604 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x604 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x604 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x608 "DPLL_ADT_S1,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x608 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x608 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x608 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x60C "DPLL_ADT_S2,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x60C 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x60C 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x60C 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x610 "DPLL_ADT_S3,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x610 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x610 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x610 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x614 "DPLL_ADT_S4,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x614 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x614 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x614 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x618 "DPLL_ADT_S5,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x618 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x618 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x618 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x61C "DPLL_ADT_S6,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x61C 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x61C 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x61C 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x620 "DPLL_ADT_S7,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x620 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x620 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x620 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x624 "DPLL_ADT_S8,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x624 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x624 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x624 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x628 "DPLL_ADT_S9,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x628 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x628 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x628 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x62C "DPLL_ADT_S10,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x62C 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x62C 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x62C 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x630 "DPLL_ADT_S11,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x630 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x630 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x630 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x634 "DPLL_ADT_S12,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x634 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x634 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x634 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x638 "DPLL_ADT_S13,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x638 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x638 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x638 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x63C "DPLL_ADT_S14,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x63C 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x63C 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x63C 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x640 "DPLL_ADT_S15,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x640 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x640 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x640 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x644 "DPLL_ADT_S16,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x644 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x644 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x644 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x648 "DPLL_ADT_S17,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x648 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x648 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x648 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x64C "DPLL_ADT_S18,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x64C 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x64C 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x64C 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x650 "DPLL_ADT_S19,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x650 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x650 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x650 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x654 "DPLL_ADT_S20,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x654 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x654 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x654 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x658 "DPLL_ADT_S21,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x658 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x658 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x658 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x65C "DPLL_ADT_S22,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x65C 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x65C 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x65C 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x660 "DPLL_ADT_S23,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x660 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x660 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x660 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x664 "DPLL_ADT_S24,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x664 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x664 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x664 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x668 "DPLL_ADT_S25,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x668 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x668 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x668 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x66C "DPLL_ADT_S26,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x66C 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x66C 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x66C 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x670 "DPLL_ADT_S27,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x670 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x670 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x670 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x674 "DPLL_ADT_S28,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x674 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x674 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x674 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x678 "DPLL_ADT_S29,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x678 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x678 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x678 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x67C "DPLL_ADT_S30,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x67C 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x67C 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x67C 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x680 "DPLL_ADT_S31,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x680 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x680 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x680 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x684 "DPLL_ADT_S32,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x684 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x684 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x684 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x688 "DPLL_ADT_S33,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x688 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x688 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x688 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x68C "DPLL_ADT_S34,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x68C 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x68C 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x68C 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x690 "DPLL_ADT_S35,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x690 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x690 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x690 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x694 "DPLL_ADT_S36,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x694 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x694 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x694 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x698 "DPLL_ADT_S37,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x698 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x698 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x698 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x69C "DPLL_ADT_S38,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x69C 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x69C 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x69C 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6A0 "DPLL_ADT_S39,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6A0 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6A0 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6A0 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6A4 "DPLL_ADT_S40,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6A4 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6A4 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6A4 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6A8 "DPLL_ADT_S41,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6A8 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6A8 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6A8 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6AC "DPLL_ADT_S42,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6AC 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6AC 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6AC 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6B0 "DPLL_ADT_S43,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6B0 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6B0 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6B0 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6B4 "DPLL_ADT_S44,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6B4 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6B4 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6B4 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6B8 "DPLL_ADT_S45,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6B8 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6B8 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6B8 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6BC "DPLL_ADT_S46,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6BC 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6BC 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6BC 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6C0 "DPLL_ADT_S47,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6C0 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6C0 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6C0 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6C4 "DPLL_ADT_S48,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6C4 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6C4 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6C4 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6C8 "DPLL_ADT_S49,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6C8 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6C8 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6C8 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6CC "DPLL_ADT_S50,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6CC 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6CC 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6CC 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6D0 "DPLL_ADT_S51,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6D0 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6D0 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6D0 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6D4 "DPLL_ADT_S52,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6D4 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6D4 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6D4 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6D8 "DPLL_ADT_S53,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6D8 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6D8 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6D8 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6DC "DPLL_ADT_S54,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6DC 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6DC 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6DC 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6E0 "DPLL_ADT_S55,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6E0 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6E0 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6E0 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6E4 "DPLL_ADT_S56,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6E4 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6E4 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6E4 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6E8 "DPLL_ADT_S57,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6E8 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6E8 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6E8 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6EC "DPLL_ADT_S58,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6EC 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6EC 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6EC 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6F0 "DPLL_ADT_S59,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6F0 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6F0 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6F0 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6F4 "DPLL_ADT_S60,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6F4 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6F4 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6F4 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6F8 "DPLL_ADT_S61,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6F8 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6F8 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6F8 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x6FC "DPLL_ADT_S62,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x6FC 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x6FC 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x6FC 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x700 "DPLL_ADT_S63,Adapt and Profile Values of the STATE Increments in FULL_SCALE for maximum [p] entries" bitfld.long 0x700 22.--23. "NOT_USED,Not used" "0,1,2,3" hexmask.long.byte 0x700 16.--21. 1. "NS,Number of STATE events number of nominal STATE parts in the corresponding increment" hexmask.long.word 0x700 0.--15. 1. "PD_S,Physical deviation of STATE Adapt values for each nominal STATE increment in FULL_SCALE" line.long 0x704 "DPLL_DT_S0,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x704 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x708 "DPLL_DT_S1,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x708 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x70C "DPLL_DT_S2,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x70C 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x710 "DPLL_DT_S3,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x710 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x714 "DPLL_DT_S4,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x714 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x718 "DPLL_DT_S5,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x718 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x71C "DPLL_DT_S6,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x71C 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x720 "DPLL_DT_S7,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x720 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x724 "DPLL_DT_S8,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x724 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x728 "DPLL_DT_S9,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x728 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x72C "DPLL_DT_S10,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x72C 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x730 "DPLL_DT_S11,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x730 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x734 "DPLL_DT_S12,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x734 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x738 "DPLL_DT_S13,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x738 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x73C "DPLL_DT_S14,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x73C 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x740 "DPLL_DT_S15,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x740 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x744 "DPLL_DT_S16,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x744 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x748 "DPLL_DT_S17,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x748 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x74C "DPLL_DT_S18,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x74C 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x750 "DPLL_DT_S19,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x750 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x754 "DPLL_DT_S20,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x754 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x758 "DPLL_DT_S21,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x758 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x75C "DPLL_DT_S22,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x75C 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x760 "DPLL_DT_S23,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x760 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x764 "DPLL_DT_S24,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x764 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x768 "DPLL_DT_S25,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x768 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x76C "DPLL_DT_S26,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x76C 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x770 "DPLL_DT_S27,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x770 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x774 "DPLL_DT_S28,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x774 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x778 "DPLL_DT_S29,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x778 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x77C "DPLL_DT_S30,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x77C 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x780 "DPLL_DT_S31,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x780 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x784 "DPLL_DT_S32,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x784 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x788 "DPLL_DT_S33,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x788 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x78C "DPLL_DT_S34,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x78C 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x790 "DPLL_DT_S35,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x790 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x794 "DPLL_DT_S36,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x794 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x798 "DPLL_DT_S37,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x798 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x79C "DPLL_DT_S38,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x79C 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7A0 "DPLL_DT_S39,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7A0 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7A4 "DPLL_DT_S40,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7A4 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7A8 "DPLL_DT_S41,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7A8 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7AC "DPLL_DT_S42,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7AC 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7B0 "DPLL_DT_S43,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7B0 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7B4 "DPLL_DT_S44,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7B4 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7B8 "DPLL_DT_S45,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7B8 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7BC "DPLL_DT_S46,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7BC 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7C0 "DPLL_DT_S47,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7C0 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7C4 "DPLL_DT_S48,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7C4 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7C8 "DPLL_DT_S49,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7C8 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7CC "DPLL_DT_S50,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7CC 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7D0 "DPLL_DT_S51,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7D0 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7D4 "DPLL_DT_S52,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7D4 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7D8 "DPLL_DT_S53,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7D8 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7DC "DPLL_DT_S54,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7DC 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7E0 "DPLL_DT_S55,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7E0 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7E4 "DPLL_DT_S56,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7E4 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7E8 "DPLL_DT_S57,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7E8 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7EC "DPLL_DT_S58,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7EC 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7F0 "DPLL_DT_S59,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7F0 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7F4 "DPLL_DT_S60,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7F4 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7F8 "DPLL_DT_S61,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7F8 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x7FC "DPLL_DT_S62,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x7FC 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" line.long 0x800 "DPLL_DT_S63,Nominal STATE Increment Duration in FULL_SCALE for maximum [p] entries in profile for STATE (DPLL_ADT_S[p])" hexmask.long.tbyte 0x800 0.--23. 1. "DT_S,Difference time of STATE nominal increment duration values for each STATE increment in FULL_SCALE (considering no gap)" group.long ad:0x94808E00++0x123 line.long 0x00 "DPLL_TSAC0,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x00 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x04 "DPLL_TSAC1,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x04 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x08 "DPLL_TSAC2,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x08 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x0C "DPLL_TSAC3,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x0C 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x10 "DPLL_TSAC4,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x10 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x14 "DPLL_TSAC5,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x14 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x18 "DPLL_TSAC6,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x18 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x1C "DPLL_TSAC7,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x1C 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x20 "DPLL_TSAC8,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x20 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x24 "DPLL_TSAC9,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x24 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x28 "DPLL_TSAC10,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x28 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x2C "DPLL_TSAC11,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x2C 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x30 "DPLL_TSAC12,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x30 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x34 "DPLL_TSAC13,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x34 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x38 "DPLL_TSAC14,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x38 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x3C "DPLL_TSAC15,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x3C 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x40 "DPLL_TSAC16,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x40 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x44 "DPLL_TSAC17,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x44 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x48 "DPLL_TSAC18,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x48 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x4C "DPLL_TSAC19,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x4C 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x50 "DPLL_TSAC20,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x50 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x54 "DPLL_TSAC21,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x54 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x58 "DPLL_TSAC22,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x58 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x5C "DPLL_TSAC23,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x5C 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x60 "DPLL_TSAC24,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x60 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x64 "DPLL_TSAC25,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x64 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x68 "DPLL_TSAC26,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x68 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x6C "DPLL_TSAC27,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x6C 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x70 "DPLL_TSAC28,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x70 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x74 "DPLL_TSAC29,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x74 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x78 "DPLL_TSAC30,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x78 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x7C "DPLL_TSAC31,Calculated Time Value to start Action [n]" hexmask.long.tbyte 0x7C 0.--23. 1. "TSAC,Calculated time stamp for Action [n]" line.long 0x80 "DPLL_PSAC0,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0x80 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0x84 "DPLL_PSAC1,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0x84 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0x88 "DPLL_PSAC2,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0x88 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0x8C "DPLL_PSAC3,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0x8C 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0x90 "DPLL_PSAC4,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0x90 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0x94 "DPLL_PSAC5,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0x94 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0x98 "DPLL_PSAC6,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0x98 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0x9C "DPLL_PSAC7,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0x9C 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xA0 "DPLL_PSAC8,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xA0 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xA4 "DPLL_PSAC9,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xA4 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xA8 "DPLL_PSAC10,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xA8 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xAC "DPLL_PSAC11,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xAC 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xB0 "DPLL_PSAC12,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xB0 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xB4 "DPLL_PSAC13,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xB4 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xB8 "DPLL_PSAC14,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xB8 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xBC "DPLL_PSAC15,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xBC 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xC0 "DPLL_PSAC16,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xC0 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xC4 "DPLL_PSAC17,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xC4 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xC8 "DPLL_PSAC18,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xC8 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xCC "DPLL_PSAC19,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xCC 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xD0 "DPLL_PSAC20,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xD0 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xD4 "DPLL_PSAC21,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xD4 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xD8 "DPLL_PSAC22,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xD8 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xDC "DPLL_PSAC23,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xDC 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xE0 "DPLL_PSAC24,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xE0 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xE4 "DPLL_PSAC25,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xE4 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xE8 "DPLL_PSAC26,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xE8 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xEC "DPLL_PSAC27,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xEC 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xF0 "DPLL_PSAC28,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xF0 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xF4 "DPLL_PSAC29,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xF4 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xF8 "DPLL_PSAC30,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xF8 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0xFC "DPLL_PSAC31,Calculated Position Value to start Action [n]" hexmask.long.tbyte 0xFC 0.--23. 1. "PSAC,Calculated position value for the start of Action [n]" line.long 0x100 "DPLL_ACB_0,Control Bits for NOAC Actions" bitfld.long 0x100 24.--28. "ACB_3,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x100 16.--20. "ACB_2,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x100 8.--12. "ACB_1,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x100 0.--4. "ACB_0,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x104 "DPLL_ACB_1,Control Bits for NOAC Actions" bitfld.long 0x104 24.--28. "ACB_3,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x104 16.--20. "ACB_2,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x104 8.--12. "ACB_1,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x104 0.--4. "ACB_0,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x108 "DPLL_ACB_2,Control Bits for NOAC Actions" bitfld.long 0x108 24.--28. "ACB_3,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x108 16.--20. "ACB_2,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x108 8.--12. "ACB_1,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x108 0.--4. "ACB_0,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x10C "DPLL_ACB_3,Control Bits for NOAC Actions" bitfld.long 0x10C 24.--28. "ACB_3,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10C 16.--20. "ACB_2,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x10C 8.--12. "ACB_1,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x10C 0.--4. "ACB_0,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x110 "DPLL_ACB_4,Control Bits for NOAC Actions" bitfld.long 0x110 24.--28. "ACB_3,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x110 16.--20. "ACB_2,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x110 8.--12. "ACB_1,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x110 0.--4. "ACB_0,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x114 "DPLL_ACB_5,Control Bits for NOAC Actions" bitfld.long 0x114 24.--28. "ACB_3,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x114 16.--20. "ACB_2,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x114 8.--12. "ACB_1,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x114 0.--4. "ACB_0,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x118 "DPLL_ACB_6,Control Bits for NOAC Actions" bitfld.long 0x118 24.--28. "ACB_3,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x118 16.--20. "ACB_2,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x118 8.--12. "ACB_1,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x118 0.--4. "ACB_0,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x11C "DPLL_ACB_7,Control Bits for NOAC Actions" bitfld.long 0x11C 24.--28. "ACB_3,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x11C 16.--20. "ACB_2,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x11C 8.--12. "ACB_1,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline bitfld.long 0x11C 0.--4. "ACB_0,Action Control Bits of Action [m] reflects ACT_D[m][52:48] [m]=4*[n]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" line.long 0x120 "DPLL_CTRL_11,Control Register 11" bitfld.long 0x120 31. "WACBU,Write enable for DPLL_CTRL_11.ACBU use the DPLL_CTRL_11.ACBU values of DPLL_ID_PMTR_[n].ID_PMTR are used to decide if an Action is in the past" "0,1" bitfld.long 0x120 30. "WSTATE_EXT,Write enable of DPLL_CTRL_11.STATE_EXT" "0,1" bitfld.long 0x120 29. "WPCMF2_INCCNT_B,Write enable of DPLL_CTRL_11.PCMF2_INCCNT_B" "0,1" newline bitfld.long 0x120 28. "WINCF2,Write enable for DPLL_INC_CNT2.INC_CNT2 fast" "0,1" bitfld.long 0x120 27. "WFSYL2,Write enable for Force Synchronization Loss 2" "0,1" bitfld.long 0x120 26. "WPCMF2,Write enable for pulse correction mode fast 2" "0,1" newline bitfld.long 0x120 25. "WERZ2,Write enable for error zero 2" "0,1" bitfld.long 0x120 24. "WSIP2,Write enable for simplified increment prediction 2" "0,1" bitfld.long 0x120 23. "WADS,Write enable of DPLL_CTRL_11.ADS" "0,1" newline bitfld.long 0x120 22. "WADT,Write enable of DPLL_CTRL_11.ADT" "0,1" bitfld.long 0x120 21. "WPCMF1_INCCNT_B,Write enable of DPLL_CTRL_11.PCMF1_INCCNT_B" "0,1" bitfld.long 0x120 20. "WINCF1,Write enable for DPLL_INC_CNT1.INC_CNT1 fast" "0,1" newline bitfld.long 0x120 19. "WFSYL1,Write enable for Force Synchronization Loss 1" "0,1" bitfld.long 0x120 18. "WPCMF1,Write enable for pulse correction mode fast 1" "0,1" bitfld.long 0x120 17. "WERZ1,Write enable for error zero 1" "0,1" newline bitfld.long 0x120 16. "WSIP1,Write enable for simplified increment prediction 1" "0,1" bitfld.long 0x120 15. "ACBU,DPLL_CTRL_11.ACBU use the DPLL_CTRL_11.ACBU values of PMTR are used to decide if an Action is in the past" "0,1" bitfld.long 0x120 14. "STATE_EXT,Use of STATE engine extension" "0,1" newline bitfld.long 0x120 13. "PCMF2_INCCNT_B,No increment of DPLL_INC_CNT2.INC_CNT2 when DPLL_CTRL_11.PCMF2 active (automatic end mode)" "0,1" bitfld.long 0x120 12. "INCF2,DPLL_INC_CNT2.INC_CNT2 fast" "0,1" bitfld.long 0x120 11. "FSYL2,Force Synchronization Loss of DPLL_STATUS.LOCK2" "0,1" newline bitfld.long 0x120 10. "PCMF2,Pulse correction mode fast for DPLL_INC_CNT2.INC_CNT2" "0,1" bitfld.long 0x120 9. "ERZ2,Error is assumed as zero in emergency mode and for the second engine for DPLL_CTRL_1.SMC=1" "0,1" bitfld.long 0x120 8. "SIP2,Simplified increment prediction in emergency mode and for the second engine in the case DPLL_CTRL_0.RMO=1" "0,1" newline bitfld.long 0x120 7. "ADS,Correction of DPLL_DT_S_ACT.DT_S_ACT DPLL_CDT_SX_NOM.CDT_SX_NOM_corr by DPLL_ADT_S[p].PD_S" "0,1" bitfld.long 0x120 6. "ADT,Correction of DPLL_DT_T_ACT.DT_T_ACT DPLL_CDT_TX_NOM.CDT_TX_NOM_corr by PD_T" "0,1" bitfld.long 0x120 5. "PCMF1_INCCNT_B,No increment of DPLL_INC_CNT1.INC_CNT1 when DPLL_CTRL_11.PCMF1 active (automatic end mode)" "0,1" newline bitfld.long 0x120 4. "INCF1,DPLL_INC_CNT1.INC_CNT1 fast correction" "0,1" bitfld.long 0x120 3. "FSYL1,Force Synchronization Loss of DPLL_STATUS.LOCK1" "0,1" bitfld.long 0x120 2. "PCMF1,Pulse correction mode fast for DPLL_INC_CNT1.INC_CNT1" "0,1" newline bitfld.long 0x120 1. "ERZ1,Error is assumed as zero in normal mode and for the first engine for DPLL_CTRL_1.SMC=1" "0,1" bitfld.long 0x120 0. "SIP1,Simplified increment prediction in normal mode and for the first engine in the case DPLL_CTRL_1.SMC=1" "0,1" rgroup.long ad:0x94808F24++0x03 line.long 0x00 "DPLL_THVAL2,Measured TRIGGER Hold Time Value 2" hexmask.long.tbyte 0x00 0.--23. 1. "THVAL,Measured last pulse time from active to inactive slope of TRIGGER after correction of input slope filter delays" group.long ad:0x94808F28++0x17 line.long 0x00 "DPLL_TIDEL,TRIGGER input delay" hexmask.long.tbyte 0x00 0.--23. 1. "TIDEL,TRIGGER input delay" line.long 0x04 "DPLL_SIDEL,STATE input delay" hexmask.long.tbyte 0x04 0.--23. 1. "SIDEL,STATE input delay" line.long 0x08 "DPLL_APS_SYNC_EXT,STATE Time Stamp Field Offset at Synchronization Time" hexmask.long.byte 0x08 16.--22. 1. "APS_1C2_OLD,Address pointer STATE for RAM region 1c2 at synchronization time this value is set by the current DPLL_APS_EXT.APS_1C2 value when the synchronization takes place for the first active STATE event after writing DPLL_APS_1C3_EXT.APS_1C3 but.." bitfld.long 0x08 15. "APS_1C2_STATUS,Address pointer 1c2 status set by CPU before the synchronization is performed" "0,1" hexmask.long.byte 0x08 0.--6. 1. "APS_1C2_EXT,Address pointer 1c2 extension this offset value determines by which value the DPLL_APS_EXT.APS_1C2 is changed at the time of synchronization set by CPU before the synchronization is performed" line.long 0x0C "DPLL_CTRL_EXT,STATE Time Stamp Field Offset at Synchronization Time" hexmask.long.byte 0x0C 16.--21. 1. "SYN_NS,Synchronization number of STATE summarized number of virtual increments in HALF_SCALE" hexmask.long.byte 0x0C 0.--5. 1. "SNU,STATE number SNU+1 is number of nominal STATE events in HALF_SCALE (1...32)" line.long 0x10 "DPLL_APS_EXT,Actual RAM Pointer Address for STATE" hexmask.long.byte 0x10 14.--20. 1. "APS_1C2,Address pointer STATE for RAM region 1c2 Actual RAM pointer address value for DPLL_TSF_S[p]" bitfld.long 0x10 13. "WAPS_1C2,Write bit for address pointer DPLL_APS_EXT.APS_1C2 read as zero" "0,1" hexmask.long.byte 0x10 2.--8. 1. "APS,Address pointer STATE Actual RAM pointer address value for DPLL_DT_S[p] and DPLL_RDT_S[p]" newline bitfld.long 0x10 1. "WAPS,Write bit for address pointer DPLL_APS_EXT.APS read as zero" "0,1" line.long 0x14 "DPLL_APS_1C3_EXT,Actual RAM Pointer Address for RAM region 1c3 (DPLL_CTRL_11.STATE_EXT=1)" hexmask.long.byte 0x14 2.--8. 1. "APS_1C3,Address pointer STATE for RAM region 1c3 Actual RAM pointer address value for DPLL_ADT_S[p]" rgroup.long ad:0x94808F40++0x03 line.long 0x00 "DPLL_STA,Status of the state machine states" bitfld.long 0x00 21.--23. "CNT_S,Count STATE this reflects the count of active STATE slopes (mod8)" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x00 12.--19. 1. "STA_S,Status of STATE state machine state binary coded" bitfld.long 0x00 9.--11. "CNT_T,Count TRIGGER this reflects the count of active TRIGGER slopes (mod8)" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x00 0.--7. 1. "STA_T,Status of TRIGGER state machine state binary coded" group.long ad:0x94808F44++0x3B line.long 0x00 "DPLL_INCF1_OFFSET,Start value of ADD_IN_ADDER1" hexmask.long.tbyte 0x00 0.--23. 1. "INCF1_OFFSET,Start value of the ADD_IN_ADDER1" line.long 0x04 "DPLL_INCF2_OFFSET,Start value of the ADD_IN_ADDER2" hexmask.long.tbyte 0x04 0.--23. 1. "INCF2_OFFSET,Start value of the ADD_IN_ADDER2" line.long 0x08 "DPLL_DT_T_START,Start value of DT_T_ACT" hexmask.long.tbyte 0x08 0.--23. 1. "DT_T_START,Start value of DPLL_DT_T_ACT for the first increment after DPLL_CTRL_11.SIP1 is set to 1" line.long 0x0C "DPLL_DT_S_START,Start value of DT_S_ACT" hexmask.long.tbyte 0x0C 0.--23. 1. "DT_S_START,Start value of DPLL_DT_S_ACT for the first increment after DPLL_CTRL_11.SIP2 is set to 1" line.long 0x10 "DPLL_STA_MASK,Notify values for DPLL_STA" hexmask.long.byte 0x10 8.--15. 1. "STA_NOTIFY_S,Notify value for DPLL_STA.STA_S" hexmask.long.byte 0x10 0.--7. 1. "STA_NOTIFY_T,Notify value for DPLL_STA.STA_T" line.long 0x14 "DPLL_STA_FLAG,DPLL STA Flags" bitfld.long 0x14 10. "INC_CNT2_FLAG,Flag according to DPLL_INC_CNT2_MASK.INC_CNT2_NOTIFY" "0,1" bitfld.long 0x14 9. "INC_CNT1_FLAG,Flag according to DPLL_INC_CNT1_MASK.INC_CNT1_NOTIFY" "0,1" bitfld.long 0x14 8. "STA_FLAG_S,Flag according to DPLL_STA_MASK.STA_NOTIFY_S" "0,1" newline bitfld.long 0x14 0. "STA_FLAG_T,Flag according to DPLL_MASK.STA_NOTIFY_T" "0,1" line.long 0x18 "DPLL_INC_CNT1_MASK,Notify value of DPLL_INC_CNT1" hexmask.long.tbyte 0x18 0.--23. 1. "INC_CNT1_NOTIFY,Notify value for DPLL_INC_CNT1.INC_CNT1" line.long 0x1C "DPLL_INC_CNT2_MASK,Notify value of DPLL_INC_CNT2" hexmask.long.tbyte 0x1C 0.--23. 1. "INC_CNT2_NOTIFY,Notify value for DPLL_INC_CNT2.INC_CNT2 of register DPLL_INC_CNT2" line.long 0x20 "DPLL_NUSC_EXT1,Number of Recent STATE Events used for Calculations" bitfld.long 0x20 30. "WSYN,Write control bit for DPLL_NUSC_EXT1.SYN_S and DPLL_NUSC_EXT1.SYN_S_OLD read as zero" "0,1" hexmask.long.byte 0x20 16.--22. 1. "SYN_S_OLD,Number of real and virtual events to be considered for the last increment" hexmask.long.byte 0x20 0.--6. 1. "SYN_S,Number of real and virtual events to be considered for the current increment" line.long 0x24 "DPLL_NUSC_EXT2,Number of Recent STATE Events used for Calculations" bitfld.long 0x24 31. "WVSN,Write control bit for DPLL_NUSC_EXT2.VSN read as zero" "0,1" bitfld.long 0x24 29. "WNUS,Write control bit for DPLL_NUSC_EXT2.NUSE read as zero" "0,1" hexmask.long.byte 0x24 16.--22. 1. "VSN,Virtual STATE number number of virtual STATE increments in the current DPLL_NUSC_EXT2.NUSE region" newline bitfld.long 0x24 15. "FSS,FULL_SCALE of STATE this value is to be set when DPLL_NUSC_EXT2.NUSE is set to FULL_SCALE" "0,1" hexmask.long.byte 0x24 0.--6. 1. "NUSE,Number of recent STATE events used for SUB_INC1 and SUB_INC1 calculations modulo 2*(DPLL_CTRL_0.SNU+1)" line.long 0x28 "DPLL_CTN_MIN,Minmum value of predicted nominal increment of TRIGGER" hexmask.long.tbyte 0x28 0.--23. 1. "CTN_MIN,DPLL_CDT_TX_NOM.CDT_TX_NOM min value" line.long 0x2C "DPLL_CTN_MAX,Maximum value of predicted nominal increment of TRIGGER" hexmask.long.tbyte 0x2C 0.--23. 1. "CTN_MAX,DPLL_CDT_TX_NOM.CDT_TX_NOM max value" line.long 0x30 "DPLL_CSN_MIN,Minmum value of predicted nominal increment of STATE" hexmask.long.tbyte 0x30 0.--23. 1. "CSN_MIN,DPLL_CDT_SX_NOM.CDT_SX_NOM min value" line.long 0x34 "DPLL_CSN_MAX,Maximum value of predicted nominal increment of STATE" hexmask.long.tbyte 0x34 0.--23. 1. "CSN_MAX,DPLL_CDT_SX_NOM.CDT_SX_NOM max value" line.long 0x38 "DPLL_SW_TRIG,Software triggered input events" bitfld.long 0x38 7. "WSTATE_LEVEL,Write enable for DPLL_SW_TRIG.STATE_LEVEL" "0,1" bitfld.long 0x38 6. "STATE_LEVEL,Input signal level of software triggered input event for STATE" "0,1" bitfld.long 0x38 5. "WSTATE_EVENT,Write enable for DPLL_SW_TRIG.STATE_EVENT" "0,1" newline bitfld.long 0x38 4. "STATE_EVENT,Software triggered input event for STATE" "0,1" bitfld.long 0x38 3. "WTRIG_LEVEL,Write enable for DPLL_SW_TRIG.TRIG_LEVEL" "0,1" bitfld.long 0x38 2. "TRIG_LEVEL,Input signal level of software triggered input event for TRIGGER" "0,1" newline bitfld.long 0x38 1. "WTRIG_EVENT,Write enable for DPLL_SW_TRIG.TRIG_EVENT" "0,1" bitfld.long 0x38 0. "TRIG_EVENT,Software triggered input event for TRIGGER" "0,1" rgroup.long ad:0x94808F80++0x07 line.long 0x00 "DPLL_MP_T,Missing pulses of TRIGGER" hexmask.long.tbyte 0x00 0.--23. 1. "MP_T,Number of missing pulses of the SUB_INC1 pulses in automatic end mode (DPLL_CTRL_1.DMO=0)" line.long 0x04 "DPLL_MP_S,Missing pulses of STATE" hexmask.long.tbyte 0x04 0.--23. 1. "MP_S,Number of missing pulses of the SUB_INC1/SUB_INC2 pulses in automatic end mode (DPLL_CTRL_1.DMO=0)" group.long ad:0x94808F88++0x03 line.long 0x00 "DPLL_CTRL_12,DPLL control register 12" bitfld.long 0x00 16. "WSUBINC_MUX_SEL,Write enable for DPLL_CTRL_12.SUBINC_MUX_SEL" "0,1" bitfld.long 0x00 0. "SUBINC_MUX_SEL,Selection of DPLL sub increment source for CCM[0]_TBU_TS1 angle base" "0,1" group.long ad:0x9480C000++0x03 "DPLL_RR2 - array[4096]" line.long 0x00 "DPLL_RR2[0],DPLL memory RR2" button "DATA" "d ad:0x09480C000++0x000003FFF /long" group.long ad:0x94810000++0x03 "MCS0_MEM - array[6144]" line.long 0x00 "MCS0_MEM[0],MCS[i] memory region" button "DATA" "d ad:0x094810000++0x000005FFF /long" tree.end tree "GTM_CLS1" group.long ad:0x94820680++0x07 line.long 0x00 "MON_STATUS,MON status register" rbitfld.long 0x00 23. "MCS3_ERR,Error detected at MCS[j]" "0,1" rbitfld.long 0x00 22. "MCS2_ERR,Error detected at MCS[j]" "0,1" rbitfld.long 0x00 21. "MCS1_ERR,Error detected at MCS[j]" "0,1" newline rbitfld.long 0x00 20. "MCS0_ERR,Error detected at MCS[j]" "0,1" rbitfld.long 0x00 16. "CMP_ERR,Error detected at CMP" "0,1" bitfld.long 0x00 14. "ACT_CMU8,CCM[1]_CLK_RES[8:8] activity" "0,1" newline bitfld.long 0x00 12. "ACT_CMUFX4,CCM[1]_FXCLK_RES activity" "0,1" bitfld.long 0x00 11. "ACT_CMUFX3,CCM[1]_FXCLK_RES activity" "0,1" bitfld.long 0x00 10. "ACT_CMUFX2,CCM[1]_FXCLK_RES activity" "0,1" newline bitfld.long 0x00 9. "ACT_CMUFX1,CCM[1]_FXCLK_RES activity" "0,1" bitfld.long 0x00 8. "ACT_CMUFX0,CCM[1]_FXCLK_RES activity" "0,1" bitfld.long 0x00 7. "ACT_CMU7,CCM[1]_CLK_RES activity" "0,1" newline bitfld.long 0x00 6. "ACT_CMU6,CCM[1]_CLK_RES activity" "0,1" bitfld.long 0x00 5. "ACT_CMU5,CCM[1]_CLK_RES activity" "0,1" bitfld.long 0x00 4. "ACT_CMU4,CCM[1]_CLK_RES activity" "0,1" newline bitfld.long 0x00 3. "ACT_CMU3,CCM[1]_CLK_RES activity" "0,1" bitfld.long 0x00 2. "ACT_CMU2,CCM[1]_CLK_RES activity" "0,1" bitfld.long 0x00 1. "ACT_CMU1,CCM[1]_CLK_RES activity" "0,1" newline bitfld.long 0x00 0. "ACT_CMU0,CCM[1]_CLK_RES activity" "0,1" line.long 0x04 "MON_ACTIVITY_0,MON activity register 0" bitfld.long 0x04 31. "MCA_3_7,Activity of check performed in module MCS3 at channel [x]" "0,1" bitfld.long 0x04 30. "MCA_3_6,Activity of check performed in module MCS3 at channel [x]" "0,1" bitfld.long 0x04 29. "MCA_3_5,Activity of check performed in module MCS3 at channel [x]" "0,1" newline bitfld.long 0x04 28. "MCA_3_4,Activity of check performed in module MCS3 at channel [x]" "0,1" bitfld.long 0x04 27. "MCA_3_3,Activity of check performed in module MCS3 at channel [x]" "0,1" bitfld.long 0x04 26. "MCA_3_2,Activity of check performed in module MCS3 at channel [x]" "0,1" newline bitfld.long 0x04 25. "MCA_3_1,Activity of check performed in module MCS3 at channel [x]" "0,1" bitfld.long 0x04 24. "MCA_3_0,Activity of check performed in module MCS3 at channel [x]" "0,1" bitfld.long 0x04 23. "MCA_2_7,Activity of check performed in module MCS2 at channel [x]" "0,1" newline bitfld.long 0x04 22. "MCA_2_6,Activity of check performed in module MCS2 at channel [x]" "0,1" bitfld.long 0x04 21. "MCA_2_5,Activity of check performed in module MCS2 at channel [x]" "0,1" bitfld.long 0x04 20. "MCA_2_4,Activity of check performed in module MCS2 at channel [x]" "0,1" newline bitfld.long 0x04 19. "MCA_2_3,Activity of check performed in module MCS2 at channel [x]" "0,1" bitfld.long 0x04 18. "MCA_2_2,Activity of check performed in module MCS2 at channel [x]" "0,1" bitfld.long 0x04 17. "MCA_2_1,Activity of check performed in module MCS2 at channel [x]" "0,1" newline bitfld.long 0x04 16. "MCA_2_0,Activity of check performed in module MCS2 at channel [x]" "0,1" bitfld.long 0x04 15. "MCA_1_7,Activity of check performed in module MCS1 at channel [x]" "0,1" bitfld.long 0x04 14. "MCA_1_6,Activity of check performed in module MCS1 at channel [x]" "0,1" newline bitfld.long 0x04 13. "MCA_1_5,Activity of check performed in module MCS1 at channel [x]" "0,1" bitfld.long 0x04 12. "MCA_1_4,Activity of check performed in module MCS1 at channel [x]" "0,1" bitfld.long 0x04 11. "MCA_1_3,Activity of check performed in module MCS1 at channel [x]" "0,1" newline bitfld.long 0x04 10. "MCA_1_2,Activity of check performed in module MCS1 at channel [x]" "0,1" bitfld.long 0x04 9. "MCA_1_1,Activity of check performed in module MCS1 at channel [x]" "0,1" bitfld.long 0x04 8. "MCA_1_0,Activity of check performed in module MCS1 at channel [x]" "0,1" newline bitfld.long 0x04 7. "MCA_0_7,Activity of check performed in module MCS0 at channel [x]" "0,1" bitfld.long 0x04 6. "MCA_0_6,Activity of check performed in module MCS0 at channel [x]" "0,1" bitfld.long 0x04 5. "MCA_0_5,Activity of check performed in module MCS0 at channel [x]" "0,1" newline bitfld.long 0x04 4. "MCA_0_4,Activity of check performed in module MCS0 at channel [x]" "0,1" bitfld.long 0x04 3. "MCA_0_3,Activity of check performed in module MCS0 at channel [x]" "0,1" bitfld.long 0x04 2. "MCA_0_2,Activity of check performed in module MCS0 at channel [x]" "0,1" newline bitfld.long 0x04 1. "MCA_0_1,Activity of check performed in module MCS0 at channel [x]" "0,1" bitfld.long 0x04 0. "MCA_0_0,Activity of check performed in module MCS0 at channel [x]" "0,1" group.long ad:0x9482068C++0x0F line.long 0x00 "MON_ACTIVITY_MCS0,MON activity register for MCS [j]" bitfld.long 0x00 7. "MCA_7,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x00 6. "MCA_6,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x00 5. "MCA_5,Activity of check performed in module MCS [j] at channel [x]" "0,1" newline bitfld.long 0x00 4. "MCA_4,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x00 3. "MCA_3,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x00 2. "MCA_2,Activity of check performed in module MCS [j] at channel [x]" "0,1" newline bitfld.long 0x00 1. "MCA_1,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x00 0. "MCA_0,Activity of check performed in module MCS [j] at channel [x]" "0,1" line.long 0x04 "MON_ACTIVITY_MCS1,MON activity register for MCS [j]" bitfld.long 0x04 7. "MCA_7,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x04 6. "MCA_6,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x04 5. "MCA_5,Activity of check performed in module MCS [j] at channel [x]" "0,1" newline bitfld.long 0x04 4. "MCA_4,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x04 3. "MCA_3,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x04 2. "MCA_2,Activity of check performed in module MCS [j] at channel [x]" "0,1" newline bitfld.long 0x04 1. "MCA_1,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x04 0. "MCA_0,Activity of check performed in module MCS [j] at channel [x]" "0,1" line.long 0x08 "MON_ACTIVITY_MCS2,MON activity register for MCS [j]" bitfld.long 0x08 7. "MCA_7,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x08 6. "MCA_6,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x08 5. "MCA_5,Activity of check performed in module MCS [j] at channel [x]" "0,1" newline bitfld.long 0x08 4. "MCA_4,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x08 3. "MCA_3,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x08 2. "MCA_2,Activity of check performed in module MCS [j] at channel [x]" "0,1" newline bitfld.long 0x08 1. "MCA_1,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x08 0. "MCA_0,Activity of check performed in module MCS [j] at channel [x]" "0,1" line.long 0x0C "MON_ACTIVITY_MCS3,MON activity register for MCS [j]" bitfld.long 0x0C 7. "MCA_7,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x0C 6. "MCA_6,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x0C 5. "MCA_5,Activity of check performed in module MCS [j] at channel [x]" "0,1" newline bitfld.long 0x0C 4. "MCA_4,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x0C 3. "MCA_3,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x0C 2. "MCA_2,Activity of check performed in module MCS [j] at channel [x]" "0,1" newline bitfld.long 0x0C 1. "MCA_1,Activity of check performed in module MCS [j] at channel [x]" "0,1" bitfld.long 0x0C 0. "MCA_0,Activity of check performed in module MCS [j] at channel [x]" "0,1" group.long ad:0x948206C0++0x17 line.long 0x00 "CMP_EN,CMP comparator enable register" bitfld.long 0x00 23. "TBWC11_EN,Enable comparator channel [c] in TBWC" "0,1" bitfld.long 0x00 22. "TBWC10_EN,Enable comparator channel [c] in TBWC" "0,1" bitfld.long 0x00 21. "TBWC9_EN,Enable comparator channel [c] in TBWC" "0,1" newline bitfld.long 0x00 20. "TBWC8_EN,Enable comparator channel [c] in TBWC" "0,1" bitfld.long 0x00 19. "TBWC7_EN,Enable comparator channel [c] in TBWC" "0,1" bitfld.long 0x00 18. "TBWC6_EN,Enable comparator channel [c] in TBWC" "0,1" newline bitfld.long 0x00 17. "TBWC5_EN,Enable comparator channel [c] in TBWC" "0,1" bitfld.long 0x00 16. "TBWC4_EN,Enable comparator channel [c] in TBWC" "0,1" bitfld.long 0x00 15. "TBWC3_EN,Enable comparator channel [c] in TBWC" "0,1" newline bitfld.long 0x00 14. "TBWC2_EN,Enable comparator channel [c] in TBWC" "0,1" bitfld.long 0x00 13. "TBWC1_EN,Enable comparator channel [c] in TBWC" "0,1" bitfld.long 0x00 12. "TBWC0_EN,Enable comparator channel [c] in TBWC" "0,1" newline bitfld.long 0x00 11. "ABWC11_EN,Enable comparator channel [c] in ABWC" "0,1" bitfld.long 0x00 10. "ABWC10_EN,Enable comparator channel [c] in ABWC" "0,1" bitfld.long 0x00 9. "ABWC9_EN,Enable comparator channel [c] in ABWC" "0,1" newline bitfld.long 0x00 8. "ABWC8_EN,Enable comparator channel [c] in ABWC" "0,1" bitfld.long 0x00 7. "ABWC7_EN,Enable comparator channel [c] in ABWC" "0,1" bitfld.long 0x00 6. "ABWC6_EN,Enable comparator channel [c] in ABWC" "0,1" newline bitfld.long 0x00 5. "ABWC5_EN,Enable comparator channel [c] in ABWC" "0,1" bitfld.long 0x00 4. "ABWC4_EN,Enable comparator channel [c] in ABWC" "0,1" bitfld.long 0x00 3. "ABWC3_EN,Enable comparator channel [c] in ABWC" "0,1" newline bitfld.long 0x00 2. "ABWC2_EN,Enable comparator channel [c] in ABWC" "0,1" bitfld.long 0x00 1. "ABWC1_EN,Enable comparator channel [c] in ABWC" "0,1" bitfld.long 0x00 0. "ABWC0_EN,Enable comparator channel [c] in ABWC" "0,1" line.long 0x04 "CMP_IRQ_NOTIFY,CMP event notification register" bitfld.long 0x04 23. "TBWC11,TOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 22. "TBWC10,TOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 21. "TBWC9,TOM sub-modules output bitwise comparator [c] error indication" "0,1" newline bitfld.long 0x04 20. "TBWC8,TOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 19. "TBWC7,TOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 18. "TBWC6,TOM sub-modules output bitwise comparator [c] error indication" "0,1" newline bitfld.long 0x04 17. "TBWC5,TOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 16. "TBWC4,TOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 15. "TBWC3,TOM sub-modules output bitwise comparator [c] error indication" "0,1" newline bitfld.long 0x04 14. "TBWC2,TOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 13. "TBWC1,TOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 12. "TBWC0,TOM sub-modules output bitwise comparator [c] error indication" "0,1" newline bitfld.long 0x04 11. "ABWC11,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 10. "ABWC10,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 9. "ABWC9,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" newline bitfld.long 0x04 8. "ABWC8,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 7. "ABWC7,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 6. "ABWC6,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" newline bitfld.long 0x04 5. "ABWC5,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 4. "ABWC4,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 3. "ABWC3,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" newline bitfld.long 0x04 2. "ABWC2,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 1. "ABWC1,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" bitfld.long 0x04 0. "ABWC0,ATOM sub-modules output bitwise comparator [c] error indication" "0,1" line.long 0x08 "CMP_IRQ_EN,CMP interrupt enable register" bitfld.long 0x08 23. "TBWC11_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 22. "TBWC10_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 21. "TBWC9_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" newline bitfld.long 0x08 20. "TBWC8_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 19. "TBWC7_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 18. "TBWC6_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" newline bitfld.long 0x08 17. "TBWC5_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 16. "TBWC4_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 15. "TBWC3_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" newline bitfld.long 0x08 14. "TBWC2_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 13. "TBWC1_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 12. "TBWC0_EN_IRQ,Enable CMP_IRQ_NOTIFY.TBWC[c] interrupt source for CMP_IRQ line" "0,1" newline bitfld.long 0x08 11. "ABWC11_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 10. "ABWC10_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 9. "ABWC9_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" newline bitfld.long 0x08 8. "ABWC8_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 7. "ABWC7_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 6. "ABWC6_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" newline bitfld.long 0x08 5. "ABWC5_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 4. "ABWC4_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 3. "ABWC3_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" newline bitfld.long 0x08 2. "ABWC2_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 1. "ABWC1_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" bitfld.long 0x08 0. "ABWC0_EN_IRQ,Enable CMP_IRQ_NOTIFY.ABWC[c] interrupt source for CMP_IRQ line" "0,1" line.long 0x0C "CMP_IRQ_FORCINT,CMP interrupt force register" bitfld.long 0x0C 23. "TRG_TBWC11,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" bitfld.long 0x0C 22. "TRG_TBWC10,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" bitfld.long 0x0C 21. "TRG_TBWC9,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" newline bitfld.long 0x0C 20. "TRG_TBWC8,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" bitfld.long 0x0C 19. "TRG_TBWC7,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" bitfld.long 0x0C 18. "TRG_TBWC6,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" newline bitfld.long 0x0C 17. "TRG_TBWC5,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" bitfld.long 0x0C 16. "TRG_TBWC4,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" bitfld.long 0x0C 15. "TRG_TBWC3,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" newline bitfld.long 0x0C 14. "TRG_TBWC2,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" bitfld.long 0x0C 13. "TRG_TBWC1,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" bitfld.long 0x0C 12. "TRG_TBWC0,Trigger CMP_IRQ_NOTIFY.TBWC[c] bit by software" "0,1" newline bitfld.long 0x0C 11. "TRG_ABWC11,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" bitfld.long 0x0C 10. "TRG_ABWC10,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" bitfld.long 0x0C 9. "TRG_ABWC9,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" newline bitfld.long 0x0C 8. "TRG_ABWC8,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" bitfld.long 0x0C 7. "TRG_ABWC7,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" bitfld.long 0x0C 6. "TRG_ABWC6,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" newline bitfld.long 0x0C 5. "TRG_ABWC5,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" bitfld.long 0x0C 4. "TRG_ABWC4,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" bitfld.long 0x0C 3. "TRG_ABWC3,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" newline bitfld.long 0x0C 2. "TRG_ABWC2,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" bitfld.long 0x0C 1. "TRG_ABWC1,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" bitfld.long 0x0C 0. "TRG_ABWC0,Trigger the bit CMP_IRQ_NOTIFY.ABWC[c] bit by software" "0,1" line.long 0x10 "CMP_IRQ_MODE,CMP interrupt mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "CMP_EIRQ_EN,CMP error interrupt enable register" bitfld.long 0x14 23. "TBWC11_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 22. "TBWC10_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 21. "TBWC9_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" newline bitfld.long 0x14 20. "TBWC8_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 19. "TBWC7_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 18. "TBWC6_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" newline bitfld.long 0x14 17. "TBWC5_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 16. "TBWC4_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 15. "TBWC3_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" newline bitfld.long 0x14 14. "TBWC2_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 13. "TBWC1_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 12. "TBWC0_EN_EIRQ,Enable TBWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" newline bitfld.long 0x14 11. "ABWC11_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 10. "ABWC10_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 9. "ABWC9_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" newline bitfld.long 0x14 8. "ABWC8_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 7. "ABWC7_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 6. "ABWC6_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" newline bitfld.long 0x14 5. "ABWC5_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 4. "ABWC4_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 3. "ABWC3_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" newline bitfld.long 0x14 2. "ABWC2_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 1. "ABWC1_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" bitfld.long 0x14 0. "ABWC0_EN_EIRQ,Enable ABWC comparator [c] interrupt source for CMP_EIRQ line" "0,1" group.long ad:0x94820800++0x07 line.long 0x00 "TIM1_CH0_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM1_CH0_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94820808++0x07 line.long 0x00 "TIM1_CH0_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM1_CH0_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94820810++0x2F line.long 0x00 "TIM1_CH0_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM1_CH0_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM1_CH0_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM1_CH0_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM1_CH0_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM1_CH0_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM1_CH0_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM1_CH0_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM1_CH0_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM1_CH0_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM1_CH0_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM1_CH0_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94820880++0x07 line.long 0x00 "TIM1_CH1_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM1_CH1_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94820888++0x07 line.long 0x00 "TIM1_CH1_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM1_CH1_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94820890++0x2F line.long 0x00 "TIM1_CH1_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM1_CH1_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM1_CH1_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM1_CH1_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM1_CH1_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM1_CH1_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM1_CH1_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM1_CH1_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM1_CH1_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM1_CH1_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM1_CH1_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM1_CH1_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94820900++0x07 line.long 0x00 "TIM1_CH2_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM1_CH2_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94820908++0x07 line.long 0x00 "TIM1_CH2_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM1_CH2_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94820910++0x2F line.long 0x00 "TIM1_CH2_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM1_CH2_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM1_CH2_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM1_CH2_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM1_CH2_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM1_CH2_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM1_CH2_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM1_CH2_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM1_CH2_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM1_CH2_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM1_CH2_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM1_CH2_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94820980++0x07 line.long 0x00 "TIM1_CH3_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM1_CH3_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94820988++0x07 line.long 0x00 "TIM1_CH3_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM1_CH3_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94820990++0x2F line.long 0x00 "TIM1_CH3_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM1_CH3_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM1_CH3_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM1_CH3_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM1_CH3_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM1_CH3_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM1_CH3_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM1_CH3_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM1_CH3_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM1_CH3_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM1_CH3_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM1_CH3_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94820A00++0x07 line.long 0x00 "TIM1_CH4_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM1_CH4_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94820A08++0x07 line.long 0x00 "TIM1_CH4_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM1_CH4_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94820A10++0x2F line.long 0x00 "TIM1_CH4_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM1_CH4_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM1_CH4_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM1_CH4_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM1_CH4_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM1_CH4_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM1_CH4_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM1_CH4_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM1_CH4_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM1_CH4_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM1_CH4_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM1_CH4_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94820A80++0x07 line.long 0x00 "TIM1_CH5_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM1_CH5_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94820A88++0x07 line.long 0x00 "TIM1_CH5_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM1_CH5_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94820A90++0x2F line.long 0x00 "TIM1_CH5_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM1_CH5_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM1_CH5_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM1_CH5_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM1_CH5_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM1_CH5_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM1_CH5_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM1_CH5_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM1_CH5_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM1_CH5_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM1_CH5_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM1_CH5_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94820B00++0x07 line.long 0x00 "TIM1_CH6_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM1_CH6_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94820B08++0x07 line.long 0x00 "TIM1_CH6_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM1_CH6_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94820B10++0x2F line.long 0x00 "TIM1_CH6_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM1_CH6_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM1_CH6_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM1_CH6_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM1_CH6_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM1_CH6_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM1_CH6_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM1_CH6_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM1_CH6_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM1_CH6_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM1_CH6_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM1_CH6_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94820B80++0x07 line.long 0x00 "TIM1_CH7_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM1_CH7_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94820B88++0x07 line.long 0x00 "TIM1_CH7_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM1_CH7_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94820B90++0x2F line.long 0x00 "TIM1_CH7_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM1_CH7_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM1_CH7_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM1_CH7_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM1_CH7_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM1_CH7_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM1_CH7_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM1_CH7_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM1_CH7_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM1_CH7_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM1_CH7_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM1_CH7_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" rgroup.long ad:0x94820C00++0x03 line.long 0x00 "TIM1_INP_VAL,TIM[i] input value observation register" bitfld.long 0x00 23. "TIM_IN7,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 22. "TIM_IN6,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 21. "TIM_IN5,Signal channel [x] after TIM input signal synchronization" "0,1" newline bitfld.long 0x00 20. "TIM_IN4,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 19. "TIM_IN3,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 18. "TIM_IN2,Signal channel [x] after TIM input signal synchronization" "0,1" newline bitfld.long 0x00 17. "TIM_IN1,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 16. "TIM_IN0,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 15. "F_IN7,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" newline bitfld.long 0x00 14. "F_IN6,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 13. "F_IN5,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 12. "F_IN4,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" newline bitfld.long 0x00 11. "F_IN3,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 10. "F_IN2,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 9. "F_IN1,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" newline bitfld.long 0x00 8. "F_IN0,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 7. "F_OUT7,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 6. "F_OUT6,Signal channel [x] after TIM FLT unit" "0,1" newline bitfld.long 0x00 5. "F_OUT5,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 4. "F_OUT4,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 3. "F_OUT3,Signal channel [x] after TIM FLT unit" "0,1" newline bitfld.long 0x00 2. "F_OUT2,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 1. "F_OUT1,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 0. "F_OUT0,Signal channel [x] after TIM FLT unit" "0,1" group.long ad:0x94820C04++0x07 line.long 0x00 "TIM1_IN_SRC,TIM[i] AUX IN source selection register" bitfld.long 0x00 30.--31. "MODE_7,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 28.--29. "VAL_7,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 26.--27. "MODE_6,Input source to channel [x]" "0,1,2,3" newline bitfld.long 0x00 24.--25. "VAL_6,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 22.--23. "MODE_5,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 20.--21. "VAL_5,Value to be fed to channel [x]" "0,1,2,3" newline bitfld.long 0x00 18.--19. "MODE_4,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 16.--17. "VAL_4,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 14.--15. "MODE_3,Input source to channel [x]" "0,1,2,3" newline bitfld.long 0x00 12.--13. "VAL_3,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 10.--11. "MODE_2,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 8.--9. "VAL_2,Value to be fed to channel [x]" "0,1,2,3" newline bitfld.long 0x00 6.--7. "MODE_1,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 4.--5. "VAL_1,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 2.--3. "MODE_0,Input source to channel [x]" "0,1,2,3" newline bitfld.long 0x00 0.--1. "VAL_0,Value to be fed to channel [x]" "0,1,2,3" line.long 0x04 "TIM1_RST,TIM[i] global software reset register" bitfld.long 0x04 7. "RST_CH7,Software reset of channel [x]" "0,1" bitfld.long 0x04 6. "RST_CH6,Software reset of channel [x]" "0,1" bitfld.long 0x04 5. "RST_CH5,Software reset of channel [x]" "0,1" newline bitfld.long 0x04 4. "RST_CH4,Software reset of channel [x]" "0,1" bitfld.long 0x04 3. "RST_CH3,Software reset of channel [x]" "0,1" bitfld.long 0x04 2. "RST_CH2,Software reset of channel [x]" "0,1" newline bitfld.long 0x04 1. "RST_CH1,Software reset of channel [x]" "0,1" bitfld.long 0x04 0. "RST_CH0,Software reset of channel [x]" "0,1" group.long ad:0x94821000++0x33 line.long 0x00 "TOM1_CH0_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH0_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH0_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH0_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH0_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH0_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH0_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH0_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH0_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH0_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH0_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH0_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH0_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821040++0x33 line.long 0x00 "TOM1_CH1_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH1_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH1_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH1_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH1_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH1_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH1_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH1_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH1_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH1_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH1_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH1_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH1_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821080++0x33 line.long 0x00 "TOM1_CH2_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH2_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH2_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH2_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH2_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH2_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH2_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH2_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH2_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH2_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH2_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH2_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH2_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948210C0++0x33 line.long 0x00 "TOM1_CH3_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH3_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH3_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH3_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH3_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH3_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH3_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH3_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH3_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH3_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH3_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH3_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH3_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821100++0x33 line.long 0x00 "TOM1_CH4_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH4_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH4_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH4_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH4_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH4_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH4_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH4_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH4_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH4_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH4_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH4_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH4_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821140++0x33 line.long 0x00 "TOM1_CH5_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH5_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH5_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH5_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH5_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH5_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH5_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH5_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH5_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH5_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH5_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH5_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH5_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821180++0x33 line.long 0x00 "TOM1_CH6_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH6_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH6_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH6_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH6_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH6_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH6_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH6_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH6_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH6_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH6_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH6_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH6_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948211C0++0x33 line.long 0x00 "TOM1_CH7_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH7_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH7_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH7_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH7_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH7_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH7_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH7_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH7_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH7_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH7_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH7_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH7_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821200++0x33 line.long 0x00 "TOM1_CH8_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" newline bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" newline bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" newline bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH8_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH8_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH8_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH8_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH8_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH8_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH8_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH8_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH8_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH8_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH8_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH8_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821240++0x33 line.long 0x00 "TOM1_CH9_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" newline bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" newline bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" newline bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH9_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH9_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH9_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH9_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH9_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH9_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH9_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH9_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH9_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH9_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH9_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH9_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821280++0x33 line.long 0x00 "TOM1_CH10_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH10_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH10_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH10_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH10_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH10_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH10_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH10_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH10_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH10_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH10_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH10_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH10_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948212C0++0x33 line.long 0x00 "TOM1_CH11_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH11_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH11_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH11_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH11_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH11_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH11_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH11_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH11_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH11_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH11_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH11_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH11_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821300++0x33 line.long 0x00 "TOM1_CH12_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH12_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH12_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH12_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH12_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH12_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH12_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH12_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH12_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH12_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH12_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH12_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH12_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821340++0x33 line.long 0x00 "TOM1_CH13_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH13_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH13_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH13_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH13_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH13_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH13_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH13_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH13_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH13_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH13_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH13_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH13_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821380++0x33 line.long 0x00 "TOM1_CH14_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH14_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH14_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH14_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH14_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH14_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH14_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH14_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH14_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH14_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH14_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH14_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH14_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948213C0++0x33 line.long 0x00 "TOM1_CH15_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 27. "BITREV,Bit-reversing of output of counter TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" newline bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" newline bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" newline bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM1_CH15_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM1_CH15_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM1_CH15_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM1_CH15_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM1_CH15_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM1_CH15_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM1_CH15_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM1_CH15_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM1_CH15_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM1_CH15_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x2C "TOM1_CH15_CTRL2,TOM[i] channel [x] control register" bitfld.long 0x2C 0. "HRES,TOM[i] high resolution support" "0,1" line.long 0x30 "TOM1_CH15_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x30 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821430++0x0F line.long 0x00 "TOM1_TGC0_GLB_CTRL,TOM[i] TGC [g] global control register" bitfld.long 0x00 30.--31. "UPEN_CTRL7,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 28.--29. "UPEN_CTRL6,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 26.--27. "UPEN_CTRL5,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 24.--25. "UPEN_CTRL4,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 22.--23. "UPEN_CTRL3,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 20.--21. "UPEN_CTRL2,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 18.--19. "UPEN_CTRL1,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 16.--17. "UPEN_CTRL0,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 15. "RST_CH7,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 14. "RST_CH6,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 13. "RST_CH5,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 12. "RST_CH4,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 11. "RST_CH3,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 10. "RST_CH2,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 9. "RST_CH1,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 8. "RST_CH0,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 0. "HOST_TRIG,Trigger request signal to update the register TOM[i]_TGC[g]_ENDIS_STAT TOM[i]_TGC[g]_OUTEN_STAT" "0,1" line.long 0x04 "TOM1_TGC0_ACT_TB,TOM[i] TGC [g] action time base register" bitfld.long 0x04 25.--26. "TBU_SEL,Selection of time base used for comparison" "0,1,2,3" bitfld.long 0x04 24. "TB_TRIG,Set trigger request" "0,1" hexmask.long.tbyte 0x04 0.--23. 1. "ACT_TB,Specifies the signed compare value with selected signal CCM[i]_TBU_TS0 CCM[i]_TBU_TS1 and CCM[i]_TBU_TS2" line.long 0x08 "TOM1_TGC0_FUPD_CTRL,TOM[i] TGC [g] force update control register" bitfld.long 0x08 30.--31. "RSTCN0_CH7,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 28.--29. "RSTCN0_CH6,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 26.--27. "RSTCN0_CH5,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 24.--25. "RSTCN0_CH4,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 22.--23. "RSTCN0_CH3,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 20.--21. "RSTCN0_CH2,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 18.--19. "RSTCN0_CH1,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 16.--17. "RSTCN0_CH0,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 14.--15. "FUPD_CTRL7,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 12.--13. "FUPD_CTRL6,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 10.--11. "FUPD_CTRL5,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 8.--9. "FUPD_CTRL4,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 6.--7. "FUPD_CTRL3,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 4.--5. "FUPD_CTRL2,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 2.--3. "FUPD_CTRL1,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 0.--1. "FUPD_CTRL0,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" line.long 0x0C "TOM1_TGC0_INT_TRIG,TOM[i] TGC [g] internal trigger control register" bitfld.long 0x0C 14.--15. "INT_TRIG7,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 12.--13. "INT_TRIG6,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 10.--11. "INT_TRIG5,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "INT_TRIG4,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 6.--7. "INT_TRIG3,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 4.--5. "INT_TRIG2,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "INT_TRIG1,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 0.--1. "INT_TRIG0,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" group.long ad:0x94821470++0x0F line.long 0x00 "TOM1_TGC0_ENDIS_CTRL,TOM[i] TGC [g] enable/disable control register" bitfld.long 0x00 14.--15. "ENDIS_CTRL7,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 12.--13. "ENDIS_CTRL6,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 10.--11. "ENDIS_CTRL5,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 8.--9. "ENDIS_CTRL4,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 6.--7. "ENDIS_CTRL3,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 4.--5. "ENDIS_CTRL2,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 2.--3. "ENDIS_CTRL1,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 0.--1. "ENDIS_CTRL0,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" line.long 0x04 "TOM1_TGC0_ENDIS_STAT,TOM[i] TGC [g] enable/disable status register" bitfld.long 0x04 14.--15. "ENDIS_STAT7,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 12.--13. "ENDIS_STAT6,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 10.--11. "ENDIS_STAT5,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 8.--9. "ENDIS_STAT4,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 6.--7. "ENDIS_STAT3,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 4.--5. "ENDIS_STAT2,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 2.--3. "ENDIS_STAT1,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 0.--1. "ENDIS_STAT0,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" line.long 0x08 "TOM1_TGC0_OUTEN_CTRL,TOM[i] TGC [g] output enable control register" bitfld.long 0x08 14.--15. "OUTEN_CTRL7,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 12.--13. "OUTEN_CTRL6,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 10.--11. "OUTEN_CTRL5,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 8.--9. "OUTEN_CTRL4,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 6.--7. "OUTEN_CTRL3,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 4.--5. "OUTEN_CTRL2,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 2.--3. "OUTEN_CTRL1,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 0.--1. "OUTEN_CTRL0,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" line.long 0x0C "TOM1_TGC0_OUTEN_STAT,TOM[i] TGC [g] output enable status register" bitfld.long 0x0C 14.--15. "OUTEN_STAT7,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 12.--13. "OUTEN_STAT6,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 10.--11. "OUTEN_STAT5,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "OUTEN_STAT4,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 6.--7. "OUTEN_STAT3,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 4.--5. "OUTEN_STAT2,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "OUTEN_STAT1,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 0.--1. "OUTEN_STAT0,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" group.long ad:0x948214B0++0x0F line.long 0x00 "TOM1_TGC1_GLB_CTRL,TOM[i] TGC [g] global control register" bitfld.long 0x00 30.--31. "UPEN_CTRL7,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 28.--29. "UPEN_CTRL6,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 26.--27. "UPEN_CTRL5,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 24.--25. "UPEN_CTRL4,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 22.--23. "UPEN_CTRL3,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 20.--21. "UPEN_CTRL2,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 18.--19. "UPEN_CTRL1,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 16.--17. "UPEN_CTRL0,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 15. "RST_CH7,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 14. "RST_CH6,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 13. "RST_CH5,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 12. "RST_CH4,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 11. "RST_CH3,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 10. "RST_CH2,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 9. "RST_CH1,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 8. "RST_CH0,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 0. "HOST_TRIG,Trigger request signal to update the register TOM[i]_TGC[g]_ENDIS_STAT TOM[i]_TGC[g]_OUTEN_STAT" "0,1" line.long 0x04 "TOM1_TGC1_ACT_TB,TOM[i] TGC [g] action time base register" bitfld.long 0x04 25.--26. "TBU_SEL,Selection of time base used for comparison" "0,1,2,3" bitfld.long 0x04 24. "TB_TRIG,Set trigger request" "0,1" hexmask.long.tbyte 0x04 0.--23. 1. "ACT_TB,Specifies the signed compare value with selected signal CCM[i]_TBU_TS0 CCM[i]_TBU_TS1 and CCM[i]_TBU_TS2" line.long 0x08 "TOM1_TGC1_FUPD_CTRL,TOM[i] TGC [g] force update control register" bitfld.long 0x08 30.--31. "RSTCN0_CH7,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 28.--29. "RSTCN0_CH6,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 26.--27. "RSTCN0_CH5,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 24.--25. "RSTCN0_CH4,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 22.--23. "RSTCN0_CH3,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 20.--21. "RSTCN0_CH2,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 18.--19. "RSTCN0_CH1,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 16.--17. "RSTCN0_CH0,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 14.--15. "FUPD_CTRL7,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 12.--13. "FUPD_CTRL6,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 10.--11. "FUPD_CTRL5,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 8.--9. "FUPD_CTRL4,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 6.--7. "FUPD_CTRL3,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 4.--5. "FUPD_CTRL2,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 2.--3. "FUPD_CTRL1,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 0.--1. "FUPD_CTRL0,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" line.long 0x0C "TOM1_TGC1_INT_TRIG,TOM[i] TGC [g] internal trigger control register" bitfld.long 0x0C 14.--15. "INT_TRIG7,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 12.--13. "INT_TRIG6,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 10.--11. "INT_TRIG5,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "INT_TRIG4,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 6.--7. "INT_TRIG3,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 4.--5. "INT_TRIG2,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "INT_TRIG1,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 0.--1. "INT_TRIG0,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" group.long ad:0x948214F0++0x0F line.long 0x00 "TOM1_TGC1_ENDIS_CTRL,TOM[i] TGC [g] enable/disable control register" bitfld.long 0x00 14.--15. "ENDIS_CTRL7,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 12.--13. "ENDIS_CTRL6,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 10.--11. "ENDIS_CTRL5,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 8.--9. "ENDIS_CTRL4,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 6.--7. "ENDIS_CTRL3,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 4.--5. "ENDIS_CTRL2,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 2.--3. "ENDIS_CTRL1,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 0.--1. "ENDIS_CTRL0,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" line.long 0x04 "TOM1_TGC1_ENDIS_STAT,TOM[i] TGC [g] enable/disable status register" bitfld.long 0x04 14.--15. "ENDIS_STAT7,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 12.--13. "ENDIS_STAT6,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 10.--11. "ENDIS_STAT5,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 8.--9. "ENDIS_STAT4,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 6.--7. "ENDIS_STAT3,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 4.--5. "ENDIS_STAT2,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 2.--3. "ENDIS_STAT1,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 0.--1. "ENDIS_STAT0,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" line.long 0x08 "TOM1_TGC1_OUTEN_CTRL,TOM[i] TGC [g] output enable control register" bitfld.long 0x08 14.--15. "OUTEN_CTRL7,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 12.--13. "OUTEN_CTRL6,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 10.--11. "OUTEN_CTRL5,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 8.--9. "OUTEN_CTRL4,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 6.--7. "OUTEN_CTRL3,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 4.--5. "OUTEN_CTRL2,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 2.--3. "OUTEN_CTRL1,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 0.--1. "OUTEN_CTRL0,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" line.long 0x0C "TOM1_TGC1_OUTEN_STAT,TOM[i] TGC [g] output enable status register" bitfld.long 0x0C 14.--15. "OUTEN_STAT7,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 12.--13. "OUTEN_STAT6,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 10.--11. "OUTEN_STAT5,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "OUTEN_STAT4,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 6.--7. "OUTEN_STAT3,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 4.--5. "OUTEN_STAT2,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "OUTEN_STAT1,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 0.--1. "OUTEN_STAT0,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" group.long ad:0x94821800++0x37 line.long 0x00 "ATOM1_CH0_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM1_CH0_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM1_CH0_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM1_CH0_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM1_CH0_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM1_CH0_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM1_CH0_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM1_CH0_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM1_CH0_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM1_CH0_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM1_CH0_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM1_CH0_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM1_CH0_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM1_CH0_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821880++0x37 line.long 0x00 "ATOM1_CH1_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM1_CH1_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM1_CH1_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM1_CH1_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM1_CH1_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM1_CH1_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM1_CH1_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM1_CH1_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM1_CH1_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM1_CH1_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM1_CH1_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM1_CH1_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM1_CH1_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM1_CH1_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821900++0x37 line.long 0x00 "ATOM1_CH2_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM1_CH2_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM1_CH2_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM1_CH2_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM1_CH2_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM1_CH2_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM1_CH2_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM1_CH2_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM1_CH2_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM1_CH2_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM1_CH2_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM1_CH2_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM1_CH2_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM1_CH2_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821980++0x37 line.long 0x00 "ATOM1_CH3_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM1_CH3_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM1_CH3_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM1_CH3_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM1_CH3_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM1_CH3_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM1_CH3_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM1_CH3_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM1_CH3_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM1_CH3_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM1_CH3_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM1_CH3_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM1_CH3_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM1_CH3_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821A00++0x37 line.long 0x00 "ATOM1_CH4_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM1_CH4_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM1_CH4_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM1_CH4_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM1_CH4_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM1_CH4_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM1_CH4_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM1_CH4_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM1_CH4_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM1_CH4_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM1_CH4_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM1_CH4_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM1_CH4_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM1_CH4_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821A80++0x37 line.long 0x00 "ATOM1_CH5_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM1_CH5_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM1_CH5_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM1_CH5_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM1_CH5_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM1_CH5_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM1_CH5_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM1_CH5_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM1_CH5_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM1_CH5_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM1_CH5_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM1_CH5_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM1_CH5_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM1_CH5_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821B00++0x37 line.long 0x00 "ATOM1_CH6_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM1_CH6_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM1_CH6_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM1_CH6_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM1_CH6_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM1_CH6_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM1_CH6_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM1_CH6_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM1_CH6_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM1_CH6_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM1_CH6_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM1_CH6_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM1_CH6_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM1_CH6_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821B80++0x37 line.long 0x00 "ATOM1_CH7_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM1_CH7_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM1_CH7_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM1_CH7_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM1_CH7_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM1_CH7_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM1_CH7_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM1_CH7_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM1_CH7_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM1_CH7_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM1_CH7_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM1_CH7_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM1_CH7_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM1_CH7_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94821C40++0x1F line.long 0x00 "ATOM1_AGC_GLB_CTRL,ATOM[i] AGC global control register" bitfld.long 0x00 30.--31. "UPEN_CTRL7,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 28.--29. "UPEN_CTRL6,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 26.--27. "UPEN_CTRL5,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" newline bitfld.long 0x00 24.--25. "UPEN_CTRL4,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 22.--23. "UPEN_CTRL3,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 20.--21. "UPEN_CTRL2,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" newline bitfld.long 0x00 18.--19. "UPEN_CTRL1,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 16.--17. "UPEN_CTRL0,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 15. "RST_CH7,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 14. "RST_CH6,Software reset of channel [k]" "0,1" bitfld.long 0x00 13. "RST_CH5,Software reset of channel [k]" "0,1" bitfld.long 0x00 12. "RST_CH4,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 11. "RST_CH3,Software reset of channel [k]" "0,1" bitfld.long 0x00 10. "RST_CH2,Software reset of channel [k]" "0,1" bitfld.long 0x00 9. "RST_CH1,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 8. "RST_CH0,Software reset of channel [k]" "0,1" bitfld.long 0x00 0. "HOST_TRIG,Trigger request signal (see AGC) to update the register ATOM[i]_AGC_ENDIS_STAT and ATOM[i]_AGC_OUTEN_STAT" "0,1" line.long 0x04 "ATOM1_AGC_ENDIS_CTRL,ATOM[i] AGC enable/disable control register" bitfld.long 0x04 14.--15. "ENDIS_CTRL7,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 12.--13. "ENDIS_CTRL6,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 10.--11. "ENDIS_CTRL5,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" newline bitfld.long 0x04 8.--9. "ENDIS_CTRL4,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 6.--7. "ENDIS_CTRL3,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 4.--5. "ENDIS_CTRL2,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" newline bitfld.long 0x04 2.--3. "ENDIS_CTRL1,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 0.--1. "ENDIS_CTRL0,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" line.long 0x08 "ATOM1_AGC_ENDIS_STAT,ATOM[i] AGC enable/disable status register" bitfld.long 0x08 14.--15. "ENDIS_STAT7,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 12.--13. "ENDIS_STAT6,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 10.--11. "ENDIS_STAT5,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" newline bitfld.long 0x08 8.--9. "ENDIS_STAT4,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 6.--7. "ENDIS_STAT3,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 4.--5. "ENDIS_STAT2,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" newline bitfld.long 0x08 2.--3. "ENDIS_STAT1,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 0.--1. "ENDIS_STAT0,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" line.long 0x0C "ATOM1_AGC_ACT_TB,ATOM[i] AGC action time base register" bitfld.long 0x0C 25.--26. "TBU_SEL,Selection of time base used for comparison" "0,1,2,3" bitfld.long 0x0C 24. "TB_TRIG,Set trigger request" "0,1" hexmask.long.tbyte 0x0C 0.--23. 1. "ACT_TB,Specifies the signed compare value with selected signal CCM[i]_TBU_TS0/CCM[i]_TBU_TS1/CCM[i]_TBU_TS2" line.long 0x10 "ATOM1_AGC_OUTEN_CTRL,ATOM[i] AGC output enable control register" bitfld.long 0x10 14.--15. "OUTEN_CTRL7,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 12.--13. "OUTEN_CTRL6,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 10.--11. "OUTEN_CTRL5,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" newline bitfld.long 0x10 8.--9. "OUTEN_CTRL4,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 6.--7. "OUTEN_CTRL3,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 4.--5. "OUTEN_CTRL2,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" newline bitfld.long 0x10 2.--3. "OUTEN_CTRL1,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 0.--1. "OUTEN_CTRL0,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" line.long 0x14 "ATOM1_AGC_OUTEN_STAT,ATOM[i] AGC output enable status register" bitfld.long 0x14 14.--15. "OUTEN_STAT7,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 12.--13. "OUTEN_STAT6,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 10.--11. "OUTEN_STAT5,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" newline bitfld.long 0x14 8.--9. "OUTEN_STAT4,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 6.--7. "OUTEN_STAT3,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 4.--5. "OUTEN_STAT2,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" newline bitfld.long 0x14 2.--3. "OUTEN_STAT1,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 0.--1. "OUTEN_STAT0,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" line.long 0x18 "ATOM1_AGC_FUPD_CTRL,ATOM[i] AGC force update control register" bitfld.long 0x18 30.--31. "RSTCN0_CH7,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 28.--29. "RSTCN0_CH6,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 26.--27. "RSTCN0_CH5,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" newline bitfld.long 0x18 24.--25. "RSTCN0_CH4,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 22.--23. "RSTCN0_CH3,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 20.--21. "RSTCN0_CH2,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" newline bitfld.long 0x18 18.--19. "RSTCN0_CH1,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 16.--17. "RSTCN0_CH0,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 14.--15. "FUPD_CTRL7,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 12.--13. "FUPD_CTRL6,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 10.--11. "FUPD_CTRL5,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 8.--9. "FUPD_CTRL4,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 6.--7. "FUPD_CTRL3,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 4.--5. "FUPD_CTRL2,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 2.--3. "FUPD_CTRL1,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 0.--1. "FUPD_CTRL0,Force update of ATOM channel [k] operation registers" "0,1,2,3" line.long 0x1C "ATOM1_AGC_INT_TRIG,ATOM[i] AGC internal trigger control register" bitfld.long 0x1C 14.--15. "INT_TRIG7,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 12.--13. "INT_TRIG6,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 10.--11. "INT_TRIG5,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" newline bitfld.long 0x1C 8.--9. "INT_TRIG4,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 6.--7. "INT_TRIG3,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 4.--5. "INT_TRIG2,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" newline bitfld.long 0x1C 2.--3. "INT_TRIG1,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 0.--1. "INT_TRIG0,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" group.long ad:0x94822000++0x23 line.long 0x00 "MCS1_CH0_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS1_CH0_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS1_CH0_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS1_CH0_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS1_CH0_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS1_CH0_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS1_CH0_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS1_CH0_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS1_CH0_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94822024++0x03 line.long 0x00 "MCS1_CH0_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9482203C++0x03 line.long 0x00 "MCS1_CH0_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948220E0++0x17 line.long 0x00 "MCS1_CH0_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS1_CH0_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS1_CH0_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS1_CH0_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS1_CH0_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS1_CH0_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94822100++0x23 line.long 0x00 "MCS1_CH1_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS1_CH1_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS1_CH1_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS1_CH1_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS1_CH1_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS1_CH1_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS1_CH1_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS1_CH1_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS1_CH1_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94822124++0x03 line.long 0x00 "MCS1_CH1_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9482213C++0x03 line.long 0x00 "MCS1_CH1_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948221E0++0x17 line.long 0x00 "MCS1_CH1_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS1_CH1_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS1_CH1_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS1_CH1_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS1_CH1_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS1_CH1_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94822200++0x23 line.long 0x00 "MCS1_CH2_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS1_CH2_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS1_CH2_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS1_CH2_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS1_CH2_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS1_CH2_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS1_CH2_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS1_CH2_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS1_CH2_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94822224++0x03 line.long 0x00 "MCS1_CH2_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9482223C++0x03 line.long 0x00 "MCS1_CH2_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948222E0++0x17 line.long 0x00 "MCS1_CH2_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS1_CH2_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS1_CH2_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS1_CH2_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS1_CH2_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS1_CH2_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94822300++0x23 line.long 0x00 "MCS1_CH3_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS1_CH3_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS1_CH3_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS1_CH3_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS1_CH3_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS1_CH3_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS1_CH3_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS1_CH3_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS1_CH3_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94822324++0x03 line.long 0x00 "MCS1_CH3_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9482233C++0x03 line.long 0x00 "MCS1_CH3_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948223E0++0x17 line.long 0x00 "MCS1_CH3_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS1_CH3_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS1_CH3_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS1_CH3_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS1_CH3_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS1_CH3_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94822400++0x23 line.long 0x00 "MCS1_CH4_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS1_CH4_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS1_CH4_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS1_CH4_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS1_CH4_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS1_CH4_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS1_CH4_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS1_CH4_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS1_CH4_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94822424++0x03 line.long 0x00 "MCS1_CH4_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9482243C++0x03 line.long 0x00 "MCS1_CH4_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948224E0++0x17 line.long 0x00 "MCS1_CH4_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS1_CH4_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS1_CH4_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS1_CH4_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS1_CH4_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS1_CH4_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94822500++0x23 line.long 0x00 "MCS1_CH5_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS1_CH5_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS1_CH5_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS1_CH5_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS1_CH5_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS1_CH5_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS1_CH5_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS1_CH5_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS1_CH5_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94822524++0x03 line.long 0x00 "MCS1_CH5_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9482253C++0x03 line.long 0x00 "MCS1_CH5_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948225E0++0x17 line.long 0x00 "MCS1_CH5_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS1_CH5_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS1_CH5_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS1_CH5_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS1_CH5_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS1_CH5_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94822600++0x23 line.long 0x00 "MCS1_CH6_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS1_CH6_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS1_CH6_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS1_CH6_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS1_CH6_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS1_CH6_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS1_CH6_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS1_CH6_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS1_CH6_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94822624++0x03 line.long 0x00 "MCS1_CH6_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9482263C++0x03 line.long 0x00 "MCS1_CH6_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948226E0++0x17 line.long 0x00 "MCS1_CH6_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS1_CH6_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS1_CH6_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS1_CH6_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS1_CH6_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS1_CH6_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94822700++0x23 line.long 0x00 "MCS1_CH7_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS1_CH7_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS1_CH7_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS1_CH7_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS1_CH7_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS1_CH7_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS1_CH7_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS1_CH7_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS1_CH7_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94822724++0x03 line.long 0x00 "MCS1_CH7_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9482273C++0x03 line.long 0x00 "MCS1_CH7_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948227E0++0x17 line.long 0x00 "MCS1_CH7_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS1_CH7_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS1_CH7_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS1_CH7_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS1_CH7_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS1_CH7_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94822E28++0x07 line.long 0x00 "MCS1_CTRG,MCS[i] clear trigger control register" bitfld.long 0x00 23. "TRG23,Trigger bit [o]" "0,1" bitfld.long 0x00 22. "TRG22,Trigger bit [o]" "0,1" bitfld.long 0x00 21. "TRG21,Trigger bit [o]" "0,1" newline bitfld.long 0x00 20. "TRG20,Trigger bit [o]" "0,1" bitfld.long 0x00 19. "TRG19,Trigger bit [o]" "0,1" bitfld.long 0x00 18. "TRG18,Trigger bit [o]" "0,1" newline bitfld.long 0x00 17. "TRG17,Trigger bit [o]" "0,1" bitfld.long 0x00 16. "TRG16,Trigger bit [o]" "0,1" bitfld.long 0x00 15. "TRG15,Trigger bit [n]" "0,1" newline bitfld.long 0x00 14. "TRG14,Trigger bit [n]" "0,1" bitfld.long 0x00 13. "TRG13,Trigger bit [n]" "0,1" bitfld.long 0x00 12. "TRG12,Trigger bit [n]" "0,1" newline bitfld.long 0x00 11. "TRG11,Trigger bit [n]" "0,1" bitfld.long 0x00 10. "TRG10,Trigger bit [n]" "0,1" bitfld.long 0x00 9. "TRG9,Trigger bit [n]" "0,1" newline bitfld.long 0x00 8. "TRG8,Trigger bit [n]" "0,1" bitfld.long 0x00 7. "TRG7,Trigger bit [m]" "0,1" bitfld.long 0x00 6. "TRG6,Trigger bit [m]" "0,1" newline bitfld.long 0x00 5. "TRG5,Trigger bit [m]" "0,1" bitfld.long 0x00 4. "TRG4,Trigger bit [m]" "0,1" bitfld.long 0x00 3. "TRG3,Trigger bit [m]" "0,1" newline bitfld.long 0x00 2. "TRG2,Trigger bit [m]" "0,1" bitfld.long 0x00 1. "TRG1,Trigger bit [m]" "0,1" bitfld.long 0x00 0. "TRG0,Trigger bit [m]" "0,1" line.long 0x04 "MCS1_STRG,MCS[i] set trigger control register" bitfld.long 0x04 23. "TRG23,Trigger bit [k]" "0,1" bitfld.long 0x04 22. "TRG22,Trigger bit [k]" "0,1" bitfld.long 0x04 21. "TRG21,Trigger bit [k]" "0,1" newline bitfld.long 0x04 20. "TRG20,Trigger bit [k]" "0,1" bitfld.long 0x04 19. "TRG19,Trigger bit [k]" "0,1" bitfld.long 0x04 18. "TRG18,Trigger bit [k]" "0,1" newline bitfld.long 0x04 17. "TRG17,Trigger bit [k]" "0,1" bitfld.long 0x04 16. "TRG16,Trigger bit [k]" "0,1" bitfld.long 0x04 15. "TRG15,Trigger bit [k]" "0,1" newline bitfld.long 0x04 14. "TRG14,Trigger bit [k]" "0,1" bitfld.long 0x04 13. "TRG13,Trigger bit [k]" "0,1" bitfld.long 0x04 12. "TRG12,Trigger bit [k]" "0,1" newline bitfld.long 0x04 11. "TRG11,Trigger bit [k]" "0,1" bitfld.long 0x04 10. "TRG10,Trigger bit [k]" "0,1" bitfld.long 0x04 9. "TRG9,Trigger bit [k]" "0,1" newline bitfld.long 0x04 8. "TRG8,Trigger bit [k]" "0,1" bitfld.long 0x04 7. "TRG7,Trigger bit [k]" "0,1" bitfld.long 0x04 6. "TRG6,Trigger bit [k]" "0,1" newline bitfld.long 0x04 5. "TRG5,Trigger bit [k]" "0,1" bitfld.long 0x04 4. "TRG4,Trigger bit [k]" "0,1" bitfld.long 0x04 3. "TRG3,Trigger bit [k]" "0,1" newline bitfld.long 0x04 2. "TRG2,Trigger bit [k]" "0,1" bitfld.long 0x04 1. "TRG1,Trigger bit [k]" "0,1" bitfld.long 0x04 0. "TRG0,Trigger bit [k]" "0,1" group.long ad:0x94822F00++0x13 line.long 0x00 "MCS1_CTRL_STAT,MCS[i] control and status register" bitfld.long 0x00 26. "HLT_AEIM_ERR,Halt on AEI bus master error" "0,1" bitfld.long 0x00 25. "EN_HVD,Enable Modified Harvard architecture" "0,1" bitfld.long 0x00 24. "EN_TIM_FOUT,Enable routing of TIM[i]_CH[x]_F_OUT signal" "0,1" newline rbitfld.long 0x00 20.--22. "ERR_SRC_ID,Error source identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16. "RAM_RST,RAM reset bit" "0,1" bitfld.long 0x00 8.--11. "SCD_CH,Channel selection for scheduling algorithm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0.--1. "SCD_MODE,Select MCS scheduling mode" "0,1,2,3" line.long 0x04 "MCS1_RESET,MCS[i] reset register" bitfld.long 0x04 7. "RST7,Software reset of channel x" "0,1" bitfld.long 0x04 6. "RST6,Software reset of channel x" "0,1" bitfld.long 0x04 5. "RST5,Software reset of channel x" "0,1" newline bitfld.long 0x04 4. "RST4,Software reset of channel x" "0,1" bitfld.long 0x04 3. "RST3,Software reset of channel x" "0,1" bitfld.long 0x04 2. "RST2,Software reset of channel x" "0,1" newline bitfld.long 0x04 1. "RST1,Software reset of channel x" "0,1" bitfld.long 0x04 0. "RST0,Software reset of channel x" "0,1" line.long 0x08 "MCS1_CAT,MCS[i] cancel ARU transfer instruction" bitfld.long 0x08 7. "CAT7,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 6. "CAT6,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 5. "CAT5,Cancel ARU transfer of channel x" "0,1" newline bitfld.long 0x08 4. "CAT4,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 3. "CAT3,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 2. "CAT2,Cancel ARU transfer of channel x" "0,1" newline bitfld.long 0x08 1. "CAT1,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 0. "CAT0,Cancel ARU transfer of channel x" "0,1" line.long 0x0C "MCS1_CWT,MCS[i] cancel waiting instruction" bitfld.long 0x0C 7. "CWT7,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 6. "CWT6,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 5. "CWT5,Cancel waiting instruction for channel x" "0,1" newline bitfld.long 0x0C 4. "CWT4,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 3. "CWT3,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 2. "CWT2,Cancel waiting instruction for channel x" "0,1" newline bitfld.long 0x0C 1. "CWT1,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 0. "CWT0,Cancel waiting instruction for channel x" "0,1" line.long 0x10 "MCS1_ERR,MCS[i] error register" bitfld.long 0x10 7. "ERR7,Error State of MCS-channel x" "0,1" bitfld.long 0x10 6. "ERR6,Error State of MCS-channel x" "0,1" bitfld.long 0x10 5. "ERR5,Error State of MCS-channel x" "0,1" newline bitfld.long 0x10 4. "ERR4,Error State of MCS-channel x" "0,1" bitfld.long 0x10 3. "ERR3,Error State of MCS-channel x" "0,1" bitfld.long 0x10 2. "ERR2,Error State of MCS-channel x" "0,1" newline bitfld.long 0x10 1. "ERR1,Error State of MCS-channel x" "0,1" bitfld.long 0x10 0. "ERR0,Error State of MCS-channel x" "0,1" group.long ad:0x94822F1C++0x13 line.long 0x00 "MCS1_REG_PROT,MCS[i] write protection register" bitfld.long 0x00 14.--15. "WPROT7,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 12.--13. "WPROT6,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 10.--11. "WPROT5,Register Write Protection of MCS-channel [x]" "0,1,2,3" newline bitfld.long 0x00 8.--9. "WPROT4,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 6.--7. "WPROT3,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 4.--5. "WPROT2,Register Write Protection of MCS-channel [x]" "0,1,2,3" newline bitfld.long 0x00 2.--3. "WPROT1,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 0.--1. "WPROT0,Register Write Protection of MCS-channel [x]" "0,1,2,3" line.long 0x04 "MCS1_SINT_IRQ_NOTIFY,MCS[i] shared interrupt notification register" bitfld.long 0x04 7. "S_IRQ7,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 6. "S_IRQ6,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 5. "S_IRQ5,Shared interrupt [k] notify flag" "0,1" newline bitfld.long 0x04 4. "S_IRQ4,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 3. "S_IRQ3,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 2. "S_IRQ2,Shared interrupt [k] notify flag" "0,1" newline bitfld.long 0x04 1. "S_IRQ1,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 0. "S_IRQ0,Shared interrupt [k] notify flag" "0,1" line.long 0x08 "MCS1_SINT_IRQ_EN,MCS[i] shared interrupt enable register" bitfld.long 0x08 7. "S_IRQ7_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 6. "S_IRQ6_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 5. "S_IRQ5_EN,Shared interrupt [k]" "0,1" newline bitfld.long 0x08 4. "S_IRQ4_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 3. "S_IRQ3_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 2. "S_IRQ2_EN,Shared interrupt [k]" "0,1" newline bitfld.long 0x08 1. "S_IRQ1_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 0. "S_IRQ0_EN,Shared interrupt [k]" "0,1" line.long 0x0C "MCS1_SINT_IRQ_FORCINT,MCS[i] force shared interrupt register" bitfld.long 0x0C 7. "TRG_S_IRQ7,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 6. "TRG_S_IRQ6,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 5. "TRG_S_IRQ5,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" newline bitfld.long 0x0C 4. "TRG_S_IRQ4,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 3. "TRG_S_IRQ3,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 2. "TRG_S_IRQ2,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" newline bitfld.long 0x0C 1. "TRG_S_IRQ1,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 0. "TRG_S_IRQ0,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" line.long 0x10 "MCS1_SINT_IRQ_MODE,MCS[i] shared interrupt mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94822F40++0x1B line.long 0x00 "MCS1_HBP0_CTRL,MCS[i] hardware break point h control register" bitfld.long 0x00 17. "NOT,Logical negation of h-th hardware break point" "0,1" bitfld.long 0x00 16. "AND,Logical AND conjunction of h-th hardware break point" "0,1" bitfld.long 0x00 12.--14. "TYPE,Define type of h-th hardware break point" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 8.--9. "SCOPE,Define scope of h-th hardware break point" "0,1,2,3" bitfld.long 0x00 7. "EN_CH7,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 6. "EN_CH6,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 5. "EN_CH5,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 4. "EN_CH4,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 3. "EN_CH3,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 2. "EN_CH2,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 1. "EN_CH1,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 0. "EN_CH0,Enable h-th hardware break point for channel x" "0,1" line.long 0x04 "MCS1_HBP0_PATTERN,MCS[i] hardware break point pattern register" line.long 0x08 "MCS1_HBP0_STATUS,MCS[i] hardware break point status register" bitfld.long 0x08 7. "HALT_CH7,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 6. "HALT_CH6,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 5. "HALT_CH5,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 4. "HALT_CH4,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 3. "HALT_CH3,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 2. "HALT_CH2,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 1. "HALT_CH1,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 0. "HALT_CH0,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" line.long 0x0C "MCS1_HBP0_IRQ_NOTIFY,MCS[i] hardware break point interrupt notification register" bitfld.long 0x0C 0. "HBP_IRQ,Interrupt notify flag of the h-th hardware break point" "0,1" line.long 0x10 "MCS1_HBP0_IRQ_EN,MCS[i] hardware break point interrupt enable register" bitfld.long 0x10 0. "HBP_IRQ_EN,Interrupt Enable bit of the h-th hardware break point" "0,1" line.long 0x14 "MCS1_HBP0_IRQ_FORCINT,MCS[i] force hardware break point interrupt register" bitfld.long 0x14 0. "TRG_HBP_IRQ,Trigger the bit MCS[i]_HBP[h]_IRQ_NOTIFY.HBP_IRQ by software" "0,1" line.long 0x18 "MCS1_HBP0_IRQ_MODE,MCS[i] break point h interrupt mode configuration register" bitfld.long 0x18 0.--1. "IRQ_MODE,IRQ mode selection for all break point interrupts" "0,1,2,3" group.long ad:0x94822F60++0x1B line.long 0x00 "MCS1_HBP1_CTRL,MCS[i] hardware break point h control register" bitfld.long 0x00 17. "NOT,Logical negation of h-th hardware break point" "0,1" bitfld.long 0x00 16. "AND,Logical AND conjunction of h-th hardware break point" "0,1" bitfld.long 0x00 12.--14. "TYPE,Define type of h-th hardware break point" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 8.--9. "SCOPE,Define scope of h-th hardware break point" "0,1,2,3" bitfld.long 0x00 7. "EN_CH7,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 6. "EN_CH6,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 5. "EN_CH5,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 4. "EN_CH4,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 3. "EN_CH3,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 2. "EN_CH2,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 1. "EN_CH1,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 0. "EN_CH0,Enable h-th hardware break point for channel x" "0,1" line.long 0x04 "MCS1_HBP1_PATTERN,MCS[i] hardware break point pattern register" line.long 0x08 "MCS1_HBP1_STATUS,MCS[i] hardware break point status register" bitfld.long 0x08 7. "HALT_CH7,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 6. "HALT_CH6,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 5. "HALT_CH5,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 4. "HALT_CH4,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 3. "HALT_CH3,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 2. "HALT_CH2,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 1. "HALT_CH1,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 0. "HALT_CH0,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" line.long 0x0C "MCS1_HBP1_IRQ_NOTIFY,MCS[i] hardware break point interrupt notification register" bitfld.long 0x0C 0. "HBP_IRQ,Interrupt notify flag of the h-th hardware break point" "0,1" line.long 0x10 "MCS1_HBP1_IRQ_EN,MCS[i] hardware break point interrupt enable register" bitfld.long 0x10 0. "HBP_IRQ_EN,Interrupt Enable bit of the h-th hardware break point" "0,1" line.long 0x14 "MCS1_HBP1_IRQ_FORCINT,MCS[i] force hardware break point interrupt register" bitfld.long 0x14 0. "TRG_HBP_IRQ,Trigger the bit MCS[i]_HBP[h]_IRQ_NOTIFY.HBP_IRQ by software" "0,1" line.long 0x18 "MCS1_HBP1_IRQ_MODE,MCS[i] break point h interrupt mode configuration register" bitfld.long 0x18 0.--1. "IRQ_MODE,IRQ mode selection for all break point interrupts" "0,1,2,3" group.long ad:0x94823000++0x17 line.long 0x00 "TIO1_G0_CH0_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO1_G0_CH0_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO1_G0_CH0_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO1_G0_CH0_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO1_G0_CH0_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO1_G0_CH0_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94823020++0x0B line.long 0x00 "TIO1_G0_CH0_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH0_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH0_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94823030++0x0B line.long 0x00 "TIO1_G0_CH0_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH0_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH0_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9482303C++0x03 line.long 0x00 "TIO1_G0_CH0_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94823040++0x17 line.long 0x00 "TIO1_G0_CH1_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO1_G0_CH1_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO1_G0_CH1_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO1_G0_CH1_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO1_G0_CH1_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO1_G0_CH1_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94823060++0x0B line.long 0x00 "TIO1_G0_CH1_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH1_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH1_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94823070++0x0B line.long 0x00 "TIO1_G0_CH1_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH1_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH1_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9482307C++0x03 line.long 0x00 "TIO1_G0_CH1_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94823080++0x17 line.long 0x00 "TIO1_G0_CH2_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO1_G0_CH2_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO1_G0_CH2_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO1_G0_CH2_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO1_G0_CH2_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO1_G0_CH2_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948230A0++0x0B line.long 0x00 "TIO1_G0_CH2_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH2_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH2_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948230B0++0x0B line.long 0x00 "TIO1_G0_CH2_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH2_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH2_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948230BC++0x03 line.long 0x00 "TIO1_G0_CH2_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x948230C0++0x17 line.long 0x00 "TIO1_G0_CH3_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO1_G0_CH3_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO1_G0_CH3_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO1_G0_CH3_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO1_G0_CH3_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO1_G0_CH3_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948230E0++0x0B line.long 0x00 "TIO1_G0_CH3_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH3_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH3_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948230F0++0x0B line.long 0x00 "TIO1_G0_CH3_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH3_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH3_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948230FC++0x03 line.long 0x00 "TIO1_G0_CH3_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94823100++0x17 line.long 0x00 "TIO1_G0_CH4_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO1_G0_CH4_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO1_G0_CH4_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO1_G0_CH4_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO1_G0_CH4_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO1_G0_CH4_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94823120++0x0B line.long 0x00 "TIO1_G0_CH4_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH4_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH4_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94823130++0x0B line.long 0x00 "TIO1_G0_CH4_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH4_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH4_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9482313C++0x03 line.long 0x00 "TIO1_G0_CH4_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94823140++0x17 line.long 0x00 "TIO1_G0_CH5_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO1_G0_CH5_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO1_G0_CH5_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO1_G0_CH5_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO1_G0_CH5_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO1_G0_CH5_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94823160++0x0B line.long 0x00 "TIO1_G0_CH5_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH5_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH5_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94823170++0x0B line.long 0x00 "TIO1_G0_CH5_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH5_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH5_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9482317C++0x03 line.long 0x00 "TIO1_G0_CH5_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94823180++0x17 line.long 0x00 "TIO1_G0_CH6_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO1_G0_CH6_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO1_G0_CH6_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO1_G0_CH6_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO1_G0_CH6_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO1_G0_CH6_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948231A0++0x0B line.long 0x00 "TIO1_G0_CH6_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH6_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH6_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948231B0++0x0B line.long 0x00 "TIO1_G0_CH6_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH6_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH6_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948231BC++0x03 line.long 0x00 "TIO1_G0_CH6_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x948231C0++0x17 line.long 0x00 "TIO1_G0_CH7_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO1_G0_CH7_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO1_G0_CH7_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO1_G0_CH7_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO1_G0_CH7_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO1_G0_CH7_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948231E0++0x0B line.long 0x00 "TIO1_G0_CH7_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH7_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH7_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948231F0++0x0B line.long 0x00 "TIO1_G0_CH7_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO1_G0_CH7_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO1_G0_CH7_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948231FC++0x03 line.long 0x00 "TIO1_G0_CH7_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94823200++0x07 line.long 0x00 "TIO1_G0_ISEL0_CTRL1,TIO[i] input selection register 1" bitfld.long 0x00 27. "WRITE_EN3,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 26. "WRITE_EN2,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 25. "WRITE_EN1,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" newline bitfld.long 0x00 24. "WRITE_EN0,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 19. "OUT_SEL3,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 18. "OUT_SEL2,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" newline bitfld.long 0x00 17. "OUT_SEL1,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 16. "OUT_SEL0,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 12.--15. "LUT2_3,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "LUT2_2,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "LUT2_1,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "LUT2_0,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "TIO1_G0_ISEL0_CTRL2,TIO[i] input selection register 2" bitfld.long 0x04 22. "LUT3IN_SEL2,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 21. "LUT3IN_SEL1,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 20. "LUT3IN_SEL0,select source for LUT3_IN[k] signal in quad = [q]" "0,1" newline bitfld.long 0x04 16.--17. "QOUT_SEL,select source for ISEL_QOUT[q] signal in quad = [q]" "0,1,2,3" hexmask.long.byte 0x04 0.--7. 1. "LUT3,3 bit Lookup table function for quad=[q] channels [q]*4+2" group.long ad:0x94823220++0x07 line.long 0x00 "TIO1_G0_ISEL1_CTRL1,TIO[i] input selection register 1" bitfld.long 0x00 27. "WRITE_EN3,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 26. "WRITE_EN2,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 25. "WRITE_EN1,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" newline bitfld.long 0x00 24. "WRITE_EN0,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 19. "OUT_SEL3,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 18. "OUT_SEL2,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" newline bitfld.long 0x00 17. "OUT_SEL1,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 16. "OUT_SEL0,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 12.--15. "LUT2_3,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "LUT2_2,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "LUT2_1,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "LUT2_0,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "TIO1_G0_ISEL1_CTRL2,TIO[i] input selection register 2" bitfld.long 0x04 22. "LUT3IN_SEL2,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 21. "LUT3IN_SEL1,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 20. "LUT3IN_SEL0,select source for LUT3_IN[k] signal in quad = [q]" "0,1" newline bitfld.long 0x04 16.--17. "QOUT_SEL,select source for ISEL_QOUT[q] signal in quad = [q]" "0,1,2,3" hexmask.long.byte 0x04 0.--7. 1. "LUT3,3 bit Lookup table function for quad=[q] channels [q]*4+2" group.long ad:0x94823240++0x03 line.long 0x00 "TIO1_G0_OP_USAGE,TIO[i] operand usage selection register" bitfld.long 0x00 31. "WRITE_EN7,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 30. "WRITE_EN6,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 29. "WRITE_EN5,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" newline bitfld.long 0x00 28. "WRITE_EN4,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 27. "WRITE_EN3,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 26. "WRITE_EN2,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" newline bitfld.long 0x00 25. "WRITE_EN1,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 24. "WRITE_EN0,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 21.--23. "MODE7,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "MODE6,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "MODE5,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "MODE4,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 9.--11. "MODE3,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--8. "MODE2,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3.--5. "MODE1,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 0.--2. "MODE0,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" group.long ad:0x94823C00++0x1F line.long 0x00 "TIO1_S,TIO[i] signal sampling register" bitfld.long 0x00 7. "CH7,Value of channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Value of channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Value of channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Value of channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Value of channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Value of channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Value of channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Value of channel [x]" "0,1" line.long 0x04 "TIO1_O,TIO[i] output register" bitfld.long 0x04 7. "CH7,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Value driven on output of channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Value driven on output of channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Value driven on output of channel [x]" "0,1" line.long 0x08 "TIO1_ENDIS,TIO[i] enable/disable register" bitfld.long 0x08 7. "CH7,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Enable/Disable request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Enable/Disable request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Enable/Disable request of channel [x]" "0,1" line.long 0x0C "TIO1_INVERT,TIO[i] signal invert register" bitfld.long 0x0C 7. "CH7,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Enable/Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Enable/Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Enable/Disable signal inversion of channel [x]" "0,1" line.long 0x10 "TIO1_INPUT_MODE,TIO[i] input mode register" bitfld.long 0x10 7. "CH7,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Enable/Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Enable/Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Enable/Disable input mode of channel [x]" "0,1" line.long 0x14 "TIO1_CYCLIC_MODE,TIO[i] cyclic mode register" bitfld.long 0x14 7. "CH7,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Enable/Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Enable/Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Enable/Disable cyclic mode of channel [x]" "0,1" line.long 0x18 "TIO1_TRIG_OUT_GATE_EN,TIO[i] enable Trigger Output output gating register" bitfld.long 0x18 7. "CH7,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 6. "CH6,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 5. "CH5,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 4. "CH4,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 3. "CH3,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 2. "CH2,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 1. "CH1,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 0. "CH0,enable gating of Trigger Output events of channel [x]" "0,1" line.long 0x1C "TIO1_PLTRIG_OUT_GATE_EN,TIO[i] enable PL_TRIG_OUT output gating register" bitfld.long 0x1C 7. "CH7,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 6. "CH6,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 5. "CH5,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 4. "CH4,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 3. "CH3,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 2. "CH2,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 1. "CH1,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 0. "CH0,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" group.long ad:0x94823C40++0x1F line.long 0x00 "TIO1_CS,TIO[i] clear signal sampling register" bitfld.long 0x00 7. "CH7,Clear channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Clear channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Clear channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Clear channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Clear channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Clear channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Clear channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Clear channel [x]" "0,1" line.long 0x04 "TIO1_CO,TIO[i] clear output register" bitfld.long 0x04 7. "CH7,Clear channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Clear channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Clear channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Clear channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Clear channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Clear channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Clear channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Clear channel [x]" "0,1" line.long 0x08 "TIO1_CENDIS,TIO[i] disable register" bitfld.long 0x08 7. "CH7,Disable request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Disable request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Disable request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Disable request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Disable request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Disable request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Disable request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Disable request of channel [x]" "0,1" line.long 0x0C "TIO1_CINVERT,TIO[i] clear signal invert register" bitfld.long 0x0C 7. "CH7,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Disable signal inversion of channel [x]" "0,1" line.long 0x10 "TIO1_CINPUT_MODE,TIO[i] disable input mode register" bitfld.long 0x10 7. "CH7,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Disable input mode of channel [x]" "0,1" line.long 0x14 "TIO1_CCYCLIC_MODE,TIO[i] disable cyclic mode register" bitfld.long 0x14 7. "CH7,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Disable cyclic mode of channel [x]" "0,1" line.long 0x18 "TIO1_CTRIG_OUT_GATE_EN,TIO[i] clear Trigger Output output gating register" bitfld.long 0x18 7. "CH7,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 6. "CH6,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 5. "CH5,disable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 4. "CH4,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 3. "CH3,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 2. "CH2,disable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 1. "CH1,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 0. "CH0,disable gating of Trigger Output events of channel [x]" "0,1" line.long 0x1C "TIO1_CPLTRIG_OUT_GATE_EN,TIO[i] clear PL_TRIG_OUT output gating register" bitfld.long 0x1C 7. "CH7,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 6. "CH6,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 5. "CH5,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 4. "CH4,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 3. "CH3,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 2. "CH2,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 1. "CH1,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 0. "CH0,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" group.long ad:0x94823C80++0x1F line.long 0x00 "TIO1_SS,TIO[i] set signal sampling register" bitfld.long 0x00 7. "CH7,Set channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Set channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Set channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Set channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Set channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Set channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Set channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Set channel [x]" "0,1" line.long 0x04 "TIO1_SO,TIO[i] set output register" bitfld.long 0x04 7. "CH7,Set channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Set channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Set channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Set channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Set channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Set channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Set channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Set channel [x]" "0,1" line.long 0x08 "TIO1_SENDIS,TIO[i] enable register" bitfld.long 0x08 7. "CH7,Enable request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Enable request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Enable request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Enable request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Enable request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Enable request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Enable request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Enable request of channel [x]" "0,1" line.long 0x0C "TIO1_SINVERT,TIO[i] set signal invert register" bitfld.long 0x0C 7. "CH7,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Enable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Enable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Enable signal inversion of channel [x]" "0,1" line.long 0x10 "TIO1_SINPUT_MODE,TIO[i] enable input mode register" bitfld.long 0x10 7. "CH7,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Enable input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Enable input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Enable input mode of channel [x]" "0,1" line.long 0x14 "TIO1_SCYCLIC_MODE,TIO[i] enable cyclic mode register" bitfld.long 0x14 7. "CH7,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Enable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Enable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Enable cyclic mode of channel [x]" "0,1" line.long 0x18 "TIO1_STRIG_OUT_GATE_EN,TIO[i] set Trigger Output output gating register" bitfld.long 0x18 7. "CH7,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 6. "CH6,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 5. "CH5,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 4. "CH4,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 3. "CH3,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 2. "CH2,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 1. "CH1,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 0. "CH0,enable gating of Trigger Output events of channel [x]" "0,1" line.long 0x1C "TIO1_SPLTRIG_OUT_GATE_EN,TIO[i] set PL_TRIG_OUT output gating register" bitfld.long 0x1C 7. "CH7,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 6. "CH6,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 5. "CH5,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 4. "CH4,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 3. "CH3,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 2. "CH2,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 1. "CH1,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 0. "CH0,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" group.long ad:0x94823CC0++0x17 line.long 0x00 "TIO1_IS,TIO[i] invert signal sampling register" bitfld.long 0x00 7. "CH7,Invert channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Invert channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Invert channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Invert channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Invert channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Invert channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Invert channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Invert channel [x]" "0,1" line.long 0x04 "TIO1_IO,TIO[i] invert output register" bitfld.long 0x04 7. "CH7,Invert channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Invert channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Invert channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Invert channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Invert channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Invert channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Invert channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Invert channel [x]" "0,1" line.long 0x08 "TIO1_IENDIS,TIO[i] toggle enable/disable register" bitfld.long 0x08 7. "CH7,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Toggle state request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Toggle state request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Toggle state request of channel [x]" "0,1" line.long 0x0C "TIO1_IINVERT,TIO[i] toggle signal invert register" bitfld.long 0x0C 7. "CH7,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Invert signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Invert signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Invert signal inversion of channel [x]" "0,1" line.long 0x10 "TIO1_IINPUT_MODE,TIO[i] enable input mode register" bitfld.long 0x10 7. "CH7,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Toggle input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Toggle input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Toggle input mode of channel [x]" "0,1" line.long 0x14 "TIO1_ICYCLIC_MODE,TIO[i] enable cyclic mode register" bitfld.long 0x14 7. "CH7,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Toggle cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Toggle cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Toggle cyclic mode of channel [x]" "0,1" group.long ad:0x94823D00++0x03 line.long 0x00 "TIO1_FUPD,TIO[i] force update register" bitfld.long 0x00 7. "CH7,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 6. "CH6,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 5. "CH5,issue immediately a signal pulse on the update signal of channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 3. "CH3,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 2. "CH2,issue immediately a signal pulse on the update signal of channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 0. "CH0,issue immediately a signal pulse on the update signal of channel [x]" "0,1" rgroup.long ad:0x94823D04++0x03 line.long 0x00 "TIO1_HW_CONF,TIO[i] configuration register" bitfld.long 0x00 4. "TIO_PLUS,signals availability of TIOplus functionality" "0,1" bitfld.long 0x00 0.--1. "NTIO_CH8,signals availability of amount of channels" "0,1,2,3" group.long ad:0x94823D08++0x0B line.long 0x00 "TIO1_RSEL_CTRL1,TIO[i] resource selection control register 1" bitfld.long 0x00 28. "SEL_CLKEN7_0,select source of RS_CLKEN[g][7:7] for channels [g]*8" "0,1" bitfld.long 0x00 24. "SEL_CLKEN6_0,select source of RS_CLKEN[g][6:6] for channels [g]*8" "0,1" line.long 0x04 "TIO1_RSEL_CTRL2,TIO[i] resource selection control register 2" bitfld.long 0x04 8. "SEL_TB2_0,select source of RS_TB2[g] for channels [g]*8" "0,1" bitfld.long 0x04 4. "SEL_TB1_0,select source of RS_TB1[g] for channels [g]*8" "0,1" line.long 0x08 "TIO1_PL_SWRST,TIO[i] software reset for TIO Plus functionality" bitfld.long 0x08 7. "CH7,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,reset TIO_Plus resources of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,reset TIO_Plus resources of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,reset TIO_Plus resources of channel [x]" "0,1" group.long ad:0x94824000++0x4F line.long 0x00 "CCM1_ARP0_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x00 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x00 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x00 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--15. 1. "ADDR,ARP base address" line.long 0x04 "CCM1_ARP0_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x04 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x04 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x04 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x08 "CCM1_ARP1_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x08 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x08 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x08 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x08 0.--15. 1. "ADDR,ARP base address" line.long 0x0C "CCM1_ARP1_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x0C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x0C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x0C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x10 "CCM1_ARP2_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x10 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x10 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x10 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x10 0.--15. 1. "ADDR,ARP base address" line.long 0x14 "CCM1_ARP2_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x14 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x14 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x14 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x18 "CCM1_ARP3_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x18 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x18 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x18 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x18 0.--15. 1. "ADDR,ARP base address" line.long 0x1C "CCM1_ARP3_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x1C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x1C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x1C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x20 "CCM1_ARP4_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x20 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x20 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x20 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x20 0.--15. 1. "ADDR,ARP base address" line.long 0x24 "CCM1_ARP4_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x24 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x24 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x24 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x28 "CCM1_ARP5_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x28 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x28 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x28 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x28 0.--15. 1. "ADDR,ARP base address" line.long 0x2C "CCM1_ARP5_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x2C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x2C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x2C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x30 "CCM1_ARP6_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x30 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x30 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x30 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x30 0.--15. 1. "ADDR,ARP base address" line.long 0x34 "CCM1_ARP6_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x34 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x34 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x34 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x38 "CCM1_ARP7_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x38 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x38 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x38 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x38 0.--15. 1. "ADDR,ARP base address" line.long 0x3C "CCM1_ARP7_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x3C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x3C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x3C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x40 "CCM1_ARP8_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x40 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x40 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x40 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x40 0.--15. 1. "ADDR,ARP base address" line.long 0x44 "CCM1_ARP8_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x44 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x44 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x44 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x48 "CCM1_ARP9_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x48 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x48 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x48 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x48 0.--15. 1. "ADDR,ARP base address" line.long 0x4C "CCM1_ARP9_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x4C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x4C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x4C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" rgroup.long ad:0x948241CC++0x03 line.long 0x00 "CCM1_TIO_G0_OUT,CCM[i] TIO Group 0 1 Output Register" bitfld.long 0x00 23. "TIO_G0_OUT_N7,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 22. "TIO_G0_OUT_N6,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 21. "TIO_G0_OUT_N5,Output level snapshot of channel [c]" "0,1" newline bitfld.long 0x00 20. "TIO_G0_OUT_N4,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 19. "TIO_G0_OUT_N3,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 18. "TIO_G0_OUT_N2,Output level snapshot of channel [c]" "0,1" newline bitfld.long 0x00 17. "TIO_G0_OUT_N1,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 16. "TIO_G0_OUT_N0,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 7. "TIO_G0_OUT7,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" newline bitfld.long 0x00 6. "TIO_G0_OUT6,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 5. "TIO_G0_OUT5,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 4. "TIO_G0_OUT4,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" newline bitfld.long 0x00 3. "TIO_G0_OUT3,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 2. "TIO_G0_OUT2,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 1. "TIO_G0_OUT1,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" newline bitfld.long 0x00 0. "TIO_G0_OUT0,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" rgroup.long ad:0x948241D4++0x03 line.long 0x00 "CCM1_HW_CONF2,CCM[i] 2. Hardware Configuration Register" bitfld.long 0x00 18. "AXIM_DATA_SIZE,Defines the data bus width of the AXI master interface" "0,1" bitfld.long 0x00 16. "AXIS_DATA_SIZE,Defines the data bus width of the AXI slave interface" "0,1" bitfld.long 0x00 9. "TIO_OUT_RST,Reset level for all TIO output signals" "0,1" newline bitfld.long 0x00 7. "AXIM_POSTED_WRITE,Write transaction without response" "0,1" bitfld.long 0x00 6. "AXIM_SEC_ACC,Secure AXI master access constant" "0,1" bitfld.long 0x00 5. "AXIM_PRIV_ACC,Privileged AXI master access constant" "0,1" newline bitfld.long 0x00 0.--4. "AXIM_ID_WIDTH,Defines which LSB of AXIM_ID are send to the bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x948241D8++0x03 line.long 0x00 "CCM1_AEIM_STA,CCM[i] MCS Bus Master Status Register" bitfld.long 0x00 24.--25. "AEIM_XPT_STA,AEIM exception status" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. "AEIM_XPT_ADDR,Exception address" rgroup.long ad:0x948241DC++0x03 line.long 0x00 "CCM1_HW_CONF,CCM[i] Hardware Configuration Register" bitfld.long 0x00 31. "AEI_RDATA_PIPELINE_STAGE,Read data pipeline stage implemented" "0,1" bitfld.long 0x00 30. "AEI_ADDR_PIPELINE_STAGE,Address pipeline stage implemented" "0,1" bitfld.long 0x00 29. "INT_CLK_EN_GEN,Internal clock enable generation" "0,1" newline bitfld.long 0x00 24.--28. "TOM_TRIG_INTCHAIN,TOM internal trigger chain length for pipeline register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20.--23. "ATOM_TRIG_INTCHAIN,ATOM internal trigger chain length for pipeline register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 19. "IRQ_MODE_SINGLE_PULSE,Signalize availability of Single Pulse IRQ mode" "0,1" newline bitfld.long 0x00 18. "IRQ_MODE_PULSE_NOTIFY,Signalize availability of Pulse Notoify IRQ mode" "0,1" bitfld.long 0x00 17. "IRQ_MODE_PULSE,Signalize availability of Pulse IRQ mode" "0,1" bitfld.long 0x00 16. "IRQ_MODE_LEVEL,Signalize availability of Level IRQ mode" "0,1" newline bitfld.long 0x00 15. "RESET_ACTIVE,Active level of asynchronous reset" "0,1" bitfld.long 0x00 13. "ERM,Enable RAM1 MSB for available MCS modules" "0,1" bitfld.long 0x00 12. "RAM_INIT_RST,RAM initialization from reset" "0,1" newline bitfld.long 0x00 9.--11. "TOM_TRIG_CHAIN,TOM trigger chain length without synchronization register" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. "TOM_OUT_RST,CCM_TOM_OUT reset level" "0,1" bitfld.long 0x00 5.--7. "ATOM_TRIG_CHAIN,ATOM trigger chain length without synchronization register" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4. "ATOM_OUT_RST,CCM_ATOM_OUT reset level" "0,1" bitfld.long 0x00 3. "CFG_CLOCK_RATE,Clocks per ARU transfer" "0,1" bitfld.long 0x00 2. "SYNC_INPUT_REG,Additional pipelined stage in synchronous bridge mode" "0,1" newline bitfld.long 0x00 1. "BRIDGE_MODE_RST,Bridge mode after reset" "0,1" bitfld.long 0x00 0. "GRSTEN,Global Reset Enable" "0,1" group.long ad:0x948241E0++0x07 line.long 0x00 "CCM1_TIM_AUX_IN_SRC,CCM[i] TIM AUX Input Source Register" bitfld.long 0x00 23. "SEL_OUT_N_CH7,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 22. "SEL_OUT_N_CH6,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 21. "SEL_OUT_N_CH5,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" newline bitfld.long 0x00 20. "SEL_OUT_N_CH4,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 19. "SEL_OUT_N_CH3,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 18. "SEL_OUT_N_CH2,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" newline bitfld.long 0x00 17. "SEL_OUT_N_CH1,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 16. "SEL_OUT_N_CH0,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 7. "SRC_CH7,Defines CCM_AUX_IN source of TIM[i] channel 7" "0,1" newline bitfld.long 0x00 6. "SRC_CH6,Defines CCM_AUX_IN source of TIM[i] channel 6" "0,1" bitfld.long 0x00 5. "SRC_CH5,Defines CCM_AUX_IN source of TIM[i] channel 5" "0,1" bitfld.long 0x00 4. "SRC_CH4,Defines CCM_AUX_IN source of TIM[i] channel 4" "0,1" newline bitfld.long 0x00 3. "SRC_CH3,Defines CCM_AUX_IN source of TIM[i] channel 3" "0,1" bitfld.long 0x00 2. "SRC_CH2,Defines CCM_AUX_IN source of TIM[i] channel 2" "0,1" bitfld.long 0x00 1. "SRC_CH1,Defines AUX_IN source of TIM[i] channel 1" "0,1" newline bitfld.long 0x00 0. "SRC_CH0,Defines CCM_AUX_IN source of TIM[i] channel 0" "0,1" line.long 0x04 "CCM1_EXT_CAP_EN,CCM[i] External Capture Enable Register" bitfld.long 0x04 15. "TIM_IP1_EXT_CAP_EN7,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 14. "TIM_IP1_EXT_CAP_EN6,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 13. "TIM_IP1_EXT_CAP_EN5,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 12. "TIM_IP1_EXT_CAP_EN4,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 11. "TIM_IP1_EXT_CAP_EN3,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 10. "TIM_IP1_EXT_CAP_EN2,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 9. "TIM_IP1_EXT_CAP_EN1,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 8. "TIM_IP1_EXT_CAP_EN0,TIM_EXT_CAPTURE[x:x] of instance TIM[i+1] signal [x] forwarding enable" "0,1" bitfld.long 0x04 7. "TIM_I_EXT_CAP_EN7,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 6. "TIM_I_EXT_CAP_EN6,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 5. "TIM_I_EXT_CAP_EN5,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 4. "TIM_I_EXT_CAP_EN4,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 3. "TIM_I_EXT_CAP_EN3,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 2. "TIM_I_EXT_CAP_EN2,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 1. "TIM_I_EXT_CAP_EN1,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 0. "TIM_I_EXT_CAP_EN0,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" rgroup.long ad:0x948241E8++0x07 line.long 0x00 "CCM1_TOM_OUT,CCM[i] TOM Output Register" bitfld.long 0x00 31. "TOM_OUT_N15,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 30. "TOM_OUT_N14,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 29. "TOM_OUT_N13,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 28. "TOM_OUT_N12,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 27. "TOM_OUT_N11,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 26. "TOM_OUT_N10,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 25. "TOM_OUT_N9,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 24. "TOM_OUT_N8,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 23. "TOM_OUT_N7,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 22. "TOM_OUT_N6,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 21. "TOM_OUT_N5,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 20. "TOM_OUT_N4,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 19. "TOM_OUT_N3,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 18. "TOM_OUT_N2,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 17. "TOM_OUT_N1,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 16. "TOM_OUT_N0,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 15. "TOM_OUT15,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 14. "TOM_OUT14,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 13. "TOM_OUT13,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 12. "TOM_OUT12,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 11. "TOM_OUT11,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 10. "TOM_OUT10,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 9. "TOM_OUT9,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 8. "TOM_OUT8,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 7. "TOM_OUT7,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 6. "TOM_OUT6,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 5. "TOM_OUT5,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 4. "TOM_OUT4,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 3. "TOM_OUT3,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 2. "TOM_OUT2,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 1. "TOM_OUT1,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 0. "TOM_OUT0,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" line.long 0x04 "CCM1_ATOM_OUT,CCM[i] ATOM Output Register" bitfld.long 0x04 31. "ATOM_IP1_OUT_N7,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 30. "ATOM_IP1_OUT_N6,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 29. "ATOM_IP1_OUT_N5,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" newline bitfld.long 0x04 28. "ATOM_IP1_OUT_N4,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 27. "ATOM_IP1_OUT_N3,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 26. "ATOM_IP1_OUT_N2,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" newline bitfld.long 0x04 25. "ATOM_IP1_OUT_N1,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 24. "ATOM_IP1_OUT_N0,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 23. "ATOM_IP1_OUT7,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" newline bitfld.long 0x04 22. "ATOM_IP1_OUT6,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 21. "ATOM_IP1_OUT5,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 20. "ATOM_IP1_OUT4,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" newline bitfld.long 0x04 19. "ATOM_IP1_OUT3,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 18. "ATOM_IP1_OUT2,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 17. "ATOM_IP1_OUT1,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" newline bitfld.long 0x04 16. "ATOM_IP1_OUT0,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 15. "ATOM_I_OUT_N7,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 14. "ATOM_I_OUT_N6,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x04 13. "ATOM_I_OUT_N5,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 12. "ATOM_I_OUT_N4,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 11. "ATOM_I_OUT_N3,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x04 10. "ATOM_I_OUT_N2,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 9. "ATOM_I_OUT_N1,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 8. "ATOM_I_OUT_N0,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x04 7. "ATOM_I_OUT7,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 6. "ATOM_I_OUT6,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 5. "ATOM_I_OUT5,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" newline bitfld.long 0x04 4. "ATOM_I_OUT4,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 3. "ATOM_I_OUT3,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 2. "ATOM_I_OUT2,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" newline bitfld.long 0x04 1. "ATOM_I_OUT1,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 0. "ATOM_I_OUT0,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" group.long ad:0x948241F0++0x0F line.long 0x00 "CCM1_CMU_CLK_CFG,CCM[i] CMU Clock Configuration Register" bitfld.long 0x00 28.--29. "CLK7_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 24.--25. "CLK6_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 20.--21. "CLK5_SRC,Clock [y] source signal selector" "0,1,2,3" newline bitfld.long 0x00 16.--17. "CLK4_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 12.--13. "CLK3_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 8.--9. "CLK2_SRC,Clock [y] source signal selector" "0,1,2,3" newline bitfld.long 0x00 4.--5. "CLK1_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 0.--1. "CLK0_SRC,Clock [y] source signal selector" "0,1,2,3" line.long 0x04 "CCM1_CMU_FXCLK_CFG,CCM[i] CMU Fixed Clock Configuration Register" bitfld.long 0x04 0.--3. "FXCLK0_SRC,Fixed clock 0 source signal selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CCM1_CFG,CCM[i] Configuration Register" rbitfld.long 0x08 31. "TBU_DIR2,DIR1 input signal of module TBU timebase [z]" "0,1" rbitfld.long 0x08 30. "TBU_DIR1,DIR1 input signal of module TBU timebase [z]" "0,1" rbitfld.long 0x08 16.--17. "CLS_CLK_DIV,Cluster Clock Divider" "0,1,2,3" newline bitfld.long 0x08 8. "EN_TIO_DTM,Enable TIO and connected DTM" "0,1" bitfld.long 0x08 7. "EN_CMP_MON,Enable CMP and MON" "0,1" bitfld.long 0x08 6. "EN_PSM,Enable PSM" "0,1" newline bitfld.long 0x08 3. "EN_MCS,Enable MCS" "0,1" bitfld.long 0x08 2. "EN_ATOM_ADTM,Enable ATOM and ADTM" "0,1" bitfld.long 0x08 1. "EN_TOM_SPE_TDTM,Enable TOM SPE and TDTM" "0,1" newline bitfld.long 0x08 0. "EN_TIM,Enable TIM" "0,1" line.long 0x0C "CCM1_PROT,CCM[i] Protection Register" bitfld.long 0x0C 0. "CLS_PROT,Cluster Protection" "0,1" group.long ad:0x94824400++0x1FF line.long 0x00 "CDTM1_DTM0_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x00 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x00 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x00 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x00 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x00 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x04 "CDTM1_DTM0_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x04 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x04 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x04 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x04 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x04 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x04 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x04 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x04 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x04 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x04 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x04 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x04 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x04 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x04 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x04 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x04 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x04 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x04 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x04 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x04 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x08 "CDTM1_DTM0_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x08 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x08 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x08 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x08 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x08 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x08 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x08 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x08 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x08 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x08 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x08 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x08 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x08 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x08 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x08 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x08 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x08 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x08 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x08 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x08 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x08 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x08 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x08 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x08 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x08 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x08 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x08 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x08 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x08 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x08 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x08 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x08 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x0C "CDTM1_DTM0_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x0C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x0C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x0C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x0C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x0C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x0C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x0C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x0C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x0C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x0C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x0C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x0C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x0C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x0C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x0C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x0C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x0C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x0C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x0C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x0C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x10 "CDTM1_DTM0_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x10 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x10 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x10 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x10 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x10 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x14 "CDTM1_DTM0_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x14 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x14 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x14 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x18 "CDTM1_DTM0_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x18 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x18 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x18 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1C "CDTM1_DTM0_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x1C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x1C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x20 "CDTM1_DTM0_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x20 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x20 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x20 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x24 "CDTM1_DTM0_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x24 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x24 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x24 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x24 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x24 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x24 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x24 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x24 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x28 "CDTM1_DTM0_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x28 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x28 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x28 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x28 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x28 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x28 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x28 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x28 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x28 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x28 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x28 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x28 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x28 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x2C "CDTM1_DTM0_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x2C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x2C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x2C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x2C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x2C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x2C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x2C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x2C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x2C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x2C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x2C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x2C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x2C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x2C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x2C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x2C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x2C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x30 "CDTM1_DTM0_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x30 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x30 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x30 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x30 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x30 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x30 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x34 "CDTM1_DTM0_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x34 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x34 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x34 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x34 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x34 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x34 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x38 "CDTM1_DTM0_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x38 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x38 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x38 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x38 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x38 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x38 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x3C "CDTM1_DTM0_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x3C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x3C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x3C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x3C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x3C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x3C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x40 "CDTM1_DTM1_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x40 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x40 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x40 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x40 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x40 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x44 "CDTM1_DTM1_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x44 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x44 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x44 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x44 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x44 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x44 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x44 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x44 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x44 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x44 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x44 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x44 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x44 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x44 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x44 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x44 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x44 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x44 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x44 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x44 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0x44 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x48 "CDTM1_DTM1_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x48 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x48 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x48 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x48 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x48 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x48 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x48 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x48 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x48 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x48 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x48 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x48 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x48 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x48 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x48 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x48 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x48 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x48 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x48 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x48 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x48 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x48 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x48 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x48 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x48 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x48 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x48 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x48 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x48 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x48 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x48 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x48 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x4C "CDTM1_DTM1_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x4C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x4C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x4C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x4C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x4C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x4C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x4C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x4C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x4C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x4C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x4C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x4C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x4C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x4C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x4C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x4C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x4C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x4C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x4C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x4C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x50 "CDTM1_DTM1_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x50 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x50 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x50 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x50 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x50 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x54 "CDTM1_DTM1_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x54 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x54 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x54 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x58 "CDTM1_DTM1_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x58 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x58 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x58 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x5C "CDTM1_DTM1_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x5C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x5C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x5C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x60 "CDTM1_DTM1_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x60 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x60 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x60 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x64 "CDTM1_DTM1_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x64 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x64 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x64 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x64 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x64 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x64 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x64 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x64 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x68 "CDTM1_DTM1_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x68 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x68 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x68 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x68 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x68 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x68 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x68 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x68 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x68 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x68 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x68 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x68 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x68 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x6C "CDTM1_DTM1_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x6C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x6C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x6C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x6C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x6C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x6C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x6C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x6C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x6C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x6C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x6C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x6C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x6C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x6C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x6C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x6C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x6C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x6C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x70 "CDTM1_DTM1_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x70 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x70 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x70 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x70 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x70 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x70 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x74 "CDTM1_DTM1_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x74 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x74 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x74 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x74 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x74 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x74 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x78 "CDTM1_DTM1_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x78 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x78 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x78 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x78 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x78 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x78 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x7C "CDTM1_DTM1_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x7C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x7C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x7C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x7C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x7C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x7C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x80 "CDTM1_DTM2_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x80 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x80 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x80 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x80 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x80 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x80 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x84 "CDTM1_DTM2_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x84 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x84 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x84 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x84 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x84 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x84 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x84 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x84 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x84 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x84 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x84 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x84 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x84 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x84 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x84 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x84 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x84 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x84 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x84 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x84 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x88 "CDTM1_DTM2_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x88 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x88 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x88 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x88 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x88 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x88 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x88 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x88 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x88 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x88 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x88 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x88 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x88 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x88 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x88 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x88 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x88 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x88 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x88 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x88 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x88 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x88 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x88 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x88 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x88 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x88 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x88 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x88 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x88 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x88 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x88 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x88 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x8C "CDTM1_DTM2_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x8C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x8C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x8C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x8C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x8C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x8C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x8C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x8C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x8C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x8C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x8C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x8C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x8C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x8C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x8C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x8C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x8C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x8C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x8C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x8C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x90 "CDTM1_DTM2_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x90 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x90 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x90 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x90 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x90 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x94 "CDTM1_DTM2_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x94 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x94 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x94 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x98 "CDTM1_DTM2_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x98 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x98 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x98 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x9C "CDTM1_DTM2_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x9C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x9C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x9C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xA0 "CDTM1_DTM2_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0xA0 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0xA0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xA0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xA4 "CDTM1_DTM2_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0xA4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0xA4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0xA4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0xA4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0xA4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0xA4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0xA4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0xA4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0xA8 "CDTM1_DTM2_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0xA8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0xA8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0xA8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0xA8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0xA8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0xA8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0xA8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0xA8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0xA8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0xA8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0xA8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0xA8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0xA8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0xAC "CDTM1_DTM2_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0xAC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0xAC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0xAC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0xAC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0xAC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0xAC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0xAC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0xAC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0xAC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0xAC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0xAC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0xAC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0xAC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0xAC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0xAC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0xAC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0xAC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0xAC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0xB0 "CDTM1_DTM2_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xB4 "CDTM1_DTM2_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xB8 "CDTM1_DTM2_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xBC "CDTM1_DTM2_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xBC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xBC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xBC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xBC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xBC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xBC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xC0 "CDTM1_DTM3_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0xC0 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0xC0 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0xC0 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0xC0 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0xC0 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0xC0 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0xC4 "CDTM1_DTM3_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0xC4 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0xC4 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0xC4 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0xC4 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0xC4 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0xC4 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0xC4 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0xC4 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0xC4 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0xC4 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0xC4 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0xC4 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0xC4 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0xC4 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0xC4 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0xC4 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0xC4 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0xC4 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0xC4 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0xC4 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0xC4 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0xC8 "CDTM1_DTM3_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0xC8 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0xC8 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0xC8 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0xC8 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0xC8 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0xC8 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0xC8 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0xC8 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0xC8 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0xC8 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0xC8 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0xC8 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0xC8 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0xC8 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0xC8 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0xC8 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0xC8 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0xC8 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0xC8 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0xC8 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0xC8 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0xC8 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0xC8 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0xC8 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0xC8 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0xC8 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0xC8 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0xC8 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0xC8 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0xC8 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0xC8 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0xC8 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0xCC "CDTM1_DTM3_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0xCC 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0xCC 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0xCC 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0xCC 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0xCC 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0xCC 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0xCC 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0xCC 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0xCC 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0xCC 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0xCC 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0xCC 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0xCC 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0xCC 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0xCC 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0xCC 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0xCC 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0xCC 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0xCC 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0xCC 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0xD0 "CDTM1_DTM3_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0xD0 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0xD0 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0xD0 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0xD0 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0xD0 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0xD4 "CDTM1_DTM3_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0xD4 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0xD4 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xD4 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xD8 "CDTM1_DTM3_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0xD8 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0xD8 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xD8 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xDC "CDTM1_DTM3_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0xDC 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0xDC 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xDC 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xE0 "CDTM1_DTM3_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0xE0 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0xE0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xE0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xE4 "CDTM1_DTM3_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0xE4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0xE4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0xE4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0xE4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0xE4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0xE4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0xE4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0xE4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0xE8 "CDTM1_DTM3_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0xE8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0xE8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0xE8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0xE8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0xE8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0xE8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0xE8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0xE8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0xE8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0xE8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0xE8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0xE8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0xE8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0xEC "CDTM1_DTM3_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0xEC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0xEC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0xEC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0xEC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0xEC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0xEC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0xEC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0xEC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0xEC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0xEC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0xEC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0xEC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0xEC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0xEC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0xEC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0xEC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0xEC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0xEC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0xF0 "CDTM1_DTM3_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xF4 "CDTM1_DTM3_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xF8 "CDTM1_DTM3_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xFC "CDTM1_DTM3_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xFC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xFC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xFC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xFC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xFC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xFC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x100 "CDTM1_DTM4_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x100 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x100 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x100 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x100 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x100 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x100 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x104 "CDTM1_DTM4_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x104 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x104 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x104 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x104 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x104 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x104 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x104 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x104 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x104 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x104 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x104 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x104 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x104 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x104 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x104 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x104 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x104 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x104 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x104 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x104 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x108 "CDTM1_DTM4_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x108 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x108 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x108 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x108 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x108 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x108 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x108 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x108 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x108 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x108 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x108 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x108 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x108 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x108 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x108 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x108 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x108 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x108 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x108 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x108 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x108 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x108 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x108 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x108 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x108 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x108 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x108 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x108 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x108 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x108 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x108 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x108 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x10C "CDTM1_DTM4_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x10C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x10C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x10C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x10C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x10C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x10C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x10C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x10C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x10C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x10C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x10C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x10C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x10C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x10C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x10C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x10C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x10C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x10C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x10C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x10C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x10C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x10C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x10C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x10C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x10C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x10C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x10C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x10C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x10C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x10C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x10C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x10C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x110 "CDTM1_DTM4_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x110 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x110 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x110 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x110 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x110 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x114 "CDTM1_DTM4_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x114 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x114 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x114 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x118 "CDTM1_DTM4_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x118 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x118 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x118 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x11C "CDTM1_DTM4_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x11C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x11C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x11C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x120 "CDTM1_DTM4_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x120 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x120 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x120 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x124 "CDTM1_DTM4_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x124 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x124 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x124 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x124 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x124 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x124 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x124 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x124 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x128 "CDTM1_DTM4_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x128 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x128 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x128 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x128 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x128 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x128 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x128 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x128 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x128 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x128 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x128 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x128 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x128 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x128 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x128 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x128 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x12C "CDTM1_DTM4_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x12C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x12C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x12C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x12C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x12C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x12C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x12C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x12C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x12C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x12C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x12C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x12C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x12C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x12C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x12C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x12C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x12C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x12C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x130 "CDTM1_DTM4_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x130 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x130 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x130 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x130 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x130 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x130 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x134 "CDTM1_DTM4_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x134 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x134 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x134 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x134 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x134 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x134 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x138 "CDTM1_DTM4_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x138 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x138 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x138 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x138 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x138 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x138 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x13C "CDTM1_DTM4_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x13C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x13C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x13C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x13C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x13C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x13C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x140 "CDTM1_DTM5_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x140 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x140 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x140 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x140 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x140 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x140 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x144 "CDTM1_DTM5_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x144 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x144 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x144 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x144 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x144 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x144 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x144 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x144 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x144 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x144 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x144 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x144 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x144 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x144 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x144 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x144 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x144 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x144 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x144 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x144 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0x144 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x148 "CDTM1_DTM5_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x148 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x148 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x148 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x148 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x148 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x148 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x148 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x148 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x148 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x148 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x148 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x148 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x148 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x148 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x148 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x148 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x148 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x148 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x148 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x148 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x148 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x148 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x148 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x148 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x148 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x148 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x148 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x148 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x148 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x148 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x148 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x148 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x14C "CDTM1_DTM5_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x14C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x14C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x14C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x14C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x14C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x14C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x14C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x14C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x14C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x14C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x14C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x14C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x14C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x14C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x14C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x14C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x14C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x14C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x14C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x14C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x14C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x14C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x14C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x14C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x14C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x14C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x14C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x14C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x14C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x14C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x14C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x14C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x150 "CDTM1_DTM5_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x150 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x150 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x150 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x150 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x150 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x154 "CDTM1_DTM5_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x154 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x154 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x154 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x158 "CDTM1_DTM5_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x158 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x158 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x158 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x15C "CDTM1_DTM5_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x15C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x15C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x15C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x160 "CDTM1_DTM5_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x160 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x160 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x160 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x164 "CDTM1_DTM5_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x164 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x164 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x164 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x164 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x164 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x164 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x164 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x164 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x168 "CDTM1_DTM5_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x168 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x168 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x168 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x168 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x168 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x168 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x168 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x168 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x168 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x168 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x168 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x168 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x168 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x168 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x168 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x168 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x16C "CDTM1_DTM5_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x16C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x16C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x16C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x16C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x16C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x16C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x16C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x16C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x16C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x16C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x16C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x16C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x16C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x16C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x16C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x16C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x16C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x16C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x16C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x16C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x170 "CDTM1_DTM5_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x170 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x170 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x170 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x170 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x170 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x170 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x174 "CDTM1_DTM5_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x174 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x174 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x174 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x174 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x174 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x174 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x178 "CDTM1_DTM5_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x178 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x178 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x178 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x178 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x178 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x178 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x17C "CDTM1_DTM5_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x17C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x17C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x17C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x17C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x17C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x17C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x180 "CDTM1_DTM6_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x180 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x180 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x180 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x180 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x180 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x180 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x184 "CDTM1_DTM6_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x184 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x184 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x184 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x184 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x184 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x184 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x184 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x184 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x184 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x184 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x184 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x184 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x184 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x184 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x184 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x184 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x184 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x184 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x184 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x184 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x188 "CDTM1_DTM6_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x188 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x188 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x188 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x188 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x188 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x188 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x188 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x188 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x188 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x188 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x188 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x188 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x188 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x188 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x188 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x188 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x188 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x188 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x188 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x188 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x188 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x188 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x188 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x188 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x188 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x188 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x188 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x188 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x188 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x188 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x188 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x188 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x18C "CDTM1_DTM6_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x18C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x18C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x18C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x18C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x18C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x18C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x18C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x18C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x18C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x18C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x18C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x18C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x18C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x18C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x18C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x18C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x18C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x18C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x18C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x18C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x18C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x18C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x18C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x18C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x18C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x18C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x18C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x18C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x18C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x18C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x18C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x18C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x190 "CDTM1_DTM6_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x190 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x190 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x190 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x190 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x190 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x194 "CDTM1_DTM6_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x194 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x194 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x198 "CDTM1_DTM6_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x198 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x198 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x19C "CDTM1_DTM6_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x19C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x19C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1A0 "CDTM1_DTM6_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x1A0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1A0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1A4 "CDTM1_DTM6_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x1A4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x1A4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x1A4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x1A4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x1A4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x1A4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x1A4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x1A4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x1A8 "CDTM1_DTM6_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x1A8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x1A8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1A8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x1A8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x1A8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x1A8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x1A8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x1A8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x1A8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x1A8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1A8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x1A8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x1A8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x1A8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1A8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x1A8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x1AC "CDTM1_DTM6_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x1AC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x1AC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x1AC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x1AC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x1AC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x1AC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x1AC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x1AC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x1AC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x1AC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x1AC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x1AC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x1AC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x1AC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x1AC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1AC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x1AC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x1AC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x1AC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x1AC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x1B0 "CDTM1_DTM6_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1B0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1B0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1B0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1B0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1B0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1B0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1B4 "CDTM1_DTM6_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1B4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1B4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1B4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1B4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1B4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1B4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1B8 "CDTM1_DTM6_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1B8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1B8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1B8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1B8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1B8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1B8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1BC "CDTM1_DTM6_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1BC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1BC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1BC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1BC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1BC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1BC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1C0 "CDTM1_DTM7_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x1C0 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x1C0 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x1C0 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x1C0 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C0 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x1C0 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x1C4 "CDTM1_DTM7_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x1C4 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x1C4 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x1C4 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x1C4 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x1C4 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x1C4 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x1C4 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x1C4 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x1C4 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x1C4 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x1C4 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x1C4 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x1C4 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x1C4 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x1C4 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x1C4 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x1C4 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x1C4 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x1C4 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x1C4 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0x1C4 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x1C8 "CDTM1_DTM7_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x1C8 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x1C8 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x1C8 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x1C8 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x1C8 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x1C8 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x1C8 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x1C8 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x1C8 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x1C8 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x1C8 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x1C8 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x1C8 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x1C8 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x1C8 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x1C8 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x1C8 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x1C8 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x1C8 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x1C8 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x1C8 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x1C8 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x1C8 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x1C8 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x1C8 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x1C8 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x1C8 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x1C8 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x1C8 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x1C8 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x1C8 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x1C8 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x1CC "CDTM1_DTM7_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x1CC 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x1CC 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x1CC 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x1CC 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x1CC 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x1CC 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x1CC 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x1CC 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x1CC 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x1CC 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x1CC 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x1CC 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x1CC 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x1CC 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x1CC 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x1CC 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x1CC 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x1CC 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x1CC 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x1CC 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x1CC 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x1CC 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x1CC 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x1CC 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x1CC 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x1CC 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x1CC 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x1CC 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x1CC 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x1CC 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x1CC 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x1CC 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x1D0 "CDTM1_DTM7_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x1D0 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x1D0 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x1D0 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x1D0 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x1D0 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x1D4 "CDTM1_DTM7_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x1D4 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1D4 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1D8 "CDTM1_DTM7_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x1D8 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1D8 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1DC "CDTM1_DTM7_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x1DC 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1DC 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1E0 "CDTM1_DTM7_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x1E0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1E0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1E4 "CDTM1_DTM7_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x1E4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x1E4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x1E4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x1E4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x1E4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x1E4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x1E4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x1E4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x1E8 "CDTM1_DTM7_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x1E8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x1E8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1E8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x1E8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x1E8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x1E8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x1E8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x1E8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x1E8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x1E8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1E8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x1E8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x1E8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x1E8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1E8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x1E8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x1EC "CDTM1_DTM7_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x1EC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x1EC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x1EC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x1EC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x1EC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x1EC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x1EC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x1EC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x1EC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x1EC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x1EC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x1EC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x1EC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x1EC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x1EC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1EC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x1EC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x1EC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x1EC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x1EC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x1F0 "CDTM1_DTM7_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1F0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1F0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1F0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1F0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1F0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1F0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1F4 "CDTM1_DTM7_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1F4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1F4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1F4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1F4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1F4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1F4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1F8 "CDTM1_DTM7_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1F8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1F8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1F8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1F8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1F8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1F8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1FC "CDTM1_DTM7_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1FC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1FC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1FC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1FC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1FC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1FC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" group.long ad:0x94824800++0x47 line.long 0x00 "F2A1_CH0_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x00 0.--8. 1. "ADDR,ARU Read address" line.long 0x04 "F2A1_CH1_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x04 0.--8. 1. "ADDR,ARU Read address" line.long 0x08 "F2A1_CH2_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x08 0.--8. 1. "ADDR,ARU Read address" line.long 0x0C "F2A1_CH3_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x0C 0.--8. 1. "ADDR,ARU Read address" line.long 0x10 "F2A1_CH4_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x10 0.--8. 1. "ADDR,ARU Read address" line.long 0x14 "F2A1_CH5_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x14 0.--8. 1. "ADDR,ARU Read address" line.long 0x18 "F2A1_CH6_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x18 0.--8. 1. "ADDR,ARU Read address" line.long 0x1C "F2A1_CH7_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x1C 0.--8. 1. "ADDR,ARU Read address" line.long 0x20 "F2A1_CH0_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x20 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x20 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x24 "F2A1_CH1_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x24 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x24 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x28 "F2A1_CH2_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x28 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x28 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x2C "F2A1_CH3_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x2C 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x2C 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x30 "F2A1_CH4_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x30 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x30 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x34 "F2A1_CH5_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x34 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x34 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x38 "F2A1_CH6_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x38 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x38 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x3C "F2A1_CH7_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x3C 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x3C 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x40 "F2A1_ENABLE,F2A[i] stream activation register" bitfld.long 0x40 14.--15. "STR7_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 12.--13. "STR6_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 10.--11. "STR5_EN,Enable/disable stream [y]" "0,1,2,3" newline bitfld.long 0x40 8.--9. "STR4_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 6.--7. "STR3_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 4.--5. "STR2_EN,Enable/disable stream [y]" "0,1,2,3" newline bitfld.long 0x40 2.--3. "STR1_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 0.--1. "STR0_EN,Enable/disable stream [y]" "0,1,2,3" line.long 0x44 "F2A1_CTRL,F2A[i] stream control register" bitfld.long 0x44 6.--7. "STR7_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" bitfld.long 0x44 4.--5. "STR6_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" bitfld.long 0x44 2.--3. "STR5_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" newline bitfld.long 0x44 0.--1. "STR4_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" group.long ad:0x94824880++0x03 line.long 0x00 "AFD1_CH0_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x94824890++0x03 line.long 0x00 "AFD1_CH1_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948248A0++0x03 line.long 0x00 "AFD1_CH2_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948248B0++0x03 line.long 0x00 "AFD1_CH3_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948248C0++0x03 line.long 0x00 "AFD1_CH4_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948248D0++0x03 line.long 0x00 "AFD1_CH5_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948248E0++0x03 line.long 0x00 "AFD1_CH6_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948248F0++0x03 line.long 0x00 "AFD1_CH7_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x94824A00++0x13 line.long 0x00 "FIFO1_CH0_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO1_CH0_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO1_CH0_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO1_CH0_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO1_CH0_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94824A14++0x0F line.long 0x00 "FIFO1_CH0_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH0_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO1_CH0_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO1_CH0_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94824A24++0x13 line.long 0x00 "FIFO1_CH0_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH0_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO1_CH0_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO1_CH0_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO1_CH0_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94824A40++0x13 line.long 0x00 "FIFO1_CH1_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO1_CH1_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO1_CH1_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO1_CH1_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO1_CH1_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94824A54++0x0F line.long 0x00 "FIFO1_CH1_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH1_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO1_CH1_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO1_CH1_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94824A64++0x13 line.long 0x00 "FIFO1_CH1_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH1_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO1_CH1_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO1_CH1_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO1_CH1_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94824A80++0x13 line.long 0x00 "FIFO1_CH2_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO1_CH2_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO1_CH2_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO1_CH2_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO1_CH2_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94824A94++0x0F line.long 0x00 "FIFO1_CH2_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH2_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO1_CH2_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO1_CH2_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94824AA4++0x13 line.long 0x00 "FIFO1_CH2_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH2_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO1_CH2_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO1_CH2_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO1_CH2_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94824AC0++0x13 line.long 0x00 "FIFO1_CH3_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO1_CH3_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO1_CH3_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO1_CH3_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO1_CH3_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94824AD4++0x0F line.long 0x00 "FIFO1_CH3_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH3_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO1_CH3_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO1_CH3_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94824AE4++0x13 line.long 0x00 "FIFO1_CH3_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH3_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO1_CH3_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO1_CH3_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO1_CH3_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94824B00++0x13 line.long 0x00 "FIFO1_CH4_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO1_CH4_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO1_CH4_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO1_CH4_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO1_CH4_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94824B14++0x0F line.long 0x00 "FIFO1_CH4_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH4_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO1_CH4_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO1_CH4_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94824B24++0x13 line.long 0x00 "FIFO1_CH4_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH4_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO1_CH4_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO1_CH4_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO1_CH4_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94824B40++0x13 line.long 0x00 "FIFO1_CH5_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO1_CH5_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO1_CH5_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO1_CH5_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO1_CH5_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94824B54++0x0F line.long 0x00 "FIFO1_CH5_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH5_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO1_CH5_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO1_CH5_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94824B64++0x13 line.long 0x00 "FIFO1_CH5_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH5_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO1_CH5_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO1_CH5_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO1_CH5_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94824B80++0x13 line.long 0x00 "FIFO1_CH6_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO1_CH6_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO1_CH6_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO1_CH6_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO1_CH6_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94824B94++0x0F line.long 0x00 "FIFO1_CH6_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH6_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO1_CH6_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO1_CH6_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94824BA4++0x13 line.long 0x00 "FIFO1_CH6_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH6_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO1_CH6_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO1_CH6_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO1_CH6_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94824BC0++0x13 line.long 0x00 "FIFO1_CH7_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO1_CH7_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO1_CH7_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO1_CH7_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO1_CH7_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94824BD4++0x0F line.long 0x00 "FIFO1_CH7_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH7_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO1_CH7_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO1_CH7_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94824BE4++0x13 line.long 0x00 "FIFO1_CH7_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO1_CH7_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO1_CH7_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO1_CH7_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO1_CH7_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94824C00++0x4F line.long 0x00 "SPE1_CTRL_STAT,SPE[i] Control Status Register" hexmask.long.byte 0x00 24.--31. 1. "FSOL,Fast Shutoff Level for TOM[i] channel 0 to 7" bitfld.long 0x00 23. "ETRIG_SEL,Extended trigger selection of signal TRIG_SEL" "0,1" rbitfld.long 0x00 20.--22. "NIP,New input pattern that was detected" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 19. "PDIR,Previous rotation direction" "0,1" bitfld.long 0x00 16.--18. "PIP,Previous input pattern that was detected by a regular input pattern change" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "ADIR,Rotation direction" "0,1" newline bitfld.long 0x00 12.--14. "AIP,Input pattern that was detected by a regular input pattern change" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. "SPE_PAT_PTR,Pattern selector for TOM output signals" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "FSOM,Fast Shutoff Mode" "0,1" newline bitfld.long 0x00 6. "TIM_SEL,Select TIM input signal" "0,1" bitfld.long 0x00 4.--5. "TRIG_SEL,Select trigger input signal" "0,1,2,3" bitfld.long 0x00 3. "SIE2,SPE Input [k] enable for TIM[i]_CH[x:x] TIM[i]_CH[y:y] TIM[i]_CH[z:z]" "0,1" newline bitfld.long 0x00 2. "SIE1,SPE Input [k] enable for TIM[i]_CH[x:x] TIM[i]_CH[y:y] TIM[i]_CH[z:z]" "0,1" bitfld.long 0x00 1. "SIE0,SPE Input [k] enable for TIM[i]_CH[x:x] TIM[i]_CH[y:y] TIM[i]_CH[z:z]" "0,1" bitfld.long 0x00 0. "EN,SPE Submodule enable" "0,1" line.long 0x04 "SPE1_PAT,SPE[i] Input Pattern Definition Register" bitfld.long 0x04 29.--31. "IP7_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 28. "IP7_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 25.--27. "IP6_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 24. "IP6_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 21.--23. "IP5_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20. "IP5_VAL,Input pattern [t] is a valid pattern" "0,1" newline bitfld.long 0x04 17.--19. "IP4_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16. "IP4_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 13.--15. "IP3_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 12. "IP3_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 9.--11. "IP2_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8. "IP2_VAL,Input pattern [t] is a valid pattern" "0,1" newline bitfld.long 0x04 5.--7. "IP1_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4. "IP1_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 1.--3. "IP0_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. "IP0_VAL,Input pattern [t] is a valid pattern" "0,1" line.long 0x08 "SPE1_OUT_PAT0,SPE[i] Output Definition Register" bitfld.long 0x08 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x08 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x08 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x0C "SPE1_OUT_PAT1,SPE[i] Output Definition Register" bitfld.long 0x0C 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x10 "SPE1_OUT_PAT2,SPE[i] Output Definition Register" bitfld.long 0x10 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x10 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x10 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x14 "SPE1_OUT_PAT3,SPE[i] Output Definition Register" bitfld.long 0x14 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x14 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x14 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x18 "SPE1_OUT_PAT4,SPE[i] Output Definition Register" bitfld.long 0x18 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x18 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x18 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x1C "SPE1_OUT_PAT5,SPE[i] Output Definition Register" bitfld.long 0x1C 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x1C 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x1C 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x20 "SPE1_OUT_PAT6,SPE[i] Output Definition Register" bitfld.long 0x20 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x20 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x20 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x24 "SPE1_OUT_PAT7,SPE[i] Output Definition Register" bitfld.long 0x24 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x24 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x24 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x28 "SPE1_OUT_CTRL,SPE[i] Output Control Register" bitfld.long 0x28 14.--15. "SPE_OUT_CTRL7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 12.--13. "SPE_OUT_CTRL6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 10.--11. "SPE_OUT_CTRL5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x28 8.--9. "SPE_OUT_CTRL4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 6.--7. "SPE_OUT_CTRL3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 4.--5. "SPE_OUT_CTRL2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x28 2.--3. "SPE_OUT_CTRL1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 0.--1. "SPE_OUT_CTRL0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x2C "SPE1_IRQ_NOTIFY,SPE[i] Interrupt Notification Register" bitfld.long 0x2C 4. "SPE_RCMP,SPE revolution counter match event" "0,1" bitfld.long 0x2C 3. "SPE_BIS,Bouncing input signal detected" "0,1" bitfld.long 0x2C 2. "SPE_PERR,Wrong or invalid pattern detected at input" "0,1" newline bitfld.long 0x2C 1. "SPE_DCHG,SPE_DIR bit changed on behalf of new input pattern" "0,1" bitfld.long 0x2C 0. "SPE_NIPD,New input pattern interrupt occurred" "0,1" line.long 0x30 "SPE1_IRQ_EN,SPE[i] Interrupt Enable Register" bitfld.long 0x30 4. "SPE_RCMP_IRQ_EN,SPE_RCMP_IRQ interrupt enable" "0,1" bitfld.long 0x30 3. "SPE_BIS_IRQ_EN,SPE_BIS_IRQ interrupt enable" "0,1" bitfld.long 0x30 2. "SPE_PERR_IRQ_EN,SPE_PERR_IRQ interrupt enable" "0,1" newline bitfld.long 0x30 1. "SPE_DCHG_IRQ_EN,SPE_DCHG_IRQ interrupt enable" "0,1" bitfld.long 0x30 0. "SPE_NIPD_IRQ_EN,SPE_NIPD_IRQ interrupt enable" "0,1" line.long 0x34 "SPE1_IRQ_FORCINT,SPE[i] Interrupt Generation By Software" bitfld.long 0x34 4. "TRG_SPE_RCMP,Trigger SPE[i]_IRQ_NOTIFY.SPE_RCMP by software" "0,1" bitfld.long 0x34 3. "TRG_SPE_BIS,Trigger SPE[i]_IRQ_NOTIFY.SPE_BIS by software" "0,1" bitfld.long 0x34 2. "TRG_SPE_PERR,Trigger SPE[i]_IRQ_NOTIFY.SPE_PERR by software" "0,1" newline bitfld.long 0x34 1. "TRG_SPE_DCHG,Trigger SPE[i]_IRQ_NOTIFY.SPE_DCHG by software" "0,1" bitfld.long 0x34 0. "TRG_SPE_NIPD,Trigger SPE[i]_IRQ_NOTIFY.SPE_NIPD by software" "0,1" line.long 0x38 "SPE1_IRQ_MODE,SPE[i] Interrupt Mode Configuration Register" bitfld.long 0x38 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x3C "SPE1_EIRQ_EN,SPE[i] Error Interrupt Enable Register" bitfld.long 0x3C 4. "SPE_RCMP_EIRQ_EN,SPE[i]_RCMP_EIRQ error interrupt enable" "0,1" bitfld.long 0x3C 3. "SPE_BIS_EIRQ_EN,SPE[i]_BIS_EIRQ error interrupt enable" "0,1" bitfld.long 0x3C 2. "SPE_PERR_EIRQ_EN,SPE_PERR_EIRQ error interrupt enable" "0,1" newline bitfld.long 0x3C 1. "SPE_DCHG_EIRQ_EN,SPE_DCHG_EIRQ error interrupt enable" "0,1" bitfld.long 0x3C 0. "SPE_NIPD_EIRQ_EN,SPE_NIPD_EIRQ interrupt enable" "0,1" line.long 0x40 "SPE1_REV_CNT,SPE[i] Input Revolution Counter" hexmask.long.tbyte 0x40 0.--23. 1. "REV_CNT,Input signal revolution counter" line.long 0x44 "SPE1_REV_CMP,SPE[i] Revolution Counter Compare Value" hexmask.long.tbyte 0x44 0.--23. 1. "REV_CMP,Input signal revolution counter compare value" line.long 0x48 "SPE1_CTRL_STAT2,SPE[i] Control Status Register 2" bitfld.long 0x48 8.--10. "SPE_PAT_PTR_BWD,Pattern selector for TOM output signals in case of SPE[i]_CMD.SPE_CTRL_CMD = 0b01 (e.g. backward direction)" "0,1,2,3,4,5,6,7" line.long 0x4C "SPE1_CMD,SPE[i] Command Register" bitfld.long 0x4C 16. "SPE_UPD_TRIG,SPE updater trigger" "0,1" bitfld.long 0x4C 0.--1. "SPE_CTRL_CMD,SPE control command" "0,1,2,3" rgroup.long ad:0x94825000++0x07 line.long 0x00 "AXIM1_FREE,AXIM[i] slot allocation status." bitfld.long 0x00 3. "FREE3,This bit represents the allocation status of the slot [t]" "0,1" bitfld.long 0x00 2. "FREE2,This bit represents the allocation status of the slot [t]" "0,1" bitfld.long 0x00 1. "FREE1,This bit represents the allocation status of the slot [t]" "0,1" newline bitfld.long 0x00 0. "FREE0,This bit represents the allocation status of the slot [t]" "0,1" line.long 0x04 "AXIM1_REQUEST,AXIM[i] slot request (allocation)." hexmask.long.byte 0x04 24.--31. 1. "REQID,This bit field shows the new allocated slot as binary encoded index" bitfld.long 0x04 3. "REQ1HOT3,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" bitfld.long 0x04 2. "REQ1HOT2,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" newline bitfld.long 0x04 1. "REQ1HOT1,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" bitfld.long 0x04 0. "REQ1HOT0,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" group.long ad:0x94825008++0x03 line.long 0x00 "AXIM1_RELEASE,AXIM[i] slot release (de-allocation)." bitfld.long 0x00 3. "RELREQ3,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" bitfld.long 0x00 2. "RELREQ2,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" bitfld.long 0x00 1. "RELREQ1,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" newline bitfld.long 0x00 0. "RELREQ0,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" group.long ad:0x94825020++0x03 line.long 0x00 "AXIM1_SLOT0_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94825028++0x03 line.long 0x00 "AXIM1_SLOT0_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94825030++0x07 line.long 0x00 "AXIM1_SLOT0_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM1_SLOT0_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94825038++0x03 line.long 0x00 "AXIM1_SLOT0_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94825040++0x03 line.long 0x00 "AXIM1_SLOT1_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94825048++0x03 line.long 0x00 "AXIM1_SLOT1_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94825050++0x07 line.long 0x00 "AXIM1_SLOT1_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM1_SLOT1_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94825058++0x03 line.long 0x00 "AXIM1_SLOT1_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94825060++0x03 line.long 0x00 "AXIM1_SLOT2_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94825068++0x03 line.long 0x00 "AXIM1_SLOT2_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94825070++0x07 line.long 0x00 "AXIM1_SLOT2_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM1_SLOT2_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94825078++0x03 line.long 0x00 "AXIM1_SLOT2_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94825080++0x03 line.long 0x00 "AXIM1_SLOT3_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94825088++0x03 line.long 0x00 "AXIM1_SLOT3_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94825090++0x07 line.long 0x00 "AXIM1_SLOT3_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM1_SLOT3_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94825098++0x03 line.long 0x00 "AXIM1_SLOT3_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94826000++0x03 "FIFO1_MEMORY - array[1024]" line.long 0x00 "FIFO1_MEMORY[0],FIFO data memory" button "DATA" "d ad:0x094826000++0x000000FFF /long" group.long ad:0x94830000++0x03 "MCS1_MEM - array[6144]" line.long 0x00 "MCS1_MEM[0],MCS[i] memory region" button "DATA" "d ad:0x094830000++0x000005FFF /long" tree.end tree "GTM_CLS2" group.long ad:0x94840800++0x07 line.long 0x00 "TIM2_CH0_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM2_CH0_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94840808++0x07 line.long 0x00 "TIM2_CH0_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM2_CH0_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94840810++0x2F line.long 0x00 "TIM2_CH0_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM2_CH0_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM2_CH0_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM2_CH0_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM2_CH0_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM2_CH0_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM2_CH0_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM2_CH0_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM2_CH0_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM2_CH0_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM2_CH0_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM2_CH0_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94840880++0x07 line.long 0x00 "TIM2_CH1_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM2_CH1_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94840888++0x07 line.long 0x00 "TIM2_CH1_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM2_CH1_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94840890++0x2F line.long 0x00 "TIM2_CH1_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM2_CH1_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM2_CH1_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM2_CH1_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM2_CH1_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM2_CH1_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM2_CH1_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM2_CH1_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM2_CH1_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM2_CH1_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM2_CH1_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM2_CH1_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94840900++0x07 line.long 0x00 "TIM2_CH2_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM2_CH2_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94840908++0x07 line.long 0x00 "TIM2_CH2_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM2_CH2_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94840910++0x2F line.long 0x00 "TIM2_CH2_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM2_CH2_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM2_CH2_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM2_CH2_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM2_CH2_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM2_CH2_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM2_CH2_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM2_CH2_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM2_CH2_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM2_CH2_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM2_CH2_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM2_CH2_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94840980++0x07 line.long 0x00 "TIM2_CH3_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM2_CH3_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94840988++0x07 line.long 0x00 "TIM2_CH3_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM2_CH3_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94840990++0x2F line.long 0x00 "TIM2_CH3_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM2_CH3_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM2_CH3_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM2_CH3_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM2_CH3_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM2_CH3_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM2_CH3_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM2_CH3_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM2_CH3_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM2_CH3_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM2_CH3_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM2_CH3_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94840A00++0x07 line.long 0x00 "TIM2_CH4_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM2_CH4_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94840A08++0x07 line.long 0x00 "TIM2_CH4_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM2_CH4_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94840A10++0x2F line.long 0x00 "TIM2_CH4_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM2_CH4_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM2_CH4_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM2_CH4_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM2_CH4_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM2_CH4_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM2_CH4_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM2_CH4_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM2_CH4_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM2_CH4_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM2_CH4_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM2_CH4_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94840A80++0x07 line.long 0x00 "TIM2_CH5_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM2_CH5_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94840A88++0x07 line.long 0x00 "TIM2_CH5_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM2_CH5_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94840A90++0x2F line.long 0x00 "TIM2_CH5_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM2_CH5_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM2_CH5_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM2_CH5_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM2_CH5_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM2_CH5_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM2_CH5_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM2_CH5_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM2_CH5_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM2_CH5_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM2_CH5_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM2_CH5_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94840B00++0x07 line.long 0x00 "TIM2_CH6_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM2_CH6_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94840B08++0x07 line.long 0x00 "TIM2_CH6_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM2_CH6_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94840B10++0x2F line.long 0x00 "TIM2_CH6_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM2_CH6_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM2_CH6_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM2_CH6_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM2_CH6_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM2_CH6_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM2_CH6_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM2_CH6_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM2_CH6_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM2_CH6_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM2_CH6_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM2_CH6_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" group.long ad:0x94840B80++0x07 line.long 0x00 "TIM2_CH7_GPR0,TIM[i] channel [x] general purpose 0 register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x00 0.--23. 1. "GPR0,Input signal characteristic parameter 0" line.long 0x04 "TIM2_CH7_GPR1,TIM[i] channel [x] general purpose 1 register" hexmask.long.byte 0x04 24.--31. 1. "ECNT,Edge counter value refers to TIM[i]_CH[x]_ECNT.ECNT[7:0]" hexmask.long.tbyte 0x04 0.--23. 1. "GPR1,Input signal characteristic parameter 1" rgroup.long ad:0x94840B88++0x07 line.long 0x00 "TIM2_CH7_CNT,TIM[i] channel [x] SMU counter register" hexmask.long.tbyte 0x00 0.--23. 1. "CNT,Actual SMU counter value" line.long 0x04 "TIM2_CH7_ECNT,TIM[i] channel [x] SMU edge counter register" hexmask.long.word 0x04 0.--15. 1. "ECNT,Edge counter" group.long ad:0x94840B90++0x2F line.long 0x00 "TIM2_CH7_CNTS,TIM[i] channel [x] SMU shadow counter register" hexmask.long.byte 0x00 24.--31. 1. "ECNT,Edge counter" hexmask.long.tbyte 0x00 0.--23. 1. "CNTS,Counter shadow register" line.long 0x04 "TIM2_CH7_TDUC,TIM[i] channel [x] TDU counter register" hexmask.long.byte 0x04 16.--23. 1. "TO_CNT2,Current Timeout value slice2 for channel [y]" hexmask.long.byte 0x04 8.--15. 1. "TO_CNT1,Current Timeout value slice1 for channel [y]" hexmask.long.byte 0x04 0.--7. 1. "TO_CNT,Current Timeout value slice0 for channel [y]" line.long 0x08 "TIM2_CH7_TDUV,TIM[i] channel [x] TDU control register" bitfld.long 0x08 28.--30. "TCS,Timeout clock selection" "0,1,2,3,4,5,6,7" bitfld.long 0x08 27. "TDU_SAME_CNT_CLK,Define clocking of TO_CNT TO_CNT1" "0,1" bitfld.long 0x08 26. "TCS_USE_SAMPLE_EVT,Use TDU_SAMPLE_EVT as Timeout Clock" "0,1" newline bitfld.long 0x08 24.--25. "SLICING,Cascading of counter slices" "0,1,2,3" hexmask.long.byte 0x08 16.--23. 1. "TOV2,Time out compare value slice2 for channel [y]" hexmask.long.byte 0x08 8.--15. 1. "TOV1,Time out compare value slice1 for channel [y]" newline hexmask.long.byte 0x08 0.--7. 1. "TOV,Time out compare value slice0 for channel [y]" line.long 0x0C "TIM2_CH7_FLT_RE,TIM[i] channel [x] filter parameter 0 register" hexmask.long.tbyte 0x0C 0.--23. 1. "FLT_RE,Filter parameter for rising edge" line.long 0x10 "TIM2_CH7_FLT_FE,TIM[i] channel [x] filter parameter 1 register" hexmask.long.tbyte 0x10 0.--23. 1. "FLT_FE,Filter parameter for falling edge" line.long 0x14 "TIM2_CH7_CTRL,TIM[i] channel [x] control register" bitfld.long 0x14 30.--31. "TOCTRL,Timeout control" "0,1,2,3" bitfld.long 0x14 29. "EGPR1_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR1_SEL bit field" "0,1" bitfld.long 0x14 28. "EGPR0_SEL,Extension of TIM[i]_CH[x]_CTRL.GPR0_SEL bit field" "0,1" newline bitfld.long 0x14 27. "FR_ECNT_OFL,Extended Edge counter overflow behavior" "0,1" bitfld.long 0x14 24.--26. "CLK_SEL,CMU clock source select for channel" "0,1,2,3,4,5,6,7" bitfld.long 0x14 23. "FLT_CTR_FE,Filter counter mode for falling edge" "0,1" newline bitfld.long 0x14 22. "FLT_MODE_FE,Filter mode for falling edge" "0,1" bitfld.long 0x14 21. "FLT_CTR_RE,Filter counter mode for rising edge" "0,1" bitfld.long 0x14 20. "FLT_MODE_RE,Filter mode for rising edge" "0,1" newline bitfld.long 0x14 19. "EXT_CAP_EN,Enables external capture mode" "0,1" bitfld.long 0x14 17.--18. "FLT_CNT_FRQ,Filter counter frequency select" "0,1,2,3" bitfld.long 0x14 16. "FLT_EN,Filter enable for channel [x]" "0,1" newline bitfld.long 0x14 15. "ECNT_RESET,Enables resetting of counter in certain modes" "0,1" bitfld.long 0x14 14. "ISL,Ignore signal level" "0,1" bitfld.long 0x14 13. "DSL,Signal level control" "0,1" newline bitfld.long 0x14 12. "CNTS_SEL,Selection for TIM[i]_CH[x]_CNTS register" "0,1" bitfld.long 0x14 10.--11. "GPR1_SEL,Selection for TIM[i]_CH[x]_GPR1 register" "0,1,2,3" bitfld.long 0x14 8.--9. "GPR0_SEL,Selection for TIM[i]_CH[x]_GPR0 register" "0,1,2,3" newline bitfld.long 0x14 6. "CICTRL,Channel Input Control" "0,1" bitfld.long 0x14 5. "ARU_EN,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 register values routed to ARU" "0,1" bitfld.long 0x14 4. "OSM,One-shot mode" "0,1" newline bitfld.long 0x14 1.--3. "TIM_MODE,TIM channel [x] mode" "0,1,2,3,4,5,6,7" bitfld.long 0x14 0. "TIM_EN,TIM channel [x] enable" "0,1" line.long 0x18 "TIM2_CH7_ECTRL,TIM[i] channel [x] extended control register" bitfld.long 0x18 31. "USE_PREV_CH_IN,Select input data source for TIM channel" "0,1" bitfld.long 0x18 30. "ECLK_SEL,Extension of bit field TIM[i]_CH[x]_CTRL.CLK_SEL" "0,1" bitfld.long 0x18 29. "IMM_START,Start the measurement immediately" "0,1" newline bitfld.long 0x18 28. "SWAP_CAPTURE,Swap point in time of capturing TIM[i]_CH[x]_CNTS and TIM[i]_CH[x]_GPR1" "0,1" bitfld.long 0x18 25. "EFLT_CTR_FE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_FE" "0,1" bitfld.long 0x18 24. "EFLT_CTR_RE,Extension of bit field TIM[i]_CH[x]_CTRL.FLT_CTR_RE" "0,1" newline bitfld.long 0x18 22.--23. "USE_LUT,Generate filter input by lookup table" "0,1,2,3" bitfld.long 0x18 16.--19. "TDU_RESYNC,Defines condition which will resynchronize the TDU unit" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 12.--14. "TDU_STOP,Defines condition which will stop the TDU unit" "0,1,2,3,4,5,6,7" newline bitfld.long 0x18 8.--10. "TDU_START,Defines condition which will start the TDU unit" "0,1,2,3,4,5,6,7" bitfld.long 0x18 6.--7. "TODET_IRQ_SRC,Selection of source for TIM_TODET_IRQ" "0,1,2,3" bitfld.long 0x18 5. "USE_PREV_TDU_IN,Select input data source for TDU" "0,1" newline bitfld.long 0x18 0.--3. "EXT_CAP_SRC,Defines selected source for triggering the TIM_EXT_CAPTURE functionality" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "TIM2_CH7_IRQ_NOTIFY,TIM[i] channel [x] interrupt notification register" bitfld.long 0x1C 5. "GLITCHDET,Glitch detected on channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 4. "TODET,Timeout reached for input signal of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 3. "GPROFL,TIM[i]_CH[x]_GPR0 and TIM[i]_CH[x]_GPR1 data overflow old data not read out before new data has arrived at input pin ([x]:0...m-1)" "0,1" newline bitfld.long 0x1C 2. "CNTOFL,SMU TIM[i]_CH[x]_CNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 1. "ECNTOFL,ECNT counter overflow of channel [x] ([x]:0...m-1)" "0,1" bitfld.long 0x1C 0. "NEWVAL,New measurement value detected by the channel [x] ([x]:0...m-1)" "0,1" line.long 0x20 "TIM2_CH7_IRQ_EN,TIM[i] channel [x] interrupt enable register" bitfld.long 0x20 5. "GLITCHDET_IRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 4. "TODET_IRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 3. "GPROFL_IRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x20 2. "CNTOFL_IRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 1. "ECNTOFL_IRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x20 0. "NEWVAL_IRQ_EN,TIM_NEWVAL_IRQ[x:x] interrupt enable" "0,1" line.long 0x24 "TIM2_CH7_IRQ_FORCINT,TIM[i] channel [x] force interrupt register" bitfld.long 0x24 5. "TRG_GLITCHDET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GLITCHDET by software" "0,1" bitfld.long 0x24 4. "TRG_TODET,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.TODET by software" "0,1" bitfld.long 0x24 3. "TRG_GPROFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.GPROFL by software" "0,1" newline bitfld.long 0x24 2. "TRG_CNTOFL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.CNTOFL by software" "0,1" bitfld.long 0x24 1. "TRG_ECNTOFL,Trigger the bit TIM_CHx_IRQ_NOTIFY.ECNTOFL by software" "0,1" bitfld.long 0x24 0. "TRG_NEWVAL,Trigger the bit TIM_CH[x]_IRQ_NOTIFY.NEWVAL by software" "0,1" line.long 0x28 "TIM2_CH7_IRQ_MODE,TIM[i] channel [x] interrupt mode configuration register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection of channel [x]" "0,1,2,3" line.long 0x2C "TIM2_CH7_EIRQ_EN,TIM[i] channel [x] error interrupt enable register" bitfld.long 0x2C 5. "GLITCHDET_EIRQ_EN,TIM_GLITCHDET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 4. "TODET_EIRQ_EN,TIM_TODET_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 3. "GPROFL_EIRQ_EN,TIM_GPROFL_IRQ[x:x] interrupt enable" "0,1" newline bitfld.long 0x2C 2. "CNTOFL_EIRQ_EN,TIM_CNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 1. "ECNTOFL_EIRQ_EN,TIM_ECNTOFL_IRQ[x:x] interrupt enable" "0,1" bitfld.long 0x2C 0. "NEWVAL_EIRQ_EN,TIM_NEWVAL[x]_EIRQ error interrupt enable" "0,1" rgroup.long ad:0x94840C00++0x03 line.long 0x00 "TIM2_INP_VAL,TIM[i] input value observation register" bitfld.long 0x00 23. "TIM_IN7,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 22. "TIM_IN6,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 21. "TIM_IN5,Signal channel [x] after TIM input signal synchronization" "0,1" newline bitfld.long 0x00 20. "TIM_IN4,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 19. "TIM_IN3,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 18. "TIM_IN2,Signal channel [x] after TIM input signal synchronization" "0,1" newline bitfld.long 0x00 17. "TIM_IN1,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 16. "TIM_IN0,Signal channel [x] after TIM input signal synchronization" "0,1" bitfld.long 0x00 15. "F_IN7,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" newline bitfld.long 0x00 14. "F_IN6,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 13. "F_IN5,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 12. "F_IN4,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" newline bitfld.long 0x00 11. "F_IN3,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 10. "F_IN2,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 9. "F_IN1,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" newline bitfld.long 0x00 8. "F_IN0,Signal channel [x] after INPSRC selection before TIM FLT unit" "0,1" bitfld.long 0x00 7. "F_OUT7,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 6. "F_OUT6,Signal channel [x] after TIM FLT unit" "0,1" newline bitfld.long 0x00 5. "F_OUT5,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 4. "F_OUT4,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 3. "F_OUT3,Signal channel [x] after TIM FLT unit" "0,1" newline bitfld.long 0x00 2. "F_OUT2,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 1. "F_OUT1,Signal channel [x] after TIM FLT unit" "0,1" bitfld.long 0x00 0. "F_OUT0,Signal channel [x] after TIM FLT unit" "0,1" group.long ad:0x94840C04++0x07 line.long 0x00 "TIM2_IN_SRC,TIM[i] AUX IN source selection register" bitfld.long 0x00 30.--31. "MODE_7,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 28.--29. "VAL_7,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 26.--27. "MODE_6,Input source to channel [x]" "0,1,2,3" newline bitfld.long 0x00 24.--25. "VAL_6,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 22.--23. "MODE_5,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 20.--21. "VAL_5,Value to be fed to channel [x]" "0,1,2,3" newline bitfld.long 0x00 18.--19. "MODE_4,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 16.--17. "VAL_4,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 14.--15. "MODE_3,Input source to channel [x]" "0,1,2,3" newline bitfld.long 0x00 12.--13. "VAL_3,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 10.--11. "MODE_2,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 8.--9. "VAL_2,Value to be fed to channel [x]" "0,1,2,3" newline bitfld.long 0x00 6.--7. "MODE_1,Input source to channel [x]" "0,1,2,3" bitfld.long 0x00 4.--5. "VAL_1,Value to be fed to channel [x]" "0,1,2,3" bitfld.long 0x00 2.--3. "MODE_0,Input source to channel [x]" "0,1,2,3" newline bitfld.long 0x00 0.--1. "VAL_0,Value to be fed to channel [x]" "0,1,2,3" line.long 0x04 "TIM2_RST,TIM[i] global software reset register" bitfld.long 0x04 7. "RST_CH7,Software reset of channel [x]" "0,1" bitfld.long 0x04 6. "RST_CH6,Software reset of channel [x]" "0,1" bitfld.long 0x04 5. "RST_CH5,Software reset of channel [x]" "0,1" newline bitfld.long 0x04 4. "RST_CH4,Software reset of channel [x]" "0,1" bitfld.long 0x04 3. "RST_CH3,Software reset of channel [x]" "0,1" bitfld.long 0x04 2. "RST_CH2,Software reset of channel [x]" "0,1" newline bitfld.long 0x04 1. "RST_CH1,Software reset of channel [x]" "0,1" bitfld.long 0x04 0. "RST_CH0,Software reset of channel [x]" "0,1" group.long ad:0x94841000++0x2B line.long 0x00 "TOM2_CH0_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH0_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH0_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH0_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH0_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH0_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH0_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH0_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH0_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH0_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH0_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94841030++0x03 line.long 0x00 "TOM2_CH0_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841040++0x2B line.long 0x00 "TOM2_CH1_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH1_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH1_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH1_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH1_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH1_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH1_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH1_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH1_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH1_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH1_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94841070++0x03 line.long 0x00 "TOM2_CH1_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841080++0x2B line.long 0x00 "TOM2_CH2_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH2_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH2_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH2_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH2_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH2_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH2_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH2_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH2_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH2_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH2_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x948410B0++0x03 line.long 0x00 "TOM2_CH2_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948410C0++0x2B line.long 0x00 "TOM2_CH3_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH3_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH3_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH3_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH3_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH3_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH3_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH3_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH3_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH3_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH3_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x948410F0++0x03 line.long 0x00 "TOM2_CH3_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841100++0x2B line.long 0x00 "TOM2_CH4_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH4_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH4_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH4_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH4_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH4_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH4_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH4_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH4_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH4_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH4_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94841130++0x03 line.long 0x00 "TOM2_CH4_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841140++0x2B line.long 0x00 "TOM2_CH5_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH5_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH5_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH5_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH5_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH5_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH5_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH5_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH5_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH5_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH5_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94841170++0x03 line.long 0x00 "TOM2_CH5_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841180++0x2B line.long 0x00 "TOM2_CH6_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH6_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH6_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH6_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH6_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH6_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH6_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH6_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH6_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH6_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH6_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x948411B0++0x03 line.long 0x00 "TOM2_CH6_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948411C0++0x2B line.long 0x00 "TOM2_CH7_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 29. "GCM,Gated Counter Mode enable" "0,1" bitfld.long 0x00 28. "SPEM,SPE output mode enable for channel" "0,1" newline bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH7_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH7_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH7_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH7_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH7_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH7_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH7_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH7_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH7_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH7_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x948411F0++0x03 line.long 0x00 "TOM2_CH7_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841200++0x2B line.long 0x00 "TOM2_CH8_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" newline bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" newline bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" newline bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH8_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH8_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH8_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH8_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH8_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH8_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH8_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH8_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH8_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH8_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94841230++0x03 line.long 0x00 "TOM2_CH8_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841240++0x2B line.long 0x00 "TOM2_CH9_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 25. "SPE_TRIG,SPE trigger to reset TOM[i]_CH[x]_CN0" "0,1" newline bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" newline bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" newline bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH9_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH9_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH9_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH9_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH9_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH9_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH9_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH9_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH9_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH9_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94841270++0x03 line.long 0x00 "TOM2_CH9_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841280++0x2B line.long 0x00 "TOM2_CH10_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH10_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH10_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH10_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH10_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH10_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH10_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH10_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH10_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH10_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH10_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x948412B0++0x03 line.long 0x00 "TOM2_CH10_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948412C0++0x2B line.long 0x00 "TOM2_CH11_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH11_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH11_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH11_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH11_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH11_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH11_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH11_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH11_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH11_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH11_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x948412F0++0x03 line.long 0x00 "TOM2_CH11_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841300++0x2B line.long 0x00 "TOM2_CH12_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH12_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH12_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH12_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH12_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH12_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH12_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH12_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH12_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH12_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH12_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94841330++0x03 line.long 0x00 "TOM2_CH12_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841340++0x2B line.long 0x00 "TOM2_CH13_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH13_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH13_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH13_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH13_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH13_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH13_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH13_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH13_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH13_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH13_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94841370++0x03 line.long 0x00 "TOM2_CH13_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841380++0x2B line.long 0x00 "TOM2_CH14_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" newline bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" newline bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" newline bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH14_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH14_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH14_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH14_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH14_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH14_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH14_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH14_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH14_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH14_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x948413B0++0x03 line.long 0x00 "TOM2_CH14_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x948413C0++0x2B line.long 0x00 "TOM2_CH15_CTRL,TOM[i] channel [x] control register" bitfld.long 0x00 31. "FREEZE,TOM[i] Freeze Mode enable" "0,1" bitfld.long 0x00 27. "BITREV,Bit-reversing of output of counter TOM[i]_CH[x]_CN0" "0,1" bitfld.long 0x00 26. "OSM,One-shot mode" "0,1" newline bitfld.long 0x00 24. "TRIGOUT,Trigger output selection (output signal TOM_CH_TRIGOUT[x:x]) of module TOM channel [x]" "0,1" bitfld.long 0x00 23. "EXTTRIGOUT,Select TOM_EXT_TRIGIN[x:x] as potential output signal TOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x00 22. "EXT_TRIG,Select TOM_EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x00 21. "OSM_TRIG,One-shot pulse generation enabled by the selected trigger signal" "0,1" bitfld.long 0x00 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x00 18.--19. "UDMODE,Up-down counter mode" "0,1,2,3" newline bitfld.long 0x00 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x00 12.--15. "CLK_SRC,Clock source select for channel" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL,Signal level for pulse width" "0,1" newline bitfld.long 0x00 7. "SR0_TRIG,TOM[i]_CH[x]_SR0 is used to generate a trigger on output TOM_OUT_T[x:x] if equal to TOM[i]_CH[x]_CN0" "0,1" line.long 0x04 "TOM2_CH15_SR0,TOM[i] channel [x] CCU0 compare shadow register" hexmask.long.word 0x04 0.--15. 1. "SR0,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR0 for update of compare register TOM[i]_CH[x]_CM0" line.long 0x08 "TOM2_CH15_SR1,TOM[i] channel [x] CCU1 compare shadow register" hexmask.long.word 0x08 0.--15. 1. "SR1,TOM[i] channel [x] shadow register TOM[i]_CH[x]_SR1 for update of compare register TOM[i]_CH[x]_CM1" line.long 0x0C "TOM2_CH15_CM0,TOM[i] channel [x] CCU0 compare register" hexmask.long.word 0x0C 0.--15. 1. "CM0,TOM[i] channel [x] CCU0 compare register" line.long 0x10 "TOM2_CH15_CM1,TOM[i] channel [x] CCU1 compare register" hexmask.long.word 0x10 0.--15. 1. "CM1,TOM[i] channel [x] CCU1 compare register" line.long 0x14 "TOM2_CH15_CN0,TOM[i] channel [x] CCU0 counter" hexmask.long.word 0x14 0.--15. 1. "CN0,TOM[i] CCU0 counter" line.long 0x18 "TOM2_CH15_STAT,TOM[i] channel [x] status register" bitfld.long 0x18 29. "OSM_RTF,Oneshot mode retrigger failed flag" "0,1" rbitfld.long 0x18 0. "OL,Output level of output TOM_OUT[x:x]" "0,1" line.long 0x1C "TOM2_CH15_IRQ_NOTIFY,TOM[i] channel [x] interrupt notification register" bitfld.long 0x1C 1. "CCU1TC,CCU1 Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x1C 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x20 "TOM2_CH15_IRQ_EN,TOM[i] channel [x] interrupt enable register" bitfld.long 0x20 1. "CCU1TC_IRQ_EN,TOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x20 0. "CCU0TC_IRQ_EN,TOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x24 "TOM2_CH15_IRQ_FORCINT,TOM[i] channel [x] force interrupt register" bitfld.long 0x24 1. "TRG_CCU1TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x24 0. "TRG_CCU0TC,Trigger the bit TOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x28 "TOM2_CH15_IRQ_MODE,TOM[i] channel [x] interrupt mode register" bitfld.long 0x28 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x948413F0++0x03 line.long 0x00 "TOM2_CH15_CTRL_SR,TOM[i] channel [x] control shadow register" bitfld.long 0x00 12.--15. "CLK_SRC_SR,Shadow register for TOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11. "SL_SR,Shadow register for TOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841430++0x0F line.long 0x00 "TOM2_TGC0_GLB_CTRL,TOM[i] TGC [g] global control register" bitfld.long 0x00 30.--31. "UPEN_CTRL7,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 28.--29. "UPEN_CTRL6,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 26.--27. "UPEN_CTRL5,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 24.--25. "UPEN_CTRL4,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 22.--23. "UPEN_CTRL3,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 20.--21. "UPEN_CTRL2,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 18.--19. "UPEN_CTRL1,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 16.--17. "UPEN_CTRL0,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 15. "RST_CH7,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 14. "RST_CH6,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 13. "RST_CH5,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 12. "RST_CH4,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 11. "RST_CH3,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 10. "RST_CH2,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 9. "RST_CH1,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 8. "RST_CH0,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 0. "HOST_TRIG,Trigger request signal to update the register TOM[i]_TGC[g]_ENDIS_STAT TOM[i]_TGC[g]_OUTEN_STAT" "0,1" line.long 0x04 "TOM2_TGC0_ACT_TB,TOM[i] TGC [g] action time base register" bitfld.long 0x04 25.--26. "TBU_SEL,Selection of time base used for comparison" "0,1,2,3" bitfld.long 0x04 24. "TB_TRIG,Set trigger request" "0,1" hexmask.long.tbyte 0x04 0.--23. 1. "ACT_TB,Specifies the signed compare value with selected signal CCM[i]_TBU_TS0 CCM[i]_TBU_TS1 and CCM[i]_TBU_TS2" line.long 0x08 "TOM2_TGC0_FUPD_CTRL,TOM[i] TGC [g] force update control register" bitfld.long 0x08 30.--31. "RSTCN0_CH7,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 28.--29. "RSTCN0_CH6,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 26.--27. "RSTCN0_CH5,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 24.--25. "RSTCN0_CH4,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 22.--23. "RSTCN0_CH3,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 20.--21. "RSTCN0_CH2,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 18.--19. "RSTCN0_CH1,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 16.--17. "RSTCN0_CH0,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 14.--15. "FUPD_CTRL7,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 12.--13. "FUPD_CTRL6,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 10.--11. "FUPD_CTRL5,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 8.--9. "FUPD_CTRL4,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 6.--7. "FUPD_CTRL3,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 4.--5. "FUPD_CTRL2,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 2.--3. "FUPD_CTRL1,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 0.--1. "FUPD_CTRL0,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" line.long 0x0C "TOM2_TGC0_INT_TRIG,TOM[i] TGC [g] internal trigger control register" bitfld.long 0x0C 14.--15. "INT_TRIG7,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 12.--13. "INT_TRIG6,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 10.--11. "INT_TRIG5,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "INT_TRIG4,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 6.--7. "INT_TRIG3,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 4.--5. "INT_TRIG2,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "INT_TRIG1,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 0.--1. "INT_TRIG0,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" group.long ad:0x94841470++0x0F line.long 0x00 "TOM2_TGC0_ENDIS_CTRL,TOM[i] TGC [g] enable/disable control register" bitfld.long 0x00 14.--15. "ENDIS_CTRL7,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 12.--13. "ENDIS_CTRL6,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 10.--11. "ENDIS_CTRL5,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 8.--9. "ENDIS_CTRL4,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 6.--7. "ENDIS_CTRL3,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 4.--5. "ENDIS_CTRL2,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 2.--3. "ENDIS_CTRL1,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 0.--1. "ENDIS_CTRL0,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" line.long 0x04 "TOM2_TGC0_ENDIS_STAT,TOM[i] TGC [g] enable/disable status register" bitfld.long 0x04 14.--15. "ENDIS_STAT7,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 12.--13. "ENDIS_STAT6,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 10.--11. "ENDIS_STAT5,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 8.--9. "ENDIS_STAT4,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 6.--7. "ENDIS_STAT3,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 4.--5. "ENDIS_STAT2,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 2.--3. "ENDIS_STAT1,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 0.--1. "ENDIS_STAT0,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" line.long 0x08 "TOM2_TGC0_OUTEN_CTRL,TOM[i] TGC [g] output enable control register" bitfld.long 0x08 14.--15. "OUTEN_CTRL7,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 12.--13. "OUTEN_CTRL6,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 10.--11. "OUTEN_CTRL5,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 8.--9. "OUTEN_CTRL4,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 6.--7. "OUTEN_CTRL3,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 4.--5. "OUTEN_CTRL2,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 2.--3. "OUTEN_CTRL1,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 0.--1. "OUTEN_CTRL0,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" line.long 0x0C "TOM2_TGC0_OUTEN_STAT,TOM[i] TGC [g] output enable status register" bitfld.long 0x0C 14.--15. "OUTEN_STAT7,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 12.--13. "OUTEN_STAT6,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 10.--11. "OUTEN_STAT5,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "OUTEN_STAT4,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 6.--7. "OUTEN_STAT3,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 4.--5. "OUTEN_STAT2,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "OUTEN_STAT1,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 0.--1. "OUTEN_STAT0,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" group.long ad:0x948414B0++0x0F line.long 0x00 "TOM2_TGC1_GLB_CTRL,TOM[i] TGC [g] global control register" bitfld.long 0x00 30.--31. "UPEN_CTRL7,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 28.--29. "UPEN_CTRL6,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 26.--27. "UPEN_CTRL5,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 24.--25. "UPEN_CTRL4,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 22.--23. "UPEN_CTRL3,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 20.--21. "UPEN_CTRL2,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" newline bitfld.long 0x00 18.--19. "UPEN_CTRL1,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 16.--17. "UPEN_CTRL0,TOM[i] channel [x] ( x=c + g*8 ) enable update of register TOM[i]_CH[x]_CM0 TOM[i]_CH[x]_CM1 TOM[i]_CH[x]_CTRL.SL and TOM[i]_CH[x]_CTRL.CLK_SRC from TOM[i]_CH[x]_SR0 TOM[i]_CH[x]_SR1 TOM[i]_CH[x]_CTRL_SL.SL_SR and.." "0,1,2,3" bitfld.long 0x00 15. "RST_CH7,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 14. "RST_CH6,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 13. "RST_CH5,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 12. "RST_CH4,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 11. "RST_CH3,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 10. "RST_CH2,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 9. "RST_CH1,Software reset of channel [x] x = c + g*8" "0,1" newline bitfld.long 0x00 8. "RST_CH0,Software reset of channel [x] x = c + g*8" "0,1" bitfld.long 0x00 0. "HOST_TRIG,Trigger request signal to update the register TOM[i]_TGC[g]_ENDIS_STAT TOM[i]_TGC[g]_OUTEN_STAT" "0,1" line.long 0x04 "TOM2_TGC1_ACT_TB,TOM[i] TGC [g] action time base register" bitfld.long 0x04 25.--26. "TBU_SEL,Selection of time base used for comparison" "0,1,2,3" bitfld.long 0x04 24. "TB_TRIG,Set trigger request" "0,1" hexmask.long.tbyte 0x04 0.--23. 1. "ACT_TB,Specifies the signed compare value with selected signal CCM[i]_TBU_TS0 CCM[i]_TBU_TS1 and CCM[i]_TBU_TS2" line.long 0x08 "TOM2_TGC1_FUPD_CTRL,TOM[i] TGC [g] force update control register" bitfld.long 0x08 30.--31. "RSTCN0_CH7,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 28.--29. "RSTCN0_CH6,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 26.--27. "RSTCN0_CH5,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 24.--25. "RSTCN0_CH4,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 22.--23. "RSTCN0_CH3,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 20.--21. "RSTCN0_CH2,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" newline bitfld.long 0x08 18.--19. "RSTCN0_CH1,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 16.--17. "RSTCN0_CH0,Reset TOM[i]_CH[x]_CN0 of channel [x] (x=c + g*8) with the force update event" "0,1,2,3" bitfld.long 0x08 14.--15. "FUPD_CTRL7,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 12.--13. "FUPD_CTRL6,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 10.--11. "FUPD_CTRL5,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 8.--9. "FUPD_CTRL4,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 6.--7. "FUPD_CTRL3,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 4.--5. "FUPD_CTRL2,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" bitfld.long 0x08 2.--3. "FUPD_CTRL1,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" newline bitfld.long 0x08 0.--1. "FUPD_CTRL0,Force update control of operation registers of TOM[i] channel [x] (x = c + g*8)" "0,1,2,3" line.long 0x0C "TOM2_TGC1_INT_TRIG,TOM[i] TGC [g] internal trigger control register" bitfld.long 0x0C 14.--15. "INT_TRIG7,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 12.--13. "INT_TRIG6,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 10.--11. "INT_TRIG5,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "INT_TRIG4,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 6.--7. "INT_TRIG3,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 4.--5. "INT_TRIG2,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "INT_TRIG1,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" bitfld.long 0x0C 0.--1. "INT_TRIG0,Select input signal TOM_CH_TRIGOUT[x:x] as a trigger source for TGC[g] (x=c + g*8)" "0,1,2,3" group.long ad:0x948414F0++0x0F line.long 0x00 "TOM2_TGC1_ENDIS_CTRL,TOM[i] TGC [g] enable/disable control register" bitfld.long 0x00 14.--15. "ENDIS_CTRL7,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 12.--13. "ENDIS_CTRL6,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 10.--11. "ENDIS_CTRL5,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 8.--9. "ENDIS_CTRL4,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 6.--7. "ENDIS_CTRL3,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 4.--5. "ENDIS_CTRL2,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" newline bitfld.long 0x00 2.--3. "ENDIS_CTRL1,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" bitfld.long 0x00 0.--1. "ENDIS_CTRL0,TOM[i] channel [x] (x=c + g*8) enable/disable control register" "0,1,2,3" line.long 0x04 "TOM2_TGC1_ENDIS_STAT,TOM[i] TGC [g] enable/disable status register" bitfld.long 0x04 14.--15. "ENDIS_STAT7,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 12.--13. "ENDIS_STAT6,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 10.--11. "ENDIS_STAT5,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 8.--9. "ENDIS_STAT4,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 6.--7. "ENDIS_STAT3,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 4.--5. "ENDIS_STAT2,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" newline bitfld.long 0x04 2.--3. "ENDIS_STAT1,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" bitfld.long 0x04 0.--1. "ENDIS_STAT0,TOM[i] channel [x] ( x=c + g*8 ) enable/disable status register" "0,1,2,3" line.long 0x08 "TOM2_TGC1_OUTEN_CTRL,TOM[i] TGC [g] output enable control register" bitfld.long 0x08 14.--15. "OUTEN_CTRL7,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 12.--13. "OUTEN_CTRL6,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 10.--11. "OUTEN_CTRL5,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 8.--9. "OUTEN_CTRL4,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 6.--7. "OUTEN_CTRL3,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 4.--5. "OUTEN_CTRL2,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x08 2.--3. "OUTEN_CTRL1,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x08 0.--1. "OUTEN_CTRL0,Output enable control of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" line.long 0x0C "TOM2_TGC1_OUTEN_STAT,TOM[i] TGC [g] output enable status register" bitfld.long 0x0C 14.--15. "OUTEN_STAT7,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 12.--13. "OUTEN_STAT6,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 10.--11. "OUTEN_STAT5,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "OUTEN_STAT4,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 6.--7. "OUTEN_STAT3,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 4.--5. "OUTEN_STAT2,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "OUTEN_STAT1,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" bitfld.long 0x0C 0.--1. "OUTEN_STAT0,Output enable status of TOM [i] channel [x] ouput TOM_OUT[x:x] x=c+g*8" "0,1,2,3" group.long ad:0x94841800++0x37 line.long 0x00 "ATOM2_CH0_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM2_CH0_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM2_CH0_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM2_CH0_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM2_CH0_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM2_CH0_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM2_CH0_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM2_CH0_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM2_CH0_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM2_CH0_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM2_CH0_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM2_CH0_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM2_CH0_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM2_CH0_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841880++0x37 line.long 0x00 "ATOM2_CH1_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM2_CH1_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM2_CH1_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM2_CH1_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM2_CH1_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM2_CH1_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM2_CH1_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM2_CH1_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM2_CH1_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM2_CH1_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM2_CH1_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM2_CH1_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM2_CH1_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM2_CH1_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841900++0x37 line.long 0x00 "ATOM2_CH2_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM2_CH2_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM2_CH2_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM2_CH2_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM2_CH2_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM2_CH2_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM2_CH2_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM2_CH2_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM2_CH2_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM2_CH2_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM2_CH2_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM2_CH2_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM2_CH2_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM2_CH2_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841980++0x37 line.long 0x00 "ATOM2_CH3_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM2_CH3_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM2_CH3_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM2_CH3_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM2_CH3_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM2_CH3_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM2_CH3_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM2_CH3_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM2_CH3_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM2_CH3_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM2_CH3_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM2_CH3_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM2_CH3_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM2_CH3_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841A00++0x37 line.long 0x00 "ATOM2_CH4_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM2_CH4_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM2_CH4_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM2_CH4_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM2_CH4_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM2_CH4_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM2_CH4_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM2_CH4_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM2_CH4_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM2_CH4_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM2_CH4_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM2_CH4_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM2_CH4_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM2_CH4_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841A80++0x37 line.long 0x00 "ATOM2_CH5_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM2_CH5_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM2_CH5_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM2_CH5_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM2_CH5_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM2_CH5_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM2_CH5_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM2_CH5_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM2_CH5_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM2_CH5_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM2_CH5_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM2_CH5_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM2_CH5_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM2_CH5_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841B00++0x37 line.long 0x00 "ATOM2_CH6_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM2_CH6_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM2_CH6_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM2_CH6_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM2_CH6_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM2_CH6_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM2_CH6_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM2_CH6_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM2_CH6_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM2_CH6_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM2_CH6_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM2_CH6_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM2_CH6_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM2_CH6_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841B80++0x37 line.long 0x00 "ATOM2_CH7_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM2_CH7_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM2_CH7_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM2_CH7_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM2_CH7_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM2_CH7_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM2_CH7_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM2_CH7_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM2_CH7_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM2_CH7_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM2_CH7_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM2_CH7_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM2_CH7_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM2_CH7_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94841C40++0x1F line.long 0x00 "ATOM2_AGC_GLB_CTRL,ATOM[i] AGC global control register" bitfld.long 0x00 30.--31. "UPEN_CTRL7,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 28.--29. "UPEN_CTRL6,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 26.--27. "UPEN_CTRL5,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" newline bitfld.long 0x00 24.--25. "UPEN_CTRL4,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 22.--23. "UPEN_CTRL3,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 20.--21. "UPEN_CTRL2,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" newline bitfld.long 0x00 18.--19. "UPEN_CTRL1,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 16.--17. "UPEN_CTRL0,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 15. "RST_CH7,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 14. "RST_CH6,Software reset of channel [k]" "0,1" bitfld.long 0x00 13. "RST_CH5,Software reset of channel [k]" "0,1" bitfld.long 0x00 12. "RST_CH4,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 11. "RST_CH3,Software reset of channel [k]" "0,1" bitfld.long 0x00 10. "RST_CH2,Software reset of channel [k]" "0,1" bitfld.long 0x00 9. "RST_CH1,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 8. "RST_CH0,Software reset of channel [k]" "0,1" bitfld.long 0x00 0. "HOST_TRIG,Trigger request signal (see AGC) to update the register ATOM[i]_AGC_ENDIS_STAT and ATOM[i]_AGC_OUTEN_STAT" "0,1" line.long 0x04 "ATOM2_AGC_ENDIS_CTRL,ATOM[i] AGC enable/disable control register" bitfld.long 0x04 14.--15. "ENDIS_CTRL7,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 12.--13. "ENDIS_CTRL6,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 10.--11. "ENDIS_CTRL5,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" newline bitfld.long 0x04 8.--9. "ENDIS_CTRL4,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 6.--7. "ENDIS_CTRL3,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 4.--5. "ENDIS_CTRL2,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" newline bitfld.long 0x04 2.--3. "ENDIS_CTRL1,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 0.--1. "ENDIS_CTRL0,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" line.long 0x08 "ATOM2_AGC_ENDIS_STAT,ATOM[i] AGC enable/disable status register" bitfld.long 0x08 14.--15. "ENDIS_STAT7,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 12.--13. "ENDIS_STAT6,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 10.--11. "ENDIS_STAT5,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" newline bitfld.long 0x08 8.--9. "ENDIS_STAT4,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 6.--7. "ENDIS_STAT3,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 4.--5. "ENDIS_STAT2,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" newline bitfld.long 0x08 2.--3. "ENDIS_STAT1,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 0.--1. "ENDIS_STAT0,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" line.long 0x0C "ATOM2_AGC_ACT_TB,ATOM[i] AGC action time base register" bitfld.long 0x0C 25.--26. "TBU_SEL,Selection of time base used for comparison" "0,1,2,3" bitfld.long 0x0C 24. "TB_TRIG,Set trigger request" "0,1" hexmask.long.tbyte 0x0C 0.--23. 1. "ACT_TB,Specifies the signed compare value with selected signal CCM[i]_TBU_TS0/CCM[i]_TBU_TS1/CCM[i]_TBU_TS2" line.long 0x10 "ATOM2_AGC_OUTEN_CTRL,ATOM[i] AGC output enable control register" bitfld.long 0x10 14.--15. "OUTEN_CTRL7,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 12.--13. "OUTEN_CTRL6,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 10.--11. "OUTEN_CTRL5,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" newline bitfld.long 0x10 8.--9. "OUTEN_CTRL4,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 6.--7. "OUTEN_CTRL3,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 4.--5. "OUTEN_CTRL2,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" newline bitfld.long 0x10 2.--3. "OUTEN_CTRL1,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 0.--1. "OUTEN_CTRL0,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" line.long 0x14 "ATOM2_AGC_OUTEN_STAT,ATOM[i] AGC output enable status register" bitfld.long 0x14 14.--15. "OUTEN_STAT7,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 12.--13. "OUTEN_STAT6,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 10.--11. "OUTEN_STAT5,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" newline bitfld.long 0x14 8.--9. "OUTEN_STAT4,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 6.--7. "OUTEN_STAT3,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 4.--5. "OUTEN_STAT2,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" newline bitfld.long 0x14 2.--3. "OUTEN_STAT1,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 0.--1. "OUTEN_STAT0,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" line.long 0x18 "ATOM2_AGC_FUPD_CTRL,ATOM[i] AGC force update control register" bitfld.long 0x18 30.--31. "RSTCN0_CH7,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 28.--29. "RSTCN0_CH6,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 26.--27. "RSTCN0_CH5,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" newline bitfld.long 0x18 24.--25. "RSTCN0_CH4,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 22.--23. "RSTCN0_CH3,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 20.--21. "RSTCN0_CH2,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" newline bitfld.long 0x18 18.--19. "RSTCN0_CH1,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 16.--17. "RSTCN0_CH0,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 14.--15. "FUPD_CTRL7,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 12.--13. "FUPD_CTRL6,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 10.--11. "FUPD_CTRL5,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 8.--9. "FUPD_CTRL4,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 6.--7. "FUPD_CTRL3,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 4.--5. "FUPD_CTRL2,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 2.--3. "FUPD_CTRL1,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 0.--1. "FUPD_CTRL0,Force update of ATOM channel [k] operation registers" "0,1,2,3" line.long 0x1C "ATOM2_AGC_INT_TRIG,ATOM[i] AGC internal trigger control register" bitfld.long 0x1C 14.--15. "INT_TRIG7,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 12.--13. "INT_TRIG6,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 10.--11. "INT_TRIG5,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" newline bitfld.long 0x1C 8.--9. "INT_TRIG4,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 6.--7. "INT_TRIG3,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 4.--5. "INT_TRIG2,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" newline bitfld.long 0x1C 2.--3. "INT_TRIG1,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 0.--1. "INT_TRIG0,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" group.long ad:0x94842000++0x23 line.long 0x00 "MCS2_CH0_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS2_CH0_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS2_CH0_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS2_CH0_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS2_CH0_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS2_CH0_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS2_CH0_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS2_CH0_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS2_CH0_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94842024++0x03 line.long 0x00 "MCS2_CH0_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9484203C++0x03 line.long 0x00 "MCS2_CH0_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948420E0++0x17 line.long 0x00 "MCS2_CH0_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS2_CH0_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS2_CH0_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS2_CH0_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS2_CH0_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS2_CH0_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94842100++0x23 line.long 0x00 "MCS2_CH1_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS2_CH1_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS2_CH1_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS2_CH1_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS2_CH1_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS2_CH1_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS2_CH1_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS2_CH1_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS2_CH1_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94842124++0x03 line.long 0x00 "MCS2_CH1_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9484213C++0x03 line.long 0x00 "MCS2_CH1_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948421E0++0x17 line.long 0x00 "MCS2_CH1_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS2_CH1_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS2_CH1_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS2_CH1_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS2_CH1_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS2_CH1_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94842200++0x23 line.long 0x00 "MCS2_CH2_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS2_CH2_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS2_CH2_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS2_CH2_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS2_CH2_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS2_CH2_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS2_CH2_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS2_CH2_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS2_CH2_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94842224++0x03 line.long 0x00 "MCS2_CH2_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9484223C++0x03 line.long 0x00 "MCS2_CH2_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948422E0++0x17 line.long 0x00 "MCS2_CH2_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS2_CH2_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS2_CH2_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS2_CH2_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS2_CH2_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS2_CH2_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94842300++0x23 line.long 0x00 "MCS2_CH3_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS2_CH3_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS2_CH3_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS2_CH3_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS2_CH3_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS2_CH3_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS2_CH3_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS2_CH3_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS2_CH3_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94842324++0x03 line.long 0x00 "MCS2_CH3_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9484233C++0x03 line.long 0x00 "MCS2_CH3_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948423E0++0x17 line.long 0x00 "MCS2_CH3_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS2_CH3_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS2_CH3_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS2_CH3_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS2_CH3_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS2_CH3_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94842400++0x23 line.long 0x00 "MCS2_CH4_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS2_CH4_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS2_CH4_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS2_CH4_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS2_CH4_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS2_CH4_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS2_CH4_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS2_CH4_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS2_CH4_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94842424++0x03 line.long 0x00 "MCS2_CH4_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9484243C++0x03 line.long 0x00 "MCS2_CH4_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948424E0++0x17 line.long 0x00 "MCS2_CH4_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS2_CH4_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS2_CH4_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS2_CH4_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS2_CH4_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS2_CH4_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94842500++0x23 line.long 0x00 "MCS2_CH5_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS2_CH5_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS2_CH5_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS2_CH5_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS2_CH5_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS2_CH5_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS2_CH5_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS2_CH5_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS2_CH5_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94842524++0x03 line.long 0x00 "MCS2_CH5_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9484253C++0x03 line.long 0x00 "MCS2_CH5_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948425E0++0x17 line.long 0x00 "MCS2_CH5_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS2_CH5_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS2_CH5_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS2_CH5_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS2_CH5_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS2_CH5_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94842600++0x23 line.long 0x00 "MCS2_CH6_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS2_CH6_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS2_CH6_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS2_CH6_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS2_CH6_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS2_CH6_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS2_CH6_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS2_CH6_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS2_CH6_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94842624++0x03 line.long 0x00 "MCS2_CH6_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9484263C++0x03 line.long 0x00 "MCS2_CH6_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948426E0++0x17 line.long 0x00 "MCS2_CH6_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS2_CH6_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS2_CH6_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS2_CH6_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS2_CH6_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS2_CH6_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94842700++0x23 line.long 0x00 "MCS2_CH7_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS2_CH7_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS2_CH7_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS2_CH7_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS2_CH7_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS2_CH7_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS2_CH7_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS2_CH7_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS2_CH7_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94842724++0x03 line.long 0x00 "MCS2_CH7_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9484273C++0x03 line.long 0x00 "MCS2_CH7_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948427E0++0x17 line.long 0x00 "MCS2_CH7_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS2_CH7_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS2_CH7_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS2_CH7_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS2_CH7_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS2_CH7_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94842E28++0x07 line.long 0x00 "MCS2_CTRG,MCS[i] clear trigger control register" bitfld.long 0x00 23. "TRG23,Trigger bit [o]" "0,1" bitfld.long 0x00 22. "TRG22,Trigger bit [o]" "0,1" bitfld.long 0x00 21. "TRG21,Trigger bit [o]" "0,1" newline bitfld.long 0x00 20. "TRG20,Trigger bit [o]" "0,1" bitfld.long 0x00 19. "TRG19,Trigger bit [o]" "0,1" bitfld.long 0x00 18. "TRG18,Trigger bit [o]" "0,1" newline bitfld.long 0x00 17. "TRG17,Trigger bit [o]" "0,1" bitfld.long 0x00 16. "TRG16,Trigger bit [o]" "0,1" bitfld.long 0x00 15. "TRG15,Trigger bit [n]" "0,1" newline bitfld.long 0x00 14. "TRG14,Trigger bit [n]" "0,1" bitfld.long 0x00 13. "TRG13,Trigger bit [n]" "0,1" bitfld.long 0x00 12. "TRG12,Trigger bit [n]" "0,1" newline bitfld.long 0x00 11. "TRG11,Trigger bit [n]" "0,1" bitfld.long 0x00 10. "TRG10,Trigger bit [n]" "0,1" bitfld.long 0x00 9. "TRG9,Trigger bit [n]" "0,1" newline bitfld.long 0x00 8. "TRG8,Trigger bit [n]" "0,1" bitfld.long 0x00 7. "TRG7,Trigger bit [m]" "0,1" bitfld.long 0x00 6. "TRG6,Trigger bit [m]" "0,1" newline bitfld.long 0x00 5. "TRG5,Trigger bit [m]" "0,1" bitfld.long 0x00 4. "TRG4,Trigger bit [m]" "0,1" bitfld.long 0x00 3. "TRG3,Trigger bit [m]" "0,1" newline bitfld.long 0x00 2. "TRG2,Trigger bit [m]" "0,1" bitfld.long 0x00 1. "TRG1,Trigger bit [m]" "0,1" bitfld.long 0x00 0. "TRG0,Trigger bit [m]" "0,1" line.long 0x04 "MCS2_STRG,MCS[i] set trigger control register" bitfld.long 0x04 23. "TRG23,Trigger bit [k]" "0,1" bitfld.long 0x04 22. "TRG22,Trigger bit [k]" "0,1" bitfld.long 0x04 21. "TRG21,Trigger bit [k]" "0,1" newline bitfld.long 0x04 20. "TRG20,Trigger bit [k]" "0,1" bitfld.long 0x04 19. "TRG19,Trigger bit [k]" "0,1" bitfld.long 0x04 18. "TRG18,Trigger bit [k]" "0,1" newline bitfld.long 0x04 17. "TRG17,Trigger bit [k]" "0,1" bitfld.long 0x04 16. "TRG16,Trigger bit [k]" "0,1" bitfld.long 0x04 15. "TRG15,Trigger bit [k]" "0,1" newline bitfld.long 0x04 14. "TRG14,Trigger bit [k]" "0,1" bitfld.long 0x04 13. "TRG13,Trigger bit [k]" "0,1" bitfld.long 0x04 12. "TRG12,Trigger bit [k]" "0,1" newline bitfld.long 0x04 11. "TRG11,Trigger bit [k]" "0,1" bitfld.long 0x04 10. "TRG10,Trigger bit [k]" "0,1" bitfld.long 0x04 9. "TRG9,Trigger bit [k]" "0,1" newline bitfld.long 0x04 8. "TRG8,Trigger bit [k]" "0,1" bitfld.long 0x04 7. "TRG7,Trigger bit [k]" "0,1" bitfld.long 0x04 6. "TRG6,Trigger bit [k]" "0,1" newline bitfld.long 0x04 5. "TRG5,Trigger bit [k]" "0,1" bitfld.long 0x04 4. "TRG4,Trigger bit [k]" "0,1" bitfld.long 0x04 3. "TRG3,Trigger bit [k]" "0,1" newline bitfld.long 0x04 2. "TRG2,Trigger bit [k]" "0,1" bitfld.long 0x04 1. "TRG1,Trigger bit [k]" "0,1" bitfld.long 0x04 0. "TRG0,Trigger bit [k]" "0,1" group.long ad:0x94842F00++0x13 line.long 0x00 "MCS2_CTRL_STAT,MCS[i] control and status register" bitfld.long 0x00 26. "HLT_AEIM_ERR,Halt on AEI bus master error" "0,1" bitfld.long 0x00 25. "EN_HVD,Enable Modified Harvard architecture" "0,1" bitfld.long 0x00 24. "EN_TIM_FOUT,Enable routing of TIM[i]_CH[x]_F_OUT signal" "0,1" newline rbitfld.long 0x00 20.--22. "ERR_SRC_ID,Error source identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16. "RAM_RST,RAM reset bit" "0,1" bitfld.long 0x00 8.--11. "SCD_CH,Channel selection for scheduling algorithm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0.--1. "SCD_MODE,Select MCS scheduling mode" "0,1,2,3" line.long 0x04 "MCS2_RESET,MCS[i] reset register" bitfld.long 0x04 7. "RST7,Software reset of channel x" "0,1" bitfld.long 0x04 6. "RST6,Software reset of channel x" "0,1" bitfld.long 0x04 5. "RST5,Software reset of channel x" "0,1" newline bitfld.long 0x04 4. "RST4,Software reset of channel x" "0,1" bitfld.long 0x04 3. "RST3,Software reset of channel x" "0,1" bitfld.long 0x04 2. "RST2,Software reset of channel x" "0,1" newline bitfld.long 0x04 1. "RST1,Software reset of channel x" "0,1" bitfld.long 0x04 0. "RST0,Software reset of channel x" "0,1" line.long 0x08 "MCS2_CAT,MCS[i] cancel ARU transfer instruction" bitfld.long 0x08 7. "CAT7,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 6. "CAT6,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 5. "CAT5,Cancel ARU transfer of channel x" "0,1" newline bitfld.long 0x08 4. "CAT4,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 3. "CAT3,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 2. "CAT2,Cancel ARU transfer of channel x" "0,1" newline bitfld.long 0x08 1. "CAT1,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 0. "CAT0,Cancel ARU transfer of channel x" "0,1" line.long 0x0C "MCS2_CWT,MCS[i] cancel waiting instruction" bitfld.long 0x0C 7. "CWT7,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 6. "CWT6,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 5. "CWT5,Cancel waiting instruction for channel x" "0,1" newline bitfld.long 0x0C 4. "CWT4,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 3. "CWT3,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 2. "CWT2,Cancel waiting instruction for channel x" "0,1" newline bitfld.long 0x0C 1. "CWT1,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 0. "CWT0,Cancel waiting instruction for channel x" "0,1" line.long 0x10 "MCS2_ERR,MCS[i] error register" bitfld.long 0x10 7. "ERR7,Error State of MCS-channel x" "0,1" bitfld.long 0x10 6. "ERR6,Error State of MCS-channel x" "0,1" bitfld.long 0x10 5. "ERR5,Error State of MCS-channel x" "0,1" newline bitfld.long 0x10 4. "ERR4,Error State of MCS-channel x" "0,1" bitfld.long 0x10 3. "ERR3,Error State of MCS-channel x" "0,1" bitfld.long 0x10 2. "ERR2,Error State of MCS-channel x" "0,1" newline bitfld.long 0x10 1. "ERR1,Error State of MCS-channel x" "0,1" bitfld.long 0x10 0. "ERR0,Error State of MCS-channel x" "0,1" group.long ad:0x94842F1C++0x13 line.long 0x00 "MCS2_REG_PROT,MCS[i] write protection register" bitfld.long 0x00 14.--15. "WPROT7,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 12.--13. "WPROT6,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 10.--11. "WPROT5,Register Write Protection of MCS-channel [x]" "0,1,2,3" newline bitfld.long 0x00 8.--9. "WPROT4,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 6.--7. "WPROT3,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 4.--5. "WPROT2,Register Write Protection of MCS-channel [x]" "0,1,2,3" newline bitfld.long 0x00 2.--3. "WPROT1,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 0.--1. "WPROT0,Register Write Protection of MCS-channel [x]" "0,1,2,3" line.long 0x04 "MCS2_SINT_IRQ_NOTIFY,MCS[i] shared interrupt notification register" bitfld.long 0x04 7. "S_IRQ7,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 6. "S_IRQ6,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 5. "S_IRQ5,Shared interrupt [k] notify flag" "0,1" newline bitfld.long 0x04 4. "S_IRQ4,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 3. "S_IRQ3,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 2. "S_IRQ2,Shared interrupt [k] notify flag" "0,1" newline bitfld.long 0x04 1. "S_IRQ1,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 0. "S_IRQ0,Shared interrupt [k] notify flag" "0,1" line.long 0x08 "MCS2_SINT_IRQ_EN,MCS[i] shared interrupt enable register" bitfld.long 0x08 7. "S_IRQ7_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 6. "S_IRQ6_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 5. "S_IRQ5_EN,Shared interrupt [k]" "0,1" newline bitfld.long 0x08 4. "S_IRQ4_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 3. "S_IRQ3_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 2. "S_IRQ2_EN,Shared interrupt [k]" "0,1" newline bitfld.long 0x08 1. "S_IRQ1_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 0. "S_IRQ0_EN,Shared interrupt [k]" "0,1" line.long 0x0C "MCS2_SINT_IRQ_FORCINT,MCS[i] force shared interrupt register" bitfld.long 0x0C 7. "TRG_S_IRQ7,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 6. "TRG_S_IRQ6,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 5. "TRG_S_IRQ5,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" newline bitfld.long 0x0C 4. "TRG_S_IRQ4,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 3. "TRG_S_IRQ3,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 2. "TRG_S_IRQ2,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" newline bitfld.long 0x0C 1. "TRG_S_IRQ1,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 0. "TRG_S_IRQ0,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" line.long 0x10 "MCS2_SINT_IRQ_MODE,MCS[i] shared interrupt mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94842F40++0x1B line.long 0x00 "MCS2_HBP0_CTRL,MCS[i] hardware break point h control register" bitfld.long 0x00 17. "NOT,Logical negation of h-th hardware break point" "0,1" bitfld.long 0x00 16. "AND,Logical AND conjunction of h-th hardware break point" "0,1" bitfld.long 0x00 12.--14. "TYPE,Define type of h-th hardware break point" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 8.--9. "SCOPE,Define scope of h-th hardware break point" "0,1,2,3" bitfld.long 0x00 7. "EN_CH7,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 6. "EN_CH6,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 5. "EN_CH5,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 4. "EN_CH4,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 3. "EN_CH3,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 2. "EN_CH2,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 1. "EN_CH1,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 0. "EN_CH0,Enable h-th hardware break point for channel x" "0,1" line.long 0x04 "MCS2_HBP0_PATTERN,MCS[i] hardware break point pattern register" line.long 0x08 "MCS2_HBP0_STATUS,MCS[i] hardware break point status register" bitfld.long 0x08 7. "HALT_CH7,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 6. "HALT_CH6,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 5. "HALT_CH5,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 4. "HALT_CH4,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 3. "HALT_CH3,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 2. "HALT_CH2,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 1. "HALT_CH1,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 0. "HALT_CH0,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" line.long 0x0C "MCS2_HBP0_IRQ_NOTIFY,MCS[i] hardware break point interrupt notification register" bitfld.long 0x0C 0. "HBP_IRQ,Interrupt notify flag of the h-th hardware break point" "0,1" line.long 0x10 "MCS2_HBP0_IRQ_EN,MCS[i] hardware break point interrupt enable register" bitfld.long 0x10 0. "HBP_IRQ_EN,Interrupt Enable bit of the h-th hardware break point" "0,1" line.long 0x14 "MCS2_HBP0_IRQ_FORCINT,MCS[i] force hardware break point interrupt register" bitfld.long 0x14 0. "TRG_HBP_IRQ,Trigger the bit MCS[i]_HBP[h]_IRQ_NOTIFY.HBP_IRQ by software" "0,1" line.long 0x18 "MCS2_HBP0_IRQ_MODE,MCS[i] break point h interrupt mode configuration register" bitfld.long 0x18 0.--1. "IRQ_MODE,IRQ mode selection for all break point interrupts" "0,1,2,3" group.long ad:0x94842F60++0x1B line.long 0x00 "MCS2_HBP1_CTRL,MCS[i] hardware break point h control register" bitfld.long 0x00 17. "NOT,Logical negation of h-th hardware break point" "0,1" bitfld.long 0x00 16. "AND,Logical AND conjunction of h-th hardware break point" "0,1" bitfld.long 0x00 12.--14. "TYPE,Define type of h-th hardware break point" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 8.--9. "SCOPE,Define scope of h-th hardware break point" "0,1,2,3" bitfld.long 0x00 7. "EN_CH7,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 6. "EN_CH6,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 5. "EN_CH5,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 4. "EN_CH4,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 3. "EN_CH3,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 2. "EN_CH2,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 1. "EN_CH1,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 0. "EN_CH0,Enable h-th hardware break point for channel x" "0,1" line.long 0x04 "MCS2_HBP1_PATTERN,MCS[i] hardware break point pattern register" line.long 0x08 "MCS2_HBP1_STATUS,MCS[i] hardware break point status register" bitfld.long 0x08 7. "HALT_CH7,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 6. "HALT_CH6,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 5. "HALT_CH5,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 4. "HALT_CH4,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 3. "HALT_CH3,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 2. "HALT_CH2,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 1. "HALT_CH1,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 0. "HALT_CH0,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" line.long 0x0C "MCS2_HBP1_IRQ_NOTIFY,MCS[i] hardware break point interrupt notification register" bitfld.long 0x0C 0. "HBP_IRQ,Interrupt notify flag of the h-th hardware break point" "0,1" line.long 0x10 "MCS2_HBP1_IRQ_EN,MCS[i] hardware break point interrupt enable register" bitfld.long 0x10 0. "HBP_IRQ_EN,Interrupt Enable bit of the h-th hardware break point" "0,1" line.long 0x14 "MCS2_HBP1_IRQ_FORCINT,MCS[i] force hardware break point interrupt register" bitfld.long 0x14 0. "TRG_HBP_IRQ,Trigger the bit MCS[i]_HBP[h]_IRQ_NOTIFY.HBP_IRQ by software" "0,1" line.long 0x18 "MCS2_HBP1_IRQ_MODE,MCS[i] break point h interrupt mode configuration register" bitfld.long 0x18 0.--1. "IRQ_MODE,IRQ mode selection for all break point interrupts" "0,1,2,3" group.long ad:0x94843000++0x17 line.long 0x00 "TIO2_G0_CH0_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO2_G0_CH0_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO2_G0_CH0_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO2_G0_CH0_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO2_G0_CH0_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO2_G0_CH0_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94843020++0x0B line.long 0x00 "TIO2_G0_CH0_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH0_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH0_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94843030++0x0B line.long 0x00 "TIO2_G0_CH0_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH0_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH0_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9484303C++0x03 line.long 0x00 "TIO2_G0_CH0_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94843040++0x17 line.long 0x00 "TIO2_G0_CH1_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO2_G0_CH1_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO2_G0_CH1_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO2_G0_CH1_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO2_G0_CH1_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO2_G0_CH1_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94843060++0x0B line.long 0x00 "TIO2_G0_CH1_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH1_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH1_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94843070++0x0B line.long 0x00 "TIO2_G0_CH1_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH1_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH1_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9484307C++0x03 line.long 0x00 "TIO2_G0_CH1_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94843080++0x17 line.long 0x00 "TIO2_G0_CH2_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO2_G0_CH2_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO2_G0_CH2_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO2_G0_CH2_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO2_G0_CH2_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO2_G0_CH2_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948430A0++0x0B line.long 0x00 "TIO2_G0_CH2_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH2_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH2_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948430B0++0x0B line.long 0x00 "TIO2_G0_CH2_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH2_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH2_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948430BC++0x03 line.long 0x00 "TIO2_G0_CH2_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x948430C0++0x17 line.long 0x00 "TIO2_G0_CH3_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO2_G0_CH3_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO2_G0_CH3_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO2_G0_CH3_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO2_G0_CH3_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO2_G0_CH3_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948430E0++0x0B line.long 0x00 "TIO2_G0_CH3_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH3_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH3_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948430F0++0x0B line.long 0x00 "TIO2_G0_CH3_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH3_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH3_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948430FC++0x03 line.long 0x00 "TIO2_G0_CH3_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94843100++0x17 line.long 0x00 "TIO2_G0_CH4_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO2_G0_CH4_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO2_G0_CH4_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO2_G0_CH4_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO2_G0_CH4_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO2_G0_CH4_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94843120++0x0B line.long 0x00 "TIO2_G0_CH4_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH4_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH4_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94843130++0x0B line.long 0x00 "TIO2_G0_CH4_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH4_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH4_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9484313C++0x03 line.long 0x00 "TIO2_G0_CH4_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94843140++0x17 line.long 0x00 "TIO2_G0_CH5_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO2_G0_CH5_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO2_G0_CH5_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO2_G0_CH5_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO2_G0_CH5_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO2_G0_CH5_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94843160++0x0B line.long 0x00 "TIO2_G0_CH5_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH5_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH5_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94843170++0x0B line.long 0x00 "TIO2_G0_CH5_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH5_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH5_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9484317C++0x03 line.long 0x00 "TIO2_G0_CH5_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94843180++0x17 line.long 0x00 "TIO2_G0_CH6_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO2_G0_CH6_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO2_G0_CH6_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO2_G0_CH6_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO2_G0_CH6_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO2_G0_CH6_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948431A0++0x0B line.long 0x00 "TIO2_G0_CH6_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH6_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH6_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948431B0++0x0B line.long 0x00 "TIO2_G0_CH6_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH6_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH6_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948431BC++0x03 line.long 0x00 "TIO2_G0_CH6_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x948431C0++0x17 line.long 0x00 "TIO2_G0_CH7_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO2_G0_CH7_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO2_G0_CH7_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO2_G0_CH7_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO2_G0_CH7_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO2_G0_CH7_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948431E0++0x0B line.long 0x00 "TIO2_G0_CH7_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH7_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH7_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948431F0++0x0B line.long 0x00 "TIO2_G0_CH7_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO2_G0_CH7_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO2_G0_CH7_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948431FC++0x03 line.long 0x00 "TIO2_G0_CH7_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94843200++0x07 line.long 0x00 "TIO2_G0_ISEL0_CTRL1,TIO[i] input selection register 1" bitfld.long 0x00 27. "WRITE_EN3,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 26. "WRITE_EN2,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 25. "WRITE_EN1,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" newline bitfld.long 0x00 24. "WRITE_EN0,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 19. "OUT_SEL3,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 18. "OUT_SEL2,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" newline bitfld.long 0x00 17. "OUT_SEL1,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 16. "OUT_SEL0,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 12.--15. "LUT2_3,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "LUT2_2,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "LUT2_1,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "LUT2_0,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "TIO2_G0_ISEL0_CTRL2,TIO[i] input selection register 2" bitfld.long 0x04 22. "LUT3IN_SEL2,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 21. "LUT3IN_SEL1,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 20. "LUT3IN_SEL0,select source for LUT3_IN[k] signal in quad = [q]" "0,1" newline bitfld.long 0x04 16.--17. "QOUT_SEL,select source for ISEL_QOUT[q] signal in quad = [q]" "0,1,2,3" hexmask.long.byte 0x04 0.--7. 1. "LUT3,3 bit Lookup table function for quad=[q] channels [q]*4+2" group.long ad:0x94843220++0x07 line.long 0x00 "TIO2_G0_ISEL1_CTRL1,TIO[i] input selection register 1" bitfld.long 0x00 27. "WRITE_EN3,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 26. "WRITE_EN2,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 25. "WRITE_EN1,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" newline bitfld.long 0x00 24. "WRITE_EN0,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 19. "OUT_SEL3,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 18. "OUT_SEL2,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" newline bitfld.long 0x00 17. "OUT_SEL1,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 16. "OUT_SEL0,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 12.--15. "LUT2_3,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "LUT2_2,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "LUT2_1,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "LUT2_0,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "TIO2_G0_ISEL1_CTRL2,TIO[i] input selection register 2" bitfld.long 0x04 22. "LUT3IN_SEL2,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 21. "LUT3IN_SEL1,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 20. "LUT3IN_SEL0,select source for LUT3_IN[k] signal in quad = [q]" "0,1" newline bitfld.long 0x04 16.--17. "QOUT_SEL,select source for ISEL_QOUT[q] signal in quad = [q]" "0,1,2,3" hexmask.long.byte 0x04 0.--7. 1. "LUT3,3 bit Lookup table function for quad=[q] channels [q]*4+2" group.long ad:0x94843240++0x03 line.long 0x00 "TIO2_G0_OP_USAGE,TIO[i] operand usage selection register" bitfld.long 0x00 31. "WRITE_EN7,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 30. "WRITE_EN6,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 29. "WRITE_EN5,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" newline bitfld.long 0x00 28. "WRITE_EN4,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 27. "WRITE_EN3,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 26. "WRITE_EN2,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" newline bitfld.long 0x00 25. "WRITE_EN1,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 24. "WRITE_EN0,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 21.--23. "MODE7,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "MODE6,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "MODE5,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "MODE4,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 9.--11. "MODE3,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--8. "MODE2,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3.--5. "MODE1,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 0.--2. "MODE0,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" group.long ad:0x94843C00++0x1F line.long 0x00 "TIO2_S,TIO[i] signal sampling register" bitfld.long 0x00 7. "CH7,Value of channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Value of channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Value of channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Value of channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Value of channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Value of channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Value of channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Value of channel [x]" "0,1" line.long 0x04 "TIO2_O,TIO[i] output register" bitfld.long 0x04 7. "CH7,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Value driven on output of channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Value driven on output of channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Value driven on output of channel [x]" "0,1" line.long 0x08 "TIO2_ENDIS,TIO[i] enable/disable register" bitfld.long 0x08 7. "CH7,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Enable/Disable request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Enable/Disable request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Enable/Disable request of channel [x]" "0,1" line.long 0x0C "TIO2_INVERT,TIO[i] signal invert register" bitfld.long 0x0C 7. "CH7,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Enable/Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Enable/Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Enable/Disable signal inversion of channel [x]" "0,1" line.long 0x10 "TIO2_INPUT_MODE,TIO[i] input mode register" bitfld.long 0x10 7. "CH7,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Enable/Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Enable/Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Enable/Disable input mode of channel [x]" "0,1" line.long 0x14 "TIO2_CYCLIC_MODE,TIO[i] cyclic mode register" bitfld.long 0x14 7. "CH7,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Enable/Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Enable/Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Enable/Disable cyclic mode of channel [x]" "0,1" line.long 0x18 "TIO2_TRIG_OUT_GATE_EN,TIO[i] enable Trigger Output output gating register" bitfld.long 0x18 7. "CH7,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 6. "CH6,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 5. "CH5,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 4. "CH4,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 3. "CH3,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 2. "CH2,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 1. "CH1,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 0. "CH0,enable gating of Trigger Output events of channel [x]" "0,1" line.long 0x1C "TIO2_PLTRIG_OUT_GATE_EN,TIO[i] enable PL_TRIG_OUT output gating register" bitfld.long 0x1C 7. "CH7,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 6. "CH6,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 5. "CH5,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 4. "CH4,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 3. "CH3,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 2. "CH2,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 1. "CH1,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 0. "CH0,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" group.long ad:0x94843C40++0x1F line.long 0x00 "TIO2_CS,TIO[i] clear signal sampling register" bitfld.long 0x00 7. "CH7,Clear channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Clear channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Clear channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Clear channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Clear channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Clear channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Clear channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Clear channel [x]" "0,1" line.long 0x04 "TIO2_CO,TIO[i] clear output register" bitfld.long 0x04 7. "CH7,Clear channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Clear channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Clear channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Clear channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Clear channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Clear channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Clear channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Clear channel [x]" "0,1" line.long 0x08 "TIO2_CENDIS,TIO[i] disable register" bitfld.long 0x08 7. "CH7,Disable request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Disable request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Disable request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Disable request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Disable request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Disable request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Disable request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Disable request of channel [x]" "0,1" line.long 0x0C "TIO2_CINVERT,TIO[i] clear signal invert register" bitfld.long 0x0C 7. "CH7,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Disable signal inversion of channel [x]" "0,1" line.long 0x10 "TIO2_CINPUT_MODE,TIO[i] disable input mode register" bitfld.long 0x10 7. "CH7,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Disable input mode of channel [x]" "0,1" line.long 0x14 "TIO2_CCYCLIC_MODE,TIO[i] disable cyclic mode register" bitfld.long 0x14 7. "CH7,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Disable cyclic mode of channel [x]" "0,1" line.long 0x18 "TIO2_CTRIG_OUT_GATE_EN,TIO[i] clear Trigger Output output gating register" bitfld.long 0x18 7. "CH7,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 6. "CH6,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 5. "CH5,disable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 4. "CH4,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 3. "CH3,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 2. "CH2,disable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 1. "CH1,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 0. "CH0,disable gating of Trigger Output events of channel [x]" "0,1" line.long 0x1C "TIO2_CPLTRIG_OUT_GATE_EN,TIO[i] clear PL_TRIG_OUT output gating register" bitfld.long 0x1C 7. "CH7,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 6. "CH6,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 5. "CH5,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 4. "CH4,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 3. "CH3,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 2. "CH2,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 1. "CH1,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 0. "CH0,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" group.long ad:0x94843C80++0x1F line.long 0x00 "TIO2_SS,TIO[i] set signal sampling register" bitfld.long 0x00 7. "CH7,Set channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Set channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Set channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Set channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Set channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Set channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Set channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Set channel [x]" "0,1" line.long 0x04 "TIO2_SO,TIO[i] set output register" bitfld.long 0x04 7. "CH7,Set channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Set channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Set channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Set channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Set channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Set channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Set channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Set channel [x]" "0,1" line.long 0x08 "TIO2_SENDIS,TIO[i] enable register" bitfld.long 0x08 7. "CH7,Enable request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Enable request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Enable request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Enable request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Enable request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Enable request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Enable request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Enable request of channel [x]" "0,1" line.long 0x0C "TIO2_SINVERT,TIO[i] set signal invert register" bitfld.long 0x0C 7. "CH7,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Enable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Enable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Enable signal inversion of channel [x]" "0,1" line.long 0x10 "TIO2_SINPUT_MODE,TIO[i] enable input mode register" bitfld.long 0x10 7. "CH7,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Enable input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Enable input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Enable input mode of channel [x]" "0,1" line.long 0x14 "TIO2_SCYCLIC_MODE,TIO[i] enable cyclic mode register" bitfld.long 0x14 7. "CH7,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Enable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Enable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Enable cyclic mode of channel [x]" "0,1" line.long 0x18 "TIO2_STRIG_OUT_GATE_EN,TIO[i] set Trigger Output output gating register" bitfld.long 0x18 7. "CH7,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 6. "CH6,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 5. "CH5,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 4. "CH4,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 3. "CH3,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 2. "CH2,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 1. "CH1,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 0. "CH0,enable gating of Trigger Output events of channel [x]" "0,1" line.long 0x1C "TIO2_SPLTRIG_OUT_GATE_EN,TIO[i] set PL_TRIG_OUT output gating register" bitfld.long 0x1C 7. "CH7,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 6. "CH6,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 5. "CH5,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 4. "CH4,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 3. "CH3,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 2. "CH2,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 1. "CH1,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 0. "CH0,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" group.long ad:0x94843CC0++0x17 line.long 0x00 "TIO2_IS,TIO[i] invert signal sampling register" bitfld.long 0x00 7. "CH7,Invert channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Invert channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Invert channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Invert channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Invert channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Invert channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Invert channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Invert channel [x]" "0,1" line.long 0x04 "TIO2_IO,TIO[i] invert output register" bitfld.long 0x04 7. "CH7,Invert channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Invert channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Invert channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Invert channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Invert channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Invert channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Invert channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Invert channel [x]" "0,1" line.long 0x08 "TIO2_IENDIS,TIO[i] toggle enable/disable register" bitfld.long 0x08 7. "CH7,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Toggle state request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Toggle state request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Toggle state request of channel [x]" "0,1" line.long 0x0C "TIO2_IINVERT,TIO[i] toggle signal invert register" bitfld.long 0x0C 7. "CH7,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Invert signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Invert signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Invert signal inversion of channel [x]" "0,1" line.long 0x10 "TIO2_IINPUT_MODE,TIO[i] enable input mode register" bitfld.long 0x10 7. "CH7,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Toggle input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Toggle input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Toggle input mode of channel [x]" "0,1" line.long 0x14 "TIO2_ICYCLIC_MODE,TIO[i] enable cyclic mode register" bitfld.long 0x14 7. "CH7,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Toggle cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Toggle cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Toggle cyclic mode of channel [x]" "0,1" group.long ad:0x94843D00++0x03 line.long 0x00 "TIO2_FUPD,TIO[i] force update register" bitfld.long 0x00 7. "CH7,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 6. "CH6,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 5. "CH5,issue immediately a signal pulse on the update signal of channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 3. "CH3,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 2. "CH2,issue immediately a signal pulse on the update signal of channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 0. "CH0,issue immediately a signal pulse on the update signal of channel [x]" "0,1" rgroup.long ad:0x94843D04++0x03 line.long 0x00 "TIO2_HW_CONF,TIO[i] configuration register" bitfld.long 0x00 4. "TIO_PLUS,signals availability of TIOplus functionality" "0,1" bitfld.long 0x00 0.--1. "NTIO_CH8,signals availability of amount of channels" "0,1,2,3" group.long ad:0x94843D08++0x0B line.long 0x00 "TIO2_RSEL_CTRL1,TIO[i] resource selection control register 1" bitfld.long 0x00 28. "SEL_CLKEN7_0,select source of RS_CLKEN[g][7:7] for channels [g]*8" "0,1" bitfld.long 0x00 24. "SEL_CLKEN6_0,select source of RS_CLKEN[g][6:6] for channels [g]*8" "0,1" line.long 0x04 "TIO2_RSEL_CTRL2,TIO[i] resource selection control register 2" bitfld.long 0x04 8. "SEL_TB2_0,select source of RS_TB2[g] for channels [g]*8" "0,1" bitfld.long 0x04 4. "SEL_TB1_0,select source of RS_TB1[g] for channels [g]*8" "0,1" line.long 0x08 "TIO2_PL_SWRST,TIO[i] software reset for TIO Plus functionality" bitfld.long 0x08 7. "CH7,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,reset TIO_Plus resources of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,reset TIO_Plus resources of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,reset TIO_Plus resources of channel [x]" "0,1" group.long ad:0x94844000++0x4F line.long 0x00 "CCM2_ARP0_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x00 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x00 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x00 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--15. 1. "ADDR,ARP base address" line.long 0x04 "CCM2_ARP0_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x04 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x04 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x04 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x08 "CCM2_ARP1_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x08 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x08 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x08 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x08 0.--15. 1. "ADDR,ARP base address" line.long 0x0C "CCM2_ARP1_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x0C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x0C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x0C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x10 "CCM2_ARP2_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x10 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x10 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x10 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x10 0.--15. 1. "ADDR,ARP base address" line.long 0x14 "CCM2_ARP2_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x14 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x14 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x14 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x18 "CCM2_ARP3_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x18 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x18 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x18 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x18 0.--15. 1. "ADDR,ARP base address" line.long 0x1C "CCM2_ARP3_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x1C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x1C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x1C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x20 "CCM2_ARP4_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x20 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x20 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x20 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x20 0.--15. 1. "ADDR,ARP base address" line.long 0x24 "CCM2_ARP4_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x24 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x24 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x24 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x28 "CCM2_ARP5_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x28 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x28 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x28 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x28 0.--15. 1. "ADDR,ARP base address" line.long 0x2C "CCM2_ARP5_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x2C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x2C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x2C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x30 "CCM2_ARP6_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x30 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x30 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x30 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x30 0.--15. 1. "ADDR,ARP base address" line.long 0x34 "CCM2_ARP6_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x34 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x34 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x34 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x38 "CCM2_ARP7_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x38 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x38 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x38 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x38 0.--15. 1. "ADDR,ARP base address" line.long 0x3C "CCM2_ARP7_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x3C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x3C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x3C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x40 "CCM2_ARP8_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x40 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x40 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x40 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x40 0.--15. 1. "ADDR,ARP base address" line.long 0x44 "CCM2_ARP8_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x44 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x44 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x44 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x48 "CCM2_ARP9_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x48 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x48 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x48 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x48 0.--15. 1. "ADDR,ARP base address" line.long 0x4C "CCM2_ARP9_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x4C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x4C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x4C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" rgroup.long ad:0x948441CC++0x03 line.long 0x00 "CCM2_TIO_G0_OUT,CCM[i] TIO Group 0 1 Output Register" bitfld.long 0x00 23. "TIO_G0_OUT_N7,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 22. "TIO_G0_OUT_N6,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 21. "TIO_G0_OUT_N5,Output level snapshot of channel [c]" "0,1" newline bitfld.long 0x00 20. "TIO_G0_OUT_N4,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 19. "TIO_G0_OUT_N3,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 18. "TIO_G0_OUT_N2,Output level snapshot of channel [c]" "0,1" newline bitfld.long 0x00 17. "TIO_G0_OUT_N1,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 16. "TIO_G0_OUT_N0,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 7. "TIO_G0_OUT7,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" newline bitfld.long 0x00 6. "TIO_G0_OUT6,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 5. "TIO_G0_OUT5,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 4. "TIO_G0_OUT4,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" newline bitfld.long 0x00 3. "TIO_G0_OUT3,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 2. "TIO_G0_OUT2,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 1. "TIO_G0_OUT1,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" newline bitfld.long 0x00 0. "TIO_G0_OUT0,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" rgroup.long ad:0x948441D4++0x03 line.long 0x00 "CCM2_HW_CONF2,CCM[i] 2. Hardware Configuration Register" bitfld.long 0x00 18. "AXIM_DATA_SIZE,Defines the data bus width of the AXI master interface" "0,1" bitfld.long 0x00 16. "AXIS_DATA_SIZE,Defines the data bus width of the AXI slave interface" "0,1" bitfld.long 0x00 9. "TIO_OUT_RST,Reset level for all TIO output signals" "0,1" newline bitfld.long 0x00 7. "AXIM_POSTED_WRITE,Write transaction without response" "0,1" bitfld.long 0x00 6. "AXIM_SEC_ACC,Secure AXI master access constant" "0,1" bitfld.long 0x00 5. "AXIM_PRIV_ACC,Privileged AXI master access constant" "0,1" newline bitfld.long 0x00 0.--4. "AXIM_ID_WIDTH,Defines which LSB of AXIM_ID are send to the bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x948441D8++0x03 line.long 0x00 "CCM2_AEIM_STA,CCM[i] MCS Bus Master Status Register" bitfld.long 0x00 24.--25. "AEIM_XPT_STA,AEIM exception status" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. "AEIM_XPT_ADDR,Exception address" rgroup.long ad:0x948441DC++0x03 line.long 0x00 "CCM2_HW_CONF,CCM[i] Hardware Configuration Register" bitfld.long 0x00 31. "AEI_RDATA_PIPELINE_STAGE,Read data pipeline stage implemented" "0,1" bitfld.long 0x00 30. "AEI_ADDR_PIPELINE_STAGE,Address pipeline stage implemented" "0,1" bitfld.long 0x00 29. "INT_CLK_EN_GEN,Internal clock enable generation" "0,1" newline bitfld.long 0x00 24.--28. "TOM_TRIG_INTCHAIN,TOM internal trigger chain length for pipeline register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20.--23. "ATOM_TRIG_INTCHAIN,ATOM internal trigger chain length for pipeline register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 19. "IRQ_MODE_SINGLE_PULSE,Signalize availability of Single Pulse IRQ mode" "0,1" newline bitfld.long 0x00 18. "IRQ_MODE_PULSE_NOTIFY,Signalize availability of Pulse Notoify IRQ mode" "0,1" bitfld.long 0x00 17. "IRQ_MODE_PULSE,Signalize availability of Pulse IRQ mode" "0,1" bitfld.long 0x00 16. "IRQ_MODE_LEVEL,Signalize availability of Level IRQ mode" "0,1" newline bitfld.long 0x00 15. "RESET_ACTIVE,Active level of asynchronous reset" "0,1" bitfld.long 0x00 13. "ERM,Enable RAM1 MSB for available MCS modules" "0,1" bitfld.long 0x00 12. "RAM_INIT_RST,RAM initialization from reset" "0,1" newline bitfld.long 0x00 9.--11. "TOM_TRIG_CHAIN,TOM trigger chain length without synchronization register" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. "TOM_OUT_RST,CCM_TOM_OUT reset level" "0,1" bitfld.long 0x00 5.--7. "ATOM_TRIG_CHAIN,ATOM trigger chain length without synchronization register" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4. "ATOM_OUT_RST,CCM_ATOM_OUT reset level" "0,1" bitfld.long 0x00 3. "CFG_CLOCK_RATE,Clocks per ARU transfer" "0,1" bitfld.long 0x00 2. "SYNC_INPUT_REG,Additional pipelined stage in synchronous bridge mode" "0,1" newline bitfld.long 0x00 1. "BRIDGE_MODE_RST,Bridge mode after reset" "0,1" bitfld.long 0x00 0. "GRSTEN,Global Reset Enable" "0,1" group.long ad:0x948441E0++0x07 line.long 0x00 "CCM2_TIM_AUX_IN_SRC,CCM[i] TIM AUX Input Source Register" bitfld.long 0x00 23. "SEL_OUT_N_CH7,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 22. "SEL_OUT_N_CH6,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 21. "SEL_OUT_N_CH5,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" newline bitfld.long 0x00 20. "SEL_OUT_N_CH4,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 19. "SEL_OUT_N_CH3,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 18. "SEL_OUT_N_CH2,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" newline bitfld.long 0x00 17. "SEL_OUT_N_CH1,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 16. "SEL_OUT_N_CH0,Use DTM_OUT[q] or DTM_OUT[q]_N signals as CCM_AUX_IN source of TIM[i] channel [x]" "0,1" bitfld.long 0x00 7. "SRC_CH7,Defines CCM_AUX_IN source of TIM[i] channel 7" "0,1" newline bitfld.long 0x00 6. "SRC_CH6,Defines CCM_AUX_IN source of TIM[i] channel 6" "0,1" bitfld.long 0x00 5. "SRC_CH5,Defines CCM_AUX_IN source of TIM[i] channel 5" "0,1" bitfld.long 0x00 4. "SRC_CH4,Defines CCM_AUX_IN source of TIM[i] channel 4" "0,1" newline bitfld.long 0x00 3. "SRC_CH3,Defines CCM_AUX_IN source of TIM[i] channel 3" "0,1" bitfld.long 0x00 2. "SRC_CH2,Defines CCM_AUX_IN source of TIM[i] channel 2" "0,1" bitfld.long 0x00 1. "SRC_CH1,Defines AUX_IN source of TIM[i] channel 1" "0,1" newline bitfld.long 0x00 0. "SRC_CH0,Defines CCM_AUX_IN source of TIM[i] channel 0" "0,1" line.long 0x04 "CCM2_EXT_CAP_EN,CCM[i] External Capture Enable Register" bitfld.long 0x04 7. "TIM_I_EXT_CAP_EN7,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 6. "TIM_I_EXT_CAP_EN6,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 5. "TIM_I_EXT_CAP_EN5,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 4. "TIM_I_EXT_CAP_EN4,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 3. "TIM_I_EXT_CAP_EN3,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 2. "TIM_I_EXT_CAP_EN2,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" newline bitfld.long 0x04 1. "TIM_I_EXT_CAP_EN1,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" bitfld.long 0x04 0. "TIM_I_EXT_CAP_EN0,TIM_EXT_CAPTURE signal [x] forwarding enable" "0,1" rgroup.long ad:0x948441E8++0x07 line.long 0x00 "CCM2_TOM_OUT,CCM[i] TOM Output Register" bitfld.long 0x00 31. "TOM_OUT_N15,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 30. "TOM_OUT_N14,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 29. "TOM_OUT_N13,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 28. "TOM_OUT_N12,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 27. "TOM_OUT_N11,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 26. "TOM_OUT_N10,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 25. "TOM_OUT_N9,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 24. "TOM_OUT_N8,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 23. "TOM_OUT_N7,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 22. "TOM_OUT_N6,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 21. "TOM_OUT_N5,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 20. "TOM_OUT_N4,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 19. "TOM_OUT_N3,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 18. "TOM_OUT_N2,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 17. "TOM_OUT_N1,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 16. "TOM_OUT_N0,Output level snapshot of CCM_TOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 15. "TOM_OUT15,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 14. "TOM_OUT14,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 13. "TOM_OUT13,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 12. "TOM_OUT12,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 11. "TOM_OUT11,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 10. "TOM_OUT10,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 9. "TOM_OUT9,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 8. "TOM_OUT8,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 7. "TOM_OUT7,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 6. "TOM_OUT6,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 5. "TOM_OUT5,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 4. "TOM_OUT4,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 3. "TOM_OUT3,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 2. "TOM_OUT2,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 1. "TOM_OUT1,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" bitfld.long 0x00 0. "TOM_OUT0,Output level snapshot of CCM_TOM_OUT channel [x]" "0,1" line.long 0x04 "CCM2_ATOM_OUT,CCM[i] ATOM Output Register" bitfld.long 0x04 31. "ATOM_IP1_OUT_N7,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 30. "ATOM_IP1_OUT_N6,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 29. "ATOM_IP1_OUT_N5,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" newline bitfld.long 0x04 28. "ATOM_IP1_OUT_N4,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 27. "ATOM_IP1_OUT_N3,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 26. "ATOM_IP1_OUT_N2,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" newline bitfld.long 0x04 25. "ATOM_IP1_OUT_N1,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 24. "ATOM_IP1_OUT_N0,Output level snapshot of CCM_ATOM_OUT[x:x] of instance i+1 channel x" "0,1" bitfld.long 0x04 23. "ATOM_IP1_OUT7,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" newline bitfld.long 0x04 22. "ATOM_IP1_OUT6,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 21. "ATOM_IP1_OUT5,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 20. "ATOM_IP1_OUT4,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" newline bitfld.long 0x04 19. "ATOM_IP1_OUT3,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 18. "ATOM_IP1_OUT2,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 17. "ATOM_IP1_OUT1,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" newline bitfld.long 0x04 16. "ATOM_IP1_OUT0,Output level snapshot of ATOM[i+1]_OUT channel [x]" "0,1" bitfld.long 0x04 15. "ATOM_I_OUT_N7,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 14. "ATOM_I_OUT_N6,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x04 13. "ATOM_I_OUT_N5,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 12. "ATOM_I_OUT_N4,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 11. "ATOM_I_OUT_N3,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x04 10. "ATOM_I_OUT_N2,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 9. "ATOM_I_OUT_N1,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x04 8. "ATOM_I_OUT_N0,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x04 7. "ATOM_I_OUT7,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 6. "ATOM_I_OUT6,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 5. "ATOM_I_OUT5,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" newline bitfld.long 0x04 4. "ATOM_I_OUT4,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 3. "ATOM_I_OUT3,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 2. "ATOM_I_OUT2,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" newline bitfld.long 0x04 1. "ATOM_I_OUT1,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x04 0. "ATOM_I_OUT0,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" group.long ad:0x948441F0++0x0F line.long 0x00 "CCM2_CMU_CLK_CFG,CCM[i] CMU Clock Configuration Register" bitfld.long 0x00 28.--29. "CLK7_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 24.--25. "CLK6_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 20.--21. "CLK5_SRC,Clock [y] source signal selector" "0,1,2,3" newline bitfld.long 0x00 16.--17. "CLK4_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 12.--13. "CLK3_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 8.--9. "CLK2_SRC,Clock [y] source signal selector" "0,1,2,3" newline bitfld.long 0x00 4.--5. "CLK1_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 0.--1. "CLK0_SRC,Clock [y] source signal selector" "0,1,2,3" line.long 0x04 "CCM2_CMU_FXCLK_CFG,CCM[i] CMU Fixed Clock Configuration Register" bitfld.long 0x04 0.--3. "FXCLK0_SRC,Fixed clock 0 source signal selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x08 "CCM2_CFG,CCM[i] Configuration Register" rbitfld.long 0x08 31. "TBU_DIR2,DIR1 input signal of module TBU timebase [z]" "0,1" rbitfld.long 0x08 30. "TBU_DIR1,DIR1 input signal of module TBU timebase [z]" "0,1" rbitfld.long 0x08 16.--17. "CLS_CLK_DIV,Cluster Clock Divider" "0,1,2,3" newline bitfld.long 0x08 8. "EN_TIO_DTM,Enable TIO and connected DTM" "0,1" bitfld.long 0x08 6. "EN_PSM,Enable PSM" "0,1" bitfld.long 0x08 3. "EN_MCS,Enable MCS" "0,1" newline bitfld.long 0x08 2. "EN_ATOM_ADTM,Enable ATOM and ADTM" "0,1" bitfld.long 0x08 1. "EN_TOM_SPE_TDTM,Enable TOM SPE and TDTM" "0,1" bitfld.long 0x08 0. "EN_TIM,Enable TIM" "0,1" line.long 0x0C "CCM2_PROT,CCM[i] Protection Register" bitfld.long 0x0C 0. "CLS_PROT,Cluster Protection" "0,1" group.long ad:0x94844400++0x1FF line.long 0x00 "CDTM2_DTM0_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x00 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x00 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x00 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x00 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x00 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x04 "CDTM2_DTM0_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x04 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x04 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x04 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x04 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x04 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x04 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x04 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x04 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x04 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x04 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x04 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x04 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x04 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x04 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x04 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x04 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x04 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x04 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x04 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x04 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x08 "CDTM2_DTM0_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x08 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x08 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x08 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x08 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x08 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x08 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x08 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x08 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x08 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x08 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x08 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x08 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x08 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x08 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x08 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x08 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x08 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x08 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x08 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x08 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x08 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x08 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x08 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x08 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x08 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x08 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x08 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x08 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x08 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x08 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x08 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x08 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x0C "CDTM2_DTM0_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x0C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x0C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x0C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x0C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x0C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x0C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x0C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x0C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x0C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x0C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x0C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x0C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x0C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x0C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x0C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x0C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x0C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x0C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x0C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x0C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x10 "CDTM2_DTM0_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x10 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x10 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x10 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x10 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x10 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x14 "CDTM2_DTM0_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x14 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x14 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x18 "CDTM2_DTM0_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x18 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x18 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1C "CDTM2_DTM0_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x1C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x20 "CDTM2_DTM0_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x20 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x20 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x24 "CDTM2_DTM0_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x24 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x24 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x24 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x24 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x24 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x24 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x24 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x24 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x28 "CDTM2_DTM0_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x28 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x28 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x28 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x28 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x28 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x28 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x28 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x28 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x28 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x28 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x28 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x28 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x28 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x2C "CDTM2_DTM0_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x2C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x2C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x2C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x2C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x2C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x2C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x2C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x2C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x2C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x2C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x2C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x2C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x2C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x2C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x2C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x2C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x2C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x30 "CDTM2_DTM0_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x30 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x30 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x30 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x30 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x30 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x30 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x34 "CDTM2_DTM0_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x34 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x34 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x34 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x34 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x34 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x34 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x38 "CDTM2_DTM0_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x38 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x38 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x38 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x38 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x38 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x38 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x3C "CDTM2_DTM0_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x3C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x3C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x3C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x3C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x3C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x3C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x40 "CDTM2_DTM1_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x40 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x40 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x40 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x40 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x40 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x44 "CDTM2_DTM1_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x44 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x44 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x44 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x44 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x44 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x44 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x44 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x44 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x44 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x44 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x44 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x44 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x44 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x44 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x44 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x44 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x44 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x44 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x44 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x44 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0x44 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x48 "CDTM2_DTM1_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x48 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x48 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x48 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x48 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x48 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x48 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x48 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x48 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x48 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x48 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x48 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x48 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x48 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x48 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x48 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x48 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x48 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x48 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x48 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x48 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x48 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x48 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x48 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x48 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x48 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x48 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x48 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x48 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x48 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x48 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x48 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x48 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x4C "CDTM2_DTM1_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x4C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x4C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x4C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x4C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x4C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x4C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x4C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x4C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x4C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x4C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x4C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x4C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x4C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x4C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x4C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x4C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x4C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x4C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x4C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x4C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x50 "CDTM2_DTM1_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x50 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x50 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x50 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x50 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x50 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x54 "CDTM2_DTM1_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x54 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x54 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x58 "CDTM2_DTM1_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x58 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x58 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x5C "CDTM2_DTM1_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x5C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x5C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x60 "CDTM2_DTM1_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x60 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x60 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x64 "CDTM2_DTM1_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x64 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x64 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x64 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x64 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x64 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x64 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x64 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x64 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x68 "CDTM2_DTM1_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x68 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x68 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x68 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x68 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x68 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x68 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x68 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x68 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x68 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x68 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x68 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x68 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x68 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x6C "CDTM2_DTM1_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x6C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x6C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x6C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x6C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x6C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x6C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x6C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x6C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x6C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x6C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x6C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x6C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x6C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x6C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x6C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x6C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x6C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x6C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x70 "CDTM2_DTM1_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x70 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x70 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x70 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x70 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x70 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x70 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x74 "CDTM2_DTM1_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x74 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x74 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x74 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x74 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x74 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x74 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x78 "CDTM2_DTM1_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x78 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x78 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x78 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x78 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x78 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x78 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x7C "CDTM2_DTM1_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x7C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x7C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x7C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x7C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x7C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x7C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x80 "CDTM2_DTM2_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x80 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x80 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x80 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x80 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x80 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x80 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x84 "CDTM2_DTM2_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x84 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x84 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x84 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x84 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x84 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x84 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x84 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x84 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x84 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x84 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x84 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x84 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x84 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x84 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x84 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x84 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x84 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x84 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x84 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x84 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x88 "CDTM2_DTM2_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x88 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x88 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x88 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x88 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x88 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x88 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x88 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x88 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x88 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x88 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x88 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x88 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x88 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x88 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x88 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x88 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x88 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x88 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x88 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x88 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x88 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x88 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x88 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x88 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x88 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x88 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x88 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x88 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x88 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x88 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x88 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x88 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x8C "CDTM2_DTM2_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x8C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x8C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x8C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x8C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x8C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x8C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x8C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x8C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x8C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x8C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x8C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x8C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x8C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x8C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x8C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x8C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x8C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x8C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x8C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x8C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x90 "CDTM2_DTM2_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x90 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x90 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x90 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x90 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x90 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x94 "CDTM2_DTM2_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x94 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x94 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x98 "CDTM2_DTM2_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x98 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x98 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x9C "CDTM2_DTM2_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x9C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x9C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xA0 "CDTM2_DTM2_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0xA0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xA0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xA4 "CDTM2_DTM2_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0xA4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0xA4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0xA4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0xA4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0xA4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0xA4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0xA4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0xA4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0xA8 "CDTM2_DTM2_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0xA8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0xA8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0xA8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0xA8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0xA8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0xA8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0xA8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0xA8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0xA8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0xA8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0xA8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0xA8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0xA8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0xAC "CDTM2_DTM2_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0xAC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0xAC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0xAC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0xAC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0xAC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0xAC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0xAC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0xAC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0xAC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0xAC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0xAC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0xAC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0xAC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0xAC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0xAC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0xAC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0xAC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0xAC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0xB0 "CDTM2_DTM2_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xB4 "CDTM2_DTM2_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xB8 "CDTM2_DTM2_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xBC "CDTM2_DTM2_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xBC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xBC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xBC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xBC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xBC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xBC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xC0 "CDTM2_DTM3_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0xC0 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0xC0 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0xC0 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0xC0 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0xC0 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0xC0 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0xC4 "CDTM2_DTM3_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0xC4 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0xC4 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0xC4 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0xC4 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0xC4 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0xC4 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0xC4 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0xC4 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0xC4 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0xC4 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0xC4 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0xC4 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0xC4 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0xC4 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0xC4 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0xC4 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0xC4 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0xC4 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0xC4 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0xC4 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0xC4 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0xC8 "CDTM2_DTM3_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0xC8 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0xC8 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0xC8 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0xC8 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0xC8 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0xC8 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0xC8 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0xC8 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0xC8 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0xC8 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0xC8 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0xC8 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0xC8 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0xC8 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0xC8 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0xC8 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0xC8 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0xC8 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0xC8 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0xC8 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0xC8 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0xC8 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0xC8 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0xC8 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0xC8 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0xC8 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0xC8 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0xC8 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0xC8 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0xC8 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0xC8 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0xC8 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0xCC "CDTM2_DTM3_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0xCC 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0xCC 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0xCC 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0xCC 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0xCC 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0xCC 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0xCC 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0xCC 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0xCC 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0xCC 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0xCC 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0xCC 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0xCC 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0xCC 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0xCC 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0xCC 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0xCC 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0xCC 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0xCC 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0xCC 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0xD0 "CDTM2_DTM3_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0xD0 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0xD0 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0xD0 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0xD0 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0xD0 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0xD4 "CDTM2_DTM3_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0xD4 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xD4 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xD8 "CDTM2_DTM3_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0xD8 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xD8 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xDC "CDTM2_DTM3_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0xDC 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xDC 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xE0 "CDTM2_DTM3_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0xE0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xE0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xE4 "CDTM2_DTM3_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0xE4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0xE4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0xE4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0xE4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0xE4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0xE4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0xE4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0xE4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0xE8 "CDTM2_DTM3_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0xE8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0xE8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0xE8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0xE8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0xE8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0xE8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0xE8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0xE8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0xE8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0xE8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0xE8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0xE8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0xE8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0xEC "CDTM2_DTM3_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0xEC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0xEC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0xEC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0xEC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0xEC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0xEC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0xEC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0xEC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0xEC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0xEC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0xEC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0xEC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0xEC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0xEC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0xEC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0xEC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0xEC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0xEC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0xF0 "CDTM2_DTM3_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xF4 "CDTM2_DTM3_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xF8 "CDTM2_DTM3_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xFC "CDTM2_DTM3_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xFC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xFC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xFC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xFC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xFC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xFC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x100 "CDTM2_DTM4_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x100 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x100 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x100 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x100 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x100 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x100 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x104 "CDTM2_DTM4_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x104 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x104 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x104 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x104 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x104 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x104 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x104 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x104 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x104 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x104 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x104 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x104 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x104 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x104 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x104 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x104 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x104 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x104 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x104 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x104 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x108 "CDTM2_DTM4_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x108 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x108 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x108 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x108 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x108 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x108 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x108 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x108 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x108 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x108 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x108 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x108 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x108 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x108 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x108 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x108 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x108 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x108 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x108 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x108 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x108 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x108 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x108 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x108 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x108 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x108 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x108 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x108 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x108 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x108 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x108 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x108 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x10C "CDTM2_DTM4_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x10C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x10C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x10C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x10C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x10C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x10C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x10C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x10C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x10C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x10C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x10C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x10C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x10C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x10C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x10C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x10C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x10C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x10C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x10C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x10C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x10C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x10C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x10C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x10C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x10C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x10C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x10C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x10C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x10C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x10C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x10C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x10C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x110 "CDTM2_DTM4_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x110 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x110 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x110 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x110 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x110 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x114 "CDTM2_DTM4_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x114 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x114 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x114 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x118 "CDTM2_DTM4_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x118 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x118 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x118 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x11C "CDTM2_DTM4_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x11C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x11C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x11C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x120 "CDTM2_DTM4_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x120 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x120 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x120 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x124 "CDTM2_DTM4_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x124 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x124 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x124 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x124 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x124 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x124 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x124 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x124 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x128 "CDTM2_DTM4_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x128 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x128 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x128 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x128 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x128 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x128 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x128 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x128 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x128 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x128 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x128 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x128 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x128 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x128 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x128 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x128 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x12C "CDTM2_DTM4_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x12C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x12C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x12C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x12C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x12C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x12C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x12C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x12C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x12C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x12C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x12C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x12C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x12C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x12C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x12C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x12C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x12C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x12C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x12C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x130 "CDTM2_DTM4_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x130 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x130 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x130 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x130 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x130 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x130 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x134 "CDTM2_DTM4_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x134 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x134 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x134 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x134 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x134 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x134 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x138 "CDTM2_DTM4_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x138 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x138 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x138 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x138 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x138 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x138 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x13C "CDTM2_DTM4_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x13C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x13C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x13C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x13C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x13C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x13C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x140 "CDTM2_DTM5_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x140 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x140 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x140 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x140 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x140 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x140 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x144 "CDTM2_DTM5_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x144 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x144 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x144 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x144 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x144 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x144 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x144 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x144 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x144 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x144 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x144 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x144 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x144 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x144 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x144 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x144 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x144 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x144 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x144 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x144 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0x144 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x148 "CDTM2_DTM5_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x148 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x148 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x148 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x148 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x148 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x148 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x148 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x148 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x148 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x148 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x148 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x148 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x148 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x148 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x148 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x148 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x148 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x148 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x148 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x148 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x148 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x148 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x148 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x148 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x148 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x148 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x148 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x148 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x148 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x148 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x148 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x148 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x14C "CDTM2_DTM5_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x14C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x14C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x14C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x14C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x14C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x14C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x14C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x14C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x14C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x14C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x14C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x14C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x14C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x14C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x14C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x14C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x14C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x14C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x14C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x14C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x14C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x14C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x14C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x14C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x14C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x14C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x14C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x14C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x14C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x14C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x14C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x14C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x150 "CDTM2_DTM5_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x150 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x150 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x150 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x150 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x150 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x154 "CDTM2_DTM5_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x154 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x154 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x154 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x158 "CDTM2_DTM5_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x158 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x158 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x158 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x15C "CDTM2_DTM5_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x15C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x15C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x15C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x160 "CDTM2_DTM5_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x160 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x160 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x160 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x164 "CDTM2_DTM5_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x164 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x164 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x164 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x164 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x164 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x164 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x164 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x164 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x168 "CDTM2_DTM5_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x168 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x168 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x168 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x168 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x168 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x168 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x168 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x168 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x168 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x168 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x168 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x168 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x168 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x168 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x168 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x168 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x16C "CDTM2_DTM5_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x16C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x16C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x16C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x16C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x16C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x16C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x16C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x16C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x16C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x16C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x16C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x16C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x16C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x16C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x16C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x16C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x16C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x16C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x16C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x16C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x170 "CDTM2_DTM5_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x170 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x170 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x170 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x170 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x170 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x170 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x174 "CDTM2_DTM5_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x174 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x174 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x174 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x174 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x174 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x174 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x178 "CDTM2_DTM5_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x178 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x178 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x178 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x178 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x178 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x178 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x17C "CDTM2_DTM5_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x17C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x17C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x17C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x17C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x17C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x17C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x180 "CDTM2_DTM6_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x180 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x180 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x180 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x180 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x180 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x180 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x184 "CDTM2_DTM6_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x184 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x184 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x184 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x184 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x184 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x184 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x184 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x184 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x184 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x184 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x184 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x184 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x184 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x184 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x184 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x184 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x184 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x184 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x184 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x184 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x188 "CDTM2_DTM6_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x188 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x188 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x188 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x188 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x188 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x188 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x188 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x188 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x188 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x188 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x188 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x188 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x188 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x188 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x188 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x188 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x188 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x188 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x188 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x188 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x188 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x188 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x188 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x188 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x188 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x188 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x188 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x188 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x188 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x188 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x188 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x188 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x18C "CDTM2_DTM6_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x18C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x18C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x18C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x18C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x18C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x18C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x18C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x18C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x18C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x18C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x18C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x18C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x18C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x18C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x18C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x18C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x18C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x18C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x18C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x18C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x18C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x18C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x18C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x18C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x18C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x18C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x18C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x18C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x18C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x18C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x18C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x18C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x190 "CDTM2_DTM6_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x190 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x190 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x190 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x190 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x190 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x194 "CDTM2_DTM6_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x194 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x194 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x198 "CDTM2_DTM6_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x198 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x198 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x19C "CDTM2_DTM6_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x19C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x19C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1A0 "CDTM2_DTM6_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x1A0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1A0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1A4 "CDTM2_DTM6_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x1A4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x1A4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x1A4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x1A4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x1A4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x1A4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x1A4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x1A4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x1A8 "CDTM2_DTM6_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x1A8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x1A8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1A8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x1A8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x1A8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x1A8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x1A8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x1A8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x1A8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x1A8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1A8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x1A8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x1A8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x1A8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1A8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x1A8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x1AC "CDTM2_DTM6_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x1AC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x1AC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x1AC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x1AC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x1AC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x1AC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x1AC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x1AC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x1AC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x1AC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x1AC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x1AC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x1AC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x1AC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x1AC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1AC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x1AC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x1AC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x1AC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x1AC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x1B0 "CDTM2_DTM6_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1B0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1B0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1B0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1B0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1B0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1B0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1B4 "CDTM2_DTM6_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1B4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1B4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1B4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1B4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1B4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1B4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1B8 "CDTM2_DTM6_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1B8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1B8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1B8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1B8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1B8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1B8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1BC "CDTM2_DTM6_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1BC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1BC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1BC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1BC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1BC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1BC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1C0 "CDTM2_DTM7_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x1C0 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x1C0 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x1C0 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x1C0 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x1C0 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x1C0 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x1C4 "CDTM2_DTM7_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x1C4 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x1C4 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x1C4 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x1C4 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x1C4 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x1C4 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x1C4 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x1C4 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x1C4 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x1C4 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x1C4 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x1C4 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x1C4 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x1C4 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x1C4 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x1C4 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x1C4 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x1C4 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x1C4 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x1C4 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0x1C4 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x1C8 "CDTM2_DTM7_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x1C8 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x1C8 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x1C8 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x1C8 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x1C8 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x1C8 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x1C8 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x1C8 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x1C8 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x1C8 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x1C8 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x1C8 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x1C8 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x1C8 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x1C8 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x1C8 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x1C8 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x1C8 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x1C8 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x1C8 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x1C8 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x1C8 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x1C8 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x1C8 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x1C8 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x1C8 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x1C8 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x1C8 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x1C8 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x1C8 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x1C8 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x1C8 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x1CC "CDTM2_DTM7_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x1CC 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x1CC 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x1CC 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x1CC 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x1CC 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x1CC 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x1CC 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x1CC 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x1CC 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x1CC 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x1CC 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x1CC 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x1CC 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x1CC 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x1CC 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x1CC 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x1CC 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x1CC 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x1CC 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x1CC 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x1CC 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x1CC 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x1CC 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x1CC 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x1CC 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x1CC 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x1CC 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x1CC 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x1CC 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x1CC 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x1CC 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x1CC 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x1D0 "CDTM2_DTM7_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x1D0 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x1D0 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x1D0 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x1D0 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x1D0 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x1D4 "CDTM2_DTM7_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x1D4 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1D4 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1D8 "CDTM2_DTM7_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x1D8 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1D8 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1DC "CDTM2_DTM7_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x1DC 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1DC 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1E0 "CDTM2_DTM7_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x1E0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1E0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1E4 "CDTM2_DTM7_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x1E4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x1E4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x1E4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x1E4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x1E4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x1E4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x1E4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x1E4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x1E8 "CDTM2_DTM7_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x1E8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x1E8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1E8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x1E8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x1E8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x1E8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x1E8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x1E8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x1E8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x1E8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1E8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x1E8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x1E8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x1E8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x1E8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x1E8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x1EC "CDTM2_DTM7_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x1EC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x1EC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x1EC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x1EC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x1EC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x1EC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x1EC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x1EC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x1EC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x1EC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x1EC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x1EC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x1EC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x1EC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x1EC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x1EC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x1EC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x1EC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x1EC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x1EC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x1F0 "CDTM2_DTM7_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1F0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1F0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1F0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1F0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1F0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1F0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1F4 "CDTM2_DTM7_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1F4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1F4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1F4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1F4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1F4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1F4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1F8 "CDTM2_DTM7_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1F8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1F8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1F8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1F8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1F8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1F8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x1FC "CDTM2_DTM7_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x1FC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x1FC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x1FC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x1FC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x1FC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x1FC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" group.long ad:0x94844800++0x47 line.long 0x00 "F2A2_CH0_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x00 0.--8. 1. "ADDR,ARU Read address" line.long 0x04 "F2A2_CH1_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x04 0.--8. 1. "ADDR,ARU Read address" line.long 0x08 "F2A2_CH2_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x08 0.--8. 1. "ADDR,ARU Read address" line.long 0x0C "F2A2_CH3_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x0C 0.--8. 1. "ADDR,ARU Read address" line.long 0x10 "F2A2_CH4_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x10 0.--8. 1. "ADDR,ARU Read address" line.long 0x14 "F2A2_CH5_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x14 0.--8. 1. "ADDR,ARU Read address" line.long 0x18 "F2A2_CH6_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x18 0.--8. 1. "ADDR,ARU Read address" line.long 0x1C "F2A2_CH7_ARU_RD_FIFO,F2A[i] stream [x] ARU read register" hexmask.long.word 0x1C 0.--8. 1. "ADDR,ARU Read address" line.long 0x20 "F2A2_CH0_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x20 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x20 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x24 "F2A2_CH1_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x24 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x24 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x28 "F2A2_CH2_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x28 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x28 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x2C "F2A2_CH3_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x2C 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x2C 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x30 "F2A2_CH4_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x30 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x30 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x34 "F2A2_CH5_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x34 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x34 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x38 "F2A2_CH6_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x38 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x38 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x3C "F2A2_CH7_STR_CFG,F2A[i] stream [x] configuration register" bitfld.long 0x3C 18. "DIR,Data transfer direction" "0,1" bitfld.long 0x3C 16.--17. "TMODE,Transfer mode for 53 bit ARU data from/to FIFO" "0,1,2,3" line.long 0x40 "F2A2_ENABLE,F2A[i] stream activation register" bitfld.long 0x40 14.--15. "STR7_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 12.--13. "STR6_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 10.--11. "STR5_EN,Enable/disable stream [y]" "0,1,2,3" newline bitfld.long 0x40 8.--9. "STR4_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 6.--7. "STR3_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 4.--5. "STR2_EN,Enable/disable stream [y]" "0,1,2,3" newline bitfld.long 0x40 2.--3. "STR1_EN,Enable/disable stream [y]" "0,1,2,3" bitfld.long 0x40 0.--1. "STR0_EN,Enable/disable stream [y]" "0,1,2,3" line.long 0x44 "F2A2_CTRL,F2A[i] stream control register" bitfld.long 0x44 6.--7. "STR7_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" bitfld.long 0x44 4.--5. "STR6_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" bitfld.long 0x44 2.--3. "STR5_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" newline bitfld.long 0x44 0.--1. "STR4_CONF,Reconfiguration of stream [y] to FIFO channel [y]-4" "0,1,2,3" group.long ad:0x94844880++0x03 line.long 0x00 "AFD2_CH0_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x94844890++0x03 line.long 0x00 "AFD2_CH1_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948448A0++0x03 line.long 0x00 "AFD2_CH2_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948448B0++0x03 line.long 0x00 "AFD2_CH3_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948448C0++0x03 line.long 0x00 "AFD2_CH4_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948448D0++0x03 line.long 0x00 "AFD2_CH5_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948448E0++0x03 line.long 0x00 "AFD2_CH6_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x948448F0++0x03 line.long 0x00 "AFD2_CH7_BUF_ACC,AFD [i] FIFO [x] buffer access register" hexmask.long 0x00 0.--28. 1. "DATA,Read/write data from/to FIFO" group.long ad:0x94844A00++0x13 line.long 0x00 "FIFO2_CH0_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO2_CH0_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO2_CH0_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO2_CH0_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO2_CH0_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94844A14++0x0F line.long 0x00 "FIFO2_CH0_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH0_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO2_CH0_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO2_CH0_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94844A24++0x13 line.long 0x00 "FIFO2_CH0_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH0_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO2_CH0_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO2_CH0_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO2_CH0_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94844A40++0x13 line.long 0x00 "FIFO2_CH1_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO2_CH1_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO2_CH1_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO2_CH1_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO2_CH1_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94844A54++0x0F line.long 0x00 "FIFO2_CH1_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH1_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO2_CH1_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO2_CH1_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94844A64++0x13 line.long 0x00 "FIFO2_CH1_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH1_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO2_CH1_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO2_CH1_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO2_CH1_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94844A80++0x13 line.long 0x00 "FIFO2_CH2_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO2_CH2_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO2_CH2_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO2_CH2_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO2_CH2_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94844A94++0x0F line.long 0x00 "FIFO2_CH2_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH2_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO2_CH2_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO2_CH2_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94844AA4++0x13 line.long 0x00 "FIFO2_CH2_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH2_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO2_CH2_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO2_CH2_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO2_CH2_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94844AC0++0x13 line.long 0x00 "FIFO2_CH3_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO2_CH3_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO2_CH3_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO2_CH3_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO2_CH3_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94844AD4++0x0F line.long 0x00 "FIFO2_CH3_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH3_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO2_CH3_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO2_CH3_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94844AE4++0x13 line.long 0x00 "FIFO2_CH3_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH3_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO2_CH3_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO2_CH3_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO2_CH3_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94844B00++0x13 line.long 0x00 "FIFO2_CH4_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO2_CH4_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO2_CH4_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO2_CH4_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO2_CH4_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94844B14++0x0F line.long 0x00 "FIFO2_CH4_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH4_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO2_CH4_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO2_CH4_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94844B24++0x13 line.long 0x00 "FIFO2_CH4_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH4_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO2_CH4_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO2_CH4_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO2_CH4_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94844B40++0x13 line.long 0x00 "FIFO2_CH5_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO2_CH5_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO2_CH5_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO2_CH5_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO2_CH5_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94844B54++0x0F line.long 0x00 "FIFO2_CH5_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH5_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO2_CH5_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO2_CH5_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94844B64++0x13 line.long 0x00 "FIFO2_CH5_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH5_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO2_CH5_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO2_CH5_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO2_CH5_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94844B80++0x13 line.long 0x00 "FIFO2_CH6_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO2_CH6_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO2_CH6_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO2_CH6_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO2_CH6_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94844B94++0x0F line.long 0x00 "FIFO2_CH6_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH6_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO2_CH6_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO2_CH6_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94844BA4++0x13 line.long 0x00 "FIFO2_CH6_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH6_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO2_CH6_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO2_CH6_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO2_CH6_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94844BC0++0x13 line.long 0x00 "FIFO2_CH7_CTRL,FIFO[i] channel [x] control register" bitfld.long 0x00 3. "WULOCK,RAM write unlock" "0,1" bitfld.long 0x00 2. "FLUSH,FIFO flush control" "0,1" bitfld.long 0x00 1. "RAP,RAM access priority" "0,1" newline bitfld.long 0x00 0. "RBM,Ring buffer mode enable" "0,1" line.long 0x04 "FIFO2_CH7_END_ADDR,FIFO[i] channel [x] end address register" hexmask.long.word 0x04 0.--9. 1. "ADDR,End address for FIFO channel [x]" line.long 0x08 "FIFO2_CH7_START_ADDR,FIFO[i] channel [x] start address register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Start address for FIFO channel [x]" line.long 0x0C "FIFO2_CH7_UPPER_WM,FIFO[i] channel [x] upper watermark register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Upper watermark address" line.long 0x10 "FIFO2_CH7_LOWER_WM,FIFO[i] channel [x] lower watermark register" hexmask.long.word 0x10 0.--9. 1. "ADDR,Lower watermark address" rgroup.long ad:0x94844BD4++0x0F line.long 0x00 "FIFO2_CH7_STATUS,FIFO[i] channel [x] status register" bitfld.long 0x00 3. "UP_WM,Upper watermark reached" "0,1" bitfld.long 0x00 2. "LOW_WM,Lower watermark reached" "0,1" bitfld.long 0x00 1. "FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH7_FILL_LEVEL,FIFO[i] channel [x] fill level register" hexmask.long.word 0x04 0.--10. 1. "LEVEL,Fill level of the current FIFO" line.long 0x08 "FIFO2_CH7_WR_PTR,FIFO[i] channel [x] write pointer register" hexmask.long.word 0x08 0.--9. 1. "ADDR,Position of the write pointer" line.long 0x0C "FIFO2_CH7_RD_PTR,FIFO[i] channel [x] read pointer register" hexmask.long.word 0x0C 0.--9. 1. "ADDR,Position of the read pointer" group.long ad:0x94844BE4++0x13 line.long 0x00 "FIFO2_CH7_IRQ_NOTIFY,FIFO[i] channel [x] interrupt notification register" bitfld.long 0x00 3. "FIFO_UWM,FIFO Upper watermark was overrun" "0,1" bitfld.long 0x00 2. "FIFO_LWM,FIFO Lower watermark was under-run" "0,1" bitfld.long 0x00 1. "FIFO_FULL,FIFO is full" "0,1" newline bitfld.long 0x00 0. "FIFO_EMPTY,FIFO is empty" "0,1" line.long 0x04 "FIFO2_CH7_IRQ_EN,FIFO[i] channel [x] interrupt enable register" bitfld.long 0x04 3. "FIFO_UWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 2. "FIFO_LWM_IRQ_EN,Interrupt enable" "0,1" bitfld.long 0x04 1. "FIFO_FULL_IRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x04 0. "FIFO_EMPTY_IRQ_EN,Interrupt enable" "0,1" line.long 0x08 "FIFO2_CH7_IRQ_FORCINT,FIFO[i] channel [x] force interrupt register" bitfld.long 0x08 3. "TRG_FIFO_UWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_UWM by software" "0,1" bitfld.long 0x08 2. "TRG_FIFO_LWM,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_LWM by software" "0,1" bitfld.long 0x08 1. "TRG_FIFO_FULL,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_FULL by software" "0,1" newline bitfld.long 0x08 0. "TRG_FIFO_EMPTY,Trigger the bit XXX by software FIFO[i]_CH[x]_IRQ_NOTIFY.FIFO_EMPTY by software" "0,1" line.long 0x0C "FIFO2_CH7_IRQ_MODE,FIFO[i] channel [x] interrupt mode control register" bitfld.long 0x0C 3. "DMA_HYST_DIR,DMA direction in hysteresis mode" "0,1" bitfld.long 0x0C 2. "DMA_HYSTERESIS,Enable DMA hysteresis mode" "0,1" bitfld.long 0x0C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x10 "FIFO2_CH7_EIRQ_EN,FIFO[i] channel [x] error interrupt enable register" bitfld.long 0x10 3. "FIFO_UWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 2. "FIFO_LWM_EIRQ_EN,Interrupt enable" "0,1" bitfld.long 0x10 1. "FIFO_FULL_EIRQ_EN,Interrupt enable" "0,1" newline bitfld.long 0x10 0. "FIFO_EMPTY_EIRQ_EN,Error interrupt enable" "0,1" group.long ad:0x94844C00++0x4F line.long 0x00 "SPE2_CTRL_STAT,SPE[i] Control Status Register" hexmask.long.byte 0x00 24.--31. 1. "FSOL,Fast Shutoff Level for TOM[i] channel 0 to 7" bitfld.long 0x00 23. "ETRIG_SEL,Extended trigger selection of signal TRIG_SEL" "0,1" rbitfld.long 0x00 20.--22. "NIP,New input pattern that was detected" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 19. "PDIR,Previous rotation direction" "0,1" bitfld.long 0x00 16.--18. "PIP,Previous input pattern that was detected by a regular input pattern change" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "ADIR,Rotation direction" "0,1" newline bitfld.long 0x00 12.--14. "AIP,Input pattern that was detected by a regular input pattern change" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. "SPE_PAT_PTR,Pattern selector for TOM output signals" "0,1,2,3,4,5,6,7" bitfld.long 0x00 7. "FSOM,Fast Shutoff Mode" "0,1" newline bitfld.long 0x00 6. "TIM_SEL,Select TIM input signal" "0,1" bitfld.long 0x00 4.--5. "TRIG_SEL,Select trigger input signal" "0,1,2,3" bitfld.long 0x00 3. "SIE2,SPE Input [k] enable for TIM[i]_CH[x:x] TIM[i]_CH[y:y] TIM[i]_CH[z:z]" "0,1" newline bitfld.long 0x00 2. "SIE1,SPE Input [k] enable for TIM[i]_CH[x:x] TIM[i]_CH[y:y] TIM[i]_CH[z:z]" "0,1" bitfld.long 0x00 1. "SIE0,SPE Input [k] enable for TIM[i]_CH[x:x] TIM[i]_CH[y:y] TIM[i]_CH[z:z]" "0,1" bitfld.long 0x00 0. "EN,SPE Submodule enable" "0,1" line.long 0x04 "SPE2_PAT,SPE[i] Input Pattern Definition Register" bitfld.long 0x04 29.--31. "IP7_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 28. "IP7_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 25.--27. "IP6_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 24. "IP6_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 21.--23. "IP5_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20. "IP5_VAL,Input pattern [t] is a valid pattern" "0,1" newline bitfld.long 0x04 17.--19. "IP4_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16. "IP4_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 13.--15. "IP3_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 12. "IP3_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 9.--11. "IP2_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8. "IP2_VAL,Input pattern [t] is a valid pattern" "0,1" newline bitfld.long 0x04 5.--7. "IP1_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4. "IP1_VAL,Input pattern [t] is a valid pattern" "0,1" bitfld.long 0x04 1.--3. "IP0_PAT,Input pattern [t]" "0,1,2,3,4,5,6,7" newline bitfld.long 0x04 0. "IP0_VAL,Input pattern [t] is a valid pattern" "0,1" line.long 0x08 "SPE2_OUT_PAT0,SPE[i] Output Definition Register" bitfld.long 0x08 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x08 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x08 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x08 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x0C "SPE2_OUT_PAT1,SPE[i] Output Definition Register" bitfld.long 0x0C 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x0C 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x0C 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x0C 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x10 "SPE2_OUT_PAT2,SPE[i] Output Definition Register" bitfld.long 0x10 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x10 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x10 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x10 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x14 "SPE2_OUT_PAT3,SPE[i] Output Definition Register" bitfld.long 0x14 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x14 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x14 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x14 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x18 "SPE2_OUT_PAT4,SPE[i] Output Definition Register" bitfld.long 0x18 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x18 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x18 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x18 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x1C "SPE2_OUT_PAT5,SPE[i] Output Definition Register" bitfld.long 0x1C 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x1C 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x1C 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x1C 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x20 "SPE2_OUT_PAT6,SPE[i] Output Definition Register" bitfld.long 0x20 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x20 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x20 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x20 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x24 "SPE2_OUT_PAT7,SPE[i] Output Definition Register" bitfld.long 0x24 14.--15. "SPE_OUT_PAT7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 12.--13. "SPE_OUT_PAT6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 10.--11. "SPE_OUT_PAT5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x24 8.--9. "SPE_OUT_PAT4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 6.--7. "SPE_OUT_PAT3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 4.--5. "SPE_OUT_PAT2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x24 2.--3. "SPE_OUT_PAT1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x24 0.--1. "SPE_OUT_PAT0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x28 "SPE2_OUT_CTRL,SPE[i] Output Control Register" bitfld.long 0x28 14.--15. "SPE_OUT_CTRL7,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 12.--13. "SPE_OUT_CTRL6,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 10.--11. "SPE_OUT_CTRL5,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x28 8.--9. "SPE_OUT_CTRL4,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 6.--7. "SPE_OUT_CTRL3,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 4.--5. "SPE_OUT_CTRL2,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" newline bitfld.long 0x28 2.--3. "SPE_OUT_CTRL1,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" bitfld.long 0x28 0.--1. "SPE_OUT_CTRL0,SPE output control value for TOM channel0 to TOM channel7" "0,1,2,3" line.long 0x2C "SPE2_IRQ_NOTIFY,SPE[i] Interrupt Notification Register" bitfld.long 0x2C 4. "SPE_RCMP,SPE revolution counter match event" "0,1" bitfld.long 0x2C 3. "SPE_BIS,Bouncing input signal detected" "0,1" bitfld.long 0x2C 2. "SPE_PERR,Wrong or invalid pattern detected at input" "0,1" newline bitfld.long 0x2C 1. "SPE_DCHG,SPE_DIR bit changed on behalf of new input pattern" "0,1" bitfld.long 0x2C 0. "SPE_NIPD,New input pattern interrupt occurred" "0,1" line.long 0x30 "SPE2_IRQ_EN,SPE[i] Interrupt Enable Register" bitfld.long 0x30 4. "SPE_RCMP_IRQ_EN,SPE_RCMP_IRQ interrupt enable" "0,1" bitfld.long 0x30 3. "SPE_BIS_IRQ_EN,SPE_BIS_IRQ interrupt enable" "0,1" bitfld.long 0x30 2. "SPE_PERR_IRQ_EN,SPE_PERR_IRQ interrupt enable" "0,1" newline bitfld.long 0x30 1. "SPE_DCHG_IRQ_EN,SPE_DCHG_IRQ interrupt enable" "0,1" bitfld.long 0x30 0. "SPE_NIPD_IRQ_EN,SPE_NIPD_IRQ interrupt enable" "0,1" line.long 0x34 "SPE2_IRQ_FORCINT,SPE[i] Interrupt Generation By Software" bitfld.long 0x34 4. "TRG_SPE_RCMP,Trigger SPE[i]_IRQ_NOTIFY.SPE_RCMP by software" "0,1" bitfld.long 0x34 3. "TRG_SPE_BIS,Trigger SPE[i]_IRQ_NOTIFY.SPE_BIS by software" "0,1" bitfld.long 0x34 2. "TRG_SPE_PERR,Trigger SPE[i]_IRQ_NOTIFY.SPE_PERR by software" "0,1" newline bitfld.long 0x34 1. "TRG_SPE_DCHG,Trigger SPE[i]_IRQ_NOTIFY.SPE_DCHG by software" "0,1" bitfld.long 0x34 0. "TRG_SPE_NIPD,Trigger SPE[i]_IRQ_NOTIFY.SPE_NIPD by software" "0,1" line.long 0x38 "SPE2_IRQ_MODE,SPE[i] Interrupt Mode Configuration Register" bitfld.long 0x38 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x3C "SPE2_EIRQ_EN,SPE[i] Error Interrupt Enable Register" bitfld.long 0x3C 4. "SPE_RCMP_EIRQ_EN,SPE[i]_RCMP_EIRQ error interrupt enable" "0,1" bitfld.long 0x3C 3. "SPE_BIS_EIRQ_EN,SPE[i]_BIS_EIRQ error interrupt enable" "0,1" bitfld.long 0x3C 2. "SPE_PERR_EIRQ_EN,SPE_PERR_EIRQ error interrupt enable" "0,1" newline bitfld.long 0x3C 1. "SPE_DCHG_EIRQ_EN,SPE_DCHG_EIRQ error interrupt enable" "0,1" bitfld.long 0x3C 0. "SPE_NIPD_EIRQ_EN,SPE_NIPD_EIRQ interrupt enable" "0,1" line.long 0x40 "SPE2_REV_CNT,SPE[i] Input Revolution Counter" hexmask.long.tbyte 0x40 0.--23. 1. "REV_CNT,Input signal revolution counter" line.long 0x44 "SPE2_REV_CMP,SPE[i] Revolution Counter Compare Value" hexmask.long.tbyte 0x44 0.--23. 1. "REV_CMP,Input signal revolution counter compare value" line.long 0x48 "SPE2_CTRL_STAT2,SPE[i] Control Status Register 2" bitfld.long 0x48 8.--10. "SPE_PAT_PTR_BWD,Pattern selector for TOM output signals in case of SPE[i]_CMD.SPE_CTRL_CMD = 0b01 (e.g. backward direction)" "0,1,2,3,4,5,6,7" line.long 0x4C "SPE2_CMD,SPE[i] Command Register" bitfld.long 0x4C 16. "SPE_UPD_TRIG,SPE updater trigger" "0,1" bitfld.long 0x4C 0.--1. "SPE_CTRL_CMD,SPE control command" "0,1,2,3" rgroup.long ad:0x94845000++0x07 line.long 0x00 "AXIM2_FREE,AXIM[i] slot allocation status." bitfld.long 0x00 3. "FREE3,This bit represents the allocation status of the slot [t]" "0,1" bitfld.long 0x00 2. "FREE2,This bit represents the allocation status of the slot [t]" "0,1" bitfld.long 0x00 1. "FREE1,This bit represents the allocation status of the slot [t]" "0,1" newline bitfld.long 0x00 0. "FREE0,This bit represents the allocation status of the slot [t]" "0,1" line.long 0x04 "AXIM2_REQUEST,AXIM[i] slot request (allocation)." hexmask.long.byte 0x04 24.--31. 1. "REQID,This bit field shows the new allocated slot as binary encoded index" bitfld.long 0x04 3. "REQ1HOT3,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" bitfld.long 0x04 2. "REQ1HOT2,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" newline bitfld.long 0x04 1. "REQ1HOT1,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" bitfld.long 0x04 0. "REQ1HOT0,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" group.long ad:0x94845008++0x03 line.long 0x00 "AXIM2_RELEASE,AXIM[i] slot release (de-allocation)." bitfld.long 0x00 3. "RELREQ3,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" bitfld.long 0x00 2. "RELREQ2,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" bitfld.long 0x00 1. "RELREQ1,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" newline bitfld.long 0x00 0. "RELREQ0,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" group.long ad:0x94845020++0x03 line.long 0x00 "AXIM2_SLOT0_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94845028++0x03 line.long 0x00 "AXIM2_SLOT0_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94845030++0x07 line.long 0x00 "AXIM2_SLOT0_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM2_SLOT0_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94845038++0x03 line.long 0x00 "AXIM2_SLOT0_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94845040++0x03 line.long 0x00 "AXIM2_SLOT1_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94845048++0x03 line.long 0x00 "AXIM2_SLOT1_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94845050++0x07 line.long 0x00 "AXIM2_SLOT1_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM2_SLOT1_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94845058++0x03 line.long 0x00 "AXIM2_SLOT1_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94845060++0x03 line.long 0x00 "AXIM2_SLOT2_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94845068++0x03 line.long 0x00 "AXIM2_SLOT2_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94845070++0x07 line.long 0x00 "AXIM2_SLOT2_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM2_SLOT2_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94845078++0x03 line.long 0x00 "AXIM2_SLOT2_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94845080++0x03 line.long 0x00 "AXIM2_SLOT3_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94845088++0x03 line.long 0x00 "AXIM2_SLOT3_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94845090++0x07 line.long 0x00 "AXIM2_SLOT3_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM2_SLOT3_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94845098++0x03 line.long 0x00 "AXIM2_SLOT3_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94846000++0x03 "FIFO2_MEMORY - array[1024]" line.long 0x00 "FIFO2_MEMORY[0],FIFO data memory" button "DATA" "d ad:0x094846000++0x000000FFF /long" group.long ad:0x94850000++0x03 "MCS2_MEM - array[6144]" line.long 0x00 "MCS2_MEM[0],MCS[i] memory region" button "DATA" "d ad:0x094850000++0x000005FFF /long" tree.end tree "GTM_CLS3" group.long ad:0x94861800++0x37 line.long 0x00 "ATOM3_CH0_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM3_CH0_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM3_CH0_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM3_CH0_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM3_CH0_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM3_CH0_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM3_CH0_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM3_CH0_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM3_CH0_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM3_CH0_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM3_CH0_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM3_CH0_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM3_CH0_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM3_CH0_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94861880++0x37 line.long 0x00 "ATOM3_CH1_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM3_CH1_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM3_CH1_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM3_CH1_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM3_CH1_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM3_CH1_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM3_CH1_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM3_CH1_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM3_CH1_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM3_CH1_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM3_CH1_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM3_CH1_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM3_CH1_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM3_CH1_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94861900++0x37 line.long 0x00 "ATOM3_CH2_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM3_CH2_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM3_CH2_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM3_CH2_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM3_CH2_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM3_CH2_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM3_CH2_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM3_CH2_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM3_CH2_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM3_CH2_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM3_CH2_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM3_CH2_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM3_CH2_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM3_CH2_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94861980++0x37 line.long 0x00 "ATOM3_CH3_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM3_CH3_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM3_CH3_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM3_CH3_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM3_CH3_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM3_CH3_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM3_CH3_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM3_CH3_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM3_CH3_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM3_CH3_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM3_CH3_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM3_CH3_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM3_CH3_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM3_CH3_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94861A00++0x37 line.long 0x00 "ATOM3_CH4_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM3_CH4_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM3_CH4_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM3_CH4_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM3_CH4_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM3_CH4_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM3_CH4_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM3_CH4_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM3_CH4_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM3_CH4_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM3_CH4_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM3_CH4_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM3_CH4_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM3_CH4_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94861A80++0x37 line.long 0x00 "ATOM3_CH5_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM3_CH5_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM3_CH5_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM3_CH5_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM3_CH5_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM3_CH5_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM3_CH5_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM3_CH5_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM3_CH5_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM3_CH5_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM3_CH5_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM3_CH5_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM3_CH5_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM3_CH5_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94861B00++0x37 line.long 0x00 "ATOM3_CH6_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM3_CH6_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM3_CH6_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM3_CH6_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM3_CH6_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM3_CH6_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM3_CH6_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM3_CH6_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM3_CH6_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM3_CH6_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM3_CH6_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM3_CH6_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM3_CH6_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM3_CH6_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94861B80++0x37 line.long 0x00 "ATOM3_CH7_RDADDR,ATOM[i] channel[x] ARU read address register" hexmask.long.word 0x00 16.--24. 1. "RDADDR1,ARU Read address 1" hexmask.long.word 0x00 0.--8. 1. "RDADDR0,ARU Read address 0" line.long 0x04 "ATOM3_CH7_CTRL,ATOM[i] channel [x] control register" bitfld.long 0x04 31. "FREEZE,ATOM Freeze Mode enable" "0,1" bitfld.long 0x04 30. "SOMB,SOMB mode" "0,1" bitfld.long 0x04 29. "EXT_FUPD,Enable force update by external trigger signal" "0,1" newline bitfld.long 0x04 27. "ABM,ARU blocking mode" "0,1" bitfld.long 0x04 26. "OSM,One-shot mode" "0,1" bitfld.long 0x04 25. "SLA,'Serve last' ARU communication strategy" "0,1" newline bitfld.long 0x04 24. "TRIGOUT,Trigger output selection (output signal ATOM_CH_TRIGOUT[x:x]) of module ATOM [i] channel [x]" "0,1" bitfld.long 0x04 23. "EXTTRIGOUT,Select EXT_TRIGIN[x:x] as potential output signal ATOM_CH_TRIGOUT[x:x]" "0,1" bitfld.long 0x04 22. "EXT_TRIG,Select EXT_TRIGIN[x:x] as trigger signal" "0,1" newline bitfld.long 0x04 21. "OSM_TRIG,Enable trigger of one-shot pulse by the selected trigger signal" "0,1" bitfld.long 0x04 20. "RST_CCU0,Reset source of CCU0" "0,1" bitfld.long 0x04 18.--19. "UDMODE,Up/down counter mode" "0,1,2,3" newline bitfld.long 0x04 17. "TRIG_PULSE,Trigger output pulse length of one cluster clock period" "0,1" bitfld.long 0x04 16. "WR_REQ,CPU Write request bit for late compare register update" "0,1" bitfld.long 0x04 12.--15. "CLK_SRC,CMU clock source" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x04 11. "SL,Initial signal level" "0,1" bitfld.long 0x04 10. "EUPM,Extended update mode" "0,1" bitfld.long 0x04 9. "CMP_CTRL,CCU[x] compare strategy select" "0,1" newline bitfld.long 0x04 4.--8. "ACB,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 3. "ARU_EN,ARU Input stream enable" "0,1" bitfld.long 0x04 2. "TB12_SEL,Select time base value CCM[i]_TBU_TS1 or CCM[i]_TBU_TS2" "0,1" newline bitfld.long 0x04 0.--1. "MODE,ATOM channel mode select" "0,1,2,3" line.long 0x08 "ATOM3_CH7_SR0,ATOM[i] channel [x] CCU0 compare shadow register" hexmask.long.tbyte 0x08 0.--23. 1. "SR0,ATOM channel [x] shadow register SR0" line.long 0x0C "ATOM3_CH7_SR1,ATOM[i] channel [x] CCU1 compare shadow register" hexmask.long.tbyte 0x0C 0.--23. 1. "SR1,ATOM channel [x] shadow register SR1" line.long 0x10 "ATOM3_CH7_CM0,ATOM[i] channel [x] CCU0 compare register" hexmask.long.tbyte 0x10 0.--23. 1. "CM0,ATOM CCU0 compare register" line.long 0x14 "ATOM3_CH7_CM1,ATOM[i] channel [x] CCU1 compare register" hexmask.long.tbyte 0x14 0.--23. 1. "CM1,ATOM CCU1 compare register" line.long 0x18 "ATOM3_CH7_CN0,ATOM[i] channel [x] CCU0 counter register" hexmask.long.tbyte 0x18 0.--23. 1. "CN0,ATOM CCU0 counter register" line.long 0x1C "ATOM3_CH7_STAT,ATOM[i] channel [x] status register" bitfld.long 0x1C 29. "OSM_RTF,One-shot mode retrigger failed flag" "0,1" rbitfld.long 0x1C 24.--28. "ACBO,ATOM Internal status bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rbitfld.long 0x1C 23. "DR,ARU data rejected flag" "0,1" newline bitfld.long 0x1C 22. "WRF,Write request of CPU failed for late update" "0,1" rbitfld.long 0x1C 21. "DV,Valid ARU Data stored in compare registers" "0,1" rbitfld.long 0x1C 16.--20. "ACBI,ATOM Mode control bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" newline rbitfld.long 0x1C 0. "OL,Output signal level of ATOM_OUT[x:x]" "0,1" line.long 0x20 "ATOM3_CH7_IRQ_NOTIFY,ATOM[i] channel [x] interrupt notification register" bitfld.long 0x20 1. "CCU1TC,CCU Trigger condition interrupt for channel [x]" "0,1" bitfld.long 0x20 0. "CCU0TC,CCU0 Trigger condition interrupt for channel [x]" "0,1" line.long 0x24 "ATOM3_CH7_IRQ_EN,ATOM[i] channel [x] interrupt enable register" bitfld.long 0x24 1. "CCU1TC_IRQ_EN,ATOM_CCU1TC[x]_IRQ interrupt enable" "0,1" bitfld.long 0x24 0. "CCU0TC_IRQ_EN,ATOM_CCU0TC[x]_IRQ interrupt enable" "0,1" line.long 0x28 "ATOM3_CH7_IRQ_FORCINT,ATOM[i] channel [x] software interrupt generation" bitfld.long 0x28 1. "TRG_CCU1TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU1TC by software" "0,1" bitfld.long 0x28 0. "TRG_CCU0TC,Trigger the bit ATOM[i]_CH[x]_IRQ_NOTIFY.CCU0TC by software" "0,1" line.long 0x2C "ATOM3_CH7_IRQ_MODE,ATOM[i] channel [x] interrupt mode configuration register" bitfld.long 0x2C 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x30 "ATOM3_CH7_CTRL2,ATOM[i] channel [x] control2 register" bitfld.long 0x30 0. "HRES,ATOM[i]_CH[x]_CTRL2.HRES: ATOM high resolution support" "0,1" line.long 0x34 "ATOM3_CH7_CTRL_SR,ATOM[i] channel [x] control shadow register" bitfld.long 0x34 12.--15. "CLK_SRC_SR,Shadow register for ATOM[i]_CH[x]_CTRL.CLK_SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x34 11. "SL_SR,Shadow register for ATOM[i]_CH[x]_CTRL.SL" "0,1" group.long ad:0x94861C40++0x1F line.long 0x00 "ATOM3_AGC_GLB_CTRL,ATOM[i] AGC global control register" bitfld.long 0x00 30.--31. "UPEN_CTRL7,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 28.--29. "UPEN_CTRL6,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 26.--27. "UPEN_CTRL5,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" newline bitfld.long 0x00 24.--25. "UPEN_CTRL4,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 22.--23. "UPEN_CTRL3,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 20.--21. "UPEN_CTRL2,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" newline bitfld.long 0x00 18.--19. "UPEN_CTRL1,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 16.--17. "UPEN_CTRL0,ATOM channel [k] enable update of register ATOM[i]_CH[k]_CM0 ATOM[i]_CH[k]_CM1 ATOM[i]_CH[k]_CTRL.SL and ATOM[i]_CH[k]_CTRL.CLK_SRC from ATOM[i]_CH[k]_SR0 ATOM[i]_CH[k]_SR1 ATOM[i]_CH[k]_CTRL_SR.SL_SR and ATOM[i]_CH[k]_CTRL_SR.CLK_SRC_SR" "0,1,2,3" bitfld.long 0x00 15. "RST_CH7,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 14. "RST_CH6,Software reset of channel [k]" "0,1" bitfld.long 0x00 13. "RST_CH5,Software reset of channel [k]" "0,1" bitfld.long 0x00 12. "RST_CH4,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 11. "RST_CH3,Software reset of channel [k]" "0,1" bitfld.long 0x00 10. "RST_CH2,Software reset of channel [k]" "0,1" bitfld.long 0x00 9. "RST_CH1,Software reset of channel [k]" "0,1" newline bitfld.long 0x00 8. "RST_CH0,Software reset of channel [k]" "0,1" bitfld.long 0x00 0. "HOST_TRIG,Trigger request signal (see AGC) to update the register ATOM[i]_AGC_ENDIS_STAT and ATOM[i]_AGC_OUTEN_STAT" "0,1" line.long 0x04 "ATOM3_AGC_ENDIS_CTRL,ATOM[i] AGC enable/disable control register" bitfld.long 0x04 14.--15. "ENDIS_CTRL7,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 12.--13. "ENDIS_CTRL6,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 10.--11. "ENDIS_CTRL5,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" newline bitfld.long 0x04 8.--9. "ENDIS_CTRL4,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 6.--7. "ENDIS_CTRL3,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 4.--5. "ENDIS_CTRL2,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" newline bitfld.long 0x04 2.--3. "ENDIS_CTRL1,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" bitfld.long 0x04 0.--1. "ENDIS_CTRL0,ATOM [i] channel [x] enable/disable control register" "0,1,2,3" line.long 0x08 "ATOM3_AGC_ENDIS_STAT,ATOM[i] AGC enable/disable status register" bitfld.long 0x08 14.--15. "ENDIS_STAT7,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 12.--13. "ENDIS_STAT6,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 10.--11. "ENDIS_STAT5,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" newline bitfld.long 0x08 8.--9. "ENDIS_STAT4,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 6.--7. "ENDIS_STAT3,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 4.--5. "ENDIS_STAT2,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" newline bitfld.long 0x08 2.--3. "ENDIS_STAT1,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" bitfld.long 0x08 0.--1. "ENDIS_STAT0,ATOM [i] channel [k] enable/disable status register" "0,1,2,3" line.long 0x0C "ATOM3_AGC_ACT_TB,ATOM[i] AGC action time base register" bitfld.long 0x0C 25.--26. "TBU_SEL,Selection of time base used for comparison" "0,1,2,3" bitfld.long 0x0C 24. "TB_TRIG,Set trigger request" "0,1" hexmask.long.tbyte 0x0C 0.--23. 1. "ACT_TB,Specifies the signed compare value with selected signal CCM[i]_TBU_TS0/CCM[i]_TBU_TS1/CCM[i]_TBU_TS2" line.long 0x10 "ATOM3_AGC_OUTEN_CTRL,ATOM[i] AGC output enable control register" bitfld.long 0x10 14.--15. "OUTEN_CTRL7,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 12.--13. "OUTEN_CTRL6,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 10.--11. "OUTEN_CTRL5,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" newline bitfld.long 0x10 8.--9. "OUTEN_CTRL4,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 6.--7. "OUTEN_CTRL3,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 4.--5. "OUTEN_CTRL2,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" newline bitfld.long 0x10 2.--3. "OUTEN_CTRL1,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" bitfld.long 0x10 0.--1. "OUTEN_CTRL0,Output enable control of ATOM [i] channel [k] ouput ATOM_OUT[x:x]" "0,1,2,3" line.long 0x14 "ATOM3_AGC_OUTEN_STAT,ATOM[i] AGC output enable status register" bitfld.long 0x14 14.--15. "OUTEN_STAT7,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 12.--13. "OUTEN_STAT6,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 10.--11. "OUTEN_STAT5,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" newline bitfld.long 0x14 8.--9. "OUTEN_STAT4,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 6.--7. "OUTEN_STAT3,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 4.--5. "OUTEN_STAT2,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" newline bitfld.long 0x14 2.--3. "OUTEN_STAT1,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" bitfld.long 0x14 0.--1. "OUTEN_STAT0,Output enable status of ATOM [i] channel [x] ouput ATOM_OUT[k:k]" "0,1,2,3" line.long 0x18 "ATOM3_AGC_FUPD_CTRL,ATOM[i] AGC force update control register" bitfld.long 0x18 30.--31. "RSTCN0_CH7,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 28.--29. "RSTCN0_CH6,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 26.--27. "RSTCN0_CH5,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" newline bitfld.long 0x18 24.--25. "RSTCN0_CH4,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 22.--23. "RSTCN0_CH3,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 20.--21. "RSTCN0_CH2,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" newline bitfld.long 0x18 18.--19. "RSTCN0_CH1,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 16.--17. "RSTCN0_CH0,Reset ATOM[i]_CH[k]_CN0 of channel [k] on force update event" "0,1,2,3" bitfld.long 0x18 14.--15. "FUPD_CTRL7,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 12.--13. "FUPD_CTRL6,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 10.--11. "FUPD_CTRL5,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 8.--9. "FUPD_CTRL4,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 6.--7. "FUPD_CTRL3,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 4.--5. "FUPD_CTRL2,Force update of ATOM channel [k] operation registers" "0,1,2,3" bitfld.long 0x18 2.--3. "FUPD_CTRL1,Force update of ATOM channel [k] operation registers" "0,1,2,3" newline bitfld.long 0x18 0.--1. "FUPD_CTRL0,Force update of ATOM channel [k] operation registers" "0,1,2,3" line.long 0x1C "ATOM3_AGC_INT_TRIG,ATOM[i] AGC internal trigger control register" bitfld.long 0x1C 14.--15. "INT_TRIG7,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 12.--13. "INT_TRIG6,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 10.--11. "INT_TRIG5,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" newline bitfld.long 0x1C 8.--9. "INT_TRIG4,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 6.--7. "INT_TRIG3,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 4.--5. "INT_TRIG2,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" newline bitfld.long 0x1C 2.--3. "INT_TRIG1,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" bitfld.long 0x1C 0.--1. "INT_TRIG0,Select input signal ATOM_CH_TRIGOUT[k:k] as a trigger source" "0,1,2,3" group.long ad:0x94862000++0x23 line.long 0x00 "MCS3_CH0_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS3_CH0_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS3_CH0_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS3_CH0_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS3_CH0_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS3_CH0_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS3_CH0_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS3_CH0_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS3_CH0_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94862024++0x03 line.long 0x00 "MCS3_CH0_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9486203C++0x03 line.long 0x00 "MCS3_CH0_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948620E0++0x17 line.long 0x00 "MCS3_CH0_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS3_CH0_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS3_CH0_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS3_CH0_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS3_CH0_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS3_CH0_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94862100++0x23 line.long 0x00 "MCS3_CH1_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS3_CH1_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS3_CH1_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS3_CH1_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS3_CH1_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS3_CH1_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS3_CH1_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS3_CH1_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS3_CH1_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94862124++0x03 line.long 0x00 "MCS3_CH1_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9486213C++0x03 line.long 0x00 "MCS3_CH1_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948621E0++0x17 line.long 0x00 "MCS3_CH1_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS3_CH1_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS3_CH1_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS3_CH1_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS3_CH1_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS3_CH1_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94862200++0x23 line.long 0x00 "MCS3_CH2_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS3_CH2_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS3_CH2_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS3_CH2_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS3_CH2_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS3_CH2_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS3_CH2_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS3_CH2_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS3_CH2_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94862224++0x03 line.long 0x00 "MCS3_CH2_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9486223C++0x03 line.long 0x00 "MCS3_CH2_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948622E0++0x17 line.long 0x00 "MCS3_CH2_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS3_CH2_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS3_CH2_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS3_CH2_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS3_CH2_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS3_CH2_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94862300++0x23 line.long 0x00 "MCS3_CH3_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS3_CH3_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS3_CH3_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS3_CH3_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS3_CH3_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS3_CH3_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS3_CH3_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS3_CH3_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS3_CH3_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94862324++0x03 line.long 0x00 "MCS3_CH3_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9486233C++0x03 line.long 0x00 "MCS3_CH3_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948623E0++0x17 line.long 0x00 "MCS3_CH3_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS3_CH3_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS3_CH3_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS3_CH3_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS3_CH3_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS3_CH3_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94862400++0x23 line.long 0x00 "MCS3_CH4_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS3_CH4_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS3_CH4_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS3_CH4_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS3_CH4_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS3_CH4_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS3_CH4_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS3_CH4_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS3_CH4_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94862424++0x03 line.long 0x00 "MCS3_CH4_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9486243C++0x03 line.long 0x00 "MCS3_CH4_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948624E0++0x17 line.long 0x00 "MCS3_CH4_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS3_CH4_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS3_CH4_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS3_CH4_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS3_CH4_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS3_CH4_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94862500++0x23 line.long 0x00 "MCS3_CH5_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS3_CH5_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS3_CH5_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS3_CH5_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS3_CH5_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS3_CH5_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS3_CH5_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS3_CH5_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS3_CH5_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94862524++0x03 line.long 0x00 "MCS3_CH5_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9486253C++0x03 line.long 0x00 "MCS3_CH5_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948625E0++0x17 line.long 0x00 "MCS3_CH5_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS3_CH5_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS3_CH5_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS3_CH5_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS3_CH5_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS3_CH5_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94862600++0x23 line.long 0x00 "MCS3_CH6_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS3_CH6_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS3_CH6_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS3_CH6_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS3_CH6_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS3_CH6_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS3_CH6_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS3_CH6_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS3_CH6_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94862624++0x03 line.long 0x00 "MCS3_CH6_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9486263C++0x03 line.long 0x00 "MCS3_CH6_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948626E0++0x17 line.long 0x00 "MCS3_CH6_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS3_CH6_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS3_CH6_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS3_CH6_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS3_CH6_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS3_CH6_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94862700++0x23 line.long 0x00 "MCS3_CH7_R0,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x00 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x04 "MCS3_CH7_R1,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x04 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x08 "MCS3_CH7_R2,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x08 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x0C "MCS3_CH7_R3,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x0C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x10 "MCS3_CH7_R4,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x10 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x14 "MCS3_CH7_R5,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x14 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x18 "MCS3_CH7_R6,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x18 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x1C "MCS3_CH7_R7,MCS[i] channel x general purpose register [y]" hexmask.long.tbyte 0x1C 0.--23. 1. "DATA,Data of general purpose register R[y]" line.long 0x20 "MCS3_CH7_CTRL,MCS[i] channel x control register" rbitfld.long 0x20 10. "SAT,Successful ARU transfer bit" "0,1" rbitfld.long 0x20 9. "CWT,Cancel WURM instruction state" "0,1" rbitfld.long 0x20 8. "CAT,Cancel ARU transfer state" "0,1" newline rbitfld.long 0x20 7. "N,Negative bit state" "0,1" rbitfld.long 0x20 6. "V,Overflow bit state" "0,1" rbitfld.long 0x20 5. "Z,Zero bit state" "0,1" newline rbitfld.long 0x20 4. "CY,Carry bit state" "0,1" rbitfld.long 0x20 2. "ERR,Error state" "0,1" rbitfld.long 0x20 1. "IRQ,Interrupt state" "0,1" newline bitfld.long 0x20 0. "EN,Enable/Disable Request of MCS-channel x" "0,1" rgroup.long ad:0x94862724++0x03 line.long 0x00 "MCS3_CH7_ACB,MCS[i] channel x ARU control Bit register" bitfld.long 0x00 4. "ACB4,ARU Control bit [k]" "0,1" bitfld.long 0x00 3. "ACB3,ARU Control bit [k]" "0,1" bitfld.long 0x00 2. "ACB2,ARU Control bit [k]" "0,1" newline bitfld.long 0x00 1. "ACB1,ARU Control bit [k]" "0,1" bitfld.long 0x00 0. "ACB0,ARU Control bit [k]" "0,1" rgroup.long ad:0x9486273C++0x03 line.long 0x00 "MCS3_CH7_MHB,MCS[i] channel x memory high byte register" hexmask.long.byte 0x00 0.--7. 1. "DATA,Data of memory high bit register MHB" group.long ad:0x948627E0++0x17 line.long 0x00 "MCS3_CH7_PC,MCS[i] channel x program counter register" hexmask.long.word 0x00 0.--15. 1. "PC,Current Program Counter" line.long 0x04 "MCS3_CH7_IRQ_NOTIFY,MCS[i] channel x interrupt notification register" bitfld.long 0x04 2. "ERR_IRQ,MCS channel x ERR interrupt" "0,1" bitfld.long 0x04 0. "MCS_IRQ,Interrupt request by MCS-channel x" "0,1" line.long 0x08 "MCS3_CH7_IRQ_EN,MCS[i] channel x interrupt enable register" bitfld.long 0x08 2. "ERR_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ interrupt enable" "0,1" bitfld.long 0x08 0. "MCS_IRQ_EN,MCS channel x MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ interrupt enable" "0,1" line.long 0x0C "MCS3_CH7_IRQ_FORCINT,MCS[i] channel x force interrupt register" bitfld.long 0x0C 2. "TRG_ERR_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.ERR_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_MCS_IRQ,Trigger the bit MCS[i]_CH[x]_IRQ_NOTIFY.MCS_IRQ by software" "0,1" line.long 0x10 "MCS3_CH7_IRQ_MODE,MCS[i] channel x IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "MCS3_CH7_EIRQ_EN,MCS[i] channel x error interrupt enable register" bitfld.long 0x14 2. "ERR_EIRQ_EN,MCS channel x ERR_EIRQ error interrupt enable" "0,1" bitfld.long 0x14 0. "MCS_EIRQ_EN,MCS[i]_CH[x]_EIRQ_EN.MCS_EIRQ_EN: MCS channel x MCS_EIRQ error interrupt enable" "0,1" group.long ad:0x94862E28++0x07 line.long 0x00 "MCS3_CTRG,MCS[i] clear trigger control register" bitfld.long 0x00 23. "TRG23,Trigger bit [o]" "0,1" bitfld.long 0x00 22. "TRG22,Trigger bit [o]" "0,1" bitfld.long 0x00 21. "TRG21,Trigger bit [o]" "0,1" newline bitfld.long 0x00 20. "TRG20,Trigger bit [o]" "0,1" bitfld.long 0x00 19. "TRG19,Trigger bit [o]" "0,1" bitfld.long 0x00 18. "TRG18,Trigger bit [o]" "0,1" newline bitfld.long 0x00 17. "TRG17,Trigger bit [o]" "0,1" bitfld.long 0x00 16. "TRG16,Trigger bit [o]" "0,1" bitfld.long 0x00 15. "TRG15,Trigger bit [n]" "0,1" newline bitfld.long 0x00 14. "TRG14,Trigger bit [n]" "0,1" bitfld.long 0x00 13. "TRG13,Trigger bit [n]" "0,1" bitfld.long 0x00 12. "TRG12,Trigger bit [n]" "0,1" newline bitfld.long 0x00 11. "TRG11,Trigger bit [n]" "0,1" bitfld.long 0x00 10. "TRG10,Trigger bit [n]" "0,1" bitfld.long 0x00 9. "TRG9,Trigger bit [n]" "0,1" newline bitfld.long 0x00 8. "TRG8,Trigger bit [n]" "0,1" bitfld.long 0x00 7. "TRG7,Trigger bit [m]" "0,1" bitfld.long 0x00 6. "TRG6,Trigger bit [m]" "0,1" newline bitfld.long 0x00 5. "TRG5,Trigger bit [m]" "0,1" bitfld.long 0x00 4. "TRG4,Trigger bit [m]" "0,1" bitfld.long 0x00 3. "TRG3,Trigger bit [m]" "0,1" newline bitfld.long 0x00 2. "TRG2,Trigger bit [m]" "0,1" bitfld.long 0x00 1. "TRG1,Trigger bit [m]" "0,1" bitfld.long 0x00 0. "TRG0,Trigger bit [m]" "0,1" line.long 0x04 "MCS3_STRG,MCS[i] set trigger control register" bitfld.long 0x04 23. "TRG23,Trigger bit [k]" "0,1" bitfld.long 0x04 22. "TRG22,Trigger bit [k]" "0,1" bitfld.long 0x04 21. "TRG21,Trigger bit [k]" "0,1" newline bitfld.long 0x04 20. "TRG20,Trigger bit [k]" "0,1" bitfld.long 0x04 19. "TRG19,Trigger bit [k]" "0,1" bitfld.long 0x04 18. "TRG18,Trigger bit [k]" "0,1" newline bitfld.long 0x04 17. "TRG17,Trigger bit [k]" "0,1" bitfld.long 0x04 16. "TRG16,Trigger bit [k]" "0,1" bitfld.long 0x04 15. "TRG15,Trigger bit [k]" "0,1" newline bitfld.long 0x04 14. "TRG14,Trigger bit [k]" "0,1" bitfld.long 0x04 13. "TRG13,Trigger bit [k]" "0,1" bitfld.long 0x04 12. "TRG12,Trigger bit [k]" "0,1" newline bitfld.long 0x04 11. "TRG11,Trigger bit [k]" "0,1" bitfld.long 0x04 10. "TRG10,Trigger bit [k]" "0,1" bitfld.long 0x04 9. "TRG9,Trigger bit [k]" "0,1" newline bitfld.long 0x04 8. "TRG8,Trigger bit [k]" "0,1" bitfld.long 0x04 7. "TRG7,Trigger bit [k]" "0,1" bitfld.long 0x04 6. "TRG6,Trigger bit [k]" "0,1" newline bitfld.long 0x04 5. "TRG5,Trigger bit [k]" "0,1" bitfld.long 0x04 4. "TRG4,Trigger bit [k]" "0,1" bitfld.long 0x04 3. "TRG3,Trigger bit [k]" "0,1" newline bitfld.long 0x04 2. "TRG2,Trigger bit [k]" "0,1" bitfld.long 0x04 1. "TRG1,Trigger bit [k]" "0,1" bitfld.long 0x04 0. "TRG0,Trigger bit [k]" "0,1" group.long ad:0x94862F00++0x13 line.long 0x00 "MCS3_CTRL_STAT,MCS[i] control and status register" bitfld.long 0x00 26. "HLT_AEIM_ERR,Halt on AEI bus master error" "0,1" bitfld.long 0x00 25. "EN_HVD,Enable Modified Harvard architecture" "0,1" bitfld.long 0x00 24. "EN_TIM_FOUT,Enable routing of TIM[i]_CH[x]_F_OUT signal" "0,1" newline rbitfld.long 0x00 20.--22. "ERR_SRC_ID,Error source identifier" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16. "RAM_RST,RAM reset bit" "0,1" bitfld.long 0x00 8.--11. "SCD_CH,Channel selection for scheduling algorithm" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 0.--1. "SCD_MODE,Select MCS scheduling mode" "0,1,2,3" line.long 0x04 "MCS3_RESET,MCS[i] reset register" bitfld.long 0x04 7. "RST7,Software reset of channel x" "0,1" bitfld.long 0x04 6. "RST6,Software reset of channel x" "0,1" bitfld.long 0x04 5. "RST5,Software reset of channel x" "0,1" newline bitfld.long 0x04 4. "RST4,Software reset of channel x" "0,1" bitfld.long 0x04 3. "RST3,Software reset of channel x" "0,1" bitfld.long 0x04 2. "RST2,Software reset of channel x" "0,1" newline bitfld.long 0x04 1. "RST1,Software reset of channel x" "0,1" bitfld.long 0x04 0. "RST0,Software reset of channel x" "0,1" line.long 0x08 "MCS3_CAT,MCS[i] cancel ARU transfer instruction" bitfld.long 0x08 7. "CAT7,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 6. "CAT6,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 5. "CAT5,Cancel ARU transfer of channel x" "0,1" newline bitfld.long 0x08 4. "CAT4,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 3. "CAT3,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 2. "CAT2,Cancel ARU transfer of channel x" "0,1" newline bitfld.long 0x08 1. "CAT1,Cancel ARU transfer of channel x" "0,1" bitfld.long 0x08 0. "CAT0,Cancel ARU transfer of channel x" "0,1" line.long 0x0C "MCS3_CWT,MCS[i] cancel waiting instruction" bitfld.long 0x0C 7. "CWT7,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 6. "CWT6,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 5. "CWT5,Cancel waiting instruction for channel x" "0,1" newline bitfld.long 0x0C 4. "CWT4,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 3. "CWT3,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 2. "CWT2,Cancel waiting instruction for channel x" "0,1" newline bitfld.long 0x0C 1. "CWT1,Cancel waiting instruction for channel x" "0,1" bitfld.long 0x0C 0. "CWT0,Cancel waiting instruction for channel x" "0,1" line.long 0x10 "MCS3_ERR,MCS[i] error register" bitfld.long 0x10 7. "ERR7,Error State of MCS-channel x" "0,1" bitfld.long 0x10 6. "ERR6,Error State of MCS-channel x" "0,1" bitfld.long 0x10 5. "ERR5,Error State of MCS-channel x" "0,1" newline bitfld.long 0x10 4. "ERR4,Error State of MCS-channel x" "0,1" bitfld.long 0x10 3. "ERR3,Error State of MCS-channel x" "0,1" bitfld.long 0x10 2. "ERR2,Error State of MCS-channel x" "0,1" newline bitfld.long 0x10 1. "ERR1,Error State of MCS-channel x" "0,1" bitfld.long 0x10 0. "ERR0,Error State of MCS-channel x" "0,1" group.long ad:0x94862F1C++0x13 line.long 0x00 "MCS3_REG_PROT,MCS[i] write protection register" bitfld.long 0x00 14.--15. "WPROT7,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 12.--13. "WPROT6,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 10.--11. "WPROT5,Register Write Protection of MCS-channel [x]" "0,1,2,3" newline bitfld.long 0x00 8.--9. "WPROT4,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 6.--7. "WPROT3,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 4.--5. "WPROT2,Register Write Protection of MCS-channel [x]" "0,1,2,3" newline bitfld.long 0x00 2.--3. "WPROT1,Register Write Protection of MCS-channel [x]" "0,1,2,3" bitfld.long 0x00 0.--1. "WPROT0,Register Write Protection of MCS-channel [x]" "0,1,2,3" line.long 0x04 "MCS3_SINT_IRQ_NOTIFY,MCS[i] shared interrupt notification register" bitfld.long 0x04 7. "S_IRQ7,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 6. "S_IRQ6,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 5. "S_IRQ5,Shared interrupt [k] notify flag" "0,1" newline bitfld.long 0x04 4. "S_IRQ4,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 3. "S_IRQ3,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 2. "S_IRQ2,Shared interrupt [k] notify flag" "0,1" newline bitfld.long 0x04 1. "S_IRQ1,Shared interrupt [k] notify flag" "0,1" bitfld.long 0x04 0. "S_IRQ0,Shared interrupt [k] notify flag" "0,1" line.long 0x08 "MCS3_SINT_IRQ_EN,MCS[i] shared interrupt enable register" bitfld.long 0x08 7. "S_IRQ7_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 6. "S_IRQ6_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 5. "S_IRQ5_EN,Shared interrupt [k]" "0,1" newline bitfld.long 0x08 4. "S_IRQ4_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 3. "S_IRQ3_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 2. "S_IRQ2_EN,Shared interrupt [k]" "0,1" newline bitfld.long 0x08 1. "S_IRQ1_EN,Shared interrupt [k]" "0,1" bitfld.long 0x08 0. "S_IRQ0_EN,Shared interrupt [k]" "0,1" line.long 0x0C "MCS3_SINT_IRQ_FORCINT,MCS[i] force shared interrupt register" bitfld.long 0x0C 7. "TRG_S_IRQ7,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 6. "TRG_S_IRQ6,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 5. "TRG_S_IRQ5,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" newline bitfld.long 0x0C 4. "TRG_S_IRQ4,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 3. "TRG_S_IRQ3,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 2. "TRG_S_IRQ2,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" newline bitfld.long 0x0C 1. "TRG_S_IRQ1,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" bitfld.long 0x0C 0. "TRG_S_IRQ0,Trigger the bit MCS[i]_SINT_IRQ_NOTIFY.S_IRQ[k] by software" "0,1" line.long 0x10 "MCS3_SINT_IRQ_MODE,MCS[i] shared interrupt mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" group.long ad:0x94862F40++0x1B line.long 0x00 "MCS3_HBP0_CTRL,MCS[i] hardware break point h control register" bitfld.long 0x00 17. "NOT,Logical negation of h-th hardware break point" "0,1" bitfld.long 0x00 16. "AND,Logical AND conjunction of h-th hardware break point" "0,1" bitfld.long 0x00 12.--14. "TYPE,Define type of h-th hardware break point" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 8.--9. "SCOPE,Define scope of h-th hardware break point" "0,1,2,3" bitfld.long 0x00 7. "EN_CH7,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 6. "EN_CH6,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 5. "EN_CH5,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 4. "EN_CH4,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 3. "EN_CH3,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 2. "EN_CH2,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 1. "EN_CH1,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 0. "EN_CH0,Enable h-th hardware break point for channel x" "0,1" line.long 0x04 "MCS3_HBP0_PATTERN,MCS[i] hardware break point pattern register" line.long 0x08 "MCS3_HBP0_STATUS,MCS[i] hardware break point status register" bitfld.long 0x08 7. "HALT_CH7,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 6. "HALT_CH6,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 5. "HALT_CH5,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 4. "HALT_CH4,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 3. "HALT_CH3,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 2. "HALT_CH2,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 1. "HALT_CH1,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 0. "HALT_CH0,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" line.long 0x0C "MCS3_HBP0_IRQ_NOTIFY,MCS[i] hardware break point interrupt notification register" bitfld.long 0x0C 0. "HBP_IRQ,Interrupt notify flag of the h-th hardware break point" "0,1" line.long 0x10 "MCS3_HBP0_IRQ_EN,MCS[i] hardware break point interrupt enable register" bitfld.long 0x10 0. "HBP_IRQ_EN,Interrupt Enable bit of the h-th hardware break point" "0,1" line.long 0x14 "MCS3_HBP0_IRQ_FORCINT,MCS[i] force hardware break point interrupt register" bitfld.long 0x14 0. "TRG_HBP_IRQ,Trigger the bit MCS[i]_HBP[h]_IRQ_NOTIFY.HBP_IRQ by software" "0,1" line.long 0x18 "MCS3_HBP0_IRQ_MODE,MCS[i] break point h interrupt mode configuration register" bitfld.long 0x18 0.--1. "IRQ_MODE,IRQ mode selection for all break point interrupts" "0,1,2,3" group.long ad:0x94862F60++0x1B line.long 0x00 "MCS3_HBP1_CTRL,MCS[i] hardware break point h control register" bitfld.long 0x00 17. "NOT,Logical negation of h-th hardware break point" "0,1" bitfld.long 0x00 16. "AND,Logical AND conjunction of h-th hardware break point" "0,1" bitfld.long 0x00 12.--14. "TYPE,Define type of h-th hardware break point" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 8.--9. "SCOPE,Define scope of h-th hardware break point" "0,1,2,3" bitfld.long 0x00 7. "EN_CH7,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 6. "EN_CH6,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 5. "EN_CH5,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 4. "EN_CH4,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 3. "EN_CH3,Enable h-th hardware break point for channel x" "0,1" newline bitfld.long 0x00 2. "EN_CH2,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 1. "EN_CH1,Enable h-th hardware break point for channel x" "0,1" bitfld.long 0x00 0. "EN_CH0,Enable h-th hardware break point for channel x" "0,1" line.long 0x04 "MCS3_HBP1_PATTERN,MCS[i] hardware break point pattern register" line.long 0x08 "MCS3_HBP1_STATUS,MCS[i] hardware break point status register" bitfld.long 0x08 7. "HALT_CH7,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 6. "HALT_CH6,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 5. "HALT_CH5,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 4. "HALT_CH4,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 3. "HALT_CH3,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 2. "HALT_CH2,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" newline bitfld.long 0x08 1. "HALT_CH1,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" bitfld.long 0x08 0. "HALT_CH0,Indicate that MCS channel x has fired the h-th hardware break point and either MCS channel x or the entire GTM was halted due to that break point depending on the state of bit field MCS[i]_HBP[h]_CTRL.SCOPE" "0,1" line.long 0x0C "MCS3_HBP1_IRQ_NOTIFY,MCS[i] hardware break point interrupt notification register" bitfld.long 0x0C 0. "HBP_IRQ,Interrupt notify flag of the h-th hardware break point" "0,1" line.long 0x10 "MCS3_HBP1_IRQ_EN,MCS[i] hardware break point interrupt enable register" bitfld.long 0x10 0. "HBP_IRQ_EN,Interrupt Enable bit of the h-th hardware break point" "0,1" line.long 0x14 "MCS3_HBP1_IRQ_FORCINT,MCS[i] force hardware break point interrupt register" bitfld.long 0x14 0. "TRG_HBP_IRQ,Trigger the bit MCS[i]_HBP[h]_IRQ_NOTIFY.HBP_IRQ by software" "0,1" line.long 0x18 "MCS3_HBP1_IRQ_MODE,MCS[i] break point h interrupt mode configuration register" bitfld.long 0x18 0.--1. "IRQ_MODE,IRQ mode selection for all break point interrupts" "0,1,2,3" group.long ad:0x94863000++0x17 line.long 0x00 "TIO3_G0_CH0_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO3_G0_CH0_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO3_G0_CH0_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO3_G0_CH0_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO3_G0_CH0_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO3_G0_CH0_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94863020++0x0B line.long 0x00 "TIO3_G0_CH0_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH0_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH0_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94863030++0x0B line.long 0x00 "TIO3_G0_CH0_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH0_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH0_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9486303C++0x03 line.long 0x00 "TIO3_G0_CH0_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94863040++0x17 line.long 0x00 "TIO3_G0_CH1_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO3_G0_CH1_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO3_G0_CH1_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO3_G0_CH1_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO3_G0_CH1_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO3_G0_CH1_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94863060++0x0B line.long 0x00 "TIO3_G0_CH1_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH1_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH1_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94863070++0x0B line.long 0x00 "TIO3_G0_CH1_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH1_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH1_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9486307C++0x03 line.long 0x00 "TIO3_G0_CH1_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94863080++0x17 line.long 0x00 "TIO3_G0_CH2_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO3_G0_CH2_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO3_G0_CH2_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO3_G0_CH2_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO3_G0_CH2_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO3_G0_CH2_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948630A0++0x0B line.long 0x00 "TIO3_G0_CH2_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH2_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH2_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948630B0++0x0B line.long 0x00 "TIO3_G0_CH2_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH2_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH2_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948630BC++0x03 line.long 0x00 "TIO3_G0_CH2_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x948630C0++0x17 line.long 0x00 "TIO3_G0_CH3_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO3_G0_CH3_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO3_G0_CH3_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO3_G0_CH3_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO3_G0_CH3_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO3_G0_CH3_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948630E0++0x0B line.long 0x00 "TIO3_G0_CH3_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH3_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH3_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948630F0++0x0B line.long 0x00 "TIO3_G0_CH3_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH3_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH3_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948630FC++0x03 line.long 0x00 "TIO3_G0_CH3_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94863100++0x17 line.long 0x00 "TIO3_G0_CH4_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO3_G0_CH4_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO3_G0_CH4_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO3_G0_CH4_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO3_G0_CH4_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO3_G0_CH4_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94863120++0x0B line.long 0x00 "TIO3_G0_CH4_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH4_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH4_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94863130++0x0B line.long 0x00 "TIO3_G0_CH4_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH4_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH4_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9486313C++0x03 line.long 0x00 "TIO3_G0_CH4_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94863140++0x17 line.long 0x00 "TIO3_G0_CH5_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO3_G0_CH5_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO3_G0_CH5_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO3_G0_CH5_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO3_G0_CH5_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO3_G0_CH5_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x94863160++0x0B line.long 0x00 "TIO3_G0_CH5_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH5_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH5_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x94863170++0x0B line.long 0x00 "TIO3_G0_CH5_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH5_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH5_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x9486317C++0x03 line.long 0x00 "TIO3_G0_CH5_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94863180++0x17 line.long 0x00 "TIO3_G0_CH6_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO3_G0_CH6_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO3_G0_CH6_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO3_G0_CH6_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO3_G0_CH6_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO3_G0_CH6_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948631A0++0x0B line.long 0x00 "TIO3_G0_CH6_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH6_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH6_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948631B0++0x0B line.long 0x00 "TIO3_G0_CH6_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH6_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH6_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948631BC++0x03 line.long 0x00 "TIO3_G0_CH6_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x948631C0++0x17 line.long 0x00 "TIO3_G0_CH7_CTRL,TIO[i] group [g] channel [c] control register" bitfld.long 0x00 31. "PL_TRIG_OUT_UPD_EN,Select TIO[i] basic update source of channel [c]" "0,1" bitfld.long 0x00 30. "PL_TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: PL_TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 29. "PL_TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] PL_TRIG_OUT source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 28. "PL_TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] PL_TRIG_OUT source: TRIG_OUT[c]-1 enable" "0,1" bitfld.long 0x00 27. "PL_TRIG_OUT_EN_O_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 26. "PL_TRIG_OUT_EN_O_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 25. "PL_TRIG_OUT_EN_S_FE,TIO[i] channel [c] PL_TRIG_OUT source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 24. "PL_TRIG_OUT_EN_S_RE,TIO[i] channel [c] PL_TRIG_OUT source: Rising edge S[c] enable" "0,1" bitfld.long 0x00 23. "PL_S_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of S resource channel [c]" "0,1" newline bitfld.long 0x00 22. "PL_O_TRIG_OUT_EN,Enable usage of TRIG_OUT[c] in instruction of O resource channel [c]" "0,1" bitfld.long 0x00 21. "PL_SEL_IN,Select input source for O resource channel [c]" "0,1" bitfld.long 0x00 20. "PL_ODIS,Disable change of TIO[i]_O.CH[x] bit x = [g] * 8 + [c]" "0,1" newline bitfld.long 0x00 19. "PL_FREEZE_O_EN,Enable O buffer freeze in channel [c]" "0,1" bitfld.long 0x00 16.--18. "PL_O_MODE,Select mode of operation for O resource channel [c]" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15. "PL_CYCLIC_BUFF,Enable circular buffer functionality in channel [c]" "0,1" newline bitfld.long 0x00 14. "PL_FREEZE_S_EN,Enable S buffer freeze in channel [c]" "0,1" bitfld.long 0x00 12.--13. "PL_S_MODE,Select mode of operation for S resource channel [c]" "0,1,2,3" bitfld.long 0x00 8.--11. "UPDATE_SRC,Select update source of channel [c]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 7. "PL_CYCLIC_INIT_TRIG_EN,Enable usage of TRIG_OUT[c] as init trigger of cyclic buffer functionality in channel [c]" "0,1" bitfld.long 0x00 6. "TRIG_OUT_EN_PREV_PL_TRIG,TIO[i] channel [c] Trigger Output source: PL_TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 5. "TRIG_OUT_EN_PL_EVT,TIO[i] channel [c] Trigger Output source: PL_EVT[c] enable" "0,1" newline bitfld.long 0x00 4. "TRIG_OUT_EN_PREV_TRIG,TIO[i] channel [c] Trigger Output source: TRIG_OUT[c]-1enable" "0,1" bitfld.long 0x00 3. "TRIG_OUT_EN_O_FE,TIO[i] channel [c] Trigger Output source: Falling edge O[c] enable" "0,1" bitfld.long 0x00 2. "TRIG_OUT_EN_O_RE,TIO[i] channel [c] Trigger Output source: Rising edge O[c] enable" "0,1" newline bitfld.long 0x00 1. "TRIG_OUT_EN_S_FE,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x00 0. "TRIG_OUT_EN_S_RE,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" line.long 0x04 "TIO3_G0_CH7_IRQ_NOTIFY,TIO[i] channel [c] interrupt notification register" bitfld.long 0x04 5. "PL_EVT_IRQ,Interrupt request PL_EVT of channel [c]" "0,1" bitfld.long 0x04 4. "UPDATE_IRQ,Interrupt request for update of channel [c]" "0,1" bitfld.long 0x04 3. "O_FE_IRQ,Interrupt request Falling edge O[c]" "0,1" newline bitfld.long 0x04 2. "O_RE_IRQ,Interrupt request Rising edge O[c]" "0,1" bitfld.long 0x04 1. "S_FE_IRQ,Interrupt request Falling edge S[c]" "0,1" bitfld.long 0x04 0. "S_RE_IRQ,Interrupt request Rising edge S[c]" "0,1" line.long 0x08 "TIO3_G0_CH7_IRQ_EN,TIO[i] channel [c] interrupt enable register" bitfld.long 0x08 5. "PL_EVT_IRQ_EN,Interrupt enable request PL_EVT of channel [c]" "0,1" bitfld.long 0x08 4. "UPDATE_IRQ_EN,Interrupt enable request for update of channel [c]" "0,1" bitfld.long 0x08 3. "O_FE_IRQ_EN,Interrupt enable request Falling edge O[c]" "0,1" newline bitfld.long 0x08 2. "O_RE_IRQ_EN,Interrupt enable request Rising edge O[c]" "0,1" bitfld.long 0x08 1. "S_FE_IRQ_EN,Interrupt enable request Falling edge S[c]" "0,1" bitfld.long 0x08 0. "S_RE_IRQ_EN,Interrupt enable request Rising edge S[c]" "0,1" line.long 0x0C "TIO3_G0_CH7_IRQ_FORCINT,TIO[i] channel [c] force interrupt register" bitfld.long 0x0C 5. "TRG_PL_EVT_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.PL_EVT_IRQ by software" "0,1" bitfld.long 0x0C 4. "TRG_UPDATE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.UPDATE_IRQ by software" "0,1" bitfld.long 0x0C 3. "TRG_O_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_FE_IRQ by software" "0,1" newline bitfld.long 0x0C 2. "TRG_O_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.O_RE_IRQ by software" "0,1" bitfld.long 0x0C 1. "TRG_S_FE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_FE_IRQ by software" "0,1" bitfld.long 0x0C 0. "TRG_S_RE_IRQ,Trigger the bit TIO[i]_G[g]_CH[c]_IRQ_NOTIFY.S_RE_IRQ by software" "0,1" line.long 0x10 "TIO3_G0_CH7_IRQ_MODE,TIO[i] channel [c] IRQ mode configuration register" bitfld.long 0x10 0.--1. "IRQ_MODE,IRQ mode selection" "0,1,2,3" line.long 0x14 "TIO3_G0_CH7_CTRL2,TIO[i] group [g] channel [c] control register" bitfld.long 0x14 1. "DUAL_CMP_MST_EN,TIO[i] channel [c] Trigger Output source: Falling edge S[c] enable" "0,1" bitfld.long 0x14 0. "DUAL_CMP_EN,TIO[i] channel [c] Trigger Output source: Rising edge S[c] enable" "0,1" group.long ad:0x948631E0++0x0B line.long 0x00 "TIO3_G0_CH7_SINST,TIO[i] channel [c] resource S instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH7_SCMD,TIO[i] channel [c] resource S command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH7_SOP,TIO[i] channel [c] resource S operand register TIO[i]_G[g]_CH[c]_CTRL.PL_S_MODE=0b0- or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b10- or TIO[i]_G[g]_OP_USAGE.MODE[c]=0b1-0 )" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" group.long ad:0x948631F0++0x0B line.long 0x00 "TIO3_G0_CH7_OINST,TIO[i] channel [c] resource O instruction register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE =0b00-" bitfld.long 0x00 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x00 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x00 24.--29. 1. "CMD,Command" newline hexmask.long.tbyte 0x00 0.--23. 1. "OP,Operand" line.long 0x04 "TIO3_G0_CH7_OCMD,TIO[i] channel [c] resource O command register (buffer operation) TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b00-" bitfld.long 0x04 31. "INSTR_PULL_EN,Enable instruction fetch" "0,1" bitfld.long 0x04 30. "DATA_PUSH_EN,Enable data capture" "0,1" hexmask.long.byte 0x04 24.--29. 1. "CMD,Command" line.long 0x08 "TIO3_G0_CH7_OOP,TIO[i] channel [c] resource O operand register !(TIO[i]_G[g]_CH[c]_CTRL.PL_O_MODE=0b1--) or (TIO[i]_G[g]_OP_USAGE.MODE[c]=0b11-)" hexmask.long.tbyte 0x08 0.--23. 1. "OP,Operand" rgroup.long ad:0x948631FC++0x03 line.long 0x00 "TIO3_G0_CH7_SHIFTCNT,TIO[i] channel [c] resource shift count register" bitfld.long 0x00 0.--4. "CNT,Shift counter value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x94863200++0x07 line.long 0x00 "TIO3_G0_ISEL0_CTRL1,TIO[i] input selection register 1" bitfld.long 0x00 27. "WRITE_EN3,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 26. "WRITE_EN2,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 25. "WRITE_EN1,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" newline bitfld.long 0x00 24. "WRITE_EN0,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 19. "OUT_SEL3,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 18. "OUT_SEL2,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" newline bitfld.long 0x00 17. "OUT_SEL1,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 16. "OUT_SEL0,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 12.--15. "LUT2_3,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "LUT2_2,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "LUT2_1,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "LUT2_0,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "TIO3_G0_ISEL0_CTRL2,TIO[i] input selection register 2" bitfld.long 0x04 22. "LUT3IN_SEL2,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 21. "LUT3IN_SEL1,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 20. "LUT3IN_SEL0,select source for LUT3_IN[k] signal in quad = [q]" "0,1" newline bitfld.long 0x04 16.--17. "QOUT_SEL,select source for ISEL_QOUT[q] signal in quad = [q]" "0,1,2,3" hexmask.long.byte 0x04 0.--7. 1. "LUT3,3 bit Lookup table function for quad=[q] channels [q]*4+2" group.long ad:0x94863220++0x07 line.long 0x00 "TIO3_G0_ISEL1_CTRL1,TIO[i] input selection register 1" bitfld.long 0x00 27. "WRITE_EN3,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 26. "WRITE_EN2,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 25. "WRITE_EN1,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" newline bitfld.long 0x00 24. "WRITE_EN0,enable writing of configuration bit fields LUT2_[k] OUT_SEL[k]" "0,1" bitfld.long 0x00 19. "OUT_SEL3,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 18. "OUT_SEL2,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" newline bitfld.long 0x00 17. "OUT_SEL1,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 16. "OUT_SEL0,select signal for ISEL_OUT[c] where c =[q]*4+[k]" "0,1" bitfld.long 0x00 12.--15. "LUT2_3,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline bitfld.long 0x00 8.--11. "LUT2_2,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. "LUT2_1,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. "LUT2_0,2 bit Lookup table function for channel c=[q]*4+[k]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "TIO3_G0_ISEL1_CTRL2,TIO[i] input selection register 2" bitfld.long 0x04 22. "LUT3IN_SEL2,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 21. "LUT3IN_SEL1,select source for LUT3_IN[k] signal in quad = [q]" "0,1" bitfld.long 0x04 20. "LUT3IN_SEL0,select source for LUT3_IN[k] signal in quad = [q]" "0,1" newline bitfld.long 0x04 16.--17. "QOUT_SEL,select source for ISEL_QOUT[q] signal in quad = [q]" "0,1,2,3" hexmask.long.byte 0x04 0.--7. 1. "LUT3,3 bit Lookup table function for quad=[q] channels [q]*4+2" group.long ad:0x94863240++0x03 line.long 0x00 "TIO3_G0_OP_USAGE,TIO[i] operand usage selection register" bitfld.long 0x00 31. "WRITE_EN7,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 30. "WRITE_EN6,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 29. "WRITE_EN5,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" newline bitfld.long 0x00 28. "WRITE_EN4,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 27. "WRITE_EN3,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 26. "WRITE_EN2,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" newline bitfld.long 0x00 25. "WRITE_EN1,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 24. "WRITE_EN0,enable writing of configuration bit fields TIO[i]_G[g]_OP_USAGE.MODE[c]" "0,1" bitfld.long 0x00 21.--23. "MODE7,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 18.--20. "MODE6,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 15.--17. "MODE5,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. "MODE4,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 9.--11. "MODE3,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 6.--8. "MODE2,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" bitfld.long 0x00 3.--5. "MODE1,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 0.--2. "MODE0,operand usage of S/ O resource" "0,1,2,3,4,5,6,7" group.long ad:0x94863C00++0x1F line.long 0x00 "TIO3_S,TIO[i] signal sampling register" bitfld.long 0x00 7. "CH7,Value of channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Value of channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Value of channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Value of channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Value of channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Value of channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Value of channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Value of channel [x]" "0,1" line.long 0x04 "TIO3_O,TIO[i] output register" bitfld.long 0x04 7. "CH7,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Value driven on output of channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Value driven on output of channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Value driven on output of channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Value driven on output of channel [x]" "0,1" line.long 0x08 "TIO3_ENDIS,TIO[i] enable/disable register" bitfld.long 0x08 7. "CH7,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Enable/Disable request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Enable/Disable request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Enable/Disable request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Enable/Disable request of channel [x]" "0,1" line.long 0x0C "TIO3_INVERT,TIO[i] signal invert register" bitfld.long 0x0C 7. "CH7,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Enable/Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Enable/Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Enable/Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Enable/Disable signal inversion of channel [x]" "0,1" line.long 0x10 "TIO3_INPUT_MODE,TIO[i] input mode register" bitfld.long 0x10 7. "CH7,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Enable/Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Enable/Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Enable/Disable input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Enable/Disable input mode of channel [x]" "0,1" line.long 0x14 "TIO3_CYCLIC_MODE,TIO[i] cyclic mode register" bitfld.long 0x14 7. "CH7,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Enable/Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Enable/Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Enable/Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Enable/Disable cyclic mode of channel [x]" "0,1" line.long 0x18 "TIO3_TRIG_OUT_GATE_EN,TIO[i] enable Trigger Output output gating register" bitfld.long 0x18 7. "CH7,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 6. "CH6,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 5. "CH5,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 4. "CH4,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 3. "CH3,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 2. "CH2,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 1. "CH1,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 0. "CH0,enable gating of Trigger Output events of channel [x]" "0,1" line.long 0x1C "TIO3_PLTRIG_OUT_GATE_EN,TIO[i] enable PL_TRIG_OUT output gating register" bitfld.long 0x1C 7. "CH7,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 6. "CH6,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 5. "CH5,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 4. "CH4,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 3. "CH3,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 2. "CH2,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 1. "CH1,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 0. "CH0,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" group.long ad:0x94863C40++0x1F line.long 0x00 "TIO3_CS,TIO[i] clear signal sampling register" bitfld.long 0x00 7. "CH7,Clear channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Clear channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Clear channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Clear channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Clear channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Clear channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Clear channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Clear channel [x]" "0,1" line.long 0x04 "TIO3_CO,TIO[i] clear output register" bitfld.long 0x04 7. "CH7,Clear channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Clear channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Clear channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Clear channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Clear channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Clear channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Clear channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Clear channel [x]" "0,1" line.long 0x08 "TIO3_CENDIS,TIO[i] disable register" bitfld.long 0x08 7. "CH7,Disable request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Disable request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Disable request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Disable request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Disable request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Disable request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Disable request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Disable request of channel [x]" "0,1" line.long 0x0C "TIO3_CINVERT,TIO[i] clear signal invert register" bitfld.long 0x0C 7. "CH7,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Disable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Disable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Disable signal inversion of channel [x]" "0,1" line.long 0x10 "TIO3_CINPUT_MODE,TIO[i] disable input mode register" bitfld.long 0x10 7. "CH7,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Disable input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Disable input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Disable input mode of channel [x]" "0,1" line.long 0x14 "TIO3_CCYCLIC_MODE,TIO[i] disable cyclic mode register" bitfld.long 0x14 7. "CH7,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Disable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Disable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Disable cyclic mode of channel [x]" "0,1" line.long 0x18 "TIO3_CTRIG_OUT_GATE_EN,TIO[i] clear Trigger Output output gating register" bitfld.long 0x18 7. "CH7,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 6. "CH6,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 5. "CH5,disable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 4. "CH4,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 3. "CH3,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 2. "CH2,disable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 1. "CH1,disable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 0. "CH0,disable gating of Trigger Output events of channel [x]" "0,1" line.long 0x1C "TIO3_CPLTRIG_OUT_GATE_EN,TIO[i] clear PL_TRIG_OUT output gating register" bitfld.long 0x1C 7. "CH7,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 6. "CH6,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 5. "CH5,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 4. "CH4,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 3. "CH3,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 2. "CH2,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 1. "CH1,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 0. "CH0,disable gating of PL_TRIG_OUT events of channel [x]" "0,1" group.long ad:0x94863C80++0x1F line.long 0x00 "TIO3_SS,TIO[i] set signal sampling register" bitfld.long 0x00 7. "CH7,Set channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Set channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Set channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Set channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Set channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Set channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Set channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Set channel [x]" "0,1" line.long 0x04 "TIO3_SO,TIO[i] set output register" bitfld.long 0x04 7. "CH7,Set channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Set channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Set channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Set channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Set channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Set channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Set channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Set channel [x]" "0,1" line.long 0x08 "TIO3_SENDIS,TIO[i] enable register" bitfld.long 0x08 7. "CH7,Enable request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Enable request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Enable request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Enable request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Enable request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Enable request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Enable request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Enable request of channel [x]" "0,1" line.long 0x0C "TIO3_SINVERT,TIO[i] set signal invert register" bitfld.long 0x0C 7. "CH7,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Enable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Enable signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Enable signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Enable signal inversion of channel [x]" "0,1" line.long 0x10 "TIO3_SINPUT_MODE,TIO[i] enable input mode register" bitfld.long 0x10 7. "CH7,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Enable input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Enable input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Enable input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Enable input mode of channel [x]" "0,1" line.long 0x14 "TIO3_SCYCLIC_MODE,TIO[i] enable cyclic mode register" bitfld.long 0x14 7. "CH7,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Enable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Enable cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Enable cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Enable cyclic mode of channel [x]" "0,1" line.long 0x18 "TIO3_STRIG_OUT_GATE_EN,TIO[i] set Trigger Output output gating register" bitfld.long 0x18 7. "CH7,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 6. "CH6,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 5. "CH5,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 4. "CH4,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 3. "CH3,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 2. "CH2,enable gating of Trigger Output events of channel [x]" "0,1" newline bitfld.long 0x18 1. "CH1,enable gating of Trigger Output events of channel [x]" "0,1" bitfld.long 0x18 0. "CH0,enable gating of Trigger Output events of channel [x]" "0,1" line.long 0x1C "TIO3_SPLTRIG_OUT_GATE_EN,TIO[i] set PL_TRIG_OUT output gating register" bitfld.long 0x1C 7. "CH7,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 6. "CH6,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 5. "CH5,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 4. "CH4,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 3. "CH3,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 2. "CH2,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" newline bitfld.long 0x1C 1. "CH1,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" bitfld.long 0x1C 0. "CH0,enable gating of PL_TRIG_OUT events of channel [x]" "0,1" group.long ad:0x94863CC0++0x17 line.long 0x00 "TIO3_IS,TIO[i] invert signal sampling register" bitfld.long 0x00 7. "CH7,Invert channel [x]" "0,1" bitfld.long 0x00 6. "CH6,Invert channel [x]" "0,1" bitfld.long 0x00 5. "CH5,Invert channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,Invert channel [x]" "0,1" bitfld.long 0x00 3. "CH3,Invert channel [x]" "0,1" bitfld.long 0x00 2. "CH2,Invert channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,Invert channel [x]" "0,1" bitfld.long 0x00 0. "CH0,Invert channel [x]" "0,1" line.long 0x04 "TIO3_IO,TIO[i] invert output register" bitfld.long 0x04 7. "CH7,Invert channel [x]" "0,1" bitfld.long 0x04 6. "CH6,Invert channel [x]" "0,1" bitfld.long 0x04 5. "CH5,Invert channel [x]" "0,1" newline bitfld.long 0x04 4. "CH4,Invert channel [x]" "0,1" bitfld.long 0x04 3. "CH3,Invert channel [x]" "0,1" bitfld.long 0x04 2. "CH2,Invert channel [x]" "0,1" newline bitfld.long 0x04 1. "CH1,Invert channel [x]" "0,1" bitfld.long 0x04 0. "CH0,Invert channel [x]" "0,1" line.long 0x08 "TIO3_IENDIS,TIO[i] toggle enable/disable register" bitfld.long 0x08 7. "CH7,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,Toggle state request of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,Toggle state request of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,Toggle state request of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,Toggle state request of channel [x]" "0,1" line.long 0x0C "TIO3_IINVERT,TIO[i] toggle signal invert register" bitfld.long 0x0C 7. "CH7,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 6. "CH6,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 5. "CH5,Invert signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 4. "CH4,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 3. "CH3,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 2. "CH2,Invert signal inversion of channel [x]" "0,1" newline bitfld.long 0x0C 1. "CH1,Invert signal inversion of channel [x]" "0,1" bitfld.long 0x0C 0. "CH0,Invert signal inversion of channel [x]" "0,1" line.long 0x10 "TIO3_IINPUT_MODE,TIO[i] enable input mode register" bitfld.long 0x10 7. "CH7,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 6. "CH6,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 5. "CH5,Toggle input mode of channel [x]" "0,1" newline bitfld.long 0x10 4. "CH4,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 3. "CH3,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 2. "CH2,Toggle input mode of channel [x]" "0,1" newline bitfld.long 0x10 1. "CH1,Toggle input mode of channel [x]" "0,1" bitfld.long 0x10 0. "CH0,Toggle input mode of channel [x]" "0,1" line.long 0x14 "TIO3_ICYCLIC_MODE,TIO[i] enable cyclic mode register" bitfld.long 0x14 7. "CH7,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 6. "CH6,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 5. "CH5,Toggle cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 4. "CH4,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 3. "CH3,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 2. "CH2,Toggle cyclic mode of channel [x]" "0,1" newline bitfld.long 0x14 1. "CH1,Toggle cyclic mode of channel [x]" "0,1" bitfld.long 0x14 0. "CH0,Toggle cyclic mode of channel [x]" "0,1" group.long ad:0x94863D00++0x03 line.long 0x00 "TIO3_FUPD,TIO[i] force update register" bitfld.long 0x00 7. "CH7,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 6. "CH6,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 5. "CH5,issue immediately a signal pulse on the update signal of channel [x]" "0,1" newline bitfld.long 0x00 4. "CH4,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 3. "CH3,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 2. "CH2,issue immediately a signal pulse on the update signal of channel [x]" "0,1" newline bitfld.long 0x00 1. "CH1,issue immediately a signal pulse on the update signal of channel [x]" "0,1" bitfld.long 0x00 0. "CH0,issue immediately a signal pulse on the update signal of channel [x]" "0,1" rgroup.long ad:0x94863D04++0x03 line.long 0x00 "TIO3_HW_CONF,TIO[i] configuration register" bitfld.long 0x00 4. "TIO_PLUS,signals availability of TIOplus functionality" "0,1" bitfld.long 0x00 0.--1. "NTIO_CH8,signals availability of amount of channels" "0,1,2,3" group.long ad:0x94863D08++0x0B line.long 0x00 "TIO3_RSEL_CTRL1,TIO[i] resource selection control register 1" bitfld.long 0x00 28. "SEL_CLKEN7_0,select source of RS_CLKEN[g][7:7] for channels [g]*8" "0,1" bitfld.long 0x00 24. "SEL_CLKEN6_0,select source of RS_CLKEN[g][6:6] for channels [g]*8" "0,1" line.long 0x04 "TIO3_RSEL_CTRL2,TIO[i] resource selection control register 2" bitfld.long 0x04 8. "SEL_TB2_0,select source of RS_TB2[g] for channels [g]*8" "0,1" bitfld.long 0x04 4. "SEL_TB1_0,select source of RS_TB1[g] for channels [g]*8" "0,1" line.long 0x08 "TIO3_PL_SWRST,TIO[i] software reset for TIO Plus functionality" bitfld.long 0x08 7. "CH7,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 6. "CH6,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 5. "CH5,reset TIO_Plus resources of channel [x]" "0,1" newline bitfld.long 0x08 4. "CH4,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 3. "CH3,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 2. "CH2,reset TIO_Plus resources of channel [x]" "0,1" newline bitfld.long 0x08 1. "CH1,reset TIO_Plus resources of channel [x]" "0,1" bitfld.long 0x08 0. "CH0,reset TIO_Plus resources of channel [x]" "0,1" group.long ad:0x94864000++0x4F line.long 0x00 "CCM3_ARP0_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x00 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x00 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x00 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x00 0.--15. 1. "ADDR,ARP base address" line.long 0x04 "CCM3_ARP0_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x04 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x04 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x04 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x04 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x08 "CCM3_ARP1_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x08 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x08 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x08 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x08 0.--15. 1. "ADDR,ARP base address" line.long 0x0C "CCM3_ARP1_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x0C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x0C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x0C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x0C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x10 "CCM3_ARP2_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x10 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x10 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x10 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x10 0.--15. 1. "ADDR,ARP base address" line.long 0x14 "CCM3_ARP2_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x14 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x14 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x14 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x14 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x18 "CCM3_ARP3_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x18 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x18 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x18 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x18 0.--15. 1. "ADDR,ARP base address" line.long 0x1C "CCM3_ARP3_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x1C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x1C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x1C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x1C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x20 "CCM3_ARP4_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x20 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x20 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x20 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x20 0.--15. 1. "ADDR,ARP base address" line.long 0x24 "CCM3_ARP4_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x24 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x24 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x24 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x24 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x28 "CCM3_ARP5_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x28 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x28 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x28 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x28 0.--15. 1. "ADDR,ARP base address" line.long 0x2C "CCM3_ARP5_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x2C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x2C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x2C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x2C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x30 "CCM3_ARP6_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x30 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x30 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x30 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x30 0.--15. 1. "ADDR,ARP base address" line.long 0x34 "CCM3_ARP6_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x34 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x34 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x34 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x34 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x38 "CCM3_ARP7_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x38 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x38 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x38 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x38 0.--15. 1. "ADDR,ARP base address" line.long 0x3C "CCM3_ARP7_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x3C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x3C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x3C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x3C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x40 "CCM3_ARP8_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x40 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x40 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x40 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x40 0.--15. 1. "ADDR,ARP base address" line.long 0x44 "CCM3_ARP8_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x44 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x44 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x44 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x44 0. "WPROT0,Write Protection MCS channel [x]" "0,1" line.long 0x48 "CCM3_ARP9_CTRL,CCM[i] Address Range Protector [a] Control Register" bitfld.long 0x48 31. "WPROT_AEI,AEI slave write protection" "0,1" bitfld.long 0x48 24. "DIS_PROT,Disable ARP protection" "0,1" bitfld.long 0x48 16.--19. "SIZE,Size of ARP" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" newline hexmask.long.word 0x48 0.--15. 1. "ADDR,ARP base address" line.long 0x4C "CCM3_ARP9_PROT,CCM[i] Address Range Protector [a] Protection Register" bitfld.long 0x4C 7. "WPROT7,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 6. "WPROT6,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 5. "WPROT5,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x4C 4. "WPROT4,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 3. "WPROT3,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 2. "WPROT2,Write Protection MCS channel [x]" "0,1" newline bitfld.long 0x4C 1. "WPROT1,Write Protection MCS channel [x]" "0,1" bitfld.long 0x4C 0. "WPROT0,Write Protection MCS channel [x]" "0,1" rgroup.long ad:0x948641CC++0x03 line.long 0x00 "CCM3_TIO_G0_OUT,CCM[i] TIO Group 0 1 Output Register" bitfld.long 0x00 23. "TIO_G0_OUT_N7,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 22. "TIO_G0_OUT_N6,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 21. "TIO_G0_OUT_N5,Output level snapshot of channel [c]" "0,1" newline bitfld.long 0x00 20. "TIO_G0_OUT_N4,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 19. "TIO_G0_OUT_N3,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 18. "TIO_G0_OUT_N2,Output level snapshot of channel [c]" "0,1" newline bitfld.long 0x00 17. "TIO_G0_OUT_N1,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 16. "TIO_G0_OUT_N0,Output level snapshot of channel [c]" "0,1" bitfld.long 0x00 7. "TIO_G0_OUT7,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" newline bitfld.long 0x00 6. "TIO_G0_OUT6,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 5. "TIO_G0_OUT5,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 4. "TIO_G0_OUT4,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" newline bitfld.long 0x00 3. "TIO_G0_OUT3,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 2. "TIO_G0_OUT2,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" bitfld.long 0x00 1. "TIO_G0_OUT1,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" newline bitfld.long 0x00 0. "TIO_G0_OUT0,Output level snapshot of TIO[i]_G0_OUT channel [c]" "0,1" rgroup.long ad:0x948641D4++0x03 line.long 0x00 "CCM3_HW_CONF2,CCM[i] 2. Hardware Configuration Register" bitfld.long 0x00 18. "AXIM_DATA_SIZE,Defines the data bus width of the AXI master interface" "0,1" bitfld.long 0x00 16. "AXIS_DATA_SIZE,Defines the data bus width of the AXI slave interface" "0,1" bitfld.long 0x00 9. "TIO_OUT_RST,Reset level for all TIO output signals" "0,1" newline bitfld.long 0x00 7. "AXIM_POSTED_WRITE,Write transaction without response" "0,1" bitfld.long 0x00 6. "AXIM_SEC_ACC,Secure AXI master access constant" "0,1" bitfld.long 0x00 5. "AXIM_PRIV_ACC,Privileged AXI master access constant" "0,1" newline bitfld.long 0x00 0.--4. "AXIM_ID_WIDTH,Defines which LSB of AXIM_ID are send to the bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long ad:0x948641D8++0x03 line.long 0x00 "CCM3_AEIM_STA,CCM[i] MCS Bus Master Status Register" bitfld.long 0x00 24.--25. "AEIM_XPT_STA,AEIM exception status" "0,1,2,3" hexmask.long.word 0x00 0.--15. 1. "AEIM_XPT_ADDR,Exception address" rgroup.long ad:0x948641DC++0x03 line.long 0x00 "CCM3_HW_CONF,CCM[i] Hardware Configuration Register" bitfld.long 0x00 31. "AEI_RDATA_PIPELINE_STAGE,Read data pipeline stage implemented" "0,1" bitfld.long 0x00 30. "AEI_ADDR_PIPELINE_STAGE,Address pipeline stage implemented" "0,1" bitfld.long 0x00 29. "INT_CLK_EN_GEN,Internal clock enable generation" "0,1" newline bitfld.long 0x00 24.--28. "TOM_TRIG_INTCHAIN,TOM internal trigger chain length for pipeline register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 20.--23. "ATOM_TRIG_INTCHAIN,ATOM internal trigger chain length for pipeline register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 19. "IRQ_MODE_SINGLE_PULSE,Signalize availability of Single Pulse IRQ mode" "0,1" newline bitfld.long 0x00 18. "IRQ_MODE_PULSE_NOTIFY,Signalize availability of Pulse Notoify IRQ mode" "0,1" bitfld.long 0x00 17. "IRQ_MODE_PULSE,Signalize availability of Pulse IRQ mode" "0,1" bitfld.long 0x00 16. "IRQ_MODE_LEVEL,Signalize availability of Level IRQ mode" "0,1" newline bitfld.long 0x00 15. "RESET_ACTIVE,Active level of asynchronous reset" "0,1" bitfld.long 0x00 13. "ERM,Enable RAM1 MSB for available MCS modules" "0,1" bitfld.long 0x00 12. "RAM_INIT_RST,RAM initialization from reset" "0,1" newline bitfld.long 0x00 9.--11. "TOM_TRIG_CHAIN,TOM trigger chain length without synchronization register" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8. "TOM_OUT_RST,CCM_TOM_OUT reset level" "0,1" bitfld.long 0x00 5.--7. "ATOM_TRIG_CHAIN,ATOM trigger chain length without synchronization register" "0,1,2,3,4,5,6,7" newline bitfld.long 0x00 4. "ATOM_OUT_RST,CCM_ATOM_OUT reset level" "0,1" bitfld.long 0x00 3. "CFG_CLOCK_RATE,Clocks per ARU transfer" "0,1" bitfld.long 0x00 2. "SYNC_INPUT_REG,Additional pipelined stage in synchronous bridge mode" "0,1" newline bitfld.long 0x00 1. "BRIDGE_MODE_RST,Bridge mode after reset" "0,1" bitfld.long 0x00 0. "GRSTEN,Global Reset Enable" "0,1" rgroup.long ad:0x948641EC++0x03 line.long 0x00 "CCM3_ATOM_OUT,CCM[i] ATOM Output Register" bitfld.long 0x00 15. "ATOM_I_OUT_N7,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 14. "ATOM_I_OUT_N6,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 13. "ATOM_I_OUT_N5,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 12. "ATOM_I_OUT_N4,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 11. "ATOM_I_OUT_N3,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 10. "ATOM_I_OUT_N2,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" newline bitfld.long 0x00 9. "ATOM_I_OUT_N1,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 8. "ATOM_I_OUT_N0,Output level snapshot of CCM_ATOM_OUT_N channel [x]" "0,1" bitfld.long 0x00 7. "ATOM_I_OUT7,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 6. "ATOM_I_OUT6,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x00 5. "ATOM_I_OUT5,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x00 4. "ATOM_I_OUT4,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 3. "ATOM_I_OUT3,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x00 2. "ATOM_I_OUT2,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" bitfld.long 0x00 1. "ATOM_I_OUT1,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" newline bitfld.long 0x00 0. "ATOM_I_OUT0,Output level snapshot of CCM_ATOM_OUT channel [x]" "0,1" group.long ad:0x948641F0++0x03 line.long 0x00 "CCM3_CMU_CLK_CFG,CCM[i] CMU Clock Configuration Register" bitfld.long 0x00 28.--29. "CLK7_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 24.--25. "CLK6_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 20.--21. "CLK5_SRC,Clock [y] source signal selector" "0,1,2,3" newline bitfld.long 0x00 16.--17. "CLK4_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 12.--13. "CLK3_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 8.--9. "CLK2_SRC,Clock [y] source signal selector" "0,1,2,3" newline bitfld.long 0x00 4.--5. "CLK1_SRC,Clock [y] source signal selector" "0,1,2,3" bitfld.long 0x00 0.--1. "CLK0_SRC,Clock [y] source signal selector" "0,1,2,3" group.long ad:0x948641F8++0x07 line.long 0x00 "CCM3_CFG,CCM[i] Configuration Register" rbitfld.long 0x00 31. "TBU_DIR2,DIR1 input signal of module TBU timebase [z]" "0,1" rbitfld.long 0x00 30. "TBU_DIR1,DIR1 input signal of module TBU timebase [z]" "0,1" rbitfld.long 0x00 16.--17. "CLS_CLK_DIV,Cluster Clock Divider" "0,1,2,3" newline bitfld.long 0x00 8. "EN_TIO_DTM,Enable TIO and connected DTM" "0,1" bitfld.long 0x00 3. "EN_MCS,Enable MCS" "0,1" bitfld.long 0x00 2. "EN_ATOM_ADTM,Enable ATOM and ADTM" "0,1" line.long 0x04 "CCM3_PROT,CCM[i] Protection Register" bitfld.long 0x04 0. "CLS_PROT,Cluster Protection" "0,1" group.long ad:0x94864500++0xFF line.long 0x00 "CDTM3_DTM4_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x00 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x00 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x00 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x00 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x00 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x04 "CDTM3_DTM4_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x04 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x04 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x04 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x04 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x04 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x04 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x04 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x04 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x04 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x04 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x04 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x04 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x04 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x04 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x04 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x04 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x04 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x04 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x04 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x04 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x08 "CDTM3_DTM4_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x08 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x08 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x08 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x08 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x08 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x08 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x08 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x08 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x08 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x08 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x08 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x08 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x08 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x08 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x08 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x08 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x08 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x08 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x08 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x08 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x08 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x08 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x08 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x08 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x08 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x08 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x08 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x08 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x08 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x08 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x08 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x08 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x0C "CDTM3_DTM4_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x0C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x0C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x0C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x0C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x0C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x0C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x0C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x0C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x0C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x0C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x0C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x0C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x0C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x0C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x0C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x0C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x0C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x0C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x0C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x0C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x0C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x0C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x0C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x0C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x10 "CDTM3_DTM4_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x10 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x10 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x10 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x10 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x10 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x14 "CDTM3_DTM4_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x14 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x14 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x14 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x18 "CDTM3_DTM4_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x18 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x18 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x18 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x1C "CDTM3_DTM4_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x1C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x1C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x1C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x20 "CDTM3_DTM4_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x20 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x20 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x20 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x24 "CDTM3_DTM4_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x24 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x24 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x24 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x24 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x24 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x24 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x24 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x24 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x28 "CDTM3_DTM4_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x28 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x28 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x28 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x28 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x28 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x28 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x28 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x28 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x28 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x28 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x28 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x28 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x28 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x28 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x2C "CDTM3_DTM4_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x2C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x2C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x2C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x2C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x2C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x2C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x2C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x2C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x2C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x2C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x2C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x2C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x2C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x2C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x2C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x2C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x2C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x2C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x30 "CDTM3_DTM4_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x30 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x30 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x30 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x30 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x30 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x30 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x34 "CDTM3_DTM4_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x34 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x34 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x34 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x34 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x34 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x34 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x38 "CDTM3_DTM4_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x38 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x38 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x38 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x38 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x38 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x38 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x3C "CDTM3_DTM4_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x3C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x3C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x3C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x3C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x3C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x3C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x40 "CDTM3_DTM5_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x40 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x40 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x40 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x40 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x40 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x40 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x44 "CDTM3_DTM5_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x44 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x44 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x44 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x44 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x44 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x44 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x44 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x44 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x44 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x44 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x44 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x44 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x44 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x44 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x44 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x44 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x44 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x44 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x44 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x44 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0x44 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x48 "CDTM3_DTM5_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x48 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x48 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x48 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x48 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x48 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x48 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x48 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x48 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x48 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x48 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x48 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x48 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x48 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x48 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x48 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x48 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x48 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x48 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x48 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x48 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x48 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x48 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x48 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x48 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x48 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x48 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x48 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x48 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x48 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x48 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x48 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x48 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x4C "CDTM3_DTM5_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x4C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x4C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x4C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x4C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x4C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x4C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x4C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x4C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x4C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x4C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x4C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x4C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x4C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x4C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x4C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x4C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x4C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x4C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x4C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x4C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x4C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x4C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x4C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x4C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x50 "CDTM3_DTM5_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x50 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x50 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x50 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x50 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x50 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x54 "CDTM3_DTM5_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x54 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x54 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x54 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x58 "CDTM3_DTM5_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x58 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x58 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x58 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x5C "CDTM3_DTM5_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x5C 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x5C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x5C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x60 "CDTM3_DTM5_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" bitfld.long 0x60 31. "HRES,high resolution PWM support" "0,1" hexmask.long.word 0x60 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x60 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x64 "CDTM3_DTM5_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0x64 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0x64 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0x64 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0x64 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0x64 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0x64 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0x64 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0x64 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0x68 "CDTM3_DTM5_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0x68 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0x68 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0x68 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0x68 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0x68 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0x68 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0x68 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0x68 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0x68 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0x68 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0x68 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0x68 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0x68 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0x68 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0x6C "CDTM3_DTM5_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0x6C 31. "WR_EN_3,Channel" "0,1" bitfld.long 0x6C 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0x6C 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0x6C 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0x6C 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0x6C 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0x6C 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0x6C 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0x6C 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0x6C 15. "WR_EN_1,Channel" "0,1" bitfld.long 0x6C 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0x6C 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0x6C 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0x6C 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0x6C 7. "WR_EN_0,Channel" "0,1" bitfld.long 0x6C 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0x6C 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0x6C 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0x6C 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0x70 "CDTM3_DTM5_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x70 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x70 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x70 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x70 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x70 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x70 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x74 "CDTM3_DTM5_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x74 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x74 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x74 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x74 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x74 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x74 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x78 "CDTM3_DTM5_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x78 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x78 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x78 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x78 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x78 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x78 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x7C "CDTM3_DTM5_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0x7C 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0x7C 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0x7C 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0x7C 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0x7C 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0x7C 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0x80 "CDTM3_DTM6_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0x80 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0x80 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0x80 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0x80 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0x80 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0x80 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0x84 "CDTM3_DTM6_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0x84 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0x84 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0x84 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0x84 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0x84 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0x84 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0x84 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0x84 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0x84 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0x84 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0x84 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0x84 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0x84 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0x84 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0x84 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0x84 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0x84 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0x84 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0x84 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0x84 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0x88 "CDTM3_DTM6_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0x88 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0x88 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0x88 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0x88 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0x88 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0x88 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0x88 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0x88 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0x88 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0x88 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0x88 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0x88 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0x88 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0x88 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0x88 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0x88 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0x88 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0x88 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0x88 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0x88 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0x88 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0x88 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0x88 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0x88 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0x88 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0x88 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0x88 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0x88 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0x88 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0x88 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0x88 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0x88 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0x8C "CDTM3_DTM6_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0x8C 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0x8C 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0x8C 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0x8C 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0x8C 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0x8C 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0x8C 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x8C 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0x8C 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0x8C 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0x8C 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0x8C 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0x8C 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0x8C 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0x8C 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0x8C 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0x8C 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0x8C 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0x8C 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0x8C 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0x8C 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0x8C 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0x8C 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0x8C 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0x90 "CDTM3_DTM6_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0x90 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0x90 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0x90 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0x90 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0x90 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0x94 "CDTM3_DTM6_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x94 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x94 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x98 "CDTM3_DTM6_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x98 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x98 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0x9C "CDTM3_DTM6_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0x9C 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0x9C 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xA0 "CDTM3_DTM6_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0xA0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xA0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xA4 "CDTM3_DTM6_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0xA4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0xA4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0xA4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0xA4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0xA4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0xA4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0xA4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0xA4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0xA8 "CDTM3_DTM6_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0xA8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0xA8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0xA8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0xA8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0xA8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0xA8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0xA8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0xA8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0xA8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0xA8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0xA8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0xA8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xA8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0xA8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0xAC "CDTM3_DTM6_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0xAC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0xAC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0xAC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0xAC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0xAC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0xAC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0xAC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0xAC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0xAC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xAC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0xAC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0xAC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0xAC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0xAC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0xAC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0xAC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0xAC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0xAC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0xAC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0xB0 "CDTM3_DTM6_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xB4 "CDTM3_DTM6_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xB8 "CDTM3_DTM6_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xB8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xB8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xB8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xB8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xB8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xB8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xBC "CDTM3_DTM6_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xBC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xBC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xBC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xBC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xBC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xBC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xC0 "CDTM3_DTM7_CTRL,CDTM[i]_DTM[d] global configuration and control register" bitfld.long 0xC0 16. "SHUT_OFF_RST,Shut off reset" "0,1" bitfld.long 0xC0 8. "SR_UPD_EN,Shadow register update enable" "0,1" bitfld.long 0xC0 7. "CH_SHUTOFF_EN,Individual shutoff feature enable" "0,1" newline bitfld.long 0xC0 4.--6. "UPD_MODE,Update mode" "0,1,2,3,4,5,6,7" bitfld.long 0xC0 2.--3. "DTM_SEL,Select DTM update and PSU_SHUT_OFF reset signal" "0,1,2,3" bitfld.long 0xC0 0.--1. "CLK_SEL,Clock resolution selection" "0,1,2,3" line.long 0xC4 "CDTM3_DTM7_CH_CTRL1,CDTM[i]_DTM[d] channel control register 1" bitfld.long 0xC4 28.--29. "O1F_3,Output 1 function channel 3" "0,1,2,3" bitfld.long 0xC4 27. "SWAP_3,Swap outputs DTM_OUT0[3:3] of instance d and DTM_OUT1[3:3] of instance d (before final output register)" "0,1" bitfld.long 0xC4 26. "SH_EN_3,Shift enable channel 3" "0,1" newline bitfld.long 0xC4 25. "I1SEL_3,Input 1 select channel 3" "0,1" bitfld.long 0xC4 24. "O1SEL_3,Output 1 select channel 3" "0,1" bitfld.long 0xC4 22. "XDT_EN_2_3,Cross dead time enable on channel 2 and 3" "0,1" newline bitfld.long 0xC4 20.--21. "O1F_2,Output 1 function channel 2" "0,1,2,3" bitfld.long 0xC4 19. "SWAP_2,Swap outputs DTM_OUT0[2:2] of instance d and DTM_OUT1[2:2] of instance d (before final output register)" "0,1" bitfld.long 0xC4 18. "SH_EN_2,Shift enable channel 2" "0,1" newline bitfld.long 0xC4 17. "I1SEL_2,Input 1 select channel 2" "0,1" bitfld.long 0xC4 16. "O1SEL_2,Output 1 select channel 2" "0,1" bitfld.long 0xC4 12.--13. "O1F_1,Output 1 function channel 1" "0,1,2,3" newline bitfld.long 0xC4 11. "SWAP_1,Swap outputs DTM_OUT0[1:1] of instance d and DTM_OUT1[1:1] of instance d (before final output register)" "0,1" bitfld.long 0xC4 10. "SH_EN_1,Shift enable channel 1" "0,1" bitfld.long 0xC4 9. "I1SEL_1,Input 1 select channel 1" "0,1" newline bitfld.long 0xC4 8. "O1SEL_1,Output 1 select channel 1" "0,1" bitfld.long 0xC4 6. "XDT_EN_0_1,Cross dead time enable on channel 0 and 1" "0,1" bitfld.long 0xC4 4.--5. "O1F_0,Output 1 function channel 0" "0,1,2,3" newline bitfld.long 0xC4 3. "SWAP_0,Swap outputs DTM_OUT0[0:0] of instance d and DTM_OUT1[0:0] of instance d (before final output register)" "0,1" bitfld.long 0xC4 1. "I1SEL_0,Input 1 select channel 0" "0,1" bitfld.long 0xC4 0. "O1SEL_0,Output 1 select channel 0" "0,1" line.long 0xC8 "CDTM3_DTM7_CH_CTRL2,CDTM[i]_DTM[d] channel control register 2" bitfld.long 0xC8 31. "DT1_3,Dead time path enable on output 1 channel 3" "0,1" bitfld.long 0xC8 30. "SL1_3,Signal level on output 1 channel 3" "0,1" bitfld.long 0xC8 29. "OC1_3,Output 1 control channel 3" "0,1" newline bitfld.long 0xC8 28. "POL1_3,Polarity on output 1 channel 3" "0,1" bitfld.long 0xC8 27. "DT0_3,Dead time path enable on output 0 channel 3" "0,1" bitfld.long 0xC8 26. "SL0_3,Signal level on output 0 channel 3" "0,1" newline bitfld.long 0xC8 25. "OC0_3,Output 0 control channel 3" "0,1" bitfld.long 0xC8 24. "POL0_3,Polarity on output 0 channel 3" "0,1" bitfld.long 0xC8 23. "DT1_2,Dead time path enable on output 1 channel 2" "0,1" newline bitfld.long 0xC8 22. "SL1_2,Signal level on output 1 channel 2" "0,1" bitfld.long 0xC8 21. "OC1_2,Output 1 control channel 2" "0,1" bitfld.long 0xC8 20. "POL1_2,Polarity on output 1 channel 2" "0,1" newline bitfld.long 0xC8 19. "DT0_2,Dead time path enable on output 0 channel 2" "0,1" bitfld.long 0xC8 18. "SL0_2,Signal level on output 0 channel 2" "0,1" bitfld.long 0xC8 17. "OC0_2,Output 0 control channel 2" "0,1" newline bitfld.long 0xC8 16. "POL0_2,Polarity on output 0 channel 2" "0,1" bitfld.long 0xC8 15. "DT1_1,Dead time path enable on output 1 channel 1" "0,1" bitfld.long 0xC8 14. "SL1_1,Signal level on output 1 channel 1" "0,1" newline bitfld.long 0xC8 13. "OC1_1,Output 1 control channel 1" "0,1" bitfld.long 0xC8 12. "POL1_1,Polarity on output 1 channel 1" "0,1" bitfld.long 0xC8 11. "DT0_1,Dead time path enable on output 0 channel 1" "0,1" newline bitfld.long 0xC8 10. "SL0_1,Signal level on output 0 channel 1" "0,1" bitfld.long 0xC8 9. "OC0_1,Output 0 control channel 1" "0,1" bitfld.long 0xC8 8. "POL0_1,Polarity on output 0 channel 1" "0,1" newline bitfld.long 0xC8 7. "DT1_0,Dead time path enable on output 1 channel 0" "0,1" bitfld.long 0xC8 6. "SL1_0,Signal level on output 1 channel 0" "0,1" bitfld.long 0xC8 5. "OC1_0,Output 1 control channel 0" "0,1" newline bitfld.long 0xC8 4. "POL1_0,Polarity on output 1 channel 0" "0,1" bitfld.long 0xC8 3. "DT0_0,Dead time path enable on output 0 channel 0" "0,1" bitfld.long 0xC8 2. "SL0_0,Signal level on output 0 channel 0" "0,1" newline bitfld.long 0xC8 1. "OC0_0,Output 0 control channel 0" "0,1" bitfld.long 0xC8 0. "POL0_0,Polarity on output 0 channel 0" "0,1" line.long 0xCC "CDTM3_DTM7_CH_CTRL2_SR,CDTM[i] DTM[j] channel control register 2 shadow" bitfld.long 0xCC 31. "DT1_3_SR,Dead time path enable on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 30. "SL1_3_SR,Signal level on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 29. "OC1_3_SR,Output 1 control channel 3 shadow register" "0,1" newline bitfld.long 0xCC 28. "POL1_3_SR,Polarity on output 1 channel 3 shadow register" "0,1" bitfld.long 0xCC 27. "DT0_3_SR,Dead time path enable on output 0 channel 3 shadow register" "0,1" bitfld.long 0xCC 26. "SL0_3_SR,Signal level on output 0 channel 3 shadow register" "0,1" newline bitfld.long 0xCC 25. "OC0_3_SR,Output 0 control channel 3 shadow register" "0,1" bitfld.long 0xCC 24. "POL0_3_SR,Polarity on output 0 channel 3 shadow register" "0,1" bitfld.long 0xCC 23. "DT1_2_SR,Dead time path enable on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0xCC 22. "SL1_2_SR,Signal level on output 1 channel 2 shadow register" "0,1" bitfld.long 0xCC 21. "OC1_2_SR,Output 1 control channel 2 shadow register" "0,1" bitfld.long 0xCC 20. "POL1_2_SR,Polarity on output 1 channel 2 shadow register" "0,1" newline bitfld.long 0xCC 19. "DT0_2_SR,Dead time path enable on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 18. "SL0_2_SR,Signal level on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 17. "OC0_2_SR,Output 0 control channel 2 shadow register" "0,1" newline bitfld.long 0xCC 16. "POL0_2_SR,Polarity on output 0 channel 2 shadow register" "0,1" bitfld.long 0xCC 15. "DT1_1_SR,Dead time path enable on output 1 channel 1 shadow register" "0,1" bitfld.long 0xCC 14. "SL1_1_SR,Signal level on output 1 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 13. "OC1_1_SR,Output 1 control channel 1 shadow register" "0,1" bitfld.long 0xCC 12. "POL1_1_SR,Polarity on output 1 channel 1 shadow register" "0,1" bitfld.long 0xCC 11. "DT0_1_SR,Dead time path enable on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 10. "SL0_1_SR,Signal level on output 0 channel 1 shadow register" "0,1" bitfld.long 0xCC 9. "OC0_1_SR,Output 0 control channel 1 shadow register" "0,1" bitfld.long 0xCC 8. "POL0_1_SR,Polarity on output 0 channel 1 shadow register" "0,1" newline bitfld.long 0xCC 7. "DT1_0_SR,Dead time path enable on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 6. "SL1_0_SR,Signal level on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 5. "OC1_0_SR,Output 1 control channel 0 shadow register" "0,1" newline bitfld.long 0xCC 4. "POL1_0_SR,Polarity on output 1 channel 0 shadow register" "0,1" bitfld.long 0xCC 3. "DT0_0_SR,Dead time path enable on output 0 channel 0 shadow register" "0,1" bitfld.long 0xCC 2. "SL0_0_SR,Signal level on output 0 channel 0 shadow register" "0,1" newline bitfld.long 0xCC 1. "OC0_0_SR,Output 0 control channel 0 shadow register" "0,1" bitfld.long 0xCC 0. "POL0_0_SR,Polarity on output 0 channel 0 shadow register" "0,1" line.long 0xD0 "CDTM3_DTM7_PS_CTRL,CDTM[i]_DTM[d] phase shift unit configuration and control register" bitfld.long 0xD0 20.--21. "SHIFT_SEL,Shift select" "0,1,2,3" bitfld.long 0xD0 18. "TIM_SEL,TIM input select" "0,1" bitfld.long 0xD0 17. "IN_POL,Input polarity" "0,1" newline bitfld.long 0xD0 16. "PSU_IN_SEL,PSU input select" "0,1" hexmask.long.word 0xD0 0.--9. 1. "RELBLK,Reload value blanking window" line.long 0xD4 "CDTM3_DTM7_CH0_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0xD4 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xD4 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xD8 "CDTM3_DTM7_CH1_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0xD8 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xD8 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xDC "CDTM3_DTM7_CH2_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0xDC 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xDC 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xE0 "CDTM3_DTM7_CH3_DTV,CDTM[i]_DTM[d] channel [x] dead time reload values" hexmask.long.word 0xE0 16.--28. 1. "RELFALL,Reload value for falling edge dead time" hexmask.long.word 0xE0 0.--12. 1. "RELRISE,Reload value for rising edge dead time" line.long 0xE4 "CDTM3_DTM7_CH_SR,CDTM[i]_DTM[d] channel shadow register" bitfld.long 0xE4 7. "SL1_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_3_SR" "0,1" bitfld.long 0xE4 6. "SL0_3_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_3_SR" "0,1" bitfld.long 0xE4 5. "SL1_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_2_SR" "0,1" newline bitfld.long 0xE4 4. "SL0_2_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_2_SR" "0,1" bitfld.long 0xE4 3. "SL1_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_1_SR" "0,1" bitfld.long 0xE4 2. "SL0_1_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_1_SR" "0,1" newline bitfld.long 0xE4 1. "SL1_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL1_0_SR" "0,1" bitfld.long 0xE4 0. "SL0_0_SR_SR,Shadow register for bit CDTM[i]_DTM[d]_CH_CTRL2_SR.SL0_0_SR" "0,1" line.long 0xE8 "CDTM3_DTM7_CH_CTRL3,CDTM[i]_DTM[d] channel control register 3" bitfld.long 0xE8 27. "TSEL1_3,Input selection combinational logic path" "0,1" bitfld.long 0xE8 26. "TSEL0_3,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 25. "CIS3,Combinational input select channel 3" "0,1" newline bitfld.long 0xE8 24. "CII3,Combinational input invert channel 3" "0,1" bitfld.long 0xE8 19. "TSEL1_2,Input selection combinational logic path" "0,1" bitfld.long 0xE8 18. "TSEL0_2,Input selection for dead time / edge trigger generation" "0,1" newline bitfld.long 0xE8 17. "CIS2,Combinational input select channel 2" "0,1" bitfld.long 0xE8 16. "CII2,Combinational input invert channel 2" "0,1" bitfld.long 0xE8 11. "TSEL1_1,Input selection combinational logic path" "0,1" newline bitfld.long 0xE8 10. "TSEL0_1,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 9. "CIS1,Combinational input select channel 1" "0,1" bitfld.long 0xE8 8. "CII1,Combinational input invert channel 1" "0,1" newline bitfld.long 0xE8 3. "TSEL1_0,Input selection combinational logic path" "0,1" bitfld.long 0xE8 2. "TSEL0_0,Input selection for dead time / edge trigger generation" "0,1" bitfld.long 0xE8 1. "CIS0,Combinational input select channel 0" "0,1" newline bitfld.long 0xE8 0. "CII0,Combinational input invert channel 0" "0,1" line.long 0xEC "CDTM3_DTM7_CTRL2,CDTM[i]_DTM[d] global configuration and control register 2" bitfld.long 0xEC 31. "WR_EN_3,Channel" "0,1" bitfld.long 0xEC 30. "SHUT_OFF_RST_3,Channel" "0,1" bitfld.long 0xEC 28.--29. "UPD_MODE_3,Channel" "0,1,2,3" newline bitfld.long 0xEC 27. "SHUTOFF_POL_3,Channel" "0,1" bitfld.long 0xEC 24.--26. "SHUTOFF_SEL_3,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 23. "WR_EN_2,Channel" "0,1" newline bitfld.long 0xEC 22. "SHUT_OFF_RST_2,Channel" "0,1" bitfld.long 0xEC 20.--21. "UPD_MODE_2,Channel" "0,1,2,3" bitfld.long 0xEC 19. "SHUTOFF_POL_2,Channel" "0,1" newline bitfld.long 0xEC 16.--18. "SHUTOFF_SEL_2,Channel" "0,1,2,3,4,5,6,7" bitfld.long 0xEC 15. "WR_EN_1,Channel" "0,1" bitfld.long 0xEC 14. "SHUT_OFF_RST_1,Channel" "0,1" newline bitfld.long 0xEC 12.--13. "UPD_MODE_1,Channel" "0,1,2,3" bitfld.long 0xEC 11. "SHUTOFF_POL_1,Channel" "0,1" bitfld.long 0xEC 8.--10. "SHUTOFF_SEL_1,Channel" "0,1,2,3,4,5,6,7" newline bitfld.long 0xEC 7. "WR_EN_0,Channel" "0,1" bitfld.long 0xEC 6. "SHUT_OFF_RST_0,Channel" "0,1" bitfld.long 0xEC 4.--5. "UPD_MODE_0,Channel" "0,1,2,3" newline bitfld.long 0xEC 3. "SHUTOFF_POL_0,Channel" "0,1" bitfld.long 0xEC 0.--2. "SHUTOFF_SEL_0,Channel" "0,1,2,3,4,5,6,7" line.long 0xF0 "CDTM3_DTM7_CH0_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF0 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF0 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF0 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF0 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF0 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF0 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xF4 "CDTM3_DTM7_CH1_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF4 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF4 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF4 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF4 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF4 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF4 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xF8 "CDTM3_DTM7_CH2_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xF8 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xF8 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xF8 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xF8 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xF8 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xF8 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" line.long 0xFC "CDTM3_DTM7_CH3_DTV_SR,CDTM[i]_DTM[d] channel [x] dead time shadow values" bitfld.long 0xFC 31. "RELFALL_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" bitfld.long 0xFC 30. "RELFALL_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELFALL" "0,1" hexmask.long.word 0xFC 16.--28. 1. "RELFALL_SR,Shadow value for falling edge dead time" newline bitfld.long 0xFC 15. "RELRISE_UPD_EN,Control bit to enable update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" bitfld.long 0xFC 14. "RELRISE_UPD_FE0RE1,Control if falling edge or rising edge triggers update of CDTM[i]_DTM[d]_CH[x]_DTV.RELRISE" "0,1" hexmask.long.word 0xFC 0.--12. 1. "RELRISE_SR,Shadow value for rising edge dead time" rgroup.long ad:0x94865000++0x07 line.long 0x00 "AXIM3_FREE,AXIM[i] slot allocation status." bitfld.long 0x00 3. "FREE3,This bit represents the allocation status of the slot [t]" "0,1" bitfld.long 0x00 2. "FREE2,This bit represents the allocation status of the slot [t]" "0,1" bitfld.long 0x00 1. "FREE1,This bit represents the allocation status of the slot [t]" "0,1" newline bitfld.long 0x00 0. "FREE0,This bit represents the allocation status of the slot [t]" "0,1" line.long 0x04 "AXIM3_REQUEST,AXIM[i] slot request (allocation)." hexmask.long.byte 0x04 24.--31. 1. "REQID,This bit field shows the new allocated slot as binary encoded index" bitfld.long 0x04 3. "REQ1HOT3,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" bitfld.long 0x04 2. "REQ1HOT2,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" newline bitfld.long 0x04 1. "REQ1HOT1,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" bitfld.long 0x04 0. "REQ1HOT0,A read to the AXIM[i]_REQUEST register will allocate a new slot if any slot is available" "0,1" group.long ad:0x94865008++0x03 line.long 0x00 "AXIM3_RELEASE,AXIM[i] slot release (de-allocation)." bitfld.long 0x00 3. "RELREQ3,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" bitfld.long 0x00 2. "RELREQ2,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" bitfld.long 0x00 1. "RELREQ1,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" newline bitfld.long 0x00 0. "RELREQ0,Slot [t] release request: A write to AXIM[i]_RELEASE.RELREQ[t] de-allocates one or more slots" "0,1" group.long ad:0x94865020++0x03 line.long 0x00 "AXIM3_SLOT0_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94865028++0x03 line.long 0x00 "AXIM3_SLOT0_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94865030++0x07 line.long 0x00 "AXIM3_SLOT0_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM3_SLOT0_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94865038++0x03 line.long 0x00 "AXIM3_SLOT0_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94865040++0x03 line.long 0x00 "AXIM3_SLOT1_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94865048++0x03 line.long 0x00 "AXIM3_SLOT1_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94865050++0x07 line.long 0x00 "AXIM3_SLOT1_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM3_SLOT1_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94865058++0x03 line.long 0x00 "AXIM3_SLOT1_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94865060++0x03 line.long 0x00 "AXIM3_SLOT2_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94865068++0x03 line.long 0x00 "AXIM3_SLOT2_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94865070++0x07 line.long 0x00 "AXIM3_SLOT2_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM3_SLOT2_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94865078++0x03 line.long 0x00 "AXIM3_SLOT2_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94865080++0x03 line.long 0x00 "AXIM3_SLOT3_ADDR_LOW,AXIM[i] slot[s] address bits 31:0 of AXI transaction." group.long ad:0x94865088++0x03 line.long 0x00 "AXIM3_SLOT3_DATA_LOW,AXIM[i] slot[s] data bits 31:0 of AXI transaction." group.long ad:0x94865090++0x07 line.long 0x00 "AXIM3_SLOT3_CFG1,AXIM[i] slot [s] configuration 1" bitfld.long 0x00 25. "AXI_RW,AXI Read Write indication" "0,1" bitfld.long 0x00 22.--24. "AXI_SIZE,AXI data size" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--19. "AXI_LOCK,AXI Lock indication" "0,1,2,3" newline bitfld.long 0x00 14.--17. "AXI_CACHE,AxCACHE bit field (see ARM AXI-3 spec)" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 11.--13. "AXI_PROT,AXI priority mode" "0,1,2,3,4,5,6,7" bitfld.long 0x00 5.--6. "PRIO,Slot priority" "0,1,2,3" newline bitfld.long 0x00 4. "AUTO_INCR,Enable or disable auto-increment mode" "0,1" bitfld.long 0x00 0.--3. "INCR,Address increment for auto-increment mode" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "AXIM3_SLOT3_CFG2,AXIM[i] slot[s] configuration 2" hexmask.long.word 0x04 0.--15. 1. "AXI_ID,AXI ID for transaction" rgroup.long ad:0x94865098++0x03 line.long 0x00 "AXIM3_SLOT3_STATUS,AXIM[i] slot[s] status" bitfld.long 0x00 4.--5. "RESP,AXI response from last AXI transaction" "0,1,2,3" bitfld.long 0x00 3. "READY,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.READY state" "0,1" bitfld.long 0x00 2. "STARTED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.STARTED state" "0,1" newline bitfld.long 0x00 1. "QUEUED,This bit represents the slot AXIM[i]_SLOT[s]_STATUS.QUEUED state" "0,1" bitfld.long 0x00 0. "ALLOC,AXI Slot occupation indication" "0,1" group.long ad:0x94870000++0x03 "MCS3_MEM - array[6144]" line.long 0x00 "MCS3_MEM[0],MCS[i] memory region" button "DATA" "d ad:0x094870000++0x000005FFF /long" tree.end autoindent.off newline tree.end endif