; --------------------------------------------------------------------------------
; @Title: ARM926 on chip peripherals
; @Props:
; @Author: -
; @Changelog:
; @Manufacturer:
; @Doc:
; @Core:
; @Chip:
; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: pera926e.per 16305 2023-06-28 11:47:37Z pegold $

config 16. 8.
width 8.
ASSERT VERSION.BUILD.BASE()>=80109.

sif PER.isNOTIFICATION()
base AVM:0x00000000
wgroup AVM:0x00++0
textline " Peripheral File Notification - "
button "show missing files" "DIALOG.MESSAGE ""Please check your installation for the possibly missing files:""+CONV.CHAR(0xa)+PER.NOTIFICATION.MISSINGFILES()"
textline " ---------------------------------------------------------------"
textline " The peripheral file for this SoC cannot be displayed.          "
textline " Possible reasons are:                                          "
textline " - it is missing in the local installation or under development "
textline " - it is confidential                                           "
textline "                                                                "
textline " As fallback only the core registers are shown.                 "
textline " Please check    www.lauterbach.com/scripts.html                "
textline " or contact      support@lauterbach.com .                       "
textline "                                                                "
endif
AUTOINDENT.PUSH
AUTOINDENT.ON CENTER TREE
width 8.
tree "ID Registers"
group c15:0x0000--0x0000
line.long 0x0 "MIDR,Identity Code"
hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer"
hexmask.long.byte 0x0 20.--23. 0x1 "SPEC,Specification Revision"
hexmask.long.byte 0x0 16.--19. 0x1 "ARCH,Architecture Version"
hexmask.long.word 0x0 4.--15. 0x1 "PARTNUM,Part Number"
hexmask.long.byte 0x0 0.--3. 0x01 "REV,Layout Revision"
group c15:0x0100--0x0100
line.long 0x0 "CTR,Cache Type"
bitfld.long 0x0 25.--28. "CLASS,Cache Class" "0,1,2,3,4,5,6,7,8,9,a,b,c,d,e,f"
bitfld.long 0x0 24. "H,Cache Havardness" "no,yes"
newline
bitfld.long 0x0 18.--21. "DSIZE,Data Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
bitfld.long 0x0 15.--17. "DASS,Data Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 14. "DM,Data Cache Multiplier Bit" "0,1"
bitfld.long 0x0 12.--13. "DLENGTH,Data Cache Line Length" "2,4,8,16"
newline
bitfld.long 0x0 6.--9. "ISIZE,Instruction Cache Size" "512,1k,2k,4k,8k,16k,32k,64k,128k,256k,512k,1M,2M,4M,8M,?..."
bitfld.long 0x0 3.--5. "IASS,Instruction Cache Associativity" "dir,2,4,8,16,32,64,128"
bitfld.long 0x0 2. "IM,Instruction Cache Multiplier Bit" "0,1"
bitfld.long 0x0 0.--1. "ILENGTH,Instruction Cache Line Length" "2,4,8,16"
group c15:0x0200--0x0200
line.long 0x0 "TCMTR,Tightly-Coupled Memory Type Register"
bitfld.long 0x0 16. "DP,Data TCM Present" "no,yes"
bitfld.long 0x0 0. "IP,Instruction TCM Present" "no,yes"
tree.end
tree "MMU Control and Configuration"
width 8.
group c15:0x0001--0x0001
line.long 0x0 "CR,Control Register"
bitfld.long 0x0 15. "L4,Configure Loading TBIT" "Enable,Disable"
bitfld.long 0x0 14. "RR,Round Robin Replacement Strategy for ICache and DCache" "Random,Round robin"
bitfld.long 0x0 13. "V,Location of Exception Vectors" "0x00000000,0xFFFF0000"
newline
bitfld.long 0x0 12. "I,Instruction Cache" "Disable,Enable"
bitfld.long 0x0 9. "R,ROM Protection" "Disable,Enable"
bitfld.long 0x0 8. "S,System Protection" "Disable,Enable"
bitfld.long 0x0 7. "B,Endianism" "Little,Big"
newline
bitfld.long 0x0 2. "C,Data Cache" "Disable,Enable"
bitfld.long 0x0 1. "A,Alignment Fault Checking" "Disable,Enable"
bitfld.long 0x0 0. "M,MMU" "Disable,Enable"
newline
group c15:0x0002--0x0002
line.long 0x0 "TTBR,Translation Table Base Register"
hexmask.long 0x0 14.--31. 0x4000 "TTBA,Translation Table Base Address"
newline
group c15:0x3--0x3
line.long 0x0 "DACR,Domain Access Control Register"
bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager"
newline
group c15:0x0005--0x0005
line.long 0x0 "DFSR,Data Fault Status Register"
bitfld.long 0x0 0x4--0x7 "DOMAIN,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0x0--0x3 "STATUS,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
group c15:0x0105--0x0105
line.long 0x0 "IFSR,Instruction Fault Status Register"
bitfld.long 0x0 0x4--0x7 "DOMAIN,Domain" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 0x0--0x3 "STATUS,Status" "reserved,alignment,reserved,alignment,be_linef_sect,transl_sect,be_linef_page,transl_page,be_other_sect,domain_sect,be_other_page,domain_page,be_trans_l1,perm_sect,be_trans_l2,perm_page"
group c15:0x0006--0x0006
line.long 0x0 "DFAR,Data Fault Address Register"
newline
group c15:0x000a--0x000a
line.long 0x0 "TLBR,TLB Lockdown Register"
bitfld.long 0x0 26.--28. "VICTIM,Victim" "0,1,2,3,4,5,6,7"
bitfld.long 0x0 0. "P,P bit" "0,1"
newline
group c15:0x000d--0x000d
line.long 0x0 "FCSEPID,FCSE Process ID"
group c15:0x010d--0x010d
line.long 0x0 "CONTEXT,Context ID"
tree.end
tree "Cache Control and Configuration"
group c15:0x0009--0x0009
line.long 0x0 "DCACHE,Data Cache Lockdown"
bitfld.long 0x0 3. "LWAY3,L bit for WAY 3" "0,1"
bitfld.long 0x0 2. "LWAY2,L bit for WAY 2" "0,1"
bitfld.long 0x0 1. "LWAY1,L bit for WAY 1" "0,1"
bitfld.long 0x0 0. "LWAY0,L bit for WAY 0" "0,1"
group c15:0x0109--0x0109
line.long 0x0 "ICACHE,Instruction Cache Lockdown"
bitfld.long 0x0 3. "LWAY3,L bit for WAY 3" "0,1"
bitfld.long 0x0 2. "LWAY2,L bit for WAY 2" "0,1"
bitfld.long 0x0 1. "LWAY1,L bit for WAY 1" "0,1"
bitfld.long 0x0 0. "LWAY0,L bit for WAY 0" "0,1"
tree.end
tree "TCM Control and Configuration"
group c15:0x0019--0x0019
line.long 0x0 "DTCM,Data TCM Region Register"
hexmask.long 0x0 12.--31. 0x1000 "BASE,Base Address"
bitfld.long 0x0 2.--5. "SIZE,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
bitfld.long 0x0 0. "ENABLE,Enable Bit" "disable,enable"
group c15:0x0119--0x0119
line.long 0x0 "ITCM,Instruction TCM Region Register"
hexmask.long 0x0 12.--31. 0x1000 "BASE,Base Address"
bitfld.long 0x0 2.--5. "SIZE,TCM Size" "0K,res,res,4K,8K,16K,32K,64K,128K,256K,512K,1M,res,res,res,res"
bitfld.long 0x0 0. "ENABLE,Enable Bit" "disable,enable"
tree.end
tree "Test and Debug"
group c15:0x000f--0x000f
line.long 0x0 "DOVRR,Debug Override Register"
bitfld.long 0x0 19. "TCALL,Test and clean all" "disable,enable"
bitfld.long 0x0 18. "DTLBMISS,Abort Data TLB Miss" "no abort,abort"
bitfld.long 0x0 17. "ITLBMISS,Abort Instruction TLB Miss" "no abort,abort"
newline
bitfld.long 0x0 16. "PREFETCH,NC Instruction Prefetching" "enable,disable"
bitfld.long 0x0 15. "CLOCKGATE,Block Level Clock Gating" "enable,disable"
bitfld.long 0x0 14. "NCBSTORE,NCB Stores" "disable,enable"
bitfld.long 0x0 13. "MMU/DC,MMU disable DCache Enabled Behaviour" "NCNB,WT"
group c15:0x001f--0x001f
line.long 0x0 "ADDRESS,Debug/Test Address"
;wgroup c15:0x402f--0x402f
; line.long 0x0 "RMTLBTAG,Read tag in main TLB entry"
;wgroup c15:0x403f--0x403f
; line.long 0x0 "WMTLBTAG,Write tag in main TLB entry"
;wgroup c15:0x404f--0x404f
; line.long 0x0 "RMTLBPA,Read PA in main TLB entry"
;wgroup c15:0x405f--0x405f
; line.long 0x0 "WMTLBPA,Write PA in main TLB entry"
;wgroup c15:0x407f--0x407f
; line.long 0x0 "TMTLB,Transfer main TLB entry into RAM"
;wgroup c15:0x412f--0x412f
; line.long 0x0 "RLTLBTAG,Read tag in lockdown TLB entry"
;wgroup c15:0x413f--0x413f
; line.long 0x0 "WLTLBTAG,Write tag in lockdown TLB entry"
;wgroup c15:0x414f--0x414f
; line.long 0x0 "RLTLBPA,Read PA in lockdown TLB entry"
;wgroup c15:0x415f--0x415f
; line.long 0x0 "WLTLBPA,Write PA in lockdown TLB entry"
;wgroup c15:0x417f--0x417f
; line.long 0x0 "TLTLB,Transfer lockdown TLB entry into RAM"
group c15:0x101f--0x101f
line.long 0x0 "TRACE,Trace Control"
bitfld.long 0x0 2. "FIQ,Stalling Core when FIQ and ETM FIFOFULL" "stall, no stall"
bitfld.long 0x0 1. "IRQ,Stalling Core when IRQ and ETM FIFOFULL" "stall, no stall"
group c15:0x700f--0x700f
line.long 0x0 "CACHE,Cache Debug Control"
bitfld.long 0x0 2. "DWT,Disable Writeback (force WT)" "writeback,write-through"
bitfld.long 0x0 1. "DIL,Disable ICache Linefill" "enable,disable"
bitfld.long 0x0 0. "DDL,Disable DCache Linefill" "enable,disable"
group c15:0x701f--0x701f
line.long 0x0 "MMU,MMU Debug Control"
bitfld.long 0x0 7. "TLBMI,Disable Main TLB Matching for Instruction Fetches" "enable,disable"
bitfld.long 0x0 6. "TLBMD,Disable Main TLB Matching for Data Accesses" "enable,disable"
bitfld.long 0x0 5. "TLBLI,Disable Main TLB Load Due to Instruction Fetches Miss" "enable,disable"
bitfld.long 0x0 4. "TLBLD,Disable Main TLB Load Due to Data Access Miss" "enable,disable"
newline
bitfld.long 0x0 3. "TLBMMI,Disable Micro TLB Matching for Instruction Fetches" "enable,disable"
bitfld.long 0x0 2. "TLBMMD,Disable Micro TLB Matching for Data Accesses" "enable,disable"
bitfld.long 0x0 1. "TLBMLI,Disable Micro TLB Load Due to Instruction Fetches Miss" "enable,disable"
bitfld.long 0x0 0. "TLBMLD,Disable Micro TLB Load Due to Data Access Miss" "enable,disable"
group c15:0x002f--0x002f
line.long 0x0 "REMAP,Memory Region Remap"
bitfld.long 0x0 14.--15. "IWB," "NCNB,NCB,WT,WB"
bitfld.long 0x0 12.--13. "IWT," "NCNB,NCB,WT,WB"
bitfld.long 0x0 10.--11. "INCB," "NCNB,NCB,WT,WB"
bitfld.long 0x0 8.--9. "INCNB," "NCNB,NCB,WT,WB"
newline
bitfld.long 0x0 6.--7. "DWB," "NCNB,NCB,WT,WB"
bitfld.long 0x0 4.--5. "DWT," "NCNB,NCB,WT,WB"
bitfld.long 0x0 2.--3. "DNCB," "NCNB,NCB,WT,WB"
bitfld.long 0x0 0.--1. "DNCNB," "NCNB,NCB,WT,WB"
tree.end
tree "ICEbreaker"
width 8.
group ice:0x0--0x5 "Debug Control"
line.long 0x0 "DBGCTRL,Debug Control Register"
bitfld.long 0x0 0x5 "ICE,EmbeddedICE Disable" "enabled,disabled"
bitfld.long 0x0 0x4 "MONITOR,Monitor Mode Enable" "disabled,enabled"
newline
bitfld.long 0x0 0x3 "STEP,Single Step" "disabled,enabled"
bitfld.long 0x0 0x2 "INTDIS,Interrupts Disable" "enabled,disabled"
bitfld.long 0x0 0x1 "DBGRQ,Debug Request" "no,yes"
bitfld.long 0x0 0x0 "DBGACK,Debug Acknowledge" "no,yes"
line.long 0x4 "DBGSTAT,Debug Status Register"
bitfld.long 0x4 0x6--0x9 "MOE,Method of Entry" "no,BP0,BP1,BPsoft,Vector,BPext,WP0,WP1,WPext,AsyncInt,AsyncExt,Reentry,res,res,res,res"
bitfld.long 0x4 0x5 "IJBIT,IJBIT" "0,java"
bitfld.long 0x4 0x4 "ITBIT,ITBIT" "0,thumb"
bitfld.long 0x4 0x3 "SYSCOMP,SYSCOMP" "0,1"
bitfld.long 0x4 0x2 "IFEN,Interrupts Enable" "disabled,enabled"
bitfld.long 0x4 0x1 "DBGRQ,Debug Request" "no,yes"
bitfld.long 0x4 0x0 "DBGACK,Debug Acknowledge" "no,yes"
line.long 0x8 "VECTOR,Vector Catch Register"
bitfld.long 0x8 0x7 "FIQ,FIQ" "dis,ena"
bitfld.long 0x8 0x6 "IRQ,IRQ" "dis,ena"
bitfld.long 0x8 0x4 "D_ABO,D_ABORT" "dis,ena"
bitfld.long 0x8 0x3 "P_ABO,P_ABORT" "dis,ena"
bitfld.long 0x8 0x2 "SWI,SWI" "dis,ena"
bitfld.long 0x8 0x1 "UND,UNDEF" "dis,ena"
bitfld.long 0x8 0x0 "RES,RESET" "dis,ena"
line.long 0x10 "COMCTRL,Debug Communication Control Register"
bitfld.long 0x10 28.--31. "VERSION,Version Number" "0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111"
bitfld.long 0x10 0x1 "WRITE,Write Register Free" "idle,pend"
bitfld.long 0x10 0x0 "READ,Read Register Free" "idle,pend"
line.long 0x14 "COMDATA,Debug Communication Data Register"
group ice:0x8--0x0d "Watchpoint 0"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 "ENABLE,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 "RANGE,Assert RANGEOUT Signal" "0  ,1"
bitfld.long 0x10 0x6 "CHAIN,Connect to Watchpoint 0" "0  ,1"
bitfld.long 0x10 0x5 "EXTERN,Depentend from EXTERN Signal" "0  ,1"
bitfld.long 0x10 0x4 "nTRANS,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 "nOPC,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 "MAS,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 "nRW,Read/Write" "R  ,W"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 "RANGE,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 "CHAIN,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 "EXTERN,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 "nTRANS,CPU Mode" "ENA,DIS    "
bitfld.long 0x14 0x3 "nOPC,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 "MAS,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 "nRW,Read/Write" "ENA,DIS"
group ice:0x10--0x15 "Watchpoint 1"
line.long 0x0 "AV,Address Value"
line.long 0x4 "AM,Address Mask"
line.long 0x8 "DV,Data Value"
line.long 0x0c "DM,Data Mask"
line.long 0x10 "CV,Control Value"
bitfld.long 0x10 0x8 "ENABLE,Global Enable for Watchpoint 1" "DIS,ENA"
bitfld.long 0x10 0x7 "RANGE,Assert RANGEOUT Signal" "0  ,1"
bitfld.long 0x10 0x6 "CHAIN,Connect to Watchpoint 0" "0  ,1"
bitfld.long 0x10 0x5 "EXTERN,Depentend from EXTERN Signal" "0  ,1"
bitfld.long 0x10 0x4 "nTRANS,CPU Mode" "User,no User"
bitfld.long 0x10 0x3 "nOPC,Op Fetch" "Inst,Data"
bitfld.long 0x10 0x1--0x2 "MAS,Access Size" "Byte,Word,Long,Res"
bitfld.long 0x10 0x0 "nRW,Read/Write" "R  ,w"
line.long 0x14 "CM,Control Mask"
bitfld.long 0x14 0x7 "RANGE,Assert RANGEOUT Signal" "ENA,DIS"
bitfld.long 0x14 0x6 "CHAIN,Connect to Watchpoint 0" "ENA,DIS"
bitfld.long 0x14 0x5 "EXTERN,Depentend from EXTERN Signal" "ENA,DIS"
bitfld.long 0x14 0x4 "nTRANS,CPU Mode" "ENA,DIS    "
bitfld.long 0x14 0x3 "nOPC,Op Fetch" "ENA ,DIS"
bitfld.long 0x14 0x1--0x2 "MAS,Access Size" "ENA ,Res,Res,DIS"
bitfld.long 0x14 0x0 "nRW,Read/Write" "ENA,DIS"
tree.end
AUTOINDENT.POP
textline ""