; -------------------------------------------------------------------------------- ; @Title: GD32A513 On-Chip Peripherals ; @Props: Released ; @Author: KRZ ; @Changelog: 2024-04-15 KRZ ; @Manufacturer: GigaDevice - GigaDevice Semiconductor Inc. ; @Doc: Generated (TRACE32, build: 168529.), based on: GD32A513.svd (Ver. 1.0) ; @Core: Cortex-M33F ; @Chip: GD32A513CB, GD32A513CC, GD32A513KB, GD32A513KC, GD32A513RB, ; GD32A513RC, GD32A513RD, GD32A513VB, GD32A513VC, GD32A513VD ; @Copyright: (C) 1989-2024 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: pergd32a513.per 17765 2024-04-15 13:31:45Z kwisniewski $ AUTOINDENT.ON CENTER TREE ENUMDELIMITER "," base ad:0x0 tree.close "Core Registers (Cortex-M33F)" AUTOINDENT.PUSH AUTOINDENT.OFF tree "System Control" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 12. group.long 0x08++0x03 line.long 0x00 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 29. " EXTEXCLALL ,Allows external exclusive operations to be used in a configuration with no MPU" "No,Yes" bitfld.long 0x00 12. " DISITMATBFLUSH ,Disables ITM and DWT ATB flush" "No,Yes" bitfld.long 0x00 10. " FPEXCODIS ,Disables FPU exception outputs" "No,Yes" textline " " bitfld.long 0x00 9. " DISOOFP ,Disables floating-point" "No,Yes" bitfld.long 0x00 2. " DISFOLD ,Disables dual-issue functionality" "No,Yes" bitfld.long 0x00 0. " DISMCYCINT ,Disables interruption of multi-cycle" "No,Yes" group.long 0x0C++0x0F line.long 0x00 "CPPWR,Coprocessor Power Control Register" bitfld.long 0x00 21. " SUS10 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 20. " SU10 ,This bit indicates and allows modification of whether the state associated with the floating point unit is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 15. " SUS7 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 14. " SU7 ,This bit indicates and allows modification of whether the state associated with the coprocessor 7 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 13. " SUS6 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 12. " SU6 ,This bit indicates and allows modification of whether the state associated with the coprocessor 6 is permitted to become UNKNOWN" "Not permitted,Permitted" textline " " bitfld.long 0x00 11. " SUS5 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 10. " SU5 ,This bit indicates and allows modification of whether the state associated with the coprocessor 5 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 9. " SUS4 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 8. " SU4 ,This bit indicates and allows modification of whether the state associated with the coprocessor 4 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 7. " SUS3 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 6. " SU3 ,This bit indicates and allows modification of whether the state associated with the coprocessor 3 is permitted to become UNKNOWN" "Not permitted,Permitted" textline " " bitfld.long 0x00 5. " SUS2 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 4. " SU2 ,This bit indicates and allows modification of whether the state associated with the coprocessor 2 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 3. " SUS1 ,State unknown Secure only" "Both states,Secure only" textline " " bitfld.long 0x00 2. " SU1 ,This bit indicates and allows modification of whether the state associated with the coprocessor 1 is permitted to become UNKNOWN" "Not permitted,Permitted" bitfld.long 0x00 1. " SUS0 ,State unknown Secure only" "Both states,Secure only" bitfld.long 0x00 0. " SU0 ,This bit indicates and allows modification of whether the state associated with the coprocessor 0 is permitted to become UNKNOWN" "Not permitted,Permitted" line.long 0x04 "SYST_CSR,SysTick Control and Status Register" rbitfld.long 0x04 16. " COUNTFLAG ,Counter Flag" "Not counted,Counted" bitfld.long 0x04 2. " CLKSOURCE ,SysTick clock source" "External,Core" bitfld.long 0x04 1. " TICKINT ,SysTick Handler" "No SysTick,SysTick" textline " " bitfld.long 0x04 0. " ENABLE ,Counter Enable" "Disabled,Enabled" line.long 0x08 "SYST_RVR,SysTick Reload Value Register" hexmask.long.tbyte 0x08 0.--23. 1. " RELOAD ,The value to load into the SYST_CVR when the counter reaches 0" line.long 0x0C "SYST_CVR,SysTick Current Value Register" hexmask.long.tbyte 0x0C 0.--23. 1. " CURRENT ,Current counter value" rgroup.long 0x1C++0x03 line.long 0x00 "SYST_CALIB,SysTick Calibration value Register" bitfld.long 0x00 31. " NOREF ,Indicates whether the implementation defined reference clock is implemented" "Implemented,Not implemented" bitfld.long 0x00 30. " SKEW ,Indicates whether the 10ms calibration value is exact" "Exact,Inexact" hexmask.long.tbyte 0x00 0.--23. 1. " TENMS ,Holds a reload value to be used for 10ms (100Hz) timing" rgroup.long 0xD00++0x03 line.long 0x00 "CPUID,CPUID Base Register" abitfld.long 0x00 24.--31. " IMPLEMENTER ,Implementer code that Arm has assigned" "0x41=Arm Limited" bitfld.long 0x00 20.--23. " VARIANT ,Variant number to distinguish between different product variants or major revisions of the product" "r0,r1,r2,r3,r4,r5,r6,r7,r8,r9,r10,r11,r12,r13,r14,r15" bitfld.long 0x00 16.--19. " ARCHITECTURE ,Indicates the architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8-M w/ Main Extension" newline abitfld.long 0x00 4.--15. " PARTNO ,Indicates part number" "0xD21=Cortex-M33" bitfld.long 0x00 0.--3. " REVISION ,Revision number to distinguish between different patches of the product" "p0,p1,p2,p3,p4,p5,p6,p7,p8,p9,p10,p11,p12,p13,p14,p15" group.long 0xD04++0x23 line.long 0x00 "ICSR,Interrupt Control and State Register" setclrfld.long 0x00 31. 0x00 31. 0x00 30. " PENDNMISET , On writes allows the NMI exception to be set as pending. On reads indicates whether the NMI exception is pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x00 27. " PENDSVSET , On writes allows the PendSV exception for the selected Security state to be set as pending. On reads indicates whether the PendSV for the selected Security state exception is pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x00 25. " PENDSTSET ,On writes, sets the SysTick exception as pending. On reads, indicates the current state of the exception" "Not pending,Pending" textline " " bitfld.long 0x00 24. " STTNS ,Controls whether in a single SysTick implementation the SysTick is Secure or Non-secure" "Secure,Non-secure" rbitfld.long 0x00 23. " ISRPREEMPT ,Indicates whether a pending exception will be serviced on exit from debug halt state" "Disabled,Enabled" rbitfld.long 0x00 22. " ISRPENDING ,Indicates whether an external interrupt, generated by the NVIC, is pending" "Not pending,Pending" textline " " hexmask.long.word 0x00 12.--20. 1. " VECTPENDING ,The exception number of the highest priority pending and enabled interrupt" rbitfld.long 0x00 11. " RETTOBASE ,Indicates whether there is an active exception other than the exception indicated by the current value of the IPSR" "Present,Absent" hexmask.long.word 0x00 0.--8. 1. " VECTACTIVE ,The exception number of the current executing exception" line.long 0x04 "VTOR,Vector Table Offset Register" hexmask.long 0x04 7.--31. 0x80 " TBLOFF ,Bits[31:7] of the vector table address" line.long 0x08 "AIRCR,Application Interrupt and Reset Control Register" hexmask.long.word 0x08 16.--31. 1. " VECTKEYSTAT ,Vector Key" rbitfld.long 0x08 15. " ENDIANNESS ,Indicates the memory system endianness" "Little endian,Big endian" bitfld.long 0x08 14. " PRIS ,Prioritize Secure exceptions" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " BFHFNMINS ,BusFault BusFault HardFault and NMI Non-secure enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " PRIGROUP ,Priority grouping. Group priority field bits/Subpriority field bits" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" bitfld.long 0x08 3. " SYSRESETREQS ,System reset request Secure only" "Both states,Secure only" textline " " bitfld.long 0x08 2. " SYSRESETREQ ,System reset request" "Not requested,Requested" bitfld.long 0x08 1. " VECTCLRACTIVE ,Writing 1 to this bit clears all active state information for fixed and configurable exceptions" "No effect,Clear" line.long 0x0C "SCR,System Control Register" bitfld.long 0x0C 4. " SEVONPEND ,Determines whether an interrupt transition from inactive state to pending state is a wakeup event" "Not wakeup,Wakeup" bitfld.long 0x0C 3. " SLEEPDEEPS ,Controls whether the SLEEPDEEP bit is only accessible from the secure state" "Both states,Secure only" bitfld.long 0x0C 2. " SLEEPDEEP ,Provides a qualifying hint indicating that waking from sleep might take longer" "Not deep sleep,Deep sleep" textline " " bitfld.long 0x0C 1. " SLEEPONEXIT ,Determines whether, on an exit from an ISR that returns to the base level of execution priority, the processor enters a sleep state" "Disabled,Enabled" line.long 0x10 "CCR,Configuration and Control Register" bitfld.long 0x10 18. " BP ,Branch prediction enable bit" "Disabled,Enabled" bitfld.long 0x10 17. " IC ,Instruction cache enable bit" "Disabled,Enabled" bitfld.long 0x10 16. " DC ,Cache enable bit" "Disabled,Enabled" textline " " bitfld.long 0x10 10. " STKOFHFNMIGN ,Controls the effect of a stack limit violation while executing at a requested priority less than 0" "Not ignored,Ignored" bitfld.long 0x10 8. " BFHFNMIGN ,Determines the effect of precise busfaults on handlers running at a requested priority less than 0" "Not ignored,Ignored" bitfld.long 0x10 4. " DIV_0_TRP ,Controls the trap on divide by 0" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " UNALIGN_TRP ,Controls the trapping of unaligned word or halfword accesses" "Disabled,Enabled" bitfld.long 0x10 1. " USERSETMPEND ,Controls whether unprivileged software can access the STIR" "Disabled,Enabled" line.long 0x14 "SHPR1,System Handler Priority Register 1" hexmask.long.byte 0x14 24.--31. 1. " PRI_7 ,Priority of system handler 7, SecureFault" hexmask.long.byte 0x14 16.--23. 1. " PRI_6 ,Priority of system handler 6, UsageFault" hexmask.long.byte 0x14 8.--15. 1. " PRI_5 ,Priority of system handler 5, BusFault" textline " " hexmask.long.byte 0x14 0.--7. 1. " PRI_4 ,Priority of system handler 4, MemManage" line.long 0x18 "SHPR2,System Handler Priority Register 2" hexmask.long.byte 0x18 24.--31. 1. " PRI_11 ,Priority of system handler 11, SVCall" line.long 0x1C "SHPR3,System Handler Priority Register 3" hexmask.long.byte 0x1C 24.--31. 1. " PRI_15 ,Priority of system handler 15, SysTick" hexmask.long.byte 0x1C 16.--23. 1. " PRI_14 ,Priority of system handler 14, PendSV" hexmask.long.byte 0x1C 0.--7. 1. " PRI_12 ,Priority of system handler 12, DebugMonitor" line.long 0x20 "SHCSR,System Handler Control and State Register" bitfld.long 0x20 21. " HARDFAULTPENDED ,HardFault exception status" "Not pending,Pending" bitfld.long 0x20 20. " SECUREFAULTPENDED ,SecureFault exception status" "Not pending,Pending" bitfld.long 0x20 19. " SECUREFAULTENA ,SecureFault exception enable" "Disabled,Enabled" textline " " bitfld.long 0x20 18. " USGFAULTENA ,UsageFault exception enable" "Disabled,Enabled" bitfld.long 0x20 17. " BUSFAULTENA ,BusFault exception enable" "Disabled,Enabled" bitfld.long 0x20 16. " MEMFAULTENA ,MemManage exception enable" "Disabled,Enabled" textline " " bitfld.long 0x20 15. " SVCALLPENDED ,SVCall exception status" "Not pending,Pending" bitfld.long 0x20 14. " BUSFAULTPENDED ,BusFault exception status" "Not pending,Pending" bitfld.long 0x20 13. " MEMFAULTPENDED ,MemManage exception status" "Not pending,Pending" textline " " bitfld.long 0x20 12. " USGFAULTPENDED ,UsageFault exception status" "Not pending,Pending" bitfld.long 0x20 11. " SYSTICKACT ,SysTick exception status" "Not active,Active" bitfld.long 0x20 10. " PENDSVACT ,PendSV exception status" "Not active,Active" textline " " bitfld.long 0x20 8. " MONITORACT ,Monitor exception status" "Not active,Active" bitfld.long 0x20 7. " SVCALLACT ,SVCall exception status" "Not active,Active" bitfld.long 0x20 5. " NMIACT ,NMI exception status" "Not active,Active" textline " " bitfld.long 0x20 4. " SECUREFAULTACT ,SecureFault exception status" "Not active,Active" bitfld.long 0x20 3. " USGFAULTACT ,UsageFault exception status" "Not active,Active" bitfld.long 0x20 2. " HARDFAULTACT ,HardFault exception status for the selected Security state" "Not active,Active" textline " " bitfld.long 0x20 1. " BUSFAULTACT ,BusFault exception status" "Not active,Active" bitfld.long 0x20 0. " MEMFAULTACT ,MemManage exception status" "Not active,Active" group.byte 0xD28++0x1 line.byte 0x00 "MMFSR,MemManage Status Register" bitfld.byte 0x00 7. " MMARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x00 5. " MLSPERR ,A MemManage fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x00 4. " MSTKERR ,Stacking Access Violations" "Not occurred,Occurred" textline " " bitfld.byte 0x00 3. " MUNSTKERR ,Unstacking Access Violations" "Not occurred,Occurred" bitfld.byte 0x00 1. " DACCVIOL ,Data Access Violation" "Not occurred,Occurred" bitfld.byte 0x00 0. " IACCVIOL ,Instruction Access Violation" "Not occurred,Occurred" line.byte 0x01 "BFSR,Bus Fault Status Register" bitfld.byte 0x01 7. " BFARVALID ,Address Valid Flag" "Not valid,Valid" bitfld.byte 0x01 5. " LSPERR ,A bus fault occurred during FP lazy state preservation" "Not occurred,Occurred" bitfld.byte 0x01 4. " STKERR ,Derived bus fault (exception entry)" "Not occurred,Occurred" textline " " bitfld.byte 0x01 3. " UNSTKERR ,Derived bus fault (exception return)" "Not occurred,Occurred" bitfld.byte 0x01 2. " IMPRECISERR ,Imprecise data access error" "Not occurred,Occurred" bitfld.byte 0x01 1. " PRECISERR ,Precise data access error" "Not occurred,Occurred" textline " " bitfld.byte 0x01 0. " IBUSERR ,Bus fault on an instruction prefetch" "Not occurred,Occurred" group.word 0xD2A++0x1 line.word 0x00 "UFSR,Usage Fault Status Register" eventfld.word 0x00 9. " DIVBYZERO ,Divide by zero error" "No error,Error" eventfld.word 0x00 8. " UNALIGNED ,Unaligned access error" "No error,Error" eventfld.word 0x00 4. " STKOF ,Stack overflow error" "No error,Error" textline " " eventfld.word 0x00 3. " NOCP ,A coprocessor access error" "No error,Error" eventfld.word 0x00 2. " INVPC ,An integrity check error" "No error,Error" eventfld.word 0x00 1. " INVSTATE , Invalid Combination of EPSR and Instruction" "No error,Error" textline " " eventfld.word 0x00 0. " UNDEFINSTR ,Undefined instruction error" "No error,Error" group.long 0xD2C++0x03 line.long 0x00 "HFSR,HardFault Status Register" bitfld.long 0x00 31. " DEBUGEVT ,Indicates when a Debug event has occurred" "Not occurred,Occurred" bitfld.long 0x00 30. " FORCED ,Indicates that a fault with configurable priority has been escalated to a HardFault exception" "Not occurred,Occurred" bitfld.long 0x00 1. " VECTTBL ,Indicates when a fault has occurred because of a vector table read error on exception processing" "Not occurred,Occurred" group.long 0xD34++0x0B line.long 0x00 "MMFAR,MemManage Fault Address Register" line.long 0x04 "BFAR,BusFault Address Register" line.long 0x08 "AFSR,Auxiliary Fault Status Register" group.long 0xD88++0x03 line.long 0x00 "CPACR,Coprocessor Access Control Register" bitfld.long 0x00 20.--21. " CP10 ,Access privileges for coprocessor 10" "Denied,Privileged,,Full" bitfld.long 0x00 14.--15. " CP7 ,Access privileges for coprocessor 7" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 12.--13. " CP6 ,Access privileges for coprocessor 6" "Denied,Privileged,,Full" bitfld.long 0x00 10.--11. " CP5 ,Access privileges for coprocessor 5" "Denied,Privileged,,Full" bitfld.long 0x00 8.--9. " CP4 ,Access privileges for coprocessor 4" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 6.--7. " CP3 ,Access privileges for coprocessor 3" "Denied,Privileged,,Full" bitfld.long 0x00 4.--5. " CP2 ,Access privileges for coprocessor 2" "Denied,Privileged,,Full" bitfld.long 0x00 2.--3. " CP1 ,Access privileges for coprocessor 1" "Denied,Privileged,,Full" textline " " bitfld.long 0x00 0.--1. " CP0 ,Access privileges for coprocessor 0" "Denied,Privileged,,Full" if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD48) group.long 0xD8C++0x03 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 11. " CP11 ,Enables Non-secure access to coprocessor CP11" "Disabled,Enabled" bitfld.long 0x00 10. " CP10 ,Enables Non-secure access to coprocessor CP10" "Disabled,Enabled" bitfld.long 0x00 7. " CP7 ,Enables Non-secure access to coprocessor CP7" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CP6 ,Enables Non-secure access to coprocessor CP6" "Disabled,Enabled" bitfld.long 0x00 5. " CP5 ,Enables Non-secure access to coprocessor CP5" "Disabled,Enabled" bitfld.long 0x00 4. " CP4 ,Enables Non-secure access to coprocessor CP4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CP3 ,Enables Non-secure access to coprocessor CP3" "Disabled,Enabled" bitfld.long 0x00 2. " CP2 ,Enables Non-secure access to coprocessor CP2" "Disabled,Enabled" bitfld.long 0x00 1. " CP1 ,Enables Non-secure access to coprocessor CP1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CP0 ,Enables Non-secure access to coprocessor CP0" "Disabled,Enabled" else hgroup.long 0xD8C++0x03 hide.long 0x00 "NSACR,Non-Secure Access Control Register (not accessible)" endif wgroup.long 0xF00++0x03 line.long 0x00 "STIR,Software Triggered Interrupt Register" hexmask.long.word 0x00 0.--8. 1. " INTID ,Indicates the interrupt to be pended" tree "Memory System" width 10. rgroup.long 0xD78++0x03 line.long 0x00 "CLIDR,Cache Level ID Register" bitfld.long 0x00 30.--31. " ICB ,Inner cache boundary" "Not disclosed,L1 cache highest,L2 cache highest,L3 cache highest" bitfld.long 0x00 27.--29. " LOU ,LOUU" "Level 1,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Level 1,Level 2,?..." textline " " bitfld.long 0x00 18.--20. " CL7 ,Cache type field level 7" "No cache,Instr. only,Data only,Data and Instr.,Unified cache,?..." bitfld.long 0x00 15.--17. " CL6 ,Cache type field level 6" "No cache,?..." bitfld.long 0x00 12.--14. " CL5 ,Cache type field level 5" "No cache,?..." textline " " bitfld.long 0x00 9.--11. " CL4 ,Cache type field level 4" "No cache,?..." bitfld.long 0x00 6.--8. " CL3 ,Cache type field level 3" "No cache,?..." bitfld.long 0x00 3.--5. " CL2 ,Cache type field level 2" "No cache,?..." textline " " bitfld.long 0x00 0.--2. " CL1 ,Cache type field level 1" "No cache,Instr. only,Data only,Data and Instr.,?..." if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD7C)&0xE0000000)==0x80000000) rgroup.long 0xD7C++0x03 line.long 0x00 "CTR,Cache Type Register" bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..." bitfld.long 0x00 24.--27. " CWG ,Cache Write-back Granule" "0,1,2,3,4,5,6,7,8,9,?..." bitfld.long 0x00 20.--23. " ERG ,Exclusives Reservation Granule" "0,1,2,3,4,5,6,7,8,9,?..." textline " " bitfld.long 0x00 16.--19. " DMINLINE ,Log 2 of the number of words in the smallest cache line of all the data caches and unified caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " IMINLINE ,Log 2 of the number of words in the smallest cache line of all the instruction caches that are controlled by the processor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else rgroup.long 0xD7C++0x03 line.long 0x00 "CTR,Cache Type Register" bitfld.long 0x00 29.--31. " FORMAT ,Indicates the implemented CTR format" "No Cache,,,,Cache,?..." endif rgroup.long 0xD80++0x03 line.long 0x00 "CCSIDR,Cache Size ID Register" bitfld.long 0x00 31. " WT ,Indicates support available for Write-Through" "Not supported,Supported" bitfld.long 0x00 30. " WB ,Indicates support available for Write-Back" "Not supported,Supported" bitfld.long 0x00 29. " RA ,Indicates support available for read allocation" "Not supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Indicates support available for write allocation" "Not supported,Supported" hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Indicates the number of sets as (number of sets) - 1" hexmask.long.word 0x00 3.--12. 1. " ASSOCIATIVITY ,Indicates the number of ways as (number of ways) - 1" textline " " bitfld.long 0x00 0.--2. " LINESIZE ,Indicates the number of words in each cache line" "4,8,16,32,64,128,256,512" group.long 0xD84++0x03 line.long 0x00 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Identifies which cache level to select" "Level 1,Level 2,Level 3,Level 4,Level 5,Level 6,Level 7,?..." bitfld.long 0x00 0. " IND ,Identifies instruction or data cache to use" "Data/Unified,Instruction" wgroup.long 0xF50++0x03 line.long 0x00 "ICIALLU,I-Cache Invalidate All to PoU" wgroup.long 0xF58++0x23 line.long 0x00 "ICIMVAU,I-Cache Invalidate by MVA to PoU" line.long 0x04 "DCIMVAC,D-Cache Invalidate by MVA to PoC" line.long 0x08 "DCISW,D-Cache Invalidate by Set-Way" hexmask.long 0x08 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x08 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x0C "DCCMVAU,D-Cache Clean by MVA to PoU" line.long 0x10 "DCCMVAC,D-Cache Clean by MVA to PoC" line.long 0x14 "DCCSW,D-Cache Clean by Set-Way" hexmask.long 0x14 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x14 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x18 "DCCIMVAC,D-Cache Clean and Invalidate by MVA to PoC" line.long 0x1C "DCCISW,D-Cache Clean and Invalidate by Set-Way" hexmask.long 0x1C 4.--31. 1. " SETWAY ,Defines number of the way to operate on and number of the set to operate on" bitfld.long 0x1C 1.--3. " LEVEL ,Cache level to operate on, minus" "L1,L2,L3,L4,L5,L6,L7,L8" line.long 0x20 "BPIALL,Branch Predictor Invalidate All" tree.end tree "Feature Registers" width 10. rgroup.long 0xD40++0x0B line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 4.--7. " STATE1 ,T32 instruction set support" ",,,Supported,?..." bitfld.long 0x00 0.--3. " STATE0 ,ARM instruction set support" "Not supported,?..." line.long 0x04 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x04 8.--11. " MPROF ,M profile programmers' model" ",,2-stack,?..." bitfld.long 0x04 4.--7. " SECURITY ,Security support" "Not implemented,Implemented,?..." line.long 0x08 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x08 20.--23. " MPROFDBG ,M-profile debug. Indicates the supported M-profile debug architecture" "Not supported,ARMv8-M Debug architecture,?..." rgroup.long 0xD4C++0x03 line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0" rgroup.long 0xD50++0x03 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 20.--23. " AUXREG ,Indicates the support for Auxiliary registers" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TCM ,Indicates the support for Tightly Coupled Memory (TCM)" "Not supported,Supported,?..." bitfld.long 0x00 12.--15. " SHRLEV ,Indicates the number of shareability levels implemented" "1 level,2 levels,?..." textline " " bitfld.long 0x00 8.--11. " OUTMSHR ,Indicates the outermost shareability domain implemented" "Non-cacheable,HW coherency,,,,,,,,,,,,,,Ignored" bitfld.long 0x00 4.--7. " PMSASUP ,Indicates support for a PMSA" "Not supported,,,,PMSAv8,?..." rgroup.long 0xD54++0x03 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" rgroup.long 0xD58++0x03 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 24.--27. " WFISTALL ,Indicates the support for Wait For Interrupt (WFI) stalling" "Not supported,Supported,?..." rgroup.long 0xD5C++0x03 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 8.--11. " BPMAINT ,Indicates the supported branch predictor maintenance" "Not supported,Supported,?..." bitfld.long 0x00 4.--7. " CMAINTSW ,Indicates the supported cache maintenance operations by set/way" "Not supported,Supported,?..." bitfld.long 0x00 0.--3. " CMAINTVA ,Indicates the supported cache maintenance operations by virtual-address" "Not supported,Supported,?..." rgroup.long 0xD60++0x03 line.long 0x00 "ID_ISAR0,Instruction Set Attributes Register 0" bitfld.long 0x00 24.--27. " DIVIDE ,Indicates the supported divide instructions" "Not supported,SDIV/UDIV,?..." bitfld.long 0x00 20.--23. " DEBUG ,Indicates the supported debug instructions" "Not supported,BKPT,?..." bitfld.long 0x00 16.--19. " COPROC ,Indicates the supported coprocessor instructions" "Not supported,Supported,?..." textline " " bitfld.long 0x00 12.--15. " CMPBRANCH ,Indicates the supported combined compare and branch instructions" "Not supported,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BITFIELD ,Indicates the supported bitfield instructions" "Not supported,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BITCOUNT ,Indicates the supported bit counting instructions" "Not supported,CLZ,?..." rgroup.long 0xD64++0x03 line.long 0x00 "ID_ISAR1,Instruction Set Attributes Register 1" bitfld.long 0x00 24.--27. " INTERWORK ,Indicates the supported Interworking instructions" "Not supported,BX,BX/BLX,?..." bitfld.long 0x00 20.--23. " IMMEDIATE ,Indicates the support for data-processing instructions with long immediates" "Not supported,ADDW/MOVW/MOVT/SUBW,?..." bitfld.long 0x00 16.--19. " IFTHEN ,Indicates the supported IfThen instructions" "Not supported,IT,?..." textline " " bitfld.long 0x00 12.--15. " EXTEND ,Indicates the supported Extend instructions" "Not supported,Basic,Extended,?..." rgroup.long 0xD68++0x03 line.long 0x00 "ID_ISAR2,Instruction Set Attributes Register 2" bitfld.long 0x00 28.--31. " REVERSAL ,Indicates the supported reversal instructions" "Not supported,REV/REV16/REVSH,REV/REV16/REVSH/RBIT,?..." bitfld.long 0x00 20.--23. " MULTU ,Indicates the supported advanced unsigned multiply instructions" "Not supported,UMULL/UMLAL,UMULL/UMLAL/UMAAL,?..." bitfld.long 0x00 16.--19. " MULTS ,Indicates the supported advanced signed multiply instructions" "Not supported,SMULL/SMLAL,,SMULL/SMLAL/DSP,?..." textline " " bitfld.long 0x00 12.--15. " MULT ,Indicates the supported additional multiply instructions" "Not supported,MUL,MUL/MLA/MLS,?..." bitfld.long 0x00 8.--11. " MULTIACCESSINT ,Indicates the support for multi-access interruptible instructions" "Not supported,LDM/STM restartable,LDM/STM continuable,?..." bitfld.long 0x00 4.--7. " MEMHINT ,Indicates the supported memory hint instructions" "Not supported,,,PLD/PLI,?..." textline " " bitfld.long 0x00 0.--3. " LOADSTORE ,Indicates the supported additional load and store instructions" "Not supported,,Load-acquire/Store-release/Exclusive,?..." rgroup.long 0xD6C++0x03 line.long 0x00 "ID_ISAR3,Instruction Set Attributes Register 3" bitfld.long 0x00 24.--27. " TRUENOP ,Indicates the support for a true NOP instruction" "Not supported,Supported,?..." bitfld.long 0x00 20.--23. " THUMBCOPY ,Indicates the supported non flag-setting MOV instructions" "Not supported,Supported,?..." bitfld.long 0x00 16.--19. " TABBRANCH ,Indicates the supported Table Branch instructions" "Not supported,TBB/TBH,?..." textline " " bitfld.long 0x00 12.--15. " SYNCHPRIM ,Indicates the supported Table Branch instructions" "Not supported,Supported,?..." bitfld.long 0x00 8.--11. " SVC ,Indicates the supported SVC instructions" "Not supported,SVC,?..." bitfld.long 0x00 4.--7. " SIMD ,Indicates the supported SIMD instructions" "Not supported,Supported,,Extended,?..." textline " " bitfld.long 0x00 0.--3. " SATURATE ,Indicates the supported Saturate instructions" "Not supported,QADD/QDADD/QDSUB/QSUB/Q-bit,?..." rgroup.long 0xD70++0x03 line.long 0x00 "ID_ISAR4,Instruction Set Attributes Register 4" bitfld.long 0x00 24.--27. " PSR_M ,Indicates the supported M profile instructions to modify the PSRs" "Not supported,CPS/MRS/MSR,?..." bitfld.long 0x00 20.--23. " SYNCHPRIMFRAC ,Indicates the supported M profile instructions to modify the PSRs" ",,,Supported,?..." bitfld.long 0x00 16.--19. " BARRIER ,Indicates the supported Barrier instructions" "Not supported,,,DMB/DSB/ISB,?..." textline " " bitfld.long 0x00 8.--11. " WRITEBACK ,Indicates the support for writeback addressing modes" "Basic support,Full support,?..." bitfld.long 0x00 4.--7. " WITHSHIFTS ,Indicates the support for instructions with shifts" "MOV/shift,,,Load/store,?..." bitfld.long 0x00 0.--3. " UNPRIV ,Indicates the supported unprivileged instructions" "Not supported,LDRBT/LDRT/STRBT/STRT,?..." tree.end tree "CoreSight Identification Registers" base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 11. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "DDEVARCH,SCS CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFE0++0x0F line.long 0x00 "DPIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "DPIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "DPIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "DPIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "PID4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "DCIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DCIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "DCIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "DCIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Memory Protection Unit (MPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. rgroup.long 0xD90++0x03 line.long 0x00 "MPU_TYPE,MPU Type Register" bitfld.long 0x00 8.--15. " DREGION ,Number of regions supported by the MPU" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..." bitfld.long 0x00 0. " SEPARATE ,Indicates support for separate instruction and data address maps" "Not supported,?..." group.long 0xD94++0x03 line.long 0x00 "MPU_CTRL,MPU Control Register" bitfld.long 0x00 2. " PRIVDEFENA ,Enables the default memory map as a background region for privileged access" "Disabled,Enabled" bitfld.long 0x00 1. " HFNMIENA ,Handlers executing with priority less than 0 access memory with the MPU enabled or with the MPU disabled" "MPU disabled,MPU enabled" bitfld.long 0x00 0. " ENABLE ,Enables the MPU" "Disabled,Enabled" group.long 0xD98++0x03 line.long 0x00 "MPU_RNR,MPU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " REGION ,Indicates the memory region accessed by MPU_RBAR and MPU_RASR" tree.close "MPU regions" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x0 group.long 0xD9C++0x03 "Region 0" saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x0 line.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 0 (not implemented)" saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RBAR0,MPU Region Base Address Register 0" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x0 hide.long 0x00 "MPU_RLAR0,MPU Region Attribute and Size Register 0" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x1 group.long 0xD9C++0x03 "Region 1" saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x1 line.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 1 (not implemented)" saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RBAR1,MPU Region Base Address Register 1" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x1 hide.long 0x00 "MPU_RLAR1,MPU Region Attribute and Size Register 1" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x2 group.long 0xD9C++0x03 "Region 2" saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x2 line.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 2 (not implemented)" saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RBAR2,MPU Region Base Address Register 2" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x2 hide.long 0x00 "MPU_RLAR2,MPU Region Attribute and Size Register 2" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x3 group.long 0xD9C++0x03 "Region 3" saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x3 line.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 3 (not implemented)" saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RBAR3,MPU Region Base Address Register 3" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x3 hide.long 0x00 "MPU_RLAR3,MPU Region Attribute and Size Register 3" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x4 group.long 0xD9C++0x03 "Region 4" saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x4 line.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 4 (not implemented)" saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RBAR4,MPU Region Base Address Register 4" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x4 hide.long 0x00 "MPU_RLAR4,MPU Region Attribute and Size Register 4" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x5 group.long 0xD9C++0x03 "Region 5" saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x5 line.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 5 (not implemented)" saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RBAR5,MPU Region Base Address Register 5" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x5 hide.long 0x00 "MPU_RLAR5,MPU Region Attribute and Size Register 5" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x6 group.long 0xD9C++0x03 "Region 6" saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x6 line.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 6 (not implemented)" saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RBAR6,MPU Region Base Address Register 6" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x6 hide.long 0x00 "MPU_RLAR6,MPU Region Attribute and Size Register 6" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x7 group.long 0xD9C++0x03 "Region 7" saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x7 line.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 7 (not implemented)" saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RBAR7,MPU Region Base Address Register 7" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x7 hide.long 0x00 "MPU_RLAR7,MPU Region Attribute and Size Register 7" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x8 group.long 0xD9C++0x03 "Region 8" saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x8 line.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 8 (not implemented)" saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RBAR8,MPU Region Base Address Register 8" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x8 hide.long 0x00 "MPU_RLAR8,MPU Region Attribute and Size Register 8" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0x9 group.long 0xD9C++0x03 "Region 9" saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0x9 line.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 9 (not implemented)" saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RBAR9,MPU Region Base Address Register 9" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0x9 hide.long 0x00 "MPU_RLAR9,MPU Region Attribute and Size Register 9" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xA group.long 0xD9C++0x03 "Region 10" saveout 0xD98 %l 0xA line.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xA line.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 10 (not implemented)" saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RBAR10,MPU Region Base Address Register 10" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xA hide.long 0x00 "MPU_RLAR10,MPU Region Attribute and Size Register 10" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xB group.long 0xD9C++0x03 "Region 11" saveout 0xD98 %l 0xB line.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xB line.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 11 (not implemented)" saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RBAR11,MPU Region Base Address Register 11" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xB hide.long 0x00 "MPU_RLAR11,MPU Region Attribute and Size Register 11" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xC group.long 0xD9C++0x03 "Region 12" saveout 0xD98 %l 0xC line.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xC line.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 12 (not implemented)" saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RBAR12,MPU Region Base Address Register 12" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xC hide.long 0x00 "MPU_RLAR12,MPU Region Attribute and Size Register 12" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xD group.long 0xD9C++0x03 "Region 13" saveout 0xD98 %l 0xD line.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xD line.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 13 (not implemented)" saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RBAR13,MPU Region Base Address Register 13" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xD hide.long 0x00 "MPU_RLAR13,MPU Region Attribute and Size Register 13" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xE group.long 0xD9C++0x03 "Region 14" saveout 0xD98 %l 0xE line.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xE line.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 14 (not implemented)" saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RBAR14,MPU Region Base Address Register 14" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xE hide.long 0x00 "MPU_RLAR14,MPU Region Attribute and Size Register 14" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xD90)&0xff00)>>8)>0xF group.long 0xD9C++0x03 "Region 15" saveout 0xD98 %l 0xF line.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" bitfld.long 0x00 3.--4. " SH ,Defines the shareability domain of this region for Normal memory" "Non-shareable,,Outer Shareable,Inner Shareable" bitfld.long 0x00 1.--2. " AP ,Defines the access permissions for this region" "R/W privileged,R/W any,RO privileged,RO any" textline " " bitfld.long 0x00 0. " XN ,Defines whether code can be executed from this region" "Execute,Not Execute" group.long 0xDA0++0x03 saveout 0xD98 %l 0xF line.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15" hexmask.long 0x00 5.--31. 0x20 " LIMIT ,Contains bits [31:5] of the upper inclusive limit of the selected MPU memory region" bitfld.long 0x00 1.--3. " ATTRINDX ,Associates a set of attributes in the MPU_MAIR0 and MPU_MAIR1 fields" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" else hgroup.long 0xD9C++0x03 "Region 15 (not implemented)" saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RBAR15,MPU Region Base Address Register 15" textline " " hgroup.long 0xDA0++0x03 saveout 0xD98 %l 0xF hide.long 0x00 "MPU_RLAR15,MPU Region Attribute and Size Register 15" endif tree.end newline group.long 0xDC0++0x07 line.long 0x00 "MPU_MAIR0,MPU Memory Attribute Indirection Register 0" bitfld.long 0x00 28.--31. " ATTR3H ,Attribute 3 High. Outer memory attributes for MPU regions with an AttrIndex of 3" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 24.--27. " ATTR3L ,Attribute 3 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 3 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 20.--23. " ATTR2H ,Attribute 2 High. Outer memory attributes for MPU regions with an AttrIndex of 2" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 16.--19. " ATTR2L ,Attribute 2 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 2 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 12.--15. " ATTR1H ,Attribute 1 High. Outer memory attributes for MPU regions with an AttrIndex of 1" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 8.--11. " ATTR1L ,Attribute 1 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 1 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x00 4.--7. " ATTR0H ,Attribute 0 High. Outer memory attributes for MPU regions with an AttrIndex of 0" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x00 0.--3. " ATTR0L ,Attribute 0 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 0 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" line.long 0x04 "MPU_MAIR1,MPU Memory Attribute Indirection Register 1" bitfld.long 0x04 28.--31. " ATTR7H ,Attribute 7 High. Outer memory attributes for MPU regions with an AttrIndex of 7" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 24.--27. " ATTR7L ,Attribute 7 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 7 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 20.--23. " ATTR6H ,Attribute 6 High. Outer memory attributes for MPU regions with an AttrIndex of 6" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 16.--19. " ATTR6L ,Attribute 6 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 6 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 12.--15. " ATTR5H ,Attribute 5 High. Outer memory attributes for MPU regions with an AttrIndex of 5" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 8.--11. " ATTR5L ,Attribute 5 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 5 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" newline bitfld.long 0x04 4.--7. " ATTR4H ,Attribute 4 High. Outer memory attributes for MPU regions with an AttrIndex of 4" "Device memory,Normal memory/Write-through transient/W-allocate,Normal memory/Write-through transient/R-allocate,Normal memory/Write-through transient/RW-allocate,Normal memory/Non-cacheable,Normal memory/Write-back transient/W-allocate,Normal memory/Write-back transient/R-allocate,Normal memory/Write-back transient/RW-allocate,Normal memory/Write-through non-transient,Normal memory/Write-through non-transient/W-allocate,Normal memory/Write-through non-transient/R-allocate,Normal memory/Write-through non-transient/RW-allocate,Normal memory/Write-back non-transient,Normal memory/Write-back non-transient/W-allocate,Normal memory/Write-back non-transient/R-allocate,Normal memory/Write-back non-transient/RW-allocate" bitfld.long 0x04 0.--3. " ATTR4L ,Attribute 4 Low. Device memory/Inner memory attributes for MPU regions with an AttrIndex of 4 [Device memory/Normal memory]" "Device-nGnRnE/Unpredictable,---/Write-through transient/W-allocate,---/Write-through transient/R-allocate,---/Write-through transient/RW-allocate,Device-nGnRE/Non-cacheable,---/Write-back transient/W-allocate,---/Write-back transient/R-allocate,---/Write-back transient/RW-allocate,Device-nGRE/Write-through non-transient,---/Write-through non-transient/W-allocate,---/Write-through non-transient/R-allocate,---/Write-through non-transient/RW-allocate,Device-GRE/Write-back non-transient,---/Write-back non-transient/W-allocate,---/Write-back non-transient/R-allocate,---/Write-back non-transient/RW-allocate" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Security Attribution Unit (SAU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 15. group.long 0xDD0++0x03 line.long 0x00 "SAU_CTRL,SAU Control Register" bitfld.long 0x00 1. " ALLNS ,When SAU_CTRL.ENABLE is 0 this bit controls if the memory is marked as Non-secure or Secure" "Secure,Non-Secure" bitfld.long 0x00 0. " ENABLE ,Enables the SAU" "Disabled,Enabled" rgroup.long 0xDD4++0x03 line.long 0x00 "SAU_TYPE,SAU Type Register" bitfld.long 0x00 0.--7. " SREGION ,The number of implemented SAU regions" "0,1,2,3,4,5,6,7,8,?..." group.long 0xDD8++0x03 line.long 0x00 "SAU_RNR,SAU Region Number Register" hexmask.long.byte 0x00 0.--7. 1. " SAU_RNR ,Indicates the SAU region accessed by SAU_RBAR and SAU_RLAR" tree.close "SAU regions" if PER.ADDRESS.isSECUREEX(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDD0) if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x0 group.long 0xDDC++0x03 "Region 0" saveout 0xDD8 %l 0x0 line.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 line.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 0 (not implemented)" saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x1 group.long 0xDDC++0x03 "Region 1" saveout 0xDD8 %l 0x1 line.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 line.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 1 (not implemented)" saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x2 group.long 0xDDC++0x03 "Region 2" saveout 0xDD8 %l 0x2 line.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 line.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 2 (not implemented)" saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x3 group.long 0xDDC++0x03 "Region 3" saveout 0xDD8 %l 0x3 line.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 line.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 3 (not implemented)" saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x4 group.long 0xDDC++0x03 "Region 4" saveout 0xDD8 %l 0x4 line.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 line.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 4 (not implemented)" saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x5 group.long 0xDDC++0x03 "Region 5" saveout 0xDD8 %l 0x5 line.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 line.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 5 (not implemented)" saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x6 group.long 0xDDC++0x03 "Region 6" saveout 0xDD8 %l 0x6 line.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 line.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 6 (not implemented)" saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" endif if ((per.l(COMPonent.BASE("COREDEBUG",-1)+0xDD4)&0xFF))>0x7 group.long 0xDDC++0x03 "Region 7" saveout 0xDD8 %l 0x7 line.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hexmask.long 0x00 5.--31. 0x20 " ADDR ,Base address of the region" group.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 line.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" hexmask.long 0x00 5.--31. 0x20 " LADDR ,Holds bits [31:5] of the limit address for the selected SAU region" bitfld.long 0x00 1. " NSC ,Controls whether Non-secure state is permitted to execute an SG instruction from this region" "Not permitted,Permitted" bitfld.long 0x00 0. " ENABLE ,SAU region enable" "Disabled,Enabled" else hgroup.long 0xDDC++0x03 "Region 7 (not implemented)" saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" endif else hgroup.long 0xDDC++0x03 "Region 0 (not accessible)" saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RBAR0,SAU Region Base Address Register 0" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x0 hide.long 0x00 "SAU_RLAR0,SAU Region Limit Address Register 0" hgroup.long 0xDDC++0x03 "Region 1 (not accessible)" saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RBAR1,SAU Region Base Address Register 1" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x1 hide.long 0x00 "SAU_RLAR1,SAU Region Limit Address Register 1" hgroup.long 0xDDC++0x03 "Region 2 (not accessible)" saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RBAR2,SAU Region Base Address Register 2" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x2 hide.long 0x00 "SAU_RLAR2,SAU Region Limit Address Register 2" hgroup.long 0xDDC++0x03 "Region 3 (not accessible)" saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RBAR3,SAU Region Base Address Register 3" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x3 hide.long 0x00 "SAU_RLAR3,SAU Region Limit Address Register 3" hgroup.long 0xDDC++0x03 "Region 4 (not accessible)" saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RBAR4,SAU Region Base Address Register 4" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x4 hide.long 0x00 "SAU_RLAR4,SAU Region Limit Address Register 4" hgroup.long 0xDDC++0x03 "Region 5 (not accessible)" saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RBAR5,SAU Region Base Address Register 5" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x5 hide.long 0x00 "SAU_RLAR5,SAU Region Limit Address Register 5" hgroup.long 0xDDC++0x03 "Region 6 (not accessible)" saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RBAR6,SAU Region Base Address Register 6" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x6 hide.long 0x00 "SAU_RLAR6,SAU Region Limit Address Register 6" hgroup.long 0xDDC++0x03 "Region 7 (not accessible)" saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RBAR7,SAU Region Base Address Register 7" hgroup.long 0xDE0++0x03 saveout 0xDD8 %l 0x7 hide.long 0x00 "SAU_RLAR7,SAU Region Limit Address Register 7" endif tree.end group.long 0xDE4++0x03 line.long 0x00 "SFSR,Secure Fault Status Register" bitfld.long 0x00 7. " LSERR ,Lazy state error flag" "Not occurred,Occurred" bitfld.long 0x00 6. " SFARVALID ,Secure fault address valid" "Not valid,Valid" bitfld.long 0x00 5. " LSPERR ,Lazy state preservation error flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 4. " INVTRAN ,Invalid transition flag" "Not occurred,Occurred" bitfld.long 0x00 3. " AUVIOL ,Attribution unit violation flag" "Not occurred,Occurred" bitfld.long 0x00 2. " INVER ,Invalid exception return flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 1. " INVIS ,Invalid integrity signature flag" "Not occurred,Occurred" bitfld.long 0x00 0. " INVEP ,Invalid entry point" "Not occurred,Occurred" group.long 0xDE8++0x03 line.long 0x00 "SFAR,Secure Fault Address Register" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Nested Vectored Interrupt Controller (NVIC)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 6. group.long 0x04++0x03 line.long 0x00 "ICTR,Interrupt Controller Type Register" bitfld.long 0x00 0.--3. " INTLINESNUM ,Total Number of Interrupt" "0-32,0-64,0-96,0-128,0-160,0-192,0-224,0-255,0-287,0-319,0-351,0-383,0-415,0-447,0-479,0-511" width 24. tree "Interrupt Enable Registers" group.long 0x100++0x03 line.long 0x00 "IRQ0_31_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA31 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA30 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA29 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA28 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA27 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA26 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA25 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA24 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA23 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA22 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA21 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA20 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA19 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA18 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA17 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA16 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA15 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA14 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA13 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA12 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA11 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA10 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA9 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA8 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA7 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA6 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA5 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA4 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA3 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA2 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA1 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA0 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x104++0x03 line.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA63 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA62 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA61 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA60 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA59 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA58 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA57 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA56 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA55 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA54 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA53 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA52 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA51 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA50 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA49 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA48 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA47 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA46 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA45 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA44 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA43 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA42 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA41 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA40 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA39 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA38 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA37 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA36 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA35 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA34 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA33 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA32 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x104++0x03 hide.long 0x00 "IRQ32_63_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x108++0x03 line.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA95 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA94 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA93 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA92 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA91 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA90 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA89 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA88 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA87 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA86 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA85 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA84 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA83 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA82 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA81 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA80 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA79 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA78 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA77 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA76 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA75 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA74 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA73 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA72 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA71 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA70 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA69 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA68 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA67 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA66 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA65 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA64 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x108++0x03 hide.long 0x00 "IRQ64_95_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x10C++0x03 line.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA127 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA126 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA125 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA124 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA123 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA122 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA121 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA120 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA119 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA118 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA117 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA116 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA115 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA114 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA113 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA112 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA111 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA110 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA109 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA108 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA107 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA106 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA105 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA104 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA103 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA102 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA101 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA100 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA99 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA98 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA97 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA96 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x10C++0x03 hide.long 0x00 "IRQ96_127_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x110++0x03 line.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA159 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA158 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA157 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA156 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA155 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA154 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA153 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA152 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA151 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA150 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA149 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA148 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA147 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA146 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA145 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA144 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA143 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA142 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA141 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA140 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA139 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA138 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA137 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA136 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA135 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA134 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA133 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA132 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA131 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA130 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA129 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA128 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x110++0x03 hide.long 0x00 "IRQ128_159_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x114++0x03 line.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA191 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA190 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA189 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA188 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA187 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA186 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA185 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA184 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA183 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA182 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA181 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA180 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA179 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA178 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA177 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA176 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA175 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA174 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA173 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA172 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA171 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA170 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA169 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA168 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA167 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA166 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA165 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA164 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA163 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA162 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA161 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA160 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x114++0x03 hide.long 0x00 "IRQ160_191_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x118++0x03 line.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA223 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA222 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA221 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA220 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA219 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA218 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA217 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA216 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA215 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA214 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA213 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA212 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA211 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA210 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA209 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA208 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA207 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA206 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA205 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA204 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA203 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA202 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA201 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA200 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA199 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA198 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA197 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA196 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA195 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA194 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA193 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA192 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x118++0x03 hide.long 0x00 "IRQ192_223_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x11C++0x03 line.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA255 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA254 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA253 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA252 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA251 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA250 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA249 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA248 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA247 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA246 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA245 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA244 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA243 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA242 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA241 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA240 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA239 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA238 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA237 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA236 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA235 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA234 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA233 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA232 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA231 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA230 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA229 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA228 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA227 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA226 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA225 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA224 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x11C++0x03 hide.long 0x00 "IRQ224_255_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x120++0x03 line.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA287 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA286 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA285 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA284 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA283 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA282 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA281 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA280 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA279 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA278 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA277 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA276 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA275 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA274 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA273 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA272 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA271 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA270 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA269 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA268 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA267 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA266 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA265 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA264 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA263 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA262 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA261 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA260 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA259 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA258 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA257 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA256 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x120++0x03 hide.long 0x00 "IRQ256_287_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x124++0x03 line.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA319 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA318 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA317 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA316 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA315 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA314 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA313 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA312 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA311 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA310 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA309 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA308 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA307 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA306 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA305 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA304 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA303 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA302 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA301 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA300 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA299 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA298 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA297 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA296 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA295 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA294 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA293 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA292 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA291 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA290 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA289 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA288 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x124++0x03 hide.long 0x00 "IRQ288_319_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x128++0x03 line.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA351 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA350 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA349 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA348 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA347 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA346 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA345 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA344 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA343 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA342 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA341 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA340 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA339 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA338 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA337 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA336 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA335 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA334 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA333 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA332 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA331 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA330 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA329 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA328 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA327 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA326 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA325 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA324 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA323 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA322 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA321 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA320 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x128++0x03 hide.long 0x00 "IRQ320_351_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x12C++0x03 line.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA383 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA382 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA381 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA380 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA379 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA378 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA377 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA376 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA375 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA374 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA373 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA372 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA371 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA370 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA369 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA368 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA367 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA366 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA365 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA364 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA363 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA362 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA361 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA360 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA359 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA358 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA357 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA356 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA355 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA354 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA353 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA352 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x12C++0x03 hide.long 0x00 "IRQ352_383_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x130++0x03 line.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA415 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA414 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA413 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA412 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA411 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA410 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA409 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA408 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA407 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA406 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA405 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA404 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA403 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA402 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA401 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA400 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA399 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA398 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA397 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA396 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA395 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA394 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA393 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA392 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA391 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA390 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA389 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA388 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA387 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA386 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA385 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA384 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x130++0x03 hide.long 0x00 "IRQ384_415_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x134++0x03 line.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA447 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA446 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA445 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA444 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA443 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA442 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA441 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA440 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA439 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA438 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA437 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA436 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA435 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA434 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA433 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA432 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA431 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA430 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA429 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA428 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA427 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA426 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA425 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA424 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA423 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA422 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA421 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA420 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA419 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA418 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA417 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA416 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x134++0x03 hide.long 0x00 "IRQ416_447_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x138++0x03 line.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA479 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA478 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA477 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA476 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA475 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA474 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA473 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA472 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA471 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA470 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA469 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA468 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA467 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA466 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA465 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA464 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA463 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA462 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA461 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA460 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA459 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA458 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA457 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA456 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA455 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA454 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA453 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA452 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA451 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA450 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA449 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA448 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x138++0x03 hide.long 0x00 "IRQ448_479_EN_SET/CLR,Interrupt Enable Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) group.long 0x13C++0x03 line.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " ENA511 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " ENA510 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " ENA509 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " ENA508 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " ENA507 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " ENA506 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " ENA505 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " ENA504 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " ENA503 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " ENA502 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " ENA501 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " ENA500 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " ENA499 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " ENA498 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " ENA497 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " ENA496 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " ENA495 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " ENA494 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " ENA493 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " ENA492 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " ENA491 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " ENA490 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " ENA489 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " ENA488 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " ENA487 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " ENA486 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " ENA485 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " ENA484 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " ENA483 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " ENA482 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " ENA481 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " ENA480 ,Interrupt Set/Clear Enable Bit" "Disabled,Enabled" else hgroup.long 0x13C++0x03 hide.long 0x00 "IRQ480_511_EN_SET/CLR,Interrupt Enable Register" endif tree.end width 24. tree "Interrupt Pending Registers" group.long 0x200++0x03 line.long 0x00 "IRQ0_31_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN31 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN30 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN29 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN28 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN27 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN26 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN25 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN24 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN23 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN22 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN21 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN20 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN19 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN18 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN17 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN16 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN15 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN14 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN13 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN12 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN11 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN10 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN9 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN8 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN7 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN6 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN5 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN4 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN3 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN2 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN1 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN0 ,Interrupt Set/Clear Pending" "Not pending,Pending" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x204++0x03 line.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN63 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN62 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN61 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN60 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN59 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN58 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN57 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN56 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN55 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN54 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN53 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN52 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN51 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN50 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN49 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN48 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN47 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN46 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN45 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN44 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN43 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN42 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN41 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN40 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN39 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN38 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN37 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN36 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN35 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN34 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN33 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN32 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x204++0x03 hide.long 0x00 "IRQ32_63_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x208++0x03 line.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN95 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN94 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN93 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN92 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN91 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN90 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN89 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN88 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN87 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN86 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN85 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN84 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN83 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN82 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN81 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN80 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN79 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN78 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN77 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN76 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN75 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN74 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN73 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN72 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN71 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN70 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN69 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN68 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN67 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN66 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN65 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN64 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x208++0x03 hide.long 0x00 "IRQ64_95_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x20C++0x03 line.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN127 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN126 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN125 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN124 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN123 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN122 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN121 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN120 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN119 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN118 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN117 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN116 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN115 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN114 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN113 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN112 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN111 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN110 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN109 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN108 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN107 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN106 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN105 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN104 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN103 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN102 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN101 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN100 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN99 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN98 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN97 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN96 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x20C++0x03 hide.long 0x00 "IRQ96_127_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x210++0x03 line.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN159 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN158 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN157 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN156 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN155 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN154 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN153 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN152 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN151 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN150 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN149 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN148 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN147 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN146 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN145 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN144 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN143 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN142 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN141 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN140 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN139 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN138 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN137 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN136 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN135 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN134 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN133 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN132 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN131 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN130 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN129 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN128 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x210++0x03 hide.long 0x00 "IRQ128_159_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x214++0x03 line.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN191 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN190 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN189 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN188 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN187 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN186 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN185 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN184 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN183 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN182 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN181 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN180 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN179 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN178 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN177 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN176 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN175 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN174 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN173 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN172 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN171 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN170 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN169 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN168 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN167 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN166 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN165 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN164 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN163 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN162 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN161 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN160 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x214++0x03 hide.long 0x00 "IRQ160_191_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x218++0x03 line.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN223 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN222 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN221 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN220 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN219 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN218 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN217 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN216 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN215 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN214 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN213 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN212 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN211 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN210 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN209 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN208 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN207 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN206 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN205 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN204 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN203 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN202 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN201 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN200 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN199 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN198 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN197 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN196 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN195 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN194 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN193 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN192 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x218++0x03 hide.long 0x00 "IRQ192_223_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x21C++0x03 line.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN255 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN254 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN253 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN252 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN251 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN250 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN249 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN248 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN247 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN246 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN245 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN244 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN243 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN242 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN241 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN240 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN239 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN238 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN237 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN236 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN235 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN234 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN233 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN232 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN231 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN230 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN229 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN228 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN227 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN226 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN225 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN224 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x21C++0x03 hide.long 0x00 "IRQ224_255_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x220++0x03 line.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN287 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN286 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN285 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN284 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN283 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN282 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN281 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN280 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN279 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN278 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN277 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN276 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN275 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN274 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN273 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN272 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN271 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN270 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN269 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN268 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN267 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN266 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN265 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN264 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN263 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN262 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN261 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN260 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN259 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN258 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN257 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN256 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x220++0x03 hide.long 0x00 "IRQ256_287_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x224++0x03 line.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN319 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN318 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN317 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN316 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN315 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN314 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN313 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN312 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN311 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN310 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN309 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN308 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN307 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN306 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN305 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN304 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN303 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN302 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN301 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN300 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN299 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN298 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN297 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN296 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN295 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN294 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN293 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN292 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN291 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN290 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN289 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN288 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x224++0x03 hide.long 0x00 "IRQ288_319_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x228++0x03 line.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN351 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN350 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN349 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN348 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN347 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN346 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN345 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN344 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN343 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN342 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN341 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN340 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN339 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN338 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN337 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN336 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN335 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN334 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN333 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN332 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN331 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN330 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN329 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN328 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN327 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN326 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN325 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN324 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN323 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN322 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN321 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN320 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x228++0x03 hide.long 0x00 "IRQ320_351_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x22C++0x03 line.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN383 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN382 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN381 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN380 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN379 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN378 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN377 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN376 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN375 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN374 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN373 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN372 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN371 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN370 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN369 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN368 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN367 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN366 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN365 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN364 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN363 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN362 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN361 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN360 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN359 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN358 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN357 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN356 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN355 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN354 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN353 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN352 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x22C++0x03 hide.long 0x00 "IRQ352_383_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x230++0x03 line.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN415 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN414 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN413 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN412 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN411 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN410 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN409 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN408 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN407 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN406 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN405 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN404 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN403 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN402 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN401 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN400 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN399 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN398 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN397 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN396 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN395 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN394 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN393 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN392 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN391 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN390 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN389 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN388 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN387 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN386 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN385 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN384 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x230++0x03 hide.long 0x00 "IRQ384_415_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x234++0x03 line.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN447 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN446 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN445 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN444 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN443 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN442 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN441 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN440 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN439 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN438 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN437 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN436 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN435 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN434 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN433 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN432 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN431 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN430 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN429 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN428 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN427 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN426 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN425 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN424 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN423 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN422 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN421 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN420 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN419 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN418 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN417 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN416 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x234++0x03 hide.long 0x00 "IRQ416_447_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x238++0x03 line.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN479 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN478 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN477 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN476 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN475 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN474 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN473 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN472 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN471 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN470 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN469 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN468 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN467 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN466 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN465 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN464 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN463 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN462 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN461 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN460 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN459 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN458 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN457 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN456 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN455 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN454 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN453 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN452 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN451 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN450 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN449 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN448 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x238++0x03 hide.long 0x00 "IRQ448_479_PEN_SET/CLR,Interrupt Pending Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) group.long 0x23C++0x03 line.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " PEN511 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " PEN510 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " PEN509 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 28. 0x00 28. 0x80 28. " PEN508 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " PEN507 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " PEN506 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " PEN505 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " PEN504 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " PEN503 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 22. 0x00 22. 0x80 22. " PEN502 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " PEN501 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " PEN500 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " PEN499 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " PEN498 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " PEN497 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 16. 0x00 16. 0x80 16. " PEN496 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " PEN495 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " PEN494 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " PEN493 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " PEN492 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " PEN491 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 10. 0x00 10. 0x80 10. " PEN490 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " PEN489 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " PEN488 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " PEN487 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " PEN486 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " PEN485 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 4. 0x00 4. 0x80 4. " PEN484 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " PEN483 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " PEN482 ,Interrupt Set/Clear Pending" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " PEN481 ,Interrupt Set/Clear Pending" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " PEN480 ,Interrupt Set/Clear Pending" "Not pending,Pending" else hgroup.long 0x23C++0x03 hide.long 0x00 "IRQ480_511_PEN_SET/CLR,Interrupt Pending Register" endif tree.end width 11. tree "Interrupt Active Bit Registers" rgroup.long 0x300++0x03 line.long 0x00 "ACTIVE0,Active Bit Register 0" bitfld.long 0x00 31. " ACTIVE31 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE30 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE29 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE28 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE27 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE26 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE25 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE24 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE23 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE22 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE21 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE20 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE19 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE18 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE17 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE16 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE15 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE14 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE13 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE12 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE11 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE10 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE9 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE8 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE7 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE6 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE5 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE4 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE3 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE2 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE1 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE0 ,Interrupt Active Flag" "Not active,Active" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) rgroup.long 0x304++0x03 line.long 0x00 "ACTIVE1,Active Bit Register 1" bitfld.long 0x00 31. " ACTIVE63 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE62 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE61 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE60 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE59 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE58 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE57 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE56 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE55 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE54 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE53 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE52 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE51 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE50 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE49 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE48 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE47 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE46 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE45 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE44 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE43 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE42 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE41 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE40 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE39 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE38 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE37 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE36 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE35 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE34 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE33 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE32 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x304++0x03 hide.long 0x00 "ACTIVE1,Active Bit Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) rgroup.long 0x308++0x03 line.long 0x00 "ACTIVE2,Active Bit Register 2" bitfld.long 0x00 31. " ACTIVE95 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE94 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE93 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE92 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE91 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE90 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE89 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE88 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE87 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE86 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE85 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE84 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE83 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE82 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE81 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE80 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE79 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE78 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE77 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE76 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE75 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE74 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE73 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE72 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE71 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE70 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE69 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE68 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE67 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE66 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE65 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE64 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x308++0x03 hide.long 0x00 "ACTIVE2,Active Bit Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) rgroup.long 0x30C++0x03 line.long 0x00 "ACTIVE3,Active Bit Register 3" bitfld.long 0x00 31. " ACTIVE127 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE126 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE125 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE124 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE123 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE122 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE121 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE120 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE119 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE118 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE117 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE116 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE115 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE114 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE113 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE112 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE111 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE110 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE109 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE108 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE107 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE106 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE105 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE104 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE103 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE102 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE101 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE100 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE99 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE98 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE97 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE96 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x30C++0x03 hide.long 0x00 "ACTIVE3,Active Bit Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) rgroup.long 0x310++0x03 line.long 0x00 "ACTIVE4,Active Bit Register 4" bitfld.long 0x00 31. " ACTIVE159 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE158 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE157 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE156 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE155 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE154 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE153 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE152 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE151 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE150 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE149 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE148 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE147 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE146 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE145 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE144 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE143 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE142 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE141 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE140 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE139 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE138 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE137 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE136 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE135 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE134 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE133 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE132 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE131 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE130 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE129 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE128 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x310++0x03 hide.long 0x00 "ACTIVE4,Active Bit Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) rgroup.long 0x314++0x03 line.long 0x00 "ACTIVE5,Active Bit Register 5" bitfld.long 0x00 31. " ACTIVE191 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE190 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE189 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE188 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE187 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE186 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE185 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE184 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE183 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE182 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE181 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE180 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE179 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE178 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE177 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE176 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE175 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE174 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE173 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE172 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE171 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE170 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE169 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE168 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE167 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE166 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE165 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE164 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE163 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE162 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE161 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE160 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x314++0x03 hide.long 0x00 "ACTIVE5,Active Bit Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) rgroup.long 0x318++0x03 line.long 0x00 "ACTIVE6,Active Bit Register 6" bitfld.long 0x00 31. " ACTIVE223 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE222 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE221 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE220 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE219 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE218 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE217 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE216 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE215 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE214 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE213 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE212 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE211 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE210 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE209 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE208 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE207 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE206 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE205 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE204 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE203 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE202 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE201 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE200 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE199 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE198 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE197 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE196 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE195 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE194 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE193 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE192 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x318++0x03 hide.long 0x00 "ACTIVE6,Active Bit Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) rgroup.long 0x31C++0x03 line.long 0x00 "ACTIVE7,Active Bit Register 7" bitfld.long 0x00 31. " ACTIVE255 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE254 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE253 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE252 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE251 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE250 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE249 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE248 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE247 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE246 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE245 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE244 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE243 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE242 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE241 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE240 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE239 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE238 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE237 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE236 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE235 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE234 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE233 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE232 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE231 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE230 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE229 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE228 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE227 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE226 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE225 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE224 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x31C++0x03 hide.long 0x00 "ACTIVE7,Active Bit Register 7" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) rgroup.long 0x320++0x03 line.long 0x00 "ACTIVE8,Active Bit Register 8" bitfld.long 0x00 31. " ACTIVE287 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE286 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE285 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE284 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE283 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE282 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE281 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE280 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE279 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE278 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE277 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE276 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE275 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE274 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE273 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE272 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE271 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE270 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE269 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE268 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE267 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE266 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE265 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE264 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE263 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE262 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE261 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE260 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE259 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE258 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE257 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE256 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x320++0x03 hide.long 0x00 "ACTIVE8,Active Bit Register 8" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) rgroup.long 0x324++0x03 line.long 0x00 "ACTIVE9,Active Bit Register 9" bitfld.long 0x00 31. " ACTIVE319 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE318 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE317 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE316 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE315 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE314 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE313 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE312 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE311 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE310 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE309 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE308 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE307 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE306 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE305 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE304 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE303 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE302 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE301 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE300 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE299 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE298 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE297 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE296 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE295 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE294 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE293 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE292 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE291 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE290 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE289 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE288 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x324++0x03 hide.long 0x00 "ACTIVE9,Active Bit Register 9" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) rgroup.long 0x328++0x03 line.long 0x00 "ACTIVE10,Active Bit Register 10" bitfld.long 0x00 31. " ACTIVE351 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE350 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE349 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE348 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE347 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE346 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE345 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE344 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE343 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE342 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE341 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE340 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE339 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE338 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE337 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE336 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE335 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE334 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE333 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE332 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE331 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE330 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE329 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE328 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE327 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE326 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE325 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE324 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE323 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE322 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE321 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE320 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x328++0x03 hide.long 0x00 "ACTIVE10,Active Bit Register 10" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) rgroup.long 0x32C++0x03 line.long 0x00 "ACTIVE11,Active Bit Register 11" bitfld.long 0x00 31. " ACTIVE383 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE382 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE381 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE380 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE379 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE378 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE377 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE376 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE375 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE374 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE373 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE372 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE371 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE370 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE369 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE368 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE367 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE366 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE365 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE364 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE363 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE362 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE361 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE360 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE359 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE358 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE357 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE356 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE355 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE354 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE353 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE352 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x32C++0x03 hide.long 0x00 "ACTIVE11,Active Bit Register 11" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) rgroup.long 0x330++0x03 line.long 0x00 "ACTIVE12,Active Bit Register 12" bitfld.long 0x00 31. " ACTIVE415 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE414 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE413 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE412 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE411 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE410 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE409 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE408 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE407 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE406 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE405 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE404 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE403 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE402 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE401 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE400 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE399 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE398 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE397 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE396 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE395 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE394 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE393 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE392 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE391 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE390 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE389 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE388 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE387 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE386 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE385 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE384 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x330++0x03 hide.long 0x00 "ACTIVE12,Active Bit Register 12" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) rgroup.long 0x334++0x03 line.long 0x00 "ACTIVE13,Active Bit Register 13" bitfld.long 0x00 31. " ACTIVE447 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE446 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE445 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE444 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE443 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE442 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE441 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE440 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE439 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE438 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE437 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE436 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE435 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE434 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE433 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE432 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE431 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE430 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE429 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE428 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE427 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE426 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE425 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE424 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE423 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE422 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE421 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE420 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE419 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE418 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE417 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE416 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x334++0x03 hide.long 0x00 "ACTIVE13,Active Bit Register 13" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) rgroup.long 0x338++0x03 line.long 0x00 "ACTIVE14,Active Bit Register 14" bitfld.long 0x00 31. " ACTIVE479 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE478 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE477 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE476 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE475 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE474 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE473 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE472 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE471 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE470 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE469 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE468 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE467 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE466 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE465 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE464 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE463 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE462 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE461 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE460 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE459 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE458 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE457 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE456 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE455 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE454 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE453 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE452 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE451 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE450 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE449 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE448 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x338++0x03 hide.long 0x00 "ACTIVE14,Active Bit Register 14" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0F) rgroup.long 0x33C++0x03 line.long 0x00 "ACTIVE15,Active Bit Register 15" bitfld.long 0x00 31. " ACTIVE511 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 30. " ACTIVE510 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 29. " ACTIVE509 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 28. " ACTIVE508 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 27. " ACTIVE507 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 26. " ACTIVE506 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 25. " ACTIVE505 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 24. " ACTIVE504 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 23. " ACTIVE503 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 22. " ACTIVE502 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 21. " ACTIVE501 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 20. " ACTIVE500 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 19. " ACTIVE499 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 18. " ACTIVE498 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 17. " ACTIVE497 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 16. " ACTIVE496 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 15. " ACTIVE495 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 14. " ACTIVE494 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 13. " ACTIVE493 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 12. " ACTIVE492 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 11. " ACTIVE491 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 10. " ACTIVE490 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 9. " ACTIVE489 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 8. " ACTIVE488 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 7. " ACTIVE487 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 6. " ACTIVE486 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 5. " ACTIVE485 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 4. " ACTIVE484 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 3. " ACTIVE483 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 2. " ACTIVE482 ,Interrupt Active Flag" "Not active,Active" textline " " bitfld.long 0x00 1. " ACTIVE481 ,Interrupt Active Flag" "Not active,Active" bitfld.long 0x00 0. " ACTIVE480 ,Interrupt Active Flag" "Not active,Active" else hgroup.long 0x33C++0x03 hide.long 0x00 "ACTIVE15,Active Bit Register 15" endif tree.end width 13. tree "Interrupt Target Non-Secure Registers" group.long 0x380++0x03 line.long 0x00 "NVIC_ITNS0,Interrupt Target Non-Secure Register 0" bitfld.long 0x00 31. " ITNS31 ,Interrupt Targets Non-secure 31" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS30 ,Interrupt Targets Non-secure 30" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS29 ,Interrupt Targets Non-secure 29" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS28 ,Interrupt Targets Non-secure 28" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS27 ,Interrupt Targets Non-secure 27" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS26 ,Interrupt Targets Non-secure 26" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS25 ,Interrupt Targets Non-secure 25" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS24 ,Interrupt Targets Non-secure 24" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS23 ,Interrupt Targets Non-secure 23" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS22 ,Interrupt Targets Non-secure 22" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS21 ,Interrupt Targets Non-secure 21" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS20 ,Interrupt Targets Non-secure 20" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS19 ,Interrupt Targets Non-secure 19" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS18 ,Interrupt Targets Non-secure 18" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS17 ,Interrupt Targets Non-secure 17" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS16 ,Interrupt Targets Non-secure 16" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS15 ,Interrupt Targets Non-secure 15" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS14 ,Interrupt Targets Non-secure 14" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS13 ,Interrupt Targets Non-secure 13" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS12 ,Interrupt Targets Non-secure 12" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS11 ,Interrupt Targets Non-secure 11" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS10 ,Interrupt Targets Non-secure 10" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS9 ,Interrupt Targets Non-secure 9" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS8 ,Interrupt Targets Non-secure 8" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS7 ,Interrupt Targets Non-secure 7" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS6 ,Interrupt Targets Non-secure 6" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS5 ,Interrupt Targets Non-secure 5" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS4 ,Interrupt Targets Non-secure 4" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS3 ,Interrupt Targets Non-secure 3" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS2 ,Interrupt Targets Non-secure 2" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS1 ,Interrupt Targets Non-secure 1" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS0 ,Interrupt Targets Non-secure 0" "Secure,Non-secure" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x384++0x03 line.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" bitfld.long 0x00 31. " ITNS63 ,Interrupt Targets Non-secure 63" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS62 ,Interrupt Targets Non-secure 62" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS61 ,Interrupt Targets Non-secure 61" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS60 ,Interrupt Targets Non-secure 60" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS59 ,Interrupt Targets Non-secure 59" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS58 ,Interrupt Targets Non-secure 58" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS57 ,Interrupt Targets Non-secure 57" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS56 ,Interrupt Targets Non-secure 56" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS55 ,Interrupt Targets Non-secure 55" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS54 ,Interrupt Targets Non-secure 54" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS53 ,Interrupt Targets Non-secure 53" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS52 ,Interrupt Targets Non-secure 52" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS51 ,Interrupt Targets Non-secure 51" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS50 ,Interrupt Targets Non-secure 50" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS49 ,Interrupt Targets Non-secure 49" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS48 ,Interrupt Targets Non-secure 48" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS47 ,Interrupt Targets Non-secure 47" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS46 ,Interrupt Targets Non-secure 46" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS45 ,Interrupt Targets Non-secure 45" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS44 ,Interrupt Targets Non-secure 44" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS43 ,Interrupt Targets Non-secure 43" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS42 ,Interrupt Targets Non-secure 42" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS41 ,Interrupt Targets Non-secure 41" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS40 ,Interrupt Targets Non-secure 40" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS39 ,Interrupt Targets Non-secure 39" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS38 ,Interrupt Targets Non-secure 38" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS37 ,Interrupt Targets Non-secure 37" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS36 ,Interrupt Targets Non-secure 36" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS35 ,Interrupt Targets Non-secure 35" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS34 ,Interrupt Targets Non-secure 34" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS33 ,Interrupt Targets Non-secure 33" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS32 ,Interrupt Targets Non-secure 32" "Secure,Non-secure" else hgroup.long 0x384++0x03 hide.long 0x00 "NVIC_ITNS1,Interrupt Target Non-Secure Register 1" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x388++0x03 line.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" bitfld.long 0x00 31. " ITNS95 ,Interrupt Targets Non-secure 95" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS94 ,Interrupt Targets Non-secure 94" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS93 ,Interrupt Targets Non-secure 93" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS92 ,Interrupt Targets Non-secure 92" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS91 ,Interrupt Targets Non-secure 91" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS90 ,Interrupt Targets Non-secure 90" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS89 ,Interrupt Targets Non-secure 89" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS88 ,Interrupt Targets Non-secure 88" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS87 ,Interrupt Targets Non-secure 87" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS86 ,Interrupt Targets Non-secure 86" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS85 ,Interrupt Targets Non-secure 85" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS84 ,Interrupt Targets Non-secure 84" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS83 ,Interrupt Targets Non-secure 83" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS82 ,Interrupt Targets Non-secure 82" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS81 ,Interrupt Targets Non-secure 81" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS80 ,Interrupt Targets Non-secure 80" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS79 ,Interrupt Targets Non-secure 79" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS78 ,Interrupt Targets Non-secure 78" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS77 ,Interrupt Targets Non-secure 77" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS76 ,Interrupt Targets Non-secure 76" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS75 ,Interrupt Targets Non-secure 75" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS74 ,Interrupt Targets Non-secure 74" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS73 ,Interrupt Targets Non-secure 73" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS72 ,Interrupt Targets Non-secure 72" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS71 ,Interrupt Targets Non-secure 71" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS70 ,Interrupt Targets Non-secure 70" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS69 ,Interrupt Targets Non-secure 69" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS68 ,Interrupt Targets Non-secure 68" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS67 ,Interrupt Targets Non-secure 67" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS66 ,Interrupt Targets Non-secure 66" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS65 ,Interrupt Targets Non-secure 65" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS64 ,Interrupt Targets Non-secure 64" "Secure,Non-secure" else hgroup.long 0x388++0x03 hide.long 0x00 "NVIC_ITNS2,Interrupt Target Non-Secure Register 2" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x38C++0x03 line.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" bitfld.long 0x00 31. " ITNS127 ,Interrupt Targets Non-secure 127" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS126 ,Interrupt Targets Non-secure 126" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS125 ,Interrupt Targets Non-secure 125" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS124 ,Interrupt Targets Non-secure 124" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS123 ,Interrupt Targets Non-secure 123" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS122 ,Interrupt Targets Non-secure 122" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS121 ,Interrupt Targets Non-secure 121" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS120 ,Interrupt Targets Non-secure 120" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS119 ,Interrupt Targets Non-secure 119" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS118 ,Interrupt Targets Non-secure 118" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS117 ,Interrupt Targets Non-secure 117" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS116 ,Interrupt Targets Non-secure 116" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS115 ,Interrupt Targets Non-secure 115" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS114 ,Interrupt Targets Non-secure 114" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS113 ,Interrupt Targets Non-secure 113" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS112 ,Interrupt Targets Non-secure 112" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS111 ,Interrupt Targets Non-secure 111" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS110 ,Interrupt Targets Non-secure 110" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS109 ,Interrupt Targets Non-secure 109" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS108 ,Interrupt Targets Non-secure 108" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS107 ,Interrupt Targets Non-secure 107" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS106 ,Interrupt Targets Non-secure 106" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS105 ,Interrupt Targets Non-secure 105" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS104 ,Interrupt Targets Non-secure 104" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS103 ,Interrupt Targets Non-secure 103" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS102 ,Interrupt Targets Non-secure 102" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS101 ,Interrupt Targets Non-secure 101" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS100 ,Interrupt Targets Non-secure 100" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS99 ,Interrupt Targets Non-secure 99" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS98 ,Interrupt Targets Non-secure 98" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS97 ,Interrupt Targets Non-secure 97" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS96 ,Interrupt Targets Non-secure 96" "Secure,Non-secure" else hgroup.long 0x38C++0x03 hide.long 0x00 "NVIC_ITNS3,Interrupt Target Non-Secure Register 3" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x390++0x03 line.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" bitfld.long 0x00 31. " ITNS159 ,Interrupt Targets Non-secure 159" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS158 ,Interrupt Targets Non-secure 158" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS157 ,Interrupt Targets Non-secure 157" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS156 ,Interrupt Targets Non-secure 156" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS155 ,Interrupt Targets Non-secure 155" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS154 ,Interrupt Targets Non-secure 154" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS153 ,Interrupt Targets Non-secure 153" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS152 ,Interrupt Targets Non-secure 152" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS151 ,Interrupt Targets Non-secure 151" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS150 ,Interrupt Targets Non-secure 150" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS149 ,Interrupt Targets Non-secure 149" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS148 ,Interrupt Targets Non-secure 148" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS147 ,Interrupt Targets Non-secure 147" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS146 ,Interrupt Targets Non-secure 146" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS145 ,Interrupt Targets Non-secure 145" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS144 ,Interrupt Targets Non-secure 144" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS143 ,Interrupt Targets Non-secure 143" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS142 ,Interrupt Targets Non-secure 142" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS141 ,Interrupt Targets Non-secure 141" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS140 ,Interrupt Targets Non-secure 140" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS139 ,Interrupt Targets Non-secure 139" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS138 ,Interrupt Targets Non-secure 138" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS137 ,Interrupt Targets Non-secure 137" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS136 ,Interrupt Targets Non-secure 136" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS135 ,Interrupt Targets Non-secure 135" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS134 ,Interrupt Targets Non-secure 134" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS133 ,Interrupt Targets Non-secure 133" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS132 ,Interrupt Targets Non-secure 132" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS131 ,Interrupt Targets Non-secure 131" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS130 ,Interrupt Targets Non-secure 130" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS129 ,Interrupt Targets Non-secure 129" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS128 ,Interrupt Targets Non-secure 128" "Secure,Non-secure" else hgroup.long 0x390++0x03 hide.long 0x00 "NVIC_ITNS4,Interrupt Target Non-Secure Register 4" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x394++0x03 line.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" bitfld.long 0x00 31. " ITNS191 ,Interrupt Targets Non-secure 191" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS190 ,Interrupt Targets Non-secure 190" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS189 ,Interrupt Targets Non-secure 189" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS188 ,Interrupt Targets Non-secure 188" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS187 ,Interrupt Targets Non-secure 187" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS186 ,Interrupt Targets Non-secure 186" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS185 ,Interrupt Targets Non-secure 185" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS184 ,Interrupt Targets Non-secure 184" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS183 ,Interrupt Targets Non-secure 183" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS182 ,Interrupt Targets Non-secure 182" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS181 ,Interrupt Targets Non-secure 181" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS180 ,Interrupt Targets Non-secure 180" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS179 ,Interrupt Targets Non-secure 179" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS178 ,Interrupt Targets Non-secure 178" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS177 ,Interrupt Targets Non-secure 177" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS176 ,Interrupt Targets Non-secure 176" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS175 ,Interrupt Targets Non-secure 175" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS174 ,Interrupt Targets Non-secure 174" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS173 ,Interrupt Targets Non-secure 173" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS172 ,Interrupt Targets Non-secure 172" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS171 ,Interrupt Targets Non-secure 171" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS170 ,Interrupt Targets Non-secure 170" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS169 ,Interrupt Targets Non-secure 169" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS168 ,Interrupt Targets Non-secure 168" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS167 ,Interrupt Targets Non-secure 167" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS166 ,Interrupt Targets Non-secure 166" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS165 ,Interrupt Targets Non-secure 165" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS164 ,Interrupt Targets Non-secure 164" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS163 ,Interrupt Targets Non-secure 163" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS162 ,Interrupt Targets Non-secure 162" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS161 ,Interrupt Targets Non-secure 161" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS160 ,Interrupt Targets Non-secure 160" "Secure,Non-secure" else hgroup.long 0x394++0x03 hide.long 0x00 "NVIC_ITNS5,Interrupt Target Non-Secure Register 5" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x398++0x03 line.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" bitfld.long 0x00 31. " ITNS223 ,Interrupt Targets Non-secure 223" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS222 ,Interrupt Targets Non-secure 222" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS221 ,Interrupt Targets Non-secure 221" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS220 ,Interrupt Targets Non-secure 220" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS219 ,Interrupt Targets Non-secure 219" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS218 ,Interrupt Targets Non-secure 218" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS217 ,Interrupt Targets Non-secure 217" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS216 ,Interrupt Targets Non-secure 216" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS215 ,Interrupt Targets Non-secure 215" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS214 ,Interrupt Targets Non-secure 214" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS213 ,Interrupt Targets Non-secure 213" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS212 ,Interrupt Targets Non-secure 212" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS211 ,Interrupt Targets Non-secure 211" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS210 ,Interrupt Targets Non-secure 210" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS209 ,Interrupt Targets Non-secure 209" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS208 ,Interrupt Targets Non-secure 208" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS207 ,Interrupt Targets Non-secure 207" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS206 ,Interrupt Targets Non-secure 206" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS205 ,Interrupt Targets Non-secure 205" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS204 ,Interrupt Targets Non-secure 204" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS203 ,Interrupt Targets Non-secure 203" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS202 ,Interrupt Targets Non-secure 202" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS201 ,Interrupt Targets Non-secure 201" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS200 ,Interrupt Targets Non-secure 200" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS199 ,Interrupt Targets Non-secure 199" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS198 ,Interrupt Targets Non-secure 198" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS197 ,Interrupt Targets Non-secure 197" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS196 ,Interrupt Targets Non-secure 196" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS195 ,Interrupt Targets Non-secure 195" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS194 ,Interrupt Targets Non-secure 194" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS193 ,Interrupt Targets Non-secure 193" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS192 ,Interrupt Targets Non-secure 192" "Secure,Non-secure" else hgroup.long 0x398++0x03 hide.long 0x00 "NVIC_ITNS6,Interrupt Target Non-Secure Register 6" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x39C++0x03 line.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" bitfld.long 0x00 31. " ITNS255 ,Interrupt Targets Non-secure 255" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS254 ,Interrupt Targets Non-secure 254" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS253 ,Interrupt Targets Non-secure 253" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS252 ,Interrupt Targets Non-secure 252" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS251 ,Interrupt Targets Non-secure 251" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS250 ,Interrupt Targets Non-secure 250" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS249 ,Interrupt Targets Non-secure 249" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS248 ,Interrupt Targets Non-secure 248" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS247 ,Interrupt Targets Non-secure 247" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS246 ,Interrupt Targets Non-secure 246" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS245 ,Interrupt Targets Non-secure 245" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS244 ,Interrupt Targets Non-secure 244" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS243 ,Interrupt Targets Non-secure 243" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS242 ,Interrupt Targets Non-secure 242" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS241 ,Interrupt Targets Non-secure 241" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS240 ,Interrupt Targets Non-secure 240" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS239 ,Interrupt Targets Non-secure 239" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS238 ,Interrupt Targets Non-secure 238" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS237 ,Interrupt Targets Non-secure 237" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS236 ,Interrupt Targets Non-secure 236" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS235 ,Interrupt Targets Non-secure 235" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS234 ,Interrupt Targets Non-secure 234" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS233 ,Interrupt Targets Non-secure 233" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS232 ,Interrupt Targets Non-secure 232" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS231 ,Interrupt Targets Non-secure 231" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS230 ,Interrupt Targets Non-secure 230" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS229 ,Interrupt Targets Non-secure 229" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS228 ,Interrupt Targets Non-secure 228" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS227 ,Interrupt Targets Non-secure 227" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS226 ,Interrupt Targets Non-secure 226" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS225 ,Interrupt Targets Non-secure 225" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS224 ,Interrupt Targets Non-secure 224" "Secure,Non-secure" else hgroup.long 0x39C++0x03 hide.long 0x00 "NVIC_ITNS7,Interrupt Target Non-Secure Register 7" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x3A0++0x03 line.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8" bitfld.long 0x00 31. " ITNS287 ,Interrupt Targets Non-secure 287" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS286 ,Interrupt Targets Non-secure 286" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS285 ,Interrupt Targets Non-secure 285" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS284 ,Interrupt Targets Non-secure 284" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS283 ,Interrupt Targets Non-secure 283" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS282 ,Interrupt Targets Non-secure 282" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS281 ,Interrupt Targets Non-secure 281" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS280 ,Interrupt Targets Non-secure 280" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS279 ,Interrupt Targets Non-secure 279" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS278 ,Interrupt Targets Non-secure 278" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS277 ,Interrupt Targets Non-secure 277" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS276 ,Interrupt Targets Non-secure 276" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS275 ,Interrupt Targets Non-secure 275" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS274 ,Interrupt Targets Non-secure 274" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS273 ,Interrupt Targets Non-secure 273" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS272 ,Interrupt Targets Non-secure 272" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS271 ,Interrupt Targets Non-secure 271" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS270 ,Interrupt Targets Non-secure 270" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS269 ,Interrupt Targets Non-secure 269" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS268 ,Interrupt Targets Non-secure 268" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS267 ,Interrupt Targets Non-secure 267" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS266 ,Interrupt Targets Non-secure 266" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS265 ,Interrupt Targets Non-secure 265" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS264 ,Interrupt Targets Non-secure 264" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS263 ,Interrupt Targets Non-secure 263" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS262 ,Interrupt Targets Non-secure 262" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS261 ,Interrupt Targets Non-secure 261" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS260 ,Interrupt Targets Non-secure 260" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS259 ,Interrupt Targets Non-secure 259" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS258 ,Interrupt Targets Non-secure 258" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS257 ,Interrupt Targets Non-secure 257" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS256 ,Interrupt Targets Non-secure 256" "Secure,Non-secure" else hgroup.long 0x3A0++0x03 hide.long 0x00 "NVIC_ITNS8,Interrupt Target Non-Secure Register 8" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x3A4++0x03 line.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9" bitfld.long 0x00 31. " ITNS319 ,Interrupt Targets Non-secure 319" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS318 ,Interrupt Targets Non-secure 318" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS317 ,Interrupt Targets Non-secure 317" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS316 ,Interrupt Targets Non-secure 316" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS315 ,Interrupt Targets Non-secure 315" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS314 ,Interrupt Targets Non-secure 314" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS313 ,Interrupt Targets Non-secure 313" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS312 ,Interrupt Targets Non-secure 312" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS311 ,Interrupt Targets Non-secure 311" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS310 ,Interrupt Targets Non-secure 310" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS309 ,Interrupt Targets Non-secure 309" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS308 ,Interrupt Targets Non-secure 308" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS307 ,Interrupt Targets Non-secure 307" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS306 ,Interrupt Targets Non-secure 306" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS305 ,Interrupt Targets Non-secure 305" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS304 ,Interrupt Targets Non-secure 304" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS303 ,Interrupt Targets Non-secure 303" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS302 ,Interrupt Targets Non-secure 302" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS301 ,Interrupt Targets Non-secure 301" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS300 ,Interrupt Targets Non-secure 300" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS299 ,Interrupt Targets Non-secure 299" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS298 ,Interrupt Targets Non-secure 298" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS297 ,Interrupt Targets Non-secure 297" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS296 ,Interrupt Targets Non-secure 296" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS295 ,Interrupt Targets Non-secure 295" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS294 ,Interrupt Targets Non-secure 294" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS293 ,Interrupt Targets Non-secure 293" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS292 ,Interrupt Targets Non-secure 292" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS291 ,Interrupt Targets Non-secure 291" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS290 ,Interrupt Targets Non-secure 290" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS289 ,Interrupt Targets Non-secure 289" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS288 ,Interrupt Targets Non-secure 288" "Secure,Non-secure" else hgroup.long 0x3A4++0x03 hide.long 0x00 "NVIC_ITNS9,Interrupt Target Non-Secure Register 9" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x3A8++0x03 line.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10" bitfld.long 0x00 31. " ITNS351 ,Interrupt Targets Non-secure 351" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS350 ,Interrupt Targets Non-secure 350" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS349 ,Interrupt Targets Non-secure 349" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS348 ,Interrupt Targets Non-secure 348" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS347 ,Interrupt Targets Non-secure 347" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS346 ,Interrupt Targets Non-secure 346" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS345 ,Interrupt Targets Non-secure 345" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS344 ,Interrupt Targets Non-secure 344" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS343 ,Interrupt Targets Non-secure 343" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS342 ,Interrupt Targets Non-secure 342" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS341 ,Interrupt Targets Non-secure 341" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS340 ,Interrupt Targets Non-secure 340" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS339 ,Interrupt Targets Non-secure 339" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS338 ,Interrupt Targets Non-secure 338" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS337 ,Interrupt Targets Non-secure 337" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS336 ,Interrupt Targets Non-secure 336" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS335 ,Interrupt Targets Non-secure 335" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS334 ,Interrupt Targets Non-secure 334" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS333 ,Interrupt Targets Non-secure 333" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS332 ,Interrupt Targets Non-secure 332" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS331 ,Interrupt Targets Non-secure 331" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS330 ,Interrupt Targets Non-secure 330" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS329 ,Interrupt Targets Non-secure 329" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS328 ,Interrupt Targets Non-secure 328" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS327 ,Interrupt Targets Non-secure 327" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS326 ,Interrupt Targets Non-secure 326" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS325 ,Interrupt Targets Non-secure 325" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS324 ,Interrupt Targets Non-secure 324" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS323 ,Interrupt Targets Non-secure 323" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS322 ,Interrupt Targets Non-secure 322" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS321 ,Interrupt Targets Non-secure 321" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS320 ,Interrupt Targets Non-secure 320" "Secure,Non-secure" else hgroup.long 0x3A8++0x03 hide.long 0x00 "NVIC_ITNS10,Interrupt Target Non-Secure Register 10" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x3AC++0x03 line.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11" bitfld.long 0x00 31. " ITNS383 ,Interrupt Targets Non-secure 383" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS382 ,Interrupt Targets Non-secure 382" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS381 ,Interrupt Targets Non-secure 381" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS380 ,Interrupt Targets Non-secure 380" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS379 ,Interrupt Targets Non-secure 379" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS378 ,Interrupt Targets Non-secure 378" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS377 ,Interrupt Targets Non-secure 377" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS376 ,Interrupt Targets Non-secure 376" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS375 ,Interrupt Targets Non-secure 375" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS374 ,Interrupt Targets Non-secure 374" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS373 ,Interrupt Targets Non-secure 373" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS372 ,Interrupt Targets Non-secure 372" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS371 ,Interrupt Targets Non-secure 371" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS370 ,Interrupt Targets Non-secure 370" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS369 ,Interrupt Targets Non-secure 369" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS368 ,Interrupt Targets Non-secure 368" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS367 ,Interrupt Targets Non-secure 367" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS366 ,Interrupt Targets Non-secure 366" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS365 ,Interrupt Targets Non-secure 365" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS364 ,Interrupt Targets Non-secure 364" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS363 ,Interrupt Targets Non-secure 363" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS362 ,Interrupt Targets Non-secure 362" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS361 ,Interrupt Targets Non-secure 361" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS360 ,Interrupt Targets Non-secure 360" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS359 ,Interrupt Targets Non-secure 359" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS358 ,Interrupt Targets Non-secure 358" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS357 ,Interrupt Targets Non-secure 357" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS356 ,Interrupt Targets Non-secure 356" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS355 ,Interrupt Targets Non-secure 355" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS354 ,Interrupt Targets Non-secure 354" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS353 ,Interrupt Targets Non-secure 353" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS352 ,Interrupt Targets Non-secure 352" "Secure,Non-secure" else hgroup.long 0x3AC++0x03 hide.long 0x00 "NVIC_ITNS11,Interrupt Target Non-Secure Register 11" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x3B0++0x03 line.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12" bitfld.long 0x00 31. " ITNS415 ,Interrupt Targets Non-secure 415" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS414 ,Interrupt Targets Non-secure 414" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS413 ,Interrupt Targets Non-secure 413" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS412 ,Interrupt Targets Non-secure 412" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS411 ,Interrupt Targets Non-secure 411" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS410 ,Interrupt Targets Non-secure 410" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS409 ,Interrupt Targets Non-secure 409" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS408 ,Interrupt Targets Non-secure 408" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS407 ,Interrupt Targets Non-secure 407" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS406 ,Interrupt Targets Non-secure 406" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS405 ,Interrupt Targets Non-secure 405" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS404 ,Interrupt Targets Non-secure 404" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS403 ,Interrupt Targets Non-secure 403" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS402 ,Interrupt Targets Non-secure 402" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS401 ,Interrupt Targets Non-secure 401" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS400 ,Interrupt Targets Non-secure 400" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS399 ,Interrupt Targets Non-secure 399" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS398 ,Interrupt Targets Non-secure 398" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS397 ,Interrupt Targets Non-secure 397" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS396 ,Interrupt Targets Non-secure 396" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS395 ,Interrupt Targets Non-secure 395" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS394 ,Interrupt Targets Non-secure 394" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS393 ,Interrupt Targets Non-secure 393" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS392 ,Interrupt Targets Non-secure 392" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS391 ,Interrupt Targets Non-secure 391" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS390 ,Interrupt Targets Non-secure 390" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS389 ,Interrupt Targets Non-secure 389" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS388 ,Interrupt Targets Non-secure 388" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS387 ,Interrupt Targets Non-secure 387" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS386 ,Interrupt Targets Non-secure 386" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS385 ,Interrupt Targets Non-secure 385" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS384 ,Interrupt Targets Non-secure 384" "Secure,Non-secure" else hgroup.long 0x3B0++0x03 hide.long 0x00 "NVIC_ITNS12,Interrupt Target Non-Secure Register 12" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x3B4++0x03 line.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13" bitfld.long 0x00 31. " ITNS447 ,Interrupt Targets Non-secure 447" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS446 ,Interrupt Targets Non-secure 446" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS445 ,Interrupt Targets Non-secure 445" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS444 ,Interrupt Targets Non-secure 444" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS443 ,Interrupt Targets Non-secure 443" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS442 ,Interrupt Targets Non-secure 442" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS441 ,Interrupt Targets Non-secure 441" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS440 ,Interrupt Targets Non-secure 440" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS439 ,Interrupt Targets Non-secure 439" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS438 ,Interrupt Targets Non-secure 438" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS437 ,Interrupt Targets Non-secure 437" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS436 ,Interrupt Targets Non-secure 436" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS435 ,Interrupt Targets Non-secure 435" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS434 ,Interrupt Targets Non-secure 434" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS433 ,Interrupt Targets Non-secure 433" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS432 ,Interrupt Targets Non-secure 432" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS431 ,Interrupt Targets Non-secure 431" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS430 ,Interrupt Targets Non-secure 430" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS429 ,Interrupt Targets Non-secure 429" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS428 ,Interrupt Targets Non-secure 428" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS427 ,Interrupt Targets Non-secure 427" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS426 ,Interrupt Targets Non-secure 426" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS425 ,Interrupt Targets Non-secure 425" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS424 ,Interrupt Targets Non-secure 424" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS423 ,Interrupt Targets Non-secure 423" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS422 ,Interrupt Targets Non-secure 422" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS421 ,Interrupt Targets Non-secure 421" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS420 ,Interrupt Targets Non-secure 420" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS419 ,Interrupt Targets Non-secure 419" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS418 ,Interrupt Targets Non-secure 418" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS417 ,Interrupt Targets Non-secure 417" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS416 ,Interrupt Targets Non-secure 416" "Secure,Non-secure" else hgroup.long 0x3B4++0x03 hide.long 0x00 "NVIC_ITNS13,Interrupt Target Non-Secure Register 13" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x3B8++0x03 line.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14" bitfld.long 0x00 31. " ITNS479 ,Interrupt Targets Non-secure 479" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS478 ,Interrupt Targets Non-secure 478" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS477 ,Interrupt Targets Non-secure 477" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS476 ,Interrupt Targets Non-secure 476" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS475 ,Interrupt Targets Non-secure 475" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS474 ,Interrupt Targets Non-secure 474" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS473 ,Interrupt Targets Non-secure 473" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS472 ,Interrupt Targets Non-secure 472" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS471 ,Interrupt Targets Non-secure 471" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS470 ,Interrupt Targets Non-secure 470" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS469 ,Interrupt Targets Non-secure 469" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS468 ,Interrupt Targets Non-secure 468" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS467 ,Interrupt Targets Non-secure 467" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS466 ,Interrupt Targets Non-secure 466" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS465 ,Interrupt Targets Non-secure 465" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS464 ,Interrupt Targets Non-secure 464" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS463 ,Interrupt Targets Non-secure 463" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS462 ,Interrupt Targets Non-secure 462" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS461 ,Interrupt Targets Non-secure 461" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS460 ,Interrupt Targets Non-secure 460" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS459 ,Interrupt Targets Non-secure 459" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS458 ,Interrupt Targets Non-secure 458" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS457 ,Interrupt Targets Non-secure 457" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS456 ,Interrupt Targets Non-secure 456" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS455 ,Interrupt Targets Non-secure 455" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS454 ,Interrupt Targets Non-secure 454" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS453 ,Interrupt Targets Non-secure 453" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS452 ,Interrupt Targets Non-secure 452" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS451 ,Interrupt Targets Non-secure 451" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS450 ,Interrupt Targets Non-secure 450" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS449 ,Interrupt Targets Non-secure 449" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS448 ,Interrupt Targets Non-secure 448" "Secure,Non-secure" else hgroup.long 0x3B8++0x03 hide.long 0x00 "NVIC_ITNS14,Interrupt Target Non-Secure Register 14" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)==0x0F) group.long 0x3BC++0x03 line.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15" bitfld.long 0x00 31. " ITNS511 ,Interrupt Targets Non-secure 511" "Secure,Non-secure" bitfld.long 0x00 30. " ITNS510 ,Interrupt Targets Non-secure 510" "Secure,Non-secure" bitfld.long 0x00 29. " ITNS509 ,Interrupt Targets Non-secure 509" "Secure,Non-secure" textline " " bitfld.long 0x00 28. " ITNS508 ,Interrupt Targets Non-secure 508" "Secure,Non-secure" bitfld.long 0x00 27. " ITNS507 ,Interrupt Targets Non-secure 507" "Secure,Non-secure" bitfld.long 0x00 26. " ITNS506 ,Interrupt Targets Non-secure 506" "Secure,Non-secure" textline " " bitfld.long 0x00 25. " ITNS505 ,Interrupt Targets Non-secure 505" "Secure,Non-secure" bitfld.long 0x00 24. " ITNS504 ,Interrupt Targets Non-secure 504" "Secure,Non-secure" bitfld.long 0x00 23. " ITNS503 ,Interrupt Targets Non-secure 503" "Secure,Non-secure" textline " " bitfld.long 0x00 22. " ITNS502 ,Interrupt Targets Non-secure 502" "Secure,Non-secure" bitfld.long 0x00 21. " ITNS501 ,Interrupt Targets Non-secure 501" "Secure,Non-secure" bitfld.long 0x00 20. " ITNS500 ,Interrupt Targets Non-secure 500" "Secure,Non-secure" textline " " bitfld.long 0x00 19. " ITNS499 ,Interrupt Targets Non-secure 499" "Secure,Non-secure" bitfld.long 0x00 18. " ITNS498 ,Interrupt Targets Non-secure 498" "Secure,Non-secure" bitfld.long 0x00 17. " ITNS497 ,Interrupt Targets Non-secure 497" "Secure,Non-secure" textline " " bitfld.long 0x00 16. " ITNS496 ,Interrupt Targets Non-secure 496" "Secure,Non-secure" bitfld.long 0x00 15. " ITNS495 ,Interrupt Targets Non-secure 495" "Secure,Non-secure" bitfld.long 0x00 14. " ITNS494 ,Interrupt Targets Non-secure 494" "Secure,Non-secure" textline " " bitfld.long 0x00 13. " ITNS493 ,Interrupt Targets Non-secure 493" "Secure,Non-secure" bitfld.long 0x00 12. " ITNS492 ,Interrupt Targets Non-secure 492" "Secure,Non-secure" bitfld.long 0x00 11. " ITNS491 ,Interrupt Targets Non-secure 491" "Secure,Non-secure" textline " " bitfld.long 0x00 10. " ITNS490 ,Interrupt Targets Non-secure 490" "Secure,Non-secure" bitfld.long 0x00 9. " ITNS489 ,Interrupt Targets Non-secure 489" "Secure,Non-secure" bitfld.long 0x00 8. " ITNS488 ,Interrupt Targets Non-secure 488" "Secure,Non-secure" textline " " bitfld.long 0x00 7. " ITNS487 ,Interrupt Targets Non-secure 487" "Secure,Non-secure" bitfld.long 0x00 6. " ITNS486 ,Interrupt Targets Non-secure 486" "Secure,Non-secure" bitfld.long 0x00 5. " ITNS485 ,Interrupt Targets Non-secure 485" "Secure,Non-secure" textline " " bitfld.long 0x00 4. " ITNS484 ,Interrupt Targets Non-secure 484" "Secure,Non-secure" bitfld.long 0x00 3. " ITNS483 ,Interrupt Targets Non-secure 483" "Secure,Non-secure" bitfld.long 0x00 2. " ITNS482 ,Interrupt Targets Non-secure 482" "Secure,Non-secure" textline " " bitfld.long 0x00 1. " ITNS481 ,Interrupt Targets Non-secure 481" "Secure,Non-secure" bitfld.long 0x00 0. " ITNS480 ,Interrupt Targets Non-secure 480" "Secure,Non-secure" else hgroup.long 0x3BC++0x03 hide.long 0x00 "NVIC_ITNS15,Interrupt Target Non-Secure Register 15" endif tree.end tree "Interrupt Priority Registers" group.long 0x400++0x1F line.long 0x0 "IPR0,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_3 ,Interrupt 3 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_2 ,Interrupt 2 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_1 ,Interrupt 1 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_0 ,Interrupt 0 Priority" line.long 0x4 "IPR1,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_7 ,Interrupt 7 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_6 ,Interrupt 6 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_5 ,Interrupt 5 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_4 ,Interrupt 4 Priority" line.long 0x8 "IPR2,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_11 ,Interrupt 11 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_10 ,Interrupt 10 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_9 ,Interrupt 9 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_8 ,Interrupt 8 Priority" line.long 0xC "IPR3,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_15 ,Interrupt 15 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_14 ,Interrupt 14 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_13 ,Interrupt 13 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_12 ,Interrupt 12 Priority" line.long 0x10 "IPR4,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_19 ,Interrupt 19 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_18 ,Interrupt 18 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_17 ,Interrupt 17 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_16 ,Interrupt 16 Priority" line.long 0x14 "IPR5,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_23 ,Interrupt 23 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_22 ,Interrupt 22 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_21 ,Interrupt 21 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_20 ,Interrupt 20 Priority" line.long 0x18 "IPR6,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_27 ,Interrupt 27 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_26 ,Interrupt 26 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_25 ,Interrupt 25 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_24 ,Interrupt 24 Priority" line.long 0x1C "IPR7,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_31 ,Interrupt 31 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_30 ,Interrupt 30 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_29 ,Interrupt 29 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_28 ,Interrupt 28 Priority" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x01) group.long 0x420++0x1F line.long 0x0 "IPR8,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_35 ,Interrupt 35 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_34 ,Interrupt 34 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_33 ,Interrupt 33 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_32 ,Interrupt 32 Priority" line.long 0x4 "IPR9,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_39 ,Interrupt 39 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_38 ,Interrupt 38 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_37 ,Interrupt 37 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_36 ,Interrupt 36 Priority" line.long 0x8 "IPR10,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_43 ,Interrupt 43 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_42 ,Interrupt 42 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_41 ,Interrupt 41 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_40 ,Interrupt 40 Priority" line.long 0xC "IPR11,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_47 ,Interrupt 47 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_46 ,Interrupt 46 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_45 ,Interrupt 45 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_44 ,Interrupt 44 Priority" line.long 0x10 "IPR12,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_51 ,Interrupt 51 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_50 ,Interrupt 50 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_49 ,Interrupt 49 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_48 ,Interrupt 48 Priority" line.long 0x14 "IPR13,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_55 ,Interrupt 55 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_54 ,Interrupt 54 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_53 ,Interrupt 53 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_52 ,Interrupt 52 Priority" line.long 0x18 "IPR14,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_59 ,Interrupt 59 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_58 ,Interrupt 58 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_57 ,Interrupt 57 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_56 ,Interrupt 56 Priority" line.long 0x1C "IPR15,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_63 ,Interrupt 63 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_62 ,Interrupt 62 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_61 ,Interrupt 61 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_60 ,Interrupt 60 Priority" else hgroup.long 0x420++0x1F hide.long 0x0 "IPR8,Interrupt Priority Register" hide.long 0x4 "IPR9,Interrupt Priority Register" hide.long 0x8 "IPR10,Interrupt Priority Register" hide.long 0xC "IPR11,Interrupt Priority Register" hide.long 0x10 "IPR12,Interrupt Priority Register" hide.long 0x14 "IPR13,Interrupt Priority Register" hide.long 0x18 "IPR14,Interrupt Priority Register" hide.long 0x1C "IPR15,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x02) group.long 0x440++0x1F line.long 0x0 "IPR16,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_67 ,Interrupt 67 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_66 ,Interrupt 66 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_65 ,Interrupt 65 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_64 ,Interrupt 64 Priority" line.long 0x4 "IPR17,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_71 ,Interrupt 71 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_70 ,Interrupt 70 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_69 ,Interrupt 69 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_68 ,Interrupt 68 Priority" line.long 0x8 "IPR18,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_75 ,Interrupt 75 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_74 ,Interrupt 74 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_73 ,Interrupt 73 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_72 ,Interrupt 72 Priority" line.long 0xC "IPR19,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_79 ,Interrupt 79 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_78 ,Interrupt 78 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_77 ,Interrupt 77 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_76 ,Interrupt 76 Priority" line.long 0x10 "IPR20,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_83 ,Interrupt 83 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_82 ,Interrupt 82 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_81 ,Interrupt 81 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_80 ,Interrupt 80 Priority" line.long 0x14 "IPR21,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_87 ,Interrupt 87 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_86 ,Interrupt 86 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_85 ,Interrupt 85 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_84 ,Interrupt 84 Priority" line.long 0x18 "IPR22,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_91 ,Interrupt 91 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_90 ,Interrupt 90 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_89 ,Interrupt 89 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_88 ,Interrupt 88 Priority" line.long 0x1C "IPR23,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_95 ,Interrupt 95 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_94 ,Interrupt 94 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_93 ,Interrupt 93 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_92 ,Interrupt 92 Priority" else hgroup.long 0x440++0x1F hide.long 0x0 "IPR16,Interrupt Priority Register" hide.long 0x4 "IPR17,Interrupt Priority Register" hide.long 0x8 "IPR18,Interrupt Priority Register" hide.long 0xC "IPR19,Interrupt Priority Register" hide.long 0x10 "IPR20,Interrupt Priority Register" hide.long 0x14 "IPR21,Interrupt Priority Register" hide.long 0x18 "IPR22,Interrupt Priority Register" hide.long 0x1C "IPR23,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x03) group.long 0x460++0x1F line.long 0x0 "IPR24,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_99 ,Interrupt 99 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_98 ,Interrupt 98 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_97 ,Interrupt 97 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_96 ,Interrupt 96 Priority" line.long 0x4 "IPR25,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_103 ,Interrupt 103 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_102 ,Interrupt 102 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_101 ,Interrupt 101 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_100 ,Interrupt 100 Priority" line.long 0x8 "IPR26,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_107 ,Interrupt 107 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_106 ,Interrupt 106 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_105 ,Interrupt 105 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_104 ,Interrupt 104 Priority" line.long 0xC "IPR27,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_111 ,Interrupt 111 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_110 ,Interrupt 110 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_109 ,Interrupt 109 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_108 ,Interrupt 108 Priority" line.long 0x10 "IPR28,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_115 ,Interrupt 115 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_114 ,Interrupt 114 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_113 ,Interrupt 113 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_112 ,Interrupt 112 Priority" line.long 0x14 "IPR29,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_119 ,Interrupt 119 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_118 ,Interrupt 118 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_117 ,Interrupt 117 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_116 ,Interrupt 116 Priority" line.long 0x18 "IPR30,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_123 ,Interrupt 123 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_122 ,Interrupt 122 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_121 ,Interrupt 121 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_120 ,Interrupt 120 Priority" line.long 0x1C "IPR31,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_127 ,Interrupt 127 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_126 ,Interrupt 126 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_125 ,Interrupt 125 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_124 ,Interrupt 124 Priority" else hgroup.long 0x460++0x1F hide.long 0x0 "IPR24,Interrupt Priority Register" hide.long 0x4 "IPR25,Interrupt Priority Register" hide.long 0x8 "IPR26,Interrupt Priority Register" hide.long 0xC "IPR27,Interrupt Priority Register" hide.long 0x10 "IPR28,Interrupt Priority Register" hide.long 0x14 "IPR29,Interrupt Priority Register" hide.long 0x18 "IPR30,Interrupt Priority Register" hide.long 0x1C "IPR31,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x04) group.long 0x480++0x1F line.long 0x0 "IPR32,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_131 ,Interrupt 131 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_130 ,Interrupt 130 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_129 ,Interrupt 129 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_128 ,Interrupt 128 Priority" line.long 0x4 "IPR33,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_135 ,Interrupt 135 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_134 ,Interrupt 134 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_133 ,Interrupt 133 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_132 ,Interrupt 132 Priority" line.long 0x8 "IPR34,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_139 ,Interrupt 139 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_138 ,Interrupt 138 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_137 ,Interrupt 137 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_136 ,Interrupt 136 Priority" line.long 0xC "IPR35,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_143 ,Interrupt 143 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_142 ,Interrupt 142 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_141 ,Interrupt 141 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_140 ,Interrupt 140 Priority" line.long 0x10 "IPR36,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_147 ,Interrupt 147 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_146 ,Interrupt 146 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_145 ,Interrupt 145 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_144 ,Interrupt 144 Priority" line.long 0x14 "IPR37,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_151 ,Interrupt 151 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_150 ,Interrupt 150 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_149 ,Interrupt 149 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_148 ,Interrupt 148 Priority" line.long 0x18 "IPR38,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_155 ,Interrupt 155 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_154 ,Interrupt 154 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_153 ,Interrupt 153 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_152 ,Interrupt 152 Priority" line.long 0x1C "IPR39,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_159 ,Interrupt 159 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_158 ,Interrupt 158 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_157 ,Interrupt 157 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_156 ,Interrupt 156 Priority" else hgroup.long 0x480++0x1F hide.long 0x0 "IPR32,Interrupt Priority Register" hide.long 0x4 "IPR33,Interrupt Priority Register" hide.long 0x8 "IPR34,Interrupt Priority Register" hide.long 0xC "IPR35,Interrupt Priority Register" hide.long 0x10 "IPR36,Interrupt Priority Register" hide.long 0x14 "IPR37,Interrupt Priority Register" hide.long 0x18 "IPR38,Interrupt Priority Register" hide.long 0x1C "IPR39,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x05) group.long 0x4A0++0x1F line.long 0x0 "IPR40,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_163 ,Interrupt 163 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_162 ,Interrupt 162 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_161 ,Interrupt 161 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_160 ,Interrupt 160 Priority" line.long 0x4 "IPR41,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_167 ,Interrupt 167 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_166 ,Interrupt 166 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_165 ,Interrupt 165 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_164 ,Interrupt 164 Priority" line.long 0x8 "IPR42,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_171 ,Interrupt 171 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_170 ,Interrupt 170 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_169 ,Interrupt 169 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_168 ,Interrupt 168 Priority" line.long 0xC "IPR43,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_175 ,Interrupt 175 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_174 ,Interrupt 174 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_173 ,Interrupt 173 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_172 ,Interrupt 172 Priority" line.long 0x10 "IPR44,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_179 ,Interrupt 179 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_178 ,Interrupt 178 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_177 ,Interrupt 177 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_176 ,Interrupt 176 Priority" line.long 0x14 "IPR45,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_183 ,Interrupt 183 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_182 ,Interrupt 182 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_181 ,Interrupt 181 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_180 ,Interrupt 180 Priority" line.long 0x18 "IPR46,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_187 ,Interrupt 187 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_186 ,Interrupt 186 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_185 ,Interrupt 185 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_184 ,Interrupt 184 Priority" line.long 0x1C "IPR47,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_191 ,Interrupt 191 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_190 ,Interrupt 190 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_189 ,Interrupt 189 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_188 ,Interrupt 188 Priority" else hgroup.long 0x4A0++0x1F hide.long 0x0 "IPR40,Interrupt Priority Register" hide.long 0x4 "IPR41,Interrupt Priority Register" hide.long 0x8 "IPR42,Interrupt Priority Register" hide.long 0xC "IPR43,Interrupt Priority Register" hide.long 0x10 "IPR44,Interrupt Priority Register" hide.long 0x14 "IPR45,Interrupt Priority Register" hide.long 0x18 "IPR46,Interrupt Priority Register" hide.long 0x1C "IPR47,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x06) group.long 0x4C0++0x1F line.long 0x0 "IPR48,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_195 ,Interrupt 195 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_194 ,Interrupt 194 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_193 ,Interrupt 193 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_192 ,Interrupt 192 Priority" line.long 0x4 "IPR49,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_199 ,Interrupt 199 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_198 ,Interrupt 198 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_197 ,Interrupt 197 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_196 ,Interrupt 196 Priority" line.long 0x8 "IPR50,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_203 ,Interrupt 203 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_202 ,Interrupt 202 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_201 ,Interrupt 201 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_200 ,Interrupt 200 Priority" line.long 0xC "IPR51,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_207 ,Interrupt 207 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_206 ,Interrupt 206 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_205 ,Interrupt 205 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_204 ,Interrupt 204 Priority" line.long 0x10 "IPR52,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_211 ,Interrupt 211 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_210 ,Interrupt 210 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_209 ,Interrupt 209 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_208 ,Interrupt 208 Priority" line.long 0x14 "IPR53,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_215 ,Interrupt 215 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_214 ,Interrupt 214 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_213 ,Interrupt 213 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_212 ,Interrupt 212 Priority" line.long 0x18 "IPR54,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_219 ,Interrupt 219 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_218 ,Interrupt 218 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_217 ,Interrupt 217 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_216 ,Interrupt 216 Priority" line.long 0x1C "IPR55,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_223 ,Interrupt 223 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_222 ,Interrupt 222 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_221 ,Interrupt 221 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_220 ,Interrupt 220 Priority" else hgroup.long 0x4C0++0x1F hide.long 0x0 "IPR48,Interrupt Priority Register" hide.long 0x4 "IPR49,Interrupt Priority Register" hide.long 0x8 "IPR50,Interrupt Priority Register" hide.long 0xC "IPR51,Interrupt Priority Register" hide.long 0x10 "IPR52,Interrupt Priority Register" hide.long 0x14 "IPR53,Interrupt Priority Register" hide.long 0x18 "IPR54,Interrupt Priority Register" hide.long 0x1C "IPR55,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x07) group.long 0x4E0++0x1F line.long 0x0 "IPR56,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_227 ,Interrupt 227 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_226 ,Interrupt 226 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_225 ,Interrupt 225 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_224 ,Interrupt 224 Priority" line.long 0x4 "IPR57,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_231 ,Interrupt 231 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_230 ,Interrupt 230 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_229 ,Interrupt 229 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_228 ,Interrupt 228 Priority" line.long 0x8 "IPR58,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_235 ,Interrupt 235 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_234 ,Interrupt 234 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_233 ,Interrupt 233 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_232 ,Interrupt 232 Priority" line.long 0xC "IPR59,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_239 ,Interrupt 239 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_238 ,Interrupt 238 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_237 ,Interrupt 237 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_236 ,Interrupt 236 Priority" line.long 0x10 "IPR60,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_243 ,Interrupt 243 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_242 ,Interrupt 242 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_241 ,Interrupt 241 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_240 ,Interrupt 240 Priority" line.long 0x14 "IPR61,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_247 ,Interrupt 247 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_246 ,Interrupt 246 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_245 ,Interrupt 245 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_244 ,Interrupt 244 Priority" line.long 0x18 "IPR62,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_251 ,Interrupt 251 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_250 ,Interrupt 250 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_249 ,Interrupt 249 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_248 ,Interrupt 248 Priority" line.long 0x1C "IPR63,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_255 ,Interrupt 255 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_254 ,Interrupt 254 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_253 ,Interrupt 253 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_252 ,Interrupt 252 Priority" else hgroup.long 0x4E0++0x1F hide.long 0x0 "IPR56,Interrupt Priority Register" hide.long 0x4 "IPR57,Interrupt Priority Register" hide.long 0x8 "IPR58,Interrupt Priority Register" hide.long 0xC "IPR59,Interrupt Priority Register" hide.long 0x10 "IPR60,Interrupt Priority Register" hide.long 0x14 "IPR61,Interrupt Priority Register" hide.long 0x18 "IPR62,Interrupt Priority Register" hide.long 0x1C "IPR63,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x08) group.long 0x500++0x1F line.long 0x0 "IPR64,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_259 ,Interrupt 259 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_258 ,Interrupt 258 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_257 ,Interrupt 257 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_256 ,Interrupt 256 Priority" line.long 0x4 "IPR65,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_263 ,Interrupt 263 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_262 ,Interrupt 262 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_261 ,Interrupt 261 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_260 ,Interrupt 260 Priority" line.long 0x8 "IPR66,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_267 ,Interrupt 267 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_266 ,Interrupt 266 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_265 ,Interrupt 265 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_264 ,Interrupt 264 Priority" line.long 0xC "IPR67,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_271 ,Interrupt 271 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_270 ,Interrupt 270 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_269 ,Interrupt 269 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_268 ,Interrupt 268 Priority" line.long 0x10 "IPR68,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_275 ,Interrupt 275 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_274 ,Interrupt 274 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_273 ,Interrupt 273 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_272 ,Interrupt 272 Priority" line.long 0x14 "IPR69,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_279 ,Interrupt 279 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_278 ,Interrupt 278 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_277 ,Interrupt 277 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_276 ,Interrupt 276 Priority" line.long 0x18 "IPR70,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_283 ,Interrupt 283 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_282 ,Interrupt 282 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_281 ,Interrupt 281 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_280 ,Interrupt 280 Priority" line.long 0x1C "IPR71,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_287 ,Interrupt 287 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_286 ,Interrupt 286 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_285 ,Interrupt 285 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_284 ,Interrupt 284 Priority" else hgroup.long 0x500++0x1F hide.long 0x0 "IPR64,Interrupt Priority Register" hide.long 0x4 "IPR65,Interrupt Priority Register" hide.long 0x8 "IPR66,Interrupt Priority Register" hide.long 0xC "IPR67,Interrupt Priority Register" hide.long 0x10 "IPR68,Interrupt Priority Register" hide.long 0x14 "IPR69,Interrupt Priority Register" hide.long 0x18 "IPR70,Interrupt Priority Register" hide.long 0x1C "IPR71,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x09) group.long 0x520++0x1F line.long 0x0 "IPR72,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_291 ,Interrupt 291 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_290 ,Interrupt 290 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_289 ,Interrupt 289 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_288 ,Interrupt 288 Priority" line.long 0x4 "IPR73,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_295 ,Interrupt 295 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_294 ,Interrupt 294 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_293 ,Interrupt 293 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_292 ,Interrupt 292 Priority" line.long 0x8 "IPR74,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_299 ,Interrupt 299 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_298 ,Interrupt 298 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_297 ,Interrupt 297 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_296 ,Interrupt 296 Priority" line.long 0xC "IPR75,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_303 ,Interrupt 303 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_302 ,Interrupt 302 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_301 ,Interrupt 301 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_300 ,Interrupt 300 Priority" line.long 0x10 "IPR76,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_307 ,Interrupt 307 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_306 ,Interrupt 306 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_305 ,Interrupt 305 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_304 ,Interrupt 304 Priority" line.long 0x14 "IPR77,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_311 ,Interrupt 311 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_310 ,Interrupt 310 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_309 ,Interrupt 309 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_308 ,Interrupt 308 Priority" line.long 0x18 "IPR78,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_315 ,Interrupt 315 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_314 ,Interrupt 314 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_313 ,Interrupt 313 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_312 ,Interrupt 312 Priority" line.long 0x1C "IPR79,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_319 ,Interrupt 319 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_318 ,Interrupt 318 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_317 ,Interrupt 317 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_316 ,Interrupt 316 Priority" else hgroup.long 0x520++0x1F hide.long 0x0 "IPR72,Interrupt Priority Register" hide.long 0x4 "IPR73,Interrupt Priority Register" hide.long 0x8 "IPR74,Interrupt Priority Register" hide.long 0xC "IPR75,Interrupt Priority Register" hide.long 0x10 "IPR76,Interrupt Priority Register" hide.long 0x14 "IPR77,Interrupt Priority Register" hide.long 0x18 "IPR78,Interrupt Priority Register" hide.long 0x1C "IPR79,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0A) group.long 0x540++0x1F line.long 0x0 "IPR80,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_323 ,Interrupt 323 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_322 ,Interrupt 322 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_321 ,Interrupt 321 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_320 ,Interrupt 320 Priority" line.long 0x4 "IPR81,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_327 ,Interrupt 327 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_326 ,Interrupt 326 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_325 ,Interrupt 325 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_324 ,Interrupt 324 Priority" line.long 0x8 "IPR82,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_331 ,Interrupt 331 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_330 ,Interrupt 330 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_329 ,Interrupt 329 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_328 ,Interrupt 328 Priority" line.long 0xC "IPR83,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_335 ,Interrupt 335 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_334 ,Interrupt 334 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_333 ,Interrupt 333 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_332 ,Interrupt 332 Priority" line.long 0x10 "IPR84,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_339 ,Interrupt 339 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_338 ,Interrupt 338 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_337 ,Interrupt 337 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_336 ,Interrupt 336 Priority" line.long 0x14 "IPR85,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_343 ,Interrupt 343 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_342 ,Interrupt 342 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_341 ,Interrupt 341 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_340 ,Interrupt 340 Priority" line.long 0x18 "IPR86,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_347 ,Interrupt 347 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_346 ,Interrupt 346 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_345 ,Interrupt 345 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_344 ,Interrupt 344 Priority" line.long 0x1C "IPR87,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_351 ,Interrupt 351 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_350 ,Interrupt 350 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_349 ,Interrupt 349 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_348 ,Interrupt 348 Priority" else hgroup.long 0x540++0x1F hide.long 0x0 "IPR80,Interrupt Priority Register" hide.long 0x4 "IPR81,Interrupt Priority Register" hide.long 0x8 "IPR82,Interrupt Priority Register" hide.long 0xC "IPR83,Interrupt Priority Register" hide.long 0x10 "IPR84,Interrupt Priority Register" hide.long 0x14 "IPR85,Interrupt Priority Register" hide.long 0x18 "IPR86,Interrupt Priority Register" hide.long 0x1C "IPR87,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0B) group.long 0x560++0x1F line.long 0x0 "IPR88,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_355 ,Interrupt 355 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_354 ,Interrupt 354 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_353 ,Interrupt 353 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_352 ,Interrupt 352 Priority" line.long 0x4 "IPR89,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_359 ,Interrupt 359 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_358 ,Interrupt 358 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_357 ,Interrupt 357 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_356 ,Interrupt 356 Priority" line.long 0x8 "IPR90,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_363 ,Interrupt 363 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_362 ,Interrupt 362 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_361 ,Interrupt 361 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_360 ,Interrupt 360 Priority" line.long 0xC "IPR91,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_367 ,Interrupt 367 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_366 ,Interrupt 366 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_365 ,Interrupt 365 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_364 ,Interrupt 364 Priority" line.long 0x10 "IPR92,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_371 ,Interrupt 371 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_370 ,Interrupt 370 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_369 ,Interrupt 369 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_368 ,Interrupt 368 Priority" line.long 0x14 "IPR93,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_375 ,Interrupt 375 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_374 ,Interrupt 374 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_373 ,Interrupt 373 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_372 ,Interrupt 372 Priority" line.long 0x18 "IPR94,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_379 ,Interrupt 379 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_378 ,Interrupt 378 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_377 ,Interrupt 377 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_376 ,Interrupt 376 Priority" line.long 0x1C "IPR95,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_383 ,Interrupt 383 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_382 ,Interrupt 382 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_381 ,Interrupt 381 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_380 ,Interrupt 380 Priority" else hgroup.long 0x560++0x1F hide.long 0x0 "IPR88,Interrupt Priority Register" hide.long 0x4 "IPR89,Interrupt Priority Register" hide.long 0x8 "IPR90,Interrupt Priority Register" hide.long 0xC "IPR91,Interrupt Priority Register" hide.long 0x10 "IPR92,Interrupt Priority Register" hide.long 0x14 "IPR93,Interrupt Priority Register" hide.long 0x18 "IPR94,Interrupt Priority Register" hide.long 0x1C "IPR95,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0C) group.long 0x580++0x1F line.long 0x0 "IPR96,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_387 ,Interrupt 387 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_386 ,Interrupt 386 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_385 ,Interrupt 385 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_384 ,Interrupt 384 Priority" line.long 0x4 "IPR97,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_391 ,Interrupt 391 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_390 ,Interrupt 390 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_389 ,Interrupt 389 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_388 ,Interrupt 388 Priority" line.long 0x8 "IPR98,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_395 ,Interrupt 395 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_394 ,Interrupt 394 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_393 ,Interrupt 393 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_392 ,Interrupt 392 Priority" line.long 0xC "IPR99,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_399 ,Interrupt 399 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_398 ,Interrupt 398 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_397 ,Interrupt 397 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_396 ,Interrupt 396 Priority" line.long 0x10 "IPR100,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_403 ,Interrupt 403 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_402 ,Interrupt 402 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_401 ,Interrupt 401 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_400 ,Interrupt 400 Priority" line.long 0x14 "IPR101,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_407 ,Interrupt 407 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_406 ,Interrupt 406 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_405 ,Interrupt 405 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_404 ,Interrupt 404 Priority" line.long 0x18 "IPR102,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_411 ,Interrupt 411 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_410 ,Interrupt 410 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_409 ,Interrupt 409 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_408 ,Interrupt 408 Priority" line.long 0x1C "IPR103,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_415 ,Interrupt 415 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_414 ,Interrupt 414 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_413 ,Interrupt 413 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_412 ,Interrupt 412 Priority" else hgroup.long 0x580++0x1F hide.long 0x0 "IPR96,Interrupt Priority Register" hide.long 0x4 "IPR97,Interrupt Priority Register" hide.long 0x8 "IPR98,Interrupt Priority Register" hide.long 0xC "IPR99,Interrupt Priority Register" hide.long 0x10 "IPR100,Interrupt Priority Register" hide.long 0x14 "IPR101,Interrupt Priority Register" hide.long 0x18 "IPR102,Interrupt Priority Register" hide.long 0x1C "IPR103,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0D) group.long 0x5A0++0x1F line.long 0x0 "IPR104,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_419 ,Interrupt 419 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_418 ,Interrupt 418 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_417 ,Interrupt 417 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_416 ,Interrupt 416 Priority" line.long 0x4 "IPR105,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_423 ,Interrupt 423 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_422 ,Interrupt 422 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_421 ,Interrupt 421 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_420 ,Interrupt 420 Priority" line.long 0x8 "IPR106,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_427 ,Interrupt 427 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_426 ,Interrupt 426 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_425 ,Interrupt 425 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_424 ,Interrupt 424 Priority" line.long 0xC "IPR107,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_431 ,Interrupt 431 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_430 ,Interrupt 430 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_429 ,Interrupt 429 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_428 ,Interrupt 428 Priority" line.long 0x10 "IPR108,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_435 ,Interrupt 435 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_434 ,Interrupt 434 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_433 ,Interrupt 433 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_432 ,Interrupt 432 Priority" line.long 0x14 "IPR109,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_439 ,Interrupt 439 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_438 ,Interrupt 438 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_437 ,Interrupt 437 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_436 ,Interrupt 436 Priority" line.long 0x18 "IPR110,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_443 ,Interrupt 443 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_442 ,Interrupt 442 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_441 ,Interrupt 441 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_440 ,Interrupt 440 Priority" line.long 0x1C "IPR111,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_447 ,Interrupt 447 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_446 ,Interrupt 446 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_445 ,Interrupt 445 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_444 ,Interrupt 444 Priority" else hgroup.long 0x5A0++0x1F hide.long 0x0 "IPR104,Interrupt Priority Register" hide.long 0x4 "IPR105,Interrupt Priority Register" hide.long 0x8 "IPR106,Interrupt Priority Register" hide.long 0xC "IPR107,Interrupt Priority Register" hide.long 0x10 "IPR108,Interrupt Priority Register" hide.long 0x14 "IPR109,Interrupt Priority Register" hide.long 0x18 "IPR110,Interrupt Priority Register" hide.long 0x1C "IPR111,Interrupt Priority Register" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0x04))&0x0F)>=0x0E) group.long 0x5C0++0x1F line.long 0x0 "IPR112,Interrupt Priority Register" hexmask.long.byte 0x0 24.--31. 1. " PRI_451 ,Interrupt 451 Priority" hexmask.long.byte 0x0 16.--23. 1. " PRI_450 ,Interrupt 450 Priority" hexmask.long.byte 0x0 8.--15. 1. " PRI_449 ,Interrupt 449 Priority" hexmask.long.byte 0x0 0.--7. 1. " PRI_448 ,Interrupt 448 Priority" line.long 0x4 "IPR113,Interrupt Priority Register" hexmask.long.byte 0x4 24.--31. 1. " PRI_455 ,Interrupt 455 Priority" hexmask.long.byte 0x4 16.--23. 1. " PRI_454 ,Interrupt 454 Priority" hexmask.long.byte 0x4 8.--15. 1. " PRI_453 ,Interrupt 453 Priority" hexmask.long.byte 0x4 0.--7. 1. " PRI_452 ,Interrupt 452 Priority" line.long 0x8 "IPR114,Interrupt Priority Register" hexmask.long.byte 0x8 24.--31. 1. " PRI_459 ,Interrupt 459 Priority" hexmask.long.byte 0x8 16.--23. 1. " PRI_458 ,Interrupt 458 Priority" hexmask.long.byte 0x8 8.--15. 1. " PRI_457 ,Interrupt 457 Priority" hexmask.long.byte 0x8 0.--7. 1. " PRI_456 ,Interrupt 456 Priority" line.long 0xC "IPR115,Interrupt Priority Register" hexmask.long.byte 0xC 24.--31. 1. " PRI_463 ,Interrupt 463 Priority" hexmask.long.byte 0xC 16.--23. 1. " PRI_462 ,Interrupt 462 Priority" hexmask.long.byte 0xC 8.--15. 1. " PRI_461 ,Interrupt 461 Priority" hexmask.long.byte 0xC 0.--7. 1. " PRI_460 ,Interrupt 460 Priority" line.long 0x10 "IPR116,Interrupt Priority Register" hexmask.long.byte 0x10 24.--31. 1. " PRI_467 ,Interrupt 467 Priority" hexmask.long.byte 0x10 16.--23. 1. " PRI_466 ,Interrupt 466 Priority" hexmask.long.byte 0x10 8.--15. 1. " PRI_465 ,Interrupt 465 Priority" hexmask.long.byte 0x10 0.--7. 1. " PRI_464 ,Interrupt 464 Priority" line.long 0x14 "IPR117,Interrupt Priority Register" hexmask.long.byte 0x14 24.--31. 1. " PRI_471 ,Interrupt 471 Priority" hexmask.long.byte 0x14 16.--23. 1. " PRI_470 ,Interrupt 470 Priority" hexmask.long.byte 0x14 8.--15. 1. " PRI_469 ,Interrupt 469 Priority" hexmask.long.byte 0x14 0.--7. 1. " PRI_468 ,Interrupt 468 Priority" line.long 0x18 "IPR118,Interrupt Priority Register" hexmask.long.byte 0x18 24.--31. 1. " PRI_475 ,Interrupt 475 Priority" hexmask.long.byte 0x18 16.--23. 1. " PRI_474 ,Interrupt 474 Priority" hexmask.long.byte 0x18 8.--15. 1. " PRI_473 ,Interrupt 473 Priority" hexmask.long.byte 0x18 0.--7. 1. " PRI_472 ,Interrupt 472 Priority" line.long 0x1C "IPR119,Interrupt Priority Register" hexmask.long.byte 0x1C 24.--31. 1. " PRI_479 ,Interrupt 479 Priority" hexmask.long.byte 0x1C 16.--23. 1. " PRI_478 ,Interrupt 478 Priority" hexmask.long.byte 0x1C 8.--15. 1. " PRI_477 ,Interrupt 477 Priority" hexmask.long.byte 0x1C 0.--7. 1. " PRI_476 ,Interrupt 476 Priority" else hgroup.long 0x5C0++0x1F hide.long 0x0 "IPR112,Interrupt Priority Register" hide.long 0x4 "IPR113,Interrupt Priority Register" hide.long 0x8 "IPR114,Interrupt Priority Register" hide.long 0xC "IPR115,Interrupt Priority Register" hide.long 0x10 "IPR116,Interrupt Priority Register" hide.long 0x14 "IPR117,Interrupt Priority Register" hide.long 0x18 "IPR118,Interrupt Priority Register" hide.long 0x1C "IPR119,Interrupt Priority Register" endif tree.end width 0x0b else newline textline "COREDEBUG component base address not specified" newline endif tree.end sif (CORENAME()=="CORTEXM33F") tree "Floating-point Unit (FPU)" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 8. group.long 0xF34++0x0B line.long 0x00 "FPCCR,Floating-Point Context Control Register" bitfld.long 0x00 31. " ASPEN ,Execution of a floating-point instruction sets the CONTROL.FPCA bit to 1" "Disabled,Enabled" bitfld.long 0x00 30. " LSPEN ,Enables lazy context save of FP state" "Disabled,Enabled" bitfld.long 0x00 29. " LSPENS ,This bit controls whether the LSPEN bit is writeable from the Non-secure state" "Writeable,Write ignored" newline bitfld.long 0x00 28. " CLRONRET ,Clear floating point caller saved registers on exception return" "Disabled,Enabled" bitfld.long 0x00 27. " CLRONRETS ,Clear on return Secure only" "Both states,Secure only" bitfld.long 0x00 26. " TS ,Treat as Secure" "Disabled,Enabled" newline bitfld.long 0x00 10. " UFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the UsageFault exception to pending" "Not able,Able" bitfld.long 0x00 9. " SPLIMVIOL ,Indicates whether the FP context violates the stack pointer limit that was active when lazy state preservation was activated" "Low,High" bitfld.long 0x00 8. " MONRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the DebugMonitor exception to pending" "Not able,Able" newline bitfld.long 0x00 7. " SFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the SecureFault exception to pending" "Not able,Able" bitfld.long 0x00 6. " BFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the BusFault exception to pending" "Not able,Able" bitfld.long 0x00 5. " MMRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the MemManage exception to pending" "Not able,Able" newline bitfld.long 0x00 4. " HFRDY ,Indicates whether the software executing when the processor allocated the FP stack frame was able to set the HardFault exception to pending" "Not able,Able" bitfld.long 0x00 3. " THREAD ,Indicates the processor mode when it allocated the FP stack frame" "Handler,Thread" bitfld.long 0x00 2. " S ,Indicates the FP context belongs to the specified security state" "Non-secure,Secure" newline bitfld.long 0x00 1. " USER ,Indicates the privilege level of the software executing" "Privileged,Unprivileged" bitfld.long 0x00 0. " LSPACT ,Indicates whether Lazy preservation of the FP state is active" "Not active,Active" line.long 0x04 "FPCAR,Floating-Point Context Address Register" hexmask.long 0x04 3.--31. 0x8 " ADDRESS ,The location of the unpopulated floating-point register space allocated on an exception stack frame" line.long 0x08 "FPDSCR,Floating-Point Default Status Control Register" bitfld.long 0x08 26. " AHP ,Default value for FPSCR.AHP" "IEEE 754-2008,Alternative" bitfld.long 0x08 25. " DN ,Default value for FPSCR.DN" "NaN operands,Any operation" bitfld.long 0x08 24. " FZ ,Default value for FPSCR.FZ" "No Flush mode,Flush mode" newline bitfld.long 0x08 22.--23. " RMODE ,Default value for FPSCR.RMode" "Round to Nearest,Round towards Plus Infinity,Round towards Minus Infinity,Round towards Zero" rgroup.long 0xF40++0x0B line.long 0x00 "MVFR0,Media and FP Feature Register 0" bitfld.long 0x00 28.--31. " FPRNDMOD ,Indicates the rounding modes supported by the FP floating-point hardware" ",All supported,?..." bitfld.long 0x00 20.--23. " SQRROOT ,Indicates the hardware support for FP square root operations" ",Supported,?..." bitfld.long 0x00 16.--19. " DIV ,Indicates the hardware support for FP divide operations" ",Supported,?..." newline bitfld.long 0x00 8.--11. " DBLPREC ,Indicates the hardware support for FP double_precision operations" "Not supported,,Supported,?..." bitfld.long 0x00 4.--7. " SNGLPREC ,Indicates the hardware support for FP single-precision operations" ",,Supported,?..." bitfld.long 0x00 0.--3. " A_SIMD ,Indicates the size of the FP register bank" ",Supported-16x64-bit,?..." line.long 0x04 "MVFR1,Media and FP Feature Register 1" bitfld.long 0x04 28.--31. " FP_FUSED_MAC ,Indicates whether the FP supports fused multiply accumulate operations" ",Supported,?..." bitfld.long 0x04 24.--27. " FP_HPFP ,Indicates whether the FP supports half-precision and double-precision floating-point conversion instructions" ",Half-single,Half-single and half-double,?..." newline bitfld.long 0x04 4.--7. " D_NAN ,Indicates whether the FP hardware implementation supports only the Default NaN mode" ",NaN propagation,?..." bitfld.long 0x04 0.--3. " FTZ_MODE ,Indicates whether the FP hardware implementation supports only the Flush-to-Zero mode of operation" ",Fully denormalized,?..." line.long 0x08 "MVFR2,Media and FP Feature Register 2" bitfld.long 0x08 4.--7. " VFP_MISC ,Indicates the hardware support for FP miscellaneous features" "Not supported,,,,Supported,?..." width 0xB else newline textline "COREDEBUG component base address not specified" newline endif tree.end endif tree "Debug" tree "Core Debug" sif COMPonent.AVAILABLE("COREDEBUG") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1)) width 13. group.long 0xD30++0x03 line.long 0x00 "DFSR,Debug Fault Status Register" eventfld.long 0x00 4. " EXTERNAL ,Indicates a debug event generated because of the assertion of an external debug request" "Not generated,Generated" eventfld.long 0x00 3. " VCATCH ,Indicates triggering of a Vector catch" "Not triggered,Triggered" eventfld.long 0x00 2. " DWTTRAP ,Indicates a debug event generated by the DWT" "Not generated,Generated" newline eventfld.long 0x00 1. " BKPT ,Indicates a debug event generated by BKPT instruction execution or a breakpoint match in FPB" "Not generated,Generated" eventfld.long 0x00 0. " HALTED ,Indicates a debug event generated by either a C_HALT or C_STEP request, triggered by a write to the DHCSR or a step request triggered by setting DEMCR.MON_STEP to 1" "Not generated,Generated" newline hgroup.long 0xDF0++0x03 hide.long 0x00 "DHCSR,Debug Halting Control and Status Register" in newline wgroup.long 0xDF4++0x03 line.long 0x00 "DCRSR,Debug Core Register Selector Register" bitfld.long 0x00 16. " REGWNR ,Specifies the access type for the transfer" "Read,Write" hexmask.long.byte 0x00 0.--6. 1. " REGSEL ,Specifies the ARM core register, special-purpose register or Floating-point extension register" group.long 0xDF8++0x03 line.long 0x00 "DCRDR,Debug Core Register Data Register" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("COREDEBUG",-1))+0xDFC))&0x10000)==0x10000) group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" bitfld.long 0x00 18. " MON_STEP ,Setting this bit to 1 makes the step request pending" "No step,Step" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" newline bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" else group.long 0xDFC++0x03 line.long 0x00 "DEMCR,Debug Exception and Monitor Control Register" bitfld.long 0x00 24. " TRCENA ,Global enable for all DWT and ITM features" "Disabled,Enabled" bitfld.long 0x00 20. " SDME ,Indicates whether the DebugMonitor targets the Secure or the Non-secure state" "Non-secure,Secure" bitfld.long 0x00 19. " MON_REQ ,DebugMonitor semaphore bit" "0,1" newline bitfld.long 0x00 17. " MON_PEND ,Sets or clears the pending state of the DebugMonitor exception" "Not pending,Pending" bitfld.long 0x00 16. " MON_EN ,Enable the DebugMonitor exception" "Disabled,Enabled" bitfld.long 0x00 11. " VC_SFERR ,SecureFault vector catch enable" "Disabled,Enabled" bitfld.long 0x00 10. " VC_HARDERR ,Enable halting debug trap on a HardFault exception" "Disabled,Enabled" newline bitfld.long 0x00 9. " VC_INTERR ,Enable halting debug trap on a fault occurring during exception entry or exception return" "Disabled,Enabled" bitfld.long 0x00 8. " VC_BUSERR ,Enable halting debug trap on a BusFault exception" "Disabled,Enabled" bitfld.long 0x00 7. " VC_STATERR ,Enable halting debug trap on a UsageFault exception caused by a state information error" "Disabled,Enabled" bitfld.long 0x00 6. " VC_CHKERR ,Enable halting debug trap on a UsageFault exception caused by a checking error" "Disabled,Enabled" newline bitfld.long 0x00 5. " VC_NOCPERR ,Enable halting debug trap on a UsageFault caused by an access to a Coprocessor" "Disabled,Enabled" bitfld.long 0x00 4. " VC_MMERR ,Enable halting debug trap on a MemManage exception" "Disabled,Enabled" bitfld.long 0x00 0. " VC_CORERESET ,Enable Reset Vector Catch" "Disabled,Enabled" endif newline group.long 0xE04++0x07 line.long 0x00 "DAUTHCTRL,Debug Authentication Control Register" bitfld.long 0x00 3. " INTSPNIDEN ,Internal secure non-invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 2. " SPNIDENSEL ,Secure non-invasive debug enable select.Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure non-invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPNIDEN" bitfld.long 0x00 1. " INTSPIDEN ,Internal secure invasive debug enable" "Disabled,Enabled" bitfld.long 0x00 0. " SPIDENSEL ,Secure invasive debug enable select. Selects between DAUTHCTRL and the IMPLEMENTATION DEFINED external authentication interface for control of Secure invasive debug" "Ext. auth. interface,DAUTHCTRL.INTSPIDEN" line.long 0x04 "DSCSR,Debug Security Control and Status Register" bitfld.long 0x04 16. " CDS ,This field indicates the current security state of the processor" "Non-secure,Secure" bitfld.long 0x04 1. " SBRSEL ,Secure banked register select" "Non-secure,Secure" bitfld.long 0x04 0. " SBRSELEN ,Secure banked register select enable" "Disabled,Enabled" rgroup.long 0xFB8++0x03 line.long 0x00 "DAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. " SNI ,Secure non-invasive debug implemented" ",Implemented" bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enabled" "0,1" bitfld.long 0x00 5. " SI ,Secure invasive debug features implemented" ",Implemented" bitfld.long 0x00 4. " SE ,Secure invasive debug enabled" "0,1" newline bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implemented" ",Implemented" bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enabled" "0,1" bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implemented" ",Implemented" bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enabled" "0,1" width 0x0B else newline textline "COREDEBUG component base address not specified" newline endif tree.end tree "Flash Patch and Breakpoint Unit (FPB)" sif COMPonent.AVAILABLE("FPB") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1)) width 12. group.long 0x00++0x03 line.long 0x00 "FP_CTRL,Flash Patch Control Register" bitfld.long 0x00 28.--31. " REV ,Flash Patch Breakpoint architecture revision" "Reserved,Version 2,?..." rbitfld.long 0x00 4.--7. 12.--14. " NUM_CODE ,The number of instruction address comparators" "0,1,2,3,4,5,6,7,?..." rbitfld.long 0x00 8.--11. " NUM_LIT ,Number of literal comparators" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 1. " KEY ,Key Field" "Low,High" bitfld.long 0x00 0. " ENABLE ,Flash Patch Unit Enable" "Disabled,Enabled" textline " " if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x04))&0x20000000)==0x20000000) rgroup.long 0x04++0x03 line.long 0x00 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported" hexmask.long 0x00 5.--28. 0x20 " REMAP ,Remap address" else rgroup.long 0x04++0x03 line.long 0x00 "FP_REMAP,Flash Patch Remap Register" bitfld.long 0x00 29. " RMPSPT ,Indicates whether the FPB unit supports Flash Patch remap" "Not supported,Supported" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x8))&0x01)==0x00) group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x8++0x03 line.long 0x00 "FP_COMP0,Flash Patch Comparator Register 0" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xC))&0x01)==0x00) group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0xC++0x03 line.long 0x00 "FP_COMP1,Flash Patch Comparator Register 1" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x10))&0x01)==0x00) group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x10++0x03 line.long 0x00 "FP_COMP2,Flash Patch Comparator Register 2" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x14))&0x01)==0x00) group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x14++0x03 line.long 0x00 "FP_COMP3,Flash Patch Comparator Register 3" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x18))&0x01)==0x00) group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x18++0x03 line.long 0x00 "FP_COMP4,Flash Patch Comparator Register 4" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x1C))&0x01)==0x00) group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x1C++0x03 line.long 0x00 "FP_COMP5,Flash Patch Comparator Register 5" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x20))&0x01)==0x00) group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x20++0x03 line.long 0x00 "FP_COMP6,Flash Patch Comparator Register 6" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0x24))&0x01)==0x00) group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" bitfld.long 0x00 31. " FE ,Specifies if Flash Patch enabled" "Disabled,Enabled" hexmask.long 0x00 2.--28. 0x04 " FPADDR ,Specifies bits[28:2] of the Flash Patch address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" else group.long 0x24++0x03 line.long 0x00 "FP_COMP7,Flash Patch Comparator Register 7" textfld " " hexmask.long 0x00 1.--31. 0x02 " BPADDR ,Breakpoint address" bitfld.long 0x00 0. " BE ,Selects between flashpatch and breakpoint functionality" "FP mode,BP mode" endif tree "CoreSight Identification Registers" width 12. rgroup.long 0xFCC++0x03 line.long 0x00 "FP_DEVTYPE,FPB CoreSight Device Type Register" hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type" hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type" if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("FPB",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "FP_DEVARCH,FPB CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFE0++0x0F line.long 0x00 "FP_PIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "FP_PIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "FP_PIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0C "FP_PIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "FP_PIDR4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "FP_CIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "FP_CIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "FP_CIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "FP_CIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0b else newline textline "FPB component base address not specified" newline endif tree.end tree "Data Watchpoint and Trace Unit (DWT)" sif COMPonent.AVAILABLE("DWT") base CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)) width 16. group.long 0x00++0x03 line.long 0x00 "DWT_CTRL,Control Register" rbitfld.long 0x00 28.--31. " NUMCOMP ,Number of comparators implemented" "0,1,2,3,4,5,6,7,8,?..." rbitfld.long 0x00 27. " NOTRCPKT ,Shows whether the implementation supports trace sampling and exception tracing" "Supported,Not supported" rbitfld.long 0x00 25. " NOCYCCNT ,Shows whether the implementation supports a cycle counter" "Supported,Not supported" textline " " rbitfld.long 0x00 24. " NOPRFCNT ,Shows whether the implementation supports the profiling counters" "Supported,Not supported" bitfld.long 0x00 23. " CYCDISS ,Controls whether the cycle counter is prevented from incrementing while the PE is in Secure state" "No,Yes" bitfld.long 0x00 22. " CYCEVTENA ,Enables POSTCNT underflow Event counter packets generation" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " FOLDEVTENA ,Enables generation of the Folded-instruction counter overflow event" "Disabled,Enabled" bitfld.long 0x00 20. " LSUEVTENA ,Enables generation of the LSU counter overflow event" "Disabled,Enabled" bitfld.long 0x00 19. " SLEEPEVTENA ,Enables generation of the Sleep counter overflow event" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " EXCEVTENA ,Enables generation of the Exception overhead counter overflow event" "Disabled,Enabled" bitfld.long 0x00 17. " CPIEVTENA ,Enables generation of the CPI counter overflow event" "Disabled,Enabled" bitfld.long 0x00 16. " EXCTRCENA ,Enables generation of exception trace" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " PCSAMPLENA ,Enables use of POSTCNT counter as a timer for Periodic PC sample packet generation" "Disabled,Enabled" bitfld.long 0x00 10.--11. " SYNCTAP ,Selects the position of the synchronization packet counter tap on the CYCCNT counter" "Disabled,CYCCNT[24],CYCCNT[26],CYCCNT[28]" bitfld.long 0x00 9. " CYCTAP ,Selects the position of the POSTCNT tap on the CYCCNT counter" "CYCCNT[6],CYCCNT[10]" textline " " bitfld.long 0x00 5.--8. " POSTINIT ,Initial value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1.--4. " POSTPRESET ,Reload value for the POSTCNT counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " CYCCNTENA ,Enables CYCCNT" "Disabled,Enabled" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x1000000)==0x0000000) group.long 0x04++0x03 line.long 0x00 "DWT_CYCCNT,Cycle Count register" endif if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1)))&0x2000000)==0x0000000) group.long 0x08++0x17 line.long 0x00 "DWT_CPICNT,CPI Count register" hexmask.long.byte 0x00 0.--7. 1. " CPICNT ,Base instruction overhead counter" line.long 0x04 "DWT_EXCCNT,Exception Overhead Count Register" hexmask.long.byte 0x04 0.--7. 1. " EXCCNT ,The exception overhead counter" line.long 0x08 "DWT_SLEEPCNT,Sleep Count Register" hexmask.long.byte 0x08 0.--7. 1. " SLEEPCNT ,Sleep Counter" line.long 0x10 "DWT_LSUCNT,LSU Count Register" hexmask.long.byte 0x10 0.--7. 1. " LSUCNT ,Load-store overhead counter" line.long 0x14 "DWT_FOLDCNT,Folded-instruction Count register" hexmask.long.byte 0x14 0.--7. 1. " FOLDCNT ,Folded-instruction counter" endif rgroup.long 0x1C++0x03 line.long 0x00 "DWT_PCSR,Program Counter Sample register" textline " " if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)==0x1) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x4) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xC) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x20+0x08)&0xF)<0xF) group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x20++0x03 line.long 0x00 "DWT_COMP0,DWT Comparator Register 0" endif group.long (0x20+0x08)++0x03 line.long 0x00 "DWT_FUNCTION0,DWT Function Register 0" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)==0x1) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x4) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xC) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x30+0x08)&0xF)<0xF) group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x30++0x03 line.long 0x00 "DWT_COMP1,DWT Comparator Register 1" endif group.long (0x30+0x08)++0x03 line.long 0x00 "DWT_FUNCTION1,DWT Function Register 1" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)==0x1) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x4) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xC) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x40+0x08)&0xF)<0xF) group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x40++0x03 line.long 0x00 "DWT_COMP2,DWT Comparator Register 2" endif group.long (0x40+0x08)++0x03 line.long 0x00 "DWT_FUNCTION2,DWT Function Register 2" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" if ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)==0x1) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 1. " CYCVALUE ,Cycle value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x2&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x4) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 1.--31. 1. " PCVALUE ,PC value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x8&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xC) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 1. " DVALUE ,Data1 value" elif ((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0x4&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0x8||(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)>=0xC&&(per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0x50+0x08)&0xF)<0xF) group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" hexmask.long 0x00 0.--31. 0x01 " DADDR ,Data address" else group.long 0x50++0x03 line.long 0x00 "DWT_COMP3,DWT Comparator Register 3" endif group.long (0x50+0x08)++0x03 line.long 0x00 "DWT_FUNCTION3,DWT Function Register 3" bitfld.long 0x00 27.--31. " ID ,Identifies the capabilities of comparator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24. " MATCHED ,Comparator match" "Not matched,Matched" bitfld.long 0x00 10.--11. " DATAVSIZE ,Data Value Size" "8-bit,16-bit,32-bit,Reserved" textline " " bitfld.long 0x00 4.--5. " ACTION ,These bits are ignored and the comparator generates no actions if it is disabled by MATCH" "Trigger only,Generate debug event,Trace data value,Trace address" bitfld.long 0x00 0.--3. " MATCH ,Defines what this comparator matches against" "Disabled,Cycle counter,Instruction address,Instruction address limit,Data address (RW),Data address (W),Data address (R),Data address limit,Data value (RW),Data value (W),Data value (R),Linked data value,Data address/Data value (RW),Data address/Data value (W),Data address/Data value (R),Reserved" tree "CoreSight Identification Registers" width 13. if (((per.l(CONvert.ADDRESSTODUALPORT(COMPonent.BASE("DWT",-1))+0xFBC))&0x100000)==0x100000) rgroup.long 0xFBC++0x03 line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register" hexmask.long.word 0x00 21.--31. 1. " ARCHITECT ,Component architect" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" bitfld.long 0x00 16.--19. " REVISION ,Architecture revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " ARCHVER ,Architecture version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " ARCHPART ,Architecture part" else rgroup.long 0xFBC++0x03 line.long 0x00 "DWT_DEVARCH,DWT CoreSight Device Architecture Register" bitfld.long 0x00 20. " PRESENT ,Register present" "Not present,Present" endif rgroup.long 0xFCC++0x03 line.long 0x00 "DWT_DEVTYPE,Device Type Identifier register" hexmask.long.byte 0x00 4.--7. 1. " SUB ,Sub-type" hexmask.long.byte 0x00 0.--3. 1. " MAJOR ,Major type" rgroup.long 0xFE0++0x0F line.long 0x00 "DWT_PIDR0,Peripheral ID0" hexmask.long.byte 0x00 0.--7. 1. " Part_Num[7:0] ,Part Number bits[7:0]" line.long 0x04 "DWT_PIDR1,Peripheral ID1" hexmask.long.byte 0x04 4.--7. 1. " JEP106ID[3:0] ,JEP106 ID code bits[3:0]" hexmask.long.byte 0x04 0.--3. 1. " Part_Num[11:8] ,Part Number bits[11:8]" line.long 0x08 "DWT_PIDR2,Peripheral ID2" hexmask.long.byte 0x08 4.--7. 1. " Revision ,Revision" bitfld.long 0x08 3. " JEDEC ,JEDEC assigned ID fields" "0,JEDEC" hexmask.long.byte 0x08 0.--2. 1. " JEP106ID[6:4] ,JEP106 ID code bits[6:4]" line.long 0x0c "DWT_PIDR3,Peripheral ID3" hexmask.long.byte 0x0C 4.--7. 1. " RevAnd ,Minor revision field" hexmask.long.byte 0x0C 0.--3. 1. " CMB ,Customer-modified block" rgroup.long 0xFD0++0x03 line.long 0x00 "DWT_PIDR4,Peripheral Identification Register 4" hexmask.long.byte 0x00 4.--7. 1. " Count ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CC ,JEP106 continuation code" rgroup.long 0xFF0++0x0F line.long 0x00 "DWT_CIDR0,Component ID0 (Preamble)" hexmask.long.byte 0x00 0.--7. 1. " PRMBL_0 ,CoreSight component identification preamble" line.long 0x04 "DWT_CIDR1,Component ID1" hexmask.long.byte 0x04 4.--7. 1. " CC ,Component Class" hexmask.long.byte 0x04 0.--3. 1. " PRMBL_1 ,CoreSight component class" line.long 0x08 "DWT_CIDR2,Component ID2" hexmask.long.byte 0x08 0.--7. 1. " PRMBL_2 ,CoreSight component identification preamble" line.long 0x0c "DWT_CIDR3,Component ID3" hexmask.long.byte 0x0C 0.--7. 1. " PRMBL_3 ,CoreSight component identification preamble" tree.end width 0x0b else newline textline "DWT component base address not specified" newline endif tree.end tree.end AUTOINDENT.POP tree.end tree "ADC (Analog-to-Digital Converter)" base ad:0x0 tree "ADC0" base ad:0x40012400 group.long 0x0++0x3B line.long 0x0 "STAT,status register" bitfld.long 0x0 30. "WDE1,Analog watchdog 1 event flag" "0,1" bitfld.long 0x0 4. "STRC,Start flag of regular channel group" "0,1" bitfld.long 0x0 3. "STIC,Start flag of inserted channel group" "0,1" bitfld.long 0x0 2. "EOIC,End of inserted group conversion flag" "0,1" bitfld.long 0x0 1. "EOC,End of group conversion flag" "0,1" bitfld.long 0x0 0. "WDE0,Analog watchdog event 0 flag" "0,1" line.long 0x4 "CTL0,control register 0" bitfld.long 0x4 30. "WDE1IE,Interrupt enable for WDE1" "0,1" bitfld.long 0x4 23. "RWD0EN,Regular channel analog watchdog" "0,1" bitfld.long 0x4 22. "IWDEN,Inserted channel analog watchdog" "0,1" hexmask.long.byte 0x4 16.--19. 1. "SYNCM,Sync mode selection" bitfld.long 0x4 13.--15. "DISNUM,Number of conversions in" "0,1,2,3,4,5,6,7" bitfld.long 0x4 12. "DISIC,Discontinuous mode on" "0,1" bitfld.long 0x4 11. "DISRC,Discontinuous mode on regular" "0,1" bitfld.long 0x4 10. "ICA,Inserted channel group convert" "0,1" bitfld.long 0x4 9. "WDSC,When in scan mode analog watchdog" "0,1" newline bitfld.long 0x4 8. "SM,Scan mode" "0,1" bitfld.long 0x4 7. "EOICIE,Interrupt enable for EOIC" "0,1" bitfld.long 0x4 6. "WDEIE,Analog watchdog WDE" "0,1" bitfld.long 0x4 5. "EOCIE,Interrupt enable for EOC" "0,1" hexmask.long.byte 0x4 0.--4. 1. "WDCHSEL,Analog watchdog channel select" line.long 0x8 "CTL1,control register 1" bitfld.long 0x8 24. "INREFEN,Channel 17 (internal reference voltage) enable of ADC0" "0,1" bitfld.long 0x8 23. "TSVEN,Channel 16 (temperature sensor) enable of ADC0" "0,1" bitfld.long 0x8 22. "SWRCST,Start on regular channel" "0,1" bitfld.long 0x8 21. "SWICST,Start on inserted channel" "0,1" bitfld.long 0x8 20. "ETERC,External trigger select for regular channel" "0,1" bitfld.long 0x8 17. "ETSRC,External trigger select for regular channel" "0,1" bitfld.long 0x8 15. "ETEIC,External trigger enable for inserted channel" "0,1" bitfld.long 0x8 12. "ETSIC,External trigger select for inserted channel" "0,1" bitfld.long 0x8 11. "DAL,Data alignment" "0,1" newline bitfld.long 0x8 8. "DMA,DMA request enable" "0,1" bitfld.long 0x8 3. "RSTCLB,Reset calibration" "0,1" bitfld.long 0x8 2. "CLB,ADC calibration" "0,1" bitfld.long 0x8 1. "CTN,Continuous mode" "0,1" bitfld.long 0x8 0. "ADCON,ADC on" "0,1" line.long 0xC "SAMPT0,Sample time register 0" bitfld.long 0xC 21.--23. "SPT17,Channel 17 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 18.--20. "SPT16,Channel 16 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 15.--17. "SPT15,Channel 15 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 12.--14. "SPT14,Channel 14 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 9.--11. "SPT13,Channel 13 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 6.--8. "SPT12,Channel 12 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 3.--5. "SPT11,Channel 11 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0.--2. "SPT10,Channel 10 sample time" "0,1,2,3,4,5,6,7" line.long 0x10 "SAMPT1,Sample time register 1" bitfld.long 0x10 27.--29. "SPT9,Channel 9 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--26. "SPT8,Channel 8 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 21.--23. "SPT7,Channel 7 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 18.--20. "SPT6,Channel 6 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 15.--17. "SPT5,Channel 5 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 12.--14. "SPT4,Channel 4 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9.--11. "SPT3,Channel 3 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "SPT2,Channel 2 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 3.--5. "SPT1,Channel 1 sample time" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 0.--2. "SPT0,Channel 0 sample time" "0,1,2,3,4,5,6,7" line.long 0x14 "IOFF0,Inserted channel data offset register" hexmask.long.word 0x14 0.--11. 1. "IOFF,Data offset for inserted channel" line.long 0x18 "IOFF1,Inserted channel data offset register" hexmask.long.word 0x18 0.--11. 1. "IOFF,Data offset for inserted channel" line.long 0x1C "IOFF2,Inserted channel data offset register" hexmask.long.word 0x1C 0.--11. 1. "IOFF,Data offset for inserted channel" line.long 0x20 "IOFF3,Inserted channel data offset register" hexmask.long.word 0x20 0.--11. 1. "IOFF,Data offset for inserted channel" line.long 0x24 "WDHT0,watchdog higher threshold" hexmask.long.word 0x24 0.--11. 1. "WDHT0,Analog watchdog higher" line.long 0x28 "WDLT0,watchdog lower threshold" hexmask.long.word 0x28 0.--11. 1. "WDLT0,Analog watchdog lower" line.long 0x2C "RSQ0,regular sequence register 0" hexmask.long.byte 0x2C 20.--23. 1. "RL,Regular channel group" hexmask.long.byte 0x2C 15.--19. 1. "RSQ15,15th conversion in regular" hexmask.long.byte 0x2C 10.--14. 1. "RSQ14,14th conversion in regular" hexmask.long.byte 0x2C 5.--9. 1. "RSQ13,13th conversion in regular" hexmask.long.byte 0x2C 0.--4. 1. "RSQ12,12th conversion in regular" line.long 0x30 "RSQ1,regular sequence register 1" hexmask.long.byte 0x30 25.--29. 1. "RSQ11,11th conversion in regular" hexmask.long.byte 0x30 20.--24. 1. "RSQ10,10th conversion in regular" hexmask.long.byte 0x30 15.--19. 1. "RSQ9,9th conversion in regular" hexmask.long.byte 0x30 10.--14. 1. "RSQ8,9th conversion in regular" hexmask.long.byte 0x30 5.--9. 1. "RSQ7,8th conversion in regular" hexmask.long.byte 0x30 0.--4. 1. "RSQ6,7th conversion in regular" line.long 0x34 "RSQ2,regular sequence register 2" hexmask.long.byte 0x34 25.--29. 1. "RSQ5,6th conversion in regular" hexmask.long.byte 0x34 20.--24. 1. "RSQ4,5th conversion in regular" hexmask.long.byte 0x34 15.--19. 1. "RSQ3,4th conversion in regular" hexmask.long.byte 0x34 10.--14. 1. "RSQ2,3rd conversion in regular" hexmask.long.byte 0x34 5.--9. 1. "RSQ1,2nd conversion in regular" hexmask.long.byte 0x34 0.--4. 1. "RSQ0,1st conversion in regular" line.long 0x38 "ISQ,Inserted sequence register" bitfld.long 0x38 20.--21. "IL,Inserted channel group length" "0,1,2,3" hexmask.long.byte 0x38 15.--19. 1. "ISQ3,4th conversion in inserted" hexmask.long.byte 0x38 10.--14. 1. "ISQ2,3rd conversion in inserted" hexmask.long.byte 0x38 5.--9. 1. "ISQ1,2nd conversion in inserted" hexmask.long.byte 0x38 0.--4. 1. "ISQ0,1st conversion in inserted" rgroup.long 0x3C++0x13 line.long 0x0 "IDATA0,Inserted data register 0" hexmask.long.word 0x0 0.--15. 1. "IDATAn,Inserted number 0 conversion data" line.long 0x4 "IDATA1,Inserted data register 1" hexmask.long.word 0x4 0.--15. 1. "IDATAn,Inserted number 1 conversion data" line.long 0x8 "IDATA2,Inserted data register 2" hexmask.long.word 0x8 0.--15. 1. "IDATAn,Inserted number 2 conversion data" line.long 0xC "IDATA3,Inserted data register 3" hexmask.long.word 0xC 0.--15. 1. "IDATAn,Inserted number 3 conversion data" line.long 0x10 "RDATA,regular data register" hexmask.long.word 0x10 16.--31. 1. "ADC1RDTR,ADC1 regular channel data" hexmask.long.word 0x10 0.--15. 1. "RDATA,Regular channel data" rgroup.long 0x80++0x3 line.long 0x0 "OVSAMPCTL,Oversample control register" bitfld.long 0x0 12.--13. "DRES,ADC resolution" "0,1,2,3" bitfld.long 0x0 9. "TOVS,Triggered Oversampling" "0,1" hexmask.long.byte 0x0 5.--8. 1. "OVSS,Oversampling shift" bitfld.long 0x0 2.--4. "OVSR,Oversampling ratio" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "OVSEN,Oversampling Enable" "0,1" group.long 0xA0++0x3 line.long 0x0 "WD1SR,Watchdog 1 Channel Selection Register" hexmask.long.tbyte 0x0 0.--17. 1. "AWD1CS,Analog watchdog 1 channel selection" group.long 0xA8++0x3 line.long 0x0 "WDT1,Watchdog threshold register 1" hexmask.long.byte 0x0 16.--23. 1. "WDHT1,Analog watchdog 1 channel selection" hexmask.long.byte 0x0 0.--7. 1. "WDLT1,Analog watchdog 1 low threshold" tree.end tree "ADC1" base ad:0x40012800 group.long 0x0++0x3B line.long 0x0 "STAT,status register" bitfld.long 0x0 30. "WDE1,Analog watchdog 1 event flag" "0,1" bitfld.long 0x0 4. "STRC,Start flag of regular channel group" "0,1" bitfld.long 0x0 3. "STIC,Start flag of inserted channel group" "0,1" bitfld.long 0x0 2. "EOIC,End of inserted group conversion flag" "0,1" bitfld.long 0x0 1. "EOC,End of group conversion flag" "0,1" bitfld.long 0x0 0. "WDE0,Analog watchdog event 0 flag" "0,1" line.long 0x4 "CTL0,control register 0" bitfld.long 0x4 30. "WDE1IE,Interrupt enable for WDE1" "0,1" bitfld.long 0x4 23. "RWDEN,Regular channel analog watchdog" "0,1" bitfld.long 0x4 22. "IWDEN,Inserted channel analog watchdog" "0,1" hexmask.long.byte 0x4 16.--19. 1. "SYNCM,Sync mode selection" bitfld.long 0x4 13.--15. "DISNUM,Number of conversions in" "0,1,2,3,4,5,6,7" bitfld.long 0x4 12. "DISIC,Discontinuous mode on" "0,1" bitfld.long 0x4 11. "DISRC,Discontinuous mode on regular" "0,1" bitfld.long 0x4 10. "ICA,Inserted channel group convert" "0,1" bitfld.long 0x4 9. "WD0SC,When in scan mode analog watchdog" "0,1" newline bitfld.long 0x4 8. "SM,Scan mode" "0,1" bitfld.long 0x4 7. "EOICIE,Interrupt enable for EOIC" "0,1" bitfld.long 0x4 6. "WDE0IE,Analog watchdog WDE0" "0,1" bitfld.long 0x4 5. "EOCIE,Interrupt enable for EOC" "0,1" hexmask.long.byte 0x4 0.--4. 1. "WD0CHSEL,Analog watchdog 0 channel select" line.long 0x8 "CTL1,control register 1" bitfld.long 0x8 22. "SWRCST,Start on regular channel" "0,1" bitfld.long 0x8 21. "SWICST,Start on inserted channel" "0,1" bitfld.long 0x8 20. "ETERC,External trigger select for regular channel" "0,1" bitfld.long 0x8 15. "ETEIC,External trigger enable for inserted channel" "0,1" bitfld.long 0x8 12. "ETSIC,External trigger select for inserted channel" "0,1" bitfld.long 0x8 11. "DAL,Data alignment" "0,1" bitfld.long 0x8 8. "DMA,DMA request enable" "0,1" bitfld.long 0x8 3. "RSTCLB,Reset calibration" "0,1" bitfld.long 0x8 2. "CLB,ADC calibration" "0,1" newline bitfld.long 0x8 1. "CTN,Continuous mode" "0,1" bitfld.long 0x8 0. "ADCON,ADC on" "0,1" line.long 0xC "SAMPT0,Sample time register 0" bitfld.long 0xC 21.--23. "SPT17,Channel 17 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 18.--20. "SPT16,Channel 16 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 15.--17. "SPT15,Channel 15 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 12.--14. "SPT14,Channel 14 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 9.--11. "SPT13,Channel 13 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 6.--8. "SPT12,Channel 12 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 3.--5. "SPT11,Channel 11 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0xC 0.--2. "SPT10,Channel 10 sample time" "0,1,2,3,4,5,6,7" line.long 0x10 "SAMPT1,Sample time register 1" bitfld.long 0x10 27.--29. "SPT9,Channel 9 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 24.--26. "SPT8,Channel 8 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 21.--23. "SPT7,Channel 7 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 18.--20. "SPT6,Channel 6 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 15.--17. "SPT5,Channel 5 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 12.--14. "SPT4,Channel 4 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 9.--11. "SPT3,Channel 3 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 6.--8. "SPT2,Channel 2 sample time" "0,1,2,3,4,5,6,7" bitfld.long 0x10 3.--5. "SPT1,Channel 1 sample time" "0,1,2,3,4,5,6,7" newline bitfld.long 0x10 0.--2. "SPT0,Channel 0 sample time" "0,1,2,3,4,5,6,7" line.long 0x14 "IOFF0,Inserted channel data offset register" hexmask.long.word 0x14 0.--11. 1. "IOFF,Data offset for inserted channel" line.long 0x18 "IOFF1,Inserted channel data offset register" hexmask.long.word 0x18 0.--11. 1. "IOFF,Data offset for inserted channel" line.long 0x1C "IOFF2,Inserted channel data offset register" hexmask.long.word 0x1C 0.--11. 1. "IOFF,Data offset for inserted channel" line.long 0x20 "IOFF3,Inserted channel data offset register" hexmask.long.word 0x20 0.--11. 1. "IOFF,Data offset for inserted channel" line.long 0x24 "WDHT0,watchdog higher threshold" hexmask.long.word 0x24 0.--11. 1. "WDHT0,Analog watchdog higher" line.long 0x28 "WDLT0,watchdog lower threshold" hexmask.long.word 0x28 0.--11. 1. "WDLT0,Analog watchdog lower" line.long 0x2C "RSQ0,regular sequence register 0" hexmask.long.byte 0x2C 20.--23. 1. "RL,Regular channel group" hexmask.long.byte 0x2C 15.--19. 1. "RSQ15,15th conversion in regular" hexmask.long.byte 0x2C 10.--14. 1. "RSQ14,14th conversion in regular" hexmask.long.byte 0x2C 5.--9. 1. "RSQ13,13th conversion in regular" hexmask.long.byte 0x2C 0.--4. 1. "RSQ12,12th conversion in regular" line.long 0x30 "RSQ1,regular sequence register 1" hexmask.long.byte 0x30 25.--29. 1. "RSQ11,11th conversion in regular" hexmask.long.byte 0x30 20.--24. 1. "RSQ10,10th conversion in regular" hexmask.long.byte 0x30 15.--19. 1. "RSQ9,9th conversion in regular" hexmask.long.byte 0x30 10.--14. 1. "RSQ8,9th conversion in regular" hexmask.long.byte 0x30 5.--9. 1. "RSQ7,8th conversion in regular" hexmask.long.byte 0x30 0.--4. 1. "RSQ6,7th conversion in regular" line.long 0x34 "RSQ2,regular sequence register 2" hexmask.long.byte 0x34 25.--29. 1. "RSQ5,6th conversion in regular" hexmask.long.byte 0x34 20.--24. 1. "RSQ4,5th conversion in regular" hexmask.long.byte 0x34 15.--19. 1. "RSQ3,4th conversion in regular" hexmask.long.byte 0x34 10.--14. 1. "RSQ2,3rd conversion in regular" hexmask.long.byte 0x34 5.--9. 1. "RSQ1,2nd conversion in regular" hexmask.long.byte 0x34 0.--4. 1. "RSQ0,1st conversion in regular" line.long 0x38 "ISQ,Inserted sequence register" bitfld.long 0x38 20.--21. "IL,Inserted channel group length" "0,1,2,3" hexmask.long.byte 0x38 15.--19. 1. "ISQ3,4th conversion in inserted" hexmask.long.byte 0x38 10.--14. 1. "ISQ2,3rd conversion in inserted" hexmask.long.byte 0x38 5.--9. 1. "ISQ1,2nd conversion in inserted" hexmask.long.byte 0x38 0.--4. 1. "ISQ0,1st conversion in inserted" rgroup.long 0x3C++0x13 line.long 0x0 "IDATA0,Inserted data register 0" hexmask.long.word 0x0 0.--15. 1. "IDATAn,Inserted number 0 conversion data" line.long 0x4 "IDATA1,Inserted data register 1" hexmask.long.word 0x4 0.--15. 1. "IDATAn,Inserted number 1 conversion data" line.long 0x8 "IDATA2,Inserted data register 2" hexmask.long.word 0x8 0.--15. 1. "IDATAn,Inserted number 2 conversion data" line.long 0xC "IDATA3,Inserted data register 3" hexmask.long.word 0xC 0.--15. 1. "IDATAn,Inserted number 3 conversion data" line.long 0x10 "RDATA,regular data register" hexmask.long.word 0x10 16.--31. 1. "ADC1RDTR,ADC1 regular channel data" hexmask.long.word 0x10 0.--15. 1. "RDATA,Regular channel data" rgroup.long 0x80++0x3 line.long 0x0 "OVSAMPCTL,Oversample control register" bitfld.long 0x0 12.--13. "DRES,ADC resolution" "0,1,2,3" bitfld.long 0x0 9. "TOVS,Triggered Oversampling" "0,1" hexmask.long.byte 0x0 5.--8. 1. "OVSS,Oversampling shift" bitfld.long 0x0 2.--4. "OVSR,Oversampling ratio" "0,1,2,3,4,5,6,7" bitfld.long 0x0 0. "OVSEN,Oversampling Enable" "0,1" group.long 0xA0++0x3 line.long 0x0 "WD1SR,Watchdog 1 Channel Selection Register" hexmask.long.tbyte 0x0 0.--17. 1. "AWD1CS,Analog watchdog 1 channel selection" group.long 0xA8++0x3 line.long 0x0 "WDT1,Watchdog threshold register 1" hexmask.long.byte 0x0 16.--23. 1. "WDHT1,Analog watchdog 1 channel selection" hexmask.long.byte 0x0 0.--7. 1. "WDLT1,Analog watchdog 1 low threshold" tree.end tree.end tree "BKP (Backup Registers)" base ad:0x40006C00 group.long 0x4++0x33 line.long 0x0 "DATA0,Backup data register 0" hexmask.long.word 0x0 0.--15. 1. "DATA,Backup data" line.long 0x4 "DATA1,Backup data register 1" hexmask.long.word 0x4 0.--15. 1. "DATA,Backup data" line.long 0x8 "DATA2,Backup data register 2" hexmask.long.word 0x8 0.--15. 1. "DATA,Backup data" line.long 0xC "DATA3,Backup data register 3" hexmask.long.word 0xC 0.--15. 1. "DATA,Backup data" line.long 0x10 "DATA4,Backup data register 4" hexmask.long.word 0x10 0.--15. 1. "DATA,Backup data" line.long 0x14 "DATA5,Backup data register 5" hexmask.long.word 0x14 0.--15. 1. "DATA,Backup data" line.long 0x18 "DATA6,Backup data register 6" hexmask.long.word 0x18 0.--15. 1. "DATA,Backup data" line.long 0x1C "DATA7,Backup data register 7" hexmask.long.word 0x1C 0.--15. 1. "DATA,Backup data" line.long 0x20 "DATA8,Backup data register 8" hexmask.long.word 0x20 0.--15. 1. "DATA,Backup data" line.long 0x24 "DATA9,Backup data register 9" hexmask.long.word 0x24 0.--15. 1. "DATA,Backup data" line.long 0x28 "OCTL,RTC signal output control register" bitfld.long 0x28 15. "CALDIR,RTC clock calibration direction" "0,1" bitfld.long 0x28 14. "CCOSEL,RTC clock output selection" "0,1" bitfld.long 0x28 9. "ROSEL,RTC output selection" "0,1" bitfld.long 0x28 8. "ASOEN,RTC alarm or second signal output enable" "0,1" bitfld.long 0x28 7. "COEN,RTC clock calibration output enable" "0,1" hexmask.long.byte 0x28 0.--6. 1. "RCCV,RTC clock calibration value" line.long 0x2C "TPCTL,Tamper pin control register" bitfld.long 0x2C 15. "PCSEL,OSC32_IN pin select" "0,1" bitfld.long 0x2C 1. "TPAL,TAMPER pin active level" "0,1" bitfld.long 0x2C 0. "TPEN,TAMPER detection enable" "0,1" line.long 0x30 "TPCS,Tamper control and status register" rbitfld.long 0x30 9. "TIF,Tamper interrupt flag" "0,1" rbitfld.long 0x30 8. "TEF,Tamper event flag" "0,1" bitfld.long 0x30 2. "TPIE,Tamper interrupt enable" "0,1" bitfld.long 0x30 1. "TIR,Tamper interrupt reset" "0,1" bitfld.long 0x30 0. "TER,Tamper event reset" "0,1" tree.end tree "CAN (Controller Area Network)" base ad:0x0 tree "CAN0" base ad:0x4001A000 group.long 0x0++0xB line.long 0x0 "CTL0,Control register 0" bitfld.long 0x0 31. "CANDIS,CAN disable" "0,1" bitfld.long 0x0 30. "INAMOD,Inactive mode enable" "0,1" bitfld.long 0x0 29. "RFEN,Rx FIFO enable" "0,1" bitfld.long 0x0 28. "HALT,Halt CAN" "0,1" rbitfld.long 0x0 27. "NRDY,Not ready" "0,1" bitfld.long 0x0 25. "SWRST,Software reset" "0,1" bitfld.long 0x0 24. "INAS,Inactive mode state" "0,1" newline bitfld.long 0x0 23. "SLPS,This bit is only valid when CAN_sleep mode is enabled" "0,1" bitfld.long 0x0 21. "WERREN,Error warning enable" "0,1" rbitfld.long 0x0 20. "LPS,Low power state" "0,1" bitfld.long 0x0 19. "PNEN,Pretended Networking mode enable" "0,1" bitfld.long 0x0 18. "PNS,Pretended Networking state" "0,1" rbitfld.long 0x0 17. "SRDIS,Self reception disable" "0,1" bitfld.long 0x0 16. "RPFQEN,Rx private filters enable Rx mailbox queue enable" "0,1" newline bitfld.long 0x0 15. "DMAEN,DMA enable" "0,1" bitfld.long 0x0 14. "PNMOD,Pretended Networking mode selection" "0,1" bitfld.long 0x0 13. "LAPRIOEN,Local arbitration priority enable" "0,1" bitfld.long 0x0 12. "MST,Mailbox stop transmission" "0,1" bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0,1" bitfld.long 0x0 8.--9. "FS,Format selection" "0,1,2,3" hexmask.long.byte 0x0 0.--4. 1. "MSZ,Memory size" line.long 0x4 "CTL1,Control register 1" rbitfld.long 0x4 15. "BOIE,Bus off interrupt enable" "0,1" bitfld.long 0x4 14. "ERRSIE,Error summary interrupt enable" "0,1" bitfld.long 0x4 12. "LSCMOD,Loopback and silent communication mode" "0,1" bitfld.long 0x4 11. "TWERRIE,Tx error warning interrupt enable" "0,1" bitfld.long 0x4 10. "RWERRIE,Rx error warning interrupt enable" "0,1" bitfld.long 0x4 7. "BSPMOD,Bit sampling mode" "0,1" bitfld.long 0x4 6. "ABORDIS,Automatic Bus off recovery not enable" "0,1" newline bitfld.long 0x4 5. "TSYNC,Time synchronization enable" "0,1" bitfld.long 0x4 4. "MTO,Mailbox transmission order" "0,1" bitfld.long 0x4 3. "MMOD,Monitor mode" "0,1" line.long 0x8 "TIMER,Timer register" hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value" group.long 0x10++0x3 line.long 0x0 "RMPUBF,Receive mailbox public filter register" hexmask.long 0x0 0.--31. 1. "MFDx,Mailbox filter data" group.long 0x1C++0x7 line.long 0x0 "ERR0,Error register 0" hexmask.long.byte 0x0 24.--31. 1. "REFCNT,Receive error counter for data phase of FD frames" hexmask.long.byte 0x0 16.--23. 1. "TEFCNT,Transmit error count for the data phase of FD frames" hexmask.long.byte 0x0 8.--15. 1. "RECNT,Receive error count defined by the CAN standard" hexmask.long.byte 0x0 0.--7. 1. "TECNT,Transmit error count defined by the CAN standard" line.long 0x4 "ERR1,Error register 1" rbitfld.long 0x4 31. "BRFERR,Bit recessive error in data phase of FD frames" "0,1" rbitfld.long 0x4 30. "BDFERR,Bit dominant error in data phase of FD frames" "0,1" rbitfld.long 0x4 28. "CRCFERR,CRC error in data phase of FD frames" "0,1" rbitfld.long 0x4 27. "FMFERR,Form error in data phase of FD frames" "0,1" rbitfld.long 0x4 26. "STFFERR,Form error in data phase of FD frames" "0,1" bitfld.long 0x4 21. "ERROVR,Error overrun" "0,1" bitfld.long 0x4 20. "ERRFSF,Error summary flag for data phase of FD frames" "0,1" newline bitfld.long 0x4 19. "BORF,Bus off recovery flag" "0,1" rbitfld.long 0x4 18. "SYN,Synchronization flag" "0,1" bitfld.long 0x4 17. "TWERRIF,Tx error warning interrupt flag" "0,1" bitfld.long 0x4 16. "RWERRIF,Rx error warning interrupt flag" "0,1" rbitfld.long 0x4 15. "BRERR,Bit recessive error for all format frames" "0,1" rbitfld.long 0x4 14. "BDERR,Bit dominant error for all format frames" "0,1" rbitfld.long 0x4 13. "ACKERR,ACK error" "0,1" newline rbitfld.long 0x4 12. "CRCERR,CRC error" "0,1" rbitfld.long 0x4 11. "FMERR,Form error" "0,1" rbitfld.long 0x4 10. "STFERR,Stuff error" "0,1" rbitfld.long 0x4 9. "TWERRF,Tx error warning flag" "0,1" rbitfld.long 0x4 8. "RWERRF,Rx error warning flag" "0,1" rbitfld.long 0x4 7. "IDLEF,IDLE flag" "0,1" rbitfld.long 0x4 6. "TS,Transmitting state" "0,1" newline rbitfld.long 0x4 4.--5. "ERRSI,Error state indicator" "0,1,2,3" rbitfld.long 0x4 3. "RS,Receiving state" "0,1" bitfld.long 0x4 2. "BOF,Bus off flag" "0,1" bitfld.long 0x4 1. "ERRSF,Error summary flag" "0,1" bitfld.long 0x4 0. "WERR,Write error" "0,1" group.long 0x28++0x3 line.long 0x0 "INTEN,Interrupt enable register" hexmask.long 0x0 0.--31. 1. "MIEx,Message transmission and reception interrupt enable" group.long 0x30++0x7 line.long 0x0 "STAT,Status register" hexmask.long.tbyte 0x0 8.--31. 1. "MSx,Mailbox x state" bitfld.long 0x0 7. "MS7_RFO,Mailbox 7 state / Rx FIFO overflow" "0,1" bitfld.long 0x0 6. "MS6_RFW,Mailbox 6 state / Rx FIFO warning" "0,1" bitfld.long 0x0 5. "MS5_RFNE,Mailbox 5 state / Rx FIFO not empty" "0,1" bitfld.long 0x0 4. "MS4_RES,Mailbox 4 state / Reserved" "0,1" bitfld.long 0x0 3. "MS3_RES,Mailbox 3 state / Reserved" "0,1" bitfld.long 0x0 2. "MS2_RES,Mailbox 2 state / Reserved" "0,1" newline bitfld.long 0x0 1. "MS1_RES,Mailbox 1 state / Reserved" "0,1" bitfld.long 0x0 0. "MS0_RFC,Mailbox 3 state / Clear Rx FIFO bit" "0,1" line.long 0x4 "CTL2,Control register 2" bitfld.long 0x4 31. "ERRFSIE,Error summary interrupt enable bit for data phase of FD frames" "0,1" bitfld.long 0x4 30. "BORIE,Bus off recovery interrupt enable" "0,1" hexmask.long.byte 0x4 24.--27. 1. "RFFN,Rx FIFO filter number" hexmask.long.byte 0x4 19.--23. 1. "ASD,Arbitration start delay" bitfld.long 0x4 18. "RFO,Receive filter order" "0,1" bitfld.long 0x4 17. "RRFRMS,Remote request frame is stored" "0,1" bitfld.long 0x4 16. "IDERTR_RMF,IDE and RTR field filter type for Rx mailbox reception" "0,1" newline bitfld.long 0x4 15. "ITSRC,Internal counter source" "0,1" bitfld.long 0x4 14. "PREEN,Protocol exception detection enable by CAN standard" "0,1" bitfld.long 0x4 12. "ISO,ISO CAN FD" "0,1" bitfld.long 0x4 11. "EFDIS,Edge filtering disable" "0,1" bitfld.long 0x4 0. "WERRIE,Write error interrupt enable" "0,1" group.long 0x44++0x7 line.long 0x0 "CRCC,CRC for classical frame register" hexmask.long.byte 0x0 16.--20. 1. "ANTM,Associated number of mailbox for transmitting the CRCTC[14:0] value" hexmask.long.word 0x0 0.--14. 1. "CRCTC,Transmitted CRC value for classical frames" line.long 0x4 "RFIFOPUBF,Receive FIFO public filter register" hexmask.long 0x4 0.--31. 1. "FFDx,Rx FIFO filter data" rgroup.long 0x4C++0x3 line.long 0x0 "RFIFOIFMN,Receive FIFO identifier filter matching number register" hexmask.long.word 0x0 0.--8. 1. "IDFMN,Identifier filter matching number" group.long 0x50++0x3 line.long 0x0 "BT,Bit timing register" hexmask.long.word 0x0 21.--30. 1. "BAUDPSC,Baud rate prescaler" hexmask.long.byte 0x0 16.--20. 1. "SJW,Resynchronization jump width" hexmask.long.byte 0x0 10.--15. 1. "PTS,Propagation time segment" hexmask.long.byte 0x0 5.--9. 1. "PBS1,Phase buffer segment 1" hexmask.long.byte 0x0 0.--4. 1. "PBS2,Phase buffer segment 2" group.long 0x880++0x7F line.long 0x0 "RFIFOMPF0,Receive FIFO/mailbox private filter x register" hexmask.long 0x0 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x4 "RFIFOMPF1,Receive FIFO/mailbox private filter x register" hexmask.long 0x4 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x8 "RFIFOMPF2,Receive FIFO/mailbox private filter x register" hexmask.long 0x8 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0xC "RFIFOMPF3,Receive FIFO/mailbox private filter x register" hexmask.long 0xC 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x10 "RFIFOMPF4,Receive FIFO/mailbox private filter x register" hexmask.long 0x10 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x14 "RFIFOMPF5,Receive FIFO/mailbox private filter x register" hexmask.long 0x14 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x18 "RFIFOMPF6,Receive FIFO/mailbox private filter x register" hexmask.long 0x18 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x1C "RFIFOMPF7,Receive FIFO/mailbox private filter x register" hexmask.long 0x1C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x20 "RFIFOMPF8,Receive FIFO/mailbox private filter x register" hexmask.long 0x20 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x24 "RFIFOMPF9,Receive FIFO/mailbox private filter x register" hexmask.long 0x24 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x28 "RFIFOMPF10,Receive FIFO/mailbox private filter x register" hexmask.long 0x28 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x2C "RFIFOMPF11,Receive FIFO/mailbox private filter x register" hexmask.long 0x2C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x30 "RFIFOMPF12,Receive FIFO/mailbox private filter x register" hexmask.long 0x30 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x34 "RFIFOMPF13,Receive FIFO/mailbox private filter x register" hexmask.long 0x34 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x38 "RFIFOMPF14,Receive FIFO/mailbox private filter x register" hexmask.long 0x38 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x3C "RFIFOMPF15,Receive FIFO/mailbox private filter x register" hexmask.long 0x3C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x40 "RFIFOMPF16,Receive FIFO/mailbox private filter x register" hexmask.long 0x40 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x44 "RFIFOMPF17,Receive FIFO/mailbox private filter x register" hexmask.long 0x44 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x48 "RFIFOMPF18,Receive FIFO/mailbox private filter x register" hexmask.long 0x48 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x4C "RFIFOMPF19,Receive FIFO/mailbox private filter x register" hexmask.long 0x4C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x50 "RFIFOMPF20,Receive FIFO/mailbox private filter x register" hexmask.long 0x50 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x54 "RFIFOMPF21,Receive FIFO/mailbox private filter x register" hexmask.long 0x54 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x58 "RFIFOMPF22,Receive FIFO/mailbox private filter x register" hexmask.long 0x58 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x5C "RFIFOMPF23,Receive FIFO/mailbox private filter x register" hexmask.long 0x5C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x60 "RFIFOMPF24,Receive FIFO/mailbox private filter x register" hexmask.long 0x60 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x64 "RFIFOMPF25,Receive FIFO/mailbox private filter x register" hexmask.long 0x64 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x68 "RFIFOMPF26,Receive FIFO/mailbox private filter x register" hexmask.long 0x68 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x6C "RFIFOMPF27,Receive FIFO/mailbox private filter x register" hexmask.long 0x6C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x70 "RFIFOMPF28,Receive FIFO/mailbox private filter x register" hexmask.long 0x70 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x74 "RFIFOMPF29,Receive FIFO/mailbox private filter x register" hexmask.long 0x74 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x78 "RFIFOMPF30,Receive FIFO/mailbox private filter x register" hexmask.long 0x78 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x7C "RFIFOMPF31,Receive FIFO/mailbox private filter x register" hexmask.long 0x7C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" group.long 0xB00++0x27 line.long 0x0 "SLP_CTL0,CAN_sleep mode control register 0" bitfld.long 0x0 17. "WTOIE,Wakeup timeout interrupt enable" "0,1" bitfld.long 0x0 16. "WMIE,Wakeup match interrupt enable" "0,1" hexmask.long.byte 0x0 8.--15. 1. "NMM,Number of messages matching times" bitfld.long 0x0 4.--5. "DATAFT,DATA field filtering type in CAN_sleep mode" "0,1,2,3" bitfld.long 0x0 2.--3. "IDFT,ID field filtering type in CAN_sleep mode" "0,1,2,3" bitfld.long 0x0 0.--1. "FFT,Frame filtering type in CAN_sleep mode" "0,1,2,3" line.long 0x4 "SLP_TO,CAN_sleep mode timeout register" hexmask.long.word 0x4 0.--15. 1. "WTO,Wakeup timeout" line.long 0x8 "SLP_STAT,CAN_sleep mode status register" bitfld.long 0x8 17. "WTOS,Wakeup timeout flag status" "0,1" bitfld.long 0x8 16. "WMS,Wakeup match flag status" "0,1" hexmask.long.byte 0x8 8.--15. 1. "MMCNT,Matching message counter in CAN_sleep mode" rbitfld.long 0x8 7. "MMCNTS,Matching message counter state" "0,1" line.long 0xC "SLP_EID0,CAN_sleep mode expected identifier 0 register" bitfld.long 0xC 30. "EIDE,Expected IDE in CAN_sleep mode" "0,1" bitfld.long 0xC 29. "ERTR,Expected RTR in CAN_sleep mode" "0,1" hexmask.long 0xC 0.--28. 1. "EIDF_ELT,Expected ID field / expected ID low threshold in CAN_sleep mode" line.long 0x10 "SLP_EDLC,CAN_sleep mode expected DLC register" hexmask.long.byte 0x10 16.--19. 1. "DLCELT,DLC expected low threshold in CAN_sleep mode" hexmask.long.byte 0x10 0.--3. 1. "DLCEHT,DLC expected high threshold in CAN_sleep mode" line.long 0x14 "SLP_EDL0,CAN_sleep mode expected data low 0 register" hexmask.long.byte 0x14 24.--31. 1. "DB0ELT,Data byte 0 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x14 16.--23. 1. "DB1ELT,Data byte 1 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x14 8.--15. 1. "DB2ELT,Data byte 2 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x14 0.--7. 1. "DB3ELT,Data byte 3 expected low threshold in CAN_sleep mode" line.long 0x18 "SLP_EDL1,CAN_sleep mode expected data low 1 register" hexmask.long.byte 0x18 24.--31. 1. "DB4ELT,Data byte 4 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x18 16.--23. 1. "DB5ELT,Data byte 5 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x18 8.--15. 1. "DB6ELT,Data byte 6 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x18 0.--7. 1. "DB7ELT,Data byte 7 expected low threshold in CAN_sleep mode" line.long 0x1C "IFEID1,CAN_sleep mode identifier filter / expected identifier 1 register" bitfld.long 0x1C 30. "IDEFD,IDE filter data in CAN_sleep mode" "0,1" bitfld.long 0x1C 29. "RTRFD,RTR filter data in CAN_sleep mode" "0,1" hexmask.long 0x1C 0.--28. 1. "IDFD_EHT,ID filter data / ID expected high threshold in CAN_sleep mode" line.long 0x20 "SLP_DF0EDH0,CAN_sleep mode data 0 filter / expected data high 0 register" hexmask.long.byte 0x20 24.--31. 1. "DB0FD_EHT,Data byte 0 filter data / Data byte 0 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x20 16.--23. 1. "DB1FD_EHT,Data byte 1 filter data / Data byte 1 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x20 8.--15. 1. "DB2FD_EHT,Data byte 3 filter data / Data byte 3 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x20 0.--7. 1. "DB3FD_EHT,Data byte 3 filter data / Data byte 3 expected high threshold in CAN_sleep mode" line.long 0x24 "SLP_DF1EDH1,CAN_sleep mode data 1 filter / expected data high 1 register" hexmask.long.byte 0x24 24.--31. 1. "DB4FD_EHT,Data byte 4 filter data / Data byte 4 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x24 16.--23. 1. "DB5FD_EHT,Data byte 5 filter data / Data byte 5 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x24 8.--15. 1. "DB6FD_EHT,Data byte 6 filter data / Data byte 6 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x24 0.--7. 1. "DB7FD_EHT,Data byte 7 filter data / Data byte 7 expected high threshold in CAN_sleep mode" rgroup.long 0xB40++0x3 line.long 0x0 "RWM0CS,CAN_sleep mode received wakeup mailbox x control status information register" bitfld.long 0x0 22. "RSRR,Received SRR bit" "0,1" bitfld.long 0x0 21. "RIDE,Received IDE bit" "0,1" bitfld.long 0x0 20. "RRTR,Received RTR bit" "0,1" hexmask.long.byte 0x0 16.--19. 1. "RDLC,Received DLC bits" rgroup.long 0xB50++0x3 line.long 0x0 "RWM1CS,CAN_sleep mode received wakeup mailbox x control status information register" bitfld.long 0x0 22. "RSRR,Received SRR bit" "0,1" bitfld.long 0x0 21. "RIDE,Received IDE bit" "0,1" bitfld.long 0x0 20. "RRTR,Received RTR bit" "0,1" hexmask.long.byte 0x0 16.--19. 1. "RDLC,Received DLC bits" rgroup.long 0xB60++0x3 line.long 0x0 "RWM2CS,CAN_sleep mode received wakeup mailbox x control status information register" bitfld.long 0x0 22. "RSRR,Received SRR bit" "0,1" bitfld.long 0x0 21. "RIDE,Received IDE bit" "0,1" bitfld.long 0x0 20. "RRTR,Received RTR bit" "0,1" hexmask.long.byte 0x0 16.--19. 1. "RDLC,Received DLC bits" rgroup.long 0xB70++0x3 line.long 0x0 "RWM3CS,CAN_sleep mode received wakeup mailbox x control status information register" bitfld.long 0x0 22. "RSRR,Received SRR bit" "0,1" bitfld.long 0x0 21. "RIDE,Received IDE bit" "0,1" bitfld.long 0x0 20. "RRTR,Received RTR bit" "0,1" hexmask.long.byte 0x0 16.--19. 1. "RDLC,Received DLC bits" rgroup.long 0xB44++0x3 line.long 0x0 "SLP_RWM0I,CAN_sleep mode received wakeup mailbox x identifier register" hexmask.long 0x0 0.--28. 1. "RID,Received ID bits" rgroup.long 0xB54++0x3 line.long 0x0 "SLP_RWM1I,CAN_sleep mode received wakeup mailbox x identifier register" hexmask.long 0x0 0.--28. 1. "RID,Received ID bits" rgroup.long 0xB64++0x3 line.long 0x0 "SLP_RWM2I,CAN_sleep mode received wakeup mailbox x identifier register" hexmask.long 0x0 0.--28. 1. "RID,Received ID bits" rgroup.long 0xB74++0x3 line.long 0x0 "SLP_RWM3I,CAN_sleep mode received wakeup mailbox x identifier register" hexmask.long 0x0 0.--28. 1. "RID,Received ID bits" rgroup.long 0xB48++0x3 line.long 0x0 "RWM0D0,CAN_sleep mode received wakeup mailbox x data 0 register" hexmask.long.byte 0x0 24.--31. 1. "RDB0,Received data byte 0" hexmask.long.byte 0x0 16.--23. 1. "RDB1,Received data byte 1" hexmask.long.byte 0x0 8.--15. 1. "RDB2,Received data byte 2" hexmask.long.byte 0x0 0.--7. 1. "RDB3,Received data byte 3" rgroup.long 0xB58++0x3 line.long 0x0 "RWM1D0,CAN_sleep mode received wakeup mailbox x data 0 register" hexmask.long.byte 0x0 24.--31. 1. "RDB0,Received data byte 0" hexmask.long.byte 0x0 16.--23. 1. "RDB1,Received data byte 1" hexmask.long.byte 0x0 8.--15. 1. "RDB2,Received data byte 2" hexmask.long.byte 0x0 0.--7. 1. "RDB3,Received data byte 3" rgroup.long 0xB68++0x3 line.long 0x0 "RWM2D0,CAN_sleep mode received wakeup mailbox x data 0 register" hexmask.long.byte 0x0 24.--31. 1. "RDB0,Received data byte 0" hexmask.long.byte 0x0 16.--23. 1. "RDB1,Received data byte 1" hexmask.long.byte 0x0 8.--15. 1. "RDB2,Received data byte 2" hexmask.long.byte 0x0 0.--7. 1. "RDB3,Received data byte 3" rgroup.long 0xB78++0x3 line.long 0x0 "RWM3D0,CAN_sleep mode received wakeup mailbox x data 0 register" hexmask.long.byte 0x0 24.--31. 1. "RDB0,Received data byte 0" hexmask.long.byte 0x0 16.--23. 1. "RDB1,Received data byte 1" hexmask.long.byte 0x0 8.--15. 1. "RDB2,Received data byte 2" hexmask.long.byte 0x0 0.--7. 1. "RDB3,Received data byte 3" rgroup.long 0xB4C++0x3 line.long 0x0 "RWM0D1,CAN_sleep mode received wakeup mailbox x data 1 register" hexmask.long.byte 0x0 24.--31. 1. "RDB4,Received data byte 4" hexmask.long.byte 0x0 16.--23. 1. "RDB5,Received data byte 5" hexmask.long.byte 0x0 8.--15. 1. "RDB6,Received data byte 6" hexmask.long.byte 0x0 0.--7. 1. "RDB7,Received data byte 7" rgroup.long 0xB5C++0x3 line.long 0x0 "RWM1D1,CAN_sleep mode received wakeup mailbox x data 1 register" hexmask.long.byte 0x0 24.--31. 1. "RDB4,Received data byte 4" hexmask.long.byte 0x0 16.--23. 1. "RDB5,Received data byte 5" hexmask.long.byte 0x0 8.--15. 1. "RDB6,Received data byte 6" hexmask.long.byte 0x0 0.--7. 1. "RDB7,Received data byte 7" rgroup.long 0xB6C++0x3 line.long 0x0 "RWM2D1,CAN_sleep mode received wakeup mailbox x data 1 register" hexmask.long.byte 0x0 24.--31. 1. "RDB4,Received data byte 4" hexmask.long.byte 0x0 16.--23. 1. "RDB5,Received data byte 5" hexmask.long.byte 0x0 8.--15. 1. "RDB6,Received data byte 6" hexmask.long.byte 0x0 0.--7. 1. "RDB7,Received data byte 7" rgroup.long 0xB7C++0x3 line.long 0x0 "RWM3D1,CAN_sleep mode received wakeup mailbox x data 1 register" hexmask.long.byte 0x0 24.--31. 1. "RDB4,Received data byte 4" hexmask.long.byte 0x0 16.--23. 1. "RDB5,Received data byte 5" hexmask.long.byte 0x0 8.--15. 1. "RDB6,Received data byte 6" hexmask.long.byte 0x0 0.--7. 1. "RDB7,Received data byte 7" group.long 0xC00++0xB line.long 0x0 "FDCTL,FD control register" bitfld.long 0x0 31. "BRSEN,Bit rate of data switch enable" "0,1" bitfld.long 0x0 16.--17. "MDSZ,Mailbox data size" "0,1,2,3" bitfld.long 0x0 15. "TDCEN,Transmitter delay compensation enable" "0,1" bitfld.long 0x0 14. "TDCS,Transmitter delay compensation status" "0,1" hexmask.long.byte 0x0 8.--12. 1. "TDCO,Transmitter delay compensation offset" hexmask.long.byte 0x0 0.--5. 1. "TDCV,Transmitter delay compensation value" line.long 0x4 "FDBT,FD bit timing register" hexmask.long.word 0x4 20.--29. 1. "DBAUDPSC,Baud rate prescaler for data bit time" bitfld.long 0x4 16.--18. "DSJW,Resynchronization jump width for data bit time" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 10.--14. 1. "DPTS,Propagation time segment for data bit time" bitfld.long 0x4 5.--7. "DPBS1,Phase buffer segment 1 for data bit time" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0.--2. "DPBS2,Phase buffer segment 2 for data bit time" "0,1,2,3,4,5,6,7" line.long 0x8 "CRCCFD,CRC for classical and FD frame register" hexmask.long.byte 0x8 24.--28. 1. "ANTM,Associated number of mailbox for transmitting the CRCTCI[20:0] value" hexmask.long.tbyte 0x8 0.--20. 1. "CRCTCI,Transmitted CRC value for classical and ISO / non-ISO FD frames" tree.end tree "CAN1" base ad:0x4001B000 group.long 0x0++0xB line.long 0x0 "CTL0,Control register 0" bitfld.long 0x0 31. "CANDIS,CAN disable" "0,1" bitfld.long 0x0 30. "INAMOD,Inactive mode enable" "0,1" bitfld.long 0x0 29. "RFEN,Rx FIFO enable" "0,1" bitfld.long 0x0 28. "HALT,Halt CAN" "0,1" rbitfld.long 0x0 27. "NRDY,Not ready" "0,1" bitfld.long 0x0 25. "SWRST,Software reset" "0,1" bitfld.long 0x0 24. "INAS,Inactive mode state" "0,1" newline bitfld.long 0x0 23. "SLPS,This bit is only valid when CAN_sleep mode is enabled" "0,1" bitfld.long 0x0 21. "WERREN,Error warning enable" "0,1" rbitfld.long 0x0 20. "LPS,Low power state" "0,1" bitfld.long 0x0 19. "PNEN,Pretended Networking mode enable" "0,1" bitfld.long 0x0 18. "PNS,Pretended Networking state" "0,1" rbitfld.long 0x0 17. "SRDIS,Self reception disable" "0,1" bitfld.long 0x0 16. "RPFQEN,Rx private filters enable Rx mailbox queue enable" "0,1" newline bitfld.long 0x0 15. "DMAEN,DMA enable" "0,1" bitfld.long 0x0 14. "PNMOD,Pretended Networking mode selection" "0,1" bitfld.long 0x0 13. "LAPRIOEN,Local arbitration priority enable" "0,1" bitfld.long 0x0 12. "MST,Mailbox stop transmission" "0,1" bitfld.long 0x0 11. "FDEN,CAN FD operation enable" "0,1" bitfld.long 0x0 8.--9. "FS,Format selection" "0,1,2,3" hexmask.long.byte 0x0 0.--4. 1. "MSZ,Memory size" line.long 0x4 "CTL1,Control register 1" rbitfld.long 0x4 15. "BOIE,Bus off interrupt enable" "0,1" bitfld.long 0x4 14. "ERRSIE,Error summary interrupt enable" "0,1" bitfld.long 0x4 12. "LSCMOD,Loopback and silent communication mode" "0,1" bitfld.long 0x4 11. "TWERRIE,Tx error warning interrupt enable" "0,1" bitfld.long 0x4 10. "RWERRIE,Rx error warning interrupt enable" "0,1" bitfld.long 0x4 7. "BSPMOD,Bit sampling mode" "0,1" bitfld.long 0x4 6. "ABORDIS,Automatic Bus off recovery not enable" "0,1" newline bitfld.long 0x4 5. "TSYNC,Time synchronization enable" "0,1" bitfld.long 0x4 4. "MTO,Mailbox transmission order" "0,1" bitfld.long 0x4 3. "MMOD,Monitor mode" "0,1" line.long 0x8 "TIMER,Timer register" hexmask.long.word 0x8 0.--15. 1. "CNT,Counter value" group.long 0x10++0x3 line.long 0x0 "RMPUBF,Receive mailbox public filter register" hexmask.long 0x0 0.--31. 1. "MFDx,Mailbox filter data" group.long 0x1C++0x7 line.long 0x0 "ERR0,Error register 0" hexmask.long.byte 0x0 24.--31. 1. "REFCNT,Receive error counter for data phase of FD frames" hexmask.long.byte 0x0 16.--23. 1. "TEFCNT,Transmit error count for the data phase of FD frames" hexmask.long.byte 0x0 8.--15. 1. "RECNT,Receive error count defined by the CAN standard" hexmask.long.byte 0x0 0.--7. 1. "TECNT,Transmit error count defined by the CAN standard" line.long 0x4 "ERR1,Error register 1" rbitfld.long 0x4 31. "BRFERR,Bit recessive error in data phase of FD frames" "0,1" rbitfld.long 0x4 30. "BDFERR,Bit dominant error in data phase of FD frames" "0,1" rbitfld.long 0x4 28. "CRCFERR,CRC error in data phase of FD frames" "0,1" rbitfld.long 0x4 27. "FMFERR,Form error in data phase of FD frames" "0,1" rbitfld.long 0x4 26. "STFFERR,Form error in data phase of FD frames" "0,1" bitfld.long 0x4 21. "ERROVR,Error overrun" "0,1" bitfld.long 0x4 20. "ERRFSF,Error summary flag for data phase of FD frames" "0,1" newline bitfld.long 0x4 19. "BORF,Bus off recovery flag" "0,1" rbitfld.long 0x4 18. "SYN,Synchronization flag" "0,1" bitfld.long 0x4 17. "TWERRIF,Tx error warning interrupt flag" "0,1" bitfld.long 0x4 16. "RWERRIF,Rx error warning interrupt flag" "0,1" rbitfld.long 0x4 15. "BRERR,Bit recessive error for all format frames" "0,1" rbitfld.long 0x4 14. "BDERR,Bit dominant error for all format frames" "0,1" rbitfld.long 0x4 13. "ACKERR,ACK error" "0,1" newline rbitfld.long 0x4 12. "CRCERR,CRC error" "0,1" rbitfld.long 0x4 11. "FMERR,Form error" "0,1" rbitfld.long 0x4 10. "STFERR,Stuff error" "0,1" rbitfld.long 0x4 9. "TWERRF,Tx error warning flag" "0,1" rbitfld.long 0x4 8. "RWERRF,Rx error warning flag" "0,1" rbitfld.long 0x4 7. "IDLEF,IDLE flag" "0,1" rbitfld.long 0x4 6. "TS,Transmitting state" "0,1" newline rbitfld.long 0x4 4.--5. "ERRSI,Error state indicator" "0,1,2,3" rbitfld.long 0x4 3. "RS,Receiving state" "0,1" bitfld.long 0x4 2. "BOF,Bus off flag" "0,1" bitfld.long 0x4 1. "ERRSF,Error summary flag" "0,1" bitfld.long 0x4 0. "WERR,Write error" "0,1" group.long 0x28++0x3 line.long 0x0 "INTEN,Interrupt enable register" hexmask.long 0x0 0.--31. 1. "MIEx,Message transmission and reception interrupt enable" group.long 0x30++0x7 line.long 0x0 "STAT,Status register" hexmask.long.tbyte 0x0 8.--31. 1. "MSx,Mailbox x state" bitfld.long 0x0 7. "MS7_RFO,Mailbox 7 state / Rx FIFO overflow" "0,1" bitfld.long 0x0 6. "MS6_RFW,Mailbox 6 state / Rx FIFO warning" "0,1" bitfld.long 0x0 5. "MS5_RFNE,Mailbox 5 state / Rx FIFO not empty" "0,1" bitfld.long 0x0 4. "MS4_RES,Mailbox 4 state / Reserved" "0,1" bitfld.long 0x0 3. "MS3_RES,Mailbox 3 state / Reserved" "0,1" bitfld.long 0x0 2. "MS2_RES,Mailbox 2 state / Reserved" "0,1" newline bitfld.long 0x0 1. "MS1_RES,Mailbox 1 state / Reserved" "0,1" bitfld.long 0x0 0. "MS0_RFC,Mailbox 3 state / Clear Rx FIFO bit" "0,1" line.long 0x4 "CTL2,Control register 2" bitfld.long 0x4 31. "ERRFSIE,Error summary interrupt enable bit for data phase of FD frames" "0,1" bitfld.long 0x4 30. "BORIE,Bus off recovery interrupt enable" "0,1" hexmask.long.byte 0x4 24.--27. 1. "RFFN,Rx FIFO filter number" hexmask.long.byte 0x4 19.--23. 1. "ASD,Arbitration start delay" bitfld.long 0x4 18. "RFO,Receive filter order" "0,1" bitfld.long 0x4 17. "RRFRMS,Remote request frame is stored" "0,1" bitfld.long 0x4 16. "IDERTR_RMF,IDE and RTR field filter type for Rx mailbox reception" "0,1" newline bitfld.long 0x4 15. "ITSRC,Internal counter source" "0,1" bitfld.long 0x4 14. "PREEN,Protocol exception detection enable by CAN standard" "0,1" bitfld.long 0x4 12. "ISO,ISO CAN FD" "0,1" bitfld.long 0x4 11. "EFDIS,Edge filtering disable" "0,1" bitfld.long 0x4 0. "WERRIE,Write error interrupt enable" "0,1" group.long 0x44++0x7 line.long 0x0 "CRCC,CRC for classical frame register" hexmask.long.byte 0x0 16.--20. 1. "ANTM,Associated number of mailbox for transmitting the CRCTC[14:0] value" hexmask.long.word 0x0 0.--14. 1. "CRCTC,Transmitted CRC value for classical frames" line.long 0x4 "RFIFOPUBF,Receive FIFO public filter register" hexmask.long 0x4 0.--31. 1. "FFDx,Rx FIFO filter data" rgroup.long 0x4C++0x3 line.long 0x0 "RFIFOIFMN,Receive FIFO identifier filter matching number register" hexmask.long.word 0x0 0.--8. 1. "IDFMN,Identifier filter matching number" group.long 0x50++0x3 line.long 0x0 "BT,Bit timing register" hexmask.long.word 0x0 21.--30. 1. "BAUDPSC,Baud rate prescaler" hexmask.long.byte 0x0 16.--20. 1. "SJW,Resynchronization jump width" hexmask.long.byte 0x0 10.--15. 1. "PTS,Propagation time segment" hexmask.long.byte 0x0 5.--9. 1. "PBS1,Phase buffer segment 1" hexmask.long.byte 0x0 0.--4. 1. "PBS2,Phase buffer segment 2" group.long 0x880++0x7F line.long 0x0 "RFIFOMPF0,Receive FIFO/mailbox private filter x register" hexmask.long 0x0 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x4 "RFIFOMPF1,Receive FIFO/mailbox private filter x register" hexmask.long 0x4 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x8 "RFIFOMPF2,Receive FIFO/mailbox private filter x register" hexmask.long 0x8 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0xC "RFIFOMPF3,Receive FIFO/mailbox private filter x register" hexmask.long 0xC 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x10 "RFIFOMPF4,Receive FIFO/mailbox private filter x register" hexmask.long 0x10 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x14 "RFIFOMPF5,Receive FIFO/mailbox private filter x register" hexmask.long 0x14 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x18 "RFIFOMPF6,Receive FIFO/mailbox private filter x register" hexmask.long 0x18 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x1C "RFIFOMPF7,Receive FIFO/mailbox private filter x register" hexmask.long 0x1C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x20 "RFIFOMPF8,Receive FIFO/mailbox private filter x register" hexmask.long 0x20 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x24 "RFIFOMPF9,Receive FIFO/mailbox private filter x register" hexmask.long 0x24 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x28 "RFIFOMPF10,Receive FIFO/mailbox private filter x register" hexmask.long 0x28 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x2C "RFIFOMPF11,Receive FIFO/mailbox private filter x register" hexmask.long 0x2C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x30 "RFIFOMPF12,Receive FIFO/mailbox private filter x register" hexmask.long 0x30 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x34 "RFIFOMPF13,Receive FIFO/mailbox private filter x register" hexmask.long 0x34 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x38 "RFIFOMPF14,Receive FIFO/mailbox private filter x register" hexmask.long 0x38 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x3C "RFIFOMPF15,Receive FIFO/mailbox private filter x register" hexmask.long 0x3C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x40 "RFIFOMPF16,Receive FIFO/mailbox private filter x register" hexmask.long 0x40 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x44 "RFIFOMPF17,Receive FIFO/mailbox private filter x register" hexmask.long 0x44 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x48 "RFIFOMPF18,Receive FIFO/mailbox private filter x register" hexmask.long 0x48 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x4C "RFIFOMPF19,Receive FIFO/mailbox private filter x register" hexmask.long 0x4C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x50 "RFIFOMPF20,Receive FIFO/mailbox private filter x register" hexmask.long 0x50 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x54 "RFIFOMPF21,Receive FIFO/mailbox private filter x register" hexmask.long 0x54 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x58 "RFIFOMPF22,Receive FIFO/mailbox private filter x register" hexmask.long 0x58 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x5C "RFIFOMPF23,Receive FIFO/mailbox private filter x register" hexmask.long 0x5C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x60 "RFIFOMPF24,Receive FIFO/mailbox private filter x register" hexmask.long 0x60 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x64 "RFIFOMPF25,Receive FIFO/mailbox private filter x register" hexmask.long 0x64 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x68 "RFIFOMPF26,Receive FIFO/mailbox private filter x register" hexmask.long 0x68 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x6C "RFIFOMPF27,Receive FIFO/mailbox private filter x register" hexmask.long 0x6C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x70 "RFIFOMPF28,Receive FIFO/mailbox private filter x register" hexmask.long 0x70 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x74 "RFIFOMPF29,Receive FIFO/mailbox private filter x register" hexmask.long 0x74 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x78 "RFIFOMPF30,Receive FIFO/mailbox private filter x register" hexmask.long 0x78 0.--31. 1. "FMFDx,FIFO/mailbox filter data" line.long 0x7C "RFIFOMPF31,Receive FIFO/mailbox private filter x register" hexmask.long 0x7C 0.--31. 1. "FMFDx,FIFO/mailbox filter data" group.long 0xB00++0x27 line.long 0x0 "SLP_CTL0,CAN_sleep mode control register 0" bitfld.long 0x0 17. "WTOIE,Wakeup timeout interrupt enable" "0,1" bitfld.long 0x0 16. "WMIE,Wakeup match interrupt enable" "0,1" hexmask.long.byte 0x0 8.--15. 1. "NMM,Number of messages matching times" bitfld.long 0x0 4.--5. "DATAFT,DATA field filtering type in CAN_sleep mode" "0,1,2,3" bitfld.long 0x0 2.--3. "IDFT,ID field filtering type in CAN_sleep mode" "0,1,2,3" bitfld.long 0x0 0.--1. "FFT,Frame filtering type in CAN_sleep mode" "0,1,2,3" line.long 0x4 "SLP_TO,CAN_sleep mode timeout register" hexmask.long.word 0x4 0.--15. 1. "WTO,Wakeup timeout" line.long 0x8 "SLP_STAT,CAN_sleep mode status register" bitfld.long 0x8 17. "WTOS,Wakeup timeout flag status" "0,1" bitfld.long 0x8 16. "WMS,Wakeup match flag status" "0,1" hexmask.long.byte 0x8 8.--15. 1. "MMCNT,Matching message counter in CAN_sleep mode" rbitfld.long 0x8 7. "MMCNTS,Matching message counter state" "0,1" line.long 0xC "SLP_EID0,CAN_sleep mode expected identifier 0 register" bitfld.long 0xC 30. "EIDE,Expected IDE in CAN_sleep mode" "0,1" bitfld.long 0xC 29. "ERTR,Expected RTR in CAN_sleep mode" "0,1" hexmask.long 0xC 0.--28. 1. "EIDF_ELT,Expected ID field / expected ID low threshold in CAN_sleep mode" line.long 0x10 "SLP_EDLC,CAN_sleep mode expected DLC register" hexmask.long.byte 0x10 16.--19. 1. "DLCELT,DLC expected low threshold in CAN_sleep mode" hexmask.long.byte 0x10 0.--3. 1. "DLCEHT,DLC expected high threshold in CAN_sleep mode" line.long 0x14 "SLP_EDL0,CAN_sleep mode expected data low 0 register" hexmask.long.byte 0x14 24.--31. 1. "DB0ELT,Data byte 0 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x14 16.--23. 1. "DB1ELT,Data byte 1 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x14 8.--15. 1. "DB2ELT,Data byte 2 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x14 0.--7. 1. "DB3ELT,Data byte 3 expected low threshold in CAN_sleep mode" line.long 0x18 "SLP_EDL1,CAN_sleep mode expected data low 1 register" hexmask.long.byte 0x18 24.--31. 1. "DB4ELT,Data byte 4 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x18 16.--23. 1. "DB5ELT,Data byte 5 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x18 8.--15. 1. "DB6ELT,Data byte 6 expected low threshold in CAN_sleep mode" hexmask.long.byte 0x18 0.--7. 1. "DB7ELT,Data byte 7 expected low threshold in CAN_sleep mode" line.long 0x1C "IFEID1,CAN_sleep mode identifier filter / expected identifier 1 register" bitfld.long 0x1C 30. "IDEFD,IDE filter data in CAN_sleep mode" "0,1" bitfld.long 0x1C 29. "RTRFD,RTR filter data in CAN_sleep mode" "0,1" hexmask.long 0x1C 0.--28. 1. "IDFD_EHT,ID filter data / ID expected high threshold in CAN_sleep mode" line.long 0x20 "SLP_DF0EDH0,CAN_sleep mode data 0 filter / expected data high 0 register" hexmask.long.byte 0x20 24.--31. 1. "DB0FD_EHT,Data byte 0 filter data / Data byte 0 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x20 16.--23. 1. "DB1FD_EHT,Data byte 1 filter data / Data byte 1 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x20 8.--15. 1. "DB2FD_EHT,Data byte 3 filter data / Data byte 3 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x20 0.--7. 1. "DB3FD_EHT,Data byte 3 filter data / Data byte 3 expected high threshold in CAN_sleep mode" line.long 0x24 "SLP_DF1EDH1,CAN_sleep mode data 1 filter / expected data high 1 register" hexmask.long.byte 0x24 24.--31. 1. "DB4FD_EHT,Data byte 4 filter data / Data byte 4 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x24 16.--23. 1. "DB5FD_EHT,Data byte 5 filter data / Data byte 5 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x24 8.--15. 1. "DB6FD_EHT,Data byte 6 filter data / Data byte 6 expected high threshold in CAN_sleep mode" hexmask.long.byte 0x24 0.--7. 1. "DB7FD_EHT,Data byte 7 filter data / Data byte 7 expected high threshold in CAN_sleep mode" rgroup.long 0xB40++0x3 line.long 0x0 "RWM0CS,CAN_sleep mode received wakeup mailbox x control status information register" bitfld.long 0x0 22. "RSRR,Received SRR bit" "0,1" bitfld.long 0x0 21. "RIDE,Received IDE bit" "0,1" bitfld.long 0x0 20. "RRTR,Received RTR bit" "0,1" hexmask.long.byte 0x0 16.--19. 1. "RDLC,Received DLC bits" rgroup.long 0xB50++0x3 line.long 0x0 "RWM1CS,CAN_sleep mode received wakeup mailbox x control status information register" bitfld.long 0x0 22. "RSRR,Received SRR bit" "0,1" bitfld.long 0x0 21. "RIDE,Received IDE bit" "0,1" bitfld.long 0x0 20. "RRTR,Received RTR bit" "0,1" hexmask.long.byte 0x0 16.--19. 1. "RDLC,Received DLC bits" rgroup.long 0xB60++0x3 line.long 0x0 "RWM2CS,CAN_sleep mode received wakeup mailbox x control status information register" bitfld.long 0x0 22. "RSRR,Received SRR bit" "0,1" bitfld.long 0x0 21. "RIDE,Received IDE bit" "0,1" bitfld.long 0x0 20. "RRTR,Received RTR bit" "0,1" hexmask.long.byte 0x0 16.--19. 1. "RDLC,Received DLC bits" rgroup.long 0xB70++0x3 line.long 0x0 "RWM3CS,CAN_sleep mode received wakeup mailbox x control status information register" bitfld.long 0x0 22. "RSRR,Received SRR bit" "0,1" bitfld.long 0x0 21. "RIDE,Received IDE bit" "0,1" bitfld.long 0x0 20. "RRTR,Received RTR bit" "0,1" hexmask.long.byte 0x0 16.--19. 1. "RDLC,Received DLC bits" rgroup.long 0xB44++0x3 line.long 0x0 "SLP_RWM0I,CAN_sleep mode received wakeup mailbox x identifier register" hexmask.long 0x0 0.--28. 1. "RID,Received ID bits" rgroup.long 0xB54++0x3 line.long 0x0 "SLP_RWM1I,CAN_sleep mode received wakeup mailbox x identifier register" hexmask.long 0x0 0.--28. 1. "RID,Received ID bits" rgroup.long 0xB64++0x3 line.long 0x0 "SLP_RWM2I,CAN_sleep mode received wakeup mailbox x identifier register" hexmask.long 0x0 0.--28. 1. "RID,Received ID bits" rgroup.long 0xB74++0x3 line.long 0x0 "SLP_RWM3I,CAN_sleep mode received wakeup mailbox x identifier register" hexmask.long 0x0 0.--28. 1. "RID,Received ID bits" rgroup.long 0xB48++0x3 line.long 0x0 "RWM0D0,CAN_sleep mode received wakeup mailbox x data 0 register" hexmask.long.byte 0x0 24.--31. 1. "RDB0,Received data byte 0" hexmask.long.byte 0x0 16.--23. 1. "RDB1,Received data byte 1" hexmask.long.byte 0x0 8.--15. 1. "RDB2,Received data byte 2" hexmask.long.byte 0x0 0.--7. 1. "RDB3,Received data byte 3" rgroup.long 0xB58++0x3 line.long 0x0 "RWM1D0,CAN_sleep mode received wakeup mailbox x data 0 register" hexmask.long.byte 0x0 24.--31. 1. "RDB0,Received data byte 0" hexmask.long.byte 0x0 16.--23. 1. "RDB1,Received data byte 1" hexmask.long.byte 0x0 8.--15. 1. "RDB2,Received data byte 2" hexmask.long.byte 0x0 0.--7. 1. "RDB3,Received data byte 3" rgroup.long 0xB68++0x3 line.long 0x0 "RWM2D0,CAN_sleep mode received wakeup mailbox x data 0 register" hexmask.long.byte 0x0 24.--31. 1. "RDB0,Received data byte 0" hexmask.long.byte 0x0 16.--23. 1. "RDB1,Received data byte 1" hexmask.long.byte 0x0 8.--15. 1. "RDB2,Received data byte 2" hexmask.long.byte 0x0 0.--7. 1. "RDB3,Received data byte 3" rgroup.long 0xB78++0x3 line.long 0x0 "RWM3D0,CAN_sleep mode received wakeup mailbox x data 0 register" hexmask.long.byte 0x0 24.--31. 1. "RDB0,Received data byte 0" hexmask.long.byte 0x0 16.--23. 1. "RDB1,Received data byte 1" hexmask.long.byte 0x0 8.--15. 1. "RDB2,Received data byte 2" hexmask.long.byte 0x0 0.--7. 1. "RDB3,Received data byte 3" rgroup.long 0xB4C++0x3 line.long 0x0 "RWM0D1,CAN_sleep mode received wakeup mailbox x data 1 register" hexmask.long.byte 0x0 24.--31. 1. "RDB4,Received data byte 4" hexmask.long.byte 0x0 16.--23. 1. "RDB5,Received data byte 5" hexmask.long.byte 0x0 8.--15. 1. "RDB6,Received data byte 6" hexmask.long.byte 0x0 0.--7. 1. "RDB7,Received data byte 7" rgroup.long 0xB5C++0x3 line.long 0x0 "RWM1D1,CAN_sleep mode received wakeup mailbox x data 1 register" hexmask.long.byte 0x0 24.--31. 1. "RDB4,Received data byte 4" hexmask.long.byte 0x0 16.--23. 1. "RDB5,Received data byte 5" hexmask.long.byte 0x0 8.--15. 1. "RDB6,Received data byte 6" hexmask.long.byte 0x0 0.--7. 1. "RDB7,Received data byte 7" rgroup.long 0xB6C++0x3 line.long 0x0 "RWM2D1,CAN_sleep mode received wakeup mailbox x data 1 register" hexmask.long.byte 0x0 24.--31. 1. "RDB4,Received data byte 4" hexmask.long.byte 0x0 16.--23. 1. "RDB5,Received data byte 5" hexmask.long.byte 0x0 8.--15. 1. "RDB6,Received data byte 6" hexmask.long.byte 0x0 0.--7. 1. "RDB7,Received data byte 7" rgroup.long 0xB7C++0x3 line.long 0x0 "RWM3D1,CAN_sleep mode received wakeup mailbox x data 1 register" hexmask.long.byte 0x0 24.--31. 1. "RDB4,Received data byte 4" hexmask.long.byte 0x0 16.--23. 1. "RDB5,Received data byte 5" hexmask.long.byte 0x0 8.--15. 1. "RDB6,Received data byte 6" hexmask.long.byte 0x0 0.--7. 1. "RDB7,Received data byte 7" group.long 0xC00++0xB line.long 0x0 "FDCTL,FD control register" bitfld.long 0x0 31. "BRSEN,Bit rate of data switch enable" "0,1" bitfld.long 0x0 16.--17. "MDSZ,Mailbox data size" "0,1,2,3" bitfld.long 0x0 15. "TDCEN,Transmitter delay compensation enable" "0,1" bitfld.long 0x0 14. "TDCS,Transmitter delay compensation status" "0,1" hexmask.long.byte 0x0 8.--12. 1. "TDCO,Transmitter delay compensation offset" hexmask.long.byte 0x0 0.--5. 1. "TDCV,Transmitter delay compensation value" line.long 0x4 "FDBT,FD bit timing register" hexmask.long.word 0x4 20.--29. 1. "DBAUDPSC,Baud rate prescaler for data bit time" bitfld.long 0x4 16.--18. "DSJW,Resynchronization jump width for data bit time" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 10.--14. 1. "DPTS,Propagation time segment for data bit time" bitfld.long 0x4 5.--7. "DPBS1,Phase buffer segment 1 for data bit time" "0,1,2,3,4,5,6,7" bitfld.long 0x4 0.--2. "DPBS2,Phase buffer segment 2 for data bit time" "0,1,2,3,4,5,6,7" line.long 0x8 "CRCCFD,CRC for classical and FD frame register" hexmask.long.byte 0x8 24.--28. 1. "ANTM,Associated number of mailbox for transmitting the CRCTCI[20:0] value" hexmask.long.tbyte 0x8 0.--20. 1. "CRCTCI,Transmitted CRC value for classical and ISO / non-ISO FD frames" tree.end tree.end tree "CMP (Comparator)" base ad:0x40017C00 group.long 0x0++0x3 line.long 0x0 "CS,CMP control and status register" bitfld.long 0x0 31. "LK,Comparator lock" "0,1" rbitfld.long 0x0 30. "OT,CMP output" "0,1" bitfld.long 0x0 23. "SEN,Voltage scaler enable bit" "0,1" bitfld.long 0x0 22. "BEN,Scaler bridge enable bit" "0,1" bitfld.long 0x0 18.--20. "BLK,CMP output blanking source" "0,1,2,3,4,5,6,7" bitfld.long 0x0 16.--17. "HST,CMP hysteresis" "0,1,2,3" bitfld.long 0x0 15. "PL,Polarity of comparator output" "0,1" bitfld.long 0x0 13.--14. "OSEL,Comparator output selection" "0,1,2,3" bitfld.long 0x0 10.--12. "PSEL,CMP_IP input selection" "0,1,2,3,4,5,6,7" bitfld.long 0x0 7.--9. "MISEL,CMP_IM internal input selection" "0,1,2,3,4,5,6,7" bitfld.long 0x0 4.--6. "MESEL,Comparator 0 input selection" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2.--3. "PM,CMP0 power mode" "0,1,2,3" bitfld.long 0x0 0. "EN,Comparator 0 enable" "0,1" tree.end tree "CRC (Cyclic Redundancy Check Calculation Unit)" base ad:0x40023000 group.long 0x0++0xB line.long 0x0 "DATA,Data register" hexmask.long 0x0 0.--31. 1. "DATA,CRC calculation result bits" line.long 0x4 "FDATA,Free data register" hexmask.long.byte 0x4 0.--7. 1. "FDATA,General-purpose 8-bit data register" line.long 0x8 "CTL,Control register" bitfld.long 0x8 7. "REV_O,Reverse output data" "0,1" bitfld.long 0x8 5.--6. "REV_I,Reverse input data" "0,1,2,3" bitfld.long 0x8 3.--4. "PS,Size of polynomial" "0,1,2,3" bitfld.long 0x8 0. "RST,reset bit" "0,1" group.long 0x10++0x7 line.long 0x0 "IDATA,Initialization Data Register" hexmask.long 0x0 0.--31. 1. "IDATA,CRC calculation initial value" line.long 0x4 "POLY,Polynomial register" hexmask.long 0x4 0.--31. 1. "POLY,User configurable polynomial value" tree.end tree "DAC (Digital-to-Analog Converter)" base ad:0x40007400 group.long 0x0++0x3 line.long 0x0 "CTL,Control register" bitfld.long 0x0 14. "DDISC,DAC_OUT connect GPIO selection" "0,1" bitfld.long 0x0 13. "DDUDRIE,DAC_OUT DMA underrun interrupt enable" "0,1" bitfld.long 0x0 12. "DDMAEN,DAC_OUT DMA enable" "0,1" hexmask.long.byte 0x0 8.--11. 1. "DWBW,DAC_OUT noise wave bit width" bitfld.long 0x0 6.--7. "DWM,DAC_OUT noise wave mode" "0,1,2,3" bitfld.long 0x0 3.--4. "DTSEL,DAC_OUT trigger selection" "0,1,2,3" bitfld.long 0x0 2. "DTEN,DAC_OUT trigger enable" "0,1" bitfld.long 0x0 1. "DBOFF,DAC_OUT output buffer turn off" "0,1" bitfld.long 0x0 0. "DEN,DAC_OUT enable" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "SWT,Software trigger register" bitfld.long 0x0 0. "SWTR,DAC_OUT software trigger cleared by hardware" "0,1" group.long 0x8++0xB line.long 0x0 "OUT_R12DH,DAC_OUT 12-bit right-aligned data holding register" hexmask.long.word 0x0 0.--11. 1. "OUT_DH,DAC_OUT 12-bit right-aligned data" line.long 0x4 "OUT_L12DH,DAC_OUT 12-bit left-aligned data holding register" hexmask.long.word 0x4 4.--15. 1. "OUT_DH,DAC_OUT 12-bit left-aligned data" line.long 0x8 "OUT_R8DH,DAC_OUT 8-bit right-aligned data holding register" hexmask.long.byte 0x8 0.--7. 1. "OUT_DH,DAC_OUT 8-bit right-aligned data" rgroup.long 0x14++0x3 line.long 0x0 "OUT_DO,DAC_OUT data output register" hexmask.long.word 0x0 0.--11. 1. "OUT_DO,DAC_OUT data output" group.long 0x18++0x3 line.long 0x0 "STAT0,DAC Status register 0" bitfld.long 0x0 13. "DDUDR,DAC_OUT DMA underrun flag" "0,1" tree.end tree "DBG (Debug)" base ad:0xE0044000 rgroup.long 0x0++0x3 line.long 0x0 "ID,ID code register" hexmask.long 0x0 0.--31. 1. "ID_CODE,DBG ID code register" group.long 0x4++0x3 line.long 0x0 "CTL,Control register" bitfld.long 0x0 31. "TIMER19_HOLD,TIMER19 hold bit" "0,1" bitfld.long 0x0 30. "TIMER20_HOLD,TIMER20 hold bit" "0,1" bitfld.long 0x0 23. "CAN1_HOLD,CAN1 hold bit" "0,1" bitfld.long 0x0 22. "CAN0_HOLD,CAN0 hold bit" "0,1" bitfld.long 0x0 21. "MFCOM_HOLD,MFCOM hold bit" "0,1" bitfld.long 0x0 20. "TIMER6_HOLD,TIMER 6 hold bit" "0,1" bitfld.long 0x0 19. "TIMER5_HOLD,TIMER 5 hold bit" "0,1" bitfld.long 0x0 17. "TIMER7_HOLD,TIMER 7 hold bit" "0,1" newline bitfld.long 0x0 16. "I2C1_HOLD,I2C1 hold bit" "0,1" bitfld.long 0x0 15. "I2C0_HOLD,I2C0 hold bit" "0,1" bitfld.long 0x0 11. "TIMER1_HOLD,TIMER 1 hold bit" "0,1" bitfld.long 0x0 10. "TIMER0_HOLD,TIMER 0 hold bit" "0,1" bitfld.long 0x0 9. "WWDGT_HOLD,WWDGT hold bit" "0,1" bitfld.long 0x0 8. "FWDGT_HOLD,FWDGT hold bit" "0,1" bitfld.long 0x0 2. "STB_HOLD,Standby mode hold bit" "0,1" bitfld.long 0x0 1. "DSLP_HOLD,Deep-sleep mode hold bit" "0,1" newline bitfld.long 0x0 0. "SLP_HOLD,Sleep mode hold bit" "0,1" tree.end tree "DMA (Direct Memory Access)" base ad:0x0 tree "DMA0" base ad:0x40020000 rgroup.long 0x0++0x3 line.long 0x0 "INTF,DMA interrupt flag register" bitfld.long 0x0 27. "ERRIF6,Channel 6 Error" "0,1" bitfld.long 0x0 26. "HTFIF6,Channel 5 Half Transfer Finish" "0,1" bitfld.long 0x0 25. "FTFIF6,Channel 6 Full Transfer Finish" "0,1" bitfld.long 0x0 24. "GIF6,Channel 6 Global interrupt" "0,1" bitfld.long 0x0 23. "ERRIF5,Channel 5 Error" "0,1" bitfld.long 0x0 22. "HTFIF5,Channel 5 Half Transfer Finish" "0,1" bitfld.long 0x0 21. "FTFIF5,Channel 5 Full Transfer Finish" "0,1" bitfld.long 0x0 20. "GIF5,Channel 5 Global interrupt" "0,1" bitfld.long 0x0 19. "ERRIF4,Channel 4 Error" "0,1" bitfld.long 0x0 18. "HTFIF4,Channel 4 Half Transfer Finish" "0,1" bitfld.long 0x0 17. "FTFIF4,Channel 4 Full Transfer Finish" "0,1" newline bitfld.long 0x0 16. "GIF4,Channel 4 Global interrupt" "0,1" bitfld.long 0x0 15. "ERRIF3,Channel 3 Error" "0,1" bitfld.long 0x0 14. "HTFIF3,Channel 3 Half Transfer Finish" "0,1" bitfld.long 0x0 13. "FTFIF3,Channel 3 Full Transfer Finish" "0,1" bitfld.long 0x0 12. "GIF3,Channel 3 Global interrupt" "0,1" bitfld.long 0x0 11. "ERRIF2,Channel 2 Error" "0,1" bitfld.long 0x0 10. "HTFIF2,Channel 2 Half Transfer Finish" "0,1" bitfld.long 0x0 9. "FTFIF2,Channel 2 Full Transfer Finish" "0,1" bitfld.long 0x0 8. "GIF2,Channel 2 Global interrupt" "0,1" bitfld.long 0x0 7. "ERRIF1,Channel 1 Error flag" "0,1" bitfld.long 0x0 6. "HTFIF1,Channel 1 Half Transfer Finish" "0,1" newline bitfld.long 0x0 5. "FTFIF1,Channel 1 Full Transfer Finish" "0,1" bitfld.long 0x0 4. "GIF1,Channel 1 Global interrupt" "0,1" bitfld.long 0x0 3. "ERRIF0,Channel 0 Error flag" "0,1" bitfld.long 0x0 2. "HTFIF0,Channel 0 Half Transfer Finish" "0,1" bitfld.long 0x0 1. "FTFIF0,Channel 0 Full Transfer Finish" "0,1" bitfld.long 0x0 0. "GIF0,Channel 0 Global interrupt" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "INTC,DMA interrupt flag clear register" bitfld.long 0x0 27. "ERRIFC6,Channel 6 Error" "0,1" bitfld.long 0x0 26. "HTFIFC6,Channel 6 Half Transfer" "0,1" bitfld.long 0x0 25. "FTFIFC6,Channel 6 Full Transfer Finish" "0,1" bitfld.long 0x0 24. "GIFC6,Channel 6 Global interrupt flag" "0,1" bitfld.long 0x0 23. "ERRIFC5,Channel 5 Error" "0,1" bitfld.long 0x0 22. "HTFIFC5,Channel 5 Half Transfer" "0,1" bitfld.long 0x0 21. "FTFIFC5,Channel 5 Full Transfer Finish" "0,1" bitfld.long 0x0 20. "GIFC5,Channel 5 Global interrupt flag" "0,1" bitfld.long 0x0 19. "ERRIFC4,Channel 4 Error" "0,1" bitfld.long 0x0 18. "HTFIFC4,Channel 4 Half Transfer" "0,1" bitfld.long 0x0 17. "FTFIFC4,Channel 4 Full Transfer Finish" "0,1" newline bitfld.long 0x0 16. "GIFC4,Channel 4 Global interrupt flag" "0,1" bitfld.long 0x0 15. "ERRIFC3,Channel 3 Error" "0,1" bitfld.long 0x0 14. "HTFIFC3,Channel 3 Half Transfer" "0,1" bitfld.long 0x0 13. "FTFIFC3,Channel 3 Full Transfer Finish" "0,1" bitfld.long 0x0 12. "GIFC3,Channel 3 Global interrupt flag" "0,1" bitfld.long 0x0 11. "ERRIFC2,Channel 2 Error" "0,1" bitfld.long 0x0 10. "HTFIFC2,Channel 2 Half Transfer" "0,1" bitfld.long 0x0 9. "FTFIFC2,Channel 2 Full Transfer Finish" "0,1" bitfld.long 0x0 8. "GIFC2,Channel 2 Global interrupt flag" "0,1" bitfld.long 0x0 7. "ERRIFC1,Channel 1 Error" "0,1" bitfld.long 0x0 6. "HTFIFC1,Channel 1 Half Transfer" "0,1" newline bitfld.long 0x0 5. "FTFIFC1,Channel 1 Full Transfer Finish" "0,1" bitfld.long 0x0 4. "GIFC1,Channel 1 Global interrupt flag" "0,1" bitfld.long 0x0 3. "ERRIFC0,Channel 0 Error" "0,1" bitfld.long 0x0 2. "HTFIFC0,Channel 0 Half Transfer" "0,1" bitfld.long 0x0 1. "FTFIFC0,Channel 0 Full Transfer Finish" "0,1" bitfld.long 0x0 0. "GIFC0,Channel 0 Global interrupt flag" "0,1" group.long 0x8++0xF line.long 0x0 "CH0CTL,DMA channel configuration register" bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Transfer access error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Half Transfer Finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Full Transfer Finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH0CNT,DMA channel 0 counter" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH0PADDR,DMA channel 0 peripheral base address" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH0MADDR,DMA channel 0 memory base address" hexmask.long 0xC 0.--31. 1. "MADDR,Memory address" group.long 0x1C++0xF line.long 0x0 "CH1CTL,DMA channel configuration register" bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Half Transfer Finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Full Transfer Finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH1CNT,DMA channel 1 counter" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH1PADDR,DMA channel 1 peripheral base address" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH1MADDR,DMA channel 1 memory base address" hexmask.long 0xC 0.--31. 1. "MADDR,Memory address" group.long 0x30++0xF line.long 0x0 "CH2CTL,DMA channel configuration register" bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Half Transfer Finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Full Transfer Finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH2CNT,DMA channel 2 counter" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH2PADDR,DMA channel 2 peripheral base address" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH2MADDR,DMA channel 2 memory base address" hexmask.long 0xC 0.--31. 1. "MADDR,Memory address" group.long 0x44++0xF line.long 0x0 "CH3CTL,DMA channel configuration register" bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Half Transfer Finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Full Transfer Finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH3CNT,DMA channel 3 counter" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH3PADDR,DMA channel 3 peripheral base address" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH3MADDR,DMA channel 3 memory base address" hexmask.long 0xC 0.--31. 1. "MADDR,Memory address" group.long 0x58++0xF line.long 0x0 "CH4CTL,DMA channel configuration register" bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Half Transfer Finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Full Transfer Finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH4CNT,DMA channel 4 counter" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH4PADDR,DMA channel 4 peripheral base address" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH4MADDR,DMA channel 4 memory base address" hexmask.long 0xC 0.--31. 1. "MADDR,Memory address" group.long 0x6C++0xF line.long 0x0 "CH5CTL,DMA channel configuration register" bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Half Transfer Finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Full Transfer Finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH5CNT,DMA channel 5 counter" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH5PADDR,DMA channel 5 peripheral base address" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH5MADDR,DMA channel 5 memory base address" hexmask.long 0xC 0.--31. 1. "MADDR,Memory address" group.long 0x80++0xF line.long 0x0 "CH6CTL,DMA channel configuration register" bitfld.long 0x0 14. "M2M,Memory to memory mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority Level of this channel" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Half Transfer Finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Full Transfer Finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH6CNT,DMA channel 6 counter" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH6PADDR,DMA channel 6 peripheral base address" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH6MADDR,DMA channel 6 memory base address" hexmask.long 0xC 0.--31. 1. "MADDR,Memory address" tree.end tree "DMA1" base ad:0x40020400 rgroup.long 0x0++0x3 line.long 0x0 "INTF,Interrupt flag register" bitfld.long 0x0 19. "ERRIF4,Error flag of channel 4" "0,1" bitfld.long 0x0 18. "HTFIF4,Half transfer finish flag of channel 4" "0,1" bitfld.long 0x0 17. "FTFIF4,Full Transfer finish flag of channe 4" "0,1" bitfld.long 0x0 16. "GIF4,Global interrupt flag of channel 4" "0,1" bitfld.long 0x0 15. "ERRIF3,Error flag of channel 3" "0,1" bitfld.long 0x0 14. "HTFIF3,Half transfer finish flag of channel 3" "0,1" bitfld.long 0x0 13. "FTFIF3,Full Transfer finish flag of channe 3" "0,1" bitfld.long 0x0 12. "GIF3,Global interrupt flag of channel 3" "0,1" bitfld.long 0x0 11. "ERRIF2,Error flag of channel 2" "0,1" bitfld.long 0x0 10. "HTFIF2,Half transfer finish flag of channel 2" "0,1" bitfld.long 0x0 9. "FTFIF2,Full Transfer finish flag of channe 2" "0,1" newline bitfld.long 0x0 8. "GIF2,Global interrupt flag of channel 2" "0,1" bitfld.long 0x0 7. "ERRIF1,Error flag of channel 1" "0,1" bitfld.long 0x0 6. "HTFIF1,Half transfer finish flag of channel 1" "0,1" bitfld.long 0x0 5. "FTFIF1,Full Transfer finish flag of channe 1" "0,1" bitfld.long 0x0 4. "GIF1,Global interrupt flag of channel 1" "0,1" bitfld.long 0x0 3. "ERRIF0,Error flag of channel 0" "0,1" bitfld.long 0x0 2. "HTFIF0,Half transfer finish flag of channel 0" "0,1" bitfld.long 0x0 1. "FTFIF0,Full Transfer finish flag of channe 0" "0,1" bitfld.long 0x0 0. "GIF0,Global interrupt flag of channel 0" "0,1" wgroup.long 0x4++0x3 line.long 0x0 "INTC,Interrupt flag clear register" bitfld.long 0x0 19. "ERRIFC4,Clear bit for error flag of channel 4" "0,1" bitfld.long 0x0 18. "HTFIFC4,Clear bit for half transfer finish flag of channel 4" "0,1" bitfld.long 0x0 17. "FTFIFC4,Clear bit for full transfer finish flag of channel 4" "0,1" bitfld.long 0x0 16. "GIFC4,Clear global interrupt flag of channel 4" "0,1" bitfld.long 0x0 15. "ERRIFC3,Clear bit for error flag of channel 3" "0,1" bitfld.long 0x0 14. "HTFIFC3,Clear bit for half transfer finish flag of channel 3" "0,1" bitfld.long 0x0 13. "FTFIFC3,Clear bit for full transfer finish flag of channel 3" "0,1" bitfld.long 0x0 12. "GIFC3,Clear global interrupt flag of channel 3" "0,1" bitfld.long 0x0 11. "ERRIFC2,Clear bit for error flag of channel 2" "0,1" bitfld.long 0x0 10. "HTFIFC2,Clear bit for half transfer finish flag of channel 2" "0,1" bitfld.long 0x0 9. "FTFIFC2,Clear bit for full transfer finish flag of channel 2" "0,1" newline bitfld.long 0x0 8. "GIFC2,Clear global interrupt flag of channel 2" "0,1" bitfld.long 0x0 7. "ERRIFC1,Clear bit for error flag of channel 1" "0,1" bitfld.long 0x0 6. "HTFIFC1,Clear bit for half transfer finish flag of channel 1" "0,1" bitfld.long 0x0 5. "FTFIFC1,Clear bit for full transfer finish flag of channel 1" "0,1" bitfld.long 0x0 4. "GIFC1,Clear global interrupt flag of channel 1" "0,1" bitfld.long 0x0 3. "ERRIFC0,Clear bit for error flag of channel 0" "0,1" bitfld.long 0x0 2. "HTFIFC0,Clear bit for half transfer finish flag of channel 0" "0,1" bitfld.long 0x0 1. "FTFIFC0,Clear bit for full transfer finish flag of channel 0" "0,1" bitfld.long 0x0 0. "GIFC0,Clear global interrupt flag of channel 0" "0,1" group.long 0x8++0xF line.long 0x0 "CH0CTL,Channel 0 control register" bitfld.long 0x0 14. "M2M,Memory to Memory Mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Enable bit for channel error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Enable bit for channel half transfer finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Enable bit for channel full transfer finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH0CNT,Channel 0 counter register" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH0PADDR,Channel 0 peripheral base address register" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH0MADDR,Channel 0 memory base address register" hexmask.long 0xC 0.--31. 1. "MADDR,Memory base address" group.long 0x1C++0xF line.long 0x0 "CH1CTL,Channel 1 control register" bitfld.long 0x0 14. "M2M,Memory to Memory Mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Enable bit for channel error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Enable bit for channel half transfer finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Enable bit for channel full transfer finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH1CNT,Channel 1 counter register" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH1PADDR,Channel 1 peripheral base address register" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH1MADDR,Channel 1 memory base address register" hexmask.long 0xC 0.--31. 1. "MADDR,Memory base address" group.long 0x30++0xF line.long 0x0 "CH2CTL,Channel 2 control register" bitfld.long 0x0 14. "M2M,Memory to Memory Mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Enable bit for channel error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Enable bit for channel half transfer finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Enable bit for channel full transfer finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH2CNT,Channel 2 counter register" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH2PADDR,Channel 2 peripheral base address register" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH2MADDR,Channel 2 memory base address register" hexmask.long 0xC 0.--31. 1. "MADDR,Memory base address" group.long 0x44++0xF line.long 0x0 "CH3CTL,Channel 3 control register" bitfld.long 0x0 14. "M2M,Memory to Memory Mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Enable bit for channel error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Enable bit for channel half transfer finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Enable bit for channel full transfer finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH3CNT,Channel 3 counter register" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH3PADDR,Channel 3 peripheral base address register" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH3MADDR,Channel 3 memory base address register" hexmask.long 0xC 0.--31. 1. "MADDR,Memory base address" group.long 0x58++0xF line.long 0x0 "CH4CTL,Channel 4 control register" bitfld.long 0x0 14. "M2M,Memory to Memory Mode" "0,1" bitfld.long 0x0 12.--13. "PRIO,Priority level" "0,1,2,3" bitfld.long 0x0 10.--11. "MWIDTH,Transfer data size of memory" "0,1,2,3" bitfld.long 0x0 8.--9. "PWIDTH,Transfer data size of peripheral" "0,1,2,3" bitfld.long 0x0 7. "MNAGA,Next address generation algorithm of memory" "0,1" bitfld.long 0x0 6. "PNAGA,Next address generation algorithm of peripheral" "0,1" bitfld.long 0x0 5. "CMEN,Circular mode enable" "0,1" bitfld.long 0x0 4. "DIR,Transfer direction" "0,1" bitfld.long 0x0 3. "ERRIE,Enable bit for channel error interrupt" "0,1" bitfld.long 0x0 2. "HTFIE,Enable bit for channel half transfer finish interrupt" "0,1" bitfld.long 0x0 1. "FTFIE,Enable bit for channel full transfer finish interrupt" "0,1" newline bitfld.long 0x0 0. "CHEN,Channel enable" "0,1" line.long 0x4 "CH4CNT,Channel 4 counter register" hexmask.long.word 0x4 0.--15. 1. "CNT,Transfer counter" line.long 0x8 "CH4PADDR,Channel 4 peripheral base address register" hexmask.long 0x8 0.--31. 1. "PADDR,Peripheral base address" line.long 0xC "CH4MADDR,Channel 4 memory base address register" hexmask.long 0xC 0.--31. 1. "MADDR,Memory base address" tree.end tree.end tree "DMAMUX (DMA Request Multiplexer)" base ad:0x40020800 group.long 0x0++0x2F line.long 0x0 "RM_CH0CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0x0 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0x0 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0x0 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0x0 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0x0 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0x0 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0x0 0.--6. 1. "MUXID,Multiplexer input identification" line.long 0x4 "RM_CH1CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0x4 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0x4 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0x4 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0x4 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0x4 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0x4 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0x4 0.--6. 1. "MUXID,Multiplexer input identification" line.long 0x8 "RM_CH2CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0x8 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0x8 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0x8 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0x8 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0x8 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0x8 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0x8 0.--6. 1. "MUXID,Multiplexer input identification" line.long 0xC "RM_CH3CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0xC 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0xC 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0xC 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0xC 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0xC 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0xC 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0xC 0.--6. 1. "MUXID,Multiplexer input identification" line.long 0x10 "RM_CH4CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0x10 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0x10 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0x10 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0x10 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0x10 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0x10 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0x10 0.--6. 1. "MUXID,Multiplexer input identification" line.long 0x14 "RM_CH5CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0x14 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0x14 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0x14 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0x14 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0x14 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0x14 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0x14 0.--6. 1. "MUXID,Multiplexer input identification" line.long 0x18 "RM_CH6CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0x18 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0x18 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0x18 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0x18 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0x18 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0x18 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0x18 0.--6. 1. "MUXID,Multiplexer input identification" line.long 0x1C "RM_CH7CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0x1C 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0x1C 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0x1C 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0x1C 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0x1C 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0x1C 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0x1C 0.--6. 1. "MUXID,Multiplexer input identification" line.long 0x20 "RM_CH8CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0x20 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0x20 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0x20 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0x20 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0x20 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0x20 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0x20 0.--6. 1. "MUXID,Multiplexer input identification" line.long 0x24 "RM_CH9CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0x24 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0x24 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0x24 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0x24 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0x24 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0x24 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0x24 0.--6. 1. "MUXID,Multiplexer input identification" line.long 0x28 "RM_CH10CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0x28 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0x28 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0x28 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0x28 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0x28 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0x28 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0x28 0.--6. 1. "MUXID,Multiplexer input identification" line.long 0x2C "RM_CH11CFG,Request multiplexer channel x configuration register" hexmask.long.byte 0x2C 24.--28. 1. "SYNCID,Synchronization input identification" hexmask.long.byte 0x2C 19.--23. 1. "NBR,Number of DMA requests to forward" bitfld.long 0x2C 17.--18. "SYNCP,Synchronization input polarity" "0,1,2,3" bitfld.long 0x2C 16. "SYNCEN,Synchronization enable" "0,1" bitfld.long 0x2C 9. "EVGEN,Event generation enable" "0,1" bitfld.long 0x2C 8. "SOIE,Synchronization overrun interrupt enable" "0,1" hexmask.long.byte 0x2C 0.--6. 1. "MUXID,Multiplexer input identification" rgroup.long 0x80++0x3 line.long 0x0 "RM_INTF,Request multiplexer channel interrupt flag register" bitfld.long 0x0 11. "SOIF11,Synchronization overrun event flag of request multiplexer channel 11" "0,1" bitfld.long 0x0 10. "SOIF10,Synchronization overrun event flag of request multiplexer channel 10" "0,1" bitfld.long 0x0 9. "SOIF9,Synchronization overrun event flag of request multiplexer channel 9" "0,1" bitfld.long 0x0 8. "SOIF8,Synchronization overrun event flag of request multiplexer channel 8" "0,1" bitfld.long 0x0 7. "SOIF7,Synchronization overrun event flag of request multiplexer channel 7" "0,1" bitfld.long 0x0 6. "SOIF6,Synchronization overrun event flag of request multiplexer channel 6" "0,1" bitfld.long 0x0 5. "SOIF5,Synchronization overrun event flag of request multiplexer channel 5" "0,1" bitfld.long 0x0 4. "SOIF4,Synchronization overrun event flag of request multiplexer channel 4" "0,1" bitfld.long 0x0 3. "SOIF3,Synchronization overrun event flag of request multiplexer channel 3" "0,1" bitfld.long 0x0 2. "SOIF2,Synchronization overrun event flag of request multiplexer channel 2" "0,1" bitfld.long 0x0 1. "SOIF1,Synchronization overrun event flag of request multiplexer channel 1" "0,1" newline bitfld.long 0x0 0. "SOIF0,Synchronization overrun event flag of request multiplexer channel 0" "0,1" wgroup.long 0x84++0x3 line.long 0x0 "RM_INTC,Request multiplexer channel interrupt flag clear register" bitfld.long 0x0 11. "SOIFC11,Clear bit for synchronization overrun event flag of request multiplexer channel 11" "0,1" bitfld.long 0x0 10. "SOIFC10,Clear bit for synchronization overrun event flag of request multiplexer channel 10" "0,1" bitfld.long 0x0 9. "SOIFC9,Clear bit for synchronization overrun event flag of request multiplexer channel 9" "0,1" bitfld.long 0x0 8. "SOIFC8,Clear bit for synchronization overrun event flag of request multiplexer channel 8" "0,1" bitfld.long 0x0 7. "SOIFC7,Clear bit for synchronization overrun event flag of request multiplexer channel 7" "0,1" bitfld.long 0x0 6. "SOIFC6,Clear bit for synchronization overrun event flag of request multiplexer channel 6" "0,1" bitfld.long 0x0 5. "SOIFC5,Clear bit for synchronization overrun event flag of request multiplexer channel 5" "0,1" bitfld.long 0x0 4. "SOIFC4,Clear bit for synchronization overrun event flag of request multiplexer channel 4" "0,1" bitfld.long 0x0 3. "SOIFC3,Clear bit for synchronization overrun event flag of request multiplexer channel 3" "0,1" bitfld.long 0x0 2. "SOIFC2,Clear bit for synchronization overrun event flag of request multiplexer channel 2" "0,1" bitfld.long 0x0 1. "SOIFC1,Clear bit for synchronization overrun event flag of request multiplexer channel 1" "0,1" newline bitfld.long 0x0 0. "SOIFC0,Clear bit for synchronization overrun event flag of request multiplexer channel 0" "0,1" group.long 0x100++0xF line.long 0x0 "RG_CH0CFG,Request generator channel x configuration register" hexmask.long.byte 0x0 19.--23. 1. "NBRG,Number of DMA requests to be generated" bitfld.long 0x0 17.--18. "RGTP,DMA request generator trigger polarity" "0,1,2,3" bitfld.long 0x0 16. "RGEN,DMA request generator channel x enable" "0,1" bitfld.long 0x0 8. "TOIE,Trigger overrun interrupt enable" "0,1" hexmask.long.byte 0x0 0.--4. 1. "TID,Trigger input identification" line.long 0x4 "RG_CH1CFG,Request generator channel 1 configuration register" hexmask.long.byte 0x4 19.--23. 1. "NBRG,Number of DMA requests to be generated" bitfld.long 0x4 17.--18. "RGTP,DMA request generator trigger polarity" "0,1,2,3" bitfld.long 0x4 16. "RGEN,DMA request generator channel x enable" "0,1" bitfld.long 0x4 8. "TOIE,Trigger overrun interrupt enable" "0,1" hexmask.long.byte 0x4 0.--4. 1. "TID,Trigger input identification" line.long 0x8 "RG_CH2CFG,Request generator channel 2 configuration register" hexmask.long.byte 0x8 19.--23. 1. "NBRG,Number of DMA requests to be generated" bitfld.long 0x8 17.--18. "RGTP,DMA request generator trigger polarity" "0,1,2,3" bitfld.long 0x8 16. "RGEN,DMA request generator channel x enable" "0,1" bitfld.long 0x8 8. "TOIE,Trigger overrun interrupt enable" "0,1" hexmask.long.byte 0x8 0.--4. 1. "TID,Trigger input identification" line.long 0xC "RG_CH3CFG,Request generator channel 3 configuration register" hexmask.long.byte 0xC 19.--23. 1. "NBRG,Number of DMA requests to be generated" bitfld.long 0xC 17.--18. "RGTP,DMA request generator trigger polarity" "0,1,2,3" bitfld.long 0xC 16. "RGEN,DMA request generator channel x enable" "0,1" bitfld.long 0xC 8. "TOIE,Trigger overrun interrupt enable" "0,1" hexmask.long.byte 0xC 0.--4. 1. "TID,Trigger input identification" rgroup.long 0x140++0x7 line.long 0x0 "RG_INTF,Request generator interrupt flag register" bitfld.long 0x0 3. "TOIF3,Trigger overrun event flag of request generator channel 3" "0,1" bitfld.long 0x0 2. "TOIF2,Trigger overrun event flag of request generator channel 2" "0,1" bitfld.long 0x0 1. "TOIF1,Trigger overrun event flag of request generator channel 1" "0,1" bitfld.long 0x0 0. "TOIF0,Trigger overrun event flag of request generator channel 0" "0,1" line.long 0x4 "RG_INTC,Rquest generator interrupt flag clear register" bitfld.long 0x4 3. "TOIFC3,Clear bit for trigger overrun event flag of request generator channel 3" "0,1" bitfld.long 0x4 2. "TOIFC2,Clear bit for trigger overrun event flag of request generator channel 2" "0,1" bitfld.long 0x4 1. "TOIFC1,Clear bit for trigger overrun event flag of request generator channel 1" "0,1" bitfld.long 0x4 0. "TOIFC0,Clear bit for trigger overrun event flag of request generator channel 0" "0,1" tree.end tree "EXTI (External Interrupt/Event Controller)" base ad:0x40010400 group.long 0x0++0x17 line.long 0x0 "INTEN,Interrupt enable register" bitfld.long 0x0 24. "INTEN24,Enable Interrupt on line 24" "0,1" bitfld.long 0x0 23. "INTEN23,Enable Interrupt on line 23" "0,1" bitfld.long 0x0 22. "INTEN22,Enable Interrupt on line 22" "0,1" bitfld.long 0x0 21. "INTEN21,Enable Interrupt on line 21" "0,1" bitfld.long 0x0 20. "INTEN20,Enable Interrupt on line 20" "0,1" bitfld.long 0x0 19. "INTEN19,Enable Interrupt on line 19" "0,1" bitfld.long 0x0 18. "INTEN18,Enable Interrupt on line 18" "0,1" bitfld.long 0x0 17. "INTEN17,Enable Interrupt on line 17" "0,1" bitfld.long 0x0 16. "INTEN16,Enable Interrupt on line 16" "0,1" bitfld.long 0x0 15. "INTEN15,Enable Interrupt on line 15" "0,1" bitfld.long 0x0 14. "INTEN14,Enable Interrupt on line 14" "0,1" bitfld.long 0x0 13. "INTEN13,Enable Interrupt on line 13" "0,1" newline bitfld.long 0x0 12. "INTEN12,Enable Interrupt on line 12" "0,1" bitfld.long 0x0 11. "INTEN11,Enable Interrupt on line 11" "0,1" bitfld.long 0x0 10. "INTEN10,Enable Interrupt on line 10" "0,1" bitfld.long 0x0 9. "INTEN9,Enable Interrupt on line 9" "0,1" bitfld.long 0x0 8. "INTEN8,Enable Interrupt on line 8" "0,1" bitfld.long 0x0 7. "INTEN7,Enable Interrupt on line 7" "0,1" bitfld.long 0x0 6. "INTEN6,Enable Interrupt on line 6" "0,1" bitfld.long 0x0 5. "INTEN5,Enable Interrupt on line 5" "0,1" bitfld.long 0x0 4. "INTEN4,Enable Interrupt on line 4" "0,1" bitfld.long 0x0 3. "INTEN3,Enable Interrupt on line 3" "0,1" bitfld.long 0x0 2. "INTEN2,Enable Interrupt on line 2" "0,1" bitfld.long 0x0 1. "INTEN1,Enable Interrupt on line 1" "0,1" newline bitfld.long 0x0 0. "INTEN0,Enable Interrupt on line 0" "0,1" line.long 0x4 "EVEN,Event enable register (EXTI_EVEN)" bitfld.long 0x4 24. "EVEN24,Enable Event on line 24" "0,1" bitfld.long 0x4 23. "EVEN23,Enable Event on line 23" "0,1" bitfld.long 0x4 22. "EVEN22,Enable Event on line 22" "0,1" bitfld.long 0x4 21. "EVEN21,Enable Event on line 21" "0,1" bitfld.long 0x4 20. "EVEN20,Enable Event on line 20" "0,1" bitfld.long 0x4 19. "EVEN19,Enable Event on line 19" "0,1" bitfld.long 0x4 18. "EVEN18,Enable Event on line 18" "0,1" bitfld.long 0x4 17. "EVEN17,Enable Event on line 17" "0,1" bitfld.long 0x4 16. "EVEN16,Enable Event on line 16" "0,1" bitfld.long 0x4 15. "EVEN15,Enable Event on line 15" "0,1" bitfld.long 0x4 14. "EVEN14,Enable Event on line 14" "0,1" bitfld.long 0x4 13. "EVEN13,Enable Event on line 13" "0,1" newline bitfld.long 0x4 12. "EVEN12,Enable Event on line 12" "0,1" bitfld.long 0x4 11. "EVEN11,Enable Event on line 11" "0,1" bitfld.long 0x4 10. "EVEN10,Enable Event on line 10" "0,1" bitfld.long 0x4 9. "EVEN9,Enable Event on line 9" "0,1" bitfld.long 0x4 8. "EVEN8,Enable Event on line 8" "0,1" bitfld.long 0x4 7. "EVEN7,Enable Event on line 7" "0,1" bitfld.long 0x4 6. "EVEN6,Enable Event on line 6" "0,1" bitfld.long 0x4 5. "EVEN5,Enable Event on line 5" "0,1" bitfld.long 0x4 4. "EVEN4,Enable Event on line 4" "0,1" bitfld.long 0x4 3. "EVEN3,Enable Event on line 3" "0,1" bitfld.long 0x4 2. "EVEN2,Enable Event on line 2" "0,1" bitfld.long 0x4 1. "EVEN1,Enable Event on line 1" "0,1" newline bitfld.long 0x4 0. "EVEN0,Enable Event on line 0" "0,1" line.long 0x8 "RTEN,Rising Edge Trigger Enable register" bitfld.long 0x8 24. "RTEN24,Rising trigger event configuration of" "0,1" bitfld.long 0x8 23. "RTEN23,Rising trigger event configuration of" "0,1" bitfld.long 0x8 22. "RTEN22,Rising trigger event configuration of" "0,1" bitfld.long 0x8 21. "RTEN21,Rising trigger event configuration of" "0,1" bitfld.long 0x8 20. "RTEN20,Rising trigger event configuration of" "0,1" bitfld.long 0x8 19. "RTEN19,Rising trigger event configuration of" "0,1" bitfld.long 0x8 18. "RTEN18,Rising trigger event configuration of" "0,1" bitfld.long 0x8 17. "RTEN17,Rising trigger event configuration of" "0,1" bitfld.long 0x8 16. "RTEN16,Rising trigger event configuration of" "0,1" bitfld.long 0x8 15. "RTEN15,Rising trigger event configuration of" "0,1" bitfld.long 0x8 14. "RTEN14,Rising trigger event configuration of" "0,1" bitfld.long 0x8 13. "RTEN13,Rising trigger event configuration of" "0,1" newline bitfld.long 0x8 12. "RTEN12,Rising trigger event configuration of" "0,1" bitfld.long 0x8 11. "RTEN11,Rising trigger event configuration of" "0,1" bitfld.long 0x8 10. "RTEN10,Rising trigger event configuration of" "0,1" bitfld.long 0x8 9. "RTEN9,Rising trigger event configuration of" "0,1" bitfld.long 0x8 8. "RTEN8,Rising trigger event configuration of" "0,1" bitfld.long 0x8 7. "RTEN7,Rising trigger event configuration of" "0,1" bitfld.long 0x8 6. "RTEN6,Rising trigger event configuration of" "0,1" bitfld.long 0x8 5. "RTEN5,Rising trigger event configuration of" "0,1" bitfld.long 0x8 4. "RTEN4,Rising trigger event configuration of" "0,1" bitfld.long 0x8 3. "RTEN3,Rising trigger event configuration of" "0,1" bitfld.long 0x8 2. "RTEN2,Rising trigger event configuration of" "0,1" bitfld.long 0x8 1. "RTEN1,Rising trigger event configuration of" "0,1" newline bitfld.long 0x8 0. "RTEN0,Rising trigger event configuration of" "0,1" line.long 0xC "FTEN,Falling Egde Trigger Enable register" bitfld.long 0xC 24. "FTEN24,Falling trigger event configuration of" "0,1" bitfld.long 0xC 23. "FTEN23,Falling trigger event configuration of" "0,1" bitfld.long 0xC 22. "FTEN22,Falling trigger event configuration of" "0,1" bitfld.long 0xC 21. "FTEN21,Falling trigger event configuration of" "0,1" bitfld.long 0xC 20. "FTEN20,Falling trigger event configuration of" "0,1" bitfld.long 0xC 19. "FTEN19,Falling trigger event configuration of" "0,1" bitfld.long 0xC 18. "FTEN18,Falling trigger event configuration of" "0,1" bitfld.long 0xC 17. "FTEN17,Falling trigger event configuration of" "0,1" bitfld.long 0xC 16. "FTEN16,Falling trigger event configuration of" "0,1" bitfld.long 0xC 15. "FTEN15,Falling trigger event configuration of" "0,1" bitfld.long 0xC 14. "FTEN14,Falling trigger event configuration of" "0,1" bitfld.long 0xC 13. "FTEN13,Falling trigger event configuration of" "0,1" newline bitfld.long 0xC 12. "FTEN12,Falling trigger event configuration of" "0,1" bitfld.long 0xC 11. "FTEN11,Falling trigger event configuration of" "0,1" bitfld.long 0xC 10. "FTEN10,Falling trigger event configuration of" "0,1" bitfld.long 0xC 9. "FTEN9,Falling trigger event configuration of" "0,1" bitfld.long 0xC 8. "FTEN8,Falling trigger event configuration of" "0,1" bitfld.long 0xC 7. "FTEN7,Falling trigger event configuration of" "0,1" bitfld.long 0xC 6. "FTEN6,Falling trigger event configuration of" "0,1" bitfld.long 0xC 5. "FTEN5,Falling trigger event configuration of" "0,1" bitfld.long 0xC 4. "FTEN4,Falling trigger event configuration of" "0,1" bitfld.long 0xC 3. "FTEN3,Falling trigger event configuration of" "0,1" bitfld.long 0xC 2. "FTEN2,Falling trigger event configuration of" "0,1" bitfld.long 0xC 1. "FTEN1,Falling trigger event configuration of" "0,1" newline bitfld.long 0xC 0. "FTEN0,Falling trigger event configuration of" "0,1" line.long 0x10 "SWIEV,Software interrupt event register" bitfld.long 0x10 24. "SWIEV24,Software Interrupt on line" "0,1" bitfld.long 0x10 23. "SWIEV23,Software Interrupt on line" "0,1" bitfld.long 0x10 22. "SWIEV22,Software Interrupt on line" "0,1" bitfld.long 0x10 21. "SWIEV21,Software Interrupt on line" "0,1" bitfld.long 0x10 20. "SWIEV20,Software Interrupt on line" "0,1" bitfld.long 0x10 19. "SWIEV19,Software Interrupt on line" "0,1" bitfld.long 0x10 18. "SWIEV18,Software Interrupt on line" "0,1" bitfld.long 0x10 17. "SWIEV17,Software Interrupt on line" "0,1" bitfld.long 0x10 16. "SWIEV16,Software Interrupt on line" "0,1" bitfld.long 0x10 15. "SWIEV15,Software Interrupt on line" "0,1" bitfld.long 0x10 14. "SWIEV14,Software Interrupt on line" "0,1" bitfld.long 0x10 13. "SWIEV13,Software Interrupt on line" "0,1" newline bitfld.long 0x10 12. "SWIEV12,Software Interrupt on line" "0,1" bitfld.long 0x10 11. "SWIEV11,Software Interrupt on line" "0,1" bitfld.long 0x10 10. "SWIEV10,Software Interrupt on line" "0,1" bitfld.long 0x10 9. "SWIEV9,Software Interrupt on line" "0,1" bitfld.long 0x10 8. "SWIEV8,Software Interrupt on line" "0,1" bitfld.long 0x10 7. "SWIEV7,Software Interrupt on line" "0,1" bitfld.long 0x10 6. "SWIEV6,Software Interrupt on line" "0,1" bitfld.long 0x10 5. "SWIEV5,Software Interrupt on line" "0,1" bitfld.long 0x10 4. "SWIEV4,Software Interrupt on line" "0,1" bitfld.long 0x10 3. "SWIEV3,Software Interrupt on line" "0,1" bitfld.long 0x10 2. "SWIEV2,Software Interrupt on line" "0,1" bitfld.long 0x10 1. "SWIEV1,Software Interrupt on line" "0,1" newline bitfld.long 0x10 0. "SWIEV0,Software Interrupt on line" "0,1" line.long 0x14 "PD,Pending register (EXTI_PD)" bitfld.long 0x14 24. "PD24,Pending bit 24" "0,1" bitfld.long 0x14 23. "PD23,Pending bit 23" "0,1" bitfld.long 0x14 22. "PD22,Pending bit 22" "0,1" bitfld.long 0x14 21. "PD21,Pending bit 21" "0,1" bitfld.long 0x14 20. "PD20,Pending bit 20" "0,1" bitfld.long 0x14 19. "PD19,Pending bit 19" "0,1" bitfld.long 0x14 18. "PD18,Pending bit 18" "0,1" bitfld.long 0x14 17. "PD17,Pending bit 17" "0,1" bitfld.long 0x14 16. "PD16,Pending bit 16" "0,1" bitfld.long 0x14 15. "PD15,Pending bit 15" "0,1" bitfld.long 0x14 14. "PD14,Pending bit 14" "0,1" bitfld.long 0x14 13. "PD13,Pending bit 13" "0,1" newline bitfld.long 0x14 12. "PD12,Pending bit 12" "0,1" bitfld.long 0x14 11. "PD11,Pending bit 11" "0,1" bitfld.long 0x14 10. "PD10,Pending bit 10" "0,1" bitfld.long 0x14 9. "PD9,Pending bit 9" "0,1" bitfld.long 0x14 8. "PD8,Pending bit 8" "0,1" bitfld.long 0x14 7. "PD7,Pending bit 7" "0,1" bitfld.long 0x14 6. "PD6,Pending bit 6" "0,1" bitfld.long 0x14 5. "PD5,Pending bit 5" "0,1" bitfld.long 0x14 4. "PD4,Pending bit 4" "0,1" bitfld.long 0x14 3. "PD3,Pending bit 3" "0,1" bitfld.long 0x14 2. "PD2,Pending bit 2" "0,1" bitfld.long 0x14 1. "PD1,Pending bit 1" "0,1" newline bitfld.long 0x14 0. "PD0,Pending bit 0" "0,1" tree.end tree "FMC (Flash Memory Controller)" base ad:0x40022000 group.long 0x0++0x7 line.long 0x0 "WS,wait state register" rbitfld.long 0x0 18. "PRAMRDY,Fast program SRAM ready flag" "0,1" rbitfld.long 0x0 17. "BRAMRDY,Basic SRAM ready flag" "0,1" rbitfld.long 0x0 16. "ERAMRDY,EEPROM SRAM ready flag" "0,1" bitfld.long 0x0 14. "SLEEP_SLP,Flash goto sleep mode or power-down mode when MCU enters deepsleep mode" "0,1" bitfld.long 0x0 11. "IDRST,Cache reset" "0,1" bitfld.long 0x0 9. "IDCEN,Cache enable" "0,1" bitfld.long 0x0 4. "PFEN,Pre-fetch enable" "0,1" bitfld.long 0x0 0.--2. "WSCNT,wait state counter register" "0,1,2,3,4,5,6,7" line.long 0x4 "ECCCS,ECC control and status register" rbitfld.long 0x4 31. "ECCDET,Two bit errors detect flag." "0,1" rbitfld.long 0x4 30. "ECCCOR,One bit error detected and correct flag" "0,1" rbitfld.long 0x4 29. "EPECCDET,EEPROM two bit errors detect flag" "0,1" rbitfld.long 0x4 27. "OB0ECCDET,Option bytes two bit errors detect flag" "0,1" rbitfld.long 0x4 26. "OB1ECCDET,Option bytes 1 two bit errors detect flag" "0,1" rbitfld.long 0x4 25. "ECCDETIE,Two bit errors detect interrupt enable" "0,1" bitfld.long 0x4 24. "ECCCORIE,One bit error correct interrupt enable" "0,1" rbitfld.long 0x4 23. "OTP_ECC,ECC bit error is detected in OTP" "0,1" rbitfld.long 0x4 22. "DF_ECC,ECC bit error is detected in data flash" "0,1" newline rbitfld.long 0x4 21. "SYS_ECC,Cache enable" "0,1" rbitfld.long 0x4 20. "BK1_ECC,ECC bit error is detected in bank 1" "0,1" rbitfld.long 0x4 19. "OB0_ECC,An ECC bit error is detected in option bytes 0" "0,1" hexmask.long.word 0x4 0.--14. 1. "ECCADDR,The offset address of double word where an ECC error is detected." wgroup.long 0x8++0x3 line.long 0x0 "KEY0,Unlock key register0" hexmask.long 0x0 0.--31. 1. "KEY,FMC_CTL unlock register" group.long 0xC++0x7 line.long 0x0 "STAT0,Status register 0" bitfld.long 0x0 15. "RSTERR,voltage is below 2.8V or a system reset occurs" "0,1" bitfld.long 0x0 6. "CBCMDERR,The checked area by the check blank command is all 0xFF or not." "0,1" bitfld.long 0x0 5. "ENDF,End of operation flag bit" "0,1" bitfld.long 0x0 4. "WPERR,Erase/Program protection error flag bit" "0,1" bitfld.long 0x0 3. "PGAERR,Program alignment error flag bit" "0,1" bitfld.long 0x0 2. "PGERR,Program error flag bit" "0,1" bitfld.long 0x0 1. "PGSERR,Program sequence error flag bit." "0,1" rbitfld.long 0x0 0. "BUSY,The flash is busy bit" "0,1" line.long 0x4 "CTL0,Control register 0" bitfld.long 0x4 29.--31. "CBCMDLEN,CBCMD read length 2^(CBCMDLEN)" "0,1,2,3,4,5,6,7" bitfld.long 0x4 16. "CBCMD,The command to check the selected area is blank or not." "0,1" bitfld.long 0x4 12. "ENDIE,End of operation interrupt enable bit" "0,1" bitfld.long 0x4 10. "ERRIE,Error interrupt enable bit" "0,1" bitfld.long 0x4 8. "FSTPG,Main flash fast program command bit" "0,1" bitfld.long 0x4 7. "LK,FMC_CTL lock bit" "0,1" bitfld.long 0x4 6. "START,Send erase command to FMC bit" "0,1" bitfld.long 0x4 2. "MER,Main flash mass erase for bank0 command bit" "0,1" bitfld.long 0x4 1. "PER,Main flash page erase for bank0 command bit" "0,1" newline bitfld.long 0x4 0. "PG,Main flash program for bank0 command bit" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "ADDR0,Address register 0" hexmask.long 0x0 0.--31. 1. "ADDR,Flash erase/program command address bits" wgroup.long 0x44++0x7 line.long 0x0 "OBKEY,Option byte unlock key register" hexmask.long 0x0 0.--31. 1. "OBKEY,FMC_ CTL1 option bytes operation unlock register" line.long 0x4 "KEY1,Unlock key register 1" hexmask.long 0x4 0.--31. 1. "KEY,FMC_CTL1 unlock register" group.long 0x4C++0x7 line.long 0x0 "STAT1,Status register 1" bitfld.long 0x0 15. "RSTERR,voltage is below 2.8V or a system reset occurs" "0,1" bitfld.long 0x0 6. "CBCMDERR,The checked area by the check blank command is all 0xFF or not." "0,1" bitfld.long 0x0 5. "ENDF,End of operation flag bit" "0,1" bitfld.long 0x0 4. "WPERR,Erase/Program protection error flag bit" "0,1" bitfld.long 0x0 3. "PGAERR,Program alignment error flag bit" "0,1" bitfld.long 0x0 2. "PGERR,Program error flag bit" "0,1" bitfld.long 0x0 1. "PGSERR,Program sequence error flag bit." "0,1" rbitfld.long 0x0 0. "BUSY,The flash is busy bit" "0,1" line.long 0x4 "CTL1,Control register 1" bitfld.long 0x4 29.--31. "CBCMDLEN,CBCMD read length 2^(CBCMDLEN)" "0,1,2,3,4,5,6,7" bitfld.long 0x4 24.--25. "SRAMCMD,Shared SRAM command" "0,1,2,3" bitfld.long 0x4 16. "CBCMD,The command to check the selected area is blank or not." "0,1" bitfld.long 0x4 13. "OBRLD,Option byte reload bit" "0,1" bitfld.long 0x4 12. "ENDIE,End of operation interrupt enable bit" "0,1" bitfld.long 0x4 10. "ERRIE,Error interrupt enable bit" "0,1" bitfld.long 0x4 9. "OBWEN,Option byte erase/program enable bit" "0,1" bitfld.long 0x4 8. "FSTPG,Main flash fast program command bit" "0,1" bitfld.long 0x4 7. "LK,FMC_CTL1 lock bit" "0,1" newline bitfld.long 0x4 6. "START,Send erase command to FMC bit" "0,1" bitfld.long 0x4 5. "OB0ER,Option bytes 0 erase command bit" "0,1" bitfld.long 0x4 4. "OB0PG,Option bytes 0 program command bit" "0,1" bitfld.long 0x4 3. "MERDF,Data flash mass erase command bit" "0,1" bitfld.long 0x4 2. "MER,Main flash mass erase for bank1 command bit" "0,1" bitfld.long 0x4 1. "PER,Main flash page erase for bank1 command bit" "0,1" bitfld.long 0x4 0. "PG,Main flash program for bank1 command bit" "0,1" wgroup.long 0x54++0x3 line.long 0x0 "ADDR1,Address register 1" hexmask.long 0x0 0.--31. 1. "ADDR,Flash erase/program command address bits" rgroup.long 0x58++0xF line.long 0x0 "EPCNT,EP counter register" hexmask.long 0x0 0.--31. 1. "EPCNT,Record the EEPROM erase counter" line.long 0x4 "OBSTAT,Option byte control register" hexmask.long.word 0x4 16.--31. 1. "DATA,Store DATA[15:0] of option bytes block after system reset" hexmask.long.byte 0x4 8.--15. 1. "USER,Store USER of option bytes block after system reset" bitfld.long 0x4 1.--2. "PLEVEL,Option bytes security protection level" "0,1,2,3" bitfld.long 0x4 0. "OBERR,Option bytes read error bit" "0,1" line.long 0x8 "WP0,Erase/Program Protection register 0" hexmask.long 0x8 0.--31. 1. "BK0WP,Store WP[31:0] of option bytes block after system reset" line.long 0xC "WP1,Erase/Program Protection register 1" hexmask.long.byte 0xC 16.--23. 1. "EPWP,Store EEPROM WP of option bytes block after system reset." hexmask.long.byte 0xC 8.--15. 1. "DFWP,Store Data Flash WP of option bytes block after system reset." hexmask.long.byte 0xC 0.--7. 1. "BK1WP,Store bank 1 WP of option bytes block after system reset." group.long 0x68++0x3 line.long 0x0 "OB1CS,Option byte1 control and status register" hexmask.long.word 0x0 16.--31. 1. "LKVAL,Load OB1_LK_VALUE of option byte 1 after reset" bitfld.long 0x0 15. "EPLOAD,Load EPLOAD of option byte 1 after reset" "0,1" hexmask.long.byte 0x0 8.--11. 1. "EPSIZE,Load EPSIZE of option byte 1 after reset" hexmask.long.byte 0x0 4.--7. 1. "EFALC,Load EFALC of option byte 1 after reset" rbitfld.long 0x0 2. "OB1LK,When OB1_LK_VALUE is 0x33CC the OB1LK bit will be set. If OB1LK is 1 the FMC_OB1CS register cannot be configured anymore" "0,1" bitfld.long 0x0 1. "OB1START,Send option byte 1 change command to FMC." "0,1" rbitfld.long 0x0 0. "OB1ERR,Option bytes 1 read error bit." "0,1" rgroup.long 0x100++0x3 line.long 0x0 "PID,Product ID register" hexmask.long 0x0 0.--31. 1. "PID,Product reserved ID code register" tree.end tree "FWDGT (Free Watchdog Timer)" base ad:0x40003000 wgroup.long 0x0++0x3 line.long 0x0 "CTL,Control register" hexmask.long.word 0x0 0.--15. 1. "CMD,Key value" group.long 0x4++0x7 line.long 0x0 "PSC,Prescaler register" bitfld.long 0x0 0.--2. "PSC,Prescaler divider" "0,1,2,3,4,5,6,7" line.long 0x4 "RLD,Reload register" hexmask.long.word 0x4 0.--11. 1. "RLD,Free watchdog timer counter reload value" rgroup.long 0xC++0x3 line.long 0x0 "STAT,Status register" bitfld.long 0x0 2. "WUD,Watchdog counter window value update" "0,1" bitfld.long 0x0 1. "RUD,Free watchdog timer counter reload value update" "0,1" bitfld.long 0x0 0. "PUD,Free watchdog timer prescaler value update" "0,1" group.long 0x10++0x3 line.long 0x0 "WND,Window register" hexmask.long.word 0x0 0.--11. 1. "WND,Watchdog counter window value" tree.end tree "GPIO (General Purpose I/Os)" base ad:0x0 tree "GPIOA" base ad:0x48000000 group.long 0x0++0xF line.long 0x0 "CTL,GPIO port control register" bitfld.long 0x0 30.--31. "CTL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 28.--29. "CTL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 26.--27. "CTL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 24.--25. "CTL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 22.--23. "CTL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 20.--21. "CTL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 18.--19. "CTL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 16.--17. "CTL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 14.--15. "CTL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 12.--13. "CTL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 10.--11. "CTL5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 8.--9. "CTL4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x0 6.--7. "CTL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 4.--5. "CTL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 2.--3. "CTL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 0.--1. "CTL0,Port x configuration bits (y =" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OM15,Port x configuration bit" "0,1" bitfld.long 0x4 14. "OM14,Port x configuration bit" "0,1" bitfld.long 0x4 13. "OM13,Port x configuration bit" "0,1" bitfld.long 0x4 12. "OM12,Port x configuration bit" "0,1" bitfld.long 0x4 11. "OM11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OM10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OM9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OM8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OM7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OM6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OM5,Port x configuration bit 5" "0,1" bitfld.long 0x4 4. "OM4,Port x configuration bit 4" "0,1" newline bitfld.long 0x4 3. "OM3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OM2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OM1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OM0,Port x configuration bit 0" "0,1" line.long 0x8 "OSPD,GPIO port output speed" bitfld.long 0x8 30.--31. "OSPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSPD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 8.--9. "OSPD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 6.--7. "OSPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSPD0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUD,GPIO port pull-up/pull-down" bitfld.long 0xC 30.--31. "PUD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 8.--9. "PUD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 6.--7. "PUD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "ISTAT,GPIO port input data register" bitfld.long 0x0 15. "ISTAT15,Port input data (y =" "0,1" bitfld.long 0x0 14. "ISTAT14,Port input data (y =" "0,1" bitfld.long 0x0 13. "ISTAT13,Port input data (y =" "0,1" bitfld.long 0x0 12. "ISTAT12,Port input data (y =" "0,1" bitfld.long 0x0 11. "ISTAT11,Port input data (y =" "0,1" bitfld.long 0x0 10. "ISTAT10,Port input data (y =" "0,1" bitfld.long 0x0 9. "ISTAT9,Port input data (y =" "0,1" bitfld.long 0x0 8. "ISTAT8,Port input data (y =" "0,1" bitfld.long 0x0 7. "ISTAT7,Port input data (y =" "0,1" bitfld.long 0x0 6. "ISTAT6,Port input data (y =" "0,1" bitfld.long 0x0 5. "ISTAT5,Port input data (y =" "0,1" bitfld.long 0x0 4. "ISTAT4,Port input data (y =" "0,1" newline bitfld.long 0x0 3. "ISTAT3,Port input data (y =" "0,1" bitfld.long 0x0 2. "ISTAT2,Port input data (y =" "0,1" bitfld.long 0x0 1. "ISTAT1,Port input data (y =" "0,1" bitfld.long 0x0 0. "ISTAT0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "OCTL,GPIO port output data register" bitfld.long 0x0 15. "OCTL15,Port output data (y =" "0,1" bitfld.long 0x0 14. "OCTL14,Port output data (y =" "0,1" bitfld.long 0x0 13. "OCTL13,Port output data (y =" "0,1" bitfld.long 0x0 12. "OCTL12,Port output data (y =" "0,1" bitfld.long 0x0 11. "OCTL11,Port output data (y =" "0,1" bitfld.long 0x0 10. "OCTL10,Port output data (y =" "0,1" bitfld.long 0x0 9. "OCTL9,Port output data (y =" "0,1" bitfld.long 0x0 8. "OCTL8,Port output data (y =" "0,1" bitfld.long 0x0 7. "OCTL7,Port output data (y =" "0,1" bitfld.long 0x0 6. "OCTL6,Port output data (y =" "0,1" bitfld.long 0x0 5. "OCTL5,Port output data (y =" "0,1" bitfld.long 0x0 4. "OCTL4,Port output data (y =" "0,1" newline bitfld.long 0x0 3. "OCTL3,Port output data (y =" "0,1" bitfld.long 0x0 2. "OCTL2,Port output data (y =" "0,1" bitfld.long 0x0 1. "OCTL1,Port output data (y =" "0,1" bitfld.long 0x0 0. "OCTL0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BOP,GPIO port bit set/reset" bitfld.long 0x0 31. "CR15,Port x reset bit y (y =" "0,1" bitfld.long 0x0 30. "CR14,Port x reset bit y (y =" "0,1" bitfld.long 0x0 29. "CR13,Port x reset bit y (y =" "0,1" bitfld.long 0x0 28. "CR12,Port x reset bit y (y =" "0,1" bitfld.long 0x0 27. "CR11,Port x reset bit y (y =" "0,1" bitfld.long 0x0 26. "CR10,Port x reset bit y (y =" "0,1" bitfld.long 0x0 25. "CR9,Port x reset bit y (y =" "0,1" bitfld.long 0x0 24. "CR8,Port x reset bit y (y =" "0,1" bitfld.long 0x0 23. "CR7,Port x reset bit y (y =" "0,1" bitfld.long 0x0 22. "CR6,Port x reset bit y (y =" "0,1" bitfld.long 0x0 21. "CR5,Port x reset bit y (y =" "0,1" bitfld.long 0x0 20. "CR4,Port x reset bit y (y =" "0,1" newline bitfld.long 0x0 19. "CR3,Port x reset bit y (y =" "0,1" bitfld.long 0x0 18. "CR2,Port x reset bit y (y =" "0,1" bitfld.long 0x0 17. "CR1,Port x reset bit y (y =" "0,1" bitfld.long 0x0 16. "CR0,Port x reset bit y (y=" "0,1" bitfld.long 0x0 15. "BOP15,Port x set bit y (y=" "0,1" bitfld.long 0x0 14. "BOP14,Port x set bit y (y=" "0,1" bitfld.long 0x0 13. "BOP13,Port x set bit y (y=" "0,1" bitfld.long 0x0 12. "BOP12,Port x set bit y (y=" "0,1" bitfld.long 0x0 11. "BOP11,Port x set bit y (y=" "0,1" bitfld.long 0x0 10. "BOP10,Port x set bit y (y=" "0,1" bitfld.long 0x0 9. "BOP9,Port x set bit y (y=" "0,1" bitfld.long 0x0 8. "BOP8,Port x set bit y (y=" "0,1" newline bitfld.long 0x0 7. "BOP7,Port x set bit y (y=" "0,1" bitfld.long 0x0 6. "BOP6,Port x set bit y (y=" "0,1" bitfld.long 0x0 5. "BOP5,Port x set bit y (y=" "0,1" bitfld.long 0x0 4. "BOP4,Port x set bit y (y=" "0,1" bitfld.long 0x0 3. "BOP3,Port x set bit y (y=" "0,1" bitfld.long 0x0 2. "BOP2,Port x set bit y (y=" "0,1" bitfld.long 0x0 1. "BOP1,Port x set bit y (y=" "0,1" bitfld.long 0x0 0. "BOP0,Port x set bit y (y=" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LKK,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LK15,Port x lock bit y (y=" "0,1" bitfld.long 0x0 14. "LK14,Port x lock bit y (y=" "0,1" bitfld.long 0x0 13. "LK13,Port x lock bit y (y=" "0,1" bitfld.long 0x0 12. "LK12,Port x lock bit y (y=" "0,1" bitfld.long 0x0 11. "LK11,Port x lock bit y (y=" "0,1" bitfld.long 0x0 10. "LK10,Port x lock bit y (y=" "0,1" bitfld.long 0x0 9. "LK9,Port x lock bit y (y=" "0,1" bitfld.long 0x0 8. "LK8,Port x lock bit y (y=" "0,1" bitfld.long 0x0 7. "LK7,Port x lock bit y (y=" "0,1" bitfld.long 0x0 6. "LK6,Port x lock bit y (y=" "0,1" bitfld.long 0x0 5. "LK5,Port x lock bit y (y=" "0,1" newline bitfld.long 0x0 4. "LK4,Port x lock bit y (y=" "0,1" bitfld.long 0x0 3. "LK3,Port x lock bit y (y=" "0,1" bitfld.long 0x0 2. "LK2,Port x lock bit y (y=" "0,1" bitfld.long 0x0 1. "LK1,Port x lock bit y (y=" "0,1" bitfld.long 0x0 0. "LK0,Port x lock bit y (y=" "0,1" line.long 0x4 "AFSEL0,GPIO alternate function low" hexmask.long.byte 0x4 28.--31. 1. "SEL7,Alternate function selection for port x" hexmask.long.byte 0x4 24.--27. 1. "SEL6,Alternate function selection for port x" hexmask.long.byte 0x4 20.--23. 1. "SEL5,Alternate function selection for port x" hexmask.long.byte 0x4 16.--19. 1. "SEL4,Alternate function selection for port x" hexmask.long.byte 0x4 12.--15. 1. "SEL3,Alternate function selection for port x" hexmask.long.byte 0x4 8.--11. 1. "SEL2,Alternate function selection for port x" hexmask.long.byte 0x4 4.--7. 1. "SEL1,Alternate function selection for port x" hexmask.long.byte 0x4 0.--3. 1. "SEL0,Alternate function selection for port x" line.long 0x8 "AFSEL1,GPIO alternate function" hexmask.long.byte 0x8 28.--31. 1. "SEL15,Alternate function selection for port x" hexmask.long.byte 0x8 24.--27. 1. "SEL14,Alternate function selection for port x" hexmask.long.byte 0x8 20.--23. 1. "SEL13,Alternate function selection for port x" hexmask.long.byte 0x8 16.--19. 1. "SEL12,Alternate function selection for port x" hexmask.long.byte 0x8 12.--15. 1. "SEL11,Alternate function selection for port x" hexmask.long.byte 0x8 8.--11. 1. "SEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "SEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "SEL8,Alternate function selection for port x" wgroup.long 0x28++0x7 line.long 0x0 "BC,Port bit reset register" bitfld.long 0x0 15. "CR15,Port cleat bit" "0,1" bitfld.long 0x0 14. "CR14,Port cleat bit" "0,1" bitfld.long 0x0 13. "CR13,Port cleat bit" "0,1" bitfld.long 0x0 12. "CR12,Port cleat bit" "0,1" bitfld.long 0x0 11. "CR11,Port cleat bit" "0,1" bitfld.long 0x0 10. "CR10,Port cleat bit" "0,1" bitfld.long 0x0 9. "CR9,Port cleat bit" "0,1" bitfld.long 0x0 8. "CR8,Port cleat bit" "0,1" bitfld.long 0x0 7. "CR7,Port cleat bit" "0,1" bitfld.long 0x0 6. "CR6,Port cleat bit" "0,1" bitfld.long 0x0 5. "CR5,Port cleat bit" "0,1" bitfld.long 0x0 4. "CR4,Port cleat bit" "0,1" newline bitfld.long 0x0 3. "CR3,Port cleat bit" "0,1" bitfld.long 0x0 2. "CR2,Port cleat bit" "0,1" bitfld.long 0x0 1. "CR1,Port cleat bit" "0,1" bitfld.long 0x0 0. "CR0,Port cleat bit" "0,1" line.long 0x4 "TG,Port bit toggle register" bitfld.long 0x4 15. "TG15,Port toggle bit" "0,1" bitfld.long 0x4 14. "TG14,Port toggle bit" "0,1" bitfld.long 0x4 13. "TG13,Port toggle bit" "0,1" bitfld.long 0x4 12. "TG12,Port toggle bit" "0,1" bitfld.long 0x4 11. "TG11,Port toggle bit" "0,1" bitfld.long 0x4 10. "TG10,Port toggle bit" "0,1" bitfld.long 0x4 9. "TG9,Port toggle bit" "0,1" bitfld.long 0x4 8. "TG8,Port toggle bit" "0,1" bitfld.long 0x4 7. "TG7,Port toggle bit" "0,1" bitfld.long 0x4 6. "TG6,Port toggle bit" "0,1" bitfld.long 0x4 5. "TG5,Port toggle bit" "0,1" bitfld.long 0x4 4. "TG4,Port toggle bit" "0,1" newline bitfld.long 0x4 3. "TG3,Port toggle bit" "0,1" bitfld.long 0x4 2. "TG2,Port toggle bit" "0,1" bitfld.long 0x4 1. "TG1,Port toggle bit" "0,1" bitfld.long 0x4 0. "TG0,Port toggle bit" "0,1" tree.end tree "GPIOB" base ad:0x48000400 group.long 0x0++0xF line.long 0x0 "CTL,GPIO port control register" bitfld.long 0x0 30.--31. "CTL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 28.--29. "CTL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 26.--27. "CTL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 24.--25. "CTL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 22.--23. "CTL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 20.--21. "CTL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 18.--19. "CTL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 16.--17. "CTL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 14.--15. "CTL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 12.--13. "CTL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 10.--11. "CTL5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 8.--9. "CTL4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x0 6.--7. "CTL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 4.--5. "CTL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 2.--3. "CTL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 0.--1. "CTL0,Port x configuration bits (y =" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OM15,Port x configuration bit" "0,1" bitfld.long 0x4 14. "OM14,Port x configuration bit" "0,1" bitfld.long 0x4 13. "OM13,Port x configuration bit" "0,1" bitfld.long 0x4 12. "OM12,Port x configuration bit" "0,1" bitfld.long 0x4 11. "OM11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OM10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OM9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OM8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OM7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OM6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OM5,Port x configuration bit 5" "0,1" bitfld.long 0x4 4. "OM4,Port x configuration bit 4" "0,1" newline bitfld.long 0x4 3. "OM3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OM2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OM1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OM0,Port x configuration bit 0" "0,1" line.long 0x8 "OSPD,GPIO port output speed" bitfld.long 0x8 30.--31. "OSPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSPD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 8.--9. "OSPD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 6.--7. "OSPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSPD0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUD,GPIO port pull-up/pull-down" bitfld.long 0xC 30.--31. "PUD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 8.--9. "PUD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 6.--7. "PUD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "ISTAT,GPIO port input data register" bitfld.long 0x0 15. "ISTAT15,Port input data (y =" "0,1" bitfld.long 0x0 14. "ISTAT14,Port input data (y =" "0,1" bitfld.long 0x0 13. "ISTAT13,Port input data (y =" "0,1" bitfld.long 0x0 12. "ISTAT12,Port input data (y =" "0,1" bitfld.long 0x0 11. "ISTAT11,Port input data (y =" "0,1" bitfld.long 0x0 10. "ISTAT10,Port input data (y =" "0,1" bitfld.long 0x0 9. "ISTAT9,Port input data (y =" "0,1" bitfld.long 0x0 8. "ISTAT8,Port input data (y =" "0,1" bitfld.long 0x0 7. "ISTAT7,Port input data (y =" "0,1" bitfld.long 0x0 6. "ISTAT6,Port input data (y =" "0,1" bitfld.long 0x0 5. "ISTAT5,Port input data (y =" "0,1" bitfld.long 0x0 4. "ISTAT4,Port input data (y =" "0,1" newline bitfld.long 0x0 3. "ISTAT3,Port input data (y =" "0,1" bitfld.long 0x0 2. "ISTAT2,Port input data (y =" "0,1" bitfld.long 0x0 1. "ISTAT1,Port input data (y =" "0,1" bitfld.long 0x0 0. "ISTAT0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "OCTL,GPIO port output data register" bitfld.long 0x0 15. "OCTL15,Port output data (y =" "0,1" bitfld.long 0x0 14. "OCTL14,Port output data (y =" "0,1" bitfld.long 0x0 13. "OCTL13,Port output data (y =" "0,1" bitfld.long 0x0 12. "OCTL12,Port output data (y =" "0,1" bitfld.long 0x0 11. "OCTL11,Port output data (y =" "0,1" bitfld.long 0x0 10. "OCTL10,Port output data (y =" "0,1" bitfld.long 0x0 9. "OCTL9,Port output data (y =" "0,1" bitfld.long 0x0 8. "OCTL8,Port output data (y =" "0,1" bitfld.long 0x0 7. "OCTL7,Port output data (y =" "0,1" bitfld.long 0x0 6. "OCTL6,Port output data (y =" "0,1" bitfld.long 0x0 5. "OCTL5,Port output data (y =" "0,1" bitfld.long 0x0 4. "OCTL4,Port output data (y =" "0,1" newline bitfld.long 0x0 3. "OCTL3,Port output data (y =" "0,1" bitfld.long 0x0 2. "OCTL2,Port output data (y =" "0,1" bitfld.long 0x0 1. "OCTL1,Port output data (y =" "0,1" bitfld.long 0x0 0. "OCTL0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BOP,GPIO port bit set/reset" bitfld.long 0x0 31. "CR15,Port x reset bit y (y =" "0,1" bitfld.long 0x0 30. "CR14,Port x reset bit y (y =" "0,1" bitfld.long 0x0 29. "CR13,Port x reset bit y (y =" "0,1" bitfld.long 0x0 28. "CR12,Port x reset bit y (y =" "0,1" bitfld.long 0x0 27. "CR11,Port x reset bit y (y =" "0,1" bitfld.long 0x0 26. "CR10,Port x reset bit y (y =" "0,1" bitfld.long 0x0 25. "CR9,Port x reset bit y (y =" "0,1" bitfld.long 0x0 24. "CR8,Port x reset bit y (y =" "0,1" bitfld.long 0x0 23. "CR7,Port x reset bit y (y =" "0,1" bitfld.long 0x0 22. "CR6,Port x reset bit y (y =" "0,1" bitfld.long 0x0 21. "CR5,Port x reset bit y (y =" "0,1" bitfld.long 0x0 20. "CR4,Port x reset bit y (y =" "0,1" newline bitfld.long 0x0 19. "CR3,Port x reset bit y (y =" "0,1" bitfld.long 0x0 18. "CR2,Port x reset bit y (y =" "0,1" bitfld.long 0x0 17. "CR1,Port x reset bit y (y =" "0,1" bitfld.long 0x0 16. "CR0,Port x reset bit y (y=" "0,1" bitfld.long 0x0 15. "BOP15,Port x set bit y (y=" "0,1" bitfld.long 0x0 14. "BOP14,Port x set bit y (y=" "0,1" bitfld.long 0x0 13. "BOP13,Port x set bit y (y=" "0,1" bitfld.long 0x0 12. "BOP12,Port x set bit y (y=" "0,1" bitfld.long 0x0 11. "BOP11,Port x set bit y (y=" "0,1" bitfld.long 0x0 10. "BOP10,Port x set bit y (y=" "0,1" bitfld.long 0x0 9. "BOP9,Port x set bit y (y=" "0,1" bitfld.long 0x0 8. "BOP8,Port x set bit y (y=" "0,1" newline bitfld.long 0x0 7. "BOP7,Port x set bit y (y=" "0,1" bitfld.long 0x0 6. "BOP6,Port x set bit y (y=" "0,1" bitfld.long 0x0 5. "BOP5,Port x set bit y (y=" "0,1" bitfld.long 0x0 4. "BOP4,Port x set bit y (y=" "0,1" bitfld.long 0x0 3. "BOP3,Port x set bit y (y=" "0,1" bitfld.long 0x0 2. "BOP2,Port x set bit y (y=" "0,1" bitfld.long 0x0 1. "BOP1,Port x set bit y (y=" "0,1" bitfld.long 0x0 0. "BOP0,Port x set bit y (y=" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LKK,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LK15,Port x lock bit y (y=" "0,1" bitfld.long 0x0 14. "LK14,Port x lock bit y (y=" "0,1" bitfld.long 0x0 13. "LK13,Port x lock bit y (y=" "0,1" bitfld.long 0x0 12. "LK12,Port x lock bit y (y=" "0,1" bitfld.long 0x0 11. "LK11,Port x lock bit y (y=" "0,1" bitfld.long 0x0 10. "LK10,Port x lock bit y (y=" "0,1" bitfld.long 0x0 9. "LK9,Port x lock bit y (y=" "0,1" bitfld.long 0x0 8. "LK8,Port x lock bit y (y=" "0,1" bitfld.long 0x0 7. "LK7,Port x lock bit y (y=" "0,1" bitfld.long 0x0 6. "LK6,Port x lock bit y (y=" "0,1" bitfld.long 0x0 5. "LK5,Port x lock bit y (y=" "0,1" newline bitfld.long 0x0 4. "LK4,Port x lock bit y (y=" "0,1" bitfld.long 0x0 3. "LK3,Port x lock bit y (y=" "0,1" bitfld.long 0x0 2. "LK2,Port x lock bit y (y=" "0,1" bitfld.long 0x0 1. "LK1,Port x lock bit y (y=" "0,1" bitfld.long 0x0 0. "LK0,Port x lock bit y (y=" "0,1" line.long 0x4 "AFSEL0,GPIO alternate function low" hexmask.long.byte 0x4 28.--31. 1. "SEL7,Alternate function selection for port x" hexmask.long.byte 0x4 24.--27. 1. "SEL6,Alternate function selection for port x" hexmask.long.byte 0x4 20.--23. 1. "SEL5,Alternate function selection for port x" hexmask.long.byte 0x4 16.--19. 1. "SEL4,Alternate function selection for port x" hexmask.long.byte 0x4 12.--15. 1. "SEL3,Alternate function selection for port x" hexmask.long.byte 0x4 8.--11. 1. "SEL2,Alternate function selection for port x" hexmask.long.byte 0x4 4.--7. 1. "SEL1,Alternate function selection for port x" hexmask.long.byte 0x4 0.--3. 1. "SEL0,Alternate function selection for port x" line.long 0x8 "AFSEL1,GPIO alternate function" hexmask.long.byte 0x8 28.--31. 1. "SEL15,Alternate function selection for port x" hexmask.long.byte 0x8 24.--27. 1. "SEL14,Alternate function selection for port x" hexmask.long.byte 0x8 20.--23. 1. "SEL13,Alternate function selection for port x" hexmask.long.byte 0x8 16.--19. 1. "SEL12,Alternate function selection for port x" hexmask.long.byte 0x8 12.--15. 1. "SEL11,Alternate function selection for port x" hexmask.long.byte 0x8 8.--11. 1. "SEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "SEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "SEL8,Alternate function selection for port x" wgroup.long 0x28++0x7 line.long 0x0 "BC,Port bit reset register" bitfld.long 0x0 15. "CR15,Port cleat bit" "0,1" bitfld.long 0x0 14. "CR14,Port cleat bit" "0,1" bitfld.long 0x0 13. "CR13,Port cleat bit" "0,1" bitfld.long 0x0 12. "CR12,Port cleat bit" "0,1" bitfld.long 0x0 11. "CR11,Port cleat bit" "0,1" bitfld.long 0x0 10. "CR10,Port cleat bit" "0,1" bitfld.long 0x0 9. "CR9,Port cleat bit" "0,1" bitfld.long 0x0 8. "CR8,Port cleat bit" "0,1" bitfld.long 0x0 7. "CR7,Port cleat bit" "0,1" bitfld.long 0x0 6. "CR6,Port cleat bit" "0,1" bitfld.long 0x0 5. "CR5,Port cleat bit" "0,1" bitfld.long 0x0 4. "CR4,Port cleat bit" "0,1" newline bitfld.long 0x0 3. "CR3,Port cleat bit" "0,1" bitfld.long 0x0 2. "CR2,Port cleat bit" "0,1" bitfld.long 0x0 1. "CR1,Port cleat bit" "0,1" bitfld.long 0x0 0. "CR0,Port cleat bit" "0,1" line.long 0x4 "TG,Port bit toggle register" bitfld.long 0x4 15. "TG15,Port toggle bit" "0,1" bitfld.long 0x4 14. "TG14,Port toggle bit" "0,1" bitfld.long 0x4 13. "TG13,Port toggle bit" "0,1" bitfld.long 0x4 12. "TG12,Port toggle bit" "0,1" bitfld.long 0x4 11. "TG11,Port toggle bit" "0,1" bitfld.long 0x4 10. "TG10,Port toggle bit" "0,1" bitfld.long 0x4 9. "TG9,Port toggle bit" "0,1" bitfld.long 0x4 8. "TG8,Port toggle bit" "0,1" bitfld.long 0x4 7. "TG7,Port toggle bit" "0,1" bitfld.long 0x4 6. "TG6,Port toggle bit" "0,1" bitfld.long 0x4 5. "TG5,Port toggle bit" "0,1" bitfld.long 0x4 4. "TG4,Port toggle bit" "0,1" newline bitfld.long 0x4 3. "TG3,Port toggle bit" "0,1" bitfld.long 0x4 2. "TG2,Port toggle bit" "0,1" bitfld.long 0x4 1. "TG1,Port toggle bit" "0,1" bitfld.long 0x4 0. "TG0,Port toggle bit" "0,1" tree.end tree "GPIOC" base ad:0x48000800 group.long 0x0++0xF line.long 0x0 "CTL,GPIO port control register" bitfld.long 0x0 30.--31. "CTL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 28.--29. "CTL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 26.--27. "CTL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 24.--25. "CTL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 22.--23. "CTL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 20.--21. "CTL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 18.--19. "CTL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 16.--17. "CTL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 14.--15. "CTL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 12.--13. "CTL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 10.--11. "CTL5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 8.--9. "CTL4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x0 6.--7. "CTL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 4.--5. "CTL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 2.--3. "CTL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 0.--1. "CTL0,Port x configuration bits (y =" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OM15,Port x configuration bit" "0,1" bitfld.long 0x4 14. "OM14,Port x configuration bit" "0,1" bitfld.long 0x4 13. "OM13,Port x configuration bit" "0,1" bitfld.long 0x4 12. "OM12,Port x configuration bit" "0,1" bitfld.long 0x4 11. "OM11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OM10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OM9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OM8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OM7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OM6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OM5,Port x configuration bit 5" "0,1" bitfld.long 0x4 4. "OM4,Port x configuration bit 4" "0,1" newline bitfld.long 0x4 3. "OM3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OM2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OM1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OM0,Port x configuration bit 0" "0,1" line.long 0x8 "OSPD,GPIO port output speed" bitfld.long 0x8 30.--31. "OSPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSPD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 8.--9. "OSPD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 6.--7. "OSPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSPD0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUD,GPIO port pull-up/pull-down" bitfld.long 0xC 30.--31. "PUD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 8.--9. "PUD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 6.--7. "PUD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "ISTAT,GPIO port input data register" bitfld.long 0x0 15. "ISTAT15,Port input data (y =" "0,1" bitfld.long 0x0 14. "ISTAT14,Port input data (y =" "0,1" bitfld.long 0x0 13. "ISTAT13,Port input data (y =" "0,1" bitfld.long 0x0 12. "ISTAT12,Port input data (y =" "0,1" bitfld.long 0x0 11. "ISTAT11,Port input data (y =" "0,1" bitfld.long 0x0 10. "ISTAT10,Port input data (y =" "0,1" bitfld.long 0x0 9. "ISTAT9,Port input data (y =" "0,1" bitfld.long 0x0 8. "ISTAT8,Port input data (y =" "0,1" bitfld.long 0x0 7. "ISTAT7,Port input data (y =" "0,1" bitfld.long 0x0 6. "ISTAT6,Port input data (y =" "0,1" bitfld.long 0x0 5. "ISTAT5,Port input data (y =" "0,1" bitfld.long 0x0 4. "ISTAT4,Port input data (y =" "0,1" newline bitfld.long 0x0 3. "ISTAT3,Port input data (y =" "0,1" bitfld.long 0x0 2. "ISTAT2,Port input data (y =" "0,1" bitfld.long 0x0 1. "ISTAT1,Port input data (y =" "0,1" bitfld.long 0x0 0. "ISTAT0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "OCTL,GPIO port output data register" bitfld.long 0x0 15. "OCTL15,Port output data (y =" "0,1" bitfld.long 0x0 14. "OCTL14,Port output data (y =" "0,1" bitfld.long 0x0 13. "OCTL13,Port output data (y =" "0,1" bitfld.long 0x0 12. "OCTL12,Port output data (y =" "0,1" bitfld.long 0x0 11. "OCTL11,Port output data (y =" "0,1" bitfld.long 0x0 10. "OCTL10,Port output data (y =" "0,1" bitfld.long 0x0 9. "OCTL9,Port output data (y =" "0,1" bitfld.long 0x0 8. "OCTL8,Port output data (y =" "0,1" bitfld.long 0x0 7. "OCTL7,Port output data (y =" "0,1" bitfld.long 0x0 6. "OCTL6,Port output data (y =" "0,1" bitfld.long 0x0 5. "OCTL5,Port output data (y =" "0,1" bitfld.long 0x0 4. "OCTL4,Port output data (y =" "0,1" newline bitfld.long 0x0 3. "OCTL3,Port output data (y =" "0,1" bitfld.long 0x0 2. "OCTL2,Port output data (y =" "0,1" bitfld.long 0x0 1. "OCTL1,Port output data (y =" "0,1" bitfld.long 0x0 0. "OCTL0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BOP,GPIO port bit set/reset" bitfld.long 0x0 31. "CR15,Port x reset bit y (y =" "0,1" bitfld.long 0x0 30. "CR14,Port x reset bit y (y =" "0,1" bitfld.long 0x0 29. "CR13,Port x reset bit y (y =" "0,1" bitfld.long 0x0 28. "CR12,Port x reset bit y (y =" "0,1" bitfld.long 0x0 27. "CR11,Port x reset bit y (y =" "0,1" bitfld.long 0x0 26. "CR10,Port x reset bit y (y =" "0,1" bitfld.long 0x0 25. "CR9,Port x reset bit y (y =" "0,1" bitfld.long 0x0 24. "CR8,Port x reset bit y (y =" "0,1" bitfld.long 0x0 23. "CR7,Port x reset bit y (y =" "0,1" bitfld.long 0x0 22. "CR6,Port x reset bit y (y =" "0,1" bitfld.long 0x0 21. "CR5,Port x reset bit y (y =" "0,1" bitfld.long 0x0 20. "CR4,Port x reset bit y (y =" "0,1" newline bitfld.long 0x0 19. "CR3,Port x reset bit y (y =" "0,1" bitfld.long 0x0 18. "CR2,Port x reset bit y (y =" "0,1" bitfld.long 0x0 17. "CR1,Port x reset bit y (y =" "0,1" bitfld.long 0x0 16. "CR0,Port x reset bit y (y=" "0,1" bitfld.long 0x0 15. "BOP15,Port x set bit y (y=" "0,1" bitfld.long 0x0 14. "BOP14,Port x set bit y (y=" "0,1" bitfld.long 0x0 13. "BOP13,Port x set bit y (y=" "0,1" bitfld.long 0x0 12. "BOP12,Port x set bit y (y=" "0,1" bitfld.long 0x0 11. "BOP11,Port x set bit y (y=" "0,1" bitfld.long 0x0 10. "BOP10,Port x set bit y (y=" "0,1" bitfld.long 0x0 9. "BOP9,Port x set bit y (y=" "0,1" bitfld.long 0x0 8. "BOP8,Port x set bit y (y=" "0,1" newline bitfld.long 0x0 7. "BOP7,Port x set bit y (y=" "0,1" bitfld.long 0x0 6. "BOP6,Port x set bit y (y=" "0,1" bitfld.long 0x0 5. "BOP5,Port x set bit y (y=" "0,1" bitfld.long 0x0 4. "BOP4,Port x set bit y (y=" "0,1" bitfld.long 0x0 3. "BOP3,Port x set bit y (y=" "0,1" bitfld.long 0x0 2. "BOP2,Port x set bit y (y=" "0,1" bitfld.long 0x0 1. "BOP1,Port x set bit y (y=" "0,1" bitfld.long 0x0 0. "BOP0,Port x set bit y (y=" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LKK,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LK15,Port x lock bit y (y=" "0,1" bitfld.long 0x0 14. "LK14,Port x lock bit y (y=" "0,1" bitfld.long 0x0 13. "LK13,Port x lock bit y (y=" "0,1" bitfld.long 0x0 12. "LK12,Port x lock bit y (y=" "0,1" bitfld.long 0x0 11. "LK11,Port x lock bit y (y=" "0,1" bitfld.long 0x0 10. "LK10,Port x lock bit y (y=" "0,1" bitfld.long 0x0 9. "LK9,Port x lock bit y (y=" "0,1" bitfld.long 0x0 8. "LK8,Port x lock bit y (y=" "0,1" bitfld.long 0x0 7. "LK7,Port x lock bit y (y=" "0,1" bitfld.long 0x0 6. "LK6,Port x lock bit y (y=" "0,1" bitfld.long 0x0 5. "LK5,Port x lock bit y (y=" "0,1" newline bitfld.long 0x0 4. "LK4,Port x lock bit y (y=" "0,1" bitfld.long 0x0 3. "LK3,Port x lock bit y (y=" "0,1" bitfld.long 0x0 2. "LK2,Port x lock bit y (y=" "0,1" bitfld.long 0x0 1. "LK1,Port x lock bit y (y=" "0,1" bitfld.long 0x0 0. "LK0,Port x lock bit y (y=" "0,1" line.long 0x4 "AFSEL0,GPIO alternate function low" hexmask.long.byte 0x4 28.--31. 1. "SEL7,Alternate function selection for port x" hexmask.long.byte 0x4 24.--27. 1. "SEL6,Alternate function selection for port x" hexmask.long.byte 0x4 20.--23. 1. "SEL5,Alternate function selection for port x" hexmask.long.byte 0x4 16.--19. 1. "SEL4,Alternate function selection for port x" hexmask.long.byte 0x4 12.--15. 1. "SEL3,Alternate function selection for port x" hexmask.long.byte 0x4 8.--11. 1. "SEL2,Alternate function selection for port x" hexmask.long.byte 0x4 4.--7. 1. "SEL1,Alternate function selection for port x" hexmask.long.byte 0x4 0.--3. 1. "SEL0,Alternate function selection for port x" line.long 0x8 "AFSEL1,GPIO alternate function" hexmask.long.byte 0x8 28.--31. 1. "SEL15,Alternate function selection for port x" hexmask.long.byte 0x8 24.--27. 1. "SEL14,Alternate function selection for port x" hexmask.long.byte 0x8 20.--23. 1. "SEL13,Alternate function selection for port x" hexmask.long.byte 0x8 16.--19. 1. "SEL12,Alternate function selection for port x" hexmask.long.byte 0x8 12.--15. 1. "SEL11,Alternate function selection for port x" hexmask.long.byte 0x8 8.--11. 1. "SEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "SEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "SEL8,Alternate function selection for port x" wgroup.long 0x28++0x7 line.long 0x0 "BC,Port bit reset register" bitfld.long 0x0 15. "CR15,Port cleat bit" "0,1" bitfld.long 0x0 14. "CR14,Port cleat bit" "0,1" bitfld.long 0x0 13. "CR13,Port cleat bit" "0,1" bitfld.long 0x0 12. "CR12,Port cleat bit" "0,1" bitfld.long 0x0 11. "CR11,Port cleat bit" "0,1" bitfld.long 0x0 10. "CR10,Port cleat bit" "0,1" bitfld.long 0x0 9. "CR9,Port cleat bit" "0,1" bitfld.long 0x0 8. "CR8,Port cleat bit" "0,1" bitfld.long 0x0 7. "CR7,Port cleat bit" "0,1" bitfld.long 0x0 6. "CR6,Port cleat bit" "0,1" bitfld.long 0x0 5. "CR5,Port cleat bit" "0,1" bitfld.long 0x0 4. "CR4,Port cleat bit" "0,1" newline bitfld.long 0x0 3. "CR3,Port cleat bit" "0,1" bitfld.long 0x0 2. "CR2,Port cleat bit" "0,1" bitfld.long 0x0 1. "CR1,Port cleat bit" "0,1" bitfld.long 0x0 0. "CR0,Port cleat bit" "0,1" line.long 0x4 "TG,Port bit toggle register" bitfld.long 0x4 15. "TG15,Port toggle bit" "0,1" bitfld.long 0x4 14. "TG14,Port toggle bit" "0,1" bitfld.long 0x4 13. "TG13,Port toggle bit" "0,1" bitfld.long 0x4 12. "TG12,Port toggle bit" "0,1" bitfld.long 0x4 11. "TG11,Port toggle bit" "0,1" bitfld.long 0x4 10. "TG10,Port toggle bit" "0,1" bitfld.long 0x4 9. "TG9,Port toggle bit" "0,1" bitfld.long 0x4 8. "TG8,Port toggle bit" "0,1" bitfld.long 0x4 7. "TG7,Port toggle bit" "0,1" bitfld.long 0x4 6. "TG6,Port toggle bit" "0,1" bitfld.long 0x4 5. "TG5,Port toggle bit" "0,1" bitfld.long 0x4 4. "TG4,Port toggle bit" "0,1" newline bitfld.long 0x4 3. "TG3,Port toggle bit" "0,1" bitfld.long 0x4 2. "TG2,Port toggle bit" "0,1" bitfld.long 0x4 1. "TG1,Port toggle bit" "0,1" bitfld.long 0x4 0. "TG0,Port toggle bit" "0,1" tree.end tree "GPIOD" base ad:0x48000C00 group.long 0x0++0xF line.long 0x0 "CTL,GPIO port control register" bitfld.long 0x0 30.--31. "CTL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 28.--29. "CTL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 26.--27. "CTL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 24.--25. "CTL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 22.--23. "CTL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 20.--21. "CTL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 18.--19. "CTL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 16.--17. "CTL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 14.--15. "CTL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 12.--13. "CTL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 10.--11. "CTL5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 8.--9. "CTL4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x0 6.--7. "CTL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 4.--5. "CTL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 2.--3. "CTL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 0.--1. "CTL0,Port x configuration bits (y =" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OM15,Port x configuration bit" "0,1" bitfld.long 0x4 14. "OM14,Port x configuration bit" "0,1" bitfld.long 0x4 13. "OM13,Port x configuration bit" "0,1" bitfld.long 0x4 12. "OM12,Port x configuration bit" "0,1" bitfld.long 0x4 11. "OM11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OM10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OM9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OM8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OM7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OM6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OM5,Port x configuration bit 5" "0,1" bitfld.long 0x4 4. "OM4,Port x configuration bit 4" "0,1" newline bitfld.long 0x4 3. "OM3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OM2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OM1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OM0,Port x configuration bit 0" "0,1" line.long 0x8 "OSPD,GPIO port output speed" bitfld.long 0x8 30.--31. "OSPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSPD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 8.--9. "OSPD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 6.--7. "OSPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSPD0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUD,GPIO port pull-up/pull-down" bitfld.long 0xC 30.--31. "PUD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 8.--9. "PUD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 6.--7. "PUD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "ISTAT,GPIO port input data register" bitfld.long 0x0 15. "ISTAT15,Port input data (y =" "0,1" bitfld.long 0x0 14. "ISTAT14,Port input data (y =" "0,1" bitfld.long 0x0 13. "ISTAT13,Port input data (y =" "0,1" bitfld.long 0x0 12. "ISTAT12,Port input data (y =" "0,1" bitfld.long 0x0 11. "ISTAT11,Port input data (y =" "0,1" bitfld.long 0x0 10. "ISTAT10,Port input data (y =" "0,1" bitfld.long 0x0 9. "ISTAT9,Port input data (y =" "0,1" bitfld.long 0x0 8. "ISTAT8,Port input data (y =" "0,1" bitfld.long 0x0 7. "ISTAT7,Port input data (y =" "0,1" bitfld.long 0x0 6. "ISTAT6,Port input data (y =" "0,1" bitfld.long 0x0 5. "ISTAT5,Port input data (y =" "0,1" bitfld.long 0x0 4. "ISTAT4,Port input data (y =" "0,1" newline bitfld.long 0x0 3. "ISTAT3,Port input data (y =" "0,1" bitfld.long 0x0 2. "ISTAT2,Port input data (y =" "0,1" bitfld.long 0x0 1. "ISTAT1,Port input data (y =" "0,1" bitfld.long 0x0 0. "ISTAT0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "OCTL,GPIO port output data register" bitfld.long 0x0 15. "OCTL15,Port output data (y =" "0,1" bitfld.long 0x0 14. "OCTL14,Port output data (y =" "0,1" bitfld.long 0x0 13. "OCTL13,Port output data (y =" "0,1" bitfld.long 0x0 12. "OCTL12,Port output data (y =" "0,1" bitfld.long 0x0 11. "OCTL11,Port output data (y =" "0,1" bitfld.long 0x0 10. "OCTL10,Port output data (y =" "0,1" bitfld.long 0x0 9. "OCTL9,Port output data (y =" "0,1" bitfld.long 0x0 8. "OCTL8,Port output data (y =" "0,1" bitfld.long 0x0 7. "OCTL7,Port output data (y =" "0,1" bitfld.long 0x0 6. "OCTL6,Port output data (y =" "0,1" bitfld.long 0x0 5. "OCTL5,Port output data (y =" "0,1" bitfld.long 0x0 4. "OCTL4,Port output data (y =" "0,1" newline bitfld.long 0x0 3. "OCTL3,Port output data (y =" "0,1" bitfld.long 0x0 2. "OCTL2,Port output data (y =" "0,1" bitfld.long 0x0 1. "OCTL1,Port output data (y =" "0,1" bitfld.long 0x0 0. "OCTL0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BOP,GPIO port bit set/reset" bitfld.long 0x0 31. "CR15,Port x reset bit y (y =" "0,1" bitfld.long 0x0 30. "CR14,Port x reset bit y (y =" "0,1" bitfld.long 0x0 29. "CR13,Port x reset bit y (y =" "0,1" bitfld.long 0x0 28. "CR12,Port x reset bit y (y =" "0,1" bitfld.long 0x0 27. "CR11,Port x reset bit y (y =" "0,1" bitfld.long 0x0 26. "CR10,Port x reset bit y (y =" "0,1" bitfld.long 0x0 25. "CR9,Port x reset bit y (y =" "0,1" bitfld.long 0x0 24. "CR8,Port x reset bit y (y =" "0,1" bitfld.long 0x0 23. "CR7,Port x reset bit y (y =" "0,1" bitfld.long 0x0 22. "CR6,Port x reset bit y (y =" "0,1" bitfld.long 0x0 21. "CR5,Port x reset bit y (y =" "0,1" bitfld.long 0x0 20. "CR4,Port x reset bit y (y =" "0,1" newline bitfld.long 0x0 19. "CR3,Port x reset bit y (y =" "0,1" bitfld.long 0x0 18. "CR2,Port x reset bit y (y =" "0,1" bitfld.long 0x0 17. "CR1,Port x reset bit y (y =" "0,1" bitfld.long 0x0 16. "CR0,Port x reset bit y (y=" "0,1" bitfld.long 0x0 15. "BOP15,Port x set bit y (y=" "0,1" bitfld.long 0x0 14. "BOP14,Port x set bit y (y=" "0,1" bitfld.long 0x0 13. "BOP13,Port x set bit y (y=" "0,1" bitfld.long 0x0 12. "BOP12,Port x set bit y (y=" "0,1" bitfld.long 0x0 11. "BOP11,Port x set bit y (y=" "0,1" bitfld.long 0x0 10. "BOP10,Port x set bit y (y=" "0,1" bitfld.long 0x0 9. "BOP9,Port x set bit y (y=" "0,1" bitfld.long 0x0 8. "BOP8,Port x set bit y (y=" "0,1" newline bitfld.long 0x0 7. "BOP7,Port x set bit y (y=" "0,1" bitfld.long 0x0 6. "BOP6,Port x set bit y (y=" "0,1" bitfld.long 0x0 5. "BOP5,Port x set bit y (y=" "0,1" bitfld.long 0x0 4. "BOP4,Port x set bit y (y=" "0,1" bitfld.long 0x0 3. "BOP3,Port x set bit y (y=" "0,1" bitfld.long 0x0 2. "BOP2,Port x set bit y (y=" "0,1" bitfld.long 0x0 1. "BOP1,Port x set bit y (y=" "0,1" bitfld.long 0x0 0. "BOP0,Port x set bit y (y=" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LKK,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LK15,Port x lock bit y (y=" "0,1" bitfld.long 0x0 14. "LK14,Port x lock bit y (y=" "0,1" bitfld.long 0x0 13. "LK13,Port x lock bit y (y=" "0,1" bitfld.long 0x0 12. "LK12,Port x lock bit y (y=" "0,1" bitfld.long 0x0 11. "LK11,Port x lock bit y (y=" "0,1" bitfld.long 0x0 10. "LK10,Port x lock bit y (y=" "0,1" bitfld.long 0x0 9. "LK9,Port x lock bit y (y=" "0,1" bitfld.long 0x0 8. "LK8,Port x lock bit y (y=" "0,1" bitfld.long 0x0 7. "LK7,Port x lock bit y (y=" "0,1" bitfld.long 0x0 6. "LK6,Port x lock bit y (y=" "0,1" bitfld.long 0x0 5. "LK5,Port x lock bit y (y=" "0,1" newline bitfld.long 0x0 4. "LK4,Port x lock bit y (y=" "0,1" bitfld.long 0x0 3. "LK3,Port x lock bit y (y=" "0,1" bitfld.long 0x0 2. "LK2,Port x lock bit y (y=" "0,1" bitfld.long 0x0 1. "LK1,Port x lock bit y (y=" "0,1" bitfld.long 0x0 0. "LK0,Port x lock bit y (y=" "0,1" line.long 0x4 "AFSEL0,GPIO alternate function low" hexmask.long.byte 0x4 28.--31. 1. "SEL7,Alternate function selection for port x" hexmask.long.byte 0x4 24.--27. 1. "SEL6,Alternate function selection for port x" hexmask.long.byte 0x4 20.--23. 1. "SEL5,Alternate function selection for port x" hexmask.long.byte 0x4 16.--19. 1. "SEL4,Alternate function selection for port x" hexmask.long.byte 0x4 12.--15. 1. "SEL3,Alternate function selection for port x" hexmask.long.byte 0x4 8.--11. 1. "SEL2,Alternate function selection for port x" hexmask.long.byte 0x4 4.--7. 1. "SEL1,Alternate function selection for port x" hexmask.long.byte 0x4 0.--3. 1. "SEL0,Alternate function selection for port x" line.long 0x8 "AFSEL1,GPIO alternate function" hexmask.long.byte 0x8 28.--31. 1. "SEL15,Alternate function selection for port x" hexmask.long.byte 0x8 24.--27. 1. "SEL14,Alternate function selection for port x" hexmask.long.byte 0x8 20.--23. 1. "SEL13,Alternate function selection for port x" hexmask.long.byte 0x8 16.--19. 1. "SEL12,Alternate function selection for port x" hexmask.long.byte 0x8 12.--15. 1. "SEL11,Alternate function selection for port x" hexmask.long.byte 0x8 8.--11. 1. "SEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "SEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "SEL8,Alternate function selection for port x" wgroup.long 0x28++0x7 line.long 0x0 "BC,Port bit reset register" bitfld.long 0x0 15. "CR15,Port cleat bit" "0,1" bitfld.long 0x0 14. "CR14,Port cleat bit" "0,1" bitfld.long 0x0 13. "CR13,Port cleat bit" "0,1" bitfld.long 0x0 12. "CR12,Port cleat bit" "0,1" bitfld.long 0x0 11. "CR11,Port cleat bit" "0,1" bitfld.long 0x0 10. "CR10,Port cleat bit" "0,1" bitfld.long 0x0 9. "CR9,Port cleat bit" "0,1" bitfld.long 0x0 8. "CR8,Port cleat bit" "0,1" bitfld.long 0x0 7. "CR7,Port cleat bit" "0,1" bitfld.long 0x0 6. "CR6,Port cleat bit" "0,1" bitfld.long 0x0 5. "CR5,Port cleat bit" "0,1" bitfld.long 0x0 4. "CR4,Port cleat bit" "0,1" newline bitfld.long 0x0 3. "CR3,Port cleat bit" "0,1" bitfld.long 0x0 2. "CR2,Port cleat bit" "0,1" bitfld.long 0x0 1. "CR1,Port cleat bit" "0,1" bitfld.long 0x0 0. "CR0,Port cleat bit" "0,1" line.long 0x4 "TG,Port bit toggle register" bitfld.long 0x4 15. "TG15,Port toggle bit" "0,1" bitfld.long 0x4 14. "TG14,Port toggle bit" "0,1" bitfld.long 0x4 13. "TG13,Port toggle bit" "0,1" bitfld.long 0x4 12. "TG12,Port toggle bit" "0,1" bitfld.long 0x4 11. "TG11,Port toggle bit" "0,1" bitfld.long 0x4 10. "TG10,Port toggle bit" "0,1" bitfld.long 0x4 9. "TG9,Port toggle bit" "0,1" bitfld.long 0x4 8. "TG8,Port toggle bit" "0,1" bitfld.long 0x4 7. "TG7,Port toggle bit" "0,1" bitfld.long 0x4 6. "TG6,Port toggle bit" "0,1" bitfld.long 0x4 5. "TG5,Port toggle bit" "0,1" bitfld.long 0x4 4. "TG4,Port toggle bit" "0,1" newline bitfld.long 0x4 3. "TG3,Port toggle bit" "0,1" bitfld.long 0x4 2. "TG2,Port toggle bit" "0,1" bitfld.long 0x4 1. "TG1,Port toggle bit" "0,1" bitfld.long 0x4 0. "TG0,Port toggle bit" "0,1" tree.end tree "GPIOE" base ad:0x48001000 group.long 0x0++0xF line.long 0x0 "CTL,GPIO port control register" bitfld.long 0x0 30.--31. "CTL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 28.--29. "CTL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 26.--27. "CTL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 24.--25. "CTL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 22.--23. "CTL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 20.--21. "CTL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 18.--19. "CTL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 16.--17. "CTL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 14.--15. "CTL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 12.--13. "CTL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 10.--11. "CTL5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 8.--9. "CTL4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x0 6.--7. "CTL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 4.--5. "CTL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 2.--3. "CTL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 0.--1. "CTL0,Port x configuration bits (y =" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OM15,Port x configuration bit" "0,1" bitfld.long 0x4 14. "OM14,Port x configuration bit" "0,1" bitfld.long 0x4 13. "OM13,Port x configuration bit" "0,1" bitfld.long 0x4 12. "OM12,Port x configuration bit" "0,1" bitfld.long 0x4 11. "OM11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OM10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OM9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OM8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OM7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OM6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OM5,Port x configuration bit 5" "0,1" bitfld.long 0x4 4. "OM4,Port x configuration bit 4" "0,1" newline bitfld.long 0x4 3. "OM3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OM2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OM1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OM0,Port x configuration bit 0" "0,1" line.long 0x8 "OSPD,GPIO port output speed" bitfld.long 0x8 30.--31. "OSPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSPD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 8.--9. "OSPD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 6.--7. "OSPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSPD0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUD,GPIO port pull-up/pull-down" bitfld.long 0xC 30.--31. "PUD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 8.--9. "PUD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 6.--7. "PUD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "ISTAT,GPIO port input data register" bitfld.long 0x0 15. "ISTAT15,Port input data (y =" "0,1" bitfld.long 0x0 14. "ISTAT14,Port input data (y =" "0,1" bitfld.long 0x0 13. "ISTAT13,Port input data (y =" "0,1" bitfld.long 0x0 12. "ISTAT12,Port input data (y =" "0,1" bitfld.long 0x0 11. "ISTAT11,Port input data (y =" "0,1" bitfld.long 0x0 10. "ISTAT10,Port input data (y =" "0,1" bitfld.long 0x0 9. "ISTAT9,Port input data (y =" "0,1" bitfld.long 0x0 8. "ISTAT8,Port input data (y =" "0,1" bitfld.long 0x0 7. "ISTAT7,Port input data (y =" "0,1" bitfld.long 0x0 6. "ISTAT6,Port input data (y =" "0,1" bitfld.long 0x0 5. "ISTAT5,Port input data (y =" "0,1" bitfld.long 0x0 4. "ISTAT4,Port input data (y =" "0,1" newline bitfld.long 0x0 3. "ISTAT3,Port input data (y =" "0,1" bitfld.long 0x0 2. "ISTAT2,Port input data (y =" "0,1" bitfld.long 0x0 1. "ISTAT1,Port input data (y =" "0,1" bitfld.long 0x0 0. "ISTAT0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "OCTL,GPIO port output data register" bitfld.long 0x0 15. "OCTL15,Port output data (y =" "0,1" bitfld.long 0x0 14. "OCTL14,Port output data (y =" "0,1" bitfld.long 0x0 13. "OCTL13,Port output data (y =" "0,1" bitfld.long 0x0 12. "OCTL12,Port output data (y =" "0,1" bitfld.long 0x0 11. "OCTL11,Port output data (y =" "0,1" bitfld.long 0x0 10. "OCTL10,Port output data (y =" "0,1" bitfld.long 0x0 9. "OCTL9,Port output data (y =" "0,1" bitfld.long 0x0 8. "OCTL8,Port output data (y =" "0,1" bitfld.long 0x0 7. "OCTL7,Port output data (y =" "0,1" bitfld.long 0x0 6. "OCTL6,Port output data (y =" "0,1" bitfld.long 0x0 5. "OCTL5,Port output data (y =" "0,1" bitfld.long 0x0 4. "OCTL4,Port output data (y =" "0,1" newline bitfld.long 0x0 3. "OCTL3,Port output data (y =" "0,1" bitfld.long 0x0 2. "OCTL2,Port output data (y =" "0,1" bitfld.long 0x0 1. "OCTL1,Port output data (y =" "0,1" bitfld.long 0x0 0. "OCTL0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BOP,GPIO port bit set/reset" bitfld.long 0x0 31. "CR15,Port x reset bit y (y =" "0,1" bitfld.long 0x0 30. "CR14,Port x reset bit y (y =" "0,1" bitfld.long 0x0 29. "CR13,Port x reset bit y (y =" "0,1" bitfld.long 0x0 28. "CR12,Port x reset bit y (y =" "0,1" bitfld.long 0x0 27. "CR11,Port x reset bit y (y =" "0,1" bitfld.long 0x0 26. "CR10,Port x reset bit y (y =" "0,1" bitfld.long 0x0 25. "CR9,Port x reset bit y (y =" "0,1" bitfld.long 0x0 24. "CR8,Port x reset bit y (y =" "0,1" bitfld.long 0x0 23. "CR7,Port x reset bit y (y =" "0,1" bitfld.long 0x0 22. "CR6,Port x reset bit y (y =" "0,1" bitfld.long 0x0 21. "CR5,Port x reset bit y (y =" "0,1" bitfld.long 0x0 20. "CR4,Port x reset bit y (y =" "0,1" newline bitfld.long 0x0 19. "CR3,Port x reset bit y (y =" "0,1" bitfld.long 0x0 18. "CR2,Port x reset bit y (y =" "0,1" bitfld.long 0x0 17. "CR1,Port x reset bit y (y =" "0,1" bitfld.long 0x0 16. "CR0,Port x reset bit y (y=" "0,1" bitfld.long 0x0 15. "BOP15,Port x set bit y (y=" "0,1" bitfld.long 0x0 14. "BOP14,Port x set bit y (y=" "0,1" bitfld.long 0x0 13. "BOP13,Port x set bit y (y=" "0,1" bitfld.long 0x0 12. "BOP12,Port x set bit y (y=" "0,1" bitfld.long 0x0 11. "BOP11,Port x set bit y (y=" "0,1" bitfld.long 0x0 10. "BOP10,Port x set bit y (y=" "0,1" bitfld.long 0x0 9. "BOP9,Port x set bit y (y=" "0,1" bitfld.long 0x0 8. "BOP8,Port x set bit y (y=" "0,1" newline bitfld.long 0x0 7. "BOP7,Port x set bit y (y=" "0,1" bitfld.long 0x0 6. "BOP6,Port x set bit y (y=" "0,1" bitfld.long 0x0 5. "BOP5,Port x set bit y (y=" "0,1" bitfld.long 0x0 4. "BOP4,Port x set bit y (y=" "0,1" bitfld.long 0x0 3. "BOP3,Port x set bit y (y=" "0,1" bitfld.long 0x0 2. "BOP2,Port x set bit y (y=" "0,1" bitfld.long 0x0 1. "BOP1,Port x set bit y (y=" "0,1" bitfld.long 0x0 0. "BOP0,Port x set bit y (y=" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LKK,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LK15,Port x lock bit y (y=" "0,1" bitfld.long 0x0 14. "LK14,Port x lock bit y (y=" "0,1" bitfld.long 0x0 13. "LK13,Port x lock bit y (y=" "0,1" bitfld.long 0x0 12. "LK12,Port x lock bit y (y=" "0,1" bitfld.long 0x0 11. "LK11,Port x lock bit y (y=" "0,1" bitfld.long 0x0 10. "LK10,Port x lock bit y (y=" "0,1" bitfld.long 0x0 9. "LK9,Port x lock bit y (y=" "0,1" bitfld.long 0x0 8. "LK8,Port x lock bit y (y=" "0,1" bitfld.long 0x0 7. "LK7,Port x lock bit y (y=" "0,1" bitfld.long 0x0 6. "LK6,Port x lock bit y (y=" "0,1" bitfld.long 0x0 5. "LK5,Port x lock bit y (y=" "0,1" newline bitfld.long 0x0 4. "LK4,Port x lock bit y (y=" "0,1" bitfld.long 0x0 3. "LK3,Port x lock bit y (y=" "0,1" bitfld.long 0x0 2. "LK2,Port x lock bit y (y=" "0,1" bitfld.long 0x0 1. "LK1,Port x lock bit y (y=" "0,1" bitfld.long 0x0 0. "LK0,Port x lock bit y (y=" "0,1" line.long 0x4 "AFSEL0,GPIO alternate function low" hexmask.long.byte 0x4 28.--31. 1. "SEL7,Alternate function selection for port x" hexmask.long.byte 0x4 24.--27. 1. "SEL6,Alternate function selection for port x" hexmask.long.byte 0x4 20.--23. 1. "SEL5,Alternate function selection for port x" hexmask.long.byte 0x4 16.--19. 1. "SEL4,Alternate function selection for port x" hexmask.long.byte 0x4 12.--15. 1. "SEL3,Alternate function selection for port x" hexmask.long.byte 0x4 8.--11. 1. "SEL2,Alternate function selection for port x" hexmask.long.byte 0x4 4.--7. 1. "SEL1,Alternate function selection for port x" hexmask.long.byte 0x4 0.--3. 1. "SEL0,Alternate function selection for port x" line.long 0x8 "AFSEL1,GPIO alternate function" hexmask.long.byte 0x8 28.--31. 1. "SEL15,Alternate function selection for port x" hexmask.long.byte 0x8 24.--27. 1. "SEL14,Alternate function selection for port x" hexmask.long.byte 0x8 20.--23. 1. "SEL13,Alternate function selection for port x" hexmask.long.byte 0x8 16.--19. 1. "SEL12,Alternate function selection for port x" hexmask.long.byte 0x8 12.--15. 1. "SEL11,Alternate function selection for port x" hexmask.long.byte 0x8 8.--11. 1. "SEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "SEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "SEL8,Alternate function selection for port x" wgroup.long 0x28++0x7 line.long 0x0 "BC,Port bit reset register" bitfld.long 0x0 15. "CR15,Port cleat bit" "0,1" bitfld.long 0x0 14. "CR14,Port cleat bit" "0,1" bitfld.long 0x0 13. "CR13,Port cleat bit" "0,1" bitfld.long 0x0 12. "CR12,Port cleat bit" "0,1" bitfld.long 0x0 11. "CR11,Port cleat bit" "0,1" bitfld.long 0x0 10. "CR10,Port cleat bit" "0,1" bitfld.long 0x0 9. "CR9,Port cleat bit" "0,1" bitfld.long 0x0 8. "CR8,Port cleat bit" "0,1" bitfld.long 0x0 7. "CR7,Port cleat bit" "0,1" bitfld.long 0x0 6. "CR6,Port cleat bit" "0,1" bitfld.long 0x0 5. "CR5,Port cleat bit" "0,1" bitfld.long 0x0 4. "CR4,Port cleat bit" "0,1" newline bitfld.long 0x0 3. "CR3,Port cleat bit" "0,1" bitfld.long 0x0 2. "CR2,Port cleat bit" "0,1" bitfld.long 0x0 1. "CR1,Port cleat bit" "0,1" bitfld.long 0x0 0. "CR0,Port cleat bit" "0,1" line.long 0x4 "TG,Port bit toggle register" bitfld.long 0x4 15. "TG15,Port toggle bit" "0,1" bitfld.long 0x4 14. "TG14,Port toggle bit" "0,1" bitfld.long 0x4 13. "TG13,Port toggle bit" "0,1" bitfld.long 0x4 12. "TG12,Port toggle bit" "0,1" bitfld.long 0x4 11. "TG11,Port toggle bit" "0,1" bitfld.long 0x4 10. "TG10,Port toggle bit" "0,1" bitfld.long 0x4 9. "TG9,Port toggle bit" "0,1" bitfld.long 0x4 8. "TG8,Port toggle bit" "0,1" bitfld.long 0x4 7. "TG7,Port toggle bit" "0,1" bitfld.long 0x4 6. "TG6,Port toggle bit" "0,1" bitfld.long 0x4 5. "TG5,Port toggle bit" "0,1" bitfld.long 0x4 4. "TG4,Port toggle bit" "0,1" newline bitfld.long 0x4 3. "TG3,Port toggle bit" "0,1" bitfld.long 0x4 2. "TG2,Port toggle bit" "0,1" bitfld.long 0x4 1. "TG1,Port toggle bit" "0,1" bitfld.long 0x4 0. "TG0,Port toggle bit" "0,1" tree.end tree "GPIOF" base ad:0x48001400 group.long 0x0++0xF line.long 0x0 "CTL,GPIO port control register" bitfld.long 0x0 30.--31. "CTL15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 28.--29. "CTL14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 26.--27. "CTL13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 24.--25. "CTL12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 22.--23. "CTL11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 20.--21. "CTL10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 18.--19. "CTL9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 16.--17. "CTL8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 14.--15. "CTL7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 12.--13. "CTL6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 10.--11. "CTL5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 8.--9. "CTL4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x0 6.--7. "CTL3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 4.--5. "CTL2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 2.--3. "CTL1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x0 0.--1. "CTL0,Port x configuration bits (y =" "0,1,2,3" line.long 0x4 "OMODE,GPIO port output type register" bitfld.long 0x4 15. "OM15,Port x configuration bit" "0,1" bitfld.long 0x4 14. "OM14,Port x configuration bit" "0,1" bitfld.long 0x4 13. "OM13,Port x configuration bit" "0,1" bitfld.long 0x4 12. "OM12,Port x configuration bit" "0,1" bitfld.long 0x4 11. "OM11,Port x configuration bit" "0,1" bitfld.long 0x4 10. "OM10,Port x configuration bit" "0,1" bitfld.long 0x4 9. "OM9,Port x configuration bit 9" "0,1" bitfld.long 0x4 8. "OM8,Port x configuration bit 8" "0,1" bitfld.long 0x4 7. "OM7,Port x configuration bit 7" "0,1" bitfld.long 0x4 6. "OM6,Port x configuration bit 6" "0,1" bitfld.long 0x4 5. "OM5,Port x configuration bit 5" "0,1" bitfld.long 0x4 4. "OM4,Port x configuration bit 4" "0,1" newline bitfld.long 0x4 3. "OM3,Port x configuration bit 3" "0,1" bitfld.long 0x4 2. "OM2,Port x configuration bit 2" "0,1" bitfld.long 0x4 1. "OM1,Port x configuration bit 1" "0,1" bitfld.long 0x4 0. "OM0,Port x configuration bit 0" "0,1" line.long 0x8 "OSPD,GPIO port output speed" bitfld.long 0x8 30.--31. "OSPD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 28.--29. "OSPD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 26.--27. "OSPD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 24.--25. "OSPD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 22.--23. "OSPD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 20.--21. "OSPD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 18.--19. "OSPD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 16.--17. "OSPD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 14.--15. "OSPD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 12.--13. "OSPD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 10.--11. "OSPD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 8.--9. "OSPD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0x8 6.--7. "OSPD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 4.--5. "OSPD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 2.--3. "OSPD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0x8 0.--1. "OSPD0,Port x configuration bits (y =" "0,1,2,3" line.long 0xC "PUD,GPIO port pull-up/pull-down" bitfld.long 0xC 30.--31. "PUD15,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 28.--29. "PUD14,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 26.--27. "PUD13,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 24.--25. "PUD12,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 22.--23. "PUD11,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 20.--21. "PUD10,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 18.--19. "PUD9,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 16.--17. "PUD8,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 14.--15. "PUD7,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 12.--13. "PUD6,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 10.--11. "PUD5,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 8.--9. "PUD4,Port x configuration bits (y =" "0,1,2,3" newline bitfld.long 0xC 6.--7. "PUD3,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 4.--5. "PUD2,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 2.--3. "PUD1,Port x configuration bits (y =" "0,1,2,3" bitfld.long 0xC 0.--1. "PUD0,Port x configuration bits (y =" "0,1,2,3" rgroup.long 0x10++0x3 line.long 0x0 "ISTAT,GPIO port input data register" bitfld.long 0x0 15. "ISTAT15,Port input data (y =" "0,1" bitfld.long 0x0 14. "ISTAT14,Port input data (y =" "0,1" bitfld.long 0x0 13. "ISTAT13,Port input data (y =" "0,1" bitfld.long 0x0 12. "ISTAT12,Port input data (y =" "0,1" bitfld.long 0x0 11. "ISTAT11,Port input data (y =" "0,1" bitfld.long 0x0 10. "ISTAT10,Port input data (y =" "0,1" bitfld.long 0x0 9. "ISTAT9,Port input data (y =" "0,1" bitfld.long 0x0 8. "ISTAT8,Port input data (y =" "0,1" bitfld.long 0x0 7. "ISTAT7,Port input data (y =" "0,1" bitfld.long 0x0 6. "ISTAT6,Port input data (y =" "0,1" bitfld.long 0x0 5. "ISTAT5,Port input data (y =" "0,1" bitfld.long 0x0 4. "ISTAT4,Port input data (y =" "0,1" newline bitfld.long 0x0 3. "ISTAT3,Port input data (y =" "0,1" bitfld.long 0x0 2. "ISTAT2,Port input data (y =" "0,1" bitfld.long 0x0 1. "ISTAT1,Port input data (y =" "0,1" bitfld.long 0x0 0. "ISTAT0,Port input data (y =" "0,1" group.long 0x14++0x3 line.long 0x0 "OCTL,GPIO port output data register" bitfld.long 0x0 15. "OCTL15,Port output data (y =" "0,1" bitfld.long 0x0 14. "OCTL14,Port output data (y =" "0,1" bitfld.long 0x0 13. "OCTL13,Port output data (y =" "0,1" bitfld.long 0x0 12. "OCTL12,Port output data (y =" "0,1" bitfld.long 0x0 11. "OCTL11,Port output data (y =" "0,1" bitfld.long 0x0 10. "OCTL10,Port output data (y =" "0,1" bitfld.long 0x0 9. "OCTL9,Port output data (y =" "0,1" bitfld.long 0x0 8. "OCTL8,Port output data (y =" "0,1" bitfld.long 0x0 7. "OCTL7,Port output data (y =" "0,1" bitfld.long 0x0 6. "OCTL6,Port output data (y =" "0,1" bitfld.long 0x0 5. "OCTL5,Port output data (y =" "0,1" bitfld.long 0x0 4. "OCTL4,Port output data (y =" "0,1" newline bitfld.long 0x0 3. "OCTL3,Port output data (y =" "0,1" bitfld.long 0x0 2. "OCTL2,Port output data (y =" "0,1" bitfld.long 0x0 1. "OCTL1,Port output data (y =" "0,1" bitfld.long 0x0 0. "OCTL0,Port output data (y =" "0,1" wgroup.long 0x18++0x3 line.long 0x0 "BOP,GPIO port bit set/reset" bitfld.long 0x0 31. "CR15,Port x reset bit y (y =" "0,1" bitfld.long 0x0 30. "CR14,Port x reset bit y (y =" "0,1" bitfld.long 0x0 29. "CR13,Port x reset bit y (y =" "0,1" bitfld.long 0x0 28. "CR12,Port x reset bit y (y =" "0,1" bitfld.long 0x0 27. "CR11,Port x reset bit y (y =" "0,1" bitfld.long 0x0 26. "CR10,Port x reset bit y (y =" "0,1" bitfld.long 0x0 25. "CR9,Port x reset bit y (y =" "0,1" bitfld.long 0x0 24. "CR8,Port x reset bit y (y =" "0,1" bitfld.long 0x0 23. "CR7,Port x reset bit y (y =" "0,1" bitfld.long 0x0 22. "CR6,Port x reset bit y (y =" "0,1" bitfld.long 0x0 21. "CR5,Port x reset bit y (y =" "0,1" bitfld.long 0x0 20. "CR4,Port x reset bit y (y =" "0,1" newline bitfld.long 0x0 19. "CR3,Port x reset bit y (y =" "0,1" bitfld.long 0x0 18. "CR2,Port x reset bit y (y =" "0,1" bitfld.long 0x0 17. "CR1,Port x reset bit y (y =" "0,1" bitfld.long 0x0 16. "CR0,Port x reset bit y (y=" "0,1" bitfld.long 0x0 15. "BOP15,Port x set bit y (y=" "0,1" bitfld.long 0x0 14. "BOP14,Port x set bit y (y=" "0,1" bitfld.long 0x0 13. "BOP13,Port x set bit y (y=" "0,1" bitfld.long 0x0 12. "BOP12,Port x set bit y (y=" "0,1" bitfld.long 0x0 11. "BOP11,Port x set bit y (y=" "0,1" bitfld.long 0x0 10. "BOP10,Port x set bit y (y=" "0,1" bitfld.long 0x0 9. "BOP9,Port x set bit y (y=" "0,1" bitfld.long 0x0 8. "BOP8,Port x set bit y (y=" "0,1" newline bitfld.long 0x0 7. "BOP7,Port x set bit y (y=" "0,1" bitfld.long 0x0 6. "BOP6,Port x set bit y (y=" "0,1" bitfld.long 0x0 5. "BOP5,Port x set bit y (y=" "0,1" bitfld.long 0x0 4. "BOP4,Port x set bit y (y=" "0,1" bitfld.long 0x0 3. "BOP3,Port x set bit y (y=" "0,1" bitfld.long 0x0 2. "BOP2,Port x set bit y (y=" "0,1" bitfld.long 0x0 1. "BOP1,Port x set bit y (y=" "0,1" bitfld.long 0x0 0. "BOP0,Port x set bit y (y=" "0,1" group.long 0x1C++0xB line.long 0x0 "LOCK,GPIO port configuration lock" bitfld.long 0x0 16. "LKK,Port x lock bit y" "0,1" bitfld.long 0x0 15. "LK15,Port x lock bit y (y=" "0,1" bitfld.long 0x0 14. "LK14,Port x lock bit y (y=" "0,1" bitfld.long 0x0 13. "LK13,Port x lock bit y (y=" "0,1" bitfld.long 0x0 12. "LK12,Port x lock bit y (y=" "0,1" bitfld.long 0x0 11. "LK11,Port x lock bit y (y=" "0,1" bitfld.long 0x0 10. "LK10,Port x lock bit y (y=" "0,1" bitfld.long 0x0 9. "LK9,Port x lock bit y (y=" "0,1" bitfld.long 0x0 8. "LK8,Port x lock bit y (y=" "0,1" bitfld.long 0x0 7. "LK7,Port x lock bit y (y=" "0,1" bitfld.long 0x0 6. "LK6,Port x lock bit y (y=" "0,1" bitfld.long 0x0 5. "LK5,Port x lock bit y (y=" "0,1" newline bitfld.long 0x0 4. "LK4,Port x lock bit y (y=" "0,1" bitfld.long 0x0 3. "LK3,Port x lock bit y (y=" "0,1" bitfld.long 0x0 2. "LK2,Port x lock bit y (y=" "0,1" bitfld.long 0x0 1. "LK1,Port x lock bit y (y=" "0,1" bitfld.long 0x0 0. "LK0,Port x lock bit y (y=" "0,1" line.long 0x4 "AFSEL0,GPIO alternate function low" hexmask.long.byte 0x4 28.--31. 1. "SEL7,Alternate function selection for port x" hexmask.long.byte 0x4 24.--27. 1. "SEL6,Alternate function selection for port x" hexmask.long.byte 0x4 20.--23. 1. "SEL5,Alternate function selection for port x" hexmask.long.byte 0x4 16.--19. 1. "SEL4,Alternate function selection for port x" hexmask.long.byte 0x4 12.--15. 1. "SEL3,Alternate function selection for port x" hexmask.long.byte 0x4 8.--11. 1. "SEL2,Alternate function selection for port x" hexmask.long.byte 0x4 4.--7. 1. "SEL1,Alternate function selection for port x" hexmask.long.byte 0x4 0.--3. 1. "SEL0,Alternate function selection for port x" line.long 0x8 "AFSEL1,GPIO alternate function" hexmask.long.byte 0x8 28.--31. 1. "SEL15,Alternate function selection for port x" hexmask.long.byte 0x8 24.--27. 1. "SEL14,Alternate function selection for port x" hexmask.long.byte 0x8 20.--23. 1. "SEL13,Alternate function selection for port x" hexmask.long.byte 0x8 16.--19. 1. "SEL12,Alternate function selection for port x" hexmask.long.byte 0x8 12.--15. 1. "SEL11,Alternate function selection for port x" hexmask.long.byte 0x8 8.--11. 1. "SEL10,Alternate function selection for port x" hexmask.long.byte 0x8 4.--7. 1. "SEL9,Alternate function selection for port x" hexmask.long.byte 0x8 0.--3. 1. "SEL8,Alternate function selection for port x" wgroup.long 0x28++0x7 line.long 0x0 "BC,Port bit reset register" bitfld.long 0x0 15. "CR15,Port cleat bit" "0,1" bitfld.long 0x0 14. "CR14,Port cleat bit" "0,1" bitfld.long 0x0 13. "CR13,Port cleat bit" "0,1" bitfld.long 0x0 12. "CR12,Port cleat bit" "0,1" bitfld.long 0x0 11. "CR11,Port cleat bit" "0,1" bitfld.long 0x0 10. "CR10,Port cleat bit" "0,1" bitfld.long 0x0 9. "CR9,Port cleat bit" "0,1" bitfld.long 0x0 8. "CR8,Port cleat bit" "0,1" bitfld.long 0x0 7. "CR7,Port cleat bit" "0,1" bitfld.long 0x0 6. "CR6,Port cleat bit" "0,1" bitfld.long 0x0 5. "CR5,Port cleat bit" "0,1" bitfld.long 0x0 4. "CR4,Port cleat bit" "0,1" newline bitfld.long 0x0 3. "CR3,Port cleat bit" "0,1" bitfld.long 0x0 2. "CR2,Port cleat bit" "0,1" bitfld.long 0x0 1. "CR1,Port cleat bit" "0,1" bitfld.long 0x0 0. "CR0,Port cleat bit" "0,1" line.long 0x4 "TG,Port bit toggle register" bitfld.long 0x4 15. "TG15,Port toggle bit" "0,1" bitfld.long 0x4 14. "TG14,Port toggle bit" "0,1" bitfld.long 0x4 13. "TG13,Port toggle bit" "0,1" bitfld.long 0x4 12. "TG12,Port toggle bit" "0,1" bitfld.long 0x4 11. "TG11,Port toggle bit" "0,1" bitfld.long 0x4 10. "TG10,Port toggle bit" "0,1" bitfld.long 0x4 9. "TG9,Port toggle bit" "0,1" bitfld.long 0x4 8. "TG8,Port toggle bit" "0,1" bitfld.long 0x4 7. "TG7,Port toggle bit" "0,1" bitfld.long 0x4 6. "TG6,Port toggle bit" "0,1" bitfld.long 0x4 5. "TG5,Port toggle bit" "0,1" bitfld.long 0x4 4. "TG4,Port toggle bit" "0,1" newline bitfld.long 0x4 3. "TG3,Port toggle bit" "0,1" bitfld.long 0x4 2. "TG2,Port toggle bit" "0,1" bitfld.long 0x4 1. "TG1,Port toggle bit" "0,1" bitfld.long 0x4 0. "TG0,Port toggle bit" "0,1" tree.end tree.end tree "I2C (Inter-Integrated Circuit Interface)" base ad:0x0 tree "I2C0" base ad:0x40005400 group.long 0x0++0x17 line.long 0x0 "CTL0,Control register 0" bitfld.long 0x0 23. "PECEN,PEC Calculation Switch" "0,1" bitfld.long 0x0 22. "SMBALTEN,SMBus Alert enable" "0,1" bitfld.long 0x0 21. "SMBDAEN,SMBus device default address enable" "0,1" bitfld.long 0x0 20. "SMBHAEN,SMBus Host address enable" "0,1" bitfld.long 0x0 19. "GCEN,Whether or not to response to a General Call" "0,1" bitfld.long 0x0 17. "SS,Whether to stretch SCL low when data is not ready in slave mode" "0,1" bitfld.long 0x0 16. "SBCTL,Slave byte control" "0,1" bitfld.long 0x0 15. "DENR,DMA enable for reception" "0,1" newline bitfld.long 0x0 14. "DENT,DMA enable for transmission" "0,1" bitfld.long 0x0 12. "ANOFF,Analog noise filter disable" "0,1" hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupt enable" "0,1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "0,1" bitfld.long 0x0 5. "STPDETIE,Stop detection interrupt enable" "0,1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "0,1" bitfld.long 0x0 3. "ADDMIE,Address match interrupt enable in slave mode" "0,1" newline bitfld.long 0x0 2. "RBNEIE,Receive interrupt enable" "0,1" bitfld.long 0x0 1. "TIE,Receive interrupt enable" "0,1" bitfld.long 0x0 0. "I2CEN,I2C peripheral enable" "0,1" line.long 0x4 "CTL1,Control register 1" bitfld.long 0x4 26. "PECTRANS,PEC Transfer" "0,1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode in master mode" "0,1" bitfld.long 0x4 24. "RELOAD,Reload mode" "0,1" hexmask.long.byte 0x4 16.--23. 1. "BYTENUM,Number of bytes to be transferred" bitfld.long 0x4 15. "NACKEN,Generate NACK in slave mode" "0,1" bitfld.long 0x4 14. "STOP,Generate a STOP condition on I2C bus" "0,1" bitfld.long 0x4 13. "START,Generate a START condition on I2C bus" "0,1" bitfld.long 0x4 12. "HEAD10R,10-bit address header executes read direction only in master receive mode" "0,1" newline bitfld.long 0x4 11. "ADD10EN,10-bit addressing mode enable in master mode" "0,1" bitfld.long 0x4 10. "TRDIR,Transfer direction in master mode" "0,1" hexmask.long.word 0x4 0.--9. 1. "SADDRESS,Slave address to be sent" line.long 0x8 "SADDR0,Slave address register 0" bitfld.long 0x8 15. "ADDRESSEN,I2C address enable" "0,1" bitfld.long 0x8 10. "ADDFORMAT,Address mode for the I2C slave" "0,1" bitfld.long 0x8 8.--9. "ADDRESS_8_9,7-bit address or bits 7:1 of a 10-bit address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "ADDRESS_1_7,Highest two bits of a 10-bit address" bitfld.long 0x8 0. "ADDRESS_0,Bit 0 of a 10-bit address" "0,1" line.long 0xC "SADDR1,Slave address register 1" bitfld.long 0xC 15. "ADDRESS2EN,Second I2C address enable" "0,1" bitfld.long 0xC 8.--10. "ADDMSK2,ADDRESS2[7:1] mask" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 1.--7. 1. "ADDRESS2,Second I2C address for the slave" line.long 0x10 "TIMING,Timing register" hexmask.long.byte 0x10 28.--31. 1. "PSC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDELY,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADELY,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period" line.long 0x14 "TIMEOUT,timeout register" bitfld.long 0x14 31. "EXTOEN,Extended clock timeout detection enable" "0,1" hexmask.long.word 0x14 16.--27. 1. "BUSTOB,Bus timeout B" bitfld.long 0x14 15. "TOEN,Clock timeout detection enable" "0,1" bitfld.long 0x14 12. "TOIDLE,Idle clock timeout detection" "0,1" hexmask.long.word 0x14 0.--11. 1. "BUSTOA,Bus timeout A" rgroup.long 0x18++0x3 line.long 0x0 "STAT,Transfer status register" hexmask.long.byte 0x0 17.--23. 1. "READDR,Received match address in slave mode" bitfld.long 0x0 16. "TR,Whether the I2C is a transmitter or a receiver in slave mode" "0,1" bitfld.long 0x0 15. "I2CBSY,Busy flag" "0,1" bitfld.long 0x0 13. "SMBALT,SMBus Alert" "0,1" bitfld.long 0x0 12. "TIMEOUT,TIMEOUT flag" "0,1" bitfld.long 0x0 11. "PECERR,PEC error" "0,1" bitfld.long 0x0 10. "OUERR,Overrun/Underrun error in slave mode" "0,1" bitfld.long 0x0 9. "LOSTARB,Arbitration Lost" "0,1" newline bitfld.long 0x0 8. "BERR,Bus error" "0,1" bitfld.long 0x0 7. "TCR,Transfer complete reload" "0,1" bitfld.long 0x0 6. "TC,Transfer complete in master mode" "0,1" bitfld.long 0x0 5. "STPDET,STOP condition is detected on the bus" "0,1" bitfld.long 0x0 4. "NACK,Not Acknowledge flag" "0,1" bitfld.long 0x0 3. "ADDSEND,Address received matches in slave mode" "0,1" bitfld.long 0x0 2. "RBNE,I2C_RDATA is not empty during receiving" "0,1" bitfld.long 0x0 1. "TI,Transmit interrupt" "0,1" newline bitfld.long 0x0 0. "TBE,I2C_TDATA is empty during transmitting" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "STATC,Status clear register" bitfld.long 0x0 13. "SMBALTC,SMBus Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMEOUTC,TIMEOUT flag clear" "0,1" bitfld.long 0x0 11. "PECERRC,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OUERRC,Overrun/Underrun flag clear" "0,1" bitfld.long 0x0 9. "LOSTARBC,Arbitration Lost flag clear" "0,1" bitfld.long 0x0 8. "BERRC,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STPDETC,STPDET flag clear" "0,1" bitfld.long 0x0 4. "NACKC,Not Acknowledge flag clear" "0,1" newline bitfld.long 0x0 3. "ADDSENDC,ADDSEND flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "PEC,Packet Error Check register" hexmask.long.byte 0x0 0.--7. 1. "PECV,Packet Error Checking Value" line.long 0x4 "RDATA,receive data register" hexmask.long.byte 0x4 0.--7. 1. "RDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TDATA,Transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TDATA,Transmit data value" group.long 0x90++0x3 line.long 0x0 "CTL2,Control register 2" hexmask.long.byte 0x0 9.--15. 1. "ADDM,Defines which bits of ADDRESS" tree.end tree "I2C1" base ad:0x40005800 group.long 0x0++0x17 line.long 0x0 "CTL0,Control register 0" bitfld.long 0x0 23. "PECEN,PEC Calculation Switch" "0,1" bitfld.long 0x0 22. "SMBALTEN,SMBus Alert enable" "0,1" bitfld.long 0x0 21. "SMBDAEN,SMBus device default address enable" "0,1" bitfld.long 0x0 20. "SMBHAEN,SMBus Host address enable" "0,1" bitfld.long 0x0 19. "GCEN,Whether or not to response to a General Call" "0,1" bitfld.long 0x0 17. "SS,Whether to stretch SCL low when data is not ready in slave mode" "0,1" bitfld.long 0x0 16. "SBCTL,Slave byte control" "0,1" bitfld.long 0x0 15. "DENR,DMA enable for reception" "0,1" newline bitfld.long 0x0 14. "DENT,DMA enable for transmission" "0,1" bitfld.long 0x0 12. "ANOFF,Analog noise filter disable" "0,1" hexmask.long.byte 0x0 8.--11. 1. "DNF,Digital noise filter" bitfld.long 0x0 7. "ERRIE,Error interrupt enable" "0,1" bitfld.long 0x0 6. "TCIE,Transfer complete interrupt enable" "0,1" bitfld.long 0x0 5. "STPDETIE,Stop detection interrupt enable" "0,1" bitfld.long 0x0 4. "NACKIE,Not acknowledge received interrupt enable" "0,1" bitfld.long 0x0 3. "ADDMIE,Address match interrupt enable in slave mode" "0,1" newline bitfld.long 0x0 2. "RBNEIE,Receive interrupt enable" "0,1" bitfld.long 0x0 1. "TIE,Receive interrupt enable" "0,1" bitfld.long 0x0 0. "I2CEN,I2C peripheral enable" "0,1" line.long 0x4 "CTL1,Control register 1" bitfld.long 0x4 26. "PECTRANS,PEC Transfer" "0,1" bitfld.long 0x4 25. "AUTOEND,Automatic end mode in master mode" "0,1" bitfld.long 0x4 24. "RELOAD,Reload mode" "0,1" hexmask.long.byte 0x4 16.--23. 1. "BYTENUM,Number of bytes to be transferred" bitfld.long 0x4 15. "NACKEN,Generate NACK in slave mode" "0,1" bitfld.long 0x4 14. "STOP,Generate a STOP condition on I2C bus" "0,1" bitfld.long 0x4 13. "START,Generate a START condition on I2C bus" "0,1" bitfld.long 0x4 12. "HEAD10R,10-bit address header executes read direction only in master receive mode" "0,1" newline bitfld.long 0x4 11. "ADD10EN,10-bit addressing mode enable in master mode" "0,1" bitfld.long 0x4 10. "TRDIR,Transfer direction in master mode" "0,1" hexmask.long.word 0x4 0.--9. 1. "SADDRESS,Slave address to be sent" line.long 0x8 "SADDR0,Slave address register 0" bitfld.long 0x8 15. "ADDRESSEN,I2C address enable" "0,1" bitfld.long 0x8 10. "ADDFORMAT,Address mode for the I2C slave" "0,1" bitfld.long 0x8 8.--9. "ADDRESS_8_9,7-bit address or bits 7:1 of a 10-bit address" "0,1,2,3" hexmask.long.byte 0x8 1.--7. 1. "ADDRESS_1_7,Highest two bits of a 10-bit address" bitfld.long 0x8 0. "ADDRESS_0,Bit 0 of a 10-bit address" "0,1" line.long 0xC "SADDR1,Slave address register 1" bitfld.long 0xC 15. "ADDRESS2EN,Second I2C address enable" "0,1" bitfld.long 0xC 8.--10. "ADDMSK2,ADDRESS2[7:1] mask" "0,1,2,3,4,5,6,7" hexmask.long.byte 0xC 1.--7. 1. "ADDRESS2,Second I2C address for the slave" line.long 0x10 "TIMING,Timing register" hexmask.long.byte 0x10 28.--31. 1. "PSC,Timing prescaler" hexmask.long.byte 0x10 20.--23. 1. "SCLDELY,Data setup time" hexmask.long.byte 0x10 16.--19. 1. "SDADELY,Data hold time" hexmask.long.byte 0x10 8.--15. 1. "SCLH,SCL high period" hexmask.long.byte 0x10 0.--7. 1. "SCLL,SCL low period" line.long 0x14 "TIMEOUT,timeout register" bitfld.long 0x14 31. "EXTOEN,Extended clock timeout detection enable" "0,1" hexmask.long.word 0x14 16.--27. 1. "BUSTOB,Bus timeout B" bitfld.long 0x14 15. "TOEN,Clock timeout detection enable" "0,1" bitfld.long 0x14 12. "TOIDLE,Idle clock timeout detection" "0,1" hexmask.long.word 0x14 0.--11. 1. "BUSTOA,Bus timeout A" rgroup.long 0x18++0x3 line.long 0x0 "STAT,Transfer status register" hexmask.long.byte 0x0 17.--23. 1. "READDR,Received match address in slave mode" bitfld.long 0x0 16. "TR,Whether the I2C is a transmitter or a receiver in slave mode" "0,1" bitfld.long 0x0 15. "I2CBSY,Busy flag" "0,1" bitfld.long 0x0 13. "SMBALT,SMBus Alert" "0,1" bitfld.long 0x0 12. "TIMEOUT,TIMEOUT flag" "0,1" bitfld.long 0x0 11. "PECERR,PEC error" "0,1" bitfld.long 0x0 10. "OUERR,Overrun/Underrun error in slave mode" "0,1" bitfld.long 0x0 9. "LOSTARB,Arbitration Lost" "0,1" newline bitfld.long 0x0 8. "BERR,Bus error" "0,1" bitfld.long 0x0 7. "TCR,Transfer complete reload" "0,1" bitfld.long 0x0 6. "TC,Transfer complete in master mode" "0,1" bitfld.long 0x0 5. "STPDET,STOP condition is detected on the bus" "0,1" bitfld.long 0x0 4. "NACK,Not Acknowledge flag" "0,1" bitfld.long 0x0 3. "ADDSEND,Address received matches in slave mode" "0,1" bitfld.long 0x0 2. "RBNE,I2C_RDATA is not empty during receiving" "0,1" bitfld.long 0x0 1. "TI,Transmit interrupt" "0,1" newline bitfld.long 0x0 0. "TBE,I2C_TDATA is empty during transmitting" "0,1" wgroup.long 0x1C++0x3 line.long 0x0 "STATC,Status clear register" bitfld.long 0x0 13. "SMBALTC,SMBus Alert flag clear" "0,1" bitfld.long 0x0 12. "TIMEOUTC,TIMEOUT flag clear" "0,1" bitfld.long 0x0 11. "PECERRC,PEC error flag clear" "0,1" bitfld.long 0x0 10. "OUERRC,Overrun/Underrun flag clear" "0,1" bitfld.long 0x0 9. "LOSTARBC,Arbitration Lost flag clear" "0,1" bitfld.long 0x0 8. "BERRC,Bus error flag clear" "0,1" bitfld.long 0x0 5. "STPDETC,STPDET flag clear" "0,1" bitfld.long 0x0 4. "NACKC,Not Acknowledge flag clear" "0,1" newline bitfld.long 0x0 3. "ADDSENDC,ADDSEND flag clear" "0,1" rgroup.long 0x20++0x7 line.long 0x0 "PEC,Packet Error Check register" hexmask.long.byte 0x0 0.--7. 1. "PECV,Packet Error Checking Value" line.long 0x4 "RDATA,receive data register" hexmask.long.byte 0x4 0.--7. 1. "RDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TDATA,Transmit data register" hexmask.long.byte 0x0 0.--7. 1. "TDATA,Transmit data value" group.long 0x90++0x3 line.long 0x0 "CTL2,Control register 2" hexmask.long.byte 0x0 9.--15. 1. "ADDM,Defines which bits of ADDRESS" tree.end tree.end tree "MFCOM (Multi-function Communication Interface)" base ad:0x40038400 group.long 0x0++0x3 line.long 0x0 "CTL,Control register" bitfld.long 0x0 1. "SWRSTEN,Software reset enable" "0,1" bitfld.long 0x0 0. "MFCOMEN,MFCOM enable" "0,1" rgroup.long 0x4++0x3 line.long 0x0 "PINDATA,Pin data register" hexmask.long.byte 0x0 0.--7. 1. "PDATA,Input data of pins" group.long 0x8++0xB line.long 0x0 "SSTAT,Shifter status register" hexmask.long.byte 0x0 0.--3. 1. "SSTAT,Shifter x status flag" line.long 0x4 "SERR,Shifter error register" hexmask.long.byte 0x4 0.--3. 1. "SERR,Shifter x error flags" line.long 0x8 "TMSTAT,Timer status register" hexmask.long.byte 0x8 0.--3. 1. "TMSTAT,Timer x status flags" group.long 0x18++0xB line.long 0x0 "SSIEN,Shifter status interrupt enable register" hexmask.long.byte 0x0 0.--3. 1. "SSIEN,Shifter status interrupt enable" line.long 0x4 "SEIEN,Shifter error interrupt enable register" hexmask.long.byte 0x4 0.--3. 1. "SEIEN,Shifter error interrupt enable" line.long 0x8 "TMSIEN,Timer status interrupt enable register" hexmask.long.byte 0x8 0.--3. 1. "TMSIEN,Timer status interrupt enable" group.long 0x28++0x3 line.long 0x0 "SSDMAEN,Shifter status DMA enable register" hexmask.long.byte 0x0 0.--3. 1. "SSDMAEN,Shifter status DMA enable" group.long 0x80++0xF line.long 0x0 "SCTL0,Shifter control x register" bitfld.long 0x0 24.--25. "TMSEL,Timer select" "0,1,2,3" bitfld.long 0x0 23. "TMPL,Timer polarity" "0,1" bitfld.long 0x0 16.--17. "SPCFG,Shifter pin configuration" "0,1,2,3" bitfld.long 0x0 8.--10. "SPSEL,Shifter pin select" "0,1,2,3,4,5,6,7" bitfld.long 0x0 7. "SPPL,Shifter pin polarity" "0,1" bitfld.long 0x0 0.--2. "SMOD,Shifter mode" "0,1,2,3,4,5,6,7" line.long 0x4 "SCTL01,Shifter control x register" bitfld.long 0x4 24.--25. "TMSEL,Timer select" "0,1,2,3" bitfld.long 0x4 23. "TMPL,Timer polarity" "0,1" bitfld.long 0x4 16.--17. "SPCFG,Shifter pin configuration" "0,1,2,3" bitfld.long 0x4 8.--10. "SPSEL,Shifter pin select" "0,1,2,3,4,5,6,7" bitfld.long 0x4 7. "SPPL,Shifter pin polarity" "0,1" bitfld.long 0x4 0.--2. "SMOD,Shifter mode" "0,1,2,3,4,5,6,7" line.long 0x8 "SCTL2,Shifter control x register" bitfld.long 0x8 24.--25. "TMSEL,Timer select" "0,1,2,3" bitfld.long 0x8 23. "TMPL,Timer polarity" "0,1" bitfld.long 0x8 16.--17. "SPCFG,Shifter pin configuration" "0,1,2,3" bitfld.long 0x8 8.--10. "SPSEL,Shifter pin select" "0,1,2,3,4,5,6,7" bitfld.long 0x8 7. "SPPL,Shifter pin polarity" "0,1" bitfld.long 0x8 0.--2. "SMOD,Shifter mode" "0,1,2,3,4,5,6,7" line.long 0xC "SCTL3,Shifter control x register" bitfld.long 0xC 24.--25. "TMSEL,Timer select" "0,1,2,3" bitfld.long 0xC 23. "TMPL,Timer polarity" "0,1" bitfld.long 0xC 16.--17. "SPCFG,Shifter pin configuration" "0,1,2,3" bitfld.long 0xC 8.--10. "SPSEL,Shifter pin select" "0,1,2,3,4,5,6,7" bitfld.long 0xC 7. "SPPL,Shifter pin polarity" "0,1" bitfld.long 0xC 0.--2. "SMOD,Shifter mode" "0,1,2,3,4,5,6,7" group.long 0x100++0xF line.long 0x0 "SCFG0,Shifter configuration x register" bitfld.long 0x0 8. "INSRC,Input source" "0,1" bitfld.long 0x0 4.--5. "SSTOP,Shifter stop bit" "0,1,2,3" bitfld.long 0x0 0.--1. "SSTART,Shifter start bit" "0,1,2,3" line.long 0x4 "SCFG1,Shifter configuration x register" bitfld.long 0x4 8. "INSRC,Input source" "0,1" bitfld.long 0x4 4.--5. "SSTOP,Shifter stop bit" "0,1,2,3" bitfld.long 0x4 0.--1. "SSTART,Shifter start bit" "0,1,2,3" line.long 0x8 "SCFG2,Shifter configuration x register" bitfld.long 0x8 8. "INSRC,Input source" "0,1" bitfld.long 0x8 4.--5. "SSTOP,Shifter stop bit" "0,1,2,3" bitfld.long 0x8 0.--1. "SSTART,Shifter start bit" "0,1,2,3" line.long 0xC "SCFG3,Shifter configuration x register" bitfld.long 0xC 8. "INSRC,Input source" "0,1" bitfld.long 0xC 4.--5. "SSTOP,Shifter stop bit" "0,1,2,3" bitfld.long 0xC 0.--1. "SSTART,Shifter start bit" "0,1,2,3" group.long 0x200++0xF line.long 0x0 "SBUF0,Shifter buffer x register" hexmask.long 0x0 0.--31. 1. "SBUF,Shift buffer" line.long 0x4 "SBUF1,Shifter buffer x register" hexmask.long 0x4 0.--31. 1. "SBUF,Shift buffer" line.long 0x8 "SBUF2,Shifter buffer x register" hexmask.long 0x8 0.--31. 1. "SBUF,Shift buffer" line.long 0xC "SBUF3,Shifter buffer x register" hexmask.long 0xC 0.--31. 1. "SBUF,Shift buffer" group.long 0x280++0xF line.long 0x0 "SBUFBIS0,Shifter buffer x bit swapped register" hexmask.long 0x0 0.--31. 1. "SBUFBIS,Shift buffer bit swapped" line.long 0x4 "SBUFBIS1,Shifter buffer x bit swapped register" hexmask.long 0x4 0.--31. 1. "SBUFBIS,Shift buffer bit swapped" line.long 0x8 "SBUFBIS2,Shifter buffer x bit swapped register" hexmask.long 0x8 0.--31. 1. "SBUFBIS,Shift buffer bit swapped" line.long 0xC "SBUFBIS3,Shifter buffer x bit swapped register" hexmask.long 0xC 0.--31. 1. "SBUFBIS,Shift buffer bit swapped" group.long 0x300++0xF line.long 0x0 "SBUFBYS0,Shifter buffer x byte swapped register" hexmask.long 0x0 0.--31. 1. "SBUFBYS,Shift buffer byte swapped" line.long 0x4 "SBUFBYS1,Shifter buffer x byte swapped register" hexmask.long 0x4 0.--31. 1. "SBUFBYS,Shift buffer byte swapped" line.long 0x8 "SBUFBYS2,Shifter buffer x byte swapped register" hexmask.long 0x8 0.--31. 1. "SBUFBYS,Shift buffer byte swapped" line.long 0xC "SBUFBYS3,Shifter buffer x byte swapped register" hexmask.long 0xC 0.--31. 1. "SBUFBYS,Shift buffer byte swapped" group.long 0x380++0xF line.long 0x0 "SBUFBBS0,Shifter buffer x bit byte swapped register" hexmask.long 0x0 0.--31. 1. "SBUFBBS,Shift buffer bit byte swapped" line.long 0x4 "SBUFBBS1,Shifter buffer x bit byte swapped register" hexmask.long 0x4 0.--31. 1. "SBUFBBS,Shift buffer bit byte swapped" line.long 0x8 "SBUFBBS2,Shifter buffer x bit byte swapped register" hexmask.long 0x8 0.--31. 1. "SBUFBBS,Shift buffer bit byte swapped" line.long 0xC "SBUFBBS3,Shifter buffer x bit byte swapped register" hexmask.long 0xC 0.--31. 1. "SBUFBBS,Shift buffer bit byte swapped" group.long 0x400++0xF line.long 0x0 "TMCTL0,Timer control x register" hexmask.long.byte 0x0 24.--27. 1. "TRIGSEL,Trigger select" bitfld.long 0x0 23. "TRIGPL,Trigger polarity" "0,1" bitfld.long 0x0 22. "TRIGSRC,Trigger source" "0,1" bitfld.long 0x0 16.--17. "TMPCFG,Timer pin configuration" "0,1,2,3" bitfld.long 0x0 8.--9. "TMPSEL,Timer Pin Select" "0,1,2,3" bitfld.long 0x0 7. "TMPPL,Timer Pin Polarity" "0,1" bitfld.long 0x0 0.--1. "TMMOD,Timer Mode" "0,1,2,3" line.long 0x4 "TMCTL1,Timer control x register" hexmask.long.byte 0x4 24.--27. 1. "TRIGSEL,Trigger select" bitfld.long 0x4 23. "TRIGPL,Trigger polarity" "0,1" bitfld.long 0x4 22. "TRIGSRC,Trigger source" "0,1" bitfld.long 0x4 16.--17. "TMPCFG,Timer pin configuration" "0,1,2,3" bitfld.long 0x4 8.--9. "TMPSEL,Timer Pin Select" "0,1,2,3" bitfld.long 0x4 7. "TMPPL,Timer Pin Polarity" "0,1" bitfld.long 0x4 0.--1. "TMMOD,Timer Mode" "0,1,2,3" line.long 0x8 "TMCTL2,Timer control x register" hexmask.long.byte 0x8 24.--27. 1. "TRIGSEL,Trigger select" bitfld.long 0x8 23. "TRIGPL,Trigger polarity" "0,1" bitfld.long 0x8 22. "TRIGSRC,Trigger source" "0,1" bitfld.long 0x8 16.--17. "TMPCFG,Timer pin configuration" "0,1,2,3" bitfld.long 0x8 8.--9. "TMPSEL,Timer Pin Select" "0,1,2,3" bitfld.long 0x8 7. "TMPPL,Timer Pin Polarity" "0,1" bitfld.long 0x8 0.--1. "TMMOD,Timer Mode" "0,1,2,3" line.long 0xC "TMCTL3,Timer control x register" hexmask.long.byte 0xC 24.--27. 1. "TRIGSEL,Trigger select" bitfld.long 0xC 23. "TRIGPL,Trigger polarity" "0,1" bitfld.long 0xC 22. "TRIGSRC,Trigger source" "0,1" bitfld.long 0xC 16.--17. "TMPCFG,Timer pin configuration" "0,1,2,3" bitfld.long 0xC 8.--9. "TMPSEL,Timer Pin Select" "0,1,2,3" bitfld.long 0xC 7. "TMPPL,Timer Pin Polarity" "0,1" bitfld.long 0xC 0.--1. "TMMOD,Timer Mode" "0,1,2,3" group.long 0x480++0xF line.long 0x0 "TMCFG0,Timer configuration x register" bitfld.long 0x0 24.--25. "TMOUT,Timer output" "0,1,2,3" bitfld.long 0x0 20.--21. "TMDEC,Timer decrement" "0,1,2,3" bitfld.long 0x0 16.--18. "TMRST,Timer reset" "0,1,2,3,4,5,6,7" bitfld.long 0x0 12.--14. "TMDIS,Timer disable" "0,1,2,3,4,5,6,7" bitfld.long 0x0 8.--10. "TMEN,Timer enable" "0,1,2,3,4,5,6,7" bitfld.long 0x0 4.--5. "TMSTOP,Timer stop bit" "0,1,2,3" bitfld.long 0x0 1. "TMSTART,Timer start bit" "0,1" line.long 0x4 "TMCFG1,Timer configuration x register" bitfld.long 0x4 24.--25. "TMOUT,Timer output" "0,1,2,3" bitfld.long 0x4 20.--21. "TMDEC,Timer decrement" "0,1,2,3" bitfld.long 0x4 16.--18. "TMRST,Timer reset" "0,1,2,3,4,5,6,7" bitfld.long 0x4 12.--14. "TMDIS,Timer disable" "0,1,2,3,4,5,6,7" bitfld.long 0x4 8.--10. "TMEN,Timer enable" "0,1,2,3,4,5,6,7" bitfld.long 0x4 4.--5. "TMSTOP,Timer stop bit" "0,1,2,3" bitfld.long 0x4 1. "TMSTART,Timer start bit" "0,1" line.long 0x8 "TMCFG2,Timer configuration x register" bitfld.long 0x8 24.--25. "TMOUT,Timer output" "0,1,2,3" bitfld.long 0x8 20.--21. "TMDEC,Timer decrement" "0,1,2,3" bitfld.long 0x8 16.--18. "TMRST,Timer reset" "0,1,2,3,4,5,6,7" bitfld.long 0x8 12.--14. "TMDIS,Timer disable" "0,1,2,3,4,5,6,7" bitfld.long 0x8 8.--10. "TMEN,Timer enable" "0,1,2,3,4,5,6,7" bitfld.long 0x8 4.--5. "TMSTOP,Timer stop bit" "0,1,2,3" bitfld.long 0x8 1. "TMSTART,Timer start bit" "0,1" line.long 0xC "TMCFG3,Timer configuration x register" bitfld.long 0xC 24.--25. "TMOUT,Timer output" "0,1,2,3" bitfld.long 0xC 20.--21. "TMDEC,Timer decrement" "0,1,2,3" bitfld.long 0xC 16.--18. "TMRST,Timer reset" "0,1,2,3,4,5,6,7" bitfld.long 0xC 12.--14. "TMDIS,Timer disable" "0,1,2,3,4,5,6,7" bitfld.long 0xC 8.--10. "TMEN,Timer enable" "0,1,2,3,4,5,6,7" bitfld.long 0xC 4.--5. "TMSTOP,Timer stop bit" "0,1,2,3" bitfld.long 0xC 1. "TMSTART,Timer start bit" "0,1" group.long 0x500++0xF line.long 0x0 "TMCMP0,Timer compare x register" hexmask.long.word 0x0 0.--15. 1. "TMCVALUE,Timer compare value" line.long 0x4 "TMCMP1,Timer compare x register" hexmask.long.word 0x4 0.--15. 1. "TMCVALUE,Timer compare value" line.long 0x8 "TMCMP2,Timer compare x register" hexmask.long.word 0x8 0.--15. 1. "TMCVALUE,Timer compare value" line.long 0xC "TMCMP3,Timer compare x register" hexmask.long.word 0xC 0.--15. 1. "TMCVALUE,Timer compare value" tree.end tree "NVIC (Nested Vectored Interrupt)" base ad:0xE000E100 group.long 0x0++0x3F line.long 0x0 "ISER0,Interrupt Set Enable Register" hexmask.long 0x0 0.--31. 1. "SETENA,SETENA" line.long 0x4 "ISER1,Interrupt Set Enable Register" hexmask.long 0x4 0.--31. 1. "SETENA,SETENA" line.long 0x8 "ISER2,Interrupt Set Enable Register" hexmask.long 0x8 0.--31. 1. "SETENA,SETENA" line.long 0xC "ISER3,Interrupt Set Enable Register" hexmask.long 0xC 0.--31. 1. "SETENA,SETENA" line.long 0x10 "ISER4,Interrupt Set Enable Register" hexmask.long 0x10 0.--31. 1. "SETENA,SETENA" line.long 0x14 "ISER5,Interrupt Set Enable Register" hexmask.long 0x14 0.--31. 1. "SETENA,SETENA" line.long 0x18 "ISER6,Interrupt Set Enable Register" hexmask.long 0x18 0.--31. 1. "SETENA,SETENA" line.long 0x1C "ISER7,Interrupt Set Enable Register" hexmask.long 0x1C 0.--31. 1. "SETENA,SETENA" line.long 0x20 "ISER8,Interrupt Set Enable Register" hexmask.long 0x20 0.--31. 1. "SETENA,SETENA" line.long 0x24 "ISER9,Interrupt Set Enable Register" hexmask.long 0x24 0.--31. 1. "SETENA,SETENA" line.long 0x28 "ISER10,Interrupt Set Enable Register" hexmask.long 0x28 0.--31. 1. "SETENA,SETENA" line.long 0x2C "ISER11,Interrupt Set Enable Register" hexmask.long 0x2C 0.--31. 1. "SETENA,SETENA" line.long 0x30 "ISER12,Interrupt Set Enable Register" hexmask.long 0x30 0.--31. 1. "SETENA,SETENA" line.long 0x34 "ISER13,Interrupt Set Enable Register" hexmask.long 0x34 0.--31. 1. "SETENA,SETENA" line.long 0x38 "ISER14,Interrupt Set Enable Register" hexmask.long 0x38 0.--31. 1. "SETENA,SETENA" line.long 0x3C "ISER15,Interrupt Set Enable Register" hexmask.long 0x3C 0.--31. 1. "SETENA,SETENA" group.long 0x80++0x7 line.long 0x0 "ICER0,Interrupt Clear Enable" hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA" line.long 0x4 "ICER1,Interrupt Clear Enable" hexmask.long 0x4 0.--31. 1. "CLRENA,CLRENA" group.long 0x8C++0x37 line.long 0x0 "ICER2,Interrupt Clear Enable" hexmask.long 0x0 0.--31. 1. "CLRENA,CLRENA" line.long 0x4 "ICER3,Interrupt Clear Enable" hexmask.long 0x4 0.--31. 1. "CLRENA,CLRENA" line.long 0x8 "ICER4,Interrupt Clear Enable" hexmask.long 0x8 0.--31. 1. "CLRENA,CLRENA" line.long 0xC "ICER5,Interrupt Clear Enable" hexmask.long 0xC 0.--31. 1. "CLRENA,CLRENA" line.long 0x10 "ICER6,Interrupt Clear Enable" hexmask.long 0x10 0.--31. 1. "CLRENA,CLRENA" line.long 0x14 "ICER7,Interrupt Clear Enable" hexmask.long 0x14 0.--31. 1. "CLRENA,CLRENA" line.long 0x18 "ICER8,Interrupt Clear Enable" hexmask.long 0x18 0.--31. 1. "CLRENA,CLRENA" line.long 0x1C "ICER9,Interrupt Clear Enable" hexmask.long 0x1C 0.--31. 1. "CLRENA,CLRENA" line.long 0x20 "ICER10,Interrupt Clear Enable" hexmask.long 0x20 0.--31. 1. "CLRENA,CLRENA" line.long 0x24 "ICER11,Interrupt Clear Enable" hexmask.long 0x24 0.--31. 1. "CLRENA,CLRENA" line.long 0x28 "ICER12,Interrupt Clear Enable" hexmask.long 0x28 0.--31. 1. "CLRENA,CLRENA" line.long 0x2C "ICER13,Interrupt Clear Enable" hexmask.long 0x2C 0.--31. 1. "CLRENA,CLRENA" line.long 0x30 "ICER14,Interrupt Clear Enable" hexmask.long 0x30 0.--31. 1. "CLRENA,CLRENA" line.long 0x34 "ICER15,Interrupt Clear Enable" hexmask.long 0x34 0.--31. 1. "CLRENA,CLRENA" group.long 0x100++0x3F line.long 0x0 "ISPR0,Interrupt Set-Pending Register" hexmask.long 0x0 0.--31. 1. "SETPEND,SETPEND" line.long 0x4 "ISPR1,Interrupt Set-Pending Register" hexmask.long 0x4 0.--31. 1. "SETPEND,SETPEND" line.long 0x8 "ISPR2,Interrupt Set-Pending Register" hexmask.long 0x8 0.--31. 1. "SETPEND,SETPEND" line.long 0xC "ISPR3,Interrupt Set-Pending Register" hexmask.long 0xC 0.--31. 1. "SETPEND,SETPEND" line.long 0x10 "ISPR4,Interrupt Set-Pending Register" hexmask.long 0x10 0.--31. 1. "SETPEND,SETPEND" line.long 0x14 "ISPR5,Interrupt Set-Pending Register" hexmask.long 0x14 0.--31. 1. "SETPEND,SETPEND" line.long 0x18 "ISPR6,Interrupt Set-Pending Register" hexmask.long 0x18 0.--31. 1. "SETPEND,SETPEND" line.long 0x1C "ISPR7,Interrupt Set-Pending Register" hexmask.long 0x1C 0.--31. 1. "SETPEND,SETPEND" line.long 0x20 "ISPR8,Interrupt Set-Pending Register" hexmask.long 0x20 0.--31. 1. "SETPEND,SETPEND" line.long 0x24 "ISPR9,Interrupt Set-Pending Register" hexmask.long 0x24 0.--31. 1. "SETPEND,SETPEND" line.long 0x28 "ISPR10,Interrupt Set-Pending Register" hexmask.long 0x28 0.--31. 1. "SETPEND,SETPEND" line.long 0x2C "ISPR11,Interrupt Set-Pending Register" hexmask.long 0x2C 0.--31. 1. "SETPEND,SETPEND" line.long 0x30 "ISPR12,Interrupt Set-Pending Register" hexmask.long 0x30 0.--31. 1. "SETPEND,SETPEND" line.long 0x34 "ISPR13,Interrupt Set-Pending Register" hexmask.long 0x34 0.--31. 1. "SETPEND,SETPEND" line.long 0x38 "ISPR14,Interrupt Set-Pending Register" hexmask.long 0x38 0.--31. 1. "SETPEND,SETPEND" line.long 0x3C "ISPR15,Interrupt Set-Pending Register" hexmask.long 0x3C 0.--31. 1. "SETPEND,SETPEND" group.long 0x180++0x3F line.long 0x0 "ICPR0,Interrupt Clear-Pending" hexmask.long 0x0 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x4 "ICPR1,Interrupt Clear-Pending" hexmask.long 0x4 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x8 "ICPR2,Interrupt Clear-Pending" hexmask.long 0x8 0.--31. 1. "CLRPEND,CLRPEND" line.long 0xC "ICPR3,Interrupt Clear-Pending" hexmask.long 0xC 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x10 "ICPR4,Interrupt Clear-Pending" hexmask.long 0x10 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x14 "ICPR5,Interrupt Clear-Pending" hexmask.long 0x14 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x18 "ICPR6,Interrupt Clear-Pending" hexmask.long 0x18 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x1C "ICPR7,Interrupt Clear-Pending" hexmask.long 0x1C 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x20 "ICPR8,Interrupt Clear-Pending" hexmask.long 0x20 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x24 "ICPR9,Interrupt Clear-Pending" hexmask.long 0x24 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x28 "ICPR10,Interrupt Clear-Pending" hexmask.long 0x28 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x2C "ICPR11,Interrupt Clear-Pending" hexmask.long 0x2C 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x30 "ICPR12,Interrupt Clear-Pending" hexmask.long 0x30 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x34 "ICPR13,Interrupt Clear-Pending" hexmask.long 0x34 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x38 "ICPR14,Interrupt Clear-Pending" hexmask.long 0x38 0.--31. 1. "CLRPEND,CLRPEND" line.long 0x3C "ICPR15,Interrupt Clear-Pending" hexmask.long 0x3C 0.--31. 1. "CLRPEND,CLRPEND" group.long 0x200++0x3F line.long 0x0 "IABR0,Interrupt Active bit" hexmask.long 0x0 0.--31. 1. "IABR,IABR" line.long 0x4 "IABR1,Interrupt Active bit" hexmask.long 0x4 0.--31. 1. "IABR,IABR" line.long 0x8 "IABR2,Interrupt Active bit" hexmask.long 0x8 0.--31. 1. "IABR,IABR" line.long 0xC "IABR3,Interrupt Active bit" hexmask.long 0xC 0.--31. 1. "IABR,IABR" line.long 0x10 "IABR4,Interrupt Active bit" hexmask.long 0x10 0.--31. 1. "IABR,IABR" line.long 0x14 "IABR5,Interrupt Active bit" hexmask.long 0x14 0.--31. 1. "IABR,IABR" line.long 0x18 "IABR6,Interrupt Active bit" hexmask.long 0x18 0.--31. 1. "IABR,IABR" line.long 0x1C "IABR7,Interrupt Active bit" hexmask.long 0x1C 0.--31. 1. "IABR,IABR" line.long 0x20 "IABR8,Interrupt Active bit" hexmask.long 0x20 0.--31. 1. "IABR,IABR" line.long 0x24 "IABR9,Interrupt Active bit" hexmask.long 0x24 0.--31. 1. "IABR,IABR" line.long 0x28 "IABR10,Interrupt Active bit" hexmask.long 0x28 0.--31. 1. "IABR,IABR" line.long 0x2C "IABR11,Interrupt Active bit" hexmask.long 0x2C 0.--31. 1. "IABR,IABR" line.long 0x30 "IABR12,Interrupt Active bit" hexmask.long 0x30 0.--31. 1. "IABR,IABR" line.long 0x34 "IABR13,Interrupt Active bit" hexmask.long 0x34 0.--31. 1. "IABR,IABR" line.long 0x38 "IABR14,Interrupt Active bit" hexmask.long 0x38 0.--31. 1. "IABR,IABR" line.long 0x3C "IABR15,Interrupt Active bit" hexmask.long 0x3C 0.--31. 1. "IABR,IABR" group.long 0x280++0x3F line.long 0x0 "ITNS0,Interrupt Active bit" hexmask.long 0x0 0.--31. 1. "ITNS,ITNS" line.long 0x4 "ITNS1,Interrupt Active bit" hexmask.long 0x4 0.--31. 1. "ITNS,ITNS" line.long 0x8 "ITNS2,Interrupt Active bit" hexmask.long 0x8 0.--31. 1. "ITNS,ITNS" line.long 0xC "ITNS3,Interrupt Active bit" hexmask.long 0xC 0.--31. 1. "ITNS,ITNS" line.long 0x10 "ITNS4,Interrupt Active bit" hexmask.long 0x10 0.--31. 1. "ITNS,ITNS" line.long 0x14 "ITNS5,Interrupt Active bit" hexmask.long 0x14 0.--31. 1. "ITNS,ITNS" line.long 0x18 "ITNS6,Interrupt Active bit" hexmask.long 0x18 0.--31. 1. "ITNS,ITNS" line.long 0x1C "ITNS7,Interrupt Active bit" hexmask.long 0x1C 0.--31. 1. "ITNS,ITNS" line.long 0x20 "ITNS8,Interrupt Active bit" hexmask.long 0x20 0.--31. 1. "ITNS,ITNS" line.long 0x24 "ITNS9,Interrupt Active bit" hexmask.long 0x24 0.--31. 1. "ITNS,ITNS" line.long 0x28 "ITNS10,Interrupt Active bit" hexmask.long 0x28 0.--31. 1. "ITNS,ITNS" line.long 0x2C "ITNS11,Interrupt Active bit" hexmask.long 0x2C 0.--31. 1. "ITNS,ITNS" line.long 0x30 "ITNS12,Interrupt Active bit" hexmask.long 0x30 0.--31. 1. "ITNS,ITNS" line.long 0x34 "ITNS13,Interrupt Active bit" hexmask.long 0x34 0.--31. 1. "ITNS,ITNS" line.long 0x38 "ITNS14,Interrupt Active bit" hexmask.long 0x38 0.--31. 1. "ITNS,ITNS" line.long 0x3C "ITNS15,Interrupt Active bit" hexmask.long 0x3C 0.--31. 1. "ITNS,ITNS" group.byte 0x300++0x1F line.byte 0x0 "IPR0,Interrupt Priority Register 0" hexmask.byte 0x0 0.--7. 1. "PRI_00,PRI_00" line.byte 0x1 "IPR1,Interrupt Priority Register 1" hexmask.byte 0x1 0.--7. 1. "PRI_01,PRI_01" line.byte 0x2 "IPR2,Interrupt Priority Register 2" hexmask.byte 0x2 0.--7. 1. "PRI_02,PRI_02" line.byte 0x3 "IPR3,Interrupt Priority Register 3" hexmask.byte 0x3 0.--7. 1. "PRI_03,PRI_03" line.byte 0x4 "IPR4,Interrupt Priority Register 4" hexmask.byte 0x4 0.--7. 1. "PRI_04,PRI_04" line.byte 0x5 "IPR5,Interrupt Priority Register 5" hexmask.byte 0x5 0.--7. 1. "PRI_05,PRI_05" line.byte 0x6 "IPR6,Interrupt Priority Register 6" hexmask.byte 0x6 0.--7. 1. "PRI_06,PRI_06" line.byte 0x7 "IPR7,Interrupt Priority Register 7" hexmask.byte 0x7 0.--7. 1. "PRI_07,PRI_07" line.byte 0x8 "IPR8,Interrupt Priority Register 8" hexmask.byte 0x8 0.--7. 1. "PRI_08,PRI_08" line.byte 0x9 "IPR9,Interrupt Priority Register 9" hexmask.byte 0x9 0.--7. 1. "PRI_09,PRI_09" line.byte 0xA "IPR10,Interrupt Priority Register 10" hexmask.byte 0xA 0.--7. 1. "PRI_10,PRI_10" line.byte 0xB "IPR11,Interrupt Priority Register 11" hexmask.byte 0xB 0.--7. 1. "PRI_11,PRI_11" line.byte 0xC "IPR12,Interrupt Priority Register 12" hexmask.byte 0xC 0.--7. 1. "PRI_12,PRI_12" line.byte 0xD "IPR13,Interrupt Priority Register 13" hexmask.byte 0xD 0.--7. 1. "PRI_13,PRI_13" line.byte 0xE "IPR14,Interrupt Priority Register 14" hexmask.byte 0xE 0.--7. 1. "PRI_14,PRI_14" line.byte 0xF "IPR15,Interrupt Priority Register 15" hexmask.byte 0xF 0.--7. 1. "PRI_15,PRI_15" line.byte 0x10 "IPR16,Interrupt Priority Register 16" hexmask.byte 0x10 0.--7. 1. "PRI_16,PRI_16" line.byte 0x11 "IPR17,Interrupt Priority Register 17" hexmask.byte 0x11 0.--7. 1. "PRI_17,PRI_17" line.byte 0x12 "IPR18,Interrupt Priority Register 18" hexmask.byte 0x12 0.--7. 1. "PRI_18,PRI_18" line.byte 0x13 "IPR19,Interrupt Priority Register 19" hexmask.byte 0x13 0.--7. 1. "PRI_19,PRI_19" line.byte 0x14 "IPR20,Interrupt Priority Register 20" hexmask.byte 0x14 0.--7. 1. "PRI_20,PRI_20" line.byte 0x15 "IPR21,Interrupt Priority Register 21" hexmask.byte 0x15 0.--7. 1. "PRI_21,PRI_21" line.byte 0x16 "IPR22,Interrupt Priority Register 22" hexmask.byte 0x16 0.--7. 1. "PRI_22,PRI_22" line.byte 0x17 "IPR23,Interrupt Priority Register 23" hexmask.byte 0x17 0.--7. 1. "PRI_23,PRI_23" line.byte 0x18 "IPR24,Interrupt Priority Register 24" hexmask.byte 0x18 0.--7. 1. "PRI_24,PRI_24" line.byte 0x19 "IPR25,Interrupt Priority Register 25" hexmask.byte 0x19 0.--7. 1. "PRI_25,PRI_25" line.byte 0x1A "IPR26,Interrupt Priority Register 26" hexmask.byte 0x1A 0.--7. 1. "PRI_26,PRI_26" line.byte 0x1B "IPR27,Interrupt Priority Register 27" hexmask.byte 0x1B 0.--7. 1. "PRI_27,PRI_27" line.byte 0x1C "IPR28,Interrupt Priority Register 28" hexmask.byte 0x1C 0.--7. 1. "PRI_28,PRI_28" line.byte 0x1D "IPR29,Interrupt Priority Register 29" hexmask.byte 0x1D 0.--7. 1. "PRI_29,PRI_29" line.byte 0x1E "IPR30,Interrupt Priority Register 30" hexmask.byte 0x1E 0.--7. 1. "PRI_30,PRI_30" line.byte 0x1F "IPR31,Interrupt Priority Register 31" hexmask.byte 0x1F 0.--7. 1. "PRI_31,PRI_31" tree.end tree "PMU (Power Management Unit)" base ad:0x40007000 group.long 0x0++0x7 line.long 0x0 "CTL,power control register" bitfld.long 0x0 21. "SRAMSW2,SRAM2(32KB~48KB) power switch in deep-sleep mode" "0,1" bitfld.long 0x0 20. "SRAMSW1,SRAM1(16KB~32KB) power switch in deep-sleep mode" "0,1" bitfld.long 0x0 18. "LDEN,Low-driver mode enable in Deep-sleep mode" "0,1" bitfld.long 0x0 15. "OVDT,Over Voltage Detector Threshold" "0,1" bitfld.long 0x0 14. "OVDEN,Over Voltage Detector Enable" "0,1" bitfld.long 0x0 8. "BKPWEN,Backup Domain Write Enable" "0,1" bitfld.long 0x0 5.--7. "LVDT,Low Voltage Detector Threshold" "0,1,2,3,4,5,6,7" bitfld.long 0x0 4. "LVDEN,Low Voltage Detector Enable" "0,1" bitfld.long 0x0 3. "STBRST,Standby Flag Reset" "0,1" bitfld.long 0x0 2. "WURST,Wakeup Flag Reset" "0,1" bitfld.long 0x0 1. "STBMOD,Standby Mode" "0,1" bitfld.long 0x0 0. "LDOLP,LDO Low Power Mode" "0,1" line.long 0x4 "CS,power control/status register" bitfld.long 0x4 9. "WUPEN1,WKUP pin1 Enable" "0,1" bitfld.long 0x4 8. "WUPEN0,WKUP pin0 Enable" "0,1" rbitfld.long 0x4 3. "OVDF,Low Voltage Detector Status Flag" "0,1" rbitfld.long 0x4 2. "LVDF,Low Voltage Detector Status Flag" "0,1" rbitfld.long 0x4 1. "STBF,Standby flag" "0,1" rbitfld.long 0x4 0. "WUF,Wakeup flag" "0,1" tree.end tree "RCU (Reset and Clock Unit)" base ad:0x40021000 group.long 0x0++0x33 line.long 0x0 "CTL,Control register" rbitfld.long 0x0 25. "PLLSTB,PLL Clock Stabilization Flag" "0,1" bitfld.long 0x0 24. "PLLEN,PLL enable" "0,1" bitfld.long 0x0 22. "HXTALSCAL,HXTAL frequency scale select" "0,1" bitfld.long 0x0 21. "LCKMEN,LXTAL clock monitor enable" "0,1" bitfld.long 0x0 20. "PLLMEN,PLL clock monitor enable" "0,1" bitfld.long 0x0 19. "CKMEN,HXTAL Clock Monitor Enable" "0,1" bitfld.long 0x0 18. "HXTALBPS,External crystal oscillator (HXTAL) clock bypass mode enable" "0,1" rbitfld.long 0x0 17. "HXTALSTB,External crystal oscillator (HXTAL) clock stabilization flag" "0,1" newline bitfld.long 0x0 16. "HXTALEN,External High Speed oscillator Enable" "0,1" hexmask.long.byte 0x0 8.--15. 1. "IRC8MCALIB,High Speed Internal Oscillator calibration value register" hexmask.long.byte 0x0 3.--7. 1. "IRC8MADJ,High Speed Internal Oscillator clock trim adjust value" rbitfld.long 0x0 1. "IRC8MSTB,IRC8M High Speed Internal Oscillator stabilization Flag" "0,1" bitfld.long 0x0 0. "IRC8MEN,Internal High Speed oscillator Enable" "0,1" line.long 0x4 "CFG0,Clock configuration register 0" bitfld.long 0x4 31. "PLLDV,The CK_PLL divide by 1 or 2 for CK_OUT" "0,1" bitfld.long 0x4 28.--30. "CKOUTDIV,The CK_OUT divider which the CK_OUT frequency can be reduced" "0,1,2,3,4,5,6,7" bitfld.long 0x4 24.--26. "CKOUTSEL,CK_OUT Clock Source Selection" "0,1,2,3,4,5,6,7" hexmask.long.byte 0x4 18.--21. 1. "PLLMF,PLL multiply factor" bitfld.long 0x4 17. "DPLL,Double PLL clock." "0,1" bitfld.long 0x4 16. "PLLSEL,PLL Clock Source Selection" "0,1" bitfld.long 0x4 11.--13. "APB2PSC,APB2 prescaler selection" "0,1,2,3,4,5,6,7" bitfld.long 0x4 8.--10. "APB1PSC,APB1 prescaler selection" "0,1,2,3,4,5,6,7" newline hexmask.long.byte 0x4 4.--7. 1. "AHBPSC,AHB prescaler selection" rbitfld.long 0x4 2.--3. "SCSS,System clock switch status" "0,1,2,3" bitfld.long 0x4 0.--1. "SCS,System clock switch" "0,1,2,3" line.long 0x8 "INT,Clock interrupt register" bitfld.long 0x8 23. "CKMIC,HXTAL Clock Stuck Interrupt Clear" "0,1" bitfld.long 0x8 22. "PLLMIC,PLL clock monitor interrupt clear" "0,1" bitfld.long 0x8 21. "LCKMIC,LXTAL clock monitor interrupt clear" "0,1" bitfld.long 0x8 20. "PLLSTBIC,PLL stabilization Interrupt Clear" "0,1" bitfld.long 0x8 19. "HXTALSTBIC,HXTAL Stabilization Interrupt Clear" "0,1" bitfld.long 0x8 18. "IRC8MSTBIC,IRC8M Stabilization Interrupt Clear" "0,1" bitfld.long 0x8 17. "LXTALSTBIC,LXTAL Stabilization Interrupt Clear" "0,1" bitfld.long 0x8 16. "IRC40KSTBIC,IRC40K Stabilization Interrupt Clear" "0,1" newline bitfld.long 0x8 14. "PLLMIE,PLL clock monitor interrupt enable" "0,1" bitfld.long 0x8 13. "LCKMIE,LXTAL clock monitor interrupt enable" "0,1" bitfld.long 0x8 12. "PLLSTBIE,PLL Stabilization Interrupt Enable" "0,1" bitfld.long 0x8 11. "HXTALSTBIE,HXTAL Stabilization Interrupt Enable" "0,1" bitfld.long 0x8 10. "IRC8MSTBIE,IRC8M Stabilization Interrupt Enable" "0,1" bitfld.long 0x8 9. "LXTALSTBIE,LXTAL Stabilization Interrupt Enable" "0,1" bitfld.long 0x8 8. "IRC40KSTBIE,IRC40K Stabilization interrupt enable" "0,1" rbitfld.long 0x8 7. "CKMIF,HXTAL Clock Stuck Interrupt Flag" "0,1" newline rbitfld.long 0x8 6. "PLLMIF,PLL clock monitor interrupt flag" "0,1" rbitfld.long 0x8 5. "LCKMIF,LXTAL clock monitor interrupt flag" "0,1" rbitfld.long 0x8 4. "PLLSTBIF,PLL stabilization interrupt flag" "0,1" rbitfld.long 0x8 3. "HXTALSTBIF,HXTAL stabilization interrupt flag" "0,1" rbitfld.long 0x8 2. "IRC8MSTBIF,IRC8M stabilization interrupt flag" "0,1" rbitfld.long 0x8 1. "LXTALSTBIF,LXTAL stabilization interrupt flag" "0,1" rbitfld.long 0x8 0. "IRC40KSTBIF,IRC40K stabilization interrupt flag" "0,1" line.long 0xC "APB2RST,APB2 reset register" bitfld.long 0xC 31. "CAN1RST,CAN1 reset" "0,1" bitfld.long 0xC 30. "CAN0RST,CAN0 reset" "0,1" bitfld.long 0xC 21. "TIMER20RST,TIMER20 reset" "0,1" bitfld.long 0xC 20. "TIMER19RST,TIMER19 reset" "0,1" bitfld.long 0xC 14. "USART0RST,USART0 Reset" "0,1" bitfld.long 0xC 13. "TIMER7RST,TIMER7 reset" "0,1" bitfld.long 0xC 12. "SPI0RST,SPI0 Reset" "0,1" bitfld.long 0xC 11. "TIMER0RST,TIMER0 reset" "0,1" newline bitfld.long 0xC 10. "ADC1RST,ADC1 reset" "0,1" bitfld.long 0xC 9. "ADC0RST,ADC0 reset" "0,1" bitfld.long 0xC 1. "CMPRST,Comparator reset" "0,1" bitfld.long 0xC 0. "CFGRST,System configuration reset" "0,1" line.long 0x10 "APB1RST,APB1 reset register" bitfld.long 0x10 29. "DACRST,DAC reset" "0,1" bitfld.long 0x10 28. "PMURST,Power control reset" "0,1" bitfld.long 0x10 27. "BKPRST,Back-up control reset" "0,1" bitfld.long 0x10 22. "I2C1RST,I2C1 reset" "0,1" bitfld.long 0x10 21. "I2C0RST,I2C0 reset" "0,1" bitfld.long 0x10 18. "USART2RST,USART2 reset" "0,1" bitfld.long 0x10 17. "USART1RST,USART1 reset" "0,1" bitfld.long 0x10 14. "SPI1RST,SPI1 reset" "0,1" newline bitfld.long 0x10 11. "WWDGTRST,Window watchdog timer reset" "0,1" bitfld.long 0x10 5. "TIMER6RST,TIMER6 timer reset" "0,1" bitfld.long 0x10 4. "TIMER5RST,TIMER5 timer reset" "0,1" bitfld.long 0x10 0. "TIMER1RST,TIMER1 timer reset" "0,1" line.long 0x14 "AHBEN,AHB enable register" bitfld.long 0x14 22. "PFEN,GPIO port F clock enable" "0,1" bitfld.long 0x14 21. "PEEN,GPIO port E clock enable" "0,1" bitfld.long 0x14 20. "PDEN,GPIO port D clock enable" "0,1" bitfld.long 0x14 19. "PCEN,GPIO port C clock enable" "0,1" bitfld.long 0x14 18. "PBEN,GPIO port B clock enable" "0,1" bitfld.long 0x14 17. "PAEN,GPIO port A clock enable" "0,1" bitfld.long 0x14 14. "MFCOMEN,MFCOM port A clock enable" "0,1" bitfld.long 0x14 6. "CRCEN,CRC clock enable" "0,1" newline bitfld.long 0x14 4. "FMCSPEN,FMC clock during sleep mode enable" "0,1" bitfld.long 0x14 3. "DMAMUXEN,DMAMUX clock enable" "0,1" bitfld.long 0x14 2. "SRAMSPEN,SRAM interface clock enable" "0,1" bitfld.long 0x14 1. "DMA1EN,DMA1 clock enable" "0,1" bitfld.long 0x14 0. "DMA0EN,DMA0 clock enable" "0,1" line.long 0x18 "APB2EN,APB2 enable register" bitfld.long 0x18 31. "CAN1EN,CAN1 clock enable" "0,1" bitfld.long 0x18 30. "CAN0EN,CAN0 clock enable" "0,1" bitfld.long 0x18 29. "TRIGSELEN,TRIGSEL clock enable" "0,1" bitfld.long 0x18 21. "TIMER20EN,TIMER20 timer clock enable" "0,1" bitfld.long 0x18 20. "TIMER19EN,TIMER19 timer clock enable" "0,1" bitfld.long 0x18 14. "USART0EN,USART0 clock enable" "0,1" bitfld.long 0x18 13. "TIMER7EN,TIMER7 timer clock enable" "0,1" bitfld.long 0x18 12. "SPI0EN,SPI0 clock enable" "0,1" newline bitfld.long 0x18 11. "TIMER0EN,TIMER0 timer clock enable" "0,1" bitfld.long 0x18 10. "ADC1EN,ADC1 interface clock enable" "0,1" bitfld.long 0x18 9. "ADC0EN,ADC0 interface clock enable" "0,1" bitfld.long 0x18 1. "CMPEN,Comparator clock enable" "0,1" bitfld.long 0x18 0. "CFGEN,System configuration clock enable" "0,1" line.long 0x1C "APB1EN,APB1 enable register" bitfld.long 0x1C 29. "DACEN,DAC clock enable" "0,1" bitfld.long 0x1C 28. "PMUEN,Power interface clock enable" "0,1" bitfld.long 0x1C 27. "BKPEN,Back-up interface clock enable" "0,1" bitfld.long 0x1C 22. "I2C1EN,I2C1 clock enable" "0,1" bitfld.long 0x1C 21. "I2C0EN,I2C0 clock enable" "0,1" bitfld.long 0x1C 18. "USART2EN,USART2 clock enable" "0,1" bitfld.long 0x1C 17. "USART1EN,USART1 clock enable" "0,1" bitfld.long 0x1C 14. "SPI1EN,SPI1 clock enable" "0,1" newline bitfld.long 0x1C 11. "WWDGTEN,Window watchdog timer clock enable" "0,1" bitfld.long 0x1C 5. "TIMER6EN,TIMER6 timer clock enable" "0,1" bitfld.long 0x1C 4. "TIMER5EN,TIMER5 timer clock enable" "0,1" bitfld.long 0x1C 0. "TIMER1EN,TIMER1 timer clock enable" "0,1" line.long 0x20 "BDCTL,Backup domain control register" bitfld.long 0x20 16. "BKPRST,Backup domain reset" "0,1" bitfld.long 0x20 15. "RTCEN,RTC clock enable" "0,1" bitfld.long 0x20 8.--9. "RTCSRC,RTC clock entry selection" "0,1,2,3" bitfld.long 0x20 3.--4. "LXTALDRI,LXTAL drive capability" "0,1,2,3" bitfld.long 0x20 2. "LXTALBPS,LXTAL bypass mode enable" "0,1" rbitfld.long 0x20 1. "LXTALSTB,External low-speed oscillator stabilization" "0,1" bitfld.long 0x20 0. "LXTALEN,LXTAL enable" "0,1" line.long 0x24 "RSTSCK,Reset source /clock register" bitfld.long 0x24 31. "LPRSTF,Low-power reset flag" "0,1" bitfld.long 0x24 30. "WWDGTRSTF,Window watchdog timer reset flag" "0,1" bitfld.long 0x24 29. "FWDGTRSTF,Free Watchdog timer reset flag" "0,1" bitfld.long 0x24 28. "SWRSTF,Software reset flag" "0,1" bitfld.long 0x24 27. "PORRSTF,Power reset flag" "0,1" bitfld.long 0x24 26. "EPRSTF,External PIN reset flag" "0,1" bitfld.long 0x24 25. "OBLRSTF,Option byte loader reset flag" "0,1" bitfld.long 0x24 24. "RSTFC,Reset flag clear" "0,1" newline bitfld.long 0x24 23. "V11RSTF,V11 domain Power reset flag" "0,1" bitfld.long 0x24 22. "LOPRSTF,Lost of PLL Error reset flag" "0,1" bitfld.long 0x24 21. "LOHRSTF,Lost of HXTAL Error reset flag" "0,1" bitfld.long 0x24 20. "ECCRSTF,Two bit ECC Error reset flag" "0,1" rbitfld.long 0x24 19. "LVDRSTF,Low Voltage Detect Error reset flag" "0,1" rbitfld.long 0x24 18. "LOCKUPRSTF,CPU LOCK UP Error reset flag" "0,1" rbitfld.long 0x24 17. "BORRSTF,BOR reset flag" "0,1" bitfld.long 0x24 14. "LOPRSTEN,Lost of PLL reset enable" "0,1" newline bitfld.long 0x24 13. "LOHRSTEN,Lost of HXTAL reset enable" "0,1" bitfld.long 0x24 12. "ECCRSTEN,ECC 2 bits error reset enable" "0,1" bitfld.long 0x24 11. "LVDRSTEN,Low voltage detection reset enable" "0,1" bitfld.long 0x24 10. "LOCKUPRSTEN,CPU Lock-Up reset enable" "0,1" rbitfld.long 0x24 1. "IRC40KSTB,IRC40K stabilization" "0,1" bitfld.long 0x24 0. "IRC40KEN,IRC40K enable" "0,1" line.long 0x28 "AHBRST,AHB reset register" bitfld.long 0x28 22. "PFRST,GPIO port F reset" "0,1" bitfld.long 0x28 21. "PERST,GPIO port E reset" "0,1" bitfld.long 0x28 20. "PDRST,GPIO port D reset" "0,1" bitfld.long 0x28 19. "PCRST,GPIO port C reset" "0,1" bitfld.long 0x28 18. "PBRST,GPIO port B reset" "0,1" bitfld.long 0x28 17. "PARST,GPIO port A reset" "0,1" bitfld.long 0x28 14. "MFCOMRST,MFCOM reset" "0,1" bitfld.long 0x28 6. "CRCRST,CRC reset" "0,1" newline bitfld.long 0x28 3. "DMAMUXRST,DMAMUX reset" "0,1" bitfld.long 0x28 1. "DMA1RST,DMA1 reset" "0,1" bitfld.long 0x28 0. "DMA0RST,DMA0 reset" "0,1" line.long 0x2C "CFG1,Configuration register 1" hexmask.long.byte 0x2C 0.--3. 1. "PREDV,CK_HXTAL divider previous PLL" line.long 0x30 "CFG2,Configuration register 2" hexmask.long.byte 0x30 27.--31. 1. "ADCPSC,ADC clock prescaler selection" bitfld.long 0x30 14.--15. "CAN1SEL,CK_CAN1 clock source selection" "0,1,2,3" bitfld.long 0x30 12.--13. "CAN0SEL,CK_CAN0 clock source selection" "0,1,2,3" bitfld.long 0x30 6.--7. "USART2SEL,CK_USART2 clock source selection" "0,1,2,3" bitfld.long 0x30 4.--5. "USART1SEL,CK_USART1 clock source selection" "0,1,2,3" bitfld.long 0x30 0.--1. "USART0SEL,CK_USART0 clock source selection" "0,1,2,3" wgroup.long 0x100++0x3 line.long 0x0 "VKEY,Voltage key register" hexmask.long 0x0 0.--31. 1. "KEY,The key of RCU_DSV register" group.long 0x134++0x3 line.long 0x0 "DSV,Deep-sleep mode voltage register" bitfld.long 0x0 0.--1. "DSLPVS,Deep-sleep mode voltage select" "0,1,2,3" tree.end tree "RTC (Real-Time Clock)" base ad:0x40002800 group.long 0x0++0x7 line.long 0x0 "INTEN,RTC interrupt enable register" bitfld.long 0x0 2. "OVIE,Overflow interrupt enable" "0,1" bitfld.long 0x0 1. "ALRMIE,Alarm interrupt enable" "0,1" bitfld.long 0x0 0. "SCIE,Second interrupt" "0,1" line.long 0x4 "CTL,control register" rbitfld.long 0x4 5. "LWOFF,Last write operation finished flag" "0,1" bitfld.long 0x4 4. "CMF,Configuration mode flag" "0,1" bitfld.long 0x4 3. "RSYNF,Registers synchronized flag" "0,1" bitfld.long 0x4 2. "OVIF,Overflow interrupt flag" "0,1" bitfld.long 0x4 1. "ALRMIF,Alarm interrupt flag" "0,1" bitfld.long 0x4 0. "SCIF,Sencond interrupt flag" "0,1" wgroup.long 0x8++0x7 line.long 0x0 "PSCH,RTC prescaler high register" hexmask.long.byte 0x0 0.--3. 1. "PSC,RTC prescaler value high" line.long 0x4 "PSCL,RTC prescaler low" hexmask.long.word 0x4 0.--15. 1. "PSC,RTC prescaler value low" rgroup.long 0x10++0x7 line.long 0x0 "DIVH,RTC divider high register" hexmask.long.byte 0x0 0.--3. 1. "DIV,RTC divider value high" line.long 0x4 "DIVL,RTC divider low register" hexmask.long.word 0x4 0.--15. 1. "DIV,RTC divider value low" group.long 0x18++0x7 line.long 0x0 "CNTH,RTC counter high register" hexmask.long.word 0x0 0.--15. 1. "CNT,RTC counter value high" line.long 0x4 "CNTL,RTC counter low register" hexmask.long.word 0x4 0.--15. 1. "CNT,RTC conuter value low" wgroup.long 0x20++0x7 line.long 0x0 "ALRMH,Alarm high register" hexmask.long.word 0x0 0.--15. 1. "ALRM,Alarm value high" line.long 0x4 "ALRML,RTC alarm low register" hexmask.long.word 0x4 0.--15. 1. "ALRM,alarm value low" tree.end tree "SPI (Serial Peripheral Interface)" base ad:0x0 tree "SPI0" base ad:0x40013000 group.long 0x0++0x13 line.long 0x0 "CTL0,control register 0" bitfld.long 0x0 15. "BDEN,Bidirectional" "0,1" bitfld.long 0x0 14. "BDOEN,Bidirectional Transmit output enable" "0,1" bitfld.long 0x0 13. "CRCEN,CRC Calculation Enable" "0,1" bitfld.long 0x0 12. "CRCNT,CRC Next Transfer" "0,1" bitfld.long 0x0 11. "FF16,Data frame format" "0,1" bitfld.long 0x0 10. "RO,Receive only" "0,1" bitfld.long 0x0 9. "SWNSSEN,NSS Software Mode Selection" "0,1" bitfld.long 0x0 8. "SWNSS,NSS Pin Selection In NSS Software Mode" "0,1" bitfld.long 0x0 7. "LF,LSB First Mode" "0,1" bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1" newline bitfld.long 0x0 3.--5. "PSC,Master Clock Prescaler Selection" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "MSTMOD,Master Mode Enable" "0,1" bitfld.long 0x0 1. "CKPL,Clock polarity Selection" "0,1" bitfld.long 0x0 0. "CKPH,Clock Phase Selection" "0,1" line.long 0x4 "CTL1,control register 1" bitfld.long 0x4 7. "TBEIE,Tx buffer empty interrupt" "0,1" bitfld.long 0x4 6. "RBNEIE,RX buffer not empty interrupt" "0,1" bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0,1" bitfld.long 0x4 4. "TMOD,SPI TI Mode Enable" "0,1" bitfld.long 0x4 3. "NSSP,SPI NSS pulse mode Enable" "0,1" bitfld.long 0x4 2. "NSSDRV,Drive NSS Output" "0,1" bitfld.long 0x4 1. "DMATEN,Transmit Buffer DMA Enable" "0,1" bitfld.long 0x4 0. "DMAREN,Rx buffer DMA enable" "0,1" line.long 0x8 "STAT,status register" bitfld.long 0x8 8. "FERR,Format Error" "0,1" rbitfld.long 0x8 7. "TRANS,Transmitting On-going Bit" "0,1" rbitfld.long 0x8 6. "RXORERR,Reception Overrun Error Bit" "0,1" rbitfld.long 0x8 5. "CONFERR,SPI Configuration error" "0,1" bitfld.long 0x8 4. "CRCERR,SPI CRC Error Bit" "0,1" rbitfld.long 0x8 3. "TXURERR,Transmission underrun error bit" "0,1" rbitfld.long 0x8 2. "I2SCH,I2S channel side" "0,1" rbitfld.long 0x8 1. "TBE,Transmit Buffer Empty" "0,1" rbitfld.long 0x8 0. "RBNE,Receive Buffer Not Empty" "0,1" line.long 0xC "DATA,data register" hexmask.long.word 0xC 0.--15. 1. "SPI_DATA,Data transfer register" line.long 0x10 "CRCPOLY,CRC polynomial register" hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RCRC,RX CRC register" hexmask.long.word 0x0 0.--15. 1. "RCRC,RX CRC register" line.long 0x4 "TCRC,TX CRC register" hexmask.long.word 0x4 0.--15. 1. "TCRC,Tx CRC register" group.long 0x1C++0x7 line.long 0x0 "I2SCTL,I2S control register" bitfld.long 0x0 11. "I2SSEL,I2S mode selection" "0,1" bitfld.long 0x0 10. "I2SEN,I2S Enable" "0,1" bitfld.long 0x0 8.--9. "I2SOPMOD,I2S operation mode" "0,1,2,3" bitfld.long 0x0 7. "PCMSMOD,PCM frame synchronization mode" "0,1" bitfld.long 0x0 4.--5. "I2SSTD,I2S standard selection" "0,1,2,3" bitfld.long 0x0 3. "CKPL,Idle state clock polarity" "0,1" bitfld.long 0x0 1.--2. "DTLEN,Data length" "0,1,2,3" bitfld.long 0x0 0. "CHLEN,Channel length (number of bits per audio" "0,1" line.long 0x4 "I2SPSC,I2S prescaler register" bitfld.long 0x4 9. "MCKOEN,I2S_MCK output enable" "0,1" bitfld.long 0x4 8. "OF,Odd factor for the" "0,1" hexmask.long.byte 0x4 0.--7. 1. "DIV,Dividing factor for the prescaler" group.long 0x80++0x3 line.long 0x0 "QCTL,Quad-SPI mode control register" bitfld.long 0x0 2. "IO23_DRV,Drive IO2 and IO3 enable" "0,1" bitfld.long 0x0 1. "QRD,Quad-SPI mode read select" "0,1" bitfld.long 0x0 0. "QMOD,Quad-SPI mode enable" "0,1" tree.end tree "SPI1" base ad:0x40003800 group.long 0x0++0x13 line.long 0x0 "CTL0,control register 0" bitfld.long 0x0 15. "BDEN,Bidirectional" "0,1" bitfld.long 0x0 14. "BDOEN,Bidirectional Transmit output enable" "0,1" bitfld.long 0x0 13. "CRCEN,CRC Calculation Enable" "0,1" bitfld.long 0x0 12. "CRCNT,CRC Next Transfer" "0,1" bitfld.long 0x0 11. "FF16,Data frame format" "0,1" bitfld.long 0x0 10. "RO,Receive only" "0,1" bitfld.long 0x0 9. "SWNSSEN,NSS Software Mode Selection" "0,1" bitfld.long 0x0 8. "SWNSS,NSS Pin Selection In NSS Software Mode" "0,1" bitfld.long 0x0 7. "LF,LSB First Mode" "0,1" bitfld.long 0x0 6. "SPIEN,SPI enable" "0,1" newline bitfld.long 0x0 3.--5. "PSC,Master Clock Prescaler Selection" "0,1,2,3,4,5,6,7" bitfld.long 0x0 2. "MSTMOD,Master Mode Enable" "0,1" bitfld.long 0x0 1. "CKPL,Clock polarity Selection" "0,1" bitfld.long 0x0 0. "CKPH,Clock Phase Selection" "0,1" line.long 0x4 "CTL1,control register 1" bitfld.long 0x4 7. "TBEIE,Tx buffer empty interrupt" "0,1" bitfld.long 0x4 6. "RBNEIE,RX buffer not empty interrupt" "0,1" bitfld.long 0x4 5. "ERRIE,Error interrupt enable" "0,1" bitfld.long 0x4 4. "TMOD,SPI TI Mode Enable" "0,1" bitfld.long 0x4 3. "NSSP,SPI NSS pulse mode Enable" "0,1" bitfld.long 0x4 2. "NSSDRV,Drive NSS Output" "0,1" bitfld.long 0x4 1. "DMATEN,Transmit Buffer DMA Enable" "0,1" bitfld.long 0x4 0. "DMAREN,Rx buffer DMA enable" "0,1" line.long 0x8 "STAT,status register" bitfld.long 0x8 8. "FERR,Format Error" "0,1" rbitfld.long 0x8 7. "TRANS,Transmitting On-going Bit" "0,1" rbitfld.long 0x8 6. "RXORERR,Reception Overrun Error Bit" "0,1" rbitfld.long 0x8 5. "CONFERR,SPI Configuration error" "0,1" bitfld.long 0x8 4. "CRCERR,SPI CRC Error Bit" "0,1" rbitfld.long 0x8 3. "TXURERR,Transmission underrun error bit" "0,1" rbitfld.long 0x8 2. "I2SCH,I2S channel side" "0,1" rbitfld.long 0x8 1. "TBE,Transmit Buffer Empty" "0,1" rbitfld.long 0x8 0. "RBNE,Receive Buffer Not Empty" "0,1" line.long 0xC "DATA,data register" hexmask.long.word 0xC 0.--15. 1. "SPI_DATA,Data transfer register" line.long 0x10 "CRCPOLY,CRC polynomial register" hexmask.long.word 0x10 0.--15. 1. "CRCPOLY,CRC polynomial register" rgroup.long 0x14++0x7 line.long 0x0 "RCRC,RX CRC register" hexmask.long.word 0x0 0.--15. 1. "RCRC,RX CRC register" line.long 0x4 "TCRC,TX CRC register" hexmask.long.word 0x4 0.--15. 1. "TCRC,Tx CRC register" group.long 0x1C++0x7 line.long 0x0 "I2SCTL,I2S control register" bitfld.long 0x0 11. "I2SSEL,I2S mode selection" "0,1" bitfld.long 0x0 10. "I2SEN,I2S Enable" "0,1" bitfld.long 0x0 8.--9. "I2SOPMOD,I2S operation mode" "0,1,2,3" bitfld.long 0x0 7. "PCMSMOD,PCM frame synchronization mode" "0,1" bitfld.long 0x0 4.--5. "I2SSTD,I2S standard selection" "0,1,2,3" bitfld.long 0x0 3. "CKPL,Idle state clock polarity" "0,1" bitfld.long 0x0 1.--2. "DTLEN,Data length" "0,1,2,3" bitfld.long 0x0 0. "CHLEN,Channel length (number of bits per audio" "0,1" line.long 0x4 "I2SPSC,I2S prescaler register" bitfld.long 0x4 9. "MCKOEN,I2S_MCK output enable" "0,1" bitfld.long 0x4 8. "OF,Odd factor for the" "0,1" hexmask.long.byte 0x4 0.--7. 1. "DIV,Dividing factor for the prescaler" tree.end tree.end tree "SYSCFG (System Configuration Registers)" base ad:0x40010000 group.long 0x0++0x1F line.long 0x0 "CFG0,System configuration register 0" bitfld.long 0x0 6. "BOOT0_PF0_RMP,BOOT0 and PF0 remapping bit" "0,1" bitfld.long 0x0 4. "PA9_PA12_RMP,PA9 and PA12 remapping bit for small packages" "0,1" bitfld.long 0x0 0.--1. "BOOT_MODE,Boot mode" "0,1,2,3" line.long 0x4 "CFG1,System configuration register 1" bitfld.long 0x4 31. "ADC0CH9RMP,ADC0 channel 9 remapping bit" "0,1" bitfld.long 0x4 30. "ADC0CH8RMP,ADC0 channel 8 remapping bit" "0,1" bitfld.long 0x4 29. "ADC1CH15RMP,ADC1 channel 15 remapping bit" "0,1" bitfld.long 0x4 28. "ADC1CH14RMP,ADC1 channel 14 remapping bit" "0,1" line.long 0x8 "EXTISS0,EXTI sources selection register" hexmask.long.byte 0x8 12.--15. 1. "EXTI3_SS,EXTI 3 sources selection" hexmask.long.byte 0x8 8.--11. 1. "EXTI2_SS,EXTI 2 sources selection" hexmask.long.byte 0x8 4.--7. 1. "EXTI1_SS,EXTI 1 sources selection" hexmask.long.byte 0x8 0.--3. 1. "EXTI0_SS,EXTI 0 sources selection" line.long 0xC "EXTISS1,EXTI sources selection register" hexmask.long.byte 0xC 12.--15. 1. "EXTI7_SS,EXTI 7 sources selection" hexmask.long.byte 0xC 8.--11. 1. "EXTI6_SS,EXTI 6 sources selection" hexmask.long.byte 0xC 4.--7. 1. "EXTI5_SS,EXTI 5 sources selection" hexmask.long.byte 0xC 0.--3. 1. "EXTI4_SS,EXTI 4 sources selection" line.long 0x10 "EXTISS2,EXTI sources selection register" hexmask.long.byte 0x10 12.--15. 1. "EXTI11_SS,EXTI 11 sources selection" hexmask.long.byte 0x10 8.--11. 1. "EXTI10_SS,EXTI 10 sources selection" hexmask.long.byte 0x10 4.--7. 1. "EXTI9_SS,EXTI 9 sources selection" hexmask.long.byte 0x10 0.--3. 1. "EXTI8_SS,EXTI 8 sources selection" line.long 0x14 "EXTISS3,EXTI sources selection register" hexmask.long.byte 0x14 12.--15. 1. "EXTI15_SS,EXTI 15 sources selection" hexmask.long.byte 0x14 8.--11. 1. "EXTI14_SS,EXTI 14 sources selection" hexmask.long.byte 0x14 4.--7. 1. "EXTI13_SS,EXTI 13 sources selection" hexmask.long.byte 0x14 0.--3. 1. "EXTI12_SS,EXTI 12 sources selection" line.long 0x18 "CFG2,System configuration register 2" bitfld.long 0x18 2. "LVD_LOCK,LVD lock" "0,1" bitfld.long 0x18 1. "SRAM_ECC_ERROR_LOCK,SRAM ECC check error lock" "0,1" bitfld.long 0x18 0. "LOCKUP_LOCK,Cortex-M33 LOCKUP output lock" "0,1" line.long 0x1C "STAT,System status register" rbitfld.long 0x1C 4. "NMIPINIF,Interrupt flag from NMI pin" "0,1" bitfld.long 0x1C 3. "CKMNMIIF,HXTAL clock moniotor NMI interrupt flag" "0,1" bitfld.long 0x1C 2. "FLASHECCIF,Flash ECC interrupt flag" "0,1" bitfld.long 0x1C 1. "SRAMECCSEIF,SRAM single bit correction event flag" "0,1" bitfld.long 0x1C 0. "SRAMECCMEIF,SRAM multi-bits non-correction event flag" "0,1" group.long 0x28++0x7 line.long 0x0 "CFG3,System configuration register 3" hexmask.long.word 0x0 18.--31. 1. "SRAMECCEADDR,Record the faulting system address" hexmask.long.byte 0x0 12.--17. 1. "SRAMECCSERRBITS,Which one bit has an SRAM ECC single-bit correctable error" bitfld.long 0x0 4. "NMIPINIE,NMI pin interrupt enable" "0,1" bitfld.long 0x0 3. "CKMNMIIE,HXTAL clock moniotor NMI enable" "0,1" bitfld.long 0x0 2. "FLASHECCIE,Flash ECC NMI enable" "0,1" newline bitfld.long 0x0 1. "SRAMECCSEIE,SRAM single bit correction interrupt enable" "0,1" bitfld.long 0x0 0. "SRAMECCMEIE,SRAM multi-bits non-correction interrupt enable" "0,1" line.long 0x4 "TIMERINSEL,TIMER input source select register" bitfld.long 0x4 30.--31. "TIMER0_ETI_SEL,TIMER0 external trigger select" "0,1,2,3" bitfld.long 0x4 28.--29. "TIMER7_ETI_SEL,TIMER7 external trigger select" "0,1,2,3" bitfld.long 0x4 24.--25. "TIMER19_ETI_SEL,TIMER19 external trigger select" "0,1,2,3" bitfld.long 0x4 22.--23. "TIMER20_ETI_SEL,TIMER20 external trigger select" "0,1,2,3" bitfld.long 0x4 21. "TIMER0_BRKIN0_SEL,TIMER0 break input 0 select" "0,1" newline bitfld.long 0x4 20. "TIMER0_BRKIN1_SEL,TIMER0 break input 1 select" "0,1" bitfld.long 0x4 19. "TIMER0_BRKIN2_SEL,TIMER0 break input 2 select" "0,1" bitfld.long 0x4 18. "TIMER0_BRKIN3_SEL,TIMER0 break input 3 select" "0,1" bitfld.long 0x4 17. "TIMER7_BRKIN0_SEL,TIMER7 break input 0 select" "0,1" bitfld.long 0x4 16. "TIMER7_BRKIN1_SEL,TIMER7 break input 1 select" "0,1" newline bitfld.long 0x4 15. "TIMER7_BRKIN2_SEL,TIMER7 break input 2 select" "0,1" bitfld.long 0x4 14. "TIMER7_BRKIN3_SEL,TIMER7 break input 3 select" "0,1" bitfld.long 0x4 9. "TIMER19_BRKIN0_SEL,TIMER19 break input 0 select" "0,1" bitfld.long 0x4 8. "TIMER19_BRKIN1_SEL,TIMER19 break input 1 select" "0,1" bitfld.long 0x4 7. "TIMER19_BRKIN2_SEL,TIMER19 break input 2 select" "0,1" newline bitfld.long 0x4 6. "TIMER19_BRKIN3_SEL,TIMER19 break input 3 select" "0,1" bitfld.long 0x4 5. "TIMER20_BRKIN0_SEL,TIMER20 break input 0 select" "0,1" bitfld.long 0x4 4. "TIMER20_BRKIN1_SEL,TIMER20 break input 1 select" "0,1" bitfld.long 0x4 3. "TIMER20_BRKIN2_SEL,TIMER20 break input 2 select" "0,1" bitfld.long 0x4 2. "TIMER20_BRKIN3_SEL,TIMER20 break input 3 select" "0,1" newline bitfld.long 0x4 0. "TIMER7_CH0N_SEL,TIMER7 Channel 0 complementary input select" "0,1" tree.end tree "TIMER (Timer)" base ad:0x0 tree "TIMER0 (Advanced Timer)" base ad:0x40012C00 group.long 0x0++0x13 line.long 0x0 "CTL0,control register 0" bitfld.long 0x0 8.--9. "CKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARSE,Auto-reload shadow enable" "0,1" bitfld.long 0x0 5.--6. "CAM,Counter aligns mode" "0,1,2,3" bitfld.long 0x0 4. "DIR,Direction" "0,1" bitfld.long 0x0 3. "SPM,Single pulse mode" "0,1" bitfld.long 0x0 2. "UPS,Update source" "0,1" bitfld.long 0x0 1. "UPDIS,Update disable" "0,1" newline bitfld.long 0x0 0. "CEN,Counter enable" "0,1" line.long 0x4 "CTL1,control register 1" bitfld.long 0x4 15. "ISO3N,Idle state of channel 3 complementary output" "0,1" bitfld.long 0x4 14. "ISO3,Idle state of channel 3 output" "0,1" bitfld.long 0x4 13. "ISO2N,Idle state of channel 2 complementary output" "0,1" bitfld.long 0x4 12. "ISO2,Idle state of channel 2 output" "0,1" bitfld.long 0x4 11. "ISO1N,Idle state of channel 1 complementary output" "0,1" bitfld.long 0x4 10. "ISO1,Idle state of channel 1 output" "0,1" bitfld.long 0x4 9. "ISO0N,Idle state of channel 0 complementary output" "0,1" newline bitfld.long 0x4 8. "ISO0,Idle state of channel 0 output" "0,1" bitfld.long 0x4 7. "TI0S,Channel 0 trigger input selection" "0,1" bitfld.long 0x4 4.--6. "MMC,Master mode control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "DMAS,DMA request source selection" "0,1" bitfld.long 0x4 2. "CCUC,Commutation control shadow register update control" "0,1" bitfld.long 0x4 0. "CCSE,Commutation control shadow enable" "0,1" line.long 0x8 "SMCFG,slave mode configuration register" bitfld.long 0x8 31. "TRGS_3,3th bit of TRGS" "0,1" bitfld.long 0x8 15. "ETP,External trigger polarity" "0,1" bitfld.long 0x8 14. "SMC1,Part of SMC for enable External clock mode1" "0,1" bitfld.long 0x8 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFC,External trigger filter control" bitfld.long 0x8 7. "MSM,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DMAINTEN,DMA/Interrupt enable register" bitfld.long 0xC 31. "CH3COMADDIE,Channel 3 additional compare interrupt enable" "0,1" bitfld.long 0xC 30. "CH2COMADDIE,Channel 2 additional compare interrupt enable" "0,1" bitfld.long 0xC 29. "CH1COMADDIE,Channel 1 additional compare interrupt enable" "0,1" bitfld.long 0xC 28. "CH0COMADDIE,Channel 0 additional compare interrupt enable" "0,1" bitfld.long 0xC 27. "MCH3DEN,Multi mode channel 3 capture/compare DMA request enable" "0,1" bitfld.long 0xC 26. "MCH2DEN,Multi mode channel 2 capture/compare DMA request enable" "0,1" bitfld.long 0xC 25. "MCH1DEN,Multi mode channel 1 capture/compare DMA request enable" "0,1" newline bitfld.long 0xC 24. "MCH0DEN,Multi mode channel 0 capture/compare DMA request enable" "0,1" bitfld.long 0xC 23. "MCH3IE,Multi mode channel 3 capture/compare interrupt enable" "0,1" bitfld.long 0xC 22. "MCH2IE,Multi mode channel 2 capture/compare interrupt enable" "0,1" bitfld.long 0xC 21. "MCH1IE,Multi mode channel 1 capture/compare interrupt enable" "0,1" bitfld.long 0xC 20. "MCH0IE,Multi mode channel 0 capture/compare interrupt enable" "0,1" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 13. "CMTDEN,Commutation DMA request enable" "0,1" newline bitfld.long 0xC 12. "CH3DEN,Channel 3 capture/compare DMA request enable" "0,1" bitfld.long 0xC 11. "CH2DEN,Channel 2 capture/compare DMA request enable" "0,1" bitfld.long 0xC 10. "CH1DEN,Channel 1 capture/compare DMA request enable" "0,1" bitfld.long 0xC 9. "CH0DEN,Channel 0 capture/compare DMA request enable" "0,1" bitfld.long 0xC 8. "UPDEN,Update DMA request enable" "0,1" bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0,1" bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0,1" newline bitfld.long 0xC 5. "CMTIE,commutation interrupt enable" "0,1" bitfld.long 0xC 4. "CH3IE,Channel 3 capture/compare interrupt enable" "0,1" bitfld.long 0xC 3. "CH2IE,Channel 2 capture/compare interrupt enable" "0,1" bitfld.long 0xC 2. "CH1IE,Channel 1 capture/compare interrupt enable" "0,1" bitfld.long 0xC 1. "CH0IE,Channel 0 capture/compare interrupt enable" "0,1" bitfld.long 0xC 0. "UPIE,Update interrupt enable" "0,1" line.long 0x10 "INTF,Interrupt flag register" bitfld.long 0x10 31. "CH3COMADDIF,Channel 3 additional compare interrupt flag" "0,1" bitfld.long 0x10 30. "CH2COMADDIF,Channel 2 additional compare interrupt flag" "0,1" bitfld.long 0x10 29. "CH1COMADDIF,Channel 1 additional compare interrupt flag" "0,1" bitfld.long 0x10 28. "CH0COMADDIF,Channel 0 additional compare interrupt flag" "0,1" bitfld.long 0x10 27. "MCH3OF,Multi mode channel 3 over capture flag" "0,1" bitfld.long 0x10 26. "MCH2OF,Multi mode channel 2 over capture flag" "0,1" bitfld.long 0x10 25. "MCH1OF,Multi mode channel 1 over capture flag" "0,1" newline bitfld.long 0x10 24. "MCH0OF,Multi mode channel 0 over capture flag" "0,1" bitfld.long 0x10 23. "MCH3IF,Multi mode channel 3 capture/compare interrupt flag" "0,1" bitfld.long 0x10 22. "MCH2IF,Multi mode channel 2 capture/compare interrupt flag" "0,1" bitfld.long 0x10 21. "MCH1IF,Multi mode channel 1 capture/compare interrupt flag" "0,1" bitfld.long 0x10 20. "MCH0IF,Multi mode channel 0 capture/compare interrupt flag" "0,1" bitfld.long 0x10 12. "CH3OF,Channel 3 over capture flag" "0,1" bitfld.long 0x10 11. "CH2OF,Channel 2 over capture flag" "0,1" newline bitfld.long 0x10 10. "CH1OF,Channel 1 over capture flag" "0,1" bitfld.long 0x10 9. "CH0OF,Channel 0 over capture flag" "0,1" bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0,1" bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0,1" bitfld.long 0x10 5. "CMTIF,Channel commutation interrupt flag" "0,1" bitfld.long 0x10 4. "CH3IF,Channel 3 capture/compare interrupt flag" "0,1" bitfld.long 0x10 3. "CH2IF,Channel 2 capture/compare interrupt flag" "0,1" newline bitfld.long 0x10 2. "CH1IF,Channel 1 capture/compare interrupt flag" "0,1" bitfld.long 0x10 1. "CH0IF,Channel 0 capture/compare interrupt flag" "0,1" bitfld.long 0x10 0. "UPIF,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "SWEVG,Software event generation register" bitfld.long 0x0 31. "CH3COMADDG,Channel 3 additional compare event generation" "0,1" bitfld.long 0x0 30. "CH2COMADDG,Channel 2 additional compare event generation" "0,1" bitfld.long 0x0 29. "CH1COMADDG,Channel 1 additional compare event generation" "0,1" bitfld.long 0x0 28. "CH0COMADDG,Channel 0 additional compare event generation" "0,1" bitfld.long 0x0 23. "MCH3G,Multi mode channel 3 capture or compare event generation" "0,1" bitfld.long 0x0 22. "MCH2G,Multi mode channel 2 capture or compare event generation" "0,1" bitfld.long 0x0 21. "MCH1G,Multi mode channel 1 capture or compare event generation" "0,1" newline bitfld.long 0x0 20. "MCH0G,Multi mode channel 0 capture or compare event generation" "0,1" bitfld.long 0x0 7. "BRKG,Break event generation" "0,1" bitfld.long 0x0 6. "TRGG,Trigger event generation" "0,1" bitfld.long 0x0 5. "CMTG,Channel commutation event generation" "0,1" bitfld.long 0x0 4. "CH3G,Channel 3 capture or compare event generation" "0,1" bitfld.long 0x0 3. "CH2G,Channel 2 capture or compare event generation" "0,1" bitfld.long 0x0 2. "CH1G,Channel 1 capture or compare event generation" "0,1" newline bitfld.long 0x0 1. "CH0G,Channel 0 capture or compare event generation" "0,1" bitfld.long 0x0 0. "UPG,Update event generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CHCTL0_Output,Channel control register 0 (output" bitfld.long 0x0 31. "CH1MS_2,2th bit of CH1MS" "0,1" bitfld.long 0x0 30. "CH0MS_2,2th bit of CH0MS" "0,1" bitfld.long 0x0 29. "CH1COMADDSEN,Channel 1 additional compare output shadow enable" "0,1" bitfld.long 0x0 28. "CH0COMADDSEN,Channel 0 additional compare output shadow enable" "0,1" bitfld.long 0x0 15. "CH1COMCEN,Channel 1 output compare clear enable" "0,1" bitfld.long 0x0 12.--14. "CH1COMCTL,Channel 1 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "CH1COMSEN,Channel 1 output compare shadow enable" "0,1" newline bitfld.long 0x0 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3" bitfld.long 0x0 7. "CH0COMCEN,Channel 0 output compare clear enable" "0,1" bitfld.long 0x0 4.--6. "CH0COMCTL,Channel 0 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "CH0COMSEN,Channel 0 compare output shadow enable" "0,1" bitfld.long 0x0 0.--1. "CH0MS,Channel 0 I/O mode selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CHCTL0_Input,Channel control register 0 (input" bitfld.long 0x0 31. "CH1MS_2,2th bit of CH1MS" "0,1" bitfld.long 0x0 30. "CH0MS_2,2th bit of CH0MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "CH1CAPFLT,Channel 1 input capture filter control" bitfld.long 0x0 10.--11. "CH1CAPPSC,Channel 1 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "CH0CAPFLT,Channel 0 input capture filter control" bitfld.long 0x0 2.--3. "CH0CAPPSC,Channel 0 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "CH0MS,Channel 0 mode selection" "0,1,2,3" line.long 0x4 "CHCTL1_Output,Channel control register 1 (output" bitfld.long 0x4 31. "CH3MS_2,2th bit of CH3MS" "0,1" bitfld.long 0x4 30. "CH2MS_2,2th bit of CH2MS" "0,1" bitfld.long 0x4 29. "CH3COMADDSEN,Channel 3 additional compare output shadow enable" "0,1" bitfld.long 0x4 28. "CH2COMADDSEN,Channel 2 additional compare output shadow enable" "0,1" bitfld.long 0x4 15. "CH3COMCEN,Channel 3 output compare clear enable" "0,1" bitfld.long 0x4 12.--14. "CH3COMCTL,Channel 3 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "CH3COMSEN,Channel 3 output compare shadow enable" "0,1" newline bitfld.long 0x4 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3" bitfld.long 0x4 7. "CH2COMCEN,Channel 2 output compare clear enable" "0,1" bitfld.long 0x4 4.--6. "CH2COMCTL,Channel 2 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CH2COMSEN,Channel 2 compare output shadow enable" "0,1" bitfld.long 0x4 0.--1. "CH2MS,Channel 2 I/O mode selection" "0,1,2,3" group.long 0x1C++0x2F line.long 0x0 "CHCTL1_Input,Channel control register 1 (input" bitfld.long 0x0 31. "CH3MS_2,2th bit of CH3MS" "0,1" bitfld.long 0x0 30. "CH2MS_2,2th bit of CH2MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "CH3CAPFLT,Channel 3 input capture filter control" bitfld.long 0x0 10.--11. "CH3CAPPSC,Channel 3 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "CH2CAPFLT,Channel 2 input capture filter control" bitfld.long 0x0 2.--3. "CH2CAPPSC,Channel 2 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "CH2MS,Channel 2 mode selection" "0,1,2,3" line.long 0x4 "CHCTL2,Channel control register 2" bitfld.long 0x4 15. "MCH3P,Multi mode channel 3 capture/compare polarity" "0,1" bitfld.long 0x4 14. "MCH3EN,Multi mode channel 3 capture/compare enable" "0,1" bitfld.long 0x4 13. "CH3P,Channel 3 capture/compare function polarity" "0,1" bitfld.long 0x4 12. "CH3EN,Channel 3 capture/compare function enable" "0,1" bitfld.long 0x4 11. "MCH2P,Multi mode channel 2 capture/compare polarity" "0,1" bitfld.long 0x4 10. "MCH2EN,Multi mode channel 2 output enable" "0,1" bitfld.long 0x4 9. "CH2P,Channel 2 capture/compare function polarity" "0,1" newline bitfld.long 0x4 8. "CH2EN,Channel 2 capture/compare function enable" "0,1" bitfld.long 0x4 7. "MCH1P,Multi mode channel 1 output polarity" "0,1" bitfld.long 0x4 6. "MCH1EN,Multi mode channel 1 output enable" "0,1" bitfld.long 0x4 5. "CH1P,Channel 1 capture/compare function polarity" "0,1" bitfld.long 0x4 4. "CH1EN,Channel 1 capture/compare function enable" "0,1" bitfld.long 0x4 3. "MCH0P,Multi mode channel 0 output polarity" "0,1" bitfld.long 0x4 2. "MCH0EN,Multi mode channel 0 capture/compare enable" "0,1" newline bitfld.long 0x4 1. "CH0P,Channel 0 capture/compare function polarity" "0,1" bitfld.long 0x4 0. "CH0EN,Channel 0 capture/compare function enable" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 0.--15. 1. "CNT,current counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value of the counter clock" line.long 0x10 "CAR,Counter auto reload register" hexmask.long.word 0x10 0.--15. 1. "CARL,Counter auto reload value" line.long 0x14 "CREP,Counter repetition register" hexmask.long.byte 0x14 0.--7. 1. "CREP,Counter repetition value" line.long 0x18 "CH0CV,Channel 0 capture/compare value register" hexmask.long.word 0x18 0.--15. 1. "CH0VAL,Capture or compare value of channel0" line.long 0x1C "CH1CV,Channel 1 capture/compare value register" hexmask.long.word 0x1C 0.--15. 1. "CH1VAL,Capture or compare value of channel1" line.long 0x20 "CH2CV,Channel 2 capture/compare value register" hexmask.long.word 0x20 0.--15. 1. "CH2VAL,Capture or compare value of channel 2" line.long 0x24 "CH3CV,Channel 3 capture/compare value register" hexmask.long.word 0x24 0.--15. 1. "CH3VAL,Capture or compare value of channel 3" line.long 0x28 "CCHP,channel complementary protection register" bitfld.long 0x28 15. "POEN,Primary output enable" "0,1" bitfld.long 0x28 14. "OAEN,Output automatic enable" "0,1" bitfld.long 0x28 13. "BRKP,Break polarity" "0,1" bitfld.long 0x28 12. "BRKEN,Break enable" "0,1" bitfld.long 0x28 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x28 10. "IOS,Idle mode off-state configure" "0,1" bitfld.long 0x28 8.--9. "PROT,Complementary register protect control" "0,1,2,3" newline hexmask.long.byte 0x28 0.--7. 1. "DTCFG,Dead time configure" line.long 0x2C "MCHCTL0_Output,Multi mode channel control register 0 (output" bitfld.long 0x2C 31. "MCH1MS_2,Multi mode channel 1 I/O mode selection" "0,1" bitfld.long 0x2C 30. "MCH0MS_2,Multi mode channel 0 I/O mode selection" "0,1" bitfld.long 0x2C 15. "MCH1COMCEN,Multi mode channel 1 output compare clear enable" "0,1" bitfld.long 0x2C 12.--14. "MCH1COMCTL,Multi mode channel 1 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 11. "MCH1COMSEN,Multi mode channel 1 output compare shadow enable" "0,1" bitfld.long 0x2C 8.--9. "MCH1MS,Multi mode channel 1 I/O mode selection" "0,1,2,3" bitfld.long 0x2C 7. "MCH0COMCEN,Multi mode channel 0 output compare clear enable" "0,1" newline bitfld.long 0x2C 4.--6. "MCH0COMCTL,Multi mode channel 0 output compare control" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 3. "MCH0COMSEN,Multi mode channel 0 output compare shadow enable" "0,1" bitfld.long 0x2C 0.--1. "MCH0MS,Multi mode channel 0 I/O mode selection" "0,1,2,3" group.long 0x48++0x7 line.long 0x0 "MCHCTL0_Input,Multi mode channel control register 0 (input" bitfld.long 0x0 31. "MCH1MS_2,Multi mode channel 1 I/O mode selection" "0,1" bitfld.long 0x0 30. "MCH0MS_2,Multi mode channel 0 I/O mode selection" "0,1" hexmask.long.byte 0x0 12.--15. 1. "MCH1CAPFLT,Multi mode channel 1 input capture filter control" bitfld.long 0x0 10.--11. "MCH1CAPPSC,Multi mode channel 1 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "MCH1MS,Multi mode channel 1 I/O mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "MCH0CAPFLT,Multi mode channel 0 input capture filter control" bitfld.long 0x0 2.--3. "MCH0CAPPSC,Multi mode channel 0 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "MCH0MS,Multi mode channel 0 I/O mode selection" "0,1,2,3" line.long 0x4 "MCHCTL1_Output,Multi mode channel control register 1 (output" bitfld.long 0x4 31. "MCH3MS_2,2th bit of MCH3MS" "0,1" bitfld.long 0x4 30. "MCH2MS_2,2th bit of MCH2MS" "0,1" bitfld.long 0x4 15. "MCH3COMCEN,Multi mode channel 3 output compare clear enable" "0,1" bitfld.long 0x4 12.--14. "MCH3COMCTL,Multi mode channel 3 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "MCH3COMSEN,Multi mode channel 3 output compare shadow enable" "0,1" bitfld.long 0x4 8.--9. "MCH3MS,Multi mode channel 3 I/O mode selection" "0,1,2,3" bitfld.long 0x4 7. "MCH2COMCEN,Multi mode channel 2 output compare clear enable" "0,1" newline bitfld.long 0x4 4.--6. "MCH2COMCTL,Multi mode channel 2 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "MCH2COMSEN,Multi mode channel 2 output compare shadow enable" "0,1" bitfld.long 0x4 0.--1. "MCH2MS,Multi mode channel 2 I/O mode selection" "0,1,2,3" group.long 0x4C++0x3F line.long 0x0 "MCHCTL1_Input,Multi mode channel control register 1(input" bitfld.long 0x0 31. "MCH3MS_2,2th bit of MCH3MS" "0,1" bitfld.long 0x0 30. "MCH2MS_2,2th bit of MCH2MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "MCH3CAPFLT,Multi mode channel 3 input capture filter control" bitfld.long 0x0 10.--11. "MCH3CAPPSC,Multi mode channel 3 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "MCH3MS,Multi mode channel 3 I/O mode selection." "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "MCH2CAPFLT,Multi mode channel 2 input capture filter control" bitfld.long 0x0 2.--3. "MCH2CAPPSC,Multi mode channel 2 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "MCH2MS,Multi mode channel 2 I/O mode selection" "0,1,2,3" line.long 0x4 "MCHCTL2,Multi mode channel control register 2" bitfld.long 0x4 6.--7. "MCH3FP,Multi mode channel 3 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 4.--5. "MCH2FP,Multi mode channel 2 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 2.--3. "MCH1FP,Multi mode channel 1 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 0.--1. "MCH0FP,Multi mode channel 0 capture/compare free polarity" "0,1,2,3" line.long 0x8 "MCH0CV,Multi mode channel 0 capture/compare value register" hexmask.long.word 0x8 0.--15. 1. "MCH0VAL,Capture/compare value of multi mode channel 0" line.long 0xC "MCH1CV,Multi mode channel 1 capture/compare value register" hexmask.long.word 0xC 0.--15. 1. "MCH1VAL,Capture/compare value of multi mode channel 1" line.long 0x10 "MCH2CV,Multi mode channel 2 capture/compare value register" hexmask.long.word 0x10 0.--15. 1. "MCH2VAL,Capture/compare value of multi mode channel 2" line.long 0x14 "MCH3VAL,Capture/compare value of multi mode channel 3" hexmask.long.word 0x14 0.--15. 1. "MCH3VAL,Capture/compare value of channel 3" line.long 0x18 "CH0COMV_ADD,Channel 0 additional compare value register" hexmask.long.word 0x18 0.--15. 1. "CH0COMVAL_ADD,Additional compare value of channel 0" line.long 0x1C "CH1COMV_ADD,Channel 1 additional compare value register" hexmask.long.word 0x1C 0.--15. 1. "CH1COMVAL_ADD,Additional compare value of channel 1" line.long 0x20 "CH2COMV_ADD,Channel 2 additional compare value register" hexmask.long.word 0x20 0.--15. 1. "CH2COMVAL_ADD,Additional compare value of channel 2" line.long 0x24 "CH3COMV_ADD,Channel 3 additional compare value register" hexmask.long.word 0x24 0.--15. 1. "CH3COMVAL_ADD,Additional compare value of channel 3" line.long 0x28 "CTL2,Control register 2" bitfld.long 0x28 31. "CH3CPWMEN,Channel 3 composite PWM mode enable" "0,1" bitfld.long 0x28 30. "CH2CPWMEN,Channel 2 composite PWM mode enable" "0,1" bitfld.long 0x28 29. "CH1CPWMEN,Channel 1 composite PWM mode enable" "0,1" bitfld.long 0x28 28. "CH0CPWMEN,Channel 0 composite PWM mode enable" "0,1" bitfld.long 0x28 26.--27. "MCH3MSEL,Multi mode channel 3 mode select" "0,1,2,3" bitfld.long 0x28 24.--25. "MCH2MSEL,Multi mode channel 2 mode select" "0,1,2,3" bitfld.long 0x28 22.--23. "MCH1MSEL,Multi mode channel 1 mode select" "0,1,2,3" newline bitfld.long 0x28 20.--21. "MCH0MSEL,Multi mode channel 0 mode select" "0,1,2,3" bitfld.long 0x28 14.--15. "CH3OMPSEL,Channel 3 output match pulse select" "0,1,2,3" bitfld.long 0x28 12.--13. "CH2OMPSEL,Channel 2 output match pulse select" "0,1,2,3" bitfld.long 0x28 10.--11. "CH1OMPSEL,Channel 1 output match pulse select" "0,1,2,3" bitfld.long 0x28 8.--9. "CH0OMPSEL,Channel 0 output match pulse select" "0,1,2,3" bitfld.long 0x28 7. "BRKENCH3,Break control enable for channel 3" "0,1" bitfld.long 0x28 6. "BRKENCH2,Break control enable for channel 2" "0,1" newline bitfld.long 0x28 5. "BRKENCH1,Break control enable for channel 1" "0,1" bitfld.long 0x28 4. "BRKENCH0,Break control enable for channel 0" "0,1" bitfld.long 0x28 3. "DTIENCH3,Dead time inserted enable for channel 3" "0,1" bitfld.long 0x28 2. "DTIENCH2,Dead time inserted enable for channel 2" "0,1" bitfld.long 0x28 1. "DTIENCH1,Dead time inserted enable for channel 1" "0,1" bitfld.long 0x28 0. "DTIENCH0,Dead time inserted enable for channel 0" "0,1" line.long 0x2C "BRKCFG,Break configuration register" bitfld.long 0x2C 31. "BRK3P,BRKIN3 input signal polarity" "0,1" bitfld.long 0x2C 30. "BRK3EN,BRKIN3 input signal enable" "0,1" bitfld.long 0x2C 29. "BRK2P,BRKIN2 input signal polarity" "0,1" bitfld.long 0x2C 28. "BRK2EN,BRKIN2 input signal enable" "0,1" bitfld.long 0x2C 27. "BRK1P,BRKIN1 input signal polarity" "0,1" bitfld.long 0x2C 26. "BRK1EN,BRKIN1 input signal enable" "0,1" bitfld.long 0x2C 25. "BRK0P,BRKIN0 input signal polarity" "0,1" newline bitfld.long 0x2C 24. "BRK0EN,BRKIN0 input signal enable" "0,1" hexmask.long.byte 0x2C 12.--15. 1. "BRK3F,BRKIN3 input signal filter" hexmask.long.byte 0x2C 8.--11. 1. "BRK2F,BRKIN2 input signal filter" hexmask.long.byte 0x2C 4.--7. 1. "BRK1F,BRKIN1 input signal filter" hexmask.long.byte 0x2C 0.--3. 1. "BRK0F,BRKIN0 input signal filter" line.long 0x30 "FCCHP0,Free complementary channel protection register 0" bitfld.long 0x30 31. "FCCHP0EN,Free complementary channel protection register 0 enable" "0,1" bitfld.long 0x30 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x30 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x30 0.--7. 1. "DTCFG,Dead time configure" line.long 0x34 "FCCHP1,Free complementary channel protection register 1" bitfld.long 0x34 31. "FCCHP1EN,Free complementary channel protection register 1 enable" "0,1" bitfld.long 0x34 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x34 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x34 0.--7. 1. "DTCFG,Dead time configure" line.long 0x38 "FCCHP2,Free complementary channel protection register 2" bitfld.long 0x38 31. "FCCHP2EN,Free complementary channel protection register 2 enable" "0,1" bitfld.long 0x38 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x38 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x38 0.--7. 1. "DTCFG,Dead time configure" line.long 0x3C "FCCHP3,Free complementary channel protection register 3" bitfld.long 0x3C 31. "FCCHP3EN,Free complementary channel protection register 3 enable" "0,1" bitfld.long 0x3C 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x3C 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x3C 0.--7. 1. "DTCFG,Dead time configure" group.long 0xE0++0x7 line.long 0x0 "DMACFG,DMA configuration register" hexmask.long.byte 0x0 8.--12. 1. "DMATC,DMA transfer count" hexmask.long.byte 0x0 0.--4. 1. "DMATA,DMA transfer access start address" line.long 0x4 "DMATB,DMA transfer buffer register" hexmask.long.word 0x4 0.--15. 1. "DMATB,DMA transfer buffer" group.long 0xFC++0x3 line.long 0x0 "CFG,Configuration register" bitfld.long 0x0 1. "CHVSEL,Write CHxVAL register selection" "0,1" bitfld.long 0x0 0. "OUTSEL,The output value selection" "0,1" tree.end tree "TIMER1 (General Level0 Timer)" base ad:0x40000000 group.long 0x0++0x13 line.long 0x0 "CTL0,control register 0" bitfld.long 0x0 8.--9. "CKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARSE,Auto-reload shadow enable" "0,1" bitfld.long 0x0 5.--6. "CAM,Counter aligns mode selection" "0,1,2,3" bitfld.long 0x0 4. "DIR,Direction" "0,1" bitfld.long 0x0 3. "SPM,Single pulse mode" "0,1" bitfld.long 0x0 2. "UPS,Update source" "0,1" bitfld.long 0x0 1. "UPDIS,Update disable" "0,1" bitfld.long 0x0 0. "CEN,Counter enable" "0,1" line.long 0x4 "CTL1,control register 1" bitfld.long 0x4 7. "TI0S,Channel 0 trigger input selection" "0,1" bitfld.long 0x4 4.--6. "MMC,Master mode control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "DMAS,DMA request source selection" "0,1" line.long 0x8 "SMCFG,slave mode control register" bitfld.long 0x8 15. "ETP,External trigger polarity" "0,1" bitfld.long 0x8 14. "SMC1,Part of SMC for enable External clock mode1" "0,1" bitfld.long 0x8 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFC,External trigger filter control" bitfld.long 0x8 7. "MSM,Master-slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7" bitfld.long 0x8 0.--2. "SMC,Slave mode control" "0,1,2,3,4,5,6,7" line.long 0xC "DMAINTEN,DMA/Interrupt enable register" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 12. "CH3DEN,Channel 3 capture/compare DMA request enable" "0,1" bitfld.long 0xC 11. "CH2DEN,Channel 2 capture/compare DMA request enable" "0,1" bitfld.long 0xC 10. "CH1DEN,Channel 1 capture/compare DMA request enable" "0,1" bitfld.long 0xC 9. "CH0DEN,Channel 0 capture/compare DMA request enable" "0,1" bitfld.long 0xC 8. "UPDEN,Update DMA request enable" "0,1" bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0,1" bitfld.long 0xC 4. "CH3IE,Channel 3 capture/compare interrupt enable" "0,1" bitfld.long 0xC 3. "CH2IE,Channel 2 capture/compare interrupt enable" "0,1" newline bitfld.long 0xC 2. "CH1IE,Channel 1 capture/compare interrupt enable" "0,1" bitfld.long 0xC 1. "CH0IE,Channel 0 capture/compare interrupt enable" "0,1" bitfld.long 0xC 0. "UPIE,Update interrupt enable" "0,1" line.long 0x10 "INTF,interrupt flag register" bitfld.long 0x10 12. "CH3OF,Channel 3 over capture flag" "0,1" bitfld.long 0x10 11. "CH2OF,Channel 2 over capture flag" "0,1" bitfld.long 0x10 10. "CH1OF,Channel 1 over capture flag" "0,1" bitfld.long 0x10 9. "CH0OF,Channel 0 over capture flag" "0,1" bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0,1" bitfld.long 0x10 4. "CH3IF,Channel 3 capture/compare interrupt enable" "0,1" bitfld.long 0x10 3. "CH2IF,Channel 2 capture/compare interrupt enable" "0,1" bitfld.long 0x10 2. "CH1IF,Channel 1 capture/compare interrupt flag" "0,1" bitfld.long 0x10 1. "CH0IF,Channel 0 capture/compare interrupt flag" "0,1" newline bitfld.long 0x10 0. "UPIF,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "SWEVG,event generation register" bitfld.long 0x0 6. "TRGG,Trigger event generation" "0,1" bitfld.long 0x0 4. "CH3G,Channel 3 capture or compare event generation" "0,1" bitfld.long 0x0 3. "CH2G,Channel 2 capture or compare event generation" "0,1" bitfld.long 0x0 2. "CH1G,Channel 1 capture or compare event generation" "0,1" bitfld.long 0x0 1. "CH0G,Channel 0 capture or compare event generation" "0,1" bitfld.long 0x0 0. "UPG,Update generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CHCTL0_Output,Channel control register 0 (output" bitfld.long 0x0 15. "CH1COMCEN,Channel 1 output compare clear enable" "0,1" bitfld.long 0x0 12.--14. "CH1COMCTL,Channel 1 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "CH1COMSEN,Channel 1 output compare shadow enable" "0,1" bitfld.long 0x0 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3" bitfld.long 0x0 7. "CH0COMCEN,Channel 0 output compare clear enable" "0,1" bitfld.long 0x0 4.--6. "CH0COMCTL,Channel 0 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "CH0COMSEN,Channel 0 compare output shadow enable" "0,1" bitfld.long 0x0 0.--1. "CH0MS,Channel 0 I/O mode selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CHCTL0_Input,Channel control register 0 (input" hexmask.long.byte 0x0 12.--15. 1. "CH1CAPFLT,Channel 1 input capture filter control" bitfld.long 0x0 10.--11. "CH1CAPPSC,Channel 1 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "CH0CAPFLT,Channel 0 input capture filter control" bitfld.long 0x0 2.--3. "CH0CAPPSC,Channel 0 input capture prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CH0MS,Channel 0 mode selection" "0,1,2,3" line.long 0x4 "CHCTL1_Output,Channel control register 1 (output mode)" bitfld.long 0x4 15. "CH3COMCEN,Channel 3 output compare clear enable" "0,1" bitfld.long 0x4 12.--14. "CH3COMCTL,Channel 3 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "CH3COMSEN,Channel 3 output compare shadow enable" "0,1" bitfld.long 0x4 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3" bitfld.long 0x4 7. "CH2COMCEN,Channel 2 output compare clear enable" "0,1" bitfld.long 0x4 4.--6. "CH2COMCTL,Channel 2 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CH2COMSEN,Channel 2 compare output shadow enable" "0,1" bitfld.long 0x4 0.--1. "CH2MS,Channel 2 I/O mode selection" "0,1,2,3" group.long 0x1C++0x13 line.long 0x0 "CHCTL1_Input,Channel control register 1 (input" hexmask.long.byte 0x0 12.--15. 1. "CH3CAPFLT,Channel 3 input capture filter control" bitfld.long 0x0 10.--11. "CH3CAPPSC,Channel 3 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "CH2CAPFLT,Channel 2 input capture filter control" bitfld.long 0x0 2.--3. "CH2CAPPSC,Channel 2 input capture prescaler" "0,1,2,3" bitfld.long 0x0 0.--1. "CH2MS,Channel 2 mode selection" "0,1,2,3" line.long 0x4 "CHCTL2,Channel control register 2" bitfld.long 0x4 15. "CH3NP,Channel 3 complementary capture/compare polarity" "0,1" bitfld.long 0x4 13. "CH3P,Channel 3 capture/compare function polarity" "0,1" bitfld.long 0x4 12. "CH3EN,Channel 3 capture/compare function enable" "0,1" bitfld.long 0x4 11. "CH2NP,Channel 2 complementary capture/compare polarity" "0,1" bitfld.long 0x4 9. "CH2P,Channel 2 capture/compare function polarity" "0,1" bitfld.long 0x4 8. "CH2EN,Channel 2 capture/compare function enable" "0,1" bitfld.long 0x4 7. "CH1NP,Channel 1 complementary capture/compare polarity" "0,1" bitfld.long 0x4 5. "CH1P,Channel 1 capture/compare function polarity" "0,1" bitfld.long 0x4 4. "CH1EN,Channel 1 capture/compare function enable" "0,1" newline bitfld.long 0x4 3. "CH0NP,Channel 0 complementary output polarity" "0,1" bitfld.long 0x4 1. "CH0P,Channel 0 capture/compare function polarity" "0,1" bitfld.long 0x4 0. "CH0EN,Channel 0 capture/compare function enable" "0,1" line.long 0x8 "CNT,Counter register" hexmask.long.word 0x8 0.--15. 1. "CNT,counter value" line.long 0xC "PSC,Prescaler register" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value of the counter clock" line.long 0x10 "CAR,Counter auto reload register" hexmask.long.word 0x10 0.--15. 1. "CARL,Counter auto reload value" group.long 0x34++0xF line.long 0x0 "CH0CV,Channel 0 capture/compare value register" hexmask.long.word 0x0 0.--15. 1. "CH0VAL,Capture or compare value of channel 0" line.long 0x4 "CH1CV,Channel 1 capture/compare value register" hexmask.long.word 0x4 0.--15. 1. "CH1VAL,Capture or compare value of channel1" line.long 0x8 "CH2CV,Channel 2 capture/compare value register" hexmask.long.word 0x8 0.--15. 1. "CH2VAL,Capture or compare value of channel 2" line.long 0xC "CH3CV,Channel 3 capture/compare value register" hexmask.long.word 0xC 0.--15. 1. "CH3VAL,Capture or compare value of channel 3" group.long 0x50++0x3 line.long 0x0 "IRMP,Channel input remap register" bitfld.long 0x0 0.--1. "CI0_RMP,Channel 0 input remap" "0,1,2,3" group.long 0xFC++0x3 line.long 0x0 "CFG,Configuration" bitfld.long 0x0 1. "CHVSEL,Write CHxVAL register selection" "0,1" tree.end tree "TIMER5 (Basic Timer)" base ad:0x40001000 group.long 0x0++0x7 line.long 0x0 "CTL0,control register 0" bitfld.long 0x0 7. "ARSE,Auto-reload shadow enable" "0,1" bitfld.long 0x0 3. "SPM,Single pulse mode" "0,1" bitfld.long 0x0 2. "UPS,Update source" "0,1" bitfld.long 0x0 1. "UPDIS,Update disable" "0,1" bitfld.long 0x0 0. "CEN,Counter enable" "0,1" line.long 0x4 "CTL1,control register 1" bitfld.long 0x4 4.--6. "MMC,Master mode control" "0,1,2,3,4,5,6,7" group.long 0xC++0x7 line.long 0x0 "DMAINTEN,DMA/Interrupt enable register" bitfld.long 0x0 8. "UPDEN,Update DMA request enable" "0,1" bitfld.long 0x0 0. "UPIE,Update interrupt enable" "0,1" line.long 0x4 "INTF,Interrupt flag register" bitfld.long 0x4 0. "UPIF,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "SWEVG,event generation register" bitfld.long 0x0 0. "UPG,Update generation" "0,1" group.long 0x24++0xB line.long 0x0 "CNT,Counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Low counter value" line.long 0x4 "PSC,Prescaler register" hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value of the counter clock" line.long 0x8 "CAR,Counter auto reload register" hexmask.long.word 0x8 0.--15. 1. "CARL,Counter auto reload value" tree.end tree "TIMER6 (Basic Timer)" base ad:0x40001400 group.long 0x0++0x7 line.long 0x0 "CTL0,control register 0" bitfld.long 0x0 7. "ARSE,Auto-reload shadow enable" "0,1" bitfld.long 0x0 3. "SPM,Single pulse mode" "0,1" bitfld.long 0x0 2. "UPS,Update source" "0,1" bitfld.long 0x0 1. "UPDIS,Update disable" "0,1" bitfld.long 0x0 0. "CEN,Counter enable" "0,1" line.long 0x4 "CTL1,control register 1" bitfld.long 0x4 4.--6. "MMC,Master mode control" "0,1,2,3,4,5,6,7" group.long 0xC++0x7 line.long 0x0 "DMAINTEN,DMA/Interrupt enable register" bitfld.long 0x0 8. "UPDEN,Update DMA request enable" "0,1" bitfld.long 0x0 0. "UPIE,Update interrupt enable" "0,1" line.long 0x4 "INTF,Interrupt flag register" bitfld.long 0x4 0. "UPIF,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "SWEVG,event generation register" bitfld.long 0x0 0. "UPG,Update generation" "0,1" group.long 0x24++0xB line.long 0x0 "CNT,Counter register" hexmask.long.word 0x0 0.--15. 1. "CNT,Low counter value" line.long 0x4 "PSC,Prescaler register" hexmask.long.word 0x4 0.--15. 1. "PSC,Prescaler value of the counter clock" line.long 0x8 "CAR,Counter auto reload register" hexmask.long.word 0x8 0.--15. 1. "CARL,Counter auto reload value" tree.end tree "TIMER7 (Advanced Timer)" base ad:0x40013400 group.long 0x0++0x13 line.long 0x0 "CTL0,control register 0" bitfld.long 0x0 8.--9. "CKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARSE,Auto-reload shadow enable" "0,1" bitfld.long 0x0 5.--6. "CAM,Counter aligns mode" "0,1,2,3" bitfld.long 0x0 4. "DIR,Direction" "0,1" bitfld.long 0x0 3. "SPM,Single pulse mode" "0,1" bitfld.long 0x0 2. "UPS,Update source" "0,1" bitfld.long 0x0 1. "UPDIS,Update disable" "0,1" newline bitfld.long 0x0 0. "CEN,Counter enable" "0,1" line.long 0x4 "CTL1,control register 1" bitfld.long 0x4 15. "ISO3N,Idle state of channel 3 complementary output" "0,1" bitfld.long 0x4 14. "ISO3,Idle state of channel 3 output" "0,1" bitfld.long 0x4 13. "ISO2N,Idle state of channel 2 complementary output" "0,1" bitfld.long 0x4 12. "ISO2,Idle state of channel 2 output" "0,1" bitfld.long 0x4 11. "ISO1N,Idle state of channel 1 complementary output" "0,1" bitfld.long 0x4 10. "ISO1,Idle state of channel 1 output" "0,1" bitfld.long 0x4 9. "ISO0N,Idle state of channel 0 complementary output" "0,1" newline bitfld.long 0x4 8. "ISO0,Idle state of channel 0 output" "0,1" bitfld.long 0x4 7. "TI0S,Channel 0 trigger input selection" "0,1" bitfld.long 0x4 4.--6. "MMC,Master mode control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "DMAS,DMA request source selection" "0,1" bitfld.long 0x4 2. "CCUC,Commutation control shadow register update control" "0,1" bitfld.long 0x4 0. "CCSE,Commutation control shadow enable" "0,1" line.long 0x8 "SMCFG,slave mode configuration register" bitfld.long 0x8 31. "TRGS_3,3th bit of TRGS" "0,1" bitfld.long 0x8 15. "ETP,External trigger polarity" "0,1" bitfld.long 0x8 14. "SMC1,Part of SMC for enable External clock mode1" "0,1" bitfld.long 0x8 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFC,External trigger filter control" bitfld.long 0x8 7. "MSM,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DMAINTEN,DMA/Interrupt enable register" bitfld.long 0xC 31. "CH3COMADDIE,Channel 3 additional compare interrupt enable" "0,1" bitfld.long 0xC 30. "CH2COMADDIE,Channel 2 additional compare interrupt enable" "0,1" bitfld.long 0xC 29. "CH1COMADDIE,Channel 1 additional compare interrupt enable" "0,1" bitfld.long 0xC 28. "CH0COMADDIE,Channel 0 additional compare interrupt enable" "0,1" bitfld.long 0xC 27. "MCH3DEN,Multi mode channel 3 capture/compare DMA request enable" "0,1" bitfld.long 0xC 26. "MCH2DEN,Multi mode channel 2 capture/compare DMA request enable" "0,1" bitfld.long 0xC 25. "MCH1DEN,Multi mode channel 1 capture/compare DMA request enable" "0,1" newline bitfld.long 0xC 24. "MCH0DEN,Multi mode channel 0 capture/compare DMA request enable" "0,1" bitfld.long 0xC 23. "MCH3IE,Multi mode channel 3 capture/compare interrupt enable" "0,1" bitfld.long 0xC 22. "MCH2IE,Multi mode channel 2 capture/compare interrupt enable" "0,1" bitfld.long 0xC 21. "MCH1IE,Multi mode channel 1 capture/compare interrupt enable" "0,1" bitfld.long 0xC 20. "MCH0IE,Multi mode channel 0 capture/compare interrupt enable" "0,1" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 13. "CMTDEN,Commutation DMA request enable" "0,1" newline bitfld.long 0xC 12. "CH3DEN,Channel 3 capture/compare DMA request enable" "0,1" bitfld.long 0xC 11. "CH2DEN,Channel 2 capture/compare DMA request enable" "0,1" bitfld.long 0xC 10. "CH1DEN,Channel 1 capture/compare DMA request enable" "0,1" bitfld.long 0xC 9. "CH0DEN,Channel 0 capture/compare DMA request enable" "0,1" bitfld.long 0xC 8. "UPDEN,Update DMA request enable" "0,1" bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0,1" bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0,1" newline bitfld.long 0xC 5. "CMTIE,commutation interrupt enable" "0,1" bitfld.long 0xC 4. "CH3IE,Channel 3 capture/compare interrupt enable" "0,1" bitfld.long 0xC 3. "CH2IE,Channel 2 capture/compare interrupt enable" "0,1" bitfld.long 0xC 2. "CH1IE,Channel 1 capture/compare interrupt enable" "0,1" bitfld.long 0xC 1. "CH0IE,Channel 0 capture/compare interrupt enable" "0,1" bitfld.long 0xC 0. "UPIE,Update interrupt enable" "0,1" line.long 0x10 "INTF,Interrupt flag register" bitfld.long 0x10 31. "CH3COMADDIF,Channel 3 additional compare interrupt flag" "0,1" bitfld.long 0x10 30. "CH2COMADDIF,Channel 2 additional compare interrupt flag" "0,1" bitfld.long 0x10 29. "CH1COMADDIF,Channel 1 additional compare interrupt flag" "0,1" bitfld.long 0x10 28. "CH0COMADDIF,Channel 0 additional compare interrupt flag" "0,1" bitfld.long 0x10 27. "MCH3OF,Multi mode channel 3 over capture flag" "0,1" bitfld.long 0x10 26. "MCH2OF,Multi mode channel 2 over capture flag" "0,1" bitfld.long 0x10 25. "MCH1OF,Multi mode channel 1 over capture flag" "0,1" newline bitfld.long 0x10 24. "MCH0OF,Multi mode channel 0 over capture flag" "0,1" bitfld.long 0x10 23. "MCH3IF,Multi mode channel 3 capture/compare interrupt flag" "0,1" bitfld.long 0x10 22. "MCH2IF,Multi mode channel 2 capture/compare interrupt flag" "0,1" bitfld.long 0x10 21. "MCH1IF,Multi mode channel 1 capture/compare interrupt flag" "0,1" bitfld.long 0x10 20. "MCH0IF,Multi mode channel 0 capture/compare interrupt flag" "0,1" bitfld.long 0x10 12. "CH3OF,Channel 3 over capture flag" "0,1" bitfld.long 0x10 11. "CH2OF,Channel 2 over capture flag" "0,1" newline bitfld.long 0x10 10. "CH1OF,Channel 1 over capture flag" "0,1" bitfld.long 0x10 9. "CH0OF,Channel 0 over capture flag" "0,1" bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0,1" bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0,1" bitfld.long 0x10 5. "CMTIF,Channel commutation interrupt flag" "0,1" bitfld.long 0x10 4. "CH3IF,Channel 3 capture/compare interrupt flag" "0,1" bitfld.long 0x10 3. "CH2IF,Channel 2 capture/compare interrupt flag" "0,1" newline bitfld.long 0x10 2. "CH1IF,Channel 1 capture/compare interrupt flag" "0,1" bitfld.long 0x10 1. "CH0IF,Channel 0 capture/compare interrupt flag" "0,1" bitfld.long 0x10 0. "UPIF,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "SWEVG,Software event generation register" bitfld.long 0x0 31. "CH3COMADDG,Channel 3 additional compare event generation" "0,1" bitfld.long 0x0 30. "CH2COMADDG,Channel 2 additional compare event generation" "0,1" bitfld.long 0x0 29. "CH1COMADDG,Channel 1 additional compare event generation" "0,1" bitfld.long 0x0 28. "CH0COMADDG,Channel 0 additional compare event generation" "0,1" bitfld.long 0x0 23. "MCH3G,Multi mode channel 3 capture or compare event generation" "0,1" bitfld.long 0x0 22. "MCH2G,Multi mode channel 2 capture or compare event generation" "0,1" bitfld.long 0x0 21. "MCH1G,Multi mode channel 1 capture or compare event generation" "0,1" newline bitfld.long 0x0 20. "MCH0G,Multi mode channel 0 capture or compare event generation" "0,1" bitfld.long 0x0 7. "BRKG,Break event generation" "0,1" bitfld.long 0x0 6. "TRGG,Trigger event generation" "0,1" bitfld.long 0x0 5. "CMTG,Channel commutation event generation" "0,1" bitfld.long 0x0 4. "CH3G,Channel 3 capture or compare event generation" "0,1" bitfld.long 0x0 3. "CH2G,Channel 2 capture or compare event generation" "0,1" bitfld.long 0x0 2. "CH1G,Channel 1 capture or compare event generation" "0,1" newline bitfld.long 0x0 1. "CH0G,Channel 0 capture or compare event generation" "0,1" bitfld.long 0x0 0. "UPG,Update event generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CHCTL0_Output,Channel control register 0 (output" bitfld.long 0x0 31. "CH1MS_2,2th bit of CH1MS" "0,1" bitfld.long 0x0 30. "CH0MS_2,2th bit of CH0MS" "0,1" bitfld.long 0x0 29. "CH1COMADDSEN,Channel 1 additional compare output shadow enable" "0,1" bitfld.long 0x0 28. "CH0COMADDSEN,Channel 0 additional compare output shadow enable" "0,1" bitfld.long 0x0 15. "CH1COMCEN,Channel 1 output compare clear enable" "0,1" bitfld.long 0x0 12.--14. "CH1COMCTL,Channel 1 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "CH1COMSEN,Channel 1 output compare shadow enable" "0,1" newline bitfld.long 0x0 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3" bitfld.long 0x0 7. "CH0COMCEN,Channel 0 output compare clear enable" "0,1" bitfld.long 0x0 4.--6. "CH0COMCTL,Channel 0 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "CH0COMSEN,Channel 0 compare output shadow enable" "0,1" bitfld.long 0x0 0.--1. "CH0MS,Channel 0 I/O mode selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CHCTL0_Input,Channel control register 0 (input" bitfld.long 0x0 31. "CH1MS_2,2th bit of CH1MS" "0,1" bitfld.long 0x0 30. "CH0MS_2,2th bit of CH0MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "CH1CAPFLT,Channel 1 input capture filter control" bitfld.long 0x0 10.--11. "CH1CAPPSC,Channel 1 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "CH0CAPFLT,Channel 0 input capture filter control" bitfld.long 0x0 2.--3. "CH0CAPPSC,Channel 0 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "CH0MS,Channel 0 mode selection" "0,1,2,3" line.long 0x4 "CHCTL1_Output,Channel control register 1 (output" bitfld.long 0x4 31. "CH3MS_2,2th bit of CH3MS" "0,1" bitfld.long 0x4 30. "CH2MS_2,2th bit of CH2MS" "0,1" bitfld.long 0x4 29. "CH3COMADDSEN,Channel 3 additional compare output shadow enable" "0,1" bitfld.long 0x4 28. "CH2COMADDSEN,Channel 2 additional compare output shadow enable" "0,1" bitfld.long 0x4 15. "CH3COMCEN,Channel 3 output compare clear enable" "0,1" bitfld.long 0x4 12.--14. "CH3COMCTL,Channel 3 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "CH3COMSEN,Channel 3 output compare shadow enable" "0,1" newline bitfld.long 0x4 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3" bitfld.long 0x4 7. "CH2COMCEN,Channel 2 output compare clear enable" "0,1" bitfld.long 0x4 4.--6. "CH2COMCTL,Channel 2 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CH2COMSEN,Channel 2 compare output shadow enable" "0,1" bitfld.long 0x4 0.--1. "CH2MS,Channel 2 I/O mode selection" "0,1,2,3" group.long 0x1C++0x2F line.long 0x0 "CHCTL1_Input,Channel control register 1 (input" bitfld.long 0x0 31. "CH3MS_2,2th bit of CH3MS" "0,1" bitfld.long 0x0 30. "CH2MS_2,2th bit of CH2MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "CH3CAPFLT,Channel 3 input capture filter control" bitfld.long 0x0 10.--11. "CH3CAPPSC,Channel 3 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "CH2CAPFLT,Channel 2 input capture filter control" bitfld.long 0x0 2.--3. "CH2CAPPSC,Channel 2 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "CH2MS,Channel 2 mode selection" "0,1,2,3" line.long 0x4 "CHCTL2,Channel control register 2" bitfld.long 0x4 15. "MCH3P,Multi mode channel 3 capture/compare polarity" "0,1" bitfld.long 0x4 14. "MCH3EN,Multi mode channel 3 capture/compare enable" "0,1" bitfld.long 0x4 13. "CH3P,Channel 3 capture/compare function polarity" "0,1" bitfld.long 0x4 12. "CH3EN,Channel 3 capture/compare function enable" "0,1" bitfld.long 0x4 11. "MCH2P,Multi mode channel 2 capture/compare polarity" "0,1" bitfld.long 0x4 10. "MCH2EN,Multi mode channel 2 output enable" "0,1" bitfld.long 0x4 9. "CH2P,Channel 2 capture/compare function polarity" "0,1" newline bitfld.long 0x4 8. "CH2EN,Channel 2 capture/compare function enable" "0,1" bitfld.long 0x4 7. "MCH1P,Multi mode channel 1 output polarity" "0,1" bitfld.long 0x4 6. "MCH1EN,Multi mode channel 1 output enable" "0,1" bitfld.long 0x4 5. "CH1P,Channel 1 capture/compare function polarity" "0,1" bitfld.long 0x4 4. "CH1EN,Channel 1 capture/compare function enable" "0,1" bitfld.long 0x4 3. "MCH0P,Multi mode channel 0 output polarity" "0,1" bitfld.long 0x4 2. "MCH0EN,Multi mode channel 0 capture/compare enable" "0,1" newline bitfld.long 0x4 1. "CH0P,Channel 0 capture/compare function polarity" "0,1" bitfld.long 0x4 0. "CH0EN,Channel 0 capture/compare function enable" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 0.--15. 1. "CNT,current counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value of the counter clock" line.long 0x10 "CAR,Counter auto reload register" hexmask.long.word 0x10 0.--15. 1. "CARL,Counter auto reload value" line.long 0x14 "CREP,Counter repetition register" hexmask.long.byte 0x14 0.--7. 1. "CREP,Counter repetition value" line.long 0x18 "CH0CV,Channel 0 capture/compare value register" hexmask.long.word 0x18 0.--15. 1. "CH0VAL,Capture or compare value of channel0" line.long 0x1C "CH1CV,Channel 1 capture/compare value register" hexmask.long.word 0x1C 0.--15. 1. "CH1VAL,Capture or compare value of channel1" line.long 0x20 "CH2CV,Channel 2 capture/compare value register" hexmask.long.word 0x20 0.--15. 1. "CH2VAL,Capture or compare value of channel 2" line.long 0x24 "CH3CV,Channel 3 capture/compare value register" hexmask.long.word 0x24 0.--15. 1. "CH3VAL,Capture or compare value of channel 3" line.long 0x28 "CCHP,channel complementary protection register" bitfld.long 0x28 15. "POEN,Primary output enable" "0,1" bitfld.long 0x28 14. "OAEN,Output automatic enable" "0,1" bitfld.long 0x28 13. "BRKP,Break polarity" "0,1" bitfld.long 0x28 12. "BRKEN,Break enable" "0,1" bitfld.long 0x28 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x28 10. "IOS,Idle mode off-state configure" "0,1" bitfld.long 0x28 8.--9. "PROT,Complementary register protect control" "0,1,2,3" newline hexmask.long.byte 0x28 0.--7. 1. "DTCFG,Dead time configure" line.long 0x2C "MCHCTL0_Output,Multi mode channel control register 0 (output" bitfld.long 0x2C 31. "MCH1MS_2,Multi mode channel 1 I/O mode selection" "0,1" bitfld.long 0x2C 30. "MCH0MS_2,Multi mode channel 0 I/O mode selection" "0,1" bitfld.long 0x2C 15. "MCH1COMCEN,Multi mode channel 1 output compare clear enable" "0,1" bitfld.long 0x2C 12.--14. "MCH1COMCTL,Multi mode channel 1 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 11. "MCH1COMSEN,Multi mode channel 1 output compare shadow enable" "0,1" bitfld.long 0x2C 8.--9. "MCH1MS,Multi mode channel 1 I/O mode selection" "0,1,2,3" bitfld.long 0x2C 7. "MCH0COMCEN,Multi mode channel 0 output compare clear enable" "0,1" newline bitfld.long 0x2C 4.--6. "MCH0COMCTL,Multi mode channel 0 output compare control" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 3. "MCH0COMSEN,Multi mode channel 0 output compare shadow enable" "0,1" bitfld.long 0x2C 0.--1. "MCH0MS,Multi mode channel 0 I/O mode selection" "0,1,2,3" group.long 0x48++0x7 line.long 0x0 "MCHCTL0_Input,Multi mode channel control register 0 (input" bitfld.long 0x0 31. "MCH1MS_2,Multi mode channel 1 I/O mode selection" "0,1" bitfld.long 0x0 30. "MCH0MS_2,Multi mode channel 0 I/O mode selection" "0,1" hexmask.long.byte 0x0 12.--15. 1. "MCH1CAPFLT,Multi mode channel 1 input capture filter control" bitfld.long 0x0 10.--11. "MCH1CAPPSC,Multi mode channel 1 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "MCH1MS,Multi mode channel 1 I/O mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "MCH0CAPFLT,Multi mode channel 0 input capture filter control" bitfld.long 0x0 2.--3. "MCH0CAPPSC,Multi mode channel 0 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "MCH0MS,Multi mode channel 0 I/O mode selection" "0,1,2,3" line.long 0x4 "MCHCTL1_Output,Multi mode channel control register 1 (output" bitfld.long 0x4 31. "MCH3MS_2,2th bit of MCH3MS" "0,1" bitfld.long 0x4 30. "MCH2MS_2,2th bit of MCH2MS" "0,1" bitfld.long 0x4 15. "MCH3COMCEN,Multi mode channel 3 output compare clear enable" "0,1" bitfld.long 0x4 12.--14. "MCH3COMCTL,Multi mode channel 3 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "MCH3COMSEN,Multi mode channel 3 output compare shadow enable" "0,1" bitfld.long 0x4 8.--9. "MCH3MS,Multi mode channel 3 I/O mode selection" "0,1,2,3" bitfld.long 0x4 7. "MCH2COMCEN,Multi mode channel 2 output compare clear enable" "0,1" newline bitfld.long 0x4 4.--6. "MCH2COMCTL,Multi mode channel 2 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "MCH2COMSEN,Multi mode channel 2 output compare shadow enable" "0,1" bitfld.long 0x4 0.--1. "MCH2MS,Multi mode channel 2 I/O mode selection" "0,1,2,3" group.long 0x4C++0x3F line.long 0x0 "MCHCTL1_Input,Multi mode channel control register 1(input" bitfld.long 0x0 31. "MCH3MS_2,2th bit of MCH3MS" "0,1" bitfld.long 0x0 30. "MCH2MS_2,2th bit of MCH2MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "MCH3CAPFLT,Multi mode channel 3 input capture filter control" bitfld.long 0x0 10.--11. "MCH3CAPPSC,Multi mode channel 3 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "MCH3MS,Multi mode channel 3 I/O mode selection." "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "MCH2CAPFLT,Multi mode channel 2 input capture filter control" bitfld.long 0x0 2.--3. "MCH2CAPPSC,Multi mode channel 2 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "MCH2MS,Multi mode channel 2 I/O mode selection" "0,1,2,3" line.long 0x4 "MCHCTL2,Multi mode channel control register 2" bitfld.long 0x4 6.--7. "MCH3FP,Multi mode channel 3 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 4.--5. "MCH2FP,Multi mode channel 2 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 2.--3. "MCH1FP,Multi mode channel 1 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 0.--1. "MCH0FP,Multi mode channel 0 capture/compare free polarity" "0,1,2,3" line.long 0x8 "MCH0CV,Multi mode channel 0 capture/compare value register" hexmask.long.word 0x8 0.--15. 1. "MCH0VAL,Capture/compare value of multi mode channel 0" line.long 0xC "MCH1CV,Multi mode channel 1 capture/compare value register" hexmask.long.word 0xC 0.--15. 1. "MCH1VAL,Capture/compare value of multi mode channel 1" line.long 0x10 "MCH2CV,Multi mode channel 2 capture/compare value register" hexmask.long.word 0x10 0.--15. 1. "MCH2VAL,Capture/compare value of multi mode channel 2" line.long 0x14 "MCH3VAL,Capture/compare value of multi mode channel 3" hexmask.long.word 0x14 0.--15. 1. "MCH3VAL,Capture/compare value of channel 3" line.long 0x18 "CH0COMV_ADD,Channel 0 additional compare value register" hexmask.long.word 0x18 0.--15. 1. "CH0COMVAL_ADD,Additional compare value of channel 0" line.long 0x1C "CH1COMV_ADD,Channel 1 additional compare value register" hexmask.long.word 0x1C 0.--15. 1. "CH1COMVAL_ADD,Additional compare value of channel 1" line.long 0x20 "CH2COMV_ADD,Channel 2 additional compare value register" hexmask.long.word 0x20 0.--15. 1. "CH2COMVAL_ADD,Additional compare value of channel 2" line.long 0x24 "CH3COMV_ADD,Channel 3 additional compare value register" hexmask.long.word 0x24 0.--15. 1. "CH3COMVAL_ADD,Additional compare value of channel 3" line.long 0x28 "CTL2,Control register 2" bitfld.long 0x28 31. "CH3CPWMEN,Channel 3 composite PWM mode enable" "0,1" bitfld.long 0x28 30. "CH2CPWMEN,Channel 2 composite PWM mode enable" "0,1" bitfld.long 0x28 29. "CH1CPWMEN,Channel 1 composite PWM mode enable" "0,1" bitfld.long 0x28 28. "CH0CPWMEN,Channel 0 composite PWM mode enable" "0,1" bitfld.long 0x28 26.--27. "MCH3MSEL,Multi mode channel 3 mode select" "0,1,2,3" bitfld.long 0x28 24.--25. "MCH2MSEL,Multi mode channel 2 mode select" "0,1,2,3" bitfld.long 0x28 22.--23. "MCH1MSEL,Multi mode channel 1 mode select" "0,1,2,3" newline bitfld.long 0x28 20.--21. "MCH0MSEL,Multi mode channel 0 mode select" "0,1,2,3" bitfld.long 0x28 14.--15. "CH3OMPSEL,Channel 3 output match pulse select" "0,1,2,3" bitfld.long 0x28 12.--13. "CH2OMPSEL,Channel 2 output match pulse select" "0,1,2,3" bitfld.long 0x28 10.--11. "CH1OMPSEL,Channel 1 output match pulse select" "0,1,2,3" bitfld.long 0x28 8.--9. "CH0OMPSEL,Channel 0 output match pulse select" "0,1,2,3" bitfld.long 0x28 7. "BRKENCH3,Break control enable for channel 3" "0,1" bitfld.long 0x28 6. "BRKENCH2,Break control enable for channel 2" "0,1" newline bitfld.long 0x28 5. "BRKENCH1,Break control enable for channel 1" "0,1" bitfld.long 0x28 4. "BRKENCH0,Break control enable for channel 0" "0,1" bitfld.long 0x28 3. "DTIENCH3,Dead time inserted enable for channel 3" "0,1" bitfld.long 0x28 2. "DTIENCH2,Dead time inserted enable for channel 2" "0,1" bitfld.long 0x28 1. "DTIENCH1,Dead time inserted enable for channel 1" "0,1" bitfld.long 0x28 0. "DTIENCH0,Dead time inserted enable for channel 0" "0,1" line.long 0x2C "BRKCFG,Break configuration register" bitfld.long 0x2C 31. "BRK3P,BRKIN3 input signal polarity" "0,1" bitfld.long 0x2C 30. "BRK3EN,BRKIN3 input signal enable" "0,1" bitfld.long 0x2C 29. "BRK2P,BRKIN2 input signal polarity" "0,1" bitfld.long 0x2C 28. "BRK2EN,BRKIN2 input signal enable" "0,1" bitfld.long 0x2C 27. "BRK1P,BRKIN1 input signal polarity" "0,1" bitfld.long 0x2C 26. "BRK1EN,BRKIN1 input signal enable" "0,1" bitfld.long 0x2C 25. "BRK0P,BRKIN0 input signal polarity" "0,1" newline bitfld.long 0x2C 24. "BRK0EN,BRKIN0 input signal enable" "0,1" hexmask.long.byte 0x2C 12.--15. 1. "BRK3F,BRKIN3 input signal filter" hexmask.long.byte 0x2C 8.--11. 1. "BRK2F,BRKIN2 input signal filter" hexmask.long.byte 0x2C 4.--7. 1. "BRK1F,BRKIN1 input signal filter" hexmask.long.byte 0x2C 0.--3. 1. "BRK0F,BRKIN0 input signal filter" line.long 0x30 "FCCHP0,Free complementary channel protection register 0" bitfld.long 0x30 31. "FCCHP0EN,Free complementary channel protection register 0 enable" "0,1" bitfld.long 0x30 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x30 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x30 0.--7. 1. "DTCFG,Dead time configure" line.long 0x34 "FCCHP1,Free complementary channel protection register 1" bitfld.long 0x34 31. "FCCHP1EN,Free complementary channel protection register 1 enable" "0,1" bitfld.long 0x34 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x34 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x34 0.--7. 1. "DTCFG,Dead time configure" line.long 0x38 "FCCHP2,Free complementary channel protection register 2" bitfld.long 0x38 31. "FCCHP2EN,Free complementary channel protection register 2 enable" "0,1" bitfld.long 0x38 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x38 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x38 0.--7. 1. "DTCFG,Dead time configure" line.long 0x3C "FCCHP3,Free complementary channel protection register 3" bitfld.long 0x3C 31. "FCCHP3EN,Free complementary channel protection register 3 enable" "0,1" bitfld.long 0x3C 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x3C 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x3C 0.--7. 1. "DTCFG,Dead time configure" group.long 0xE0++0x7 line.long 0x0 "DMACFG,DMA configuration register" hexmask.long.byte 0x0 8.--12. 1. "DMATC,DMA transfer count" hexmask.long.byte 0x0 0.--4. 1. "DMATA,DMA transfer access start address" line.long 0x4 "DMATB,DMA transfer buffer register" hexmask.long.word 0x4 0.--15. 1. "DMATB,DMA transfer buffer" group.long 0xFC++0x3 line.long 0x0 "CFG,Configuration register" bitfld.long 0x0 1. "CHVSEL,Write CHxVAL register selection" "0,1" bitfld.long 0x0 0. "OUTSEL,The output value selection" "0,1" tree.end tree "TIMER19 (Advanced Timer)" base ad:0x40015000 group.long 0x0++0x13 line.long 0x0 "CTL0,control register 0" bitfld.long 0x0 8.--9. "CKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARSE,Auto-reload shadow enable" "0,1" bitfld.long 0x0 5.--6. "CAM,Counter aligns mode" "0,1,2,3" bitfld.long 0x0 4. "DIR,Direction" "0,1" bitfld.long 0x0 3. "SPM,Single pulse mode" "0,1" bitfld.long 0x0 2. "UPS,Update source" "0,1" bitfld.long 0x0 1. "UPDIS,Update disable" "0,1" newline bitfld.long 0x0 0. "CEN,Counter enable" "0,1" line.long 0x4 "CTL1,control register 1" bitfld.long 0x4 15. "ISO3N,Idle state of channel 3 complementary output" "0,1" bitfld.long 0x4 14. "ISO3,Idle state of channel 3 output" "0,1" bitfld.long 0x4 13. "ISO2N,Idle state of channel 2 complementary output" "0,1" bitfld.long 0x4 12. "ISO2,Idle state of channel 2 output" "0,1" bitfld.long 0x4 11. "ISO1N,Idle state of channel 1 complementary output" "0,1" bitfld.long 0x4 10. "ISO1,Idle state of channel 1 output" "0,1" bitfld.long 0x4 9. "ISO0N,Idle state of channel 0 complementary output" "0,1" newline bitfld.long 0x4 8. "ISO0,Idle state of channel 0 output" "0,1" bitfld.long 0x4 7. "TI0S,Channel 0 trigger input selection" "0,1" bitfld.long 0x4 4.--6. "MMC,Master mode control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "DMAS,DMA request source selection" "0,1" bitfld.long 0x4 2. "CCUC,Commutation control shadow register update control" "0,1" bitfld.long 0x4 0. "CCSE,Commutation control shadow enable" "0,1" line.long 0x8 "SMCFG,slave mode configuration register" bitfld.long 0x8 31. "TRGS_3,3th bit of TRGS" "0,1" bitfld.long 0x8 15. "ETP,External trigger polarity" "0,1" bitfld.long 0x8 14. "SMC1,Part of SMC for enable External clock mode1" "0,1" bitfld.long 0x8 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFC,External trigger filter control" bitfld.long 0x8 7. "MSM,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DMAINTEN,DMA/Interrupt enable register" bitfld.long 0xC 31. "CH3COMADDIE,Channel 3 additional compare interrupt enable" "0,1" bitfld.long 0xC 30. "CH2COMADDIE,Channel 2 additional compare interrupt enable" "0,1" bitfld.long 0xC 29. "CH1COMADDIE,Channel 1 additional compare interrupt enable" "0,1" bitfld.long 0xC 28. "CH0COMADDIE,Channel 0 additional compare interrupt enable" "0,1" bitfld.long 0xC 27. "MCH3DEN,Multi mode channel 3 capture/compare DMA request enable" "0,1" bitfld.long 0xC 26. "MCH2DEN,Multi mode channel 2 capture/compare DMA request enable" "0,1" bitfld.long 0xC 25. "MCH1DEN,Multi mode channel 1 capture/compare DMA request enable" "0,1" newline bitfld.long 0xC 24. "MCH0DEN,Multi mode channel 0 capture/compare DMA request enable" "0,1" bitfld.long 0xC 23. "MCH3IE,Multi mode channel 3 capture/compare interrupt enable" "0,1" bitfld.long 0xC 22. "MCH2IE,Multi mode channel 2 capture/compare interrupt enable" "0,1" bitfld.long 0xC 21. "MCH1IE,Multi mode channel 1 capture/compare interrupt enable" "0,1" bitfld.long 0xC 20. "MCH0IE,Multi mode channel 0 capture/compare interrupt enable" "0,1" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 13. "CMTDEN,Commutation DMA request enable" "0,1" newline bitfld.long 0xC 12. "CH3DEN,Channel 3 capture/compare DMA request enable" "0,1" bitfld.long 0xC 11. "CH2DEN,Channel 2 capture/compare DMA request enable" "0,1" bitfld.long 0xC 10. "CH1DEN,Channel 1 capture/compare DMA request enable" "0,1" bitfld.long 0xC 9. "CH0DEN,Channel 0 capture/compare DMA request enable" "0,1" bitfld.long 0xC 8. "UPDEN,Update DMA request enable" "0,1" bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0,1" bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0,1" newline bitfld.long 0xC 5. "CMTIE,commutation interrupt enable" "0,1" bitfld.long 0xC 4. "CH3IE,Channel 3 capture/compare interrupt enable" "0,1" bitfld.long 0xC 3. "CH2IE,Channel 2 capture/compare interrupt enable" "0,1" bitfld.long 0xC 2. "CH1IE,Channel 1 capture/compare interrupt enable" "0,1" bitfld.long 0xC 1. "CH0IE,Channel 0 capture/compare interrupt enable" "0,1" bitfld.long 0xC 0. "UPIE,Update interrupt enable" "0,1" line.long 0x10 "INTF,Interrupt flag register" bitfld.long 0x10 31. "CH3COMADDIF,Channel 3 additional compare interrupt flag" "0,1" bitfld.long 0x10 30. "CH2COMADDIF,Channel 2 additional compare interrupt flag" "0,1" bitfld.long 0x10 29. "CH1COMADDIF,Channel 1 additional compare interrupt flag" "0,1" bitfld.long 0x10 28. "CH0COMADDIF,Channel 0 additional compare interrupt flag" "0,1" bitfld.long 0x10 27. "MCH3OF,Multi mode channel 3 over capture flag" "0,1" bitfld.long 0x10 26. "MCH2OF,Multi mode channel 2 over capture flag" "0,1" bitfld.long 0x10 25. "MCH1OF,Multi mode channel 1 over capture flag" "0,1" newline bitfld.long 0x10 24. "MCH0OF,Multi mode channel 0 over capture flag" "0,1" bitfld.long 0x10 23. "MCH3IF,Multi mode channel 3 capture/compare interrupt flag" "0,1" bitfld.long 0x10 22. "MCH2IF,Multi mode channel 2 capture/compare interrupt flag" "0,1" bitfld.long 0x10 21. "MCH1IF,Multi mode channel 1 capture/compare interrupt flag" "0,1" bitfld.long 0x10 20. "MCH0IF,Multi mode channel 0 capture/compare interrupt flag" "0,1" bitfld.long 0x10 12. "CH3OF,Channel 3 over capture flag" "0,1" bitfld.long 0x10 11. "CH2OF,Channel 2 over capture flag" "0,1" newline bitfld.long 0x10 10. "CH1OF,Channel 1 over capture flag" "0,1" bitfld.long 0x10 9. "CH0OF,Channel 0 over capture flag" "0,1" bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0,1" bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0,1" bitfld.long 0x10 5. "CMTIF,Channel commutation interrupt flag" "0,1" bitfld.long 0x10 4. "CH3IF,Channel 3 capture/compare interrupt flag" "0,1" bitfld.long 0x10 3. "CH2IF,Channel 2 capture/compare interrupt flag" "0,1" newline bitfld.long 0x10 2. "CH1IF,Channel 1 capture/compare interrupt flag" "0,1" bitfld.long 0x10 1. "CH0IF,Channel 0 capture/compare interrupt flag" "0,1" bitfld.long 0x10 0. "UPIF,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "SWEVG,Software event generation register" bitfld.long 0x0 31. "CH3COMADDG,Channel 3 additional compare event generation" "0,1" bitfld.long 0x0 30. "CH2COMADDG,Channel 2 additional compare event generation" "0,1" bitfld.long 0x0 29. "CH1COMADDG,Channel 1 additional compare event generation" "0,1" bitfld.long 0x0 28. "CH0COMADDG,Channel 0 additional compare event generation" "0,1" bitfld.long 0x0 23. "MCH3G,Multi mode channel 3 capture or compare event generation" "0,1" bitfld.long 0x0 22. "MCH2G,Multi mode channel 2 capture or compare event generation" "0,1" bitfld.long 0x0 21. "MCH1G,Multi mode channel 1 capture or compare event generation" "0,1" newline bitfld.long 0x0 20. "MCH0G,Multi mode channel 0 capture or compare event generation" "0,1" bitfld.long 0x0 7. "BRKG,Break event generation" "0,1" bitfld.long 0x0 6. "TRGG,Trigger event generation" "0,1" bitfld.long 0x0 5. "CMTG,Channel commutation event generation" "0,1" bitfld.long 0x0 4. "CH3G,Channel 3 capture or compare event generation" "0,1" bitfld.long 0x0 3. "CH2G,Channel 2 capture or compare event generation" "0,1" bitfld.long 0x0 2. "CH1G,Channel 1 capture or compare event generation" "0,1" newline bitfld.long 0x0 1. "CH0G,Channel 0 capture or compare event generation" "0,1" bitfld.long 0x0 0. "UPG,Update event generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CHCTL0_Output,Channel control register 0 (output" bitfld.long 0x0 31. "CH1MS_2,2th bit of CH1MS" "0,1" bitfld.long 0x0 30. "CH0MS_2,2th bit of CH0MS" "0,1" bitfld.long 0x0 29. "CH1COMADDSEN,Channel 1 additional compare output shadow enable" "0,1" bitfld.long 0x0 28. "CH0COMADDSEN,Channel 0 additional compare output shadow enable" "0,1" bitfld.long 0x0 15. "CH1COMCEN,Channel 1 output compare clear enable" "0,1" bitfld.long 0x0 12.--14. "CH1COMCTL,Channel 1 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "CH1COMSEN,Channel 1 output compare shadow enable" "0,1" newline bitfld.long 0x0 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3" bitfld.long 0x0 7. "CH0COMCEN,Channel 0 output compare clear enable" "0,1" bitfld.long 0x0 4.--6. "CH0COMCTL,Channel 0 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "CH0COMSEN,Channel 0 compare output shadow enable" "0,1" bitfld.long 0x0 0.--1. "CH0MS,Channel 0 I/O mode selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CHCTL0_Input,Channel control register 0 (input" bitfld.long 0x0 31. "CH1MS_2,2th bit of CH1MS" "0,1" bitfld.long 0x0 30. "CH0MS_2,2th bit of CH0MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "CH1CAPFLT,Channel 1 input capture filter control" bitfld.long 0x0 10.--11. "CH1CAPPSC,Channel 1 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "CH0CAPFLT,Channel 0 input capture filter control" bitfld.long 0x0 2.--3. "CH0CAPPSC,Channel 0 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "CH0MS,Channel 0 mode selection" "0,1,2,3" line.long 0x4 "CHCTL1_Output,Channel control register 1 (output" bitfld.long 0x4 31. "CH3MS_2,2th bit of CH3MS" "0,1" bitfld.long 0x4 30. "CH2MS_2,2th bit of CH2MS" "0,1" bitfld.long 0x4 29. "CH3COMADDSEN,Channel 3 additional compare output shadow enable" "0,1" bitfld.long 0x4 28. "CH2COMADDSEN,Channel 2 additional compare output shadow enable" "0,1" bitfld.long 0x4 15. "CH3COMCEN,Channel 3 output compare clear enable" "0,1" bitfld.long 0x4 12.--14. "CH3COMCTL,Channel 3 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "CH3COMSEN,Channel 3 output compare shadow enable" "0,1" newline bitfld.long 0x4 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3" bitfld.long 0x4 7. "CH2COMCEN,Channel 2 output compare clear enable" "0,1" bitfld.long 0x4 4.--6. "CH2COMCTL,Channel 2 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CH2COMSEN,Channel 2 compare output shadow enable" "0,1" bitfld.long 0x4 0.--1. "CH2MS,Channel 2 I/O mode selection" "0,1,2,3" group.long 0x1C++0x2F line.long 0x0 "CHCTL1_Input,Channel control register 1 (input" bitfld.long 0x0 31. "CH3MS_2,2th bit of CH3MS" "0,1" bitfld.long 0x0 30. "CH2MS_2,2th bit of CH2MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "CH3CAPFLT,Channel 3 input capture filter control" bitfld.long 0x0 10.--11. "CH3CAPPSC,Channel 3 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "CH2CAPFLT,Channel 2 input capture filter control" bitfld.long 0x0 2.--3. "CH2CAPPSC,Channel 2 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "CH2MS,Channel 2 mode selection" "0,1,2,3" line.long 0x4 "CHCTL2,Channel control register 2" bitfld.long 0x4 15. "MCH3P,Multi mode channel 3 capture/compare polarity" "0,1" bitfld.long 0x4 14. "MCH3EN,Multi mode channel 3 capture/compare enable" "0,1" bitfld.long 0x4 13. "CH3P,Channel 3 capture/compare function polarity" "0,1" bitfld.long 0x4 12. "CH3EN,Channel 3 capture/compare function enable" "0,1" bitfld.long 0x4 11. "MCH2P,Multi mode channel 2 capture/compare polarity" "0,1" bitfld.long 0x4 10. "MCH2EN,Multi mode channel 2 output enable" "0,1" bitfld.long 0x4 9. "CH2P,Channel 2 capture/compare function polarity" "0,1" newline bitfld.long 0x4 8. "CH2EN,Channel 2 capture/compare function enable" "0,1" bitfld.long 0x4 7. "MCH1P,Multi mode channel 1 output polarity" "0,1" bitfld.long 0x4 6. "MCH1EN,Multi mode channel 1 output enable" "0,1" bitfld.long 0x4 5. "CH1P,Channel 1 capture/compare function polarity" "0,1" bitfld.long 0x4 4. "CH1EN,Channel 1 capture/compare function enable" "0,1" bitfld.long 0x4 3. "MCH0P,Multi mode channel 0 output polarity" "0,1" bitfld.long 0x4 2. "MCH0EN,Multi mode channel 0 capture/compare enable" "0,1" newline bitfld.long 0x4 1. "CH0P,Channel 0 capture/compare function polarity" "0,1" bitfld.long 0x4 0. "CH0EN,Channel 0 capture/compare function enable" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 0.--15. 1. "CNT,current counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value of the counter clock" line.long 0x10 "CAR,Counter auto reload register" hexmask.long.word 0x10 0.--15. 1. "CARL,Counter auto reload value" line.long 0x14 "CREP,Counter repetition register" hexmask.long.byte 0x14 0.--7. 1. "CREP,Counter repetition value" line.long 0x18 "CH0CV,Channel 0 capture/compare value register" hexmask.long.word 0x18 0.--15. 1. "CH0VAL,Capture or compare value of channel0" line.long 0x1C "CH1CV,Channel 1 capture/compare value register" hexmask.long.word 0x1C 0.--15. 1. "CH1VAL,Capture or compare value of channel1" line.long 0x20 "CH2CV,Channel 2 capture/compare value register" hexmask.long.word 0x20 0.--15. 1. "CH2VAL,Capture or compare value of channel 2" line.long 0x24 "CH3CV,Channel 3 capture/compare value register" hexmask.long.word 0x24 0.--15. 1. "CH3VAL,Capture or compare value of channel 3" line.long 0x28 "CCHP,channel complementary protection register" bitfld.long 0x28 15. "POEN,Primary output enable" "0,1" bitfld.long 0x28 14. "OAEN,Output automatic enable" "0,1" bitfld.long 0x28 13. "BRKP,Break polarity" "0,1" bitfld.long 0x28 12. "BRKEN,Break enable" "0,1" bitfld.long 0x28 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x28 10. "IOS,Idle mode off-state configure" "0,1" bitfld.long 0x28 8.--9. "PROT,Complementary register protect control" "0,1,2,3" newline hexmask.long.byte 0x28 0.--7. 1. "DTCFG,Dead time configure" line.long 0x2C "MCHCTL0_Output,Multi mode channel control register 0 (output" bitfld.long 0x2C 31. "MCH1MS_2,Multi mode channel 1 I/O mode selection" "0,1" bitfld.long 0x2C 30. "MCH0MS_2,Multi mode channel 0 I/O mode selection" "0,1" bitfld.long 0x2C 15. "MCH1COMCEN,Multi mode channel 1 output compare clear enable" "0,1" bitfld.long 0x2C 12.--14. "MCH1COMCTL,Multi mode channel 1 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 11. "MCH1COMSEN,Multi mode channel 1 output compare shadow enable" "0,1" bitfld.long 0x2C 8.--9. "MCH1MS,Multi mode channel 1 I/O mode selection" "0,1,2,3" bitfld.long 0x2C 7. "MCH0COMCEN,Multi mode channel 0 output compare clear enable" "0,1" newline bitfld.long 0x2C 4.--6. "MCH0COMCTL,Multi mode channel 0 output compare control" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 3. "MCH0COMSEN,Multi mode channel 0 output compare shadow enable" "0,1" bitfld.long 0x2C 0.--1. "MCH0MS,Multi mode channel 0 I/O mode selection" "0,1,2,3" group.long 0x48++0x7 line.long 0x0 "MCHCTL0_Input,Multi mode channel control register 0 (input" bitfld.long 0x0 31. "MCH1MS_2,Multi mode channel 1 I/O mode selection" "0,1" bitfld.long 0x0 30. "MCH0MS_2,Multi mode channel 0 I/O mode selection" "0,1" hexmask.long.byte 0x0 12.--15. 1. "MCH1CAPFLT,Multi mode channel 1 input capture filter control" bitfld.long 0x0 10.--11. "MCH1CAPPSC,Multi mode channel 1 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "MCH1MS,Multi mode channel 1 I/O mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "MCH0CAPFLT,Multi mode channel 0 input capture filter control" bitfld.long 0x0 2.--3. "MCH0CAPPSC,Multi mode channel 0 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "MCH0MS,Multi mode channel 0 I/O mode selection" "0,1,2,3" line.long 0x4 "MCHCTL1_Output,Multi mode channel control register 1 (output" bitfld.long 0x4 31. "MCH3MS_2,2th bit of MCH3MS" "0,1" bitfld.long 0x4 30. "MCH2MS_2,2th bit of MCH2MS" "0,1" bitfld.long 0x4 15. "MCH3COMCEN,Multi mode channel 3 output compare clear enable" "0,1" bitfld.long 0x4 12.--14. "MCH3COMCTL,Multi mode channel 3 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "MCH3COMSEN,Multi mode channel 3 output compare shadow enable" "0,1" bitfld.long 0x4 8.--9. "MCH3MS,Multi mode channel 3 I/O mode selection" "0,1,2,3" bitfld.long 0x4 7. "MCH2COMCEN,Multi mode channel 2 output compare clear enable" "0,1" newline bitfld.long 0x4 4.--6. "MCH2COMCTL,Multi mode channel 2 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "MCH2COMSEN,Multi mode channel 2 output compare shadow enable" "0,1" bitfld.long 0x4 0.--1. "MCH2MS,Multi mode channel 2 I/O mode selection" "0,1,2,3" group.long 0x4C++0x3F line.long 0x0 "MCHCTL1_Input,Multi mode channel control register 1(input" bitfld.long 0x0 31. "MCH3MS_2,2th bit of MCH3MS" "0,1" bitfld.long 0x0 30. "MCH2MS_2,2th bit of MCH2MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "MCH3CAPFLT,Multi mode channel 3 input capture filter control" bitfld.long 0x0 10.--11. "MCH3CAPPSC,Multi mode channel 3 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "MCH3MS,Multi mode channel 3 I/O mode selection." "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "MCH2CAPFLT,Multi mode channel 2 input capture filter control" bitfld.long 0x0 2.--3. "MCH2CAPPSC,Multi mode channel 2 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "MCH2MS,Multi mode channel 2 I/O mode selection" "0,1,2,3" line.long 0x4 "MCHCTL2,Multi mode channel control register 2" bitfld.long 0x4 6.--7. "MCH3FP,Multi mode channel 3 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 4.--5. "MCH2FP,Multi mode channel 2 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 2.--3. "MCH1FP,Multi mode channel 1 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 0.--1. "MCH0FP,Multi mode channel 0 capture/compare free polarity" "0,1,2,3" line.long 0x8 "MCH0CV,Multi mode channel 0 capture/compare value register" hexmask.long.word 0x8 0.--15. 1. "MCH0VAL,Capture/compare value of multi mode channel 0" line.long 0xC "MCH1CV,Multi mode channel 1 capture/compare value register" hexmask.long.word 0xC 0.--15. 1. "MCH1VAL,Capture/compare value of multi mode channel 1" line.long 0x10 "MCH2CV,Multi mode channel 2 capture/compare value register" hexmask.long.word 0x10 0.--15. 1. "MCH2VAL,Capture/compare value of multi mode channel 2" line.long 0x14 "MCH3VAL,Capture/compare value of multi mode channel 3" hexmask.long.word 0x14 0.--15. 1. "MCH3VAL,Capture/compare value of channel 3" line.long 0x18 "CH0COMV_ADD,Channel 0 additional compare value register" hexmask.long.word 0x18 0.--15. 1. "CH0COMVAL_ADD,Additional compare value of channel 0" line.long 0x1C "CH1COMV_ADD,Channel 1 additional compare value register" hexmask.long.word 0x1C 0.--15. 1. "CH1COMVAL_ADD,Additional compare value of channel 1" line.long 0x20 "CH2COMV_ADD,Channel 2 additional compare value register" hexmask.long.word 0x20 0.--15. 1. "CH2COMVAL_ADD,Additional compare value of channel 2" line.long 0x24 "CH3COMV_ADD,Channel 3 additional compare value register" hexmask.long.word 0x24 0.--15. 1. "CH3COMVAL_ADD,Additional compare value of channel 3" line.long 0x28 "CTL2,Control register 2" bitfld.long 0x28 31. "CH3CPWMEN,Channel 3 composite PWM mode enable" "0,1" bitfld.long 0x28 30. "CH2CPWMEN,Channel 2 composite PWM mode enable" "0,1" bitfld.long 0x28 29. "CH1CPWMEN,Channel 1 composite PWM mode enable" "0,1" bitfld.long 0x28 28. "CH0CPWMEN,Channel 0 composite PWM mode enable" "0,1" bitfld.long 0x28 26.--27. "MCH3MSEL,Multi mode channel 3 mode select" "0,1,2,3" bitfld.long 0x28 24.--25. "MCH2MSEL,Multi mode channel 2 mode select" "0,1,2,3" bitfld.long 0x28 22.--23. "MCH1MSEL,Multi mode channel 1 mode select" "0,1,2,3" newline bitfld.long 0x28 20.--21. "MCH0MSEL,Multi mode channel 0 mode select" "0,1,2,3" bitfld.long 0x28 14.--15. "CH3OMPSEL,Channel 3 output match pulse select" "0,1,2,3" bitfld.long 0x28 12.--13. "CH2OMPSEL,Channel 2 output match pulse select" "0,1,2,3" bitfld.long 0x28 10.--11. "CH1OMPSEL,Channel 1 output match pulse select" "0,1,2,3" bitfld.long 0x28 8.--9. "CH0OMPSEL,Channel 0 output match pulse select" "0,1,2,3" bitfld.long 0x28 7. "BRKENCH3,Break control enable for channel 3" "0,1" bitfld.long 0x28 6. "BRKENCH2,Break control enable for channel 2" "0,1" newline bitfld.long 0x28 5. "BRKENCH1,Break control enable for channel 1" "0,1" bitfld.long 0x28 4. "BRKENCH0,Break control enable for channel 0" "0,1" bitfld.long 0x28 3. "DTIENCH3,Dead time inserted enable for channel 3" "0,1" bitfld.long 0x28 2. "DTIENCH2,Dead time inserted enable for channel 2" "0,1" bitfld.long 0x28 1. "DTIENCH1,Dead time inserted enable for channel 1" "0,1" bitfld.long 0x28 0. "DTIENCH0,Dead time inserted enable for channel 0" "0,1" line.long 0x2C "BRKCFG,Break configuration register" bitfld.long 0x2C 31. "BRK3P,BRKIN3 input signal polarity" "0,1" bitfld.long 0x2C 30. "BRK3EN,BRKIN3 input signal enable" "0,1" bitfld.long 0x2C 29. "BRK2P,BRKIN2 input signal polarity" "0,1" bitfld.long 0x2C 28. "BRK2EN,BRKIN2 input signal enable" "0,1" bitfld.long 0x2C 27. "BRK1P,BRKIN1 input signal polarity" "0,1" bitfld.long 0x2C 26. "BRK1EN,BRKIN1 input signal enable" "0,1" bitfld.long 0x2C 25. "BRK0P,BRKIN0 input signal polarity" "0,1" newline bitfld.long 0x2C 24. "BRK0EN,BRKIN0 input signal enable" "0,1" hexmask.long.byte 0x2C 12.--15. 1. "BRK3F,BRKIN3 input signal filter" hexmask.long.byte 0x2C 8.--11. 1. "BRK2F,BRKIN2 input signal filter" hexmask.long.byte 0x2C 4.--7. 1. "BRK1F,BRKIN1 input signal filter" hexmask.long.byte 0x2C 0.--3. 1. "BRK0F,BRKIN0 input signal filter" line.long 0x30 "FCCHP0,Free complementary channel protection register 0" bitfld.long 0x30 31. "FCCHP0EN,Free complementary channel protection register 0 enable" "0,1" bitfld.long 0x30 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x30 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x30 0.--7. 1. "DTCFG,Dead time configure" line.long 0x34 "FCCHP1,Free complementary channel protection register 1" bitfld.long 0x34 31. "FCCHP1EN,Free complementary channel protection register 1 enable" "0,1" bitfld.long 0x34 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x34 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x34 0.--7. 1. "DTCFG,Dead time configure" line.long 0x38 "FCCHP2,Free complementary channel protection register 2" bitfld.long 0x38 31. "FCCHP2EN,Free complementary channel protection register 2 enable" "0,1" bitfld.long 0x38 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x38 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x38 0.--7. 1. "DTCFG,Dead time configure" line.long 0x3C "FCCHP3,Free complementary channel protection register 3" bitfld.long 0x3C 31. "FCCHP3EN,Free complementary channel protection register 3 enable" "0,1" bitfld.long 0x3C 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x3C 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x3C 0.--7. 1. "DTCFG,Dead time configure" group.long 0xE0++0x7 line.long 0x0 "DMACFG,DMA configuration register" hexmask.long.byte 0x0 8.--12. 1. "DMATC,DMA transfer count" hexmask.long.byte 0x0 0.--4. 1. "DMATA,DMA transfer access start address" line.long 0x4 "DMATB,DMA transfer buffer register" hexmask.long.word 0x4 0.--15. 1. "DMATB,DMA transfer buffer" group.long 0xFC++0x3 line.long 0x0 "CFG,Configuration register" bitfld.long 0x0 1. "CHVSEL,Write CHxVAL register selection" "0,1" bitfld.long 0x0 0. "OUTSEL,The output value selection" "0,1" tree.end tree "TIMER20 (Advanced Timer)" base ad:0x40015400 group.long 0x0++0x13 line.long 0x0 "CTL0,control register 0" bitfld.long 0x0 8.--9. "CKDIV,Clock division" "0,1,2,3" bitfld.long 0x0 7. "ARSE,Auto-reload shadow enable" "0,1" bitfld.long 0x0 5.--6. "CAM,Counter aligns mode" "0,1,2,3" bitfld.long 0x0 4. "DIR,Direction" "0,1" bitfld.long 0x0 3. "SPM,Single pulse mode" "0,1" bitfld.long 0x0 2. "UPS,Update source" "0,1" bitfld.long 0x0 1. "UPDIS,Update disable" "0,1" newline bitfld.long 0x0 0. "CEN,Counter enable" "0,1" line.long 0x4 "CTL1,control register 1" bitfld.long 0x4 15. "ISO3N,Idle state of channel 3 complementary output" "0,1" bitfld.long 0x4 14. "ISO3,Idle state of channel 3 output" "0,1" bitfld.long 0x4 13. "ISO2N,Idle state of channel 2 complementary output" "0,1" bitfld.long 0x4 12. "ISO2,Idle state of channel 2 output" "0,1" bitfld.long 0x4 11. "ISO1N,Idle state of channel 1 complementary output" "0,1" bitfld.long 0x4 10. "ISO1,Idle state of channel 1 output" "0,1" bitfld.long 0x4 9. "ISO0N,Idle state of channel 0 complementary output" "0,1" newline bitfld.long 0x4 8. "ISO0,Idle state of channel 0 output" "0,1" bitfld.long 0x4 7. "TI0S,Channel 0 trigger input selection" "0,1" bitfld.long 0x4 4.--6. "MMC,Master mode control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "DMAS,DMA request source selection" "0,1" bitfld.long 0x4 2. "CCUC,Commutation control shadow register update control" "0,1" bitfld.long 0x4 0. "CCSE,Commutation control shadow enable" "0,1" line.long 0x8 "SMCFG,slave mode configuration register" bitfld.long 0x8 31. "TRGS_3,3th bit of TRGS" "0,1" bitfld.long 0x8 15. "ETP,External trigger polarity" "0,1" bitfld.long 0x8 14. "SMC1,Part of SMC for enable External clock mode1" "0,1" bitfld.long 0x8 12.--13. "ETPSC,External trigger prescaler" "0,1,2,3" hexmask.long.byte 0x8 8.--11. 1. "ETFC,External trigger filter control" bitfld.long 0x8 7. "MSM,Master/Slave mode" "0,1" bitfld.long 0x8 4.--6. "TRGS,Trigger selection" "0,1,2,3,4,5,6,7" newline bitfld.long 0x8 0.--2. "SMC,Slave mode selection" "0,1,2,3,4,5,6,7" line.long 0xC "DMAINTEN,DMA/Interrupt enable register" bitfld.long 0xC 31. "CH3COMADDIE,Channel 3 additional compare interrupt enable" "0,1" bitfld.long 0xC 30. "CH2COMADDIE,Channel 2 additional compare interrupt enable" "0,1" bitfld.long 0xC 29. "CH1COMADDIE,Channel 1 additional compare interrupt enable" "0,1" bitfld.long 0xC 28. "CH0COMADDIE,Channel 0 additional compare interrupt enable" "0,1" bitfld.long 0xC 27. "MCH3DEN,Multi mode channel 3 capture/compare DMA request enable" "0,1" bitfld.long 0xC 26. "MCH2DEN,Multi mode channel 2 capture/compare DMA request enable" "0,1" bitfld.long 0xC 25. "MCH1DEN,Multi mode channel 1 capture/compare DMA request enable" "0,1" newline bitfld.long 0xC 24. "MCH0DEN,Multi mode channel 0 capture/compare DMA request enable" "0,1" bitfld.long 0xC 23. "MCH3IE,Multi mode channel 3 capture/compare interrupt enable" "0,1" bitfld.long 0xC 22. "MCH2IE,Multi mode channel 2 capture/compare interrupt enable" "0,1" bitfld.long 0xC 21. "MCH1IE,Multi mode channel 1 capture/compare interrupt enable" "0,1" bitfld.long 0xC 20. "MCH0IE,Multi mode channel 0 capture/compare interrupt enable" "0,1" bitfld.long 0xC 14. "TRGDEN,Trigger DMA request enable" "0,1" bitfld.long 0xC 13. "CMTDEN,Commutation DMA request enable" "0,1" newline bitfld.long 0xC 12. "CH3DEN,Channel 3 capture/compare DMA request enable" "0,1" bitfld.long 0xC 11. "CH2DEN,Channel 2 capture/compare DMA request enable" "0,1" bitfld.long 0xC 10. "CH1DEN,Channel 1 capture/compare DMA request enable" "0,1" bitfld.long 0xC 9. "CH0DEN,Channel 0 capture/compare DMA request enable" "0,1" bitfld.long 0xC 8. "UPDEN,Update DMA request enable" "0,1" bitfld.long 0xC 7. "BRKIE,Break interrupt enable" "0,1" bitfld.long 0xC 6. "TRGIE,Trigger interrupt enable" "0,1" newline bitfld.long 0xC 5. "CMTIE,commutation interrupt enable" "0,1" bitfld.long 0xC 4. "CH3IE,Channel 3 capture/compare interrupt enable" "0,1" bitfld.long 0xC 3. "CH2IE,Channel 2 capture/compare interrupt enable" "0,1" bitfld.long 0xC 2. "CH1IE,Channel 1 capture/compare interrupt enable" "0,1" bitfld.long 0xC 1. "CH0IE,Channel 0 capture/compare interrupt enable" "0,1" bitfld.long 0xC 0. "UPIE,Update interrupt enable" "0,1" line.long 0x10 "INTF,Interrupt flag register" bitfld.long 0x10 31. "CH3COMADDIF,Channel 3 additional compare interrupt flag" "0,1" bitfld.long 0x10 30. "CH2COMADDIF,Channel 2 additional compare interrupt flag" "0,1" bitfld.long 0x10 29. "CH1COMADDIF,Channel 1 additional compare interrupt flag" "0,1" bitfld.long 0x10 28. "CH0COMADDIF,Channel 0 additional compare interrupt flag" "0,1" bitfld.long 0x10 27. "MCH3OF,Multi mode channel 3 over capture flag" "0,1" bitfld.long 0x10 26. "MCH2OF,Multi mode channel 2 over capture flag" "0,1" bitfld.long 0x10 25. "MCH1OF,Multi mode channel 1 over capture flag" "0,1" newline bitfld.long 0x10 24. "MCH0OF,Multi mode channel 0 over capture flag" "0,1" bitfld.long 0x10 23. "MCH3IF,Multi mode channel 3 capture/compare interrupt flag" "0,1" bitfld.long 0x10 22. "MCH2IF,Multi mode channel 2 capture/compare interrupt flag" "0,1" bitfld.long 0x10 21. "MCH1IF,Multi mode channel 1 capture/compare interrupt flag" "0,1" bitfld.long 0x10 20. "MCH0IF,Multi mode channel 0 capture/compare interrupt flag" "0,1" bitfld.long 0x10 12. "CH3OF,Channel 3 over capture flag" "0,1" bitfld.long 0x10 11. "CH2OF,Channel 2 over capture flag" "0,1" newline bitfld.long 0x10 10. "CH1OF,Channel 1 over capture flag" "0,1" bitfld.long 0x10 9. "CH0OF,Channel 0 over capture flag" "0,1" bitfld.long 0x10 7. "BRKIF,Break interrupt flag" "0,1" bitfld.long 0x10 6. "TRGIF,Trigger interrupt flag" "0,1" bitfld.long 0x10 5. "CMTIF,Channel commutation interrupt flag" "0,1" bitfld.long 0x10 4. "CH3IF,Channel 3 capture/compare interrupt flag" "0,1" bitfld.long 0x10 3. "CH2IF,Channel 2 capture/compare interrupt flag" "0,1" newline bitfld.long 0x10 2. "CH1IF,Channel 1 capture/compare interrupt flag" "0,1" bitfld.long 0x10 1. "CH0IF,Channel 0 capture/compare interrupt flag" "0,1" bitfld.long 0x10 0. "UPIF,Update interrupt flag" "0,1" wgroup.long 0x14++0x3 line.long 0x0 "SWEVG,Software event generation register" bitfld.long 0x0 31. "CH3COMADDG,Channel 3 additional compare event generation" "0,1" bitfld.long 0x0 30. "CH2COMADDG,Channel 2 additional compare event generation" "0,1" bitfld.long 0x0 29. "CH1COMADDG,Channel 1 additional compare event generation" "0,1" bitfld.long 0x0 28. "CH0COMADDG,Channel 0 additional compare event generation" "0,1" bitfld.long 0x0 23. "MCH3G,Multi mode channel 3 capture or compare event generation" "0,1" bitfld.long 0x0 22. "MCH2G,Multi mode channel 2 capture or compare event generation" "0,1" bitfld.long 0x0 21. "MCH1G,Multi mode channel 1 capture or compare event generation" "0,1" newline bitfld.long 0x0 20. "MCH0G,Multi mode channel 0 capture or compare event generation" "0,1" bitfld.long 0x0 7. "BRKG,Break event generation" "0,1" bitfld.long 0x0 6. "TRGG,Trigger event generation" "0,1" bitfld.long 0x0 5. "CMTG,Channel commutation event generation" "0,1" bitfld.long 0x0 4. "CH3G,Channel 3 capture or compare event generation" "0,1" bitfld.long 0x0 3. "CH2G,Channel 2 capture or compare event generation" "0,1" bitfld.long 0x0 2. "CH1G,Channel 1 capture or compare event generation" "0,1" newline bitfld.long 0x0 1. "CH0G,Channel 0 capture or compare event generation" "0,1" bitfld.long 0x0 0. "UPG,Update event generation" "0,1" group.long 0x18++0x3 line.long 0x0 "CHCTL0_Output,Channel control register 0 (output" bitfld.long 0x0 31. "CH1MS_2,2th bit of CH1MS" "0,1" bitfld.long 0x0 30. "CH0MS_2,2th bit of CH0MS" "0,1" bitfld.long 0x0 29. "CH1COMADDSEN,Channel 1 additional compare output shadow enable" "0,1" bitfld.long 0x0 28. "CH0COMADDSEN,Channel 0 additional compare output shadow enable" "0,1" bitfld.long 0x0 15. "CH1COMCEN,Channel 1 output compare clear enable" "0,1" bitfld.long 0x0 12.--14. "CH1COMCTL,Channel 1 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 11. "CH1COMSEN,Channel 1 output compare shadow enable" "0,1" newline bitfld.long 0x0 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3" bitfld.long 0x0 7. "CH0COMCEN,Channel 0 output compare clear enable" "0,1" bitfld.long 0x0 4.--6. "CH0COMCTL,Channel 0 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x0 3. "CH0COMSEN,Channel 0 compare output shadow enable" "0,1" bitfld.long 0x0 0.--1. "CH0MS,Channel 0 I/O mode selection" "0,1,2,3" group.long 0x18++0x7 line.long 0x0 "CHCTL0_Input,Channel control register 0 (input" bitfld.long 0x0 31. "CH1MS_2,2th bit of CH1MS" "0,1" bitfld.long 0x0 30. "CH0MS_2,2th bit of CH0MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "CH1CAPFLT,Channel 1 input capture filter control" bitfld.long 0x0 10.--11. "CH1CAPPSC,Channel 1 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CH1MS,Channel 1 mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "CH0CAPFLT,Channel 0 input capture filter control" bitfld.long 0x0 2.--3. "CH0CAPPSC,Channel 0 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "CH0MS,Channel 0 mode selection" "0,1,2,3" line.long 0x4 "CHCTL1_Output,Channel control register 1 (output" bitfld.long 0x4 31. "CH3MS_2,2th bit of CH3MS" "0,1" bitfld.long 0x4 30. "CH2MS_2,2th bit of CH2MS" "0,1" bitfld.long 0x4 29. "CH3COMADDSEN,Channel 3 additional compare output shadow enable" "0,1" bitfld.long 0x4 28. "CH2COMADDSEN,Channel 2 additional compare output shadow enable" "0,1" bitfld.long 0x4 15. "CH3COMCEN,Channel 3 output compare clear enable" "0,1" bitfld.long 0x4 12.--14. "CH3COMCTL,Channel 3 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "CH3COMSEN,Channel 3 output compare shadow enable" "0,1" newline bitfld.long 0x4 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3" bitfld.long 0x4 7. "CH2COMCEN,Channel 2 output compare clear enable" "0,1" bitfld.long 0x4 4.--6. "CH2COMCTL,Channel 2 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "CH2COMSEN,Channel 2 compare output shadow enable" "0,1" bitfld.long 0x4 0.--1. "CH2MS,Channel 2 I/O mode selection" "0,1,2,3" group.long 0x1C++0x2F line.long 0x0 "CHCTL1_Input,Channel control register 1 (input" bitfld.long 0x0 31. "CH3MS_2,2th bit of CH3MS" "0,1" bitfld.long 0x0 30. "CH2MS_2,2th bit of CH2MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "CH3CAPFLT,Channel 3 input capture filter control" bitfld.long 0x0 10.--11. "CH3CAPPSC,Channel 3 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "CH3MS,Channel 3 mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "CH2CAPFLT,Channel 2 input capture filter control" bitfld.long 0x0 2.--3. "CH2CAPPSC,Channel 2 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "CH2MS,Channel 2 mode selection" "0,1,2,3" line.long 0x4 "CHCTL2,Channel control register 2" bitfld.long 0x4 15. "MCH3P,Multi mode channel 3 capture/compare polarity" "0,1" bitfld.long 0x4 14. "MCH3EN,Multi mode channel 3 capture/compare enable" "0,1" bitfld.long 0x4 13. "CH3P,Channel 3 capture/compare function polarity" "0,1" bitfld.long 0x4 12. "CH3EN,Channel 3 capture/compare function enable" "0,1" bitfld.long 0x4 11. "MCH2P,Multi mode channel 2 capture/compare polarity" "0,1" bitfld.long 0x4 10. "MCH2EN,Multi mode channel 2 output enable" "0,1" bitfld.long 0x4 9. "CH2P,Channel 2 capture/compare function polarity" "0,1" newline bitfld.long 0x4 8. "CH2EN,Channel 2 capture/compare function enable" "0,1" bitfld.long 0x4 7. "MCH1P,Multi mode channel 1 output polarity" "0,1" bitfld.long 0x4 6. "MCH1EN,Multi mode channel 1 output enable" "0,1" bitfld.long 0x4 5. "CH1P,Channel 1 capture/compare function polarity" "0,1" bitfld.long 0x4 4. "CH1EN,Channel 1 capture/compare function enable" "0,1" bitfld.long 0x4 3. "MCH0P,Multi mode channel 0 output polarity" "0,1" bitfld.long 0x4 2. "MCH0EN,Multi mode channel 0 capture/compare enable" "0,1" newline bitfld.long 0x4 1. "CH0P,Channel 0 capture/compare function polarity" "0,1" bitfld.long 0x4 0. "CH0EN,Channel 0 capture/compare function enable" "0,1" line.long 0x8 "CNT,counter" hexmask.long.word 0x8 0.--15. 1. "CNT,current counter value" line.long 0xC "PSC,prescaler" hexmask.long.word 0xC 0.--15. 1. "PSC,Prescaler value of the counter clock" line.long 0x10 "CAR,Counter auto reload register" hexmask.long.word 0x10 0.--15. 1. "CARL,Counter auto reload value" line.long 0x14 "CREP,Counter repetition register" hexmask.long.byte 0x14 0.--7. 1. "CREP,Counter repetition value" line.long 0x18 "CH0CV,Channel 0 capture/compare value register" hexmask.long.word 0x18 0.--15. 1. "CH0VAL,Capture or compare value of channel0" line.long 0x1C "CH1CV,Channel 1 capture/compare value register" hexmask.long.word 0x1C 0.--15. 1. "CH1VAL,Capture or compare value of channel1" line.long 0x20 "CH2CV,Channel 2 capture/compare value register" hexmask.long.word 0x20 0.--15. 1. "CH2VAL,Capture or compare value of channel 2" line.long 0x24 "CH3CV,Channel 3 capture/compare value register" hexmask.long.word 0x24 0.--15. 1. "CH3VAL,Capture or compare value of channel 3" line.long 0x28 "CCHP,channel complementary protection register" bitfld.long 0x28 15. "POEN,Primary output enable" "0,1" bitfld.long 0x28 14. "OAEN,Output automatic enable" "0,1" bitfld.long 0x28 13. "BRKP,Break polarity" "0,1" bitfld.long 0x28 12. "BRKEN,Break enable" "0,1" bitfld.long 0x28 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x28 10. "IOS,Idle mode off-state configure" "0,1" bitfld.long 0x28 8.--9. "PROT,Complementary register protect control" "0,1,2,3" newline hexmask.long.byte 0x28 0.--7. 1. "DTCFG,Dead time configure" line.long 0x2C "MCHCTL0_Output,Multi mode channel control register 0 (output" bitfld.long 0x2C 31. "MCH1MS_2,Multi mode channel 1 I/O mode selection" "0,1" bitfld.long 0x2C 30. "MCH0MS_2,Multi mode channel 0 I/O mode selection" "0,1" bitfld.long 0x2C 15. "MCH1COMCEN,Multi mode channel 1 output compare clear enable" "0,1" bitfld.long 0x2C 12.--14. "MCH1COMCTL,Multi mode channel 1 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 11. "MCH1COMSEN,Multi mode channel 1 output compare shadow enable" "0,1" bitfld.long 0x2C 8.--9. "MCH1MS,Multi mode channel 1 I/O mode selection" "0,1,2,3" bitfld.long 0x2C 7. "MCH0COMCEN,Multi mode channel 0 output compare clear enable" "0,1" newline bitfld.long 0x2C 4.--6. "MCH0COMCTL,Multi mode channel 0 output compare control" "0,1,2,3,4,5,6,7" bitfld.long 0x2C 3. "MCH0COMSEN,Multi mode channel 0 output compare shadow enable" "0,1" bitfld.long 0x2C 0.--1. "MCH0MS,Multi mode channel 0 I/O mode selection" "0,1,2,3" group.long 0x48++0x7 line.long 0x0 "MCHCTL0_Input,Multi mode channel control register 0 (input" bitfld.long 0x0 31. "MCH1MS_2,Multi mode channel 1 I/O mode selection" "0,1" bitfld.long 0x0 30. "MCH0MS_2,Multi mode channel 0 I/O mode selection" "0,1" hexmask.long.byte 0x0 12.--15. 1. "MCH1CAPFLT,Multi mode channel 1 input capture filter control" bitfld.long 0x0 10.--11. "MCH1CAPPSC,Multi mode channel 1 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "MCH1MS,Multi mode channel 1 I/O mode selection" "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "MCH0CAPFLT,Multi mode channel 0 input capture filter control" bitfld.long 0x0 2.--3. "MCH0CAPPSC,Multi mode channel 0 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "MCH0MS,Multi mode channel 0 I/O mode selection" "0,1,2,3" line.long 0x4 "MCHCTL1_Output,Multi mode channel control register 1 (output" bitfld.long 0x4 31. "MCH3MS_2,2th bit of MCH3MS" "0,1" bitfld.long 0x4 30. "MCH2MS_2,2th bit of MCH2MS" "0,1" bitfld.long 0x4 15. "MCH3COMCEN,Multi mode channel 3 output compare clear enable" "0,1" bitfld.long 0x4 12.--14. "MCH3COMCTL,Multi mode channel 3 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 11. "MCH3COMSEN,Multi mode channel 3 output compare shadow enable" "0,1" bitfld.long 0x4 8.--9. "MCH3MS,Multi mode channel 3 I/O mode selection" "0,1,2,3" bitfld.long 0x4 7. "MCH2COMCEN,Multi mode channel 2 output compare clear enable" "0,1" newline bitfld.long 0x4 4.--6. "MCH2COMCTL,Multi mode channel 2 compare output control" "0,1,2,3,4,5,6,7" bitfld.long 0x4 3. "MCH2COMSEN,Multi mode channel 2 output compare shadow enable" "0,1" bitfld.long 0x4 0.--1. "MCH2MS,Multi mode channel 2 I/O mode selection" "0,1,2,3" group.long 0x4C++0x3F line.long 0x0 "MCHCTL1_Input,Multi mode channel control register 1(input" bitfld.long 0x0 31. "MCH3MS_2,2th bit of MCH3MS" "0,1" bitfld.long 0x0 30. "MCH2MS_2,2th bit of MCH2MS" "0,1" hexmask.long.byte 0x0 12.--15. 1. "MCH3CAPFLT,Multi mode channel 3 input capture filter control" bitfld.long 0x0 10.--11. "MCH3CAPPSC,Multi mode channel 3 input capture prescaler" "0,1,2,3" bitfld.long 0x0 8.--9. "MCH3MS,Multi mode channel 3 I/O mode selection." "0,1,2,3" hexmask.long.byte 0x0 4.--7. 1. "MCH2CAPFLT,Multi mode channel 2 input capture filter control" bitfld.long 0x0 2.--3. "MCH2CAPPSC,Multi mode channel 2 input capture prescaler" "0,1,2,3" newline bitfld.long 0x0 0.--1. "MCH2MS,Multi mode channel 2 I/O mode selection" "0,1,2,3" line.long 0x4 "MCHCTL2,Multi mode channel control register 2" bitfld.long 0x4 6.--7. "MCH3FP,Multi mode channel 3 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 4.--5. "MCH2FP,Multi mode channel 2 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 2.--3. "MCH1FP,Multi mode channel 1 capture/compare free polarity" "0,1,2,3" bitfld.long 0x4 0.--1. "MCH0FP,Multi mode channel 0 capture/compare free polarity" "0,1,2,3" line.long 0x8 "MCH0CV,Multi mode channel 0 capture/compare value register" hexmask.long.word 0x8 0.--15. 1. "MCH0VAL,Capture/compare value of multi mode channel 0" line.long 0xC "MCH1CV,Multi mode channel 1 capture/compare value register" hexmask.long.word 0xC 0.--15. 1. "MCH1VAL,Capture/compare value of multi mode channel 1" line.long 0x10 "MCH2CV,Multi mode channel 2 capture/compare value register" hexmask.long.word 0x10 0.--15. 1. "MCH2VAL,Capture/compare value of multi mode channel 2" line.long 0x14 "MCH3VAL,Capture/compare value of multi mode channel 3" hexmask.long.word 0x14 0.--15. 1. "MCH3VAL,Capture/compare value of channel 3" line.long 0x18 "CH0COMV_ADD,Channel 0 additional compare value register" hexmask.long.word 0x18 0.--15. 1. "CH0COMVAL_ADD,Additional compare value of channel 0" line.long 0x1C "CH1COMV_ADD,Channel 1 additional compare value register" hexmask.long.word 0x1C 0.--15. 1. "CH1COMVAL_ADD,Additional compare value of channel 1" line.long 0x20 "CH2COMV_ADD,Channel 2 additional compare value register" hexmask.long.word 0x20 0.--15. 1. "CH2COMVAL_ADD,Additional compare value of channel 2" line.long 0x24 "CH3COMV_ADD,Channel 3 additional compare value register" hexmask.long.word 0x24 0.--15. 1. "CH3COMVAL_ADD,Additional compare value of channel 3" line.long 0x28 "CTL2,Control register 2" bitfld.long 0x28 31. "CH3CPWMEN,Channel 3 composite PWM mode enable" "0,1" bitfld.long 0x28 30. "CH2CPWMEN,Channel 2 composite PWM mode enable" "0,1" bitfld.long 0x28 29. "CH1CPWMEN,Channel 1 composite PWM mode enable" "0,1" bitfld.long 0x28 28. "CH0CPWMEN,Channel 0 composite PWM mode enable" "0,1" bitfld.long 0x28 26.--27. "MCH3MSEL,Multi mode channel 3 mode select" "0,1,2,3" bitfld.long 0x28 24.--25. "MCH2MSEL,Multi mode channel 2 mode select" "0,1,2,3" bitfld.long 0x28 22.--23. "MCH1MSEL,Multi mode channel 1 mode select" "0,1,2,3" newline bitfld.long 0x28 20.--21. "MCH0MSEL,Multi mode channel 0 mode select" "0,1,2,3" bitfld.long 0x28 14.--15. "CH3OMPSEL,Channel 3 output match pulse select" "0,1,2,3" bitfld.long 0x28 12.--13. "CH2OMPSEL,Channel 2 output match pulse select" "0,1,2,3" bitfld.long 0x28 10.--11. "CH1OMPSEL,Channel 1 output match pulse select" "0,1,2,3" bitfld.long 0x28 8.--9. "CH0OMPSEL,Channel 0 output match pulse select" "0,1,2,3" bitfld.long 0x28 7. "BRKENCH3,Break control enable for channel 3" "0,1" bitfld.long 0x28 6. "BRKENCH2,Break control enable for channel 2" "0,1" newline bitfld.long 0x28 5. "BRKENCH1,Break control enable for channel 1" "0,1" bitfld.long 0x28 4. "BRKENCH0,Break control enable for channel 0" "0,1" bitfld.long 0x28 3. "DTIENCH3,Dead time inserted enable for channel 3" "0,1" bitfld.long 0x28 2. "DTIENCH2,Dead time inserted enable for channel 2" "0,1" bitfld.long 0x28 1. "DTIENCH1,Dead time inserted enable for channel 1" "0,1" bitfld.long 0x28 0. "DTIENCH0,Dead time inserted enable for channel 0" "0,1" line.long 0x2C "BRKCFG,Break configuration register" bitfld.long 0x2C 31. "BRK3P,BRKIN3 input signal polarity" "0,1" bitfld.long 0x2C 30. "BRK3EN,BRKIN3 input signal enable" "0,1" bitfld.long 0x2C 29. "BRK2P,BRKIN2 input signal polarity" "0,1" bitfld.long 0x2C 28. "BRK2EN,BRKIN2 input signal enable" "0,1" bitfld.long 0x2C 27. "BRK1P,BRKIN1 input signal polarity" "0,1" bitfld.long 0x2C 26. "BRK1EN,BRKIN1 input signal enable" "0,1" bitfld.long 0x2C 25. "BRK0P,BRKIN0 input signal polarity" "0,1" newline bitfld.long 0x2C 24. "BRK0EN,BRKIN0 input signal enable" "0,1" hexmask.long.byte 0x2C 12.--15. 1. "BRK3F,BRKIN3 input signal filter" hexmask.long.byte 0x2C 8.--11. 1. "BRK2F,BRKIN2 input signal filter" hexmask.long.byte 0x2C 4.--7. 1. "BRK1F,BRKIN1 input signal filter" hexmask.long.byte 0x2C 0.--3. 1. "BRK0F,BRKIN0 input signal filter" line.long 0x30 "FCCHP0,Free complementary channel protection register 0" bitfld.long 0x30 31. "FCCHP0EN,Free complementary channel protection register 0 enable" "0,1" bitfld.long 0x30 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x30 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x30 0.--7. 1. "DTCFG,Dead time configure" line.long 0x34 "FCCHP1,Free complementary channel protection register 1" bitfld.long 0x34 31. "FCCHP1EN,Free complementary channel protection register 1 enable" "0,1" bitfld.long 0x34 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x34 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x34 0.--7. 1. "DTCFG,Dead time configure" line.long 0x38 "FCCHP2,Free complementary channel protection register 2" bitfld.long 0x38 31. "FCCHP2EN,Free complementary channel protection register 2 enable" "0,1" bitfld.long 0x38 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x38 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x38 0.--7. 1. "DTCFG,Dead time configure" line.long 0x3C "FCCHP3,Free complementary channel protection register 3" bitfld.long 0x3C 31. "FCCHP3EN,Free complementary channel protection register 3 enable" "0,1" bitfld.long 0x3C 11. "ROS,Run mode off-state configure" "0,1" bitfld.long 0x3C 10. "IOS,Idle mode off-state configure" "0,1" hexmask.long.byte 0x3C 0.--7. 1. "DTCFG,Dead time configure" group.long 0xE0++0x7 line.long 0x0 "DMACFG,DMA configuration register" hexmask.long.byte 0x0 8.--12. 1. "DMATC,DMA transfer count" hexmask.long.byte 0x0 0.--4. 1. "DMATA,DMA transfer access start address" line.long 0x4 "DMATB,DMA transfer buffer register" hexmask.long.word 0x4 0.--15. 1. "DMATB,DMA transfer buffer" group.long 0xFC++0x3 line.long 0x0 "CFG,Configuration register" bitfld.long 0x0 1. "CHVSEL,Write CHxVAL register selection" "0,1" bitfld.long 0x0 0. "OUTSEL,The output value selection" "0,1" tree.end tree.end tree "TRIGSEL (Trigger Selection Controller)" base ad:0x40018400 group.long 0x0++0x43 line.long 0x0 "EXTOUT0,Trigger selection for EXTOUT0 register" rbitfld.long 0x0 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x0 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x0 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x0 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x0 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x4 "EXTOUT1,Trigger selection for EXTOUT1 register" rbitfld.long 0x4 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x4 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x4 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x4 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x4 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x8 "ADC0,Trigger selection for ADC0 register" rbitfld.long 0x8 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x8 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x8 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0xC "ADC1,Trigger selection for ADC1 register" rbitfld.long 0xC 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0xC 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0xC 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x10 "DAC,Trigger selection for DAC register" rbitfld.long 0x10 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x10 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x14 "TIMER0IN,Trigger selection for TIMER0_ITI register" rbitfld.long 0x14 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x14 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x14 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x14 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x14 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x18 "TIMER0BRKIN,Trigger selection for TIMER0_BRKIN register" rbitfld.long 0x18 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x18 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x18 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x18 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x18 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x1C "TIMER7IN,Trigger selection for TIMER7_ITI register" rbitfld.long 0x1C 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x1C 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x1C 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x1C 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x1C 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x20 "TIMER7BRKIN,Trigger selection for TIMER7_BRKIN register" rbitfld.long 0x20 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x20 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x20 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x20 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x20 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x24 "TIMER19IN,Trigger selection for TIMER19_ITI register" rbitfld.long 0x24 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x24 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x24 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x24 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x24 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x28 "TIMER19BRKIN,Trigger selection for TIMER19_BRKIN register" rbitfld.long 0x28 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x28 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x28 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x28 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x28 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x2C "TIMER20IN,Trigger selection for TIMER20_ITI register" rbitfld.long 0x2C 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x2C 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x2C 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x2C 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x2C 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x30 "TIMER20BRKIN,Trigger selection for TIMER20_BRKIN register" rbitfld.long 0x30 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x30 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x30 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x30 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x30 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x34 "TIMER1IN,Trigger selection for TIMER1_ITI register" rbitfld.long 0x34 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x34 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x34 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x34 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x34 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x38 "MFCOM,Trigger selection for MFCOM register" rbitfld.long 0x38 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x38 24.--30. 1. "INSEL3,Trigger input source selection for output3" hexmask.long.byte 0x38 16.--22. 1. "INSEL2,Trigger input source selection for output2" hexmask.long.byte 0x38 8.--14. 1. "INSEL1,Trigger input source selection for output1" hexmask.long.byte 0x38 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x3C "CAN0,Trigger selection for CAN0 register" rbitfld.long 0x3C 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x3C 0.--6. 1. "INSEL0,Trigger input source selection for output0" line.long 0x40 "CAN1,Trigger selection for CAN1 register" rbitfld.long 0x40 31. "LK,TRIGSEL register lock" "0,1" hexmask.long.byte 0x40 0.--6. 1. "INSEL0,Trigger input source selection for output0" tree.end tree "USART (Universal Synchronous/Asynchronous Receiver/Transmitter)" base ad:0x0 tree "USART0" base ad:0x40013800 group.long 0x0++0x17 line.long 0x0 "CTL0,Control register 0" bitfld.long 0x0 28. "WM1,Wakeup method in mute mode" "0,1" bitfld.long 0x0 27. "EBIE,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RTIE,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DEA,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DED,Driver Enable deassertion" bitfld.long 0x0 15. "OVSMOD,Oversampling mode" "0,1" bitfld.long 0x0 14. "AMIE,Character match interrupt" "0,1" bitfld.long 0x0 13. "MEN,Mute mode enable" "0,1" bitfld.long 0x0 12. "WL,Word length" "0,1" newline bitfld.long 0x0 11. "WM,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PM,Parity selection" "0,1" bitfld.long 0x0 8. "PERRIE,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TBEIE,interrupt enable" "0,1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RBNEIE,RXNE interrupt enable" "0,1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TEN,Transmitter enable" "0,1" newline bitfld.long 0x0 2. "REN,Receiver enable" "0,1" bitfld.long 0x0 1. "UESM,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTL1,Control register 1" hexmask.long.byte 0x4 24.--31. 1. "ADDR_DATA,Address or data of the USART terminal" bitfld.long 0x4 23. "RTEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABDM,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBF,Most significant bit first" "0,1" bitfld.long 0x4 18. "DINV,Data bit level inversion" "0,1" bitfld.long 0x4 17. "TINV,TX pin active level" "0,1" bitfld.long 0x4 16. "RINV,RX pin active level" "0,1" bitfld.long 0x4 15. "STRP,Swap TX/RX pins" "0,1" newline bitfld.long 0x4 14. "LMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STB,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPH,Clock phase" "0,1" bitfld.long 0x4 8. "CLEN,Last bit clock pulse" "0,1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBLEN,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDM,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTL2,Control register 2" bitfld.long 0x8 22. "WUIE,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WUM,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCRTNUM,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DEP,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEM,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDRE,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRD,Overrun Disable" "0,1" bitfld.long 0x8 11. "OSB,One sample bit method" "0,1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0,1" newline bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DENT,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DENR,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "NKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" newline bitfld.long 0x8 0. "ERRIE,Error interrupt enable" "0,1" line.long 0xC "BAUD,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "BRR_INT,integer of baud-rate divider" hexmask.long.byte 0xC 0.--3. 1. "BRR_FRA,integer of baud-rate divider" line.long 0x10 "GP,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GUAT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RT,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BL,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RT,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "CMD,Command register" bitfld.long 0x0 4. "TXFCMD,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXFCMD,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMCMD,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKCMD,Send break request" "0,1" bitfld.long 0x0 0. "ABDCMD,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STAT,Interrupt & status" bitfld.long 0x0 22. "REA,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TEA,Transmit enable acknowledge" "0,1" bitfld.long 0x0 20. "WUF,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "SBF,Send break flag" "0,1" bitfld.long 0x0 17. "AMF,character match flag" "0,1" bitfld.long 0x0 16. "BSY,Busy flag" "0,1" bitfld.long 0x0 15. "ABDF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABDE,Auto baud rate error" "0,1" newline bitfld.long 0x0 12. "EBF,End of block flag" "0,1" bitfld.long 0x0 11. "RTF,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTS,CTS flag" "0,1" bitfld.long 0x0 9. "CTSF,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TBE,Transmit data register" "0,1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RBNE,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEF,Idle line detected" "0,1" newline bitfld.long 0x0 3. "ORERR,Overrun error" "0,1" bitfld.long 0x0 2. "NERR,Noise detected flag" "0,1" bitfld.long 0x0 1. "FERR,Framing error" "0,1" bitfld.long 0x0 0. "PERR,Parity error" "0,1" wgroup.long 0x20++0x3 line.long 0x0 "INTC,Interrupt flag clear register" bitfld.long 0x0 20. "WUC,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "AMC,Character match clear flag" "0,1" bitfld.long 0x0 12. "EBC,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RTC,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSC,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDC,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TCC,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLEC,Idle line detected clear" "0,1" bitfld.long 0x0 3. "OREC,Overrun error clear flag" "0,1" newline bitfld.long 0x0 2. "NEC,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FEC,Frame error clear flag" "0,1" bitfld.long 0x0 0. "PEC,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDATA,Transmit data value" group.long 0xC0++0x3 line.long 0x0 "CHC,coherence control register" bitfld.long 0x0 8. "EPERR,Early parity error flag" "0,1" bitfld.long 0x0 0. "HCM,Hardware flow control coherence mode" "0,1" group.long 0xD0++0x3 line.long 0x0 "RFCS,USART receive FIFO control and status register" bitfld.long 0x0 15. "RFFINT,Receive FIFO full interrupt flag" "0,1" rbitfld.long 0x0 12.--14. "RFCNT,Receive FIFO count number" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 11. "RFF,Receive FIFO full flag" "0,1" rbitfld.long 0x0 10. "RFE,Receive FIFO empty flag" "0,1" bitfld.long 0x0 9. "RFFIE,Receive FIFO full interrupt enable" "0,1" bitfld.long 0x0 8. "RFEN,Receive FIFO enable" "0,1" bitfld.long 0x0 0. "ELNACK,Early NKEN when smartcard mode is selected" "0,1" tree.end tree "USART1" base ad:0x40004400 group.long 0x0++0x17 line.long 0x0 "CTL0,Control register 0" bitfld.long 0x0 28. "WM1,Wakeup method in mute mode" "0,1" bitfld.long 0x0 27. "EBIE,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RTIE,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DEA,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DED,Driver Enable deassertion" bitfld.long 0x0 15. "OVSMOD,Oversampling mode" "0,1" bitfld.long 0x0 14. "AMIE,Character match interrupt" "0,1" bitfld.long 0x0 13. "MEN,Mute mode enable" "0,1" bitfld.long 0x0 12. "WL,Word length" "0,1" newline bitfld.long 0x0 11. "WM,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PM,Parity selection" "0,1" bitfld.long 0x0 8. "PERRIE,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TBEIE,interrupt enable" "0,1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RBNEIE,RXNE interrupt enable" "0,1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TEN,Transmitter enable" "0,1" newline bitfld.long 0x0 2. "REN,Receiver enable" "0,1" bitfld.long 0x0 1. "UESM,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTL1,Control register 1" hexmask.long.byte 0x4 24.--31. 1. "ADDR_DATA,Address or data of the USART terminal" bitfld.long 0x4 23. "RTEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABDM,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBF,Most significant bit first" "0,1" bitfld.long 0x4 18. "DINV,Data bit level inversion" "0,1" bitfld.long 0x4 17. "TINV,TX pin active level" "0,1" bitfld.long 0x4 16. "RINV,RX pin active level" "0,1" bitfld.long 0x4 15. "STRP,Swap TX/RX pins" "0,1" newline bitfld.long 0x4 14. "LMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STB,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPH,Clock phase" "0,1" bitfld.long 0x4 8. "CLEN,Last bit clock pulse" "0,1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBLEN,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDM,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTL2,Control register 2" bitfld.long 0x8 22. "WUIE,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WUM,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCRTNUM,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DEP,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEM,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDRE,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRD,Overrun Disable" "0,1" bitfld.long 0x8 11. "OSB,One sample bit method" "0,1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0,1" newline bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DENT,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DENR,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "NKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" newline bitfld.long 0x8 0. "ERRIE,Error interrupt enable" "0,1" line.long 0xC "BAUD,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "BRR_INT,integer of baud-rate divider" hexmask.long.byte 0xC 0.--3. 1. "BRR_FRA,integer of baud-rate divider" line.long 0x10 "GP,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GUAT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RT,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BL,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RT,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "CMD,Command register" bitfld.long 0x0 4. "TXFCMD,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXFCMD,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMCMD,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKCMD,Send break request" "0,1" bitfld.long 0x0 0. "ABDCMD,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STAT,Interrupt & status" bitfld.long 0x0 22. "REA,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TEA,Transmit enable acknowledge" "0,1" bitfld.long 0x0 20. "WUF,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "SBF,Send break flag" "0,1" bitfld.long 0x0 17. "AMF,character match flag" "0,1" bitfld.long 0x0 16. "BSY,Busy flag" "0,1" bitfld.long 0x0 15. "ABDF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABDE,Auto baud rate error" "0,1" newline bitfld.long 0x0 12. "EBF,End of block flag" "0,1" bitfld.long 0x0 11. "RTF,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTS,CTS flag" "0,1" bitfld.long 0x0 9. "CTSF,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TBE,Transmit data register" "0,1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RBNE,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEF,Idle line detected" "0,1" newline bitfld.long 0x0 3. "ORERR,Overrun error" "0,1" bitfld.long 0x0 2. "NERR,Noise detected flag" "0,1" bitfld.long 0x0 1. "FERR,Framing error" "0,1" bitfld.long 0x0 0. "PERR,Parity error" "0,1" wgroup.long 0x20++0x3 line.long 0x0 "INTC,Interrupt flag clear register" bitfld.long 0x0 20. "WUC,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "AMC,Character match clear flag" "0,1" bitfld.long 0x0 12. "EBC,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RTC,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSC,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDC,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TCC,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLEC,Idle line detected clear" "0,1" bitfld.long 0x0 3. "OREC,Overrun error clear flag" "0,1" newline bitfld.long 0x0 2. "NEC,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FEC,Frame error clear flag" "0,1" bitfld.long 0x0 0. "PEC,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDATA,Transmit data value" group.long 0xC0++0x3 line.long 0x0 "CHC,coherence control register" bitfld.long 0x0 8. "EPERR,Early parity error flag" "0,1" bitfld.long 0x0 0. "HCM,Hardware flow control coherence mode" "0,1" group.long 0xD0++0x3 line.long 0x0 "RFCS,USART receive FIFO control and status register" bitfld.long 0x0 15. "RFFINT,Receive FIFO full interrupt flag" "0,1" rbitfld.long 0x0 12.--14. "RFCNT,Receive FIFO count number" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 11. "RFF,Receive FIFO full flag" "0,1" rbitfld.long 0x0 10. "RFE,Receive FIFO empty flag" "0,1" bitfld.long 0x0 9. "RFFIE,Receive FIFO full interrupt enable" "0,1" bitfld.long 0x0 8. "RFEN,Receive FIFO enable" "0,1" bitfld.long 0x0 0. "ELNACK,Early NKEN when smartcard mode is selected" "0,1" tree.end tree "USART2" base ad:0x40004800 group.long 0x0++0x17 line.long 0x0 "CTL0,Control register 0" bitfld.long 0x0 28. "WM1,Wakeup method in mute mode" "0,1" bitfld.long 0x0 27. "EBIE,End of Block interrupt" "0,1" bitfld.long 0x0 26. "RTIE,Receiver timeout interrupt" "0,1" hexmask.long.byte 0x0 21.--25. 1. "DEA,Driver Enable assertion" hexmask.long.byte 0x0 16.--20. 1. "DED,Driver Enable deassertion" bitfld.long 0x0 15. "OVSMOD,Oversampling mode" "0,1" bitfld.long 0x0 14. "AMIE,Character match interrupt" "0,1" bitfld.long 0x0 13. "MEN,Mute mode enable" "0,1" bitfld.long 0x0 12. "WL,Word length" "0,1" newline bitfld.long 0x0 11. "WM,Receiver wakeup method" "0,1" bitfld.long 0x0 10. "PCEN,Parity control enable" "0,1" bitfld.long 0x0 9. "PM,Parity selection" "0,1" bitfld.long 0x0 8. "PERRIE,PE interrupt enable" "0,1" bitfld.long 0x0 7. "TBEIE,interrupt enable" "0,1" bitfld.long 0x0 6. "TCIE,Transmission complete interrupt" "0,1" bitfld.long 0x0 5. "RBNEIE,RXNE interrupt enable" "0,1" bitfld.long 0x0 4. "IDLEIE,IDLE interrupt enable" "0,1" bitfld.long 0x0 3. "TEN,Transmitter enable" "0,1" newline bitfld.long 0x0 2. "REN,Receiver enable" "0,1" bitfld.long 0x0 1. "UESM,USART enable in Stop mode" "0,1" bitfld.long 0x0 0. "UEN,USART enable" "0,1" line.long 0x4 "CTL1,Control register 1" hexmask.long.byte 0x4 24.--31. 1. "ADDR_DATA,Address or data of the USART terminal" bitfld.long 0x4 23. "RTEN,Receiver timeout enable" "0,1" bitfld.long 0x4 21.--22. "ABDM,Auto baud rate mode" "0,1,2,3" bitfld.long 0x4 20. "ABDEN,Auto baud rate enable" "0,1" bitfld.long 0x4 19. "MSBF,Most significant bit first" "0,1" bitfld.long 0x4 18. "DINV,Data bit level inversion" "0,1" bitfld.long 0x4 17. "TINV,TX pin active level" "0,1" bitfld.long 0x4 16. "RINV,RX pin active level" "0,1" bitfld.long 0x4 15. "STRP,Swap TX/RX pins" "0,1" newline bitfld.long 0x4 14. "LMEN,LIN mode enable" "0,1" bitfld.long 0x4 12.--13. "STB,STOP bits" "0,1,2,3" bitfld.long 0x4 11. "CKEN,Clock enable" "0,1" bitfld.long 0x4 10. "CPL,Clock polarity" "0,1" bitfld.long 0x4 9. "CPH,Clock phase" "0,1" bitfld.long 0x4 8. "CLEN,Last bit clock pulse" "0,1" bitfld.long 0x4 6. "LBDIE,LIN break detection interrupt" "0,1" bitfld.long 0x4 5. "LBLEN,LIN break detection length" "0,1" bitfld.long 0x4 4. "ADDM,7-bit Address Detection/4-bit Address" "0,1" line.long 0x8 "CTL2,Control register 2" bitfld.long 0x8 22. "WUIE,Wakeup from Stop mode interrupt" "0,1" bitfld.long 0x8 20.--21. "WUM,Wakeup from Stop mode interrupt flag" "0,1,2,3" bitfld.long 0x8 17.--19. "SCRTNUM,Smartcard auto-retry count" "0,1,2,3,4,5,6,7" bitfld.long 0x8 15. "DEP,Driver enable polarity" "0,1" bitfld.long 0x8 14. "DEM,Driver enable mode" "0,1" bitfld.long 0x8 13. "DDRE,DMA Disable on Reception" "0,1" bitfld.long 0x8 12. "OVRD,Overrun Disable" "0,1" bitfld.long 0x8 11. "OSB,One sample bit method" "0,1" bitfld.long 0x8 10. "CTSIE,CTS interrupt enable" "0,1" newline bitfld.long 0x8 9. "CTSEN,CTS enable" "0,1" bitfld.long 0x8 8. "RTSEN,RTS enable" "0,1" bitfld.long 0x8 7. "DENT,DMA enable transmitter" "0,1" bitfld.long 0x8 6. "DENR,DMA enable receiver" "0,1" bitfld.long 0x8 5. "SCEN,Smartcard mode enable" "0,1" bitfld.long 0x8 4. "NKEN,Smartcard NACK enable" "0,1" bitfld.long 0x8 3. "HDEN,Half-duplex selection" "0,1" bitfld.long 0x8 2. "IRLP,IrDA low-power" "0,1" bitfld.long 0x8 1. "IREN,IrDA mode enable" "0,1" newline bitfld.long 0x8 0. "ERRIE,Error interrupt enable" "0,1" line.long 0xC "BAUD,Baud rate register" hexmask.long.word 0xC 4.--15. 1. "BRR_INT,integer of baud-rate divider" hexmask.long.byte 0xC 0.--3. 1. "BRR_FRA,integer of baud-rate divider" line.long 0x10 "GP,Guard time and prescaler" hexmask.long.byte 0x10 8.--15. 1. "GUAT,Guard time value" hexmask.long.byte 0x10 0.--7. 1. "PSC,Prescaler value" line.long 0x14 "RT,Receiver timeout register" hexmask.long.byte 0x14 24.--31. 1. "BL,Block Length" hexmask.long.tbyte 0x14 0.--23. 1. "RT,Receiver timeout value" wgroup.long 0x18++0x3 line.long 0x0 "CMD,Command register" bitfld.long 0x0 4. "TXFCMD,Transmit data flush" "0,1" bitfld.long 0x0 3. "RXFCMD,Receive data flush request" "0,1" bitfld.long 0x0 2. "MMCMD,Mute mode request" "0,1" bitfld.long 0x0 1. "SBKCMD,Send break request" "0,1" bitfld.long 0x0 0. "ABDCMD,Auto baud rate request" "0,1" rgroup.long 0x1C++0x3 line.long 0x0 "STAT,Interrupt & status" bitfld.long 0x0 22. "REA,Receive enable acknowledge" "0,1" bitfld.long 0x0 21. "TEA,Transmit enable acknowledge" "0,1" bitfld.long 0x0 20. "WUF,Wakeup from Stop mode flag" "0,1" bitfld.long 0x0 19. "RWU,Receiver wakeup from Mute" "0,1" bitfld.long 0x0 18. "SBF,Send break flag" "0,1" bitfld.long 0x0 17. "AMF,character match flag" "0,1" bitfld.long 0x0 16. "BSY,Busy flag" "0,1" bitfld.long 0x0 15. "ABDF,Auto baud rate flag" "0,1" bitfld.long 0x0 14. "ABDE,Auto baud rate error" "0,1" newline bitfld.long 0x0 12. "EBF,End of block flag" "0,1" bitfld.long 0x0 11. "RTF,Receiver timeout" "0,1" bitfld.long 0x0 10. "CTS,CTS flag" "0,1" bitfld.long 0x0 9. "CTSF,CTS interrupt flag" "0,1" bitfld.long 0x0 8. "LBDF,LIN break detection flag" "0,1" bitfld.long 0x0 7. "TBE,Transmit data register" "0,1" bitfld.long 0x0 6. "TC,Transmission complete" "0,1" bitfld.long 0x0 5. "RBNE,Read data register not" "0,1" bitfld.long 0x0 4. "IDLEF,Idle line detected" "0,1" newline bitfld.long 0x0 3. "ORERR,Overrun error" "0,1" bitfld.long 0x0 2. "NERR,Noise detected flag" "0,1" bitfld.long 0x0 1. "FERR,Framing error" "0,1" bitfld.long 0x0 0. "PERR,Parity error" "0,1" wgroup.long 0x20++0x3 line.long 0x0 "INTC,Interrupt flag clear register" bitfld.long 0x0 20. "WUC,Wakeup from Stop mode clear" "0,1" bitfld.long 0x0 17. "AMC,Character match clear flag" "0,1" bitfld.long 0x0 12. "EBC,End of timeout clear flag" "0,1" bitfld.long 0x0 11. "RTC,Receiver timeout clear" "0,1" bitfld.long 0x0 9. "CTSC,CTS clear flag" "0,1" bitfld.long 0x0 8. "LBDC,LIN break detection clear" "0,1" bitfld.long 0x0 6. "TCC,Transmission complete clear" "0,1" bitfld.long 0x0 4. "IDLEC,Idle line detected clear" "0,1" bitfld.long 0x0 3. "OREC,Overrun error clear flag" "0,1" newline bitfld.long 0x0 2. "NEC,Noise detected clear flag" "0,1" bitfld.long 0x0 1. "FEC,Frame error clear flag" "0,1" bitfld.long 0x0 0. "PEC,Parity error clear flag" "0,1" rgroup.long 0x24++0x3 line.long 0x0 "RDATA,Receive data register" hexmask.long.word 0x0 0.--8. 1. "RDATA,Receive data value" group.long 0x28++0x3 line.long 0x0 "TDATA,Transmit data register" hexmask.long.word 0x0 0.--8. 1. "TDATA,Transmit data value" group.long 0xC0++0x3 line.long 0x0 "CHC,coherence control register" bitfld.long 0x0 8. "EPERR,Early parity error flag" "0,1" bitfld.long 0x0 0. "HCM,Hardware flow control coherence mode" "0,1" group.long 0xD0++0x3 line.long 0x0 "RFCS,USART receive FIFO control and status register" bitfld.long 0x0 15. "RFFINT,Receive FIFO full interrupt flag" "0,1" rbitfld.long 0x0 12.--14. "RFCNT,Receive FIFO count number" "0,1,2,3,4,5,6,7" rbitfld.long 0x0 11. "RFF,Receive FIFO full flag" "0,1" rbitfld.long 0x0 10. "RFE,Receive FIFO empty flag" "0,1" bitfld.long 0x0 9. "RFFIE,Receive FIFO full interrupt enable" "0,1" bitfld.long 0x0 8. "RFEN,Receive FIFO enable" "0,1" bitfld.long 0x0 0. "ELNACK,Early NKEN when smartcard mode is selected" "0,1" tree.end tree.end tree "WWDGT (Window Watchdog Timer)" base ad:0x40002C00 group.long 0x0++0xB line.long 0x0 "CTL,Control register" bitfld.long 0x0 7. "WDGTEN,Activation bit" "0,1" hexmask.long.byte 0x0 0.--6. 1. "CNT,7-bit counter" line.long 0x4 "CFG,Configuration register" bitfld.long 0x4 9. "EWIE,Early wakeup interrupt" "0,1" bitfld.long 0x4 7.--8. "PSC,Prescaler" "0,1,2,3" hexmask.long.byte 0x4 0.--6. 1. "WIN,7-bit window value" line.long 0x8 "STAT,Status register" bitfld.long 0x8 0. "EWIF,Early wakeup interrupt" "0,1" tree.end AUTOINDENT.OFF